# TCL File Generated by Component Editor 21.1 # Thu Sep 08 23:38:44 CEST 2022 # DO NOT MODIFY # # hardware_task "hardware_task" v1.0 # 2022.09.08.23:38:44 # A hardware task status and control interface # # # request TCL package from ACDS 16.1 # package require -exact qsys 16.1 # # module hardware_task # set_module_property DESCRIPTION "A hardware task status and control interface" set_module_property NAME hardware_task set_module_property VERSION 1.0 set_module_property INTERNAL false set_module_property OPAQUE_ADDRESS_MAP true set_module_property GROUP signal_processing set_module_property AUTHOR "" set_module_property DISPLAY_NAME hardware_task set_module_property INSTANTIATE_IN_SYSTEM_MODULE true set_module_property EDITABLE true set_module_property REPORT_TO_TALKBACK false set_module_property ALLOW_GREYBOX_GENERATION false set_module_property REPORT_HIERARCHY false # # file sets # add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" set_fileset_property QUARTUS_SYNTH TOP_LEVEL hardware_task set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE true add_fileset_file hardware_task.vhd VHDL PATH hardware/system/hardware_task.vhd TOP_LEVEL_FILE # # parameters # # # display items # # # connection point reset # add_interface reset reset end set_interface_property reset associatedClock clock set_interface_property reset synchronousEdges DEASSERT set_interface_property reset ENABLED true set_interface_property reset EXPORT_OF "" set_interface_property reset PORT_NAME_MAP "" set_interface_property reset CMSIS_SVD_VARIABLES "" set_interface_property reset SVD_ADDRESS_GROUP "" add_interface_port reset reset reset Input 1 # # connection point ctrl # add_interface ctrl avalon end set_interface_property ctrl addressUnits WORDS set_interface_property ctrl associatedClock clock set_interface_property ctrl associatedReset reset set_interface_property ctrl bitsPerSymbol 8 set_interface_property ctrl burstOnBurstBoundariesOnly false set_interface_property ctrl burstcountUnits WORDS set_interface_property ctrl explicitAddressSpan 0 set_interface_property ctrl holdTime 0 set_interface_property ctrl linewrapBursts false set_interface_property ctrl maximumPendingReadTransactions 0 set_interface_property ctrl maximumPendingWriteTransactions 0 set_interface_property ctrl readLatency 0 set_interface_property ctrl readWaitTime 1 set_interface_property ctrl setupTime 0 set_interface_property ctrl timingUnits Cycles set_interface_property ctrl writeWaitTime 0 set_interface_property ctrl ENABLED true set_interface_property ctrl EXPORT_OF "" set_interface_property ctrl PORT_NAME_MAP "" set_interface_property ctrl CMSIS_SVD_VARIABLES "" set_interface_property ctrl SVD_ADDRESS_GROUP "" add_interface_port ctrl ctrl_address address Input 4 add_interface_port ctrl ctrl_read read Input 1 add_interface_port ctrl ctrl_readdata readdata Output 32 add_interface_port ctrl ctrl_write write Input 1 add_interface_port ctrl ctrl_writedata writedata Input 32 set_interface_assignment ctrl embeddedsw.configuration.isFlash 0 set_interface_assignment ctrl embeddedsw.configuration.isMemoryDevice 0 set_interface_assignment ctrl embeddedsw.configuration.isNonVolatileStorage 0 set_interface_assignment ctrl embeddedsw.configuration.isPrintableDevice 0 # # connection point task # add_interface task avalon start set_interface_property task addressUnits SYMBOLS set_interface_property task associatedClock clock set_interface_property task associatedReset reset set_interface_property task bitsPerSymbol 8 set_interface_property task burstOnBurstBoundariesOnly false set_interface_property task burstcountUnits WORDS set_interface_property task doStreamReads false set_interface_property task doStreamWrites false set_interface_property task holdTime 0 set_interface_property task linewrapBursts false set_interface_property task maximumPendingReadTransactions 0 set_interface_property task maximumPendingWriteTransactions 0 set_interface_property task readLatency 0 set_interface_property task readWaitTime 1 set_interface_property task setupTime 0 set_interface_property task timingUnits Cycles set_interface_property task writeWaitTime 0 set_interface_property task ENABLED true set_interface_property task EXPORT_OF "" set_interface_property task PORT_NAME_MAP "" set_interface_property task CMSIS_SVD_VARIABLES "" set_interface_property task SVD_ADDRESS_GROUP "" add_interface_port task task_address address Output 4 add_interface_port task task_read read Output 1 add_interface_port task task_readdata readdata Input 32 add_interface_port task task_write write Output 1 add_interface_port task task_writedata writedata Output 32 # # connection point clock # add_interface clock clock end set_interface_property clock clockRate 0 set_interface_property clock ENABLED true set_interface_property clock EXPORT_OF "" set_interface_property clock PORT_NAME_MAP "" set_interface_property clock CMSIS_SVD_VARIABLES "" set_interface_property clock SVD_ADDRESS_GROUP "" add_interface_port clock clk clk Input 1