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signal_processing_vorlage
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Studentenversion des ESY6/A Praktikums "signal_processing".
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signal_processing_vorlage/hardware/system/pll/pll_main.spd

pll_main.spd 185B
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  1. <?xml version="1.0" encoding="UTF-8"?>

  2. <simPackage>

  3.  <file path="pll_main_sim/pll_main.vho" type="VHDL" />

  4.  <topLevel name="pll_main" />

  5.  <deviceFamily name="cyclonev" />

  6. </simPackage>