25 lines
526 B
VHDL
25 lines
526 B
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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package avalon_slave is
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type State is (
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SLAVE_IDLE,
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SLAVE_READ,
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SLAVE_READ_DATA,
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SLAVE_WRITE
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);
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type Request is record
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address : std_logic_vector( 3 downto 0 );
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read : std_logic;
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write : std_logic;
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writedata : std_logic_vector( 31 downto 0 );
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end record Request;
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type Response is record
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readdata : std_logic_vector( 31 downto 0 );
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end record Response;
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end package avalon_slave;
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