binnerda82916 fe4bf812ef funktioniert

2024-12-18 10:34:40 +01:00

hardware

funktioniert

2024-12-18 10:34:40 +01:00

software

update fft.vhd

2024-12-11 08:20:00 +01:00

tests

fft hardware plottable

2024-12-17 11:44:13 +01:00

.gitignore

Initial commit

2023-10-31 07:47:27 +01:00

data_channel_hw.tcl

Initial commit

2023-10-31 07:47:27 +01:00

hardware_task_hw.tcl

Initial commit

2023-10-31 07:47:27 +01:00

hardware_timestamp_hw.tcl

Initial commit

2023-10-31 07:47:27 +01:00

hdl_sources.qsf

Initial commit

2023-10-31 07:47:27 +01:00

init.sh

Initial commit

2023-10-31 07:47:27 +01:00

Makefile

Initial commit

2023-10-31 07:47:27 +01:00

niosII.qsys

Initial commit

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signal_processing.cdf

Initial commit

2023-10-31 07:47:27 +01:00

signal_processing.qpf

Initial commit

2023-10-31 07:47:27 +01:00

signal_processing.qsf

Initial commit

2023-10-31 07:47:27 +01:00

Description

Studentenversion des ESY6/A Praktikums "signal_processing".

211 KiB

Languages

VHDL 36.3%

C 17.5%

Verilog 15.2%

Python 10.8%

Makefile 8.3%

Other 11.8%