verilog_srcs = \ ../../../hardware/system/Butterfly.v \ ../../../hardware/system/DelayBuffer.v \ ../../../hardware/system/FFT1024_32B.v \ ../../../hardware/system/Multiply.v \ ../../../hardware/system/SdfUnit2.v \ ../../../hardware/system/SdfUnit.v \ ../../../hardware/system/Twiddle1024_32B.v \ vhdl_srcs = \ ../../../hardware/system/reg32.vhd \ ../../../hardware/system/avalon_slave.vhd \ ../../hardware/test_data_channel.vhd \ ../../../hardware/system/avalon_slave_transitions.vhd \ ../../../hardware/system/task.vhd \ ../../../hardware/system/hardware_task_control.vhd \ ../../../hardware/system/hardware_task.vhd \ ../../../hardware/system/float.vhd \ ../../../hardware/system/squareRoot_pipe.vhd \ ../../../hardware/system/fft_magnitude_calc.vhd \ ../../../hardware/signal_processing/fft.vhd \ ../../../hardware/system/task_fft.vhd \ ../test_utility.vhd \ ../test_avalon_slave.vhd \ ../test_hardware_task.vhd \ ../../data/add_rand.vhd \ ../../data/sine.vhd \ ../../data/fft.vhd \ test_task_fft.vhd \ main = test_task_fft expected_data = ../../data/fft.py include ../data_tests.mk