200 lines
5.6 KiB
Makefile
200 lines
5.6 KiB
Makefile
# Check for the required nios2-download command
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# The command is only available in nios2_command_shell
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ifeq (, $(shell which nios2-download))
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$(error "This makefile must be executed within the nios2_command_shell")
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endif
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uname = $(shell uname -r)
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ifneq (,$(findstring Microsoft,${uname}))
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exe_suffix=.exe
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endif
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# Programm pathes
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quartus_root ?= ${QUARTUS_ROOTDIR}
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intel_root ?= $(quartus_root)/..
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sopc_root = $(quartus_root)/sopc_builder
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# Tools
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qsys_generate = $(sopc_root)/bin/qsys-generate$(exe_suffix)
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niosii_bsp = $(intel_root)/nios2eds/sdk2/bin/nios2-bsp
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quartus_map = quartus_map$(exe_suffix)
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quartus_fit = quartus_fit$(exe_suffix)
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quartus_asm = quartus_asm$(exe_suffix)
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quartus_sta = quartus_sta$(exe_suffix)
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nios2_bsp_generate_files = nios2-bsp-generate-files$(exe_suffix)
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quartus_pgm = quartus_pgm$(exe_suffix)
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nios2_download = nios2-download$(exe_suffix)
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nios2_terminal = nios2-terminal$(exe_suffix)
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# Directories
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niosii_dir = niosII
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bsp_dir = software/signal_processing_bsp
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app_dir = software/signal_processing
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hw_test_dir = tests/hardware
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sw_test_dir = tests/software
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# Settings
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quartus_project = signal_processing
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signal_processing_qsf = signal_processing.qsf
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# Sources
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niosii_qsys = niosII.qsys
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# Targets
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niosii_qip = $(niosii_dir)/synthesis/niosII.qip
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niosii_info = niosII.sopcinfo
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bsp_settings = $(bsp_dir)/settings.bsp
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bsp_makefile = $(bsp_dir)/Makefile
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# VHDL source files
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hdl_src += \
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hardware/system/sync_ff.vhd \
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hardware/system/sync_rst.vhd \
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hardware/system/pll/pll_main.vhd \
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hardware/system/reg32.vhd \
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hardware/system/avalon_slave_transitions.vhd \
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hardware/system/avalon_slave.vhd \
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hardware/system/data_sink_mux.vhd \
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hardware/system/fifo.vhd \
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hardware/system/data_source_mux.vhd \
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hardware/system/data_channel_control.vhd \
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hardware/system/data_channel.vhd \
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hardware/system/hardware_timestamp.vhd \
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hardware/system/task.vhd \
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hardware/system/float.vhd \
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hardware/system/hardware_task_control.vhd \
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hardware/system/hardware_task.vhd \
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hardware/system/float_add.vhd \
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hardware/signal_processing/add.vhd \
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hardware/system/task_add.vhd \
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hardware/signal_processing/rand.vhd \
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hardware/system/task_rand.vhd \
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hardware/system/cordic_pkg.vhd \
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hardware/system/cordic.vhd \
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hardware/system/fixed_sine.vhd \
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hardware/system/float_sine.vhd \
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hardware/signal_processing/sine.vhd \
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hardware/system/task_sine.vhd \
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hardware/system/Butterfly.v \
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hardware/system/DelayBuffer.v \
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hardware/system/FFT1024_32B.v \
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hardware/system/Multiply.v \
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hardware/system/SdfUnit2.v \
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hardware/system/SdfUnit.v \
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hardware/system/Twiddle1024_32B.v \
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hardware/system/squareRoot_pipe.vhd \
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hardware/system/fft_magnitude_calc.vhd \
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hardware/signal_processing/fft.vhd \
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hardware/system/task_fft.vhd \
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hardware/signal_processing/crc.vhd \
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hardware/system/task_crc.vhd \
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hardware/signal_processing/signal_processing.vhd \
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#
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clean_items += \
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$(niosii_dir) \
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$(niosii_info) \
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.map \
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.fitter \
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.assembler \
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.sta \
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.qsys_edit/ \
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db/ \
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incremental_db/ \
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output_files/ \
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.PHONY: all \
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niosII \
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fpga \
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program \
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clean \
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app \
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download \
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run \
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tests \
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all: run
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#------------------------------------------------------------------------------
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# Create the NiosII system from the description file
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niosII: $(niosii_info)
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# Create the NiosII sources from the description file
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$(niosii_qip): $(niosii_qsys)
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@echo Generating the NiosII system from $< ...
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@$(qsys_generate) -syn=VHDL $<
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# The NiosII system information file is created in parallel to the .qip file.
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$(niosii_info): $(niosii_qip)
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#------------------------------------------------------------------------------
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# Quartus FPGA toolchain contains the mapper, fitter, assembler and static
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# timing analysis (sta).
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#
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fpga: .sta
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# Anaylze and synthesis of the QuartusII project
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.map: $(hdl_src) $(niosii_info) $(signal_processing_qsf)
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@rm -f $@
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@$(quartus_map) --read_settings_files=on --write_settings_files=off $(quartus_project) -c $(quartus_project) && date > $@
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# Run the quartus fitter on the project
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.fitter: .map $(sdc_src) $(signal_processing_qsf)
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@rm -f $@
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@$(quartus_fit) --read_settings_files=on --write_settings_files=off $(quartus_project) -c $(quartus_project) && date > $@
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.assembler: .fitter
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@rm -f $@
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@$(quartus_asm) --read_settings_files=off --write_settings_files=off $(quartus_project) -c $(quartus_project)&& date > $@
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.sta: .assembler
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@rm -f $@
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@$(quartus_sta) $(quartus_project) -c $(quartus_project) && date > $@
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output_files/signal_processing_time_limited.sof: .sta
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# Create the BSP from the sopc description
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bsp: ${bsp_makefile}
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$(bsp_settings): $(niosii_info)
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@echo Generating the NiosII BSP from $< ...
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@$(niosii_bsp) hal $(bsp_dir) $<
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$(bsp_makefile): $(bsp_settings)
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@$(nios2_bsp_generate_files) --settings software/signal_processing_bsp/settings.bsp --bsp-dir software/signal_processing_bsp/
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app: $(bsp_makefile)
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${MAKE} -C $(app_dir)
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# Programme the FPGA design
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program: output_files/signal_processing_time_limited.sof
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@$(quartus_pgm) signal_processing.cdf
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# Programme the NiosII software design
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download: app
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@$(nios2-download) $(app_dir)/signal_processing.elf -g
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# Programme the NiosII software design
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run: fpga download
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@$(nios2-terminal)
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sw_tests:
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@${MAKE} -C tests/software
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hw_tests:
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@${MAKE} -C tests/hardware
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device_tests:
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@${MAKE} -C tests/device
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tests: sw_tests hw_tests device_tests
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clean:
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@rm -rf $(clean_items)
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@${MAKE} -C ${hw_test_dir} clean
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@${MAKE} -C ${sw_test_dir} clean
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@${MAKE} -C ${app_dir} clean
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@${MAKE} -C ${bsp_dir} clean
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