Lösung des ESY6/A Praktikums "signal_processing".
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- <?xml version="1.0" encoding="UTF-8"?>
- <simPackage>
- <file path="pll_main_sim/pll_main.vho" type="VHDL" />
- <topLevel name="pll_main" />
- <deviceFamily name="cyclonev" />
- </simPackage>
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