64 lines
1.6 KiB
Systemverilog
64 lines
1.6 KiB
Systemverilog
module steuerung (
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bus.steuerung_port b, //b.dip[3:0], b.timer, b.clk, b.spi_read[1:0]
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led_if.led_port_top i //i.rgb[2:0], i.rgbn[2:0]
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);
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//dip[3:2] -> select colour, dip[1] -> read ~ 1/write ~ 0, dip[0] -> on ~ 1/off ~ 0
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//input wire clk12M, -> b.clk
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//input wire rst, -> b.dip[0]
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//input wire [1:0] color_sel, -> b.dip[3:2]
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//input wire rw, -> b.dip[1]
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//output reg REDn, -> i.rgbn[0]
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//output reg BLUn, -> i.rgbn[1]
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//output reg GRNn, -> i.rgbn[2]
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//output reg RED, -> i.rgb[0]
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//output reg BLU, -> i.rgb[1]
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//output reg GRN -> i.rgb[2]
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wire red_pwm;
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wire grn_pwm;
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wire blu_pwm;
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defparam U1.on_hi = 2'b10;
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defparam U1.on_lo = 2'b01;
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defparam U1.off = 2'b00;
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defparam U1.LED_OFF = 2'b00;
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defparam U1.RAMP_UP = 2'b01;
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defparam U1.LED_ON = 2'b10;
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defparam U1.RAMP_DOWN = 2'b11;
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defparam U1.on_max_cnt = 28'h16E35ED; // 1 sec steady
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defparam U1.Brightness = 4'b0111; // 50% Brightness
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defparam U1.BreatheRamp = 4'b0110; // 2x
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defparam U1.BlinkRate = 4'b0101; // 1 sec
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defparam U2.RGB0_CURRENT = "0b111111";
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defparam U2.RGB1_CURRENT = "0b111111";
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defparam U2.RGB2_CURRENT = "0b111111";
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LED_control1 U1 (.clk12M(b.clk),.rst(b.dip[0]),.color_sel(b.dip[3:2]),.rw(b.dip[1]),.red_pwm(red_pwm),.blu_pwm(blu_pwm),.grn_pwm(grn_pwm));
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RGB U2 (.CURREN('b1),.RGB0PWM(blu_pwm),.RGB1PWM(grn_pwm),.RGB2PWM(red_pwm),.RGBLEDEN('b1),.RGB0(i.rgbn[1]),.RGB1(i.rgbn[2]),.RGB2(rgbn[0]));
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assign i.rgb[0] = red_pwm;
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assign i.rgb[2] = grn_pwm;
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assign i.rgb[1] = blu_pwm;
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endmodule
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