sachen für task1 und task2
This commit is contained in:
@@ -172,6 +172,23 @@
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#--- Genral Purpose Timer - TIM3 / address space: 0x4000_0400 .. 0x4000_07FF
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.equ TIM3_BASE, APB1_BASE + 0x400
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sketch.c
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*
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* Created on: Mar 18, 2026
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* Author: tobii
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*/
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int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
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int main(){
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while(1){
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while(/*schalter nicht gedrückt*/){}
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delay(10);
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while(/*schalter losgelassen*/){}
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delay(150);
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int aktiv = 1;
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while(aktiv){
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for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
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.equ TIM3_CR1, TIM3_BASE + TIM_CR1_OFFSET
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.equ TIM3_CR2, TIM3_BASE + TIM_CR2_OFFSET
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+353
-319
@@ -4,49 +4,16 @@
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input file : task2.s
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output file : task2.o
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target : arm-none-eabi
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time stamp : 2026-03-24T14:14:11.000+0100
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time stamp : 2026-03-31T13:53:51.000+0200
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1 #****************************************************************************************#
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2 # Project: task2 - ASM: Interrupts
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3 # File: task2.s
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4 #
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5 # Language: ASM
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6 #
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7 # Hardware: STefi Light v1.1
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8 # Processor: STM32G431KBT6U
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9 #
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10 # Author: Manuel Lederhofer
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11 # Datum: 31.10.2014
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12 #
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13 # Version: 6.0
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14 # History:
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15 # 31.10.2014 ML create file
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16 # 27.09.2018 ML edit comments, extend vector table
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17 # 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
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18 # 27.02.2019 ML move section of exception handlers to bottom of file
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19 # 25.09.2019 ML minor changes for a better code and comment understanding
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20 # 04.09.2020 HL port from STM32L476RG to STM32F411xE
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21 # 21.09.2020 ML tidy up, comments and formatting
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22 # 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
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23 # 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
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24 # 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
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25 # 24.06.2025 TK remove /* ... place your code here ... */
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26 #
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27 # Status: working
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28 #
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29 # Description:
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30 # See the description and requirements of the requested application
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31 # in the lab exercise guide.
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32 #
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33 # Notes:
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34 # - MCU speed at startup is 16 MHz
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35 #
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36 # ToDo:
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37 # - Change the example code to match the description and requirements
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38 # of the requested application in the lab exercise guide.
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39 #****************************************************************************************#
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40
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41 .include "G431_addr.s"
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4 # Hardware: STefi Light v1.1
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5 # Processor: STM32G431KBT6U
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6 #****************************************************************************************#
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7
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8 .include "G431_addr.s"
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1 #*****************************************************************************************
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2 # Project: task2 - switch triggered LEDs
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3 # File: G431_addr.s
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@@ -811,286 +778,351 @@
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762 .equ DBGMCU_APB1FZR1, DBGMCU_BASE + 0x08
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763 .equ DBGMCU_APB1FZR2, DBGMCU_BASE + 0x0C
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764 .equ DBGMCU_APB2DZR, DBGMCU_BASE + 0x10
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42
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43
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44 #----------------------------------------------------------------------------------------#
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45 .section .vectortable,"a" // vector table at begin of ROM
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46 #----------------------------------------------------------------------------------------#
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9
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10 // Falls in G431_addr.s vorhanden, diesen Block löschen um Fehler zu vermeiden:
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11 .equ RCC_AHB2ENR, 0x4002104C
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12 .equ RCC_APB2ENR, 0x40021060
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13
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14 .equ GPIOA_MODER, 0x48000000
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15 .equ GPIOA_ODR, 0x48000014
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16
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17 .equ GPIOB_MODER, 0x48000400
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18 .equ GPIOB_PUPDR, 0x4800040C
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19 .equ GPIOB_IDR, 0x48000410
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20
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21 .equ SYSCFG_BASE, 0x40010000
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22 .equ SYSCFG_EXTICR1, (SYSCFG_BASE + 0x08)
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23 .equ SYSCFG_EXTICR2, (SYSCFG_BASE + 0x0C)
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24
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25 .equ EXTI_BASE, 0x40010400
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26 .equ EXTI_IMR1, (EXTI_BASE + 0x00)
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27 .equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
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28 .equ EXTI_PR1, (EXTI_BASE + 0x14)
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29
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30 .equ NVIC_ISER0, 0xE000E100
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31
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32 .equ DBGMCU_CR, 0xE0042004 // Adresse des Debug Configuration Registers
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33
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34 #----------------------------------------------------------------------------------------#
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35 .section .vectortable,"a"
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36 #----------------------------------------------------------------------------------------#
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37
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38 .align 2
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39
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40 0000 00400020 .word 0x20004000 // initial Stack Pointer
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41 0004 00000000 .word init // initial Program Counter
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42 0008 00000000 .word _ISR_NMI // non-masking interrupt
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43 000c 00000000 .word _ISR_HARDF // hard fault interrupt
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44
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45 0010 00000000 .space 0x48 // Padding 72 Bytes (Offset 0x10 -> 0x58)
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45 00000000
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45 00000000
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45 00000000
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45 00000000
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46 0058 00000000 .word _ISR_EXTI0 // EXTI0_IRQHandler (PB0 / S0) - IRQ 6
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47
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48 .align 2
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49
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50 0000 00400020 .word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRA
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51 0004 01040008 .word 0x08000401 // initial Program Counter
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52 0008 00000000 .word _ISR_NMI // non-masking interrupt
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53 000c 00000000 .word _ISR_HARDF // hard fault interrupt
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48 005c 00000000 .space 0x0C // Padding 12 Bytes (Offset 0x5C -> 0x68)
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48 00000000
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48 00000000
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49 0068 00000000 .word _ISR_EXTI4 // EXTI4_IRQHandler (PB4 / S1) - IRQ 10
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50
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51 #----------------------------------------------------------------------------------------#
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52 .text
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53 #----------------------------------------------------------------------------------------#
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54
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55
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56
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57 /* N.B.
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58 Look at the .space or the .org assembler directive to insert the address of the
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59 ISRs at the right place in the vector table. Verify your settings by the help of
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60 the list file. */
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61
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62 0010 00000000 .word _ISR_S0
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55 .align 2
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56 .syntax unified
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57 .thumb
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58 .thumb_func
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59 .global init
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61 init:
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62 0000 72B6 CPSID i
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63
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64
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65 #----------------------------------------------------------------------------------------#
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66 .text // section .text (default section for program code)
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67 #----------------------------------------------------------------------------------------#
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68
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69 .align 2
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70 .syntax unified
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71 .thumb
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72 .thumb_func
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73 .global init
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75 init:
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76 0000 72B6 CPSID i // disable interrupts globally
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64 0002 0020 MOVS r0, #0
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65 0004 0021 MOVS r1, #0
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66 0006 0022 MOVS r2, #0
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67 0008 0023 MOVS r3, #0
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68 000a 0024 MOVS r4, #0
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69 000c 0025 MOVS r5, #0
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70 000e 0026 MOVS r6, #0
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71 0010 0027 MOVS r7, #0
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72 0012 8046 MOV r8, r0
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73 0014 8146 MOV r9, r0
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74 0016 8246 MOV r10, r0
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75 0018 8346 MOV r11, r0
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76 001a 8446 MOV r12, r0
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77
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78 0002 0020 MOVS r0, #0 // safely initialize the GPRs
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79 0004 0021 MOVS r1, #0
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80 0006 0022 MOVS r2, #0
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81 0008 0023 MOVS r3, #0
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82 000a 0024 MOVS r4, #0
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83 000c 0025 MOVS r5, #0
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84 000e 0026 MOVS r6, #0
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85 0010 0027 MOVS r7, #0
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86 0012 8046 MOV r8, r0
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87 0014 8146 MOV r9, r0
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88 0016 8246 MOV r10, r0
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89 0018 8346 MOV r11, r0
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90 001a 8446 MOV r12, r0
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91
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92 #--- enable port clocking
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93 001c 1249 LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
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94 001e 4FF00102 MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
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95 0022 0868 LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
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96 0024 1043 ORRS r0, r0, r2 // configure clock gating for ports
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97 0026 0860 STR r0, [r1, #0] // apply settings
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98
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99 #--- port init
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100 #- LEDs
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101 0028 4FF09041 LDR r1, =GPIOA_MODER // load port A mode register address
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102 002c 0322 MOVS r2, #0x03 // prepare mask
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103 002e 0868 LDR r0, [r1, #0] // get current value of port A mode register
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104 0030 9043 BICS r0, r2 // delete bits
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105 0032 0122 MOVS r2, #0x01 // load configuration mask
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106 0034 1043 ORRS r0, r0, r2 // apply mask
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107 0036 0860 STR r0, [r1, #0] // apply result to port A mode register
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78 #--- enable port clocking (GPIOA, GPIOB)
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79 001c 2C49 LDR r1, =RCC_AHB2ENR
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80 001e 0322 MOVS r2, #0x03 // Bit 0 (GPIOA) und Bit 1 (GPIOB)
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81 0020 0868 LDR r0, [r1, #0]
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82 0022 1043 ORRS r0, r2
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83 0024 0860 STR r0, [r1, #0]
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84
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85 #--- port init
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86 #- LEDs (PA0 - PA3) als Output
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87 0026 4FF09041 LDR r1, =GPIOA_MODER
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88 002a 4FF0FF02 LDR r2, =0x000000FF
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89 002e 0868 LDR r0, [r1, #0]
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90 0030 9043 BICS r0, r2
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91 0032 4FF05502 LDR r2, =0x00000055
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92 0036 1043 ORRS r0, r2
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93 0038 0860 STR r0, [r1, #0]
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94
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95 #- switch LED off
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96 003a 2649 LDR r1, =GPIOA_ODR
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97 003c 0F22 MOVS r2, #0x0F
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98 003e 0868 LDR r0, [r1, #0]
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99 0040 1043 ORRS r0, r2
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100 0042 0860 STR r0, [r1, #0]
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101
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102 #- buttons (PB0, PB4) als Input
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103 0044 2449 LDR r1, =GPIOB_MODER
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104 0046 40F20332 LDR r2, =0x00000303 // Maske Bits 0:1 (PB0) und 8:9 (PB4)
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105 004a 0868 LDR r0, [r1, #0]
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106 004c 9043 BICS r0, r2
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107 004e 0860 STR r0, [r1, #0]
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108
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109 # LDR r1, =GPIOB_MODER
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110 # MOVS r3, #0x03
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111 # LDR r0, [r1, #1]
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112 # BICS r0, r3
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113 # MOVS r3, #0x01
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114 # ORRS r0, r0, r3
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115 # STR r0, [r1, #1]
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116
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117 #- switch LED off
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118 0038 0C49 LDR r1, =GPIOA_ODR // load port A output data register
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119 003a 0122 MOVS r2, #0x01 // load mask for LED
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120 003c 0868 LDR r0, [r1, #0] // get current value of GPIOA
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121 003e 1043 ORRS r0, r0, r2 // configure pin state
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122 0040 0860 STR r0, [r1, #0] // apply settings
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123
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124 #- buttons
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125
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126 /* ... place your code here ... */
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127
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128
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129 #--- button interrupt config
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130
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131 #- enable clock for SYSCFG module
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132
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133
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134 #- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
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135 # in SYSCFG module (SYSCFG_* registers)
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136
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137
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138
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139
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140 #- configure lines in EXTI module (EXTI_* registers)
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141
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142
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109 #- Pull-Up für PB0, PB4
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110 0050 2249 LDR r1, =GPIOB_PUPDR
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111 0052 40F20332 LDR r2, =0x00000303
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112 0056 0868 LDR r0, [r1, #0]
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113 0058 9043 BICS r0, r2
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114 005a 40F20112 LDR r2, =0x00000101 // 01 = Pull-Up für PB0 und PB4
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115 005e 1043 ORRS r0, r2
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116 0060 0860 STR r0, [r1, #0]
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117
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118 #--- button interrupt config
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119
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120 #- enable clock for SYSCFG module
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121 0062 1F49 LDR r1, =RCC_APB2ENR
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122 0064 0122 MOVS r2, #0x01
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123 0066 0868 LDR r0, [r1, #0]
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124 0068 1043 ORRS r0, r2
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125 006a 0860 STR r0, [r1, #0]
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126
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127 #- connect GPIO pins to EXTI lines
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128 006c 1D49 LDR r1, =SYSCFG_EXTICR1 // EXTI0 (PB0)
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129 006e 4FF00F02 LDR r2, =0x000F // Maske EXTI0 (Bits 3:0)
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130 0072 0868 LDR r0, [r1, #0]
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131 0074 9043 BICS r0, r2
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132 0076 0122 MOVS r2, #0x0001 // Port B (0001)
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133 0078 1043 ORRS r0, r2
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134 007a 0860 STR r0, [r1, #0]
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135
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136 007c 1A49 LDR r1, =SYSCFG_EXTICR2 // EXTI4 (PB4)
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137 007e 4FF00F02 LDR r2, =0x000F // Maske EXTI4 (Bits 3:0)
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138 0082 0868 LDR r0, [r1, #0]
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139 0084 9043 BICS r0, r2
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140 0086 0122 MOVS r2, #0x0001 // Port B (0001)
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141 0088 1043 ORRS r0, r2
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142 008a 0860 STR r0, [r1, #0]
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143
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144 #- NVIC: set interrupt priority, clear pending bits
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145 # and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
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146
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147
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148
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149 0042 62B6 CPSIE i // enable interrupts globally
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144 #- configure EXTI lines (falling edge, unmask)
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145 008c 1749 LDR r1, =EXTI_FTSR1
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146 008e 1122 MOVS r2, #0x11 // Bit 0 (EXTI0) und Bit 4 (EXTI4)
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147 0090 0868 LDR r0, [r1, #0]
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148 0092 1043 ORRS r0, r2
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149 0094 0860 STR r0, [r1, #0]
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150
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151
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152 #----------------------------------------------------------------------------------------#
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153
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||||
154 .align 2
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155 .syntax unified
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||||
156 .thumb
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157 .thumb_func
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158 .global main
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160 main:
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161 0044 0949 LDR r1, =GPIOA_ODR
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162 0046 5040 EORS r0, r0, r2
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151 0096 1649 LDR r1, =EXTI_IMR1
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152 0098 1122 MOVS r2, #0x11 // Bit 0 und Bit 4
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153 009a 0868 LDR r0, [r1, #0]
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154 009c 1043 ORRS r0, r2
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155 009e 0860 STR r0, [r1, #0]
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156
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157 #- NVIC: enable interrupts EXTI0 (IRQ 6) & EXTI4 (IRQ 10)
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158 00a0 1449 LDR r1, =NVIC_ISER0
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159 00a2 4FF48862 LDR r2, =0x00000440 // Bit 6 (EXTI0) und Bit 10 (EXTI4)
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160 00a6 0868 LDR r0, [r1, #0]
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161 00a8 1043 ORRS r0, r2
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162 00aa 0860 STR r0, [r1, #0]
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163
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164 0048 0860 STR r0, [r1, #0]
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165
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166
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167
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168 004a FFF7FEFF BL delay
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169
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164 #--- wachhalten während WFI
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165 00ac 1249 LDR r1, =DBGMCU_CR
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166 00ae 0868 LDR r0, [r1, #0]
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167 00b0 0722 MOVS r2, #0x07 // Setzt DBG_SLEEP, DBG_STOP und DBG_STANDBY Bits
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168 00b2 1043 ORRS r0, r2
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169 00b4 0860 STR r0, [r1, #0]
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170
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171 004e FFF7FEBF B main
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171 00b6 62B6 CPSIE i
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172
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173
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174 #----------------------------------------------------------------------------------------#
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175
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176 0052 00BF .align 2
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177 .syntax unified
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178 .thumb
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179 .thumb_func
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180 .global delay
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182 delay:
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183 0054 0026 MOVS r6, #0 // ...
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184 0056 064F LDR r7, =2000000 // ...
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185 .L1:
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186 0058 0136 ADDS r6, r6, #1 // ...
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187 005a BE42 CMP r6, r7 // ...
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188 005c FCD1 BNE .L1 // ...
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189 005e 7047 BX lr // ...
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||||
190
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191
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192 #----------------------------------------------------------------------------------------#
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193
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194 .align 2
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195 .global stop
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||||
196 stop:
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||||
197 0060 00BF NOP // do nothing (NOP is here to avoid a debugger crash, only)
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||||
198 0062 FFF7FEBF B stop // if this line is reached, something went wrong
|
||||
173 #----------------------------------------------------------------------------------------#
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174
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||||
175 .align 2
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176 .syntax unified
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||||
177 .thumb
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||||
178 .thumb_func
|
||||
179 .global main
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||||
181 main:
|
||||
182 00b8 30BF WFI
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||||
183 00ba FFF7FEBF B main
|
||||
184
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||||
185 #----------------------------------------------------------------------------------------#
|
||||
186
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||||
187 00be 00BF .align 2
|
||||
188 .syntax unified
|
||||
189 .thumb
|
||||
190 .thumb_func
|
||||
191 .global delay
|
||||
193 delay:
|
||||
194 00c0 0E48 LDR r0, =106000
|
||||
195 .L1:
|
||||
196 00c2 0138 SUBS r0, r0, #1
|
||||
197 00c4 FDD1 BNE .L1
|
||||
198 00c6 7047 BX lr
|
||||
199
|
||||
200
|
||||
201 #----------------------------------------------------------------------------------------#
|
||||
202 .lp1: // this label is only to nicify the line up in the .lst file
|
||||
203 0066 00004C10 .ltorg
|
||||
203 02401400
|
||||
203 00488084
|
||||
203 1E00
|
||||
204 #----------------------------------------------------------------------------------------#
|
||||
205
|
||||
206
|
||||
207 #----------------------------------------------------------------------------------------#
|
||||
208 .section .exhand,"ax" // section for exception handlers
|
||||
209 #----------------------------------------------------------------------------------------#
|
||||
210
|
||||
211 .align 2
|
||||
212 .syntax unified
|
||||
213 .thumb
|
||||
215 _ISR_NMI:
|
||||
216 #--- enable clock
|
||||
217 0000 1749 LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
218 0002 4FF00102 MOV r2, #0x01 // load mask
|
||||
219 0006 0868 LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
220 0008 1043 ORRS r0, r0, r2 // configure clock gating for port
|
||||
221 000a 0860 STR r0, [r1, #0] // apply settings
|
||||
222
|
||||
223 #--- init pins
|
||||
224 000c 4FF09041 LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
225 0010 FF22 MOVS r2, #0xFF // prepare mask
|
||||
226 0012 0868 LDR r0, [r1, #0] // get current value of port A mode register
|
||||
227 0014 9043 BICS r0, r0, r2 // delete bits
|
||||
228 0016 4422 MOVS r2, #0x44 // load configuration mask
|
||||
229 0018 1043 ORRS r0, r0, r2 // configure pins
|
||||
230 001a 0860 STR r0, [r1, #0] // apply settings to port A mode register
|
||||
231
|
||||
232 #--- switch some LEDs on
|
||||
233 001c 1149 LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
234 001e 0A22 MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
235 0020 0868 LDR r0, [r1, #0]
|
||||
236 0022 9043 BICS r0, r0, r2
|
||||
237 0024 0860 STR r0, [r1, #0] // switch LEDs on
|
||||
238
|
||||
239 0026 EBE7 B _ISR_NMI
|
||||
240
|
||||
200 #----------------------------------------------------------------------------------------#
|
||||
201
|
||||
202 .align 2
|
||||
203 .global stop
|
||||
204 stop:
|
||||
205 00c8 00BF NOP
|
||||
206 00ca FFF7FEBF B stop
|
||||
207
|
||||
208 #----------------------------------------------------------------------------------------#
|
||||
209 .lp1:
|
||||
210 00ce 00004C10 .ltorg
|
||||
210 02401400
|
||||
210 00480004
|
||||
210 00480C04
|
||||
210 00486010
|
||||
211 #----------------------------------------------------------------------------------------#
|
||||
212
|
||||
213 #----------------------------------------------------------------------------------------#
|
||||
214 .section .exhand,"ax"
|
||||
215 #----------------------------------------------------------------------------------------#
|
||||
216
|
||||
217 .align 2
|
||||
218 .syntax unified
|
||||
219 .thumb
|
||||
221 _ISR_NMI:
|
||||
222 0000 2549 LDR r1, =RCC_AHB2ENR
|
||||
223 0002 4FF00102 MOV r2, #0x01
|
||||
224 0006 0868 LDR r0, [r1, #0]
|
||||
225 0008 1043 ORRS r0, r2
|
||||
226 000a 0860 STR r0, [r1, #0]
|
||||
227
|
||||
228 000c 4FF09041 LDR r1, =GPIOA_MODER
|
||||
229 0010 FF22 MOVS r2, #0xFF
|
||||
230 0012 0868 LDR r0, [r1, #0]
|
||||
231 0014 9043 BICS r0, r2
|
||||
232 0016 4422 MOVS r2, #0x44
|
||||
233 0018 1043 ORRS r0, r2
|
||||
234 001a 0860 STR r0, [r1, #0]
|
||||
235
|
||||
236 001c 1F49 LDR r1, =GPIOA_ODR
|
||||
237 001e 0A22 MOVS r2, #0x0A
|
||||
238 0020 0868 LDR r0, [r1, #0]
|
||||
239 0022 9043 BICS r0, r2
|
||||
240 0024 0860 STR r0, [r1, #0]
|
||||
241
|
||||
242 #----------------------------------------------------------------------------------------#
|
||||
242 0026 EBE7 B _ISR_NMI
|
||||
243
|
||||
244 .align 2
|
||||
245 .syntax unified
|
||||
246 .thumb
|
||||
248 _ISR_HARDF:
|
||||
249 #--- enable clock
|
||||
250 0028 0D49 LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
251 002a 4FF00102 MOV r2, #0x01 // load mask
|
||||
252 002e 0868 LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
253 0030 1043 ORRS r0, r0, r2 // configure clock gating for port
|
||||
254 0032 0860 STR r0, [r1, #0] // apply settings
|
||||
255
|
||||
256 #--- init pins
|
||||
257 0034 4FF09041 LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
258 0038 FF22 MOVS r2, #0xFF // prepare mask
|
||||
259 003a 0868 LDR r0, [r1, #0] // get current value of port A mode register
|
||||
260 003c 9043 BICS r0, r0, r2 // delete bits
|
||||
261 003e 1122 MOVS r2, #0x11 // load configuration mask
|
||||
262 0040 1043 ORRS r0, r0, r2 // configure pins
|
||||
263 0042 0860 STR r0, [r1, #0] // apply settings to port A mode register
|
||||
244 #----------------------------------------------------------------------------------------#
|
||||
245
|
||||
246 .align 2
|
||||
247 .syntax unified
|
||||
248 .thumb
|
||||
250 _ISR_HARDF:
|
||||
251 0028 1B49 LDR r1, =RCC_AHB2ENR
|
||||
252 002a 4FF00102 MOV r2, #0x01
|
||||
253 002e 0868 LDR r0, [r1, #0]
|
||||
254 0030 1043 ORRS r0, r2
|
||||
255 0032 0860 STR r0, [r1, #0]
|
||||
256
|
||||
257 0034 4FF09041 LDR r1, =GPIOA_MODER
|
||||
258 0038 FF22 MOVS r2, #0xFF
|
||||
259 003a 0868 LDR r0, [r1, #0]
|
||||
260 003c 9043 BICS r0, r2
|
||||
261 003e 1122 MOVS r2, #0x11
|
||||
262 0040 1043 ORRS r0, r2
|
||||
263 0042 0860 STR r0, [r1, #0]
|
||||
264
|
||||
265 #--- switch some LEDs on
|
||||
266 0044 0749 LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
267 0046 0522 MOVS r2, #0x05 // load mask for red and green LED
|
||||
268 0048 0868 LDR r0, [r1, #0]
|
||||
269 004a 9043 BICS r0, r0, r2
|
||||
270 004c 0860 STR r0, [r1, #0] // switch LEDs on
|
||||
271
|
||||
272 004e EBE7 B _ISR_HARDF
|
||||
273
|
||||
265 0044 1549 LDR r1, =GPIOA_ODR
|
||||
266 0046 0522 MOVS r2, #0x05
|
||||
267 0048 0868 LDR r0, [r1, #0]
|
||||
268 004a 9043 BICS r0, r2
|
||||
269 004c 0860 STR r0, [r1, #0]
|
||||
270
|
||||
271 004e EBE7 B _ISR_HARDF
|
||||
272
|
||||
273 #----------------------------------------------------------------------------------------#
|
||||
274
|
||||
275 #----------------------------------------------------------------------------------------#
|
||||
276
|
||||
277 .align 2
|
||||
278 .syntax unified
|
||||
279 .thumb
|
||||
281 _ISR_S0:
|
||||
282 0050 00B5 PUSH {lr} // save special content
|
||||
283
|
||||
284 #--- do the work
|
||||
285
|
||||
286
|
||||
287 #--- clear interrupt flag
|
||||
288
|
||||
289
|
||||
290 #--- leave ISR
|
||||
291 0052 02BC POP {r1} // get special content back
|
||||
292 0054 0847 BX r1 // go back to where we came from
|
||||
293
|
||||
294
|
||||
295 #----------------------------------------------------------------------------------------#
|
||||
296
|
||||
297 0056 00BF .align 2
|
||||
298 .syntax unified
|
||||
299 .thumb
|
||||
301 _ISR_S1:
|
||||
302 0058 00B5 PUSH {lr} // save special content
|
||||
303
|
||||
304 #--- do the work
|
||||
305
|
||||
275 .align 2
|
||||
276 .syntax unified
|
||||
277 .thumb
|
||||
279 _ISR_EXTI0:
|
||||
280 0050 00B5 PUSH {lr}
|
||||
281
|
||||
282 #--- Entprellen
|
||||
283 0052 FFF7FEFF BL delay
|
||||
284
|
||||
285 #--- Überprüfen, ob Taster noch gedrückt ist (PB0)
|
||||
286 0056 1248 LDR r0, =GPIOB_IDR
|
||||
287 0058 0168 LDR r1, [r0, #0]
|
||||
288 005a 0122 MOVS r2, #0x01
|
||||
289 005c 1142 TST r1, r2
|
||||
290 005e 04D1 BNE _clear_exti0
|
||||
291
|
||||
292 #--- LED0 & LED3 toggeln (1001 = 0x09)
|
||||
293 0060 0E48 LDR r0, =GPIOA_ODR
|
||||
294 0062 0168 LDR r1, [r0, #0]
|
||||
295 0064 0922 MOVS r2, #0x09
|
||||
296 0066 5140 EORS r1, r2
|
||||
297 0068 0160 STR r1, [r0, #0]
|
||||
298
|
||||
299 _clear_exti0:
|
||||
300 #--- Interrupt Flag löschen
|
||||
301 006a 0E48 LDR r0, =EXTI_PR1
|
||||
302 006c 0121 MOVS r1, #0x01
|
||||
303 006e 0160 STR r1, [r0, #0]
|
||||
304
|
||||
305 0070 00BD POP {pc}
|
||||
306
|
||||
307
|
||||
307 #----------------------------------------------------------------------------------------#
|
||||
308
|
||||
309 #--- clear interrupt flag
|
||||
310
|
||||
311
|
||||
312
|
||||
313 #--- leave ISR
|
||||
314 005a 02BC POP {r1} // get special content back
|
||||
315 005c 0847 BX r1 // go back to where we came from
|
||||
316
|
||||
317
|
||||
318 #----------------------------------------------------------------------------------------#
|
||||
319 .lp2: // this label is only to nicify the line up in the .lst file
|
||||
320 005e 00004C10 .ltorg
|
||||
320 02401400
|
||||
320 0048
|
||||
321 #----------------------------------------------------------------------------------------#
|
||||
322
|
||||
323 .end
|
||||
309 0072 00BF .align 2
|
||||
310 .syntax unified
|
||||
311 .thumb
|
||||
313 _ISR_EXTI4:
|
||||
314 0074 00B5 PUSH {lr}
|
||||
315
|
||||
316 #--- Entprellen
|
||||
317 0076 FFF7FEFF BL delay
|
||||
318
|
||||
319 #--- Überprüfen, ob Taster noch gedrückt ist (PB4)
|
||||
320 007a 0948 LDR r0, =GPIOB_IDR
|
||||
321 007c 0168 LDR r1, [r0, #0]
|
||||
322 007e 1022 MOVS r2, #0x10
|
||||
323 0080 1142 TST r1, r2
|
||||
324 0082 04D1 BNE _clear_exti4
|
||||
325
|
||||
326 #--- LED1 & LED2 toggeln (0110 = 0x06)
|
||||
327 0084 0548 LDR r0, =GPIOA_ODR
|
||||
328 0086 0168 LDR r1, [r0, #0]
|
||||
329 0088 0622 MOVS r2, #0x06
|
||||
330 008a 5140 EORS r1, r2
|
||||
331 008c 0160 STR r1, [r0, #0]
|
||||
332
|
||||
333 _clear_exti4:
|
||||
334 #--- Interrupt Flag löschen
|
||||
335 008e 0548 LDR r0, =EXTI_PR1
|
||||
336 0090 1021 MOVS r1, #0x10
|
||||
337 0092 0160 STR r1, [r0, #0]
|
||||
338
|
||||
339 0094 00BD POP {pc}
|
||||
340
|
||||
341 #----------------------------------------------------------------------------------------#
|
||||
342 .lp2:
|
||||
343 0096 00004C10 .ltorg
|
||||
343 02401400
|
||||
343 00481004
|
||||
343 00481404
|
||||
343 0140
|
||||
344 #----------------------------------------------------------------------------------------#
|
||||
345
|
||||
346 .end
|
||||
DEFINED SYMBOLS
|
||||
G431_addr.s:39 *ABS*:40000000 APB1_BASE
|
||||
G431_addr.s:40 *ABS*:40010000 APB2_BASE
|
||||
@@ -1599,22 +1631,24 @@ DEFINED SYMBOLS
|
||||
G431_addr.s:762 *ABS*:e0042008 DBGMCU_APB1FZR1
|
||||
G431_addr.s:763 *ABS*:e004200c DBGMCU_APB1FZR2
|
||||
G431_addr.s:764 *ABS*:e0042010 DBGMCU_APB2DZR
|
||||
task2.s:48 .vectortable:00000000 $d
|
||||
task2.s:215 .exhand:00000000 _ISR_NMI
|
||||
task2.s:248 .exhand:00000028 _ISR_HARDF
|
||||
task2.s:281 .exhand:00000050 _ISR_S0
|
||||
task2.s:69 .text:00000000 $t
|
||||
task2.s:75 .text:00000000 init
|
||||
task2.s:160 .text:00000044 main
|
||||
task2.s:182 .text:00000054 delay
|
||||
task2.s:196 .text:00000060 stop
|
||||
task2.s:202 .text:00000066 .lp1
|
||||
task2.s:203 .text:00000066 $d
|
||||
task2.s:203 .text:00000068 $d
|
||||
task2.s:211 .exhand:00000000 $t
|
||||
task2.s:301 .exhand:00000058 _ISR_S1
|
||||
task2.s:319 .exhand:0000005e .lp2
|
||||
task2.s:320 .exhand:0000005e $d
|
||||
task2.s:320 .exhand:00000060 $d
|
||||
task2.s:38 .vectortable:00000000 $d
|
||||
task2.s:61 .text:00000000 init
|
||||
task2.s:221 .exhand:00000000 _ISR_NMI
|
||||
task2.s:250 .exhand:00000028 _ISR_HARDF
|
||||
task2.s:279 .exhand:00000050 _ISR_EXTI0
|
||||
task2.s:313 .exhand:00000074 _ISR_EXTI4
|
||||
task2.s:55 .text:00000000 $t
|
||||
task2.s:181 .text:000000b8 main
|
||||
task2.s:193 .text:000000c0 delay
|
||||
task2.s:204 .text:000000c8 stop
|
||||
task2.s:209 .text:000000ce .lp1
|
||||
task2.s:210 .text:000000ce $d
|
||||
task2.s:210 .text:000000d0 $d
|
||||
task2.s:217 .exhand:00000000 $t
|
||||
task2.s:299 .exhand:0000006a _clear_exti0
|
||||
task2.s:333 .exhand:0000008e _clear_exti4
|
||||
task2.s:342 .exhand:00000096 .lp2
|
||||
task2.s:343 .exhand:00000096 $d
|
||||
task2.s:343 .exhand:00000098 $d
|
||||
|
||||
NO UNDEFINED SYMBOLS
|
||||
|
||||
Binary file not shown.
+157
-65
@@ -3,11 +3,11 @@ task2.elf: file format elf32-littlearm
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .vectortable 00000014 08000000 08000000 00001000 2**2
|
||||
0 .vectortable 0000006c 08000000 08000000 00001000 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
1 .text 00000074 08000400 08000400 00001400 2**2
|
||||
1 .text 00000100 08000400 08000400 00001400 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
2 .exhand 00000068 08001000 08001000 00002000 2**2
|
||||
2 .exhand 000000a8 08001000 08001000 00002000 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
SYMBOL TABLE:
|
||||
08000000 l d .vectortable 00000000 .vectortable
|
||||
@@ -15,14 +15,16 @@ SYMBOL TABLE:
|
||||
08001000 l d .exhand 00000000 .exhand
|
||||
08001000 l F .exhand 00000000 _ISR_NMI
|
||||
08001028 l F .exhand 00000000 _ISR_HARDF
|
||||
08001050 l F .exhand 00000000 _ISR_S0
|
||||
08000466 l .text 00000000 .lp1
|
||||
08001058 l F .exhand 00000000 _ISR_S1
|
||||
0800105e l .exhand 00000000 .lp2
|
||||
08001050 l F .exhand 00000000 _ISR_EXTI0
|
||||
08001074 l F .exhand 00000000 _ISR_EXTI4
|
||||
080004ce l .text 00000000 .lp1
|
||||
0800106a l .exhand 00000000 _clear_exti0
|
||||
0800108e l .exhand 00000000 _clear_exti4
|
||||
08001096 l .exhand 00000000 .lp2
|
||||
08000400 g F .text 00000000 init
|
||||
08000444 g F .text 00000000 main
|
||||
08000454 g F .text 00000000 delay
|
||||
08000460 g .text 00000000 stop
|
||||
080004b8 g F .text 00000000 main
|
||||
080004c0 g F .text 00000000 delay
|
||||
080004c8 g .text 00000000 stop
|
||||
|
||||
|
||||
|
||||
@@ -33,7 +35,10 @@ Disassembly of section .vectortable:
|
||||
8000004: 08000401 .word 0x08000401
|
||||
8000008: 08001001 .word 0x08001001
|
||||
800000c: 08001029 .word 0x08001029
|
||||
8000010: 08001051 .word 0x08001051
|
||||
...
|
||||
8000058: 08001051 .word 0x08001051
|
||||
...
|
||||
8000068: 08001075 .word 0x08001075
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
@@ -52,55 +57,110 @@ Disassembly of section .text:
|
||||
8000416: 4682 mov sl, r0
|
||||
8000418: 4683 mov fp, r0
|
||||
800041a: 4684 mov ip, r0
|
||||
800041c: 4912 ldr r1, [pc, #72] @ (8000468 <.lp1+0x2>)
|
||||
800041e: f04f 0201 mov.w r2, #1
|
||||
8000422: 6808 ldr r0, [r1, #0]
|
||||
8000424: 4310 orrs r0, r2
|
||||
8000426: 6008 str r0, [r1, #0]
|
||||
8000428: f04f 4190 mov.w r1, #1207959552 @ 0x48000000
|
||||
800042c: 2203 movs r2, #3
|
||||
800041c: 492c ldr r1, [pc, #176] @ (80004d0 <.lp1+0x2>)
|
||||
800041e: 2203 movs r2, #3
|
||||
8000420: 6808 ldr r0, [r1, #0]
|
||||
8000422: 4310 orrs r0, r2
|
||||
8000424: 6008 str r0, [r1, #0]
|
||||
8000426: f04f 4190 mov.w r1, #1207959552 @ 0x48000000
|
||||
800042a: f04f 02ff mov.w r2, #255 @ 0xff
|
||||
800042e: 6808 ldr r0, [r1, #0]
|
||||
8000430: 4390 bics r0, r2
|
||||
8000432: 2201 movs r2, #1
|
||||
8000434: 4310 orrs r0, r2
|
||||
8000436: 6008 str r0, [r1, #0]
|
||||
8000438: 490c ldr r1, [pc, #48] @ (800046c <.lp1+0x6>)
|
||||
800043a: 2201 movs r2, #1
|
||||
800043c: 6808 ldr r0, [r1, #0]
|
||||
800043e: 4310 orrs r0, r2
|
||||
8000440: 6008 str r0, [r1, #0]
|
||||
8000442: b662 cpsie i
|
||||
8000432: f04f 0255 mov.w r2, #85 @ 0x55
|
||||
8000436: 4310 orrs r0, r2
|
||||
8000438: 6008 str r0, [r1, #0]
|
||||
800043a: 4926 ldr r1, [pc, #152] @ (80004d4 <.lp1+0x6>)
|
||||
800043c: 220f movs r2, #15
|
||||
800043e: 6808 ldr r0, [r1, #0]
|
||||
8000440: 4310 orrs r0, r2
|
||||
8000442: 6008 str r0, [r1, #0]
|
||||
8000444: 4924 ldr r1, [pc, #144] @ (80004d8 <.lp1+0xa>)
|
||||
8000446: f240 3203 movw r2, #771 @ 0x303
|
||||
800044a: 6808 ldr r0, [r1, #0]
|
||||
800044c: 4390 bics r0, r2
|
||||
800044e: 6008 str r0, [r1, #0]
|
||||
8000450: 4922 ldr r1, [pc, #136] @ (80004dc <.lp1+0xe>)
|
||||
8000452: f240 3203 movw r2, #771 @ 0x303
|
||||
8000456: 6808 ldr r0, [r1, #0]
|
||||
8000458: 4390 bics r0, r2
|
||||
800045a: f240 1201 movw r2, #257 @ 0x101
|
||||
800045e: 4310 orrs r0, r2
|
||||
8000460: 6008 str r0, [r1, #0]
|
||||
8000462: 491f ldr r1, [pc, #124] @ (80004e0 <.lp1+0x12>)
|
||||
8000464: 2201 movs r2, #1
|
||||
8000466: 6808 ldr r0, [r1, #0]
|
||||
8000468: 4310 orrs r0, r2
|
||||
800046a: 6008 str r0, [r1, #0]
|
||||
800046c: 491d ldr r1, [pc, #116] @ (80004e4 <.lp1+0x16>)
|
||||
800046e: f04f 020f mov.w r2, #15
|
||||
8000472: 6808 ldr r0, [r1, #0]
|
||||
8000474: 4390 bics r0, r2
|
||||
8000476: 2201 movs r2, #1
|
||||
8000478: 4310 orrs r0, r2
|
||||
800047a: 6008 str r0, [r1, #0]
|
||||
800047c: 491a ldr r1, [pc, #104] @ (80004e8 <.lp1+0x1a>)
|
||||
800047e: f04f 020f mov.w r2, #15
|
||||
8000482: 6808 ldr r0, [r1, #0]
|
||||
8000484: 4390 bics r0, r2
|
||||
8000486: 2201 movs r2, #1
|
||||
8000488: 4310 orrs r0, r2
|
||||
800048a: 6008 str r0, [r1, #0]
|
||||
800048c: 4917 ldr r1, [pc, #92] @ (80004ec <.lp1+0x1e>)
|
||||
800048e: 2211 movs r2, #17
|
||||
8000490: 6808 ldr r0, [r1, #0]
|
||||
8000492: 4310 orrs r0, r2
|
||||
8000494: 6008 str r0, [r1, #0]
|
||||
8000496: 4916 ldr r1, [pc, #88] @ (80004f0 <.lp1+0x22>)
|
||||
8000498: 2211 movs r2, #17
|
||||
800049a: 6808 ldr r0, [r1, #0]
|
||||
800049c: 4310 orrs r0, r2
|
||||
800049e: 6008 str r0, [r1, #0]
|
||||
80004a0: 4914 ldr r1, [pc, #80] @ (80004f4 <.lp1+0x26>)
|
||||
80004a2: f44f 6288 mov.w r2, #1088 @ 0x440
|
||||
80004a6: 6808 ldr r0, [r1, #0]
|
||||
80004a8: 4310 orrs r0, r2
|
||||
80004aa: 6008 str r0, [r1, #0]
|
||||
80004ac: 4912 ldr r1, [pc, #72] @ (80004f8 <.lp1+0x2a>)
|
||||
80004ae: 6808 ldr r0, [r1, #0]
|
||||
80004b0: 2207 movs r2, #7
|
||||
80004b2: 4310 orrs r0, r2
|
||||
80004b4: 6008 str r0, [r1, #0]
|
||||
80004b6: b662 cpsie i
|
||||
|
||||
08000444 <main>:
|
||||
8000444: 4909 ldr r1, [pc, #36] @ (800046c <.lp1+0x6>)
|
||||
8000446: 4050 eors r0, r2
|
||||
8000448: 6008 str r0, [r1, #0]
|
||||
800044a: f000 f803 bl 8000454 <delay>
|
||||
800044e: f7ff bff9 b.w 8000444 <main>
|
||||
8000452: bf00 nop
|
||||
080004b8 <main>:
|
||||
80004b8: bf30 wfi
|
||||
80004ba: f7ff bffd b.w 80004b8 <main>
|
||||
80004be: bf00 nop
|
||||
|
||||
08000454 <delay>:
|
||||
8000454: 2600 movs r6, #0
|
||||
8000456: 4f06 ldr r7, [pc, #24] @ (8000470 <.lp1+0xa>)
|
||||
8000458: 3601 adds r6, #1
|
||||
800045a: 42be cmp r6, r7
|
||||
800045c: d1fc bne.n 8000458 <delay+0x4>
|
||||
800045e: 4770 bx lr
|
||||
080004c0 <delay>:
|
||||
80004c0: 480e ldr r0, [pc, #56] @ (80004fc <.lp1+0x2e>)
|
||||
80004c2: 3801 subs r0, #1
|
||||
80004c4: d1fd bne.n 80004c2 <delay+0x2>
|
||||
80004c6: 4770 bx lr
|
||||
|
||||
08000460 <stop>:
|
||||
8000460: bf00 nop
|
||||
8000462: f7ff bffd b.w 8000460 <stop>
|
||||
080004c8 <stop>:
|
||||
80004c8: bf00 nop
|
||||
80004ca: f7ff bffd b.w 80004c8 <stop>
|
||||
|
||||
08000466 <.lp1>:
|
||||
8000466: 0000 .short 0x0000
|
||||
8000468: 4002104c .word 0x4002104c
|
||||
800046c: 48000014 .word 0x48000014
|
||||
8000470: 001e8480 .word 0x001e8480
|
||||
080004ce <.lp1>:
|
||||
80004ce: 0000 .short 0x0000
|
||||
80004d0: 4002104c .word 0x4002104c
|
||||
80004d4: 48000014 .word 0x48000014
|
||||
80004d8: 48000400 .word 0x48000400
|
||||
80004dc: 4800040c .word 0x4800040c
|
||||
80004e0: 40021060 .word 0x40021060
|
||||
80004e4: 40010008 .word 0x40010008
|
||||
80004e8: 4001000c .word 0x4001000c
|
||||
80004ec: 4001040c .word 0x4001040c
|
||||
80004f0: 40010400 .word 0x40010400
|
||||
80004f4: e000e100 .word 0xe000e100
|
||||
80004f8: e0042004 .word 0xe0042004
|
||||
80004fc: 00019e10 .word 0x00019e10
|
||||
|
||||
Disassembly of section .exhand:
|
||||
|
||||
08001000 <_ISR_NMI>:
|
||||
8001000: 4917 ldr r1, [pc, #92] @ (8001060 <.lp2+0x2>)
|
||||
8001000: 4925 ldr r1, [pc, #148] @ (8001098 <.lp2+0x2>)
|
||||
8001002: f04f 0201 mov.w r2, #1
|
||||
8001006: 6808 ldr r0, [r1, #0]
|
||||
8001008: 4310 orrs r0, r2
|
||||
@@ -112,7 +172,7 @@ Disassembly of section .exhand:
|
||||
8001016: 2244 movs r2, #68 @ 0x44
|
||||
8001018: 4310 orrs r0, r2
|
||||
800101a: 6008 str r0, [r1, #0]
|
||||
800101c: 4911 ldr r1, [pc, #68] @ (8001064 <.lp2+0x6>)
|
||||
800101c: 491f ldr r1, [pc, #124] @ (800109c <.lp2+0x6>)
|
||||
800101e: 220a movs r2, #10
|
||||
8001020: 6808 ldr r0, [r1, #0]
|
||||
8001022: 4390 bics r0, r2
|
||||
@@ -120,7 +180,7 @@ Disassembly of section .exhand:
|
||||
8001026: e7eb b.n 8001000 <_ISR_NMI>
|
||||
|
||||
08001028 <_ISR_HARDF>:
|
||||
8001028: 490d ldr r1, [pc, #52] @ (8001060 <.lp2+0x2>)
|
||||
8001028: 491b ldr r1, [pc, #108] @ (8001098 <.lp2+0x2>)
|
||||
800102a: f04f 0201 mov.w r2, #1
|
||||
800102e: 6808 ldr r0, [r1, #0]
|
||||
8001030: 4310 orrs r0, r2
|
||||
@@ -132,25 +192,57 @@ Disassembly of section .exhand:
|
||||
800103e: 2211 movs r2, #17
|
||||
8001040: 4310 orrs r0, r2
|
||||
8001042: 6008 str r0, [r1, #0]
|
||||
8001044: 4907 ldr r1, [pc, #28] @ (8001064 <.lp2+0x6>)
|
||||
8001044: 4915 ldr r1, [pc, #84] @ (800109c <.lp2+0x6>)
|
||||
8001046: 2205 movs r2, #5
|
||||
8001048: 6808 ldr r0, [r1, #0]
|
||||
800104a: 4390 bics r0, r2
|
||||
800104c: 6008 str r0, [r1, #0]
|
||||
800104e: e7eb b.n 8001028 <_ISR_HARDF>
|
||||
|
||||
08001050 <_ISR_S0>:
|
||||
08001050 <_ISR_EXTI0>:
|
||||
8001050: b500 push {lr}
|
||||
8001052: bc02 pop {r1}
|
||||
8001054: 4708 bx r1
|
||||
8001056: bf00 nop
|
||||
8001052: f7ff fa35 bl 80004c0 <delay>
|
||||
8001056: 4812 ldr r0, [pc, #72] @ (80010a0 <.lp2+0xa>)
|
||||
8001058: 6801 ldr r1, [r0, #0]
|
||||
800105a: 2201 movs r2, #1
|
||||
800105c: 4211 tst r1, r2
|
||||
800105e: d104 bne.n 800106a <_clear_exti0>
|
||||
8001060: 480e ldr r0, [pc, #56] @ (800109c <.lp2+0x6>)
|
||||
8001062: 6801 ldr r1, [r0, #0]
|
||||
8001064: 2209 movs r2, #9
|
||||
8001066: 4051 eors r1, r2
|
||||
8001068: 6001 str r1, [r0, #0]
|
||||
|
||||
08001058 <_ISR_S1>:
|
||||
8001058: b500 push {lr}
|
||||
800105a: bc02 pop {r1}
|
||||
800105c: 4708 bx r1
|
||||
0800106a <_clear_exti0>:
|
||||
800106a: 480e ldr r0, [pc, #56] @ (80010a4 <.lp2+0xe>)
|
||||
800106c: 2101 movs r1, #1
|
||||
800106e: 6001 str r1, [r0, #0]
|
||||
8001070: bd00 pop {pc}
|
||||
8001072: bf00 nop
|
||||
|
||||
0800105e <.lp2>:
|
||||
800105e: 0000 .short 0x0000
|
||||
8001060: 4002104c .word 0x4002104c
|
||||
8001064: 48000014 .word 0x48000014
|
||||
08001074 <_ISR_EXTI4>:
|
||||
8001074: b500 push {lr}
|
||||
8001076: f7ff fa23 bl 80004c0 <delay>
|
||||
800107a: 4809 ldr r0, [pc, #36] @ (80010a0 <.lp2+0xa>)
|
||||
800107c: 6801 ldr r1, [r0, #0]
|
||||
800107e: 2210 movs r2, #16
|
||||
8001080: 4211 tst r1, r2
|
||||
8001082: d104 bne.n 800108e <_clear_exti4>
|
||||
8001084: 4805 ldr r0, [pc, #20] @ (800109c <.lp2+0x6>)
|
||||
8001086: 6801 ldr r1, [r0, #0]
|
||||
8001088: 2206 movs r2, #6
|
||||
800108a: 4051 eors r1, r2
|
||||
800108c: 6001 str r1, [r0, #0]
|
||||
|
||||
0800108e <_clear_exti4>:
|
||||
800108e: 4805 ldr r0, [pc, #20] @ (80010a4 <.lp2+0xe>)
|
||||
8001090: 2110 movs r1, #16
|
||||
8001092: 6001 str r1, [r0, #0]
|
||||
8001094: bd00 pop {pc}
|
||||
|
||||
08001096 <.lp2>:
|
||||
8001096: 0000 .short 0x0000
|
||||
8001098: 4002104c .word 0x4002104c
|
||||
800109c: 48000014 .word 0x48000014
|
||||
80010a0: 48000410 .word 0x48000410
|
||||
80010a4: 40010414 .word 0x40010414
|
||||
|
||||
+30
-30
@@ -11,61 +11,61 @@ RAM 0x20000000 0x00001800 rw
|
||||
Linker script and memory map
|
||||
|
||||
|
||||
.vectortable 0x08000000 0x14
|
||||
.vectortable 0x08000000 0x6c
|
||||
0x08000000 . = ALIGN (0x4)
|
||||
*(.vectortable)
|
||||
.vectortable 0x08000000 0x14 task2.o
|
||||
0x08000014 . = ALIGN (0x4)
|
||||
.vectortable 0x08000000 0x6c task2.o
|
||||
0x0800006c . = ALIGN (0x4)
|
||||
|
||||
.text 0x08000400 0x74
|
||||
.text 0x08000400 0x100
|
||||
*(.text)
|
||||
.text 0x08000400 0x74 task2.o
|
||||
.text 0x08000400 0x100 task2.o
|
||||
0x08000400 init
|
||||
0x08000444 main
|
||||
0x08000454 delay
|
||||
0x08000460 stop
|
||||
0x080004b8 main
|
||||
0x080004c0 delay
|
||||
0x080004c8 stop
|
||||
|
||||
.glue_7 0x08000474 0x0
|
||||
.glue_7 0x08000474 0x0 linker stubs
|
||||
.glue_7 0x08000500 0x0
|
||||
.glue_7 0x08000500 0x0 linker stubs
|
||||
|
||||
.glue_7t 0x08000474 0x0
|
||||
.glue_7t 0x08000474 0x0 linker stubs
|
||||
.glue_7t 0x08000500 0x0
|
||||
.glue_7t 0x08000500 0x0 linker stubs
|
||||
|
||||
.vfp11_veneer 0x08000474 0x0
|
||||
.vfp11_veneer 0x08000474 0x0 linker stubs
|
||||
.vfp11_veneer 0x08000500 0x0
|
||||
.vfp11_veneer 0x08000500 0x0 linker stubs
|
||||
|
||||
.v4_bx 0x08000474 0x0
|
||||
.v4_bx 0x08000474 0x0 linker stubs
|
||||
.v4_bx 0x08000500 0x0
|
||||
.v4_bx 0x08000500 0x0 linker stubs
|
||||
|
||||
.iplt 0x08000474 0x0
|
||||
.iplt 0x08000474 0x0 task2.o
|
||||
.iplt 0x08000500 0x0
|
||||
.iplt 0x08000500 0x0 task2.o
|
||||
|
||||
.exhand 0x08001000 0x68
|
||||
.exhand 0x08001000 0xa8
|
||||
*(.exhand)
|
||||
.exhand 0x08001000 0x68 task2.o
|
||||
.exhand 0x08001000 0xa8 task2.o
|
||||
LOAD task2.o
|
||||
OUTPUT(task2.elf elf32-littlearm)
|
||||
LOAD linker stubs
|
||||
|
||||
.rel.dyn 0x08001068 0x0
|
||||
.rel.iplt 0x08001068 0x0 task2.o
|
||||
.rel.dyn 0x080010a8 0x0
|
||||
.rel.iplt 0x080010a8 0x0 task2.o
|
||||
|
||||
.data 0x08001068 0x0
|
||||
.data 0x08001068 0x0 task2.o
|
||||
.data 0x080010a8 0x0
|
||||
.data 0x080010a8 0x0 task2.o
|
||||
|
||||
.igot.plt 0x08001068 0x0
|
||||
.igot.plt 0x08001068 0x0 task2.o
|
||||
.igot.plt 0x080010a8 0x0
|
||||
.igot.plt 0x080010a8 0x0 task2.o
|
||||
|
||||
.bss 0x08001068 0x0
|
||||
.bss 0x08001068 0x0 task2.o
|
||||
.bss 0x080010a8 0x0
|
||||
.bss 0x080010a8 0x0 task2.o
|
||||
|
||||
.ARM.attributes
|
||||
0x00000000 0x21
|
||||
.ARM.attributes
|
||||
0x00000000 0x21 task2.o
|
||||
|
||||
.debug_line 0x00000000 0xc1
|
||||
.debug_line 0x00000000 0xc1 task2.o
|
||||
.debug_line 0x00000000 0x112
|
||||
.debug_line 0x00000000 0x112 task2.o
|
||||
|
||||
.debug_info 0x00000000 0x22
|
||||
.debug_info 0x00000000 0x22 task2.o
|
||||
|
||||
Binary file not shown.
+112
-93
@@ -7,43 +7,49 @@
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
// Zusätzliche und benötigte Adressen
|
||||
// Falls in G431_addr.s vorhanden, diesen Block löschen um Fehler zu vermeiden:
|
||||
.equ RCC_AHB2ENR, 0x4002104C
|
||||
.equ RCC_APB2ENR, 0x40021060
|
||||
|
||||
.equ GPIOA_MODER, 0x48000000
|
||||
.equ GPIOA_ODR, 0x48000014
|
||||
|
||||
.equ GPIOC_MODER, 0x48000800
|
||||
.equ GPIOC_PUPDR, 0x4800080C
|
||||
.equ GPIOC_IDR, 0x48000810
|
||||
.equ GPIOB_MODER, 0x48000400
|
||||
.equ GPIOB_PUPDR, 0x4800040C
|
||||
.equ GPIOB_IDR, 0x48000410
|
||||
|
||||
.equ SYSCFG_BASE, 0x40010000
|
||||
.equ SYSCFG_EXTICR4, (SYSCFG_BASE + 0x14)
|
||||
.equ SYSCFG_EXTICR1, (SYSCFG_BASE + 0x08)
|
||||
.equ SYSCFG_EXTICR2, (SYSCFG_BASE + 0x0C)
|
||||
|
||||
.equ EXTI_BASE, 0x40010400
|
||||
.equ EXTI_IMR1, (EXTI_BASE + 0x00)
|
||||
.equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
|
||||
.equ EXTI_PR1, (EXTI_BASE + 0x14)
|
||||
|
||||
.equ NVIC_ISER1, 0xE000E104
|
||||
.equ NVIC_ISER0, 0xE000E100
|
||||
|
||||
.equ DBGMCU_CR, 0xE0042004 // Adresse des Debug Configuration Registers
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
.section .vectortable,"a"
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word init // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
.space 0xD0 // padding 208 Bytes bis Offset 0xE0 (EXTI15_10 IRQ 40)
|
||||
.word _ISR_S0_S1 // gemeinsamer Interrupt für PC13 (S0) und PC14 (S1)
|
||||
.space 0x48 // Padding 72 Bytes (Offset 0x10 -> 0x58)
|
||||
.word _ISR_EXTI0 // EXTI0_IRQHandler (PB0 / S0) - IRQ 6
|
||||
|
||||
.space 0x0C // Padding 12 Bytes (Offset 0x5C -> 0x68)
|
||||
.word _ISR_EXTI4 // EXTI4_IRQHandler (PB4 / S1) - IRQ 10
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
.text
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
@@ -53,9 +59,9 @@
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
CPSID i
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r0, #0
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
@@ -69,43 +75,43 @@ init:
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
#--- enable port clocking (GPIOA, GPIOB)
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOVS r2, #0x05 // Bit 0 (GPIOA) und Bit 2 (GPIOC)
|
||||
MOVS r2, #0x03 // Bit 0 (GPIOA) und Bit 1 (GPIOB)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- port init
|
||||
#- LEDs (PA0-PA3)
|
||||
#- LEDs (PA0 - PA3) als Output
|
||||
LDR r1, =GPIOA_MODER
|
||||
LDR r2, =0x000000FF // Maske PA0-PA3
|
||||
LDR r2, =0x000000FF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000055 // Maske Output 0101 0101
|
||||
LDR r2, =0x00000055
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0F // Maske LED0-3
|
||||
MOVS r2, #0x0F
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- buttons (PC13, PC14 als Input)
|
||||
LDR r1, =GPIOC_MODER
|
||||
LDR r2, =0x3C000000 // Maske Bits 26-29
|
||||
#- buttons (PB0, PB4) als Input
|
||||
LDR r1, =GPIOB_MODER
|
||||
LDR r2, =0x00000303 // Maske Bits 0:1 (PB0) und 8:9 (PB4)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- Pull-Up für PC13, PC14
|
||||
LDR r1, =GPIOC_PUPDR
|
||||
LDR r2, =0x3C000000
|
||||
#- Pull-Up für PB0, PB4
|
||||
LDR r1, =GPIOB_PUPDR
|
||||
LDR r2, =0x00000303
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x14000000 // 01 = Pull-Up für PC13 (Bits 27:26) und PC14 (Bits 29:28)
|
||||
LDR r2, =0x00000101 // 01 = Pull-Up für PB0 und PB4
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
@@ -118,36 +124,51 @@ init:
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
LDR r1, =SYSCFG_EXTICR4
|
||||
LDR r2, =0x00000FF0 // Maske für EXTI13 (Bits 7:4) und EXTI14 (Bits 11:8)
|
||||
#- connect GPIO pins to EXTI lines
|
||||
LDR r1, =SYSCFG_EXTICR1 // EXTI0 (PB0)
|
||||
LDR r2, =0x000F // Maske EXTI0 (Bits 3:0)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000220 // Port C (0010) für EXTI13 und EXTI14
|
||||
MOVS r2, #0x0001 // Port B (0001)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
LDR r1, =EXTI_FTSR1 // Fallende Flanke
|
||||
LDR r2, =0x00006000 // Bits 13 und 14
|
||||
LDR r1, =SYSCFG_EXTICR2 // EXTI4 (PB4)
|
||||
LDR r2, =0x000F // Maske EXTI4 (Bits 3:0)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x0001 // Port B (0001)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- configure EXTI lines (falling edge, unmask)
|
||||
LDR r1, =EXTI_FTSR1
|
||||
MOVS r2, #0x11 // Bit 0 (EXTI0) und Bit 4 (EXTI4)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =EXTI_IMR1 // Maskierung aufheben
|
||||
LDR r2, =0x00006000
|
||||
LDR r1, =EXTI_IMR1
|
||||
MOVS r2, #0x11 // Bit 0 und Bit 4
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
LDR r1, =NVIC_ISER1
|
||||
LDR r2, =0x00000100 // Bit 8 für IRQ 40 (EXTI15_10)
|
||||
#- NVIC: enable interrupts EXTI0 (IRQ 6) & EXTI4 (IRQ 10)
|
||||
LDR r1, =NVIC_ISER0
|
||||
LDR r2, =0x00000440 // Bit 6 (EXTI0) und Bit 10 (EXTI4)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
#--- wachhalten während WFI
|
||||
LDR r1, =DBGMCU_CR
|
||||
LDR r0, [r1, #0]
|
||||
MOVS r2, #0x07 // Setzt DBG_SLEEP, DBG_STOP und DBG_STANDBY Bits
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
CPSIE i
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
@@ -170,7 +191,7 @@ main:
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
LDR r0, =106000 // Entprell-Zeit ~20ms
|
||||
LDR r0, =106000
|
||||
.L1:
|
||||
SUBS r0, r0, #1
|
||||
BNE .L1
|
||||
@@ -190,7 +211,7 @@ stop:
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
.section .exhand,"ax"
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
@@ -254,69 +275,68 @@ _ISR_HARDF:
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0_S1, %function
|
||||
_ISR_S0_S1:
|
||||
PUSH {r4, r5, lr} // Wichtig: Register sichern gemäß AAPCS
|
||||
.type _ISR_EXTI0, %function
|
||||
_ISR_EXTI0:
|
||||
PUSH {lr}
|
||||
|
||||
_check_S0:
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, [r4, #0]
|
||||
LDR r2, =0x2000 // Maske für S0 (PC13 / Bit 13)
|
||||
TST r5, r2
|
||||
BEQ _check_S1 // Wenn Bit 13 nicht gesetzt, überspringen
|
||||
|
||||
#--- do the work S0
|
||||
BL delay // Entprellen
|
||||
|
||||
LDR r0, =GPIOC_IDR
|
||||
LDR r1, [r0, #0]
|
||||
LDR r2, =0x2000
|
||||
TST r1, r2
|
||||
BNE _clear_S0 // Abbruch, wenn High (Taster prellt / schon losgelassen)
|
||||
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x09 // LED0 & LED3 toggeln (1001)
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_S0:
|
||||
#--- clear interrupt flag S0
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, =0x2000
|
||||
STR r5, [r4, #0]
|
||||
|
||||
_check_S1:
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, [r4, #0]
|
||||
LDR r2, =0x4000 // Maske für S1 (PC14 / Bit 14)
|
||||
TST r5, r2
|
||||
BEQ _leave_ISR // Wenn Bit 14 nicht gesetzt, Ende
|
||||
|
||||
#--- do the work S1
|
||||
#--- Entprellen
|
||||
BL delay
|
||||
|
||||
LDR r0, =GPIOC_IDR
|
||||
#--- Überprüfen, ob Taster noch gedrückt ist (PB0)
|
||||
LDR r0, =GPIOB_IDR
|
||||
LDR r1, [r0, #0]
|
||||
LDR r2, =0x4000
|
||||
MOVS r2, #0x01
|
||||
TST r1, r2
|
||||
BNE _clear_S1 // Abbruch, wenn High
|
||||
BNE _clear_exti0
|
||||
|
||||
#--- LED0 & LED3 toggeln (1001 = 0x09)
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x06 // LED1 & LED2 toggeln (0110)
|
||||
MOVS r2, #0x09
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_S1:
|
||||
#--- clear interrupt flag S1
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, =0x4000
|
||||
STR r5, [r4, #0]
|
||||
_clear_exti0:
|
||||
#--- Interrupt Flag löschen
|
||||
LDR r0, =EXTI_PR1
|
||||
MOVS r1, #0x01
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_leave_ISR:
|
||||
#--- leave ISR
|
||||
POP {r4, r5, pc} // Register wiederherstellen und zurückkehren
|
||||
POP {pc}
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_EXTI4, %function
|
||||
_ISR_EXTI4:
|
||||
PUSH {lr}
|
||||
|
||||
#--- Entprellen
|
||||
BL delay
|
||||
|
||||
#--- Überprüfen, ob Taster noch gedrückt ist (PB4)
|
||||
LDR r0, =GPIOB_IDR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x10
|
||||
TST r1, r2
|
||||
BNE _clear_exti4
|
||||
|
||||
#--- LED1 & LED2 toggeln (0110 = 0x06)
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x06
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_exti4:
|
||||
#--- Interrupt Flag löschen
|
||||
LDR r0, =EXTI_PR1
|
||||
MOVS r1, #0x10
|
||||
STR r1, [r0, #0]
|
||||
|
||||
POP {pc}
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2:
|
||||
@@ -325,4 +345,3 @@ _leave_ISR:
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
|
||||
@@ -1,325 +0,0 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
# LDR r1, =GPIOB_MODER
|
||||
# MOVS r3, #0x03
|
||||
# LDR r0, [r1, #1]
|
||||
# BICS r0, r3
|
||||
# MOVS r3, #0x01
|
||||
# ORRS r0, r0, r3
|
||||
# STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
Reference in New Issue
Block a user