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|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.1793500098" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level" value="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.option.optimization.level.value.os" valueType="enumerated"/>
|
||||
</tool>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1235454776" name="MCU GCC Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker">
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script.1042363899" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.option.script" value="${workspace_loc:/${ProjName}/STM32G431KBTX_FLASH.ld}" valueType="string"/>
|
||||
<inputType id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input.356391761" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.input">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1802369860" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2077870415" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1511214546" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1135454788" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.688471561" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1930277785" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.264122243" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1862078334" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.33574342" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Startup"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Inc"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Src"/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="task4.null.1688711246" name="task4"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.577803811;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.577803811.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.151654985;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.792579584">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1054076261;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1054076261.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1228099115;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.2078239028">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="refreshScope"/>
|
||||
</cproject>
|
||||
@@ -0,0 +1,31 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>task4</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
|
||||
<nature>com.st.stm32cube.ide.mcu.MCUManagedMakefileProjectNature</nature>
|
||||
<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
|
||||
<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
@@ -0,0 +1,22 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1054076261" name="Debug">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.577803811" name="Release">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="422947886521367905" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
|
||||
@@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
@@ -0,0 +1,30 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
# Toolchain: GNU Tools for STM32 (12.3.rel1)
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../Src/task4.c \
|
||||
../Src/task4_it.c
|
||||
|
||||
OBJS += \
|
||||
./Src/task4.o \
|
||||
./Src/task4_it.o
|
||||
|
||||
C_DEPS += \
|
||||
./Src/task4.d \
|
||||
./Src/task4_it.d
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
Src/%.o Src/%.su Src/%.cyclo: ../Src/%.c Src/subdir.mk
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
|
||||
clean: clean-Src
|
||||
|
||||
clean-Src:
|
||||
-$(RM) ./Src/task4.cyclo ./Src/task4.d ./Src/task4.o ./Src/task4.su ./Src/task4_it.cyclo ./Src/task4_it.d ./Src/task4_it.o ./Src/task4_it.su
|
||||
|
||||
.PHONY: clean-Src
|
||||
|
||||
@@ -0,0 +1,39 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
# Toolchain: GNU Tools for STM32 (12.3.rel1)
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
S_SRCS += \
|
||||
../Startup/startup_stm32g431kbtx.s
|
||||
|
||||
C_SRCS += \
|
||||
../Startup/syscalls.c \
|
||||
../Startup/sysmem.c
|
||||
|
||||
OBJS += \
|
||||
./Startup/startup_stm32g431kbtx.o \
|
||||
./Startup/syscalls.o \
|
||||
./Startup/sysmem.o
|
||||
|
||||
S_DEPS += \
|
||||
./Startup/startup_stm32g431kbtx.d
|
||||
|
||||
C_DEPS += \
|
||||
./Startup/syscalls.d \
|
||||
./Startup/sysmem.d
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
Startup/%.o: ../Startup/%.s Startup/subdir.mk
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
|
||||
Startup/%.o Startup/%.su Startup/%.cyclo: ../Startup/%.c Startup/subdir.mk
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"$(@:%.o=%.d)" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
|
||||
clean: clean-Startup
|
||||
|
||||
clean-Startup:
|
||||
-$(RM) ./Startup/startup_stm32g431kbtx.d ./Startup/startup_stm32g431kbtx.o ./Startup/syscalls.cyclo ./Startup/syscalls.d ./Startup/syscalls.o ./Startup/syscalls.su ./Startup/sysmem.cyclo ./Startup/sysmem.d ./Startup/sysmem.o ./Startup/sysmem.su
|
||||
|
||||
.PHONY: clean-Startup
|
||||
|
||||
@@ -0,0 +1,93 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
# Toolchain: GNU Tools for STM32 (12.3.rel1)
|
||||
################################################################################
|
||||
|
||||
-include ../makefile.init
|
||||
|
||||
RM := rm -rf
|
||||
|
||||
# All of the sources participating in the build are defined here
|
||||
-include sources.mk
|
||||
-include Startup/subdir.mk
|
||||
-include Src/subdir.mk
|
||||
-include objects.mk
|
||||
|
||||
ifneq ($(MAKECMDGOALS),clean)
|
||||
ifneq ($(strip $(S_DEPS)),)
|
||||
-include $(S_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(S_UPPER_DEPS)),)
|
||||
-include $(S_UPPER_DEPS)
|
||||
endif
|
||||
ifneq ($(strip $(C_DEPS)),)
|
||||
-include $(C_DEPS)
|
||||
endif
|
||||
endif
|
||||
|
||||
-include ../makefile.defs
|
||||
|
||||
OPTIONAL_TOOL_DEPS := \
|
||||
$(wildcard ../makefile.defs) \
|
||||
$(wildcard ../makefile.init) \
|
||||
$(wildcard ../makefile.targets) \
|
||||
|
||||
|
||||
BUILD_ARTIFACT_NAME := task4
|
||||
BUILD_ARTIFACT_EXTENSION := elf
|
||||
BUILD_ARTIFACT_PREFIX :=
|
||||
BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),)
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
EXECUTABLES += \
|
||||
task4.elf \
|
||||
|
||||
MAP_FILES += \
|
||||
task4.map \
|
||||
|
||||
SIZE_OUTPUT += \
|
||||
default.size.stdout \
|
||||
|
||||
OBJDUMP_LIST += \
|
||||
task4.list \
|
||||
|
||||
|
||||
# All Target
|
||||
all: main-build
|
||||
|
||||
# Main-build Target
|
||||
main-build: task4.elf secondary-outputs
|
||||
|
||||
# Tool invocations
|
||||
task4.elf task4.map: $(OBJS) $(USER_OBJS) U:\MCT\WiSe25_26\BEI\mct_bei_workspace_25w\task4\STM32G431KBTX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
|
||||
arm-none-eabi-gcc -o "task4.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"U:\MCT\WiSe25_26\BEI\mct_bei_workspace_25w\task4\STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task4.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
@echo 'Finished building target: $@'
|
||||
@echo ' '
|
||||
|
||||
default.size.stdout: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS)
|
||||
arm-none-eabi-size $(EXECUTABLES)
|
||||
@echo 'Finished building: $@'
|
||||
@echo ' '
|
||||
|
||||
task4.list: $(EXECUTABLES) makefile objects.list $(OPTIONAL_TOOL_DEPS)
|
||||
arm-none-eabi-objdump -h -S $(EXECUTABLES) > "task4.list"
|
||||
@echo 'Finished building: $@'
|
||||
@echo ' '
|
||||
|
||||
# Other Targets
|
||||
clean:
|
||||
-$(RM) default.size.stdout task4.elf task4.list task4.map
|
||||
-@echo ' '
|
||||
|
||||
secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST)
|
||||
|
||||
fail-specified-linker-script-missing:
|
||||
@echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.'
|
||||
@exit 2
|
||||
|
||||
warn-no-linker-script-specified:
|
||||
@echo 'Warning: No linker script specified. Check the linker settings in the build configuration.'
|
||||
|
||||
.PHONY: all clean dependents main-build fail-specified-linker-script-missing warn-no-linker-script-specified
|
||||
|
||||
-include ../makefile.targets
|
||||
@@ -0,0 +1,5 @@
|
||||
"./Src/task4.o"
|
||||
"./Src/task4_it.o"
|
||||
"./Startup/startup_stm32g431kbtx.o"
|
||||
"./Startup/syscalls.o"
|
||||
"./Startup/sysmem.o"
|
||||
@@ -0,0 +1,9 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
# Toolchain: GNU Tools for STM32 (12.3.rel1)
|
||||
################################################################################
|
||||
|
||||
USER_OBJS :=
|
||||
|
||||
LIBS :=
|
||||
|
||||
@@ -0,0 +1,27 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
# Toolchain: GNU Tools for STM32 (12.3.rel1)
|
||||
################################################################################
|
||||
|
||||
ELF_SRCS :=
|
||||
OBJ_SRCS :=
|
||||
S_SRCS :=
|
||||
C_SRCS :=
|
||||
S_UPPER_SRCS :=
|
||||
O_SRCS :=
|
||||
CYCLO_FILES :=
|
||||
SIZE_OUTPUT :=
|
||||
OBJDUMP_LIST :=
|
||||
SU_FILES :=
|
||||
EXECUTABLES :=
|
||||
OBJS :=
|
||||
MAP_FILES :=
|
||||
S_DEPS :=
|
||||
S_UPPER_DEPS :=
|
||||
C_DEPS :=
|
||||
|
||||
# Every subdirectory with source files must be described here
|
||||
SUBDIRS := \
|
||||
Src \
|
||||
Startup \
|
||||
|
||||
@@ -0,0 +1,80 @@
|
||||
/* ***************************************************************************************
|
||||
* Project: task4
|
||||
* File: STefi-Light.h
|
||||
*
|
||||
* Language: C
|
||||
*
|
||||
* Hardware: STefi Light v1.1
|
||||
* Processor: STM32F042K6 / STM32G431KBT6U
|
||||
*
|
||||
* Author: Manuel Lederhofer
|
||||
* Datum: 30.07.2021
|
||||
*
|
||||
* Version: 1.1
|
||||
* History:
|
||||
* 30.07.2021 ML create file
|
||||
* 09.03.2022 ML check G431 compatibility
|
||||
*
|
||||
* Status: working
|
||||
*
|
||||
* Description:
|
||||
* Definitions and declarations related to STefi Light board hardware
|
||||
* extended by application related elements.
|
||||
*
|
||||
*
|
||||
* Notes:
|
||||
* Default MCU speed at startup is:
|
||||
* - F042 = 8 MHz
|
||||
* - G431 = 16 MHz
|
||||
*
|
||||
* ToDo:
|
||||
* - none -
|
||||
************************************************************************************** */
|
||||
#ifndef STEFI_LIGHT_H_
|
||||
#define STEFI_LIGHT_H_
|
||||
/* ==================================================================================== */
|
||||
|
||||
/* ------------------------------------ INCLUDES -------------------------------------- */
|
||||
|
||||
|
||||
/* ------------------------------------ DEFINES --------------------------------------- */
|
||||
|
||||
/* --- STefi peripherals related definitions --- */
|
||||
|
||||
// LEDs
|
||||
#define MASK_LED0 (1 << 0)
|
||||
#define MASK_LED1 (1 << 1)
|
||||
#define MASK_LED2 (1 << 2)
|
||||
#define MASK_LED3 (1 << 3)
|
||||
|
||||
#define MASK_LED_RED (MASK_LED0)
|
||||
#define MASK_LED_YELLOW (MASK_LED1)
|
||||
#define MASK_LED_GREEN (MASK_LED2)
|
||||
#define MASK_LED_BLUE (MASK_LED3)
|
||||
#define MASK_LED_ALL (MASK_LED_RED | MASK_LED_YELLOW | MASK_LED_GREEN | MASK_LED_BLUE)
|
||||
|
||||
|
||||
// buttons
|
||||
#define MASK_S0 (1 << 0)
|
||||
#define MASK_S1 (1 << 4)
|
||||
#define MASK_S2 (1 << 5)
|
||||
#define MASK_S3 (1 << 7)
|
||||
|
||||
#define MASK_KEY0 (MASK_S0)
|
||||
#define MASK_KEY1 (MASK_S1)
|
||||
#define MASK_KEY2 (MASK_S2)
|
||||
#define MASK_KEY3 (MASK_S3)
|
||||
|
||||
|
||||
/* --- STefi MCU related definitions --- */
|
||||
|
||||
/* --- application related definitions --- */
|
||||
|
||||
/* ------------------------------------ TYPE DEFINITIONS ------------------------------ */
|
||||
/* ------------------------------------ GLOBAL VARIABLES ------------------------------ */
|
||||
/* ------------------------------------ PROTOTYPES ------------------------------------ */
|
||||
/* ------------------------------------ GLOBAL FUNCTIONS ------------------------------ */
|
||||
|
||||
/* ==================================================================================== */
|
||||
#endif /* STEFI_LIGHT_H_ */
|
||||
/* ************************************ E O F ***************************************** */
|
||||
@@ -0,0 +1,283 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.3
|
||||
* @date 24. June 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 3U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,272 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.1.0
|
||||
* @date 08. March 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
|
||||
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
|
||||
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
|
||||
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
|
||||
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
|
||||
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attributes
|
||||
*
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
|
||||
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
|
||||
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(((MPU_RASR_ENABLE_Msk))))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for strongly ordered memory.
|
||||
* - TEX: 000b
|
||||
* - Shareable
|
||||
* - Non-cacheable
|
||||
* - Non-bufferable
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for device memory.
|
||||
* - TEX: 000b (if shareable) or 010b (if non-shareable)
|
||||
* - Shareable or non-shareable
|
||||
* - Non-cacheable
|
||||
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
|
||||
*
|
||||
* \param IsShareable Configures the device memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for normal memory.
|
||||
* - TEX: 1BBb (reflecting outer cacheability rules)
|
||||
* - Shareable or non-shareable
|
||||
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
|
||||
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
|
||||
*
|
||||
* \param OuterCp Configures the outer cache policy.
|
||||
* \param InnerCp Configures the inner cache policy.
|
||||
* \param IsShareable Configures the memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute non-cacheable policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_NOCACHE 0U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, write and read allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_WRA 1U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-through, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WT_NWA 2U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_NWA 3U
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rsar Value for RSAR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcopy with strictly ordered memory access, e.g. for register targets.
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
+13139
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,104 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32g4xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M4 Device System Source File for STM32G4xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32g4xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_STM32G4XX_H
|
||||
#define __SYSTEM_STM32G4XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Exported_Variables
|
||||
* @{
|
||||
*/
|
||||
/* The SystemCoreClock variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
|
||||
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32G4xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SYSTEM_STM32G4XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
@@ -0,0 +1,206 @@
|
||||
/*
|
||||
******************************************************************************
|
||||
**
|
||||
** @file : LinkerScript.ld
|
||||
**
|
||||
** @author : Auto-generated by STM32CubeIDE
|
||||
**
|
||||
** Abstract : Linker script for NUCLEO-G431KB Board embedding STM32G431KBTx Device from stm32g4 series
|
||||
** 128Kbytes FLASH
|
||||
** 10Kbytes CCMSRAM
|
||||
** 32Kbytes RAM
|
||||
**
|
||||
** Set heap size, stack size and stack location according
|
||||
** to application requirements.
|
||||
**
|
||||
** Set memory bank area and size if external memory is used
|
||||
**
|
||||
** Target : STMicroelectronics STM32
|
||||
**
|
||||
** Distribution: The file is distributed as is, without any warranty
|
||||
** of any kind.
|
||||
**
|
||||
******************************************************************************
|
||||
** @attention
|
||||
**
|
||||
** Copyright (c) 2022 STMicroelectronics.
|
||||
** All rights reserved.
|
||||
**
|
||||
** This software is licensed under terms that can be found in the LICENSE file
|
||||
** in the root directory of this software component.
|
||||
** If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
**
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Highest address of the user mode stack */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
|
||||
|
||||
_Min_Heap_Size = 0x200; /* required amount of heap */
|
||||
_Min_Stack_Size = 0x400; /* required amount of stack */
|
||||
|
||||
/* Memories definition */
|
||||
MEMORY
|
||||
{
|
||||
CCMSRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 10K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
|
||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
|
||||
}
|
||||
|
||||
/* Sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code into "FLASH" Rom type memory */
|
||||
.isr_vector (READONLY) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* The program code and other data into "FLASH" Rom type memory */
|
||||
.text (READONLY) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .; /* define a global symbols at end of code */
|
||||
} >FLASH
|
||||
|
||||
/* Constant data into "FLASH" Rom type memory */
|
||||
.rodata (READONLY) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM.extab : {
|
||||
. = ALIGN(4);
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.ARM : {
|
||||
. = ALIGN(4);
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.preinit_array (READONLY) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.init_array (READONLY) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
.fini_array (READONLY) :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
. = ALIGN(4);
|
||||
} >FLASH
|
||||
|
||||
/* Used by the startup to initialize data */
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
/* Initialized data sections into "RAM" Ram type memory */
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
*(.RamFunc) /* .RamFunc sections */
|
||||
*(.RamFunc*) /* .RamFunc* sections */
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = .; /* define a global symbol at data end */
|
||||
|
||||
} >RAM AT> FLASH
|
||||
|
||||
_siccmsram = LOADADDR(.ccmsram);
|
||||
|
||||
/* CCM-SRAM section
|
||||
*
|
||||
* IMPORTANT NOTE!
|
||||
* If initialized variables will be placed in this section,
|
||||
* the startup code needs to be modified to copy the init-values.
|
||||
*/
|
||||
.ccmsram :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sccmsram = .; /* create a global symbol at ccmsram start */
|
||||
*(.ccmsram)
|
||||
*(.ccmsram*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_eccmsram = .; /* create a global symbol at ccmsram end */
|
||||
} >CCMSRAM AT> FLASH
|
||||
|
||||
/* Uninitialized data section into "RAM" Ram type memory */
|
||||
. = ALIGN(4);
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
_sbss = .; /* define a global symbol at bss start */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = .; /* define a global symbol at bss end */
|
||||
__bss_end__ = _ebss;
|
||||
} >RAM
|
||||
|
||||
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
|
||||
._user_heap_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
PROVIDE ( end = . );
|
||||
PROVIDE ( _end = . );
|
||||
. = . + _Min_Heap_Size;
|
||||
. = . + _Min_Stack_Size;
|
||||
. = ALIGN(8);
|
||||
} >RAM
|
||||
|
||||
/* Remove information from the compiler libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
}
|
||||
@@ -0,0 +1,104 @@
|
||||
/* ***************************************************************************************
|
||||
* Project: task4 - C:UART
|
||||
* File: task4.c
|
||||
*
|
||||
* Language: C
|
||||
*
|
||||
* Hardware: STefi Light v1.1
|
||||
* Processor: STM32G431KBT6U
|
||||
*
|
||||
* Author: Manuel Lederhofer
|
||||
* Datum: 10.09.2021
|
||||
*
|
||||
* Version: 4.0
|
||||
* History:
|
||||
* 10.09.2021 ML create project; based upon task1
|
||||
* 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
* 18.02.2025 TK changed application to "Ampelschaltung"
|
||||
* 21.07.2025 TK switch task "Entprellen" to "UART"
|
||||
*
|
||||
* Status: under development
|
||||
*
|
||||
* Description:
|
||||
* Blinks the red LED of STefi Light very fast, currently.
|
||||
* This file contains the main routine and the initialization.
|
||||
*
|
||||
* Notes:
|
||||
* - MCU speed at startup is 16 MHz
|
||||
*
|
||||
* Todo:
|
||||
* - Change the example code to match the description and requirements
|
||||
* of the requested application in the lab exercise guide.
|
||||
*
|
||||
************************************************************************************** */
|
||||
|
||||
/* ------------------------------------ INCLUDES -------------------------------------- */
|
||||
#include "stm32g431xx.h"
|
||||
#include "STefi-Light.h"
|
||||
|
||||
|
||||
/* ------------------------------------ DEFINES --------------------------------------- */
|
||||
/* ------------------------------------ TYPE DEFINITIONS ------------------------------ */
|
||||
/* ------------------------------------ GLOBAL VARIABLES ------------------------------ */
|
||||
/* ------------------------------------ PRIVATE VARIABLES ----------------------------- */
|
||||
|
||||
|
||||
/* ------------------------------------ PROTOTYPES ------------------------------------ */
|
||||
static void GPIO_init(void);
|
||||
|
||||
|
||||
/* ------------------------------------ M A I N --------------------------------------- */
|
||||
int main(void)
|
||||
{
|
||||
/* --- initialization --- */
|
||||
__disable_irq(); // disable interrupts globally
|
||||
|
||||
GPIO_init();
|
||||
|
||||
__enable_irq(); // enable interrupts globally
|
||||
|
||||
|
||||
/* --- one time tasks --- */
|
||||
|
||||
|
||||
/* --- infinite processing loop --- */
|
||||
while (1)
|
||||
{
|
||||
/* ... add your code to implement the lab assignment ... */
|
||||
|
||||
__WFI();
|
||||
}
|
||||
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------ GLOBAL FUNCTIONS ------------------------------ */
|
||||
|
||||
|
||||
/* ------------------------------------ PRIVATE FUNCTIONS ----------------------------- */
|
||||
|
||||
/* ------------------------------------------------------------------------------------ *\
|
||||
* method: static void GPIO_init(void)
|
||||
*
|
||||
* Initializes GPIOs on STefi Light for pins with peripherals attached.
|
||||
*
|
||||
* requires: - nothing -
|
||||
* parameters: - none -
|
||||
* returns: - nothing -
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
static void GPIO_init(void)
|
||||
{
|
||||
/* enable port clocks */
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // LEDs: A
|
||||
|
||||
|
||||
/* --- LEDs --- */
|
||||
GPIOA->ODR |= MASK_LED_RED;
|
||||
GPIOA->MODER &= ~(3 << 0);
|
||||
GPIOA->MODER |= (1 << 0); // set LED pin to output
|
||||
}
|
||||
|
||||
|
||||
/* ************************************ E O F ***************************************** */
|
||||
@@ -0,0 +1,224 @@
|
||||
/* ***************************************************************************************
|
||||
* Project: task4 - C:UART
|
||||
* File: task4_it.c
|
||||
*
|
||||
* Language: C
|
||||
*
|
||||
* Hardware: STefi Light v1.1
|
||||
* Processor: STM32G431KBT6U
|
||||
*
|
||||
* Author: Manuel Lederhofer
|
||||
* Datum: 10.09.2021
|
||||
*
|
||||
* Version: 3.1
|
||||
* History:
|
||||
* 10.09.2021 ML create project
|
||||
* 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
* 18.02.2025 TK changed application to "Ampelschaltung"
|
||||
* 24.06.2025 TK remove "... place your code here ..."
|
||||
* 21.07.2025 TK switch task "Entprellen" to "UART"
|
||||
*
|
||||
* Status: under development
|
||||
*
|
||||
* Description:
|
||||
* this file contains the interrupt vector table and the implementation of all
|
||||
* interrupt handlers used in the lab exercises.
|
||||
*
|
||||
* Notes:
|
||||
* - MCU speed at startup is 16 MHz
|
||||
*
|
||||
* Todo:
|
||||
* - Change the example code to match the description and requirements
|
||||
* of the requested application in the lab exercise guide.
|
||||
*
|
||||
************************************************************************************** */
|
||||
|
||||
/* ------------------------------------ INCLUDES -------------------------------------- */
|
||||
#include "stm32g431xx.h"
|
||||
#include "STefi-Light.h"
|
||||
|
||||
|
||||
/* ------------------------------------ DEFINES --------------------------------------- */
|
||||
/* ------------------------------------ TYPE DEFINITIONS ------------------------------ */
|
||||
|
||||
|
||||
/* ------------------------------------ GLOBAL VARIABLES ------------------------------ */
|
||||
extern void* _estack; // initial stack pointer from ldscript
|
||||
extern void* Reset_Handler; // exception handler from startup code
|
||||
|
||||
|
||||
/* ------------------------------------ PRIVATE VARIABLES ----------------------------- */
|
||||
/* ------------------------------------ PROTOTYPES ------------------------------------ */
|
||||
|
||||
|
||||
/* ------------------------------------ GLOBAL FUNCTIONS (Exceptions Handlers) -------- */
|
||||
|
||||
/* ------------------------------------------------------------------------------------ *\
|
||||
* method: void ISR_error(void)
|
||||
*
|
||||
* Default interrupt handler for core interrupts.
|
||||
* Enables the green and red LED on the STefi Light board.
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
void ISR_error(void)
|
||||
{
|
||||
/* init */
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs)
|
||||
GPIOA->ODR |= MASK_LED_ALL;
|
||||
GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x11;
|
||||
|
||||
while(1)
|
||||
{ /* light up the LEDs permanently */
|
||||
GPIOA->ODR &= ~(MASK_LED_GREEN | MASK_LED_RED);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------------------------ *\
|
||||
* method: void ISR_default(void)
|
||||
*
|
||||
* Default interrupt handler for non-core interrupts.
|
||||
* Enables the blue and yellow LED on the STefi Light board.
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
void ISR_default(void)
|
||||
{
|
||||
/* init */
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs)
|
||||
GPIOA->ODR |= MASK_LED_ALL;
|
||||
GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x44;
|
||||
|
||||
while(1)
|
||||
{ /* light up the LEDs permanently */
|
||||
GPIOA->ODR &= ~(MASK_LED_BLUE | MASK_LED_YELLOW);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------ INTERRUPT VECTOR TABLE ------------------------ */
|
||||
|
||||
__attribute__ ((section (".isr_vector")))
|
||||
void (* const paIsrFunc[118])(void) =
|
||||
{
|
||||
/* --- core vectors --- */
|
||||
(void *)&_estack, /* 00 (0x00000000) initial stack pointer */
|
||||
(void *)&Reset_Handler, /* 01 (0x00000004) (prio: -3) initial program counter (leads to first command to execute) */
|
||||
ISR_error, /* 02 (0x00000008) (prio: -2) non-maskable interrupt */
|
||||
ISR_error, /* 03 (0x0000000C) (prio: -1) hard fault exception */
|
||||
ISR_error, /* 04 (0x00000010) memory management */
|
||||
ISR_error, /* 05 (0x00000014) bus fault - pre-fetch fault, memory access fault */
|
||||
ISR_error, /* 06 (0x00000018) usage fault - undefined instruction or illegal state */
|
||||
ISR_error, /* 07 (0x0000001C) reserved vector 7 */
|
||||
ISR_error, /* 08 (0x00000020) reserved vector 8 */
|
||||
ISR_error, /* 09 (0x00000024) reserved vector 9 */
|
||||
ISR_error, /* 10 (0x00000028) reserved vector 10 */
|
||||
ISR_error, /* 11 (0x0000002C) system service call via SWI instruction */
|
||||
ISR_error, /* 12 (0x00000030) monitor */
|
||||
ISR_error, /* 13 (0x00000034) reserved vector 13 */
|
||||
ISR_error, /* 14 (0x00000038) pendable service call exception */
|
||||
ISR_error, /* 15 (0x0000003C) SysTick exception */
|
||||
/* --- non-core vectors --- */
|
||||
ISR_default, /* 0 (0x00000040) window watchdog interrupt */
|
||||
ISR_default, /* 1 (0x00000044) PVD through EXTI line 16 interrupt */
|
||||
ISR_default, /* 2 (0x00000048) RTC/TAMP/CSS on LSE through EXTI line 19 interrupt */
|
||||
ISR_default, /* 3 (0x0000004C) RTC Wakeup timer through EXTI line 20 interrupt */
|
||||
ISR_default, /* 4 (0x00000050) Flash global interrupt */
|
||||
ISR_default, /* 5 (0x00000054) RCC global interrupt */
|
||||
ISR_default, /* 6 (0x00000058) EXTI Line 0 interrupt */
|
||||
ISR_default, /* 7 (0x0000005C) EXTI Line 1 interrupt */
|
||||
ISR_default, /* 8 (0x00000060) EXTI Line 2 interrupt */
|
||||
ISR_default, /* 9 (0x00000064) EXTI Line 3 interrupt */
|
||||
ISR_default, /* 10 (0x00000068) EXTI Line 4 interrupt */
|
||||
ISR_default, /* 11 (0x0000006C) DMA1 channel 1 interrupt */
|
||||
ISR_default, /* 12 (0x00000070) DMA1 channel 2 interrupt */
|
||||
ISR_default, /* 13 (0x00000074) DMA1 channel 3 interrupt */
|
||||
ISR_default, /* 14 (0x00000078) DMA1 channel 4 interrupt */
|
||||
ISR_default, /* 15 (0x0000007C) DMA1 channel 5 interrupt */
|
||||
ISR_default, /* 16 (0x00000080) DMA1 channel 6 interrupt */
|
||||
ISR_default, /* 17 (0x00000084) DMA1 channel 7 interrupt */
|
||||
ISR_default, /* 18 (0x00000088) ADC1 + ADC2 global interrupt */
|
||||
ISR_default, /* 19 (0x0000008C) USB high priority interrupts */
|
||||
ISR_default, /* 20 (0x00000090) USB low priority interrupts */
|
||||
ISR_default, /* 21 (0x00000094) FDCAN1 interrupt 0 */
|
||||
ISR_default, /* 22 (0x00000098) FDCAN1 interrupt 1 */
|
||||
ISR_default, /* 23 (0x0000009C) EXTI line [9:5] interrupts */
|
||||
ISR_default, /* 24 (0x000000A0) TIM1 break + TIM15 global interrupts */
|
||||
ISR_default, /* 25 (0x000000A4) TIM1 update + TIM16 global interrupts */
|
||||
ISR_default, /* 26 (0x000000A8) TIM1 trigger, commutation, direction change, index + TIM17 interrupts */
|
||||
ISR_default, /* 27 (0x000000AC) TIM1 capture compare interrupt */
|
||||
ISR_default, /* 28 (0x000000B0) TIM2 global interrupt */
|
||||
ISR_default, /* 29 (0x000000B4) TIM3 global interrupt */
|
||||
ISR_default, /* 30 (0x000000B8) TIM4 global interrupt */
|
||||
ISR_default, /* 31 (0x000000BC) I2C1 event + EXTI line 23 interrupts */
|
||||
ISR_default, /* 32 (0x000000C0) I2C1 error interrupt */
|
||||
ISR_default, /* 33 (0x000000C4) I2C2 event + EXTI line 24 interrupts */
|
||||
ISR_default, /* 34 (0x000000C8) I2C2 error interrupt */
|
||||
ISR_default, /* 35 (0x000000CC) SPI1 global interrupt */
|
||||
ISR_default, /* 36 (0x000000D0) SPI2 global interrupt */
|
||||
ISR_default, /* 37 (0x000000D4) USART1 global + EXTI line 25 interrupts */
|
||||
ISR_default, /* 38 (0x000000D8) USART2 global + EXTI line 26 interrupts */
|
||||
ISR_default, /* 39 (0x000000DC) USART3 global + EXTI line 28 interrupts */
|
||||
ISR_default, /* 40 (0x000000E0) EXTI line [15:10] interrupts */
|
||||
ISR_default, /* 41 (0x000000E4) RTC alarms interrupts */
|
||||
ISR_default, /* 42 (0x000000E8) USB wakeup from suspend trough EXTI line 18 interrupt */
|
||||
ISR_default, /* 43 (0x000000EC) TIM8 break, transition error, index error interrupts */
|
||||
ISR_default, /* 44 (0x000001F0) TIM8 update interrupt */
|
||||
ISR_default, /* 45 (0x000001F4) TIM8 trigger, commutation, direction change, index interrupts */
|
||||
ISR_default, /* 46 (0x000001F8) TIM8 capture compare interrupt */
|
||||
ISR_default, /* 47 (0x000001FC) ADC3 global interrupt */
|
||||
ISR_default, /* 48 (0x00000100) FSMC global interrupt */
|
||||
ISR_default, /* 49 (0x00000104) LPTIM1 global interrupt */
|
||||
ISR_default, /* 50 (0x00000108) TIM5 global interrupt */
|
||||
ISR_default, /* 51 (0x0000010C) SPI3 global interrupt */
|
||||
ISR_default, /* 52 (0x00000110) UART4 global + EXTI line 34 interrupts */
|
||||
ISR_default, /* 53 (0x00000114) UART5 global + EXTI line 35 interrupts */
|
||||
ISR_default, /* 54 (0x00000118) TIM6 + DAC1/3 underrun global interrupts */
|
||||
ISR_default, /* 55 (0x0000011C) TIM7 + DAC2/4 underrun global interrupts */
|
||||
ISR_default, /* 56 (0x00000120) DMA2 channel 1 interrupt */
|
||||
ISR_default, /* 57 (0x00000124) DMA2 channel 2 interrupt */
|
||||
ISR_default, /* 58 (0x00000128) DMA2 channel 3 interrupt */
|
||||
ISR_default, /* 59 (0x0000012C) DMA2 channel 4 interrupt */
|
||||
ISR_default, /* 60 (0x00000130) DMA2 channel 5 interrupt */
|
||||
ISR_default, /* 61 (0x00000134) ADC4 global interrupt */
|
||||
ISR_default, /* 62 (0x00000138) ADC5 global interrupt */
|
||||
ISR_default, /* 63 (0x0000013C) UCPD1 global + EXTI line 43 interrupts */
|
||||
ISR_default, /* 64 (0x00000140) COMP1/COMP2/COMP3 through EXTI lines 21/22/29 interrupts */
|
||||
ISR_default, /* 65 (0x00000144) COMP4/COMP5/COMP6 through EXTI lines 30/31/32 interrupts */
|
||||
ISR_default, /* 66 (0x00000148) COMP7 through EXTI line 33 interrupt */
|
||||
ISR_default, /* 67 (0x0000014C) HRTIM master timer interrupt (hrtim_it1) */
|
||||
ISR_default, /* 68 (0x00000150) HRTIM timer A interrupt (hrtim_it2) */
|
||||
ISR_default, /* 69 (0x00000154) HRTIM timer B interrupt (hrtim_it3) */
|
||||
ISR_default, /* 70 (0x00000158) HRTIM timer C interrupt (hrtim_it4) */
|
||||
ISR_default, /* 71 (0x0000015C) HRTIM timer D interrupt (hrtim_it5) */
|
||||
ISR_default, /* 72 (0x00000160) HRTIM timer E interrupt (hrtim_it6) */
|
||||
ISR_default, /* 73 (0x00000164) HRTIM fault interrupt (hrtim_it8) */
|
||||
ISR_default, /* 74 (0x00000168) HRTIM timer F interrupt (hrtim_it7) */
|
||||
ISR_default, /* 75 (0x0000016C) CRS interrupt */
|
||||
ISR_default, /* 76 (0x00000170) SAI */
|
||||
ISR_default, /* 77 (0x00000174) TIM20 break, transition error, index error interrupts */
|
||||
ISR_default, /* 78 (0x00000178) TIM20 update interrupt */
|
||||
ISR_default, /* 79 (0x0000017C) TIM20 trigger, commutation, direction change, index interrupts */
|
||||
ISR_default, /* 80 (0x00000180) TIM20 capture compare interrupt */
|
||||
ISR_default, /* 81 (0x00000184) Floating point interrupt */
|
||||
ISR_default, /* 82 (0x00000188) I2C4 event + EXTI line 4 interrupts */
|
||||
ISR_default, /* 83 (0x0000018C) I2C4 error interrupt */
|
||||
ISR_default, /* 84 (0x00000190) SPI4 global interrupt */
|
||||
ISR_default, /* 85 (0x00000194) AES global interrupt */
|
||||
ISR_default, /* 86 (0x00000198) FDCAN2 interrupt 0 */
|
||||
ISR_default, /* 87 (0x0000019C) FDCAN2 interrupt 1 */
|
||||
ISR_default, /* 88 (0x000001A0) FDCAN3 interrupt 0 */
|
||||
ISR_default, /* 89 (0x000001A4) FDCAN3 interrupt 1 */
|
||||
ISR_default, /* 90 (0x000001A8) RNG global interrupt */
|
||||
ISR_default, /* 91 (0x000001AC) LPUART global interrupt */
|
||||
ISR_default, /* 92 (0x000001B0) I2C3 event + EXTI line 27 interrupts */
|
||||
ISR_default, /* 93 (0x000001B4) I2C3 error interrupt */
|
||||
ISR_default, /* 94 (0x000001B8) DMAMUX overrun interrupt */
|
||||
ISR_default, /* 95 (0x000001BC) QUADSPI global interrupt */
|
||||
ISR_default, /* 96 (0x000001C0) DMA1 channel 8 interrupt */
|
||||
ISR_default, /* 97 (0x000001C4) DMA2 channel 6 interrupt */
|
||||
ISR_default, /* 98 (0x000001C8) DMA2 channel 7 interrupt */
|
||||
ISR_default, /* 99 (0x000001CC) DMA2 channel 8 interrupt */
|
||||
ISR_default, /* 100 (0x000001D0) Cordic interrupt */
|
||||
ISR_default /* 101 (0x000001D4) FMAC interrupt */
|
||||
};
|
||||
|
||||
|
||||
/* ************************************ E O F ***************************************** */
|
||||
@@ -0,0 +1,105 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32g431kbtx.s
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32G431KBTx device vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) ${year} STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
mov sp, r0 /* set stack pointer */
|
||||
/* Call the clock system initialization function.*/
|
||||
// bl SystemInit
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectonics *****END OF FILE****/
|
||||
@@ -0,0 +1,176 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file syscalls.c
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE Minimal System calls file
|
||||
*
|
||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the Newlib libc-manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2020-2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
|
||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
|
||||
extern int __io_getchar(void) __attribute__((weak));
|
||||
|
||||
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
|
||||
{
|
||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
(void)pid;
|
||||
(void)sig;
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit (int status)
|
||||
{
|
||||
_kill(status, -1);
|
||||
while (1) {} /* Make sure we hang here */
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
*ptr++ = __io_getchar();
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
|
||||
(void)file;
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
__io_putchar(*ptr++);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int _close(int file)
|
||||
{
|
||||
(void)file;
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int file)
|
||||
{
|
||||
(void)file;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
(void)file;
|
||||
(void)ptr;
|
||||
(void)dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _open(char *path, int flags, ...)
|
||||
{
|
||||
(void)path;
|
||||
(void)flags;
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int *status)
|
||||
{
|
||||
(void)status;
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(char *name)
|
||||
{
|
||||
(void)name;
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
(void)buf;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
(void)file;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
(void)old;
|
||||
(void)new;
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
(void)name;
|
||||
(void)argv;
|
||||
(void)env;
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
@@ -0,0 +1,79 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2024 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
||||
__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
@@ -0,0 +1,82 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="com.st.stm32cube.ide.mcu.debug.launch.launchConfigurationType">
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.access_port_id" value="0"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.cubeprog_external_loaders" value="[]"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_live_expr" value="true"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.enable_swv" value="false"/>
|
||||
<intAttribute key="com.st.stm32cube.ide.mcu.debug.launch.formatVersion" value="2"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.ip_address_local" value="localhost"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.limit_swo_clock.enabled" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.limit_swo_clock.value" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.loadList" value="{"fItems":[{"fIsFromMainTab":true,"fPath":"Debug/task4.elf","fProjectName":"task4","fPerformBuild":true,"fDownload":true,"fLoadSymbols":true}]}"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.override_start_address_mode" value="default"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.remoteCommand" value="target remote"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startServer" value="true"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.exception.divby0" value="true"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.exception.unaligned" value="false"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.startuptab.haltonexception" value="true"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swd_mode" value="true"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_port" value="61235"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.swv_trace_hclk" value="16000000"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.useRemoteTarget" value="true"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.launch.vector_table" value=""/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.launch.verify_flash_download" value="true"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.cti_allow_halt" value="false"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.cti_signal_halt" value="false"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_logging" value="false"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_max_halt_delay" value="false"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.enable_shared_stlink" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.frequency" value="0"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.halt_all_on_reset" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.log_file" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.low_power_debug" value="enable"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.max_halt_delay" value="2"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.reset_strategy" value="connect_under_reset"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_check_serial_number" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkenable_rtos" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{"fVersion":1,"fItems":[{"fDisplayName":"Reset","fIsSuppressible":false,"fResetAttribute":"Software system reset","fResetStrategies":[{"fDisplayName":"Software system reset","fLaunchAttribute":"system_reset","fGdbCommands":["monitor reset\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Hardware reset","fLaunchAttribute":"hardware_reset","fGdbCommands":["monitor reset hardware\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Core reset","fLaunchAttribute":"core_reset","fGdbCommands":["monitor reset core\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"None","fLaunchAttribute":"no_reset","fGdbCommands":[],"fCmdOptions":["-g"]}],"fGdbCommandGroup":{"name":"Additional commands","commands":[]},"fStartApplication":true}]}"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.enableRtosProxy" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyCustomProperties" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriver" value="threadx"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriverAuto" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriverPort" value="cortex_m0"/>
|
||||
<intAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyPort" value="60000"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDeviceId" value="com.st.stm32cube.ide.mcu.debug.stlink"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="61234"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="remote"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/task4.elf"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="task4"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/task4"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
|
||||
<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
|
||||
<listEntry value="org.eclipse.debug.ui.launchGroup.run"/>
|
||||
</listAttribute>
|
||||
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><memoryBlockExpressionList context="reserved-for-future-use"/>"/>
|
||||
<stringAttribute key="process_factory_id" value="com.st.stm32cube.ide.mcu.debug.launch.HardwareDebugProcessFactory"/>
|
||||
</launchConfiguration>
|
||||
Reference in New Issue
Block a user