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113 changed files with 133503 additions and 5530 deletions

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@ -49,3 +49,8 @@
*** SESSION Feb. 28, 2026 20:03:36.773 ----------------------------------------- *** SESSION Feb. 28, 2026 20:03:36.773 -----------------------------------------
*** SESSION März 01, 2026 11:22:28.450 ----------------------------------------- *** SESSION März 01, 2026 11:22:28.450 -----------------------------------------
*** SESSION März 01, 2026 11:55:48.249 ----------------------------------------- *** SESSION März 01, 2026 11:55:48.249 -----------------------------------------
*** SESSION März 13, 2026 10:49:11.272 -----------------------------------------
*** SESSION März 16, 2026 12:55:55.445 -----------------------------------------
*** SESSION März 24, 2026 14:01:49.132 -----------------------------------------
*** SESSION März 24, 2026 14:11:29.704 -----------------------------------------
*** SESSION März 24, 2026 14:21:04.465 -----------------------------------------

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@ -217,3 +217,429 @@ arm-none-eabi-size task1.elf
1144 0 1568 2712 a98 task1.elf 1144 0 1568 2712 a98 task1.elf
Finished building: default.size.stdout Finished building: default.size.stdout
13:01:07 **** Build of configuration Debug for project task1 ****
make -j24 all
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"D:\04 Studium\SS26\mct\git-praktikum\MZT-Praktikum\task1\STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
Finished building target: task1.elf
arm-none-eabi-size task1.elf
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
text data bss dec hex filename
1664 0 1568 3232 ca0 task1.elf
Finished building: default.size.stdout
Finished building: task1.list
14:15:54 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
Finished building target: task1.elf
arm-none-eabi-size task1.elf
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
text data bss dec hex filename
1664 0 1568 3232 ca0 task1.elf
Finished building: default.size.stdout
Finished building: task1.list
14:16:23 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
Finished building target: task1.elf
arm-none-eabi-size task1.elf
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
text data bss dec hex filename
1672 0 1568 3240 ca8 task1.elf
Finished building: default.size.stdout
Finished building: task1.list
14:17:15 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
Finished building target: task1.elf
arm-none-eabi-size task1.elf
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
text data bss dec hex filename
1692 0 1568 3260 cbc task1.elf
Finished building: default.size.stdout
Finished building: task1.list
14:18:09 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
Finished building target: task1.elf
arm-none-eabi-size task1.elf
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
text data bss dec hex filename
1684 0 1568 3252 cb4 task1.elf
Finished building: default.size.stdout
Finished building: task1.list
14:21:35 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
Finished building target: task1.elf
arm-none-eabi-size task1.elf
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
text data bss dec hex filename
1692 0 1568 3260 cbc task1.elf
Finished building: default.size.stdout
Finished building: task1.list
15:01:24 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
Finished building target: task1.elf
arm-none-eabi-size task1.elf
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
text data bss dec hex filename
1692 0 1568 3260 cbc task1.elf
Finished building: default.size.stdout
Finished building: task1.list
16:09:45 **** Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
240 0 0 240 f0 task2.elf
Target all ready
18:20:32 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
task2.s: Assembler messages:
task2.s:128: Error: ARM register expected -- `movs '
make: *** [makefile:74: task2.o] Error 1
"make -j12 all" terminated with exit code 2. Build might be incomplete.
18:20:48 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:21:57 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:22:48 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
240 0 0 240 f0 task2.elf
Target all ready
18:23:22 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:23:42 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:23:54 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:24:03 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:24:24 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:24:36 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:25:04 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:25:26 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:25:42 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:26:11 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
260 0 0 260 104 task2.elf
Target all ready
18:26:34 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
264 0 0 264 108 task2.elf
Target all ready
18:26:57 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
248 0 0 248 f8 task2.elf
Target all ready
18:27:24 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
18:29:47 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
240 0 0 240 f0 task2.elf
Target all ready
18:35:13 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
240 0 0 240 f0 task2.elf
Target all ready
18:35:46 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
18:35:51 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:12:30 **** Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:12:55 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:13:16 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:13:43 **** Clean-only build of configuration Debug for project task1 ****
make -j12 clean
rm -rf ./Startup/startup_stm32g431kbtx.d ./Startup/startup_stm32g431kbtx.o ./Startup/syscalls.cyclo ./Startup/syscalls.d ./Startup/syscalls.o ./Startup/syscalls.su ./Startup/sysmem.cyclo ./Startup/sysmem.d ./Startup/sysmem.o ./Startup/sysmem.su
rm -rf ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
rm -rf default.size.stdout task1.elf task1.list task1.map
14:13:44 **** Clean-only build of configuration Debug for project task2 ****
make -j12 clean
14:13:44 **** Clean-only build of configuration Debug for project task3 ****
make -j12 clean
makefile:62: *** multiple target patterns. Stop.
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
14:13:44 **** Clean-only build of configuration Debug for project task4 ****
make -j12 clean
makefile:62: *** multiple target patterns. Stop.
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
14:14:11 **** Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
240 0 0 240 f0 task2.elf
Target all ready
14:15:19 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:15:29 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:16:17 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:17:15 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:17:57 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:19:07 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:56:35 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:57:35 **** Clean-only build of configuration Debug for project task2 ****
make -j12 clean
14:57:51 **** Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
648 0 0 648 288 task2.elf
Target all ready
14:58:02 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
14:58:10 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready
13:53:05 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
task2.s: Assembler messages:
task2.s:346: Error: junk at end of line, first unrecognized character is `h'
make: *** [makefile:74: task2.o] Error 1
"make -j12 all" terminated with exit code 2. Build might be incomplete.
13:53:51 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
arm-none-eabi-size task2.elf
text data bss dec hex filename
532 0 0 532 214 task2.elf
Target all ready
13:56:03 **** Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
../Src/sketch.c: In function 'main':
../Src/sketch.c:11:42: error: expected expression before ')' token
11 | while(/*schalter nicht gedrückt*/){}
| ^
../Src/sketch.c:12:9: warning: implicit declaration of function 'delay' [-Wimplicit-function-declaration]
12 | delay(10);
| ^~~~~
../Src/sketch.c:13:39: error: expected expression before ')' token
13 | while(/*schalter losgelassen*/){}
| ^
../Src/sketch.c:18:39: error: request for member 'length' in something not a structure or union
18 | for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
| ^
../Src/sketch.c:20:20: warning: suggest parentheses around assignment used as truth value [-Wparentheses]
20 | if(i = 0){/*alles bis auf LED0 auschalten*/}
| ^
../Src/sketch.c:21:20: warning: suggest parentheses around assignment used as truth value [-Wparentheses]
21 | if(i = 1){/*..*/}
| ^
../Src/sketch.c:24:44: error: expected expression before ')' token
24 | if(/*schalter gerückt*/){
| ^
../Src/sketch.c:32:42: error: expected expression before ')' token
32 | while(/*Taster gedrückt*/){}
| ^
make: *** [Src/subdir.mk:25: Src/sketch.o] Error 1
make: *** Waiting for unfinished jobs....
../Src/task1.c: In function 'GPIO_init':
../Src/task1.c:169:22: error: expected expression before '<<' token
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
| ^~
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
"make -j12 all" terminated with exit code 2. Build might be incomplete.
13:56:35 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
../Src/task1.c: In function 'GPIO_init':
../Src/task1.c:169:22: error: expected expression before '<<' token
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
| ^~
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
"make -j12 all" terminated with exit code 2. Build might be incomplete.
14:02:22 **** Incremental Build of configuration Debug for project task2 ****
make -j12 all
Target all ready

View File

@ -1,10 +1,13 @@
11:56:08 **** Incremental Build of configuration Debug for project task1 **** 13:56:35 **** Incremental Build of configuration Debug for project task1 ****
make -j12 all make -j12 all
arm-none-eabi-size task1.elf arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
text data bss dec hex filename arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
1144 0 1568 2712 a98 task1.elf ../Src/task1.c: In function 'GPIO_init':
Finished building: default.size.stdout ../Src/task1.c:169:22: error: expected expression before '<<' token
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
| ^~
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
"make -j12 all" terminated with exit code 2. Build might be incomplete.
11:56:08 Build Finished. 0 errors, 0 warnings. (took 119ms) 13:56:35 Build Failed. 2 errors, 0 warnings. (took 166ms)

View File

@ -1,5 +1,6 @@
11:52:45 **** Clean-only build of configuration Debug for project task2 **** 14:02:22 **** Incremental Build of configuration Debug for project task2 ****
make -j12 clean make -j12 all
Target all ready
11:52:45 Build Finished. 0 errors, 0 warnings. (took 126ms) 14:02:22 Build Finished. 0 errors, 0 warnings. (took 121ms)

View File

@ -1,7 +1,7 @@
11:52:45 **** Clean-only build of configuration Debug for project task3 **** 14:13:44 **** Clean-only build of configuration Debug for project task3 ****
make -j12 clean make -j12 clean
makefile:62: *** multiple target patterns. Stop. makefile:62: *** multiple target patterns. Stop.
"make -j12 clean" terminated with exit code 2. Build might be incomplete. "make -j12 clean" terminated with exit code 2. Build might be incomplete.
11:52:45 Build Failed. 1 errors, 0 warnings. (took 126ms) 14:13:44 Build Failed. 1 errors, 0 warnings. (took 186ms)

View File

@ -1,7 +1,7 @@
11:52:46 **** Clean-only build of configuration Debug for project task4 **** 14:13:44 **** Clean-only build of configuration Debug for project task4 ****
make -j12 clean make -j12 clean
makefile:62: *** multiple target patterns. Stop. makefile:62: *** multiple target patterns. Stop.
"make -j12 clean" terminated with exit code 2. Build might be incomplete. "make -j12 clean" terminated with exit code 2. Build might be incomplete.
11:52:46 Build Failed. 1 errors, 0 warnings. (took 127ms) 14:13:44 Build Failed. 1 errors, 0 warnings. (took 186ms)

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x03
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #3]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x04
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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/*
* sketch.c
*
* Created on: Mar 18, 2026
* Author: tobii
*/
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
int main(){
while(1){
while(/*schalter gedrückt*/){}
delay();
while(/*schalter losgelassen*/){}
delay();
int aktiv = 1;
while(aktiv){
for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
//alle LED einschalten
if(i = 0){/*alles bis auf LED0 auschalten*/}
if(i = 1){/*..*/}
//...
for(int zähler = 0; zähler < 333 && aktiv == 1; zähler++){
if(/*schalter gerückt*/){
aktiv = 0;
break;
}
else{
delay(1);
}
}
while(/*Taster gedrückt*/){}
}
}
}
}

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x03
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #2]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#****************************************************************************************#
.include "G431_addr.s"
// Zusätzliche und benötigte Adressen
.equ RCC_AHB2ENR, 0x4002104C
.equ RCC_APB2ENR, 0x40021060
.equ GPIOA_MODER, 0x48000000
.equ GPIOA_ODR, 0x48000014
.equ GPIOC_MODER, 0x48000800
.equ GPIOC_PUPDR, 0x4800080C
.equ GPIOC_IDR, 0x48000810
.equ SYSCFG_BASE, 0x40010000
.equ SYSCFG_EXTICR4, (SYSCFG_BASE + 0x14)
.equ EXTI_BASE, 0x40010400
.equ EXTI_IMR1, (EXTI_BASE + 0x00)
.equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
.equ EXTI_PR1, (EXTI_BASE + 0x14)
.equ NVIC_ISER1, 0xE000E104
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
.space 0xD0 // padding 208 Bytes bis Offset 0xE0 (EXTI15_10 IRQ 40)
.word _ISR_S0_S1 // gemeinsamer Interrupt für PC13 (S0) und PC14 (S1)
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR
MOVS r2, #0x05 // Bit 0 (GPIOA) und Bit 2 (GPIOC)
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#--- port init
#- LEDs (PA0-PA3)
LDR r1, =GPIOA_MODER
LDR r2, =0x000000FF // Maske PA0-PA3
LDR r0, [r1, #0]
BICS r0, r2
LDR r2, =0x00000055 // Maske Output 0101 0101
ORRS r0, r2
STR r0, [r1, #0]
#- switch LED off
LDR r1, =GPIOA_ODR
MOVS r2, #0x0F // Maske LED0-3
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#- buttons (PC13, PC14 als Input)
LDR r1, =GPIOC_MODER
LDR r2, =0x3C000000 // Maske Bits 26-29
LDR r0, [r1, #0]
BICS r0, r2
STR r0, [r1, #0]
#- Pull-Up für PC13, PC14
LDR r1, =GPIOC_PUPDR
LDR r2, =0x3C000000
LDR r0, [r1, #0]
BICS r0, r2
LDR r2, =0x14000000 // 01 = Pull-Up für PC13 (Bits 27:26) und PC14 (Bits 29:28)
ORRS r0, r2
STR r0, [r1, #0]
#--- button interrupt config
#- enable clock for SYSCFG module
LDR r1, =RCC_APB2ENR
MOVS r2, #0x01
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
LDR r1, =SYSCFG_EXTICR4
LDR r2, =0x00000FF0 // Maske für EXTI13 (Bits 7:4) und EXTI14 (Bits 11:8)
LDR r0, [r1, #0]
BICS r0, r2
LDR r2, =0x00000220 // Port C (0010) für EXTI13 und EXTI14
ORRS r0, r2
STR r0, [r1, #0]
#- configure lines in EXTI module (EXTI_* registers)
LDR r1, =EXTI_FTSR1 // Fallende Flanke
LDR r2, =0x00006000 // Bits 13 und 14
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =EXTI_IMR1 // Maskierung aufheben
LDR r2, =0x00006000
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#- NVIC: set interrupt priority, clear pending bits
LDR r1, =NVIC_ISER1
LDR r2, =0x00000100 // Bit 8 für IRQ 40 (EXTI15_10)
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
WFI
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
LDR r0, =106000 // Entprell-Zeit ~20ms
.L1:
SUBS r0, r0, #1
BNE .L1
BX lr
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP
B stop
#----------------------------------------------------------------------------------------#
.lp1:
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
LDR r1, =RCC_AHB2ENR
MOV r2, #0x01
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_MODER
MOVS r2, #0xFF
LDR r0, [r1, #0]
BICS r0, r2
MOVS r2, #0x44
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_ODR
MOVS r2, #0x0A
LDR r0, [r1, #0]
BICS r0, r2
STR r0, [r1, #0]
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
LDR r1, =RCC_AHB2ENR
MOV r2, #0x01
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_MODER
MOVS r2, #0xFF
LDR r0, [r1, #0]
BICS r0, r2
MOVS r2, #0x11
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_ODR
MOVS r2, #0x05
LDR r0, [r1, #0]
BICS r0, r2
STR r0, [r1, #0]
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0_S1, %function
_ISR_S0_S1:
PUSH {r4, r5, lr} // Wichtig: Register sichern gemäß AAPCS
_check_S0:
LDR r4, =EXTI_PR1
LDR r5, [r4, #0]
LDR r2, =0x2000 // Maske für S0 (PC13 / Bit 13)
TST r5, r2
BEQ _check_S1 // Wenn Bit 13 nicht gesetzt, überspringen
#--- do the work S0
BL delay // Entprellen
LDR r0, =GPIOC_IDR
LDR r1, [r0, #0]
LDR r2, =0x2000
TST r1, r2
BNE _clear_S0 // Abbruch, wenn High (Taster prellt / schon losgelassen)
LDR r0, =GPIOA_ODR
LDR r1, [r0, #0]
MOVS r2, #0x09 // LED0 & LED3 toggeln (1001)
EORS r1, r2
STR r1, [r0, #0]
_clear_S0:
#--- clear interrupt flag S0
LDR r4, =EXTI_PR1
LDR r5, =0x2000
STR r5, [r4, #0]
_check_S1:
LDR r4, =EXTI_PR1
LDR r5, [r4, #0]
LDR r2, =0x4000 // Maske für S1 (PC14 / Bit 14)
TST r5, r2
BEQ _leave_ISR // Wenn Bit 14 nicht gesetzt, Ende
#--- do the work S1
BL delay
LDR r0, =GPIOC_IDR
LDR r1, [r0, #0]
LDR r2, =0x4000
TST r1, r2
BNE _clear_S1 // Abbruch, wenn High
LDR r0, =GPIOA_ODR
LDR r1, [r0, #0]
MOVS r2, #0x06 // LED1 & LED2 toggeln (0110)
EORS r1, r2
STR r1, [r0, #0]
_clear_S1:
#--- clear interrupt flag S1
LDR r4, =EXTI_PR1
LDR r5, =0x4000
STR r5, [r4, #0]
_leave_ISR:
#--- leave ISR
POP {r4, r5, pc} // Register wiederherstellen und zurückkehren
#----------------------------------------------------------------------------------------#
.lp2:
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#****************************************************************************************#
.include "G431_addr.s"
// Falls in G431_addr.s vorhanden, diesen Block löschen um Fehler zu vermeiden:
.equ RCC_AHB2ENR, 0x4002104C
.equ RCC_APB2ENR, 0x40021060
.equ GPIOA_MODER, 0x48000000
.equ GPIOA_ODR, 0x48000014
.equ GPIOB_MODER, 0x48000400
.equ GPIOB_PUPDR, 0x4800040C
.equ GPIOB_IDR, 0x48000410
.equ SYSCFG_BASE, 0x40010000
.equ SYSCFG_EXTICR1, (SYSCFG_BASE + 0x08)
.equ SYSCFG_EXTICR2, (SYSCFG_BASE + 0x0C)
.equ EXTI_BASE, 0x40010400
.equ EXTI_IMR1, (EXTI_BASE + 0x00)
.equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
.equ EXTI_PR1, (EXTI_BASE + 0x14)
.equ NVIC_ISER0, 0xE000E100
.equ DBGMCU_CR, 0xE0042004 // Adresse des Debug Configuration Registers
#----------------------------------------------------------------------------------------#
.section .vectortable,"a"
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer
.word init // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
.space 0x48 // Padding 72 Bytes (Offset 0x10 -> 0x58)
.word _ISR_EXTI0 // EXTI0_IRQHandler (PB0 / S0) - IRQ 6
.space 0x0C // Padding 12 Bytes (Offset 0x5C -> 0x68)
.word _ISR_EXTI4 // EXTI4_IRQHandler (PB4 / S1) - IRQ 10
#----------------------------------------------------------------------------------------#
.text
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i
MOVS r0, #0
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking (GPIOA, GPIOB)
LDR r1, =RCC_AHB2ENR
MOVS r2, #0x03 // Bit 0 (GPIOA) und Bit 1 (GPIOB)
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#--- port init
#- LEDs (PA0 - PA3) als Output
LDR r1, =GPIOA_MODER
LDR r2, =0x000000FF
LDR r0, [r1, #0]
BICS r0, r2
LDR r2, =0x00000055
ORRS r0, r2
STR r0, [r1, #0]
#- switch LED off
LDR r1, =GPIOA_ODR
MOVS r2, #0x0F
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#- buttons (PB0, PB4) als Input
LDR r1, =GPIOB_MODER
LDR r2, =0x00000303 // Maske Bits 0:1 (PB0) und 8:9 (PB4)
LDR r0, [r1, #0]
BICS r0, r2
STR r0, [r1, #0]
#- Pull-Up für PB0, PB4
LDR r1, =GPIOB_PUPDR
LDR r2, =0x00000303
LDR r0, [r1, #0]
BICS r0, r2
LDR r2, =0x00000101 // 01 = Pull-Up für PB0 und PB4
ORRS r0, r2
STR r0, [r1, #0]
#--- button interrupt config
#- enable clock for SYSCFG module
LDR r1, =RCC_APB2ENR
MOVS r2, #0x01
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#- connect GPIO pins to EXTI lines
LDR r1, =SYSCFG_EXTICR1 // EXTI0 (PB0)
LDR r2, =0x000F // Maske EXTI0 (Bits 3:0)
LDR r0, [r1, #0]
BICS r0, r2
MOVS r2, #0x0001 // Port B (0001)
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =SYSCFG_EXTICR2 // EXTI4 (PB4)
LDR r2, =0x000F // Maske EXTI4 (Bits 3:0)
LDR r0, [r1, #0]
BICS r0, r2
MOVS r2, #0x0001 // Port B (0001)
ORRS r0, r2
STR r0, [r1, #0]
#- configure EXTI lines (falling edge, unmask)
LDR r1, =EXTI_FTSR1
MOVS r2, #0x11 // Bit 0 (EXTI0) und Bit 4 (EXTI4)
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =EXTI_IMR1
MOVS r2, #0x11 // Bit 0 und Bit 4
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#- NVIC: enable interrupts EXTI0 (IRQ 6) & EXTI4 (IRQ 10)
LDR r1, =NVIC_ISER0
LDR r2, =0x00000440 // Bit 6 (EXTI0) und Bit 10 (EXTI4)
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
#--- wachhalten während WFI
LDR r1, =DBGMCU_CR
LDR r0, [r1, #0]
MOVS r2, #0x07 // Setzt DBG_SLEEP, DBG_STOP und DBG_STANDBY Bits
ORRS r0, r2
STR r0, [r1, #0]
CPSIE i
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
WFI
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
LDR r0, =106000
.L1:
SUBS r0, r0, #1
BNE .L1
BX lr
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP
B stop
#----------------------------------------------------------------------------------------#
.lp1:
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax"
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
LDR r1, =RCC_AHB2ENR
MOV r2, #0x01
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_MODER
MOVS r2, #0xFF
LDR r0, [r1, #0]
BICS r0, r2
MOVS r2, #0x44
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_ODR
MOVS r2, #0x0A
LDR r0, [r1, #0]
BICS r0, r2
STR r0, [r1, #0]
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
LDR r1, =RCC_AHB2ENR
MOV r2, #0x01
LDR r0, [r1, #0]
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_MODER
MOVS r2, #0xFF
LDR r0, [r1, #0]
BICS r0, r2
MOVS r2, #0x11
ORRS r0, r2
STR r0, [r1, #0]
LDR r1, =GPIOA_ODR
MOVS r2, #0x05
LDR r0, [r1, #0]
BICS r0, r2
STR r0, [r1, #0]
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_EXTI0, %function
_ISR_EXTI0:
PUSH {lr}
#--- Entprellen
BL delay
#--- Überprüfen, ob Taster noch gedrückt ist (PB0)
LDR r0, =GPIOB_IDR
LDR r1, [r0, #0]
MOVS r2, #0x01
TST r1, r2
BNE _clear_exti0
#--- LED0 & LED3 toggeln (1001 = 0x09)
LDR r0, =GPIOA_ODR
LDR r1, [r0, #0]
MOVS r2, #0x09
EORS r1, r2
STR r1, [r0, #0]
_clear_exti0:
#--- Interrupt Flag löschen
LDR r0, =EXTI_PR1
MOVS r1, #0x01
STR r1, [r0, #0]
POP {pc}
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_EXTI4, %function
_ISR_EXTI4:
PUSH {lr}
#--- Entprellen
BL delay
#--- Überprüfen, ob Taster noch gedrückt ist (PB4)
LDR r0, =GPIOB_IDR
LDR r1, [r0, #0]
MOVS r2, #0x10
TST r1, r2
BNE _clear_exti4
#--- LED1 & LED2 toggeln (0110 = 0x06)
LDR r0, =GPIOA_ODR
LDR r1, [r0, #0]
MOVS r2, #0x06
EORS r1, r2
STR r1, [r0, #0]
_clear_exti4:
#--- Interrupt Flag löschen
LDR r0, =EXTI_PR1
MOVS r1, #0x10
STR r1, [r0, #0]
POP {pc}
#----------------------------------------------------------------------------------------#
.lp2:
.ltorg
#----------------------------------------------------------------------------------------#
.end
hu

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x05
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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@ -1,147 +1,205 @@
/* *************************************************************************************** /* ***************************************************************************************
* Project: task1 - C:GPIO * Project: task1 - C:GPIO
* File: task1.c * File: task1.c
* *
* Language: C * Language: C
* *
* Hardware: STefi Light v1.1 * Hardware: STefi Light v1.1
* Processor: STM32G431KBT6U * Processor: STM32G431KBT6U
* *
* Author: Manuel Lederhofer * Author: Manuel Lederhofer
* Datum: 10.09.2021 * Datum: 10.09.2021
* *
* Version: 2.1 * Version: 2.1
* History: * History:
* 10.09.2021 ML create project * 10.09.2021 ML create project
* 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U * 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
* 18.02.2025 TK changed projectname to "C: GPIO) * 18.02.2025 TK changed projectname to "C: GPIO)
* *
* Status: under development * Status: under development
* *
* Description: * Description:
* Blinks the red LED of STefi Light, currently. * Blinks the red LED of STefi Light, currently.
* This file contains the main routine and the initialization. * This file contains the main routine and the initialization.
* *
* Notes: * Notes:
* - MCU speed at startup is 16 MHz * - MCU speed at startup is 16 MHz
* *
* Todo: * Todo:
* - Change the example code to match the description and requirements * - Change the example code to match the description and requirements
* of the requested application in the lab exercise guide. * of the requested application in the lab exercise guide.
* *
************************************************************************************** */ ************************************************************************************** */
/* ------------------------------------ INCLUDES -------------------------------------- */ /* ------------------------------------ INCLUDES -------------------------------------- */
#include "stm32g431xx.h" #include "stm32g431xx.h"
#include "STefi-Light.h" #include "STefi-Light.h"
/* ------------------------------------ DEFINES --------------------------------------- */ /* ------------------------------------ DEFINES --------------------------------------- */
#define LOOPS_PER_MS 1244 // NOP-loops for delay() #define LOOPS_PER_MS 1244 // NOP-loops for delay()
#define WAITTIME 500 #define WAITTIME 500
#define FIRST_LED 0
#define LAST_LED 3
/* ------------------------------------ TYPE DEFINITIONS ------------------------------ */ #define UP 1
/* ------------------------------------ GLOBAL VARIABLES ------------------------------ */ #define DOWN -1
int state = 0;
/* ------------------------------------ PRIVATE VARIABLES ----------------------------- */
/* ------------------------------------ TYPE DEFINITIONS ------------------------------ */
/* ------------------------------------ GLOBAL VARIABLES ------------------------------ */
/* ------------------------------------ PROTOTYPES ------------------------------------ */ int state = 0;
static void GPIO_init(void); /* ------------------------------------ PRIVATE VARIABLES ----------------------------- */
static void delay(const uint16_t ms);
/* ------------------------------------ PROTOTYPES ------------------------------------ */
/* ------------------------------------ M A I N --------------------------------------- */ static void GPIO_init(void);
int main(void) static void delay(const uint16_t ms);
{ static void blink(const unint numLED);
/* --- initialization --- */
__disable_irq(); // disable interrupts globally
/* ------------------------------------ M A I N --------------------------------------- */
GPIO_init(); int main(void)
{
__enable_irq(); // enable interrupts globally /* --- initialization --- */
__disable_irq(); // disable interrupts globally
/* --- one time tasks --- */ GPIO_init();
__enable_irq(); // enable interrupts globally
/* --- infinite processing loop --- */
while (1)
{ /* --- one time tasks --- */
/* ... add your code to implement the lab assignment ... */
switch (state) { /* --- infinite processing loop --- */
case 0:
GPIOA->ODR &= ~(1 << 1); // LED0 on while (1)
{
state++; /* ... add your code to implement the lab assignment ... */
break; int direction;
case 1:
delay(WAITTIME); // wait while(1){
state++; if(i == FIRST_LED){
break; direction = UP;
case 2: }
GPIOA->ODR |= (1 << 1); // LED0 off else if(i == LAST_LED){
delay(WAITTIME); // wait direction = DOWN;
state = 0; }
break;
default: blink(i); //One full LED blink cylce
break;
} if(direction == UP){
} i++;
}
return 1; else if(direction == DOWN){
} i--;
}
}
/* ------------------------------------ GLOBAL FUNCTIONS ------------------------------ */
/* ------------------------------------ PRIVATE FUNCTIONS ----------------------------- */ switch (state) {
case 0:
/* ------------------------------------------------------------------------------------ *\ GPIOA->ODR &= ~(1 << 0); // LED0 on
* method: static void GPIO_init(void) GPIOA->ODR &= ~(1 << 1);
* GPIOA->ODR &= ~(1 << 2);
* Initializes GPIOs on STefi Light for pins with peripherals attached. GPIOA->ODR &= ~(1 << 3);
*
* requires: - nothing - state++;
* parameters: - none - break;
* returns: - nothing - case 1:
\* ------------------------------------------------------------------------------------ */ delay(WAITTIME); // wait
static void GPIO_init(void) state++;
{ break;
/* enable port clocks */ case 2:
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // LEDs: A GPIOA->ODR |= (1 << 0); // LED0 off
GPIOA->ODR |= (1 << 1);
GPIOA->ODR |= (1 << 2);
/* --- LEDs --- */ GPIOA->ODR |= (1 << 3);
//GPIOA->ODR |= MASK_LED_RED; delay(WAITTIME); // wait
GPIOA->ODR |= MASK_LED_YELLOW; state = 0;
GPIOA->MODER &= ~(3 << 0); break;
GPIOA->MODER |= (1 << 1); // set LED pin to output default:
} break;
}
}
/* ------------------------------------------------------------------------------------ *\
* method: static void delay(const uint16_t ms) return 1;
* }
* Realizes a millisecond delay by very bad busy-wait.
*
* requires: - nothing - /* ------------------------------------ GLOBAL FUNCTIONS ------------------------------ */
* parameters: ms - delay time in milliseconds
* returns: - nothing -
\* ------------------------------------------------------------------------------------ */ /* ------------------------------------ PRIVATE FUNCTIONS ----------------------------- */
static void delay(const uint16_t ms)
{ /* ------------------------------------------------------------------------------------ *\
for (uint16_t i = 0; i < ms; ++i) * method: static void GPIO_init(void)
{ *
for (uint16_t j = 0; j < LOOPS_PER_MS; ++j) * Initializes GPIOs on STefi Light for pins with peripherals attached.
{ *
__asm("NOP"); * requires: - nothing -
} * parameters: - none -
} * returns: - nothing -
} \* ------------------------------------------------------------------------------------ */
static void GPIO_init(void)
{
/* ************************************ E O F ***************************************** */ /* enable port clocks */
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // LEDs: A
int i = FIRST_LED;
/* --- LEDs --- */
GPIOA->ODR |= MASK_LED_ALL;
GPIOA->MODER &= ~(3 << 0);
GPIOA->MODER &= ~(3 << 2);
GPIOA->MODER &= ~(3 << 4);
GPIOA->MODER &= ~(3 << 6);
GPIOA->MODER |= (1 << 0); // set LED pin to output
GPIOA->MODER |= (1 << 2);
GPIOA->MODER |= (1 << 4);
GPIOA->MODER |= (1 << 6);
}
/* ------------------------------------------------------------------------------------ *\
* method: static void delay(const uint16_t ms)
*
* Realizes a millisecond delay by very bad busy-wait.
*
* requires: - nothing -
* parameters: ms - delay time in milliseconds
* returns: - nothing -
\* ------------------------------------------------------------------------------------ */
static void delay(const uint16_t ms)
{
for (uint16_t i = 0; i < ms; ++i)
{
for (uint16_t j = 0; j < LOOPS_PER_MS; ++j)
{
__asm("NOP");
}
}
}
static void blink(const uint numLED)
{
switch (state) {
case 0:
GPIOA->ODR &= ~(1 << numLED); // LEDX on
state++;
break;
case 1:
delay(WAITTIME); // wait
state++;
break;
case 2:
GPIOA->ODR |= (1 << numLED); // LEDX off
delay(WAITTIME); // wait
state = default;
break;
default:
break;
}
/* ************************************ E O F ***************************************** */

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
# LDR r1, =GPIOB_MODER
# MOVS r3, #0x03
# LDR r0, [r1, #1]
# BICS r0, r3
# MOVS r3, #0x01
# ORRS r0, r0, r3
# STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x03
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x03
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOB_MODER
MOVS r3, #0x03
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x01
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#*****************************************************************************************
# Project: task2 - switch triggered LEDs
# File: G431_addr.s
#
# Language: ASM
#
# Hardware: STefi v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 20.08.2015
#
# Version: 3.0
# History:
# 20.08.2015 ML create file
# 07.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML change from absolute addresses to BASE + OFFSET notation and
# add more timer modules
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
#
# Status: working
#
# Description:
# Connects assembly addresses for STM32G431 MCU to symbolic register names
# used in the datasheets.
#
# Notes:
# - default MCU speed at startup is 16 MHz.
#
# ToDo:
# - none -
#*****************************************************************************************
#----------------------------------------------------------------------------------------#
# MCU Bus Base Addresses
#----------------------------------------------------------------------------------------#
.equ APB1_BASE, 0x40000000
.equ APB2_BASE, 0x40010000
.equ AHB1_BASE, 0x40020000
.equ AHB2_BASE, 0x48000000
.equ AHB3_BASE, 0xA0000000 //!!! FSMC + QSPI registers = AHB3 ?
.equ PPB_BASE, 0xE0000000 /* Cortex M4 with FPU Internal Peripherals */
#----------------------------------------------------------------------------------------#
# System Configuration Controller
#
# address space: 0x4001_0000 .. 0x4001_0029
#----------------------------------------------------------------------------------------#
.equ SYSCFG_BASE, APB2_BASE
.equ SYSCFG_MEMRMP, SYSCFG_BASE + 0x00
.equ SYSCFG_CFGR1, SYSCFG_BASE + 0x04
.equ SYSCFG_EXTICR1, SYSCFG_BASE + 0x08
.equ SYSCFG_EXTICR2, SYSCFG_BASE + 0x0C
.equ SYSCFG_EXTICR3, SYSCFG_BASE + 0x10
.equ SYSCFG_EXTICR4, SYSCFG_BASE + 0x14
.equ SYSCFG_SCSR, SYSCFG_BASE + 0x18
.equ SYSCFG_CFGR2, SYSCFG_BASE + 0x1C
.equ SYSCFG_SWPR, SYSCFG_BASE + 0x20
.equ SYSCFG_SKR, SYSCFG_BASE + 0x24
#----------------------------------------------------------------------------------------#
# Extended Interrupts And Events Controller
#
# address space: 0x4001_0400 .. 0x4001_07FF
#----------------------------------------------------------------------------------------#
.equ EXTI_BASE, APB2_BASE + 0x400
.equ EXTI_IMR1, EXTI_BASE + 0x00
.equ EXTI_EMR1, EXTI_BASE + 0x04
.equ EXTI_RTSR1, EXTI_BASE + 0x08
.equ EXTI_FTSR1, EXTI_BASE + 0x0C
.equ EXTI_SWIER1, EXTI_BASE + 0x10
.equ EXTI_PR1, EXTI_BASE + 0x14
.equ EXTI_IMR2, EXTI_BASE + 0x20
.equ EXTI_EMR2, EXTI_BASE + 0x24
.equ EXTI_RTSR2, EXTI_BASE + 0x28
.equ EXTI_FTSR2, EXTI_BASE + 0x2C
.equ EXTI_SWIER2, EXTI_BASE + 0x30
.equ EXTI_PR2, EXTI_BASE + 0x34
#----------------------------------------------------------------------------------------#
# TIM module common configuration
#
# Every timer has 1 KB address space:
#
# TIM2 .. TIM7: 0x4000_0000 .. 0x4000_17FF (APB1)
# TIM1: 0x4001_2C00 .. 0x4001_2FFF (APB2)
# TIM8: 0x4001_3400 .. 0x4001_37FF (APB2)
# TIM15 .. TIM17: 0x4001_4000 .. 0x4001_4BFF (APB2)
# TIM20: 0x4001_5000 .. 0x4001_53FF (APB2)
#
# note:
# TIM2 + TIM5 are 32 bit timers. All others have a width of 16 bit.
# Below, the timers on one line share a common register set description.
#
# TIM 1, 8, 20 advances control timers
# TIM 2, 3, 4, 5 general purpose timers (TIM2/5 = 32 bit)
# TIM 15 general purpose timers
# TIM 16, 17 general purpose timers
# TIM 6, 7 basic timers
#----------------------------------------------------------------------------------------#
.equ TIM_CR1_OFFSET, 0x00
.equ TIM_CR2_OFFSET, 0x04
.equ TIM_SMCR_OFFSET, 0x08
.equ TIM_DIER_OFFSET, 0x0C
.equ TIM_SR_OFFSET, 0x10
.equ TIM_EGR_OFFSET, 0x14
.equ TIM_CCMR1_OFFSET, 0x18
.equ TIM_CCMR2_OFFSET, 0x1C
.equ TIM_CCER_OFFSET, 0x20
.equ TIM_CNT_OFFSET, 0x24
.equ TIM_PSC_OFFSET, 0x28
.equ TIM_ARR_OFFSET, 0x2C
.equ TIM_RCR_OFFSET, 0x30
.equ TIM_CCR1_OFFSET, 0x34
.equ TIM_CCR2_OFFSET, 0x38
.equ TIM_CCR3_OFFSET, 0x3C
.equ TIM_CCR4_OFFSET, 0x40
.equ TIM_BDTR_OFFSET, 0x44
.equ TIM_CCR5_OFFSET, 0x48
.equ TIM_CCR6_OFFSET, 0x4C
.equ TIM_CCMR3_OFFSET, 0x50
.equ TIM_DTR2_OFFSET, 0x54
.equ TIM_ECR_OFFSET, 0x58
.equ TIM_TISEL_OFFSET, 0x5C
.equ TIM_AF1_OFFSET, 0x60
.equ TIM_AF2_OFFSET, 0x64
.equ TIM_OR1_OFFSET, 0x68
.equ TIM_DCR_OFFSET, 0x3DC
.equ TIM_DMAR_OFFSET, 0x3E0
#- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #
#--- Genral Purpose Timer - TIM2 / address space: 0x4000_0000 .. 0x4000_03FF
.equ TIM2_BASE, APB1_BASE
.equ TIM2_CR1, TIM2_BASE + TIM_CR1_OFFSET
.equ TIM2_CR2, TIM2_BASE + TIM_CR2_OFFSET
.equ TIM2_SMCR, TIM2_BASE + TIM_SMCR_OFFSET
.equ TIM2_DIER, TIM2_BASE + TIM_DIER_OFFSET
.equ TIM2_SR, TIM2_BASE + TIM_SR_OFFSET
.equ TIM2_EGR, TIM2_BASE + TIM_EGR_OFFSET
.equ TIM2_CCMR1, TIM2_BASE + TIM_CCMR1_OFFSET
.equ TIM2_CCMR2, TIM2_BASE + TIM_CCMR2_OFFSET
.equ TIM2_CCER, TIM2_BASE + TIM_CCER_OFFSET
.equ TIM2_CNT, TIM2_BASE + TIM_CNT_OFFSET
.equ TIM2_PSC, TIM2_BASE + TIM_PSC_OFFSET
.equ TIM2_ARR, TIM2_BASE + TIM_ARR_OFFSET
.equ TIM2_CCR1, TIM2_BASE + TIM_CCR1_OFFSET
.equ TIM2_CCR2, TIM2_BASE + TIM_CCR2_OFFSET
.equ TIM2_CCR3, TIM2_BASE + TIM_CCR3_OFFSET
.equ TIM2_CCR4, TIM2_BASE + TIM_CCR4_OFFSET
.equ TIM2_ECR, TIM2_BASE + TIM_ECR_OFFSET
.equ TIM2_TISEL, TIM2_BASE + TIM_TISEL_OFFSET
.equ TIM2_AF1, TIM2_BASE + TIM_ECR_OFFSET
.equ TIM2_AF2, TIM2_BASE + TIM_ECR_OFFSET
.equ TIM2_DCR, TIM2_BASE + TIM_DCR_OFFSET
.equ TIM2_DMAR, TIM2_BASE + TIM_DMAR_OFFSET
#--- Genral Purpose Timer - TIM3 / address space: 0x4000_0400 .. 0x4000_07FF
.equ TIM3_BASE, APB1_BASE + 0x400
.equ TIM3_CR1, TIM3_BASE + TIM_CR1_OFFSET
.equ TIM3_CR2, TIM3_BASE + TIM_CR2_OFFSET
.equ TIM3_SMCR, TIM3_BASE + TIM_SMCR_OFFSET
.equ TIM3_DIER, TIM3_BASE + TIM_DIER_OFFSET
.equ TIM3_SR, TIM3_BASE + TIM_SR_OFFSET
.equ TIM3_EGR, TIM3_BASE + TIM_EGR_OFFSET
.equ TIM3_CCMR1, TIM3_BASE + TIM_CCMR1_OFFSET
.equ TIM3_CCMR2, TIM3_BASE + TIM_CCMR2_OFFSET
.equ TIM3_CCER, TIM3_BASE + TIM_CCER_OFFSET
.equ TIM3_CNT, TIM3_BASE + TIM_CNT_OFFSET
.equ TIM3_PSC, TIM3_BASE + TIM_PSC_OFFSET
.equ TIM3_ARR, TIM3_BASE + TIM_ARR_OFFSET
.equ TIM3_CCR1, TIM3_BASE + TIM_CCR1_OFFSET
.equ TIM3_CCR2, TIM3_BASE + TIM_CCR2_OFFSET
.equ TIM3_CCR3, TIM3_BASE + TIM_CCR3_OFFSET
.equ TIM3_CCR4, TIM3_BASE + TIM_CCR4_OFFSET
.equ TIM3_ECR, TIM3_BASE + TIM_ECR_OFFSET
.equ TIM3_TISEL, TIM3_BASE + TIM_TISEL_OFFSET
.equ TIM3_AF1, TIM3_BASE + TIM_ECR_OFFSET
.equ TIM3_AF2, TIM3_BASE + TIM_ECR_OFFSET
.equ TIM3_DCR, TIM3_BASE + TIM_DCR_OFFSET
.equ TIM3_DMAR, TIM3_BASE + TIM_DMAR_OFFSET
#--- Genral Purpose Timer - TIM4 / address space: 0x4000_0800 .. 0x4000_0BFF
.equ TIM4_BASE, APB1_BASE + 0x800
.equ TIM4_CR1, TIM4_BASE + TIM_CR1_OFFSET
.equ TIM4_CR2, TIM4_BASE + TIM_CR2_OFFSET
.equ TIM4_SMCR, TIM4_BASE + TIM_SMCR_OFFSET
.equ TIM4_DIER, TIM4_BASE + TIM_DIER_OFFSET
.equ TIM4_SR, TIM4_BASE + TIM_SR_OFFSET
.equ TIM4_EGR, TIM4_BASE + TIM_EGR_OFFSET
.equ TIM4_CCMR1, TIM4_BASE + TIM_CCMR1_OFFSET
.equ TIM4_CCMR2, TIM4_BASE + TIM_CCMR2_OFFSET
.equ TIM4_CCER, TIM4_BASE + TIM_CCER_OFFSET
.equ TIM4_CNT, TIM4_BASE + TIM_CNT_OFFSET
.equ TIM4_PSC, TIM4_BASE + TIM_PSC_OFFSET
.equ TIM4_ARR, TIM4_BASE + TIM_ARR_OFFSET
.equ TIM4_CCR1, TIM4_BASE + TIM_CCR1_OFFSET
.equ TIM4_CCR2, TIM4_BASE + TIM_CCR2_OFFSET
.equ TIM4_CCR3, TIM4_BASE + TIM_CCR3_OFFSET
.equ TIM4_CCR4, TIM4_BASE + TIM_CCR4_OFFSET
.equ TIM4_ECR, TIM4_BASE + TIM_ECR_OFFSET
.equ TIM4_TISEL, TIM4_BASE + TIM_TISEL_OFFSET
.equ TIM4_AF1, TIM4_BASE + TIM_ECR_OFFSET
.equ TIM4_AF2, TIM4_BASE + TIM_ECR_OFFSET
.equ TIM4_DCR, TIM4_BASE + TIM_DCR_OFFSET
.equ TIM4_DMAR, TIM4_BASE + TIM_DMAR_OFFSET
#--- Genral Purpose Timer - TIM5 / address space: 0x4000_0C00 .. 0x4000_0FFF
.equ TIM5_BASE, APB1_BASE + 0xC00
.equ TIM5_CR1, TIM5_BASE + TIM_CR1_OFFSET
.equ TIM5_CR2, TIM5_BASE + TIM_CR2_OFFSET
.equ TIM5_SMCR, TIM5_BASE + TIM_SMCR_OFFSET
.equ TIM5_DIER, TIM5_BASE + TIM_DIER_OFFSET
.equ TIM5_SR, TIM5_BASE + TIM_SR_OFFSET
.equ TIM5_EGR, TIM5_BASE + TIM_EGR_OFFSET
.equ TIM5_CCMR1, TIM5_BASE + TIM_CCMR1_OFFSET
.equ TIM5_CCMR2, TIM5_BASE + TIM_CCMR2_OFFSET
.equ TIM5_CCER, TIM5_BASE + TIM_CCER_OFFSET
.equ TIM5_CNT, TIM5_BASE + TIM_CNT_OFFSET
.equ TIM5_PSC, TIM5_BASE + TIM_PSC_OFFSET
.equ TIM5_ARR, TIM5_BASE + TIM_ARR_OFFSET
.equ TIM5_CCR1, TIM5_BASE + TIM_CCR1_OFFSET
.equ TIM5_CCR2, TIM5_BASE + TIM_CCR2_OFFSET
.equ TIM5_CCR3, TIM5_BASE + TIM_CCR3_OFFSET
.equ TIM5_CCR4, TIM5_BASE + TIM_CCR4_OFFSET
.equ TIM5_ECR, TIM5_BASE + TIM_ECR_OFFSET
.equ TIM5_TISEL, TIM5_BASE + TIM_TISEL_OFFSET
.equ TIM5_AF1, TIM5_BASE + TIM_ECR_OFFSET
.equ TIM5_AF2, TIM5_BASE + TIM_ECR_OFFSET
.equ TIM5_DCR, TIM5_BASE + TIM_DCR_OFFSET
.equ TIM5_DMAR, TIM5_BASE + TIM_DMAR_OFFSET
#--- Basic Timer - TIM6 / address space: 0x4000_1000 .. 0x4000_13FF
.equ TIM6_BASE, APB1_BASE + 0x1000
.equ TIM6_CR1, TIM6_BASE + TIM_CR1_OFFSET
.equ TIM6_CR2, TIM6_BASE + TIM_CR2_OFFSET
.equ TIM6_DIER, TIM6_BASE + TIM_DIER_OFFSET
.equ TIM6_SR, TIM6_BASE + TIM_SR_OFFSET
.equ TIM6_EGR, TIM6_BASE + TIM_EGR_OFFSET
.equ TIM6_CNT, TIM6_BASE + TIM_CNT_OFFSET
.equ TIM6_PSC, TIM6_BASE + TIM_PSC_OFFSET
.equ TIM6_ARR, TIM6_BASE + TIM_ARR_OFFSET
#--- Basic Timer - TIM7 / address space: 0x4000_1400 .. 0x4000_17FF
.equ TIM7_BASE, APB1_BASE + 0x1400
.equ TIM7_CR1, TIM7_BASE + TIM_CR1_OFFSET
.equ TIM7_CR2, TIM7_BASE + TIM_CR2_OFFSET
.equ TIM7_DIER, TIM7_BASE + TIM_DIER_OFFSET
.equ TIM7_SR, TIM7_BASE + TIM_SR_OFFSET
.equ TIM7_EGR, TIM7_BASE + TIM_EGR_OFFSET
.equ TIM7_CNT, TIM7_BASE + TIM_CNT_OFFSET
.equ TIM7_PSC, TIM7_BASE + TIM_PSC_OFFSET
.equ TIM7_ARR, TIM7_BASE + TIM_ARR_OFFSET
#--- Advanced Control Timer - TIM1 / address space: 0x4001_2C00 .. 0x4001_2FFF
.equ TIM1_BASE, APB2_BASE + 0x2C00
.equ TIM1_CR1, TIM1_BASE + TIM_CR1_OFFSET
.equ TIM1_CR2, TIM1_BASE + TIM_CR2_OFFSET
.equ TIM1_SMCR, TIM1_BASE + TIM_SMCR_OFFSET
.equ TIM1_DIER, TIM1_BASE + TIM_DIER_OFFSET
.equ TIM1_SR, TIM1_BASE + TIM_SR_OFFSET
.equ TIM1_EGR, TIM1_BASE + TIM_EGR_OFFSET
.equ TIM1_CCMR1, TIM1_BASE + TIM_CCMR1_OFFSET
.equ TIM1_CCMR2, TIM1_BASE + TIM_CCMR2_OFFSET
.equ TIM1_CCER, TIM1_BASE + TIM_CCER_OFFSET
.equ TIM1_CNT, TIM1_BASE + TIM_CNT_OFFSET
.equ TIM1_PSC, TIM1_BASE + TIM_PSC_OFFSET
.equ TIM1_ARR, TIM1_BASE + TIM_ARR_OFFSET
.equ TIM1_RCR, TIM1_BASE + TIM_RCR_OFFSET
.equ TIM1_CCR1, TIM1_BASE + TIM_CCR1_OFFSET
.equ TIM1_CCR2, TIM1_BASE + TIM_CCR2_OFFSET
.equ TIM1_CCR3, TIM1_BASE + TIM_CCR3_OFFSET
.equ TIM1_CCR4, TIM1_BASE + TIM_CCR4_OFFSET
.equ TIM1_BDTR, TIM1_BASE + TIM_BDTR_OFFSET
.equ TIM1_CCR5, TIM1_BASE + TIM_CCR5_OFFSET
.equ TIM1_CCR6, TIM1_BASE + TIM_CCR6_OFFSET
.equ TIM1_CCMR3, TIM1_BASE + TIM_CCMR3_OFFSET
.equ TIM1_DTR2, TIM1_BASE + TIM_DTR2_OFFSET
.equ TIM1_ECR, TIM1_BASE + TIM_ECR_OFFSET
.equ TIM1_TISEL, TIM1_BASE + TIM_TISEL_OFFSET
.equ TIM1_AF1, TIM1_BASE + TIM_AF1_OFFSET
.equ TIM1_AF2, TIM1_BASE + TIM_AF2_OFFSET
.equ TIM1_DCR, TIM1_BASE + TIM_DCR_OFFSET
.equ TIM1_DMAR, TIM1_BASE + TIM_DMAR_OFFSET
#--- Advanced Control Timer - TIM8 / address space: 0x4001_3400 .. 0x4001_37FF
.equ TIM8_BASE, APB2_BASE + 0x3400
.equ TIM8_CR1, TIM8_BASE + TIM_CR1_OFFSET
.equ TIM8_CR2, TIM8_BASE + TIM_CR2_OFFSET
.equ TIM8_SMCR, TIM8_BASE + TIM_SMCR_OFFSET
.equ TIM8_DIER, TIM8_BASE + TIM_DIER_OFFSET
.equ TIM8_SR, TIM8_BASE + TIM_SR_OFFSET
.equ TIM8_EGR, TIM8_BASE + TIM_EGR_OFFSET
.equ TIM8_CCMR1, TIM8_BASE + TIM_CCMR1_OFFSET
.equ TIM8_CCMR2, TIM8_BASE + TIM_CCMR2_OFFSET
.equ TIM8_CCER, TIM8_BASE + TIM_CCER_OFFSET
.equ TIM8_CNT, TIM8_BASE + TIM_CNT_OFFSET
.equ TIM8_PSC, TIM8_BASE + TIM_PSC_OFFSET
.equ TIM8_ARR, TIM8_BASE + TIM_ARR_OFFSET
.equ TIM8_RCR, TIM8_BASE + TIM_RCR_OFFSET
.equ TIM8_CCR1, TIM8_BASE + TIM_CCR1_OFFSET
.equ TIM8_CCR2, TIM8_BASE + TIM_CCR2_OFFSET
.equ TIM8_CCR3, TIM8_BASE + TIM_CCR3_OFFSET
.equ TIM8_CCR4, TIM8_BASE + TIM_CCR4_OFFSET
.equ TIM8_BDTR, TIM8_BASE + TIM_BDTR_OFFSET
.equ TIM8_CCR5, TIM8_BASE + TIM_CCR5_OFFSET
.equ TIM8_CCR6, TIM8_BASE + TIM_CCR6_OFFSET
.equ TIM8_CCMR3, TIM8_BASE + TIM_CCMR3_OFFSET
.equ TIM8_DTR2, TIM8_BASE + TIM_DTR2_OFFSET
.equ TIM8_ECR, TIM8_BASE + TIM_ECR_OFFSET
.equ TIM8_TISEL, TIM8_BASE + TIM_TISEL_OFFSET
.equ TIM8_AF1, TIM8_BASE + TIM_AF1_OFFSET
.equ TIM8_AF2, TIM8_BASE + TIM_AF2_OFFSET
.equ TIM8_DCR, TIM8_BASE + TIM_DCR_OFFSET
.equ TIM8_DMAR, TIM8_BASE + TIM_DMAR_OFFSET
#--- Advanced Control Timer - TIM20 / address space: 0x4001_5000 .. 0x4001_53FF
.equ TIM20_BASE, APB2_BASE + 0x5000
.equ TIM20_CR1, TIM20_BASE + TIM_CR1_OFFSET
.equ TIM20_CR2, TIM20_BASE + TIM_CR2_OFFSET
.equ TIM20_SMCR, TIM20_BASE + TIM_SMCR_OFFSET
.equ TIM20_DIER, TIM20_BASE + TIM_DIER_OFFSET
.equ TIM20_SR, TIM20_BASE + TIM_SR_OFFSET
.equ TIM20_EGR, TIM20_BASE + TIM_EGR_OFFSET
.equ TIM20_CCMR1, TIM20_BASE + TIM_CCMR1_OFFSET
.equ TIM20_CCMR2, TIM20_BASE + TIM_CCMR2_OFFSET
.equ TIM20_CCER, TIM20_BASE + TIM_CCER_OFFSET
.equ TIM20_CNT, TIM20_BASE + TIM_CNT_OFFSET
.equ TIM20_PSC, TIM20_BASE + TIM_PSC_OFFSET
.equ TIM20_ARR, TIM20_BASE + TIM_ARR_OFFSET
.equ TIM20_RCR, TIM20_BASE + TIM_RCR_OFFSET
.equ TIM20_CCR1, TIM20_BASE + TIM_CCR1_OFFSET
.equ TIM20_CCR2, TIM20_BASE + TIM_CCR2_OFFSET
.equ TIM20_CCR3, TIM20_BASE + TIM_CCR3_OFFSET
.equ TIM20_CCR4, TIM20_BASE + TIM_CCR4_OFFSET
.equ TIM20_BDTR, TIM20_BASE + TIM_BDTR_OFFSET
.equ TIM20_CCR5, TIM20_BASE + TIM_CCR5_OFFSET
.equ TIM20_CCR6, TIM20_BASE + TIM_CCR6_OFFSET
.equ TIM20_CCMR3, TIM20_BASE + TIM_CCMR3_OFFSET
.equ TIM20_DTR2, TIM20_BASE + TIM_DTR2_OFFSET
.equ TIM20_ECR, TIM20_BASE + TIM_ECR_OFFSET
.equ TIM20_TISEL, TIM20_BASE + TIM_TISEL_OFFSET
.equ TIM20_AF1, TIM20_BASE + TIM_AF1_OFFSET
.equ TIM20_AF2, TIM20_BASE + TIM_AF2_OFFSET
.equ TIM20_DCR, TIM20_BASE + TIM_DCR_OFFSET
.equ TIM20_DMAR, TIM20_BASE + TIM_DMAR_OFFSET
#--- Genral Purpose Timer - TIM15 / address space: 0x4001_4000 .. 0x4001_43FF
.equ TIM15_BASE, APB2_BASE + 0x4000
.equ TIM15_CR1, TIM15_BASE + TIM_CR1_OFFSET
.equ TIM15_CR2, TIM15_BASE + TIM_CR2_OFFSET
.equ TIM15_SMCR, TIM15_BASE + TIM_SMCR_OFFSET
.equ TIM15_DIER, TIM15_BASE + TIM_DIER_OFFSET
.equ TIM15_SR, TIM15_BASE + TIM_SR_OFFSET
.equ TIM15_EGR, TIM15_BASE + TIM_EGR_OFFSET
.equ TIM15_CCMR1, TIM15_BASE + TIM_CCMR1_OFFSET
.equ TIM15_CCER, TIM15_BASE + TIM_CCER_OFFSET
.equ TIM15_CNT, TIM15_BASE + TIM_CNT_OFFSET
.equ TIM15_PSC, TIM15_BASE + TIM_PSC_OFFSET
.equ TIM15_ARR, TIM15_BASE + TIM_ARR_OFFSET
.equ TIM15_RCR, TIM15_BASE + TIM_RCR_OFFSET
.equ TIM15_CCR1, TIM15_BASE + TIM_CCR1_OFFSET
.equ TIM15_CCR2, TIM15_BASE + TIM_CCR2_OFFSET
.equ TIM15_BDTR, TIM15_BASE + TIM_BDTR_OFFSET
.equ TIM15_DTR2, TIM15_BASE + TIM_DTR2_OFFSET
.equ TIM15_TISEL, TIM15_BASE + TIM_TISEL_OFFSET
.equ TIM15_AF1, TIM15_BASE + TIM_AF1_OFFSET
.equ TIM15_AF2, TIM15_BASE + TIM_AF2_OFFSET
.equ TIM15_DCR, TIM15_BASE + TIM_DCR_OFFSET
.equ TIM15_DMAR, TIM15_BASE + TIM_DMAR_OFFSET
#--- Genral Purpose Timer - TIM16 / address space: 0x4001_4400 .. 0x4001_47FF
.equ TIM16_BASE, APB2_BASE + 0x4400
.equ TIM16_CR1, TIM16_BASE + TIM_CR1_OFFSET
.equ TIM16_CR2, TIM16_BASE + TIM_CR2_OFFSET
.equ TIM16_DIER, TIM16_BASE + TIM_DIER_OFFSET
.equ TIM16_SR, TIM16_BASE + TIM_SR_OFFSET
.equ TIM16_EGR, TIM16_BASE + TIM_EGR_OFFSET
.equ TIM16_CCMR1, TIM16_BASE + TIM_CCMR1_OFFSET
.equ TIM16_CCER, TIM16_BASE + TIM_CCER_OFFSET
.equ TIM16_CNT, TIM16_BASE + TIM_CNT_OFFSET
.equ TIM16_PSC, TIM16_BASE + TIM_PSC_OFFSET
.equ TIM16_ARR, TIM16_BASE + TIM_ARR_OFFSET
.equ TIM16_RCR, TIM16_BASE + TIM_RCR_OFFSET
.equ TIM16_CCR1, TIM16_BASE + TIM_CCR1_OFFSET
.equ TIM16_BDTR, TIM16_BASE + TIM_BDTR_OFFSET
.equ TIM16_DTR2, TIM16_BASE + TIM_DTR2_OFFSET
.equ TIM16_TISEL, TIM16_BASE + TIM_TISEL_OFFSET
.equ TIM16_AF1, TIM16_BASE + TIM_AF1_OFFSET
.equ TIM16_AF2, TIM16_BASE + TIM_AF2_OFFSET
.equ TIM16_OR1, TIM16_BASE + TIM_OR1_OFFSET
.equ TIM16_DCR, TIM16_BASE + TIM_DCR_OFFSET
.equ TIM16_DMAR, TIM16_BASE + TIM_DMAR_OFFSET
#--- Genral Purpose Timer - TIM17 / address space: 0x4001_4800 .. 0x4001_4BFF
.equ TIM17_BASE, APB2_BASE + 0x4800
.equ TIM17_CR1, TIM17_BASE + TIM_CR1_OFFSET
.equ TIM17_CR2, TIM17_BASE + TIM_CR2_OFFSET
.equ TIM17_DIER, TIM17_BASE + TIM_DIER_OFFSET
.equ TIM17_SR, TIM17_BASE + TIM_SR_OFFSET
.equ TIM17_EGR, TIM17_BASE + TIM_EGR_OFFSET
.equ TIM17_CCMR1, TIM17_BASE + TIM_CCMR1_OFFSET
.equ TIM17_CCER, TIM17_BASE + TIM_CCER_OFFSET
.equ TIM17_CNT, TIM17_BASE + TIM_CNT_OFFSET
.equ TIM17_PSC, TIM17_BASE + TIM_PSC_OFFSET
.equ TIM17_ARR, TIM17_BASE + TIM_ARR_OFFSET
.equ TIM17_RCR, TIM17_BASE + TIM_RCR_OFFSET
.equ TIM17_CCR1, TIM17_BASE + TIM_CCR1_OFFSET
.equ TIM17_BDTR, TIM17_BASE + TIM_BDTR_OFFSET
.equ TIM17_DTR2, TIM17_BASE + TIM_DTR2_OFFSET
.equ TIM17_TISEL, TIM17_BASE + TIM_TISEL_OFFSET
.equ TIM17_AF1, TIM17_BASE + TIM_AF1_OFFSET
.equ TIM17_AF2, TIM17_BASE + TIM_AF2_OFFSET
.equ TIM17_OR1, TIM17_BASE + TIM_OR1_OFFSET
.equ TIM17_DCR, TIM17_BASE + TIM_DCR_OFFSET
.equ TIM17_DMAR, TIM17_BASE + TIM_DMAR_OFFSET
#----------------------------------------------------------------------------------------#
# Reset and Clock Control
#
# address space: 0x4002_1000 .. 0x4002_13FF
#----------------------------------------------------------------------------------------#
.equ RCC_BASE, AHB1_BASE + 0x1000
.equ RCC_CR, RCC_BASE + 0x00
.equ RCC_ICSCR, RCC_BASE + 0x04
.equ RCC_CFGR, RCC_BASE + 0x08
.equ RCC_PLLCFGR, RCC_BASE + 0x0C
.equ RCC_CIER, RCC_BASE + 0x18
.equ RCC_CIFR, RCC_BASE + 0x1C
.equ RCC_CICR, RCC_BASE + 0x20
.equ RCC_AHB1RSTR, RCC_BASE + 0x28
.equ RCC_AHB2RSTR, RCC_BASE + 0x2C
.equ RCC_AHB3RSTR, RCC_BASE + 0x30
.equ RCC_APB1RSTR1, RCC_BASE + 0x38
.equ RCC_APB1RSTR2, RCC_BASE + 0x3C
.equ RCC_APB2RSTR, RCC_BASE + 0x40
.equ RCC_AHB1ENR, RCC_BASE + 0x48
.equ RCC_AHB2ENR, RCC_BASE + 0x4C
.equ RCC_AHB3ENR, RCC_BASE + 0x50
.equ RCC_APB1ENR1, RCC_BASE + 0x58
.equ RCC_APB1ENR2, RCC_BASE + 0x5C
.equ RCC_APB2ENR, RCC_BASE + 0x60
.equ RCC_AHB1SMENR, RCC_BASE + 0x68
.equ RCC_AHB2SMENR, RCC_BASE + 0x6C
.equ RCC_AHB3SMENR, RCC_BASE + 0x70
.equ RCC_APB1SMENR1, RCC_BASE + 0x78
.equ RCC_APB1SMENR2, RCC_BASE + 0x7C
.equ RCC_APB2SMENR, RCC_BASE + 0x80
.equ RCC_CCIPR, RCC_BASE + 0x88
.equ RCC_BDCR, RCC_BASE + 0x90
.equ RCC_CSR, RCC_BASE + 0x94
.equ RCC_CRRCR, RCC_BASE + 0x98
.equ RCC_CCIPR2, RCC_BASE + 0x9C
#----------------------------------------------------------------------------------------#
# GPIO module common configuration
#
# address space: 0x4800_0000 .. 0x4800_1FFF
#----------------------------------------------------------------------------------------#
.equ GPIO_BASE, AHB2_BASE
.equ GPIO_MODER_OFFSET, 0x00
.equ GPIO_OTYPER_OFFSET, 0x04
.equ GPIO_OSPEEDR_OFFSET, 0x08
.equ GPIO_PUPDR_OFFSET, 0x0C
.equ GPIO_IDR_OFFSET, 0x10
.equ GPIO_ODR_OFFSET, 0x14
.equ GPIO_BSRR_OFFSET, 0x18
.equ GPIO_LCKR_OFFSET, 0x1C
.equ GPIO_AFRL_OFFSET, 0x20
.equ GPIO_AFRH_OFFSET, 0x24
.equ GPIO_BRR_OFFSET, 0x28
#- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #
#--- Port A GPIO configuration / address space: 0x4800_0000 .. 0x4800_03FF
.equ GPIOA_BASE, GPIO_BASE
.equ GPIOA_MODER, GPIOA_BASE + GPIO_MODER_OFFSET
.equ GPIOA_OTYPER, GPIOA_BASE + GPIO_OTYPER_OFFSET
.equ GPIOA_OSPEEDR, GPIOA_BASE + GPIO_OSPEEDR_OFFSET
.equ GPIOA_PUPDR, GPIOA_BASE + GPIO_PUPDR_OFFSET
.equ GPIOA_IDR, GPIOA_BASE + GPIO_IDR_OFFSET
.equ GPIOA_ODR, GPIOA_BASE + GPIO_ODR_OFFSET
.equ GPIOA_BSRR, GPIOA_BASE + GPIO_BSRR_OFFSET
.equ GPIOA_LCKR, GPIOA_BASE + GPIO_LCKR_OFFSET
.equ GPIOA_AFRL, GPIOA_BASE + GPIO_AFRL_OFFSET
.equ GPIOA_AFRH, GPIOA_BASE + GPIO_AFRH_OFFSET
.equ GPIOA_BRR, GPIOA_BASE + GPIO_BRR_OFFSET
#--- Port B GPIO configuration / address space: 0x4800_0400 .. 0x4800_07FF
.equ GPIOB_BASE, GPIO_BASE + 0x400
.equ GPIOB_MODER, GPIOB_BASE + GPIO_MODER_OFFSET
.equ GPIOB_OTYPER, GPIOB_BASE + GPIO_OTYPER_OFFSET
.equ GPIOB_OSPEEDR, GPIOB_BASE + GPIO_OSPEEDR_OFFSET
.equ GPIOB_PUPDR, GPIOB_BASE + GPIO_PUPDR_OFFSET
.equ GPIOB_IDR, GPIOB_BASE + GPIO_IDR_OFFSET
.equ GPIOB_ODR, GPIOB_BASE + GPIO_ODR_OFFSET
.equ GPIOB_BSRR, GPIOB_BASE + GPIO_BSRR_OFFSET
.equ GPIOB_LCKR, GPIOB_BASE + GPIO_LCKR_OFFSET
.equ GPIOB_AFRL, GPIOB_BASE + GPIO_AFRL_OFFSET
.equ GPIOB_AFRH, GPIOB_BASE + GPIO_AFRH_OFFSET
.equ GPIOB_BRR, GPIOB_BASE + GPIO_BRR_OFFSET
#--- Port C GPIO configuration / address space: 0x4800_0800 .. 0x4800_0BFF
.equ GPIOC_BASE, GPIO_BASE + 0x800
.equ GPIOC_MODER, GPIOC_BASE + GPIO_MODER_OFFSET
.equ GPIOC_OTYPER, GPIOC_BASE + GPIO_OTYPER_OFFSET
.equ GPIOC_OSPEEDR, GPIOC_BASE + GPIO_OSPEEDR_OFFSET
.equ GPIOC_PUPDR, GPIOC_BASE + GPIO_PUPDR_OFFSET
.equ GPIOC_IDR, GPIOC_BASE + GPIO_IDR_OFFSET
.equ GPIOC_ODR, GPIOC_BASE + GPIO_ODR_OFFSET
.equ GPIOC_BSRR, GPIOC_BASE + GPIO_BSRR_OFFSET
.equ GPIOC_LCKR, GPIOC_BASE + GPIO_LCKR_OFFSET
.equ GPIOC_AFRL, GPIOC_BASE + GPIO_AFRL_OFFSET
.equ GPIOC_AFRH, GPIOC_BASE + GPIO_AFRH_OFFSET
.equ GPIOC_BRR, GPIOC_BASE + GPIO_BRR_OFFSET
#--- Port D GPIO configuration / address space: 0x4800_0C00 .. 0x4800_0FFF
.equ GPIOD_BASE, GPIO_BASE + 0xC00
.equ GPIOD_MODER, GPIOD_BASE + GPIO_MODER_OFFSET
.equ GPIOD_OTYPER, GPIOD_BASE + GPIO_OTYPER_OFFSET
.equ GPIOD_OSPEEDR, GPIOD_BASE + GPIO_OSPEEDR_OFFSET
.equ GPIOD_PUPDR, GPIOD_BASE + GPIO_PUPDR_OFFSET
.equ GPIOD_IDR, GPIOD_BASE + GPIO_IDR_OFFSET
.equ GPIOD_ODR, GPIOD_BASE + GPIO_ODR_OFFSET
.equ GPIOD_BSRR, GPIOD_BASE + GPIO_BSRR_OFFSET
.equ GPIOD_LCKR, GPIOD_BASE + GPIO_LCKR_OFFSET
.equ GPIOD_AFRL, GPIOD_BASE + GPIO_AFRL_OFFSET
.equ GPIOD_AFRH, GPIOD_BASE + GPIO_AFRH_OFFSET
.equ GPIOD_BRR, GPIOD_BASE + GPIO_BRR_OFFSET
#--- Port E GPIO configuration / address space: 0x4800_1000 .. 0x4800_13FF
.equ GPIOE_BASE, GPIO_BASE + 0x1000
.equ GPIOE_MODER, GPIOE_BASE + GPIO_MODER_OFFSET
.equ GPIOE_OTYPER, GPIOE_BASE + GPIO_OTYPER_OFFSET
.equ GPIOE_OSPEEDR, GPIOE_BASE + GPIO_OSPEEDR_OFFSET
.equ GPIOE_PUPDR, GPIOE_BASE + GPIO_PUPDR_OFFSET
.equ GPIOE_IDR, GPIOE_BASE + GPIO_IDR_OFFSET
.equ GPIOE_ODR, GPIOE_BASE + GPIO_ODR_OFFSET
.equ GPIOE_BSRR, GPIOE_BASE + GPIO_BSRR_OFFSET
.equ GPIOE_LCKR, GPIOE_BASE + GPIO_LCKR_OFFSET
.equ GPIOE_AFRL, GPIOE_BASE + GPIO_AFRL_OFFSET
.equ GPIOE_AFRH, GPIOE_BASE + GPIO_AFRH_OFFSET
.equ GPIOE_BRR, GPIOE_BASE + GPIO_BRR_OFFSET
#--- Port F GPIO configuration / address space: 0x4800_1400 .. 0x4800_17FF
.equ GPIOF_BASE, GPIO_BASE + 0x1400
.equ GPIOF_MODER, GPIOF_BASE + GPIO_MODER_OFFSET
.equ GPIOF_OTYPER, GPIOF_BASE + GPIO_OTYPER_OFFSET
.equ GPIOF_OSPEEDR, GPIOF_BASE + GPIO_OSPEEDR_OFFSET
.equ GPIOF_PUPDR, GPIOF_BASE + GPIO_PUPDR_OFFSET
.equ GPIOF_IDR, GPIOF_BASE + GPIO_IDR_OFFSET
.equ GPIOF_ODR, GPIOF_BASE + GPIO_ODR_OFFSET
.equ GPIOF_BSRR, GPIOF_BASE + GPIO_BSRR_OFFSET
.equ GPIOF_LCKR, GPIOF_BASE + GPIO_LCKR_OFFSET
.equ GPIOF_AFRL, GPIOF_BASE + GPIO_AFRL_OFFSET
.equ GPIOF_AFRH, GPIOF_BASE + GPIO_AFRH_OFFSET
.equ GPIOF_BRR, GPIOF_BASE + GPIO_BRR_OFFSET
#--- Port G GPIO configuration / address space: 0x4800_1800 .. 0x4800_1BFF
.equ GPIOG_BASE, GPIO_BASE + 0x1800
.equ GPIOG_MODER, GPIOG_BASE + GPIO_MODER_OFFSET
.equ GPIOG_OTYPER, GPIOG_BASE + GPIO_OTYPER_OFFSET
.equ GPIOG_OSPEEDR, GPIOG_BASE + GPIO_OSPEEDR_OFFSET
.equ GPIOG_PUPDR, GPIOG_BASE + GPIO_PUPDR_OFFSET
.equ GPIOG_IDR, GPIOG_BASE + GPIO_IDR_OFFSET
.equ GPIOG_ODR, GPIOG_BASE + GPIO_ODR_OFFSET
.equ GPIOG_BSRR, GPIOG_BASE + GPIO_BSRR_OFFSET
.equ GPIOG_LCKR, GPIOG_BASE + GPIO_LCKR_OFFSET
.equ GPIOG_AFRL, GPIOG_BASE + GPIO_AFRL_OFFSET
.equ GPIOG_AFRH, GPIOG_BASE + GPIO_AFRH_OFFSET
.equ GPIOG_BRR, GPIOG_BASE + GPIO_BRR_OFFSET
#----------------------------------------------------------------------------------------#
# System Control Space
#
# address space: 0xE000_E000 .. 0xE000_EFFF
#----------------------------------------------------------------------------------------#
.equ SCS_BASE, PPB_BASE + 0xE000
#----------------------------------------------------------------------------------------#
# System Timer (SysTick)
#
# address space: 0xE000_E010 .. 0xE000_E01F
#----------------------------------------------------------------------------------------#
.equ STK_BASE, SCS_BASE + 10 // 0xE000_E010
.equ STK_CTRL, SCS_BASE + 0x00
.equ STK_LOAD, SCS_BASE + 0x04
.equ STK_VAL, SCS_BASE + 0x08
.equ STK_CALIB, SCS_BASE + 0x0C
#----------------------------------------------------------------------------------------#
# Nested Vector Interrupt Controller
#
# address space: 0xE000_E100 .. 0xE000_E4EF
#----------------------------------------------------------------------------------------#
.equ NVIC_BASE, SCS_BASE + 0x100 // 0xE000_E100
.equ NVIC_ISER0, NVIC_BASE + 0x00
.equ NVIC_ISER1, NVIC_BASE + 0x04
.equ NVIC_ISER2, NVIC_BASE + 0x08
.equ NVIC_ISER3, NVIC_BASE + 0x0C
.equ NVIC_ICER0, NVIC_BASE + 0x80
.equ NVIC_ICER1, NVIC_BASE + 0x84
.equ NVIC_ICER2, NVIC_BASE + 0x88
.equ NVIC_ICER3, NVIC_BASE + 0x8C
.equ NVIC_ISPR0, NVIC_BASE + 0x100
.equ NVIC_ISPR1, NVIC_BASE + 0x104
.equ NVIC_ISPR2, NVIC_BASE + 0x108
.equ NVIC_ISPR3, NVIC_BASE + 0x10C
.equ NVIC_ICPR0, NVIC_BASE + 0x180
.equ NVIC_ICPR1, NVIC_BASE + 0x184
.equ NVIC_ICPR2, NVIC_BASE + 0x188
.equ NVIC_ICPR3, NVIC_BASE + 0x18C
.equ NVIC_IABR0, NVIC_BASE + 0x200
.equ NVIC_IABR1, NVIC_BASE + 0x204
.equ NVIC_IABR2, NVIC_BASE + 0x208
.equ NVIC_IABR3, NVIC_BASE + 0x20C
.equ NVIC_IPR0, NVIC_BASE + 0x300
.equ NVIC_IPR1, NVIC_BASE + 0x304
.equ NVIC_IPR2, NVIC_BASE + 0x308
.equ NVIC_IPR3, NVIC_BASE + 0x30C
.equ NVIC_IPR4, NVIC_BASE + 0x310
.equ NVIC_IPR5, NVIC_BASE + 0x314
.equ NVIC_IPR6, NVIC_BASE + 0x318
.equ NVIC_IPR7, NVIC_BASE + 0x31C
.equ NVIC_IPR8, NVIC_BASE + 0x320
.equ NVIC_IPR9, NVIC_BASE + 0x324
.equ NVIC_IPR10, NVIC_BASE + 0x328
.equ NVIC_IPR11, NVIC_BASE + 0x32C
.equ NVIC_IPR12, NVIC_BASE + 0x330
.equ NVIC_IPR13, NVIC_BASE + 0x334
.equ NVIC_IPR14, NVIC_BASE + 0x338
.equ NVIC_IPR15, NVIC_BASE + 0x33C
.equ NVIC_IPR16, NVIC_BASE + 0x340
.equ NVIC_IPR17, NVIC_BASE + 0x344
.equ NVIC_IPR18, NVIC_BASE + 0x348
.equ NVIC_IPR19, NVIC_BASE + 0x34C
.equ NVIC_IPR20, NVIC_BASE + 0x350
.equ NVIC_IPR21, NVIC_BASE + 0x354
.equ NVIC_IPR22, NVIC_BASE + 0x358
.equ NVIC_IPR23, NVIC_BASE + 0x35C
.equ NVIC_IPR24, NVIC_BASE + 0x360
.equ NVIC_IPR25, NVIC_BASE + 0x364
.equ STIR, NVIC_BASE + 0xE00
#----------------------------------------------------------------------------------------#
# MCU Debug Component
#
# address space: 0xE004_2000 .. 0xE004_2013
#----------------------------------------------------------------------------------------#
.equ DBGMCU_BASE, PPB_BASE + 0x42000
.equ DBGMCU_IDCODE, DBGMCU_BASE + 0x00
.equ DBGMCU_CR, DBGMCU_BASE + 0x04
.equ DBGMCU_APB1FZR1, DBGMCU_BASE + 0x08
.equ DBGMCU_APB1FZR2, DBGMCU_BASE + 0x0C
.equ DBGMCU_APB2DZR, DBGMCU_BASE + 0x10

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x02
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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@ -0,0 +1,314 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r2
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
# LDR r1, =GPIOA_MODER // load port A mode register address
# MOVS r2, #0x03 // prepare mask
# LDR r0, [r1, #0] // get current value of port A mode register
# BICS r0, r2 // delete bits
# MOVS r2, #0x01 // load configuration mask
# ORRS r0, r0, r2 // apply mask
# STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOB_MODER
MOVS r3, #0x03
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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@ -0,0 +1,325 @@
#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x03
LDR r0, [r1, #2]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #2]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x03
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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/*
* sketch.c
*
* Created on: Mar 18, 2026
* Author: tobii
*/
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
int main(){
while(1){
while(/*schalter nicht gedrückt*/){}
delay(10);
while(/*schalter losgelassen*/){}
delay(150);
int aktiv = 1;
while(aktiv){
for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
//alle LED einschalten
if(i = 0){/*alles bis auf LED0 auschalten*/}
if(i = 1){/*..*/}
//...
for(int zähler = 0; zähler < 333 && aktiv == 1; zähler++){
if(/*schalter gerückt*/){
aktiv = 0;
break;
}
else{
delay(1);
}
}
while(/*Taster gedrückt*/){}
}
}
}
}

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/*
* sketch.c
*
* Created on: Mar 18, 2026
* Author: tobii
*/

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
LDR r1, =GPIO_IDR
MOVS
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r2
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x01
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r2
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
# LDR r1, =GPIOA_MODER
# MOVS r3, #0x05
# LDR r0, [r1, #1]
# BICS r0, r3
# MOVS r3, #0x01
# ORRS r0, r0, r3
# STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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/*
* sketch.c
*
* Created on: Mar 18, 2026
* Author: tobii
*/
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
int main(){
while(1){
while(/*schalter gedrückt*/){}
delay();
while(/*schalter losgelassen*/){}
delay();
int aktiv = 1;
while(aktiv){
for(int i; i < reihenfolge.length - 1; i ++){
//alle LED einschalten
if(i = 0)
}
}
}
}

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
LDR r1, =GPIO_IDR
MOVS
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r2
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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#****************************************************************************************#
# Project: task2 - ASM: Interrupts
# File: task2.s
#
# Language: ASM
#
# Hardware: STefi Light v1.1
# Processor: STM32G431KBT6U
#
# Author: Manuel Lederhofer
# Datum: 31.10.2014
#
# Version: 6.0
# History:
# 31.10.2014 ML create file
# 27.09.2018 ML edit comments, extend vector table
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
# 27.02.2019 ML move section of exception handlers to bottom of file
# 25.09.2019 ML minor changes for a better code and comment understanding
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
# 21.09.2020 ML tidy up, comments and formatting
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
# 24.06.2025 TK remove /* ... place your code here ... */
#
# Status: working
#
# Description:
# See the description and requirements of the requested application
# in the lab exercise guide.
#
# Notes:
# - MCU speed at startup is 16 MHz
#
# ToDo:
# - Change the example code to match the description and requirements
# of the requested application in the lab exercise guide.
#****************************************************************************************#
.include "G431_addr.s"
#----------------------------------------------------------------------------------------#
.section .vectortable,"a" // vector table at begin of ROM
#----------------------------------------------------------------------------------------#
.align 2
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
.word 0x08000401 // initial Program Counter
.word _ISR_NMI // non-masking interrupt
.word _ISR_HARDF // hard fault interrupt
/* N.B.
Look at the .space or the .org assembler directive to insert the address of the
ISRs at the right place in the vector table. Verify your settings by the help of
the list file. */
.word _ISR_S0
#----------------------------------------------------------------------------------------#
.text // section .text (default section for program code)
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global init
.type init, %function
init:
CPSID i // disable interrupts globally
MOVS r0, #0 // safely initialize the GPRs
MOVS r1, #0
MOVS r2, #0
MOVS r3, #0
MOVS r4, #0
MOVS r5, #0
MOVS r6, #0
MOVS r7, #0
MOV r8, r0
MOV r9, r0
MOV r10, r0
MOV r11, r0
MOV r12, r0
#--- enable port clocking
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for ports
STR r0, [r1, #0] // apply settings
#--- port init
#- LEDs
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0x03 // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r2 // delete bits
MOVS r2, #0x01 // load configuration mask
ORRS r0, r0, r2 // apply mask
STR r0, [r1, #0] // apply result to port A mode register
LDR r1, =GPIOA_MODER
MOVS r3, #0x05
LDR r0, [r1, #1]
BICS r0, r3
MOVS r3, #0x02
ORRS r0, r0, r3
STR r0, [r1, #1]
#- switch LED off
LDR r1, =GPIOA_ODR // load port A output data register
MOVS r2, #0x01 // load mask for LED
LDR r0, [r1, #0] // get current value of GPIOA
ORRS r0, r0, r2 // configure pin state
STR r0, [r1, #0] // apply settings
#- buttons
/* ... place your code here ... */
#--- button interrupt config
#- enable clock for SYSCFG module
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
# in SYSCFG module (SYSCFG_* registers)
#- configure lines in EXTI module (EXTI_* registers)
#- NVIC: set interrupt priority, clear pending bits
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
CPSIE i // enable interrupts globally
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global main
.type main, %function
main:
LDR r1, =GPIOA_ODR
EORS r0, r0, r3
STR r0, [r1, #0]
BL delay
B main
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.thumb_func
.global delay
.type delay, %function
delay:
MOVS r6, #0 // ...
LDR r7, =2000000 // ...
.L1:
ADDS r6, r6, #1 // ...
CMP r6, r7 // ...
BNE .L1 // ...
BX lr // ...
#----------------------------------------------------------------------------------------#
.align 2
.global stop
stop:
NOP // do nothing (NOP is here to avoid a debugger crash, only)
B stop // if this line is reached, something went wrong
#----------------------------------------------------------------------------------------#
.lp1: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
#----------------------------------------------------------------------------------------#
.section .exhand,"ax" // section for exception handlers
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_NMI, %function
_ISR_NMI:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x44 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x0A // load mask for blue and yellow LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_NMI
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_HARDF, %function
_ISR_HARDF:
#--- enable clock
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
MOV r2, #0x01 // load mask
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
ORRS r0, r0, r2 // configure clock gating for port
STR r0, [r1, #0] // apply settings
#--- init pins
LDR r1, =GPIOA_MODER // load port A mode register address
MOVS r2, #0xFF // prepare mask
LDR r0, [r1, #0] // get current value of port A mode register
BICS r0, r0, r2 // delete bits
MOVS r2, #0x11 // load configuration mask
ORRS r0, r0, r2 // configure pins
STR r0, [r1, #0] // apply settings to port A mode register
#--- switch some LEDs on
LDR r1, =GPIOA_ODR // load port A data output register address
MOVS r2, #0x05 // load mask for red and green LED
LDR r0, [r1, #0]
BICS r0, r0, r2
STR r0, [r1, #0] // switch LEDs on
B _ISR_HARDF
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S0, %function
_ISR_S0:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.align 2
.syntax unified
.thumb
.type _ISR_S1, %function
_ISR_S1:
PUSH {lr} // save special content
#--- do the work
#--- clear interrupt flag
#--- leave ISR
POP {r1} // get special content back
BX r1 // go back to where we came from
#----------------------------------------------------------------------------------------#
.lp2: // this label is only to nicify the line up in the .lst file
.ltorg
#----------------------------------------------------------------------------------------#
.end
#************************************** E O F *******************************************#

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LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/arch=x86_64 LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/arch=x86_64
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/name=Local LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/name=Local
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/os=win32 LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/os=win32
configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3 Debug,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task4,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1 configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3 Debug,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task4,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2
eclipse.preferences.version=1 eclipse.preferences.version=1
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:A3_Timer/activeLaunchMode=run org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:A3_Timer/activeLaunchMode=run
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1/activeLaunchMode=run org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1/activeLaunchMode=run

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IMPORT_FILES_AND_FOLDERS_RELATIVE=true IMPORT_FILES_AND_FOLDERS_RELATIVE=true
IMPORT_FILES_AND_FOLDERS_TYPE=23,1 IMPORT_FILES_AND_FOLDERS_TYPE=23,1
eclipse.preferences.version=1 eclipse.preferences.version=1
platformState=1772304866304 platformState=1772304866322
quickStart=false quickStart=false
tipsAndTricks=true tipsAndTricks=true

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<launchHistory> <launchHistory>
<launchGroup id="org.eclipse.debug.ui.launchGroup.debug"> <launchGroup id="org.eclipse.debug.ui.launchGroup.debug">
<mruHistory> <mruHistory>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task1/task1.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task2/task2.launch&quot;/&gt;&#13;&#10;"/> <launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task2/task2.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task1/task1.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task4/task4.launch&quot;/&gt;&#13;&#10;"/> <launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task4/task4.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task3/task3 Debug.launch&quot;/&gt;&#13;&#10;"/> <launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task3/task3 Debug.launch&quot;/&gt;&#13;&#10;"/>
</mruHistory> </mruHistory>
@ -24,8 +24,8 @@
</launchGroup> </launchGroup>
<launchGroup id="org.eclipse.debug.ui.launchGroup.run"> <launchGroup id="org.eclipse.debug.ui.launchGroup.run">
<mruHistory> <mruHistory>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task1/task1.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task2/task2.launch&quot;/&gt;&#13;&#10;"/> <launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task2/task2.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task1/task1.launch&quot;/&gt;&#13;&#10;"/>
<launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task4/task4.launch&quot;/&gt;&#13;&#10;"/> <launch memento="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;launchConfiguration local=&quot;false&quot; path=&quot;/task4/task4.launch&quot;/&gt;&#13;&#10;"/>
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<?xml version="1.0" encoding="UTF-8"?>
<session version="1.0">
<refactoring comment="Delete resource &apos;task2/task2_tobi.s&apos;" deleteContents="false" description="Delete resource &apos;task2/task2_tobi.s&apos;" element1="/task2/task2_tobi.s" flags="7" id="org.eclipse.ltk.core.refactoring.delete.resources" resources="1" stamp="1774360637158"/>
</session>

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1774360637158 Delete resource 'task2/task2_tobi.s'

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<?xml version="1.0" encoding="UTF-8"?>
<session version="1.0">&#x0A;<refactoring comment="Rename resource &apos;task2/task2.s&apos; to &apos;task2_tobi.s&apos;" description="Rename resource &apos;task2.s&apos;" flags="7" id="org.eclipse.ltk.core.refactoring.rename.resource" input="task2.s" name="task2_tobi.s" stamp="1774358097434" updateReferences="true"/>&#x0A;<refactoring comment="Rename resource &apos;task2/task2_efe.s&apos; to &apos;task2.s&apos;" description="Rename resource &apos;task2_efe.s&apos;" flags="7" id="org.eclipse.ltk.core.refactoring.rename.resource" input="task2_efe.s" name="task2.s" stamp="1774358106409" updateReferences="true"/>
</session>

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1774358097434 Rename resource 'task2.s'
1774358106409 Rename resource 'task2_efe.s'

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<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
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<section name="ShowRefactoringHistoryWizard"> <section name="ShowRefactoringHistoryWizard">
<item key="org.eclipse.ltk.ui.refactoring.sortRefactorings" value="true"/> <item key="org.eclipse.ltk.ui.refactoring.sortRefactorings" value="true"/>
</section> </section>
<section name="RefactoringStatusDialog"> <section name="RefactoringStatusDialog">
<item key="DIALOG_WIDTH" value="816"/> <item key="DIALOG_WIDTH" value="816"/>
<item key="DIALOG_HEIGHT" value="490"/> <item key="DIALOG_HEIGHT" value="490"/>
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</section> </section>
</section> </section>

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<section name="CleanDialogSettings"> <section name="CleanDialogSettings">
<item key="BUILD_NOW" value="false"/> <item key="BUILD_NOW" value="false"/>
<item key="BUILD_ALL" value="true"/> <item key="BUILD_ALL" value="true"/>
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#Mon Mar 09 11:19:41 CET 2026 #Tue Mar 31 13:41:52 CEST 2026
org.eclipse.core.runtime=2 org.eclipse.core.runtime=2
org.eclipse.platform=4.30.0.v20231201-0110 org.eclipse.platform=4.30.0.v20231201-0110

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<?xml version="1.0" encoding="utf-8"?>
<FRAME GUID="2FB25471-B62C-4EE6-BD43-F819C095ACF8" FORMAT="0000" APP_VERSION="2.2.0.8" CHECKSUM="48FC0BB7AAC12F0C">
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<DIAGRAMS>
<DIAGRAM FORMAT="1.00" ID="0" NAME="Task 1" CREATED="2026.03.16 18:22:10" MODIFIED="2026.03.16 21:54:22">
<LAYOUT FORMAT="1.00" COLUMNS="3" ROWS="13">
<ENTRIES>
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</FIGURE>
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<FIGURE SUBTYPE="PapLoopStart" FORMAT="1.00" ID="5" ASSOCIATE="6">
<TEXT><![CDATA[while(1)]]></TEXT>
</FIGURE>
</ENTRY>
<ENTRY COLUMN="0" ROW="3">
<FIGURE SUBTYPE="PapInput" FORMAT="1.00" ID="10">
<TEXT><![CDATA[Eingabe von S0]]></TEXT>
</FIGURE>
</ENTRY>
<ENTRY COLUMN="0" ROW="4">
<FIGURE SUBTYPE="PapCondition" FORMAT="1.00" ID="4">
<TEXT><![CDATA[S0 gedrückt?]]></TEXT>
</FIGURE>
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<ENTRY COLUMN="0" ROW="5">
<FIGURE SUBTYPE="PapActivity" FORMAT="1.00" ID="46">
<TEXT><![CDATA[LED0 AN]]></TEXT>
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<TEXT><![CDATA[S0 gedrückt?]]></TEXT>
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<TEXT><![CDATA[]]></TEXT>
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<TEXT><![CDATA[]]></TEXT>
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<FIGURE SUBTYPE="PapConnector" FORMAT="1.00" ID="40">
<TEXT><![CDATA[]]></TEXT>
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<CONNECTIONS>
<CONNECTION FORMAT="1.00" ID="9" FROM="1" TO="5" TEXT="" />
<CONNECTION FORMAT="1.00" ID="11" FROM="10" TO="4" TEXT="" />
<CONNECTION FORMAT="1.00" ID="12" FROM="5" TO="10" TEXT="" />
<CONNECTION FORMAT="1.00" ID="14" FROM="4" TO="13" TEXT="" />
<CONNECTION FORMAT="1.00" ID="27" FROM="32" TO="24" TEXT="nein" />
<CONNECTION FORMAT="1.00" ID="30" FROM="24" TO="29" TEXT="" />
<CONNECTION FORMAT="1.00" ID="37" FROM="35" TO="38" TEXT="" />
<CONNECTION FORMAT="1.00" ID="39" FROM="38" TO="36" TEXT="nein" />
<CONNECTION FORMAT="1.00" ID="41" FROM="38" TO="40" TEXT="ja" />
<CONNECTION FORMAT="1.00" ID="42" FROM="40" TO="24" TEXT="" />
</CONNECTIONS>
</DIAGRAM>
</DIAGRAMS>
</PROJECT>
</FRAME>

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= 4.1 Aufgabe 1 - C: GPIO
== Vorbereitungsfragen:
=== a. Wozu werden Pull-Up Widerstände bei der Abfrage von Tastern benötigt?
=== b. Wie werden Taster entprellt?
=== c. Wie wird ein einzelnes Bit in einem 32-bit Wort getoggelt, ohne die anderen Bits zu verändern?
`int x ^= (1 << 0);`
=== d. Was ist speziell bei der Programmierung von Mikrocontrollern unter dem Begriff Initialisierung zu verstehen?
=== e. An Welchen Pors des Mikrocontrollers sind die LEDS und Taster der STefi Light Patine angeschlossen?
=== f. Studieren Sie die wichtigsten Quelltextdateien des C-Projektes task1.c und Stefi-Light.h. Welche Register und welche Bits werden hier beschrieben? Suchen Sie in der ST-Dokumentation (Reference Manual) die beiden relevanten Kapitel heraus und vollziehen Sie die Bedeutung der getätigten Einstellungen nach.
=== g. Wie muss ein Pin konfiguriert werden damit er als Eingang verwendet werden kann?
=== h. Erstellen Sie ein detailliertes Flussdiagramm für Ihre Lauflicht-Applikation

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@ -0,0 +1,17 @@
= 3.2 Aufgabe 2 - ASM: Interrupts, Entprellen
== Aufgabenstellung:
Das Programm soll per Tastendruck den Zustand der LEDs wechseln. Taster *S1* soll *LED0* und *LED3* ein-bzw. auschalten, Taster *S1 LED1* und *LED2*
== Vorbereitungsfragen:
=== a. Welche vier Einträge stehen am Beginn der ARM Exception Vector Table?
#table(
columns: (1fr, auto, auto),
inset: 10pt,
align: horizon,
table.header(
[*Postion*], [*Vektor*], [*Beschreibung*]
),
[0], [WWDG],
=== b. Wie viele Interrupt-Prioritätsstufen unterstützt ein ARM-Controller maximal?
=== c. An welchen Positionen in der Exception Vector Table stehen die Adressen der ISRs für die Tasten? (ST Dokumentation)
=== d. Schauen Sie sich das Prellen eines Tasters an und überlegen Sie sich eine Lösung.
=== e. Erstellen Sie ein komplettes Flussdiagramm für Ihren Lösungsansatz.

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@ -13,7 +13,7 @@
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/> <provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/> <provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/> <provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="422947886521367905" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true"> <provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1558684269450950684" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/> <language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/> <language-scope id="org.eclipse.cdt.core.g++"/>
</provider> </provider>

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1
task1/Debug/Src/sketch.d Normal file
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@ -0,0 +1 @@
Src/sketch.o: ../Src/sketch.c

BIN
task1/Debug/Src/sketch.o Normal file

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@ -5,14 +5,17 @@
# Add inputs and outputs from these tool invocations to the build variables # Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \ C_SRCS += \
../Src/sketch.c \
../Src/task1.c \ ../Src/task1.c \
../Src/task1_it.c ../Src/task1_it.c
OBJS += \ OBJS += \
./Src/sketch.o \
./Src/task1.o \ ./Src/task1.o \
./Src/task1_it.o ./Src/task1_it.o
C_DEPS += \ C_DEPS += \
./Src/sketch.d \
./Src/task1.d \ ./Src/task1.d \
./Src/task1_it.d ./Src/task1_it.d
@ -24,7 +27,7 @@ Src/%.o Src/%.su Src/%.cyclo: ../Src/%.c Src/subdir.mk
clean: clean-Src clean: clean-Src
clean-Src: clean-Src:
-$(RM) ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su -$(RM) ./Src/sketch.cyclo ./Src/sketch.d ./Src/sketch.o ./Src/sketch.su ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
.PHONY: clean-Src .PHONY: clean-Src

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@ -1,3 +0,0 @@
../Src/task1.c:56:5:main 5
../Src/task1.c:112:13:GPIO_init 1
../Src/task1.c:135:13:delay 3

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@ -1,3 +0,0 @@
../Src/task1.c:56:5:main 8 static,ignoring_inline_asm
../Src/task1.c:112:13:GPIO_init 4 static
../Src/task1.c:135:13:delay 24 static,ignoring_inline_asm

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@ -1,3 +1,4 @@
"./Src/sketch.o"
"./Src/task1.o" "./Src/task1.o"
"./Src/task1_it.o" "./Src/task1_it.o"
"./Startup/startup_stm32g431kbtx.o" "./Startup/startup_stm32g431kbtx.o"

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@ -1,501 +0,0 @@
task1.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001d8 08000000 08000000 00001000 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00000298 080001d8 080001d8 000011d8 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000000 08000470 08000478 00001478 2**0
CONTENTS, ALLOC, LOAD, DATA
3 .ARM.extab 00000000 08000470 08000470 00001478 2**0
CONTENTS
4 .ARM 00000000 08000470 08000470 00001478 2**0
CONTENTS
5 .preinit_array 00000000 08000470 08000478 00001478 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08000470 08000470 00001470 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 08000474 08000474 00001474 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 00000000 20000000 20000000 00001478 2**0
CONTENTS, ALLOC, LOAD, DATA
9 .ccmsram 00000000 10000000 10000000 00001478 2**0
CONTENTS
10 .bss 00000020 20000000 20000000 00002000 2**2
ALLOC
11 ._user_heap_stack 00000600 20000020 20000020 00002000 2**0
ALLOC
12 .ARM.attributes 00000030 00000000 00000000 00001478 2**0
CONTENTS, READONLY
13 .debug_info 000007b3 00000000 00000000 000014a8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_abbrev 00000279 00000000 00000000 00001c5b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_aranges 00000078 00000000 00000000 00001ed8 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_rnglists 00000039 00000000 00000000 00001f50 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_macro 00013740 00000000 00000000 00001f89 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_line 00000953 00000000 00000000 000156c9 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .debug_str 0006f80d 00000000 00000000 0001601c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
20 .comment 00000043 00000000 00000000 00085829 2**0
CONTENTS, READONLY
21 .debug_frame 000000e0 00000000 00000000 0008586c 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
22 .debug_line_str 0000007a 00000000 00000000 0008594c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
080001d8 <__do_global_dtors_aux>:
80001d8: b510 push {r4, lr}
80001da: 4c05 ldr r4, [pc, #20] @ (80001f0 <__do_global_dtors_aux+0x18>)
80001dc: 7823 ldrb r3, [r4, #0]
80001de: b933 cbnz r3, 80001ee <__do_global_dtors_aux+0x16>
80001e0: 4b04 ldr r3, [pc, #16] @ (80001f4 <__do_global_dtors_aux+0x1c>)
80001e2: b113 cbz r3, 80001ea <__do_global_dtors_aux+0x12>
80001e4: 4804 ldr r0, [pc, #16] @ (80001f8 <__do_global_dtors_aux+0x20>)
80001e6: f3af 8000 nop.w
80001ea: 2301 movs r3, #1
80001ec: 7023 strb r3, [r4, #0]
80001ee: bd10 pop {r4, pc}
80001f0: 20000000 .word 0x20000000
80001f4: 00000000 .word 0x00000000
80001f8: 08000458 .word 0x08000458
080001fc <frame_dummy>:
80001fc: b508 push {r3, lr}
80001fe: 4b03 ldr r3, [pc, #12] @ (800020c <frame_dummy+0x10>)
8000200: b11b cbz r3, 800020a <frame_dummy+0xe>
8000202: 4903 ldr r1, [pc, #12] @ (8000210 <frame_dummy+0x14>)
8000204: 4803 ldr r0, [pc, #12] @ (8000214 <frame_dummy+0x18>)
8000206: f3af 8000 nop.w
800020a: bd08 pop {r3, pc}
800020c: 00000000 .word 0x00000000
8000210: 20000004 .word 0x20000004
8000214: 08000458 .word 0x08000458
08000218 <main>:
static void delay(const uint16_t ms);
/* ------------------------------------ M A I N --------------------------------------- */
int main(void)
{
8000218: b580 push {r7, lr}
800021a: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
800021c: b672 cpsid i
}
800021e: bf00 nop
/* --- initialization --- */
__disable_irq(); // disable interrupts globally
GPIO_init();
8000220: f000 f83a bl 8000298 <GPIO_init>
__ASM volatile ("cpsie i" : : : "memory");
8000224: b662 cpsie i
}
8000226: bf00 nop
/* --- infinite processing loop --- */
while (1)
{
/* ... add your code to implement the lab assignment ... */
switch (state) {
8000228: 4b1a ldr r3, [pc, #104] @ (8000294 <main+0x7c>)
800022a: 681b ldr r3, [r3, #0]
800022c: 2b02 cmp r3, #2
800022e: d01e beq.n 800026e <main+0x56>
8000230: 2b02 cmp r3, #2
8000232: dc2c bgt.n 800028e <main+0x76>
8000234: 2b00 cmp r3, #0
8000236: d002 beq.n 800023e <main+0x26>
8000238: 2b01 cmp r3, #1
800023a: d00e beq.n 800025a <main+0x42>
GPIOA->ODR |= (1 << 0); // LED0 off
delay(WAITTIME); // wait
state = 0;
break;
default:
break;
800023c: e027 b.n 800028e <main+0x76>
GPIOA->ODR &= ~(1 << 0); // LED0 on
800023e: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8000242: 695b ldr r3, [r3, #20]
8000244: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
8000248: f023 0301 bic.w r3, r3, #1
800024c: 6153 str r3, [r2, #20]
state++;
800024e: 4b11 ldr r3, [pc, #68] @ (8000294 <main+0x7c>)
8000250: 681b ldr r3, [r3, #0]
8000252: 3301 adds r3, #1
8000254: 4a0f ldr r2, [pc, #60] @ (8000294 <main+0x7c>)
8000256: 6013 str r3, [r2, #0]
break;
8000258: e01a b.n 8000290 <main+0x78>
delay(WAITTIME); // wait
800025a: f44f 70fa mov.w r0, #500 @ 0x1f4
800025e: f000 f843 bl 80002e8 <delay>
state++;
8000262: 4b0c ldr r3, [pc, #48] @ (8000294 <main+0x7c>)
8000264: 681b ldr r3, [r3, #0]
8000266: 3301 adds r3, #1
8000268: 4a0a ldr r2, [pc, #40] @ (8000294 <main+0x7c>)
800026a: 6013 str r3, [r2, #0]
break;
800026c: e010 b.n 8000290 <main+0x78>
GPIOA->ODR |= (1 << 0); // LED0 off
800026e: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8000272: 695b ldr r3, [r3, #20]
8000274: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
8000278: f043 0301 orr.w r3, r3, #1
800027c: 6153 str r3, [r2, #20]
delay(WAITTIME); // wait
800027e: f44f 70fa mov.w r0, #500 @ 0x1f4
8000282: f000 f831 bl 80002e8 <delay>
state = 0;
8000286: 4b03 ldr r3, [pc, #12] @ (8000294 <main+0x7c>)
8000288: 2200 movs r2, #0
800028a: 601a str r2, [r3, #0]
break;
800028c: e000 b.n 8000290 <main+0x78>
break;
800028e: bf00 nop
switch (state) {
8000290: e7ca b.n 8000228 <main+0x10>
8000292: bf00 nop
8000294: 2000001c .word 0x2000001c
08000298 <GPIO_init>:
* requires: - nothing -
* parameters: - none -
* returns: - nothing -
\* ------------------------------------------------------------------------------------ */
static void GPIO_init(void)
{
8000298: b480 push {r7}
800029a: af00 add r7, sp, #0
/* enable port clocks */
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // LEDs: A
800029c: 4b11 ldr r3, [pc, #68] @ (80002e4 <GPIO_init+0x4c>)
800029e: 6cdb ldr r3, [r3, #76] @ 0x4c
80002a0: 4a10 ldr r2, [pc, #64] @ (80002e4 <GPIO_init+0x4c>)
80002a2: f043 0301 orr.w r3, r3, #1
80002a6: 64d3 str r3, [r2, #76] @ 0x4c
/* --- LEDs --- */
GPIOA->ODR |= MASK_LED_RED;
80002a8: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
80002ac: 695b ldr r3, [r3, #20]
80002ae: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
80002b2: f043 0301 orr.w r3, r3, #1
80002b6: 6153 str r3, [r2, #20]
//GPIOA->ODR |= MASK_LED_YELLOW;
GPIOA->MODER &= ~(3 << 0);
80002b8: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
80002bc: 681b ldr r3, [r3, #0]
80002be: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
80002c2: f023 0303 bic.w r3, r3, #3
80002c6: 6013 str r3, [r2, #0]
GPIOA->MODER |= (1 << 0); // set LED pin to output
80002c8: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
80002cc: 681b ldr r3, [r3, #0]
80002ce: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
80002d2: f043 0301 orr.w r3, r3, #1
80002d6: 6013 str r3, [r2, #0]
}
80002d8: bf00 nop
80002da: 46bd mov sp, r7
80002dc: f85d 7b04 ldr.w r7, [sp], #4
80002e0: 4770 bx lr
80002e2: bf00 nop
80002e4: 40021000 .word 0x40021000
080002e8 <delay>:
* requires: - nothing -
* parameters: ms - delay time in milliseconds
* returns: - nothing -
\* ------------------------------------------------------------------------------------ */
static void delay(const uint16_t ms)
{
80002e8: b480 push {r7}
80002ea: b085 sub sp, #20
80002ec: af00 add r7, sp, #0
80002ee: 4603 mov r3, r0
80002f0: 80fb strh r3, [r7, #6]
for (uint16_t i = 0; i < ms; ++i)
80002f2: 2300 movs r3, #0
80002f4: 81fb strh r3, [r7, #14]
80002f6: e00e b.n 8000316 <delay+0x2e>
{
for (uint16_t j = 0; j < LOOPS_PER_MS; ++j)
80002f8: 2300 movs r3, #0
80002fa: 81bb strh r3, [r7, #12]
80002fc: e003 b.n 8000306 <delay+0x1e>
{
__asm("NOP");
80002fe: bf00 nop
for (uint16_t j = 0; j < LOOPS_PER_MS; ++j)
8000300: 89bb ldrh r3, [r7, #12]
8000302: 3301 adds r3, #1
8000304: 81bb strh r3, [r7, #12]
8000306: 89bb ldrh r3, [r7, #12]
8000308: f240 42db movw r2, #1243 @ 0x4db
800030c: 4293 cmp r3, r2
800030e: d9f6 bls.n 80002fe <delay+0x16>
for (uint16_t i = 0; i < ms; ++i)
8000310: 89fb ldrh r3, [r7, #14]
8000312: 3301 adds r3, #1
8000314: 81fb strh r3, [r7, #14]
8000316: 89fa ldrh r2, [r7, #14]
8000318: 88fb ldrh r3, [r7, #6]
800031a: 429a cmp r2, r3
800031c: d3ec bcc.n 80002f8 <delay+0x10>
}
}
}
800031e: bf00 nop
8000320: bf00 nop
8000322: 3714 adds r7, #20
8000324: 46bd mov sp, r7
8000326: f85d 7b04 ldr.w r7, [sp], #4
800032a: 4770 bx lr
0800032c <ISR_error>:
*
* Default interrupt handler for core interrupts.
* Enables the green and red LED on the STefi Light board.
\* ------------------------------------------------------------------------------------ */
void ISR_error(void)
{
800032c: b480 push {r7}
800032e: af00 add r7, sp, #0
/* init */
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs)
8000330: 4b10 ldr r3, [pc, #64] @ (8000374 <ISR_error+0x48>)
8000332: 6cdb ldr r3, [r3, #76] @ 0x4c
8000334: 4a0f ldr r2, [pc, #60] @ (8000374 <ISR_error+0x48>)
8000336: f043 0301 orr.w r3, r3, #1
800033a: 64d3 str r3, [r2, #76] @ 0x4c
GPIOA->ODR |= MASK_LED_ALL;
800033c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8000340: 695b ldr r3, [r3, #20]
8000342: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
8000346: f043 030f orr.w r3, r3, #15
800034a: 6153 str r3, [r2, #20]
GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x11;
800034c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8000350: 681b ldr r3, [r3, #0]
8000352: f023 03ff bic.w r3, r3, #255 @ 0xff
8000356: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
800035a: f043 0311 orr.w r3, r3, #17
800035e: 6013 str r3, [r2, #0]
while(1)
{ /* light up the LEDs permanently */
GPIOA->ODR &= ~(MASK_LED_GREEN | MASK_LED_RED);
8000360: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8000364: 695b ldr r3, [r3, #20]
8000366: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
800036a: f023 0305 bic.w r3, r3, #5
800036e: 6153 str r3, [r2, #20]
8000370: e7f6 b.n 8000360 <ISR_error+0x34>
8000372: bf00 nop
8000374: 40021000 .word 0x40021000
08000378 <ISR_default>:
*
* Default interrupt handler for non-core interrupts.
* Enables the blue and yellow LED on the STefi Light board.
\* ------------------------------------------------------------------------------------ */
void ISR_default(void)
{
8000378: b480 push {r7}
800037a: af00 add r7, sp, #0
/* init */
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs)
800037c: 4b10 ldr r3, [pc, #64] @ (80003c0 <ISR_default+0x48>)
800037e: 6cdb ldr r3, [r3, #76] @ 0x4c
8000380: 4a0f ldr r2, [pc, #60] @ (80003c0 <ISR_default+0x48>)
8000382: f043 0301 orr.w r3, r3, #1
8000386: 64d3 str r3, [r2, #76] @ 0x4c
GPIOA->ODR |= MASK_LED_ALL;
8000388: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
800038c: 695b ldr r3, [r3, #20]
800038e: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
8000392: f043 030f orr.w r3, r3, #15
8000396: 6153 str r3, [r2, #20]
GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x44;
8000398: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
800039c: 681b ldr r3, [r3, #0]
800039e: f023 03ff bic.w r3, r3, #255 @ 0xff
80003a2: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
80003a6: f043 0344 orr.w r3, r3, #68 @ 0x44
80003aa: 6013 str r3, [r2, #0]
while(1)
{ /* light up the LEDs permanently */
GPIOA->ODR &= ~(MASK_LED_BLUE | MASK_LED_YELLOW);
80003ac: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
80003b0: 695b ldr r3, [r3, #20]
80003b2: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
80003b6: f023 030a bic.w r3, r3, #10
80003ba: 6153 str r3, [r2, #20]
80003bc: e7f6 b.n 80003ac <ISR_default+0x34>
80003be: bf00 nop
80003c0: 40021000 .word 0x40021000
080003c4 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =_estack
80003c4: 480c ldr r0, [pc, #48] @ (80003f8 <LoopForever+0x2>)
mov sp, r0 /* set stack pointer */
80003c6: 4685 mov sp, r0
/* Call the clock system initialization function.*/
// bl SystemInit
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
80003c8: 480c ldr r0, [pc, #48] @ (80003fc <LoopForever+0x6>)
ldr r1, =_edata
80003ca: 490d ldr r1, [pc, #52] @ (8000400 <LoopForever+0xa>)
ldr r2, =_sidata
80003cc: 4a0d ldr r2, [pc, #52] @ (8000404 <LoopForever+0xe>)
movs r3, #0
80003ce: 2300 movs r3, #0
b LoopCopyDataInit
80003d0: e002 b.n 80003d8 <LoopCopyDataInit>
080003d2 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80003d2: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80003d4: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80003d6: 3304 adds r3, #4
080003d8 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80003d8: 18c4 adds r4, r0, r3
cmp r4, r1
80003da: 428c cmp r4, r1
bcc CopyDataInit
80003dc: d3f9 bcc.n 80003d2 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80003de: 4a0a ldr r2, [pc, #40] @ (8000408 <LoopForever+0x12>)
ldr r4, =_ebss
80003e0: 4c0a ldr r4, [pc, #40] @ (800040c <LoopForever+0x16>)
movs r3, #0
80003e2: 2300 movs r3, #0
b LoopFillZerobss
80003e4: e001 b.n 80003ea <LoopFillZerobss>
080003e6 <FillZerobss>:
FillZerobss:
str r3, [r2]
80003e6: 6013 str r3, [r2, #0]
adds r2, r2, #4
80003e8: 3204 adds r2, #4
080003ea <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
80003ea: 42a2 cmp r2, r4
bcc FillZerobss
80003ec: d3fb bcc.n 80003e6 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
80003ee: f000 f80f bl 8000410 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80003f2: f7ff ff11 bl 8000218 <main>
080003f6 <LoopForever>:
LoopForever:
b LoopForever
80003f6: e7fe b.n 80003f6 <LoopForever>
ldr r0, =_estack
80003f8: 20008000 .word 0x20008000
ldr r0, =_sdata
80003fc: 20000000 .word 0x20000000
ldr r1, =_edata
8000400: 20000000 .word 0x20000000
ldr r2, =_sidata
8000404: 08000478 .word 0x08000478
ldr r2, =_sbss
8000408: 20000000 .word 0x20000000
ldr r4, =_ebss
800040c: 20000020 .word 0x20000020
08000410 <__libc_init_array>:
8000410: b570 push {r4, r5, r6, lr}
8000412: 4d0d ldr r5, [pc, #52] @ (8000448 <__libc_init_array+0x38>)
8000414: 4c0d ldr r4, [pc, #52] @ (800044c <__libc_init_array+0x3c>)
8000416: 1b64 subs r4, r4, r5
8000418: 10a4 asrs r4, r4, #2
800041a: 2600 movs r6, #0
800041c: 42a6 cmp r6, r4
800041e: d109 bne.n 8000434 <__libc_init_array+0x24>
8000420: 4d0b ldr r5, [pc, #44] @ (8000450 <__libc_init_array+0x40>)
8000422: 4c0c ldr r4, [pc, #48] @ (8000454 <__libc_init_array+0x44>)
8000424: f000 f818 bl 8000458 <_init>
8000428: 1b64 subs r4, r4, r5
800042a: 10a4 asrs r4, r4, #2
800042c: 2600 movs r6, #0
800042e: 42a6 cmp r6, r4
8000430: d105 bne.n 800043e <__libc_init_array+0x2e>
8000432: bd70 pop {r4, r5, r6, pc}
8000434: f855 3b04 ldr.w r3, [r5], #4
8000438: 4798 blx r3
800043a: 3601 adds r6, #1
800043c: e7ee b.n 800041c <__libc_init_array+0xc>
800043e: f855 3b04 ldr.w r3, [r5], #4
8000442: 4798 blx r3
8000444: 3601 adds r6, #1
8000446: e7f2 b.n 800042e <__libc_init_array+0x1e>
8000448: 08000470 .word 0x08000470
800044c: 08000470 .word 0x08000470
8000450: 08000470 .word 0x08000470
8000454: 08000474 .word 0x08000474
08000458 <_init>:
8000458: b5f8 push {r3, r4, r5, r6, r7, lr}
800045a: bf00 nop
800045c: bcf8 pop {r3, r4, r5, r6, r7}
800045e: bc08 pop {r3}
8000460: 469e mov lr, r3
8000462: 4770 bx lr
08000464 <_fini>:
8000464: b5f8 push {r3, r4, r5, r6, r7, lr}
8000466: bf00 nop
8000468: bcf8 pop {r3, r4, r5, r6, r7}
800046a: bc08 pop {r3}
800046c: 469e mov lr, r3
800046e: 4770 bx lr

View File

@ -1,825 +0,0 @@
Archive member included to satisfy reference by file (symbol)
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.bss 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mlock.o)
.text.__malloc_lock
0x00000000 0xc /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mlock.o)
.text.__malloc_unlock
0x00000000 0xc /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mlock.o)
.debug_frame 0x00000000 0x30 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mlock.o)
.ARM.attributes
0x00000000 0x34 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-mlock.o)
.text 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.data 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.bss 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.text.__sflush_r
0x00000000 0x108 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.text._fflush_r
0x00000000 0x50 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.text.fflush 0x00000000 0x28 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.debug_frame 0x00000000 0x5c /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.ARM.attributes
0x00000000 0x34 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-fflush.o)
.text 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o)
.data 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o)
.bss 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o)
.text._sbrk_r 0x00000000 0x20 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o)
.debug_frame 0x00000000 0x2c /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o)
.ARM.attributes
0x00000000 0x34 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-sbrkr.o)
.text 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
.data 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
.bss 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
.rodata 0x00000000 0x24 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
.eh_frame 0x00000000 0x4 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
.ARM.attributes
0x00000000 0x34 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
.text 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
.data 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
.bss 0x00000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
Memory Configuration
Name Origin Length Attributes
CCMSRAM 0x10000000 0x00002800 xrw
RAM 0x20000000 0x00008000 xrw
FLASH 0x08000000 0x00020000 xr
*default* 0x00000000 0xffffffff
Linker script and memory map
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o
LOAD ./Src/task1.o
LOAD ./Src/task1_it.o
LOAD ./Startup/startup_stm32g431kbtx.o
LOAD ./Startup/syscalls.o
LOAD ./Startup/sysmem.o
START GROUP
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
END GROUP
START GROUP
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
END GROUP
START GROUP
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
END GROUP
START GROUP
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libnosys.a
END GROUP
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
0x20008000 _estack = (ORIGIN (RAM) + LENGTH (RAM))
0x00000200 _Min_Heap_Size = 0x200
0x00000400 _Min_Stack_Size = 0x400
.isr_vector 0x08000000 0x1d8
0x08000000 . = ALIGN (0x4)
*(.isr_vector)
.isr_vector 0x08000000 0x1d8 ./Src/task1_it.o
0x08000000 paIsrFunc
0x080001d8 . = ALIGN (0x4)
.text 0x080001d8 0x298
0x080001d8 . = ALIGN (0x4)
*(.text)
.text 0x080001d8 0x40 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
*(.text*)
.text.main 0x08000218 0x80 ./Src/task1.o
0x08000218 main
.text.GPIO_init
0x08000298 0x50 ./Src/task1.o
.text.delay 0x080002e8 0x44 ./Src/task1.o
.text.ISR_error
0x0800032c 0x4c ./Src/task1_it.o
0x0800032c ISR_error
.text.ISR_default
0x08000378 0x4c ./Src/task1_it.o
0x08000378 ISR_default
.text.Reset_Handler
0x080003c4 0x4c ./Startup/startup_stm32g431kbtx.o
0x080003c4 Reset_Handler
.text.__libc_init_array
0x08000410 0x48 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
0x08000410 __libc_init_array
*(.glue_7)
.glue_7 0x08000458 0x0 linker stubs
*(.glue_7t)
.glue_7t 0x08000458 0x0 linker stubs
*(.eh_frame)
.eh_frame 0x08000458 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
*(.init)
.init 0x08000458 0x4 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
0x08000458 _init
.init 0x0800045c 0x8 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
*(.fini)
.fini 0x08000464 0x4 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
0x08000464 _fini
.fini 0x08000468 0x8 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
0x08000470 . = ALIGN (0x4)
0x08000470 _etext = .
.vfp11_veneer 0x08000470 0x0
.vfp11_veneer 0x08000470 0x0 linker stubs
.v4_bx 0x08000470 0x0
.v4_bx 0x08000470 0x0 linker stubs
.iplt 0x08000470 0x0
.iplt 0x08000470 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
.rodata 0x08000470 0x0
0x08000470 . = ALIGN (0x4)
*(.rodata)
*(.rodata*)
0x08000470 . = ALIGN (0x4)
.ARM.extab 0x08000470 0x0
0x08000470 . = ALIGN (0x4)
*(.ARM.extab* .gnu.linkonce.armextab.*)
0x08000470 . = ALIGN (0x4)
.ARM 0x08000470 0x0
0x08000470 . = ALIGN (0x4)
0x08000470 __exidx_start = .
*(.ARM.exidx*)
0x08000470 __exidx_end = .
0x08000470 . = ALIGN (0x4)
.preinit_array 0x08000470 0x0
0x08000470 . = ALIGN (0x4)
0x08000470 PROVIDE (__preinit_array_start = .)
*(.preinit_array*)
0x08000470 PROVIDE (__preinit_array_end = .)
0x08000470 . = ALIGN (0x4)
.init_array 0x08000470 0x4
0x08000470 . = ALIGN (0x4)
0x08000470 PROVIDE (__init_array_start = .)
*(SORT_BY_NAME(.init_array.*))
*(.init_array*)
.init_array 0x08000470 0x4 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
0x08000474 PROVIDE (__init_array_end = .)
0x08000474 . = ALIGN (0x4)
.fini_array 0x08000474 0x4
0x08000474 . = ALIGN (0x4)
[!provide] PROVIDE (__fini_array_start = .)
*(SORT_BY_NAME(.fini_array.*))
*(.fini_array*)
.fini_array 0x08000474 0x4 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
[!provide] PROVIDE (__fini_array_end = .)
0x08000478 . = ALIGN (0x4)
0x08000478 _sidata = LOADADDR (.data)
.rel.dyn 0x08000478 0x0
.rel.iplt 0x08000478 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
.data 0x20000000 0x0 load address 0x08000478
0x20000000 . = ALIGN (0x4)
0x20000000 _sdata = .
*(.data)
*(.data*)
*(.RamFunc)
*(.RamFunc*)
0x20000000 . = ALIGN (0x4)
0x20000000 _edata = .
0x08000478 _siccmsram = LOADADDR (.ccmsram)
.igot.plt 0x20000000 0x0 load address 0x08000478
.igot.plt 0x20000000 0x0 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
.ccmsram 0x10000000 0x0 load address 0x08000478
0x10000000 . = ALIGN (0x4)
0x10000000 _sccmsram = .
*(.ccmsram)
*(.ccmsram*)
0x10000000 . = ALIGN (0x4)
0x10000000 _eccmsram = .
0x10000000 . = ALIGN (0x4)
.bss 0x20000000 0x20
0x20000000 _sbss = .
0x20000000 __bss_start__ = _sbss
*(.bss)
.bss 0x20000000 0x1c /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
*(.bss*)
.bss.state 0x2000001c 0x4 ./Src/task1.o
0x2000001c state
*(COMMON)
0x20000020 . = ALIGN (0x4)
0x20000020 _ebss = .
0x20000020 __bss_end__ = _ebss
._user_heap_stack
0x20000020 0x600
0x20000020 . = ALIGN (0x8)
[!provide] PROVIDE (end = .)
0x20000020 PROVIDE (_end = .)
0x20000220 . = (. + _Min_Heap_Size)
*fill* 0x20000020 0x200
0x20000620 . = (. + _Min_Stack_Size)
*fill* 0x20000220 0x400
0x20000620 . = ALIGN (0x8)
/DISCARD/
libc.a(*)
libm.a(*)
libgcc.a(*)
.ARM.attributes
0x00000000 0x30
*(.ARM.attributes)
.ARM.attributes
0x00000000 0x22 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
.ARM.attributes
0x00000022 0x34 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
.ARM.attributes
0x00000056 0x34 ./Src/task1.o
.ARM.attributes
0x0000008a 0x34 ./Src/task1_it.o
.ARM.attributes
0x000000be 0x21 ./Startup/startup_stm32g431kbtx.o
.ARM.attributes
0x000000df 0x34 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
.ARM.attributes
0x00000113 0x22 /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
OUTPUT(task1.elf elf32-littlearm)
LOAD linker stubs
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libm.a
LOAD /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/libgcc.a
.debug_info 0x00000000 0x7b3
.debug_info 0x00000000 0x3f7 ./Src/task1.o
.debug_info 0x000003f7 0x38b ./Src/task1_it.o
.debug_info 0x00000782 0x31 ./Startup/startup_stm32g431kbtx.o
.debug_abbrev 0x00000000 0x279
.debug_abbrev 0x00000000 0x156 ./Src/task1.o
.debug_abbrev 0x00000156 0xfd ./Src/task1_it.o
.debug_abbrev 0x00000253 0x26 ./Startup/startup_stm32g431kbtx.o
.debug_aranges 0x00000000 0x78
.debug_aranges
0x00000000 0x30 ./Src/task1.o
.debug_aranges
0x00000030 0x28 ./Src/task1_it.o
.debug_aranges
0x00000058 0x20 ./Startup/startup_stm32g431kbtx.o
.debug_rnglists
0x00000000 0x39
.debug_rnglists
0x00000000 0x20 ./Src/task1.o
.debug_rnglists
0x00000020 0x19 ./Src/task1_it.o
.debug_macro 0x00000000 0x13740
.debug_macro 0x00000000 0xd4 ./Src/task1.o
.debug_macro 0x000000d4 0xac0 ./Src/task1.o
.debug_macro 0x00000b94 0x28 ./Src/task1.o
.debug_macro 0x00000bbc 0x22 ./Src/task1.o
.debug_macro 0x00000bde 0x8e ./Src/task1.o
.debug_macro 0x00000c6c 0x51 ./Src/task1.o
.debug_macro 0x00000cbd 0x103 ./Src/task1.o
.debug_macro 0x00000dc0 0x6a ./Src/task1.o
.debug_macro 0x00000e2a 0x1df ./Src/task1.o
.debug_macro 0x00001009 0x1c ./Src/task1.o
.debug_macro 0x00001025 0x22 ./Src/task1.o
.debug_macro 0x00001047 0xfb ./Src/task1.o
.debug_macro 0x00001142 0x1011 ./Src/task1.o
.debug_macro 0x00002153 0x11f ./Src/task1.o
.debug_macro 0x00002272 0x11396 ./Src/task1.o
.debug_macro 0x00013608 0x70 ./Src/task1.o
.debug_macro 0x00013678 0xc8 ./Src/task1_it.o
.debug_line 0x00000000 0x953
.debug_line 0x00000000 0x4a4 ./Src/task1.o
.debug_line 0x000004a4 0x445 ./Src/task1_it.o
.debug_line 0x000008e9 0x6a ./Startup/startup_stm32g431kbtx.o
.debug_str 0x00000000 0x6f80d
.debug_str 0x00000000 0x6f794 ./Src/task1.o
0x6f930 (size before relaxing)
.debug_str 0x0006f794 0x48 ./Src/task1_it.o
0x6f900 (size before relaxing)
.debug_str 0x0006f7dc 0x31 ./Startup/startup_stm32g431kbtx.o
0x96 (size before relaxing)
.comment 0x00000000 0x43
.comment 0x00000000 0x43 ./Src/task1.o
0x44 (size before relaxing)
.comment 0x00000043 0x44 ./Src/task1_it.o
.debug_frame 0x00000000 0xe0
.debug_frame 0x00000000 0x74 ./Src/task1.o
.debug_frame 0x00000074 0x40 ./Src/task1_it.o
.debug_frame 0x000000b4 0x2c /opt/st/stm32cubeide_1.16.0/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.linux64_1.0.200.202406132123/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(libc_a-init.o)
.debug_line_str
0x00000000 0x7a
.debug_line_str
0x00000000 0x7a ./Startup/startup_stm32g431kbtx.o

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