task3.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001d8 08000000 08000000 00001000 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 000004c0 080001d8 080001d8 000011d8 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000000 08000698 080006a0 000016a0 2**0 CONTENTS, ALLOC, LOAD, DATA 3 .ARM.extab 00000000 08000698 08000698 000016a0 2**0 CONTENTS 4 .ARM 00000000 08000698 08000698 000016a0 2**0 CONTENTS 5 .preinit_array 00000000 08000698 080006a0 000016a0 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 08000698 08000698 00001698 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 0800069c 0800069c 0000169c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 00000000 20000000 20000000 000016a0 2**0 CONTENTS, ALLOC, LOAD, DATA 9 .ccmsram 00000000 10000000 10000000 000016a0 2**0 CONTENTS 10 .bss 00000028 20000000 20000000 00002000 2**2 ALLOC 11 ._user_heap_stack 00000600 20000028 20000028 00002000 2**0 ALLOC 12 .ARM.attributes 00000030 00000000 00000000 000016a0 2**0 CONTENTS, READONLY 13 .debug_info 00000eb3 00000000 00000000 000016d0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_abbrev 00000317 00000000 00000000 00002583 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_aranges 00000098 00000000 00000000 000028a0 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_rnglists 00000051 00000000 00000000 00002938 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_macro 00013764 00000000 00000000 00002989 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_line 00000a50 00000000 00000000 000160ed 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .debug_str 0006fea8 00000000 00000000 00016b3d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 20 .comment 00000043 00000000 00000000 000869e5 2**0 CONTENTS, READONLY 21 .debug_frame 00000158 00000000 00000000 00086a28 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 22 .debug_line_str 0000007a 00000000 00000000 00086b80 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001d8 <__do_global_dtors_aux>: 80001d8: b510 push {r4, lr} 80001da: 4c05 ldr r4, [pc, #20] @ (80001f0 <__do_global_dtors_aux+0x18>) 80001dc: 7823 ldrb r3, [r4, #0] 80001de: b933 cbnz r3, 80001ee <__do_global_dtors_aux+0x16> 80001e0: 4b04 ldr r3, [pc, #16] @ (80001f4 <__do_global_dtors_aux+0x1c>) 80001e2: b113 cbz r3, 80001ea <__do_global_dtors_aux+0x12> 80001e4: 4804 ldr r0, [pc, #16] @ (80001f8 <__do_global_dtors_aux+0x20>) 80001e6: f3af 8000 nop.w 80001ea: 2301 movs r3, #1 80001ec: 7023 strb r3, [r4, #0] 80001ee: bd10 pop {r4, pc} 80001f0: 20000000 .word 0x20000000 80001f4: 00000000 .word 0x00000000 80001f8: 08000680 .word 0x08000680 080001fc : 80001fc: b508 push {r3, lr} 80001fe: 4b03 ldr r3, [pc, #12] @ (800020c ) 8000200: b11b cbz r3, 800020a 8000202: 4903 ldr r1, [pc, #12] @ (8000210 ) 8000204: 4803 ldr r0, [pc, #12] @ (8000214 ) 8000206: f3af 8000 nop.w 800020a: bd08 pop {r3, pc} 800020c: 00000000 .word 0x00000000 8000210: 20000004 .word 0x20000004 8000214: 08000680 .word 0x08000680 08000218 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8000218: b480 push {r7} 800021a: b083 sub sp, #12 800021c: af00 add r7, sp, #0 800021e: 4603 mov r3, r0 8000220: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8000222: f997 3007 ldrsb.w r3, [r7, #7] 8000226: 2b00 cmp r3, #0 8000228: db0b blt.n 8000242 <__NVIC_EnableIRQ+0x2a> { __COMPILER_BARRIER(); NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 800022a: 79fb ldrb r3, [r7, #7] 800022c: f003 021f and.w r2, r3, #31 8000230: 4907 ldr r1, [pc, #28] @ (8000250 <__NVIC_EnableIRQ+0x38>) 8000232: f997 3007 ldrsb.w r3, [r7, #7] 8000236: 095b lsrs r3, r3, #5 8000238: 2001 movs r0, #1 800023a: fa00 f202 lsl.w r2, r0, r2 800023e: f841 2023 str.w r2, [r1, r3, lsl #2] __COMPILER_BARRIER(); } } 8000242: bf00 nop 8000244: 370c adds r7, #12 8000246: 46bd mov sp, r7 8000248: f85d 7b04 ldr.w r7, [sp], #4 800024c: 4770 bx lr 800024e: bf00 nop 8000250: e000e100 .word 0xe000e100 08000254
: void Timer_init(void); void EXTI_init(void); /* ------------------------------------ M A I N --------------------------------------- */ int main(void) { 8000254: b580 push {r7, lr} 8000256: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8000258: b672 cpsid i } 800025a: bf00 nop /* --- initialization --- */ __disable_irq(); // disable interrupts globally GPIO_init(); 800025c: f000 f8f8 bl 8000450 Timer_init(); 8000260: f000 f92c bl 80004bc EXTI_init(); 8000264: f000 f94e bl 8000504 __ASM volatile ("cpsie i" : : : "memory"); 8000268: b662 cpsie i } 800026a: bf00 nop __enable_irq(); // enable interrupts globally lbp = 0; 800026c: 4b0a ldr r3, [pc, #40] @ (8000298 ) 800026e: 2200 movs r2, #0 8000270: 601a str r2, [r3, #0] GRÜN_AN; 8000272: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000276: f44f 2280 mov.w r2, #262144 @ 0x40000 800027a: 619a str r2, [r3, #24] ROT_AUS; 800027c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000280: 2201 movs r2, #1 8000282: 619a str r2, [r3, #24] GELB_AUS; 8000284: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000288: 2202 movs r2, #2 800028a: 619a str r2, [r3, #24] BLAU_AUS; 800028c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000290: 2208 movs r2, #8 8000292: 619a str r2, [r3, #24] /* --- infinite processing loop --- */ while (1){ __WFI(); 8000294: bf30 wfi 8000296: e7fd b.n 8000294 8000298: 20000024 .word 0x20000024 0800029c : return 1; } /* ------------------------------------ GLOBAL FUNCTIONS ------------------------------ */ void EXTI_IRQHandler(void){ 800029c: b480 push {r7} 800029e: af00 add r7, sp, #0 if(EXTI->PR1 & EXTI_PR1_PIF0){ 80002a0: 4b11 ldr r3, [pc, #68] @ (80002e8 ) 80002a2: 695b ldr r3, [r3, #20] 80002a4: f003 0301 and.w r3, r3, #1 80002a8: 2b00 cmp r3, #0 80002aa: d018 beq.n 80002de EXTI->PR1 = EXTI_PR1_PIF0; 80002ac: 4b0e ldr r3, [pc, #56] @ (80002e8 ) 80002ae: 2201 movs r2, #1 80002b0: 615a str r2, [r3, #20] if((timer_ticks - lbp)> 200){ 80002b2: 4b0e ldr r3, [pc, #56] @ (80002ec ) 80002b4: 681a ldr r2, [r3, #0] 80002b6: 4b0e ldr r3, [pc, #56] @ (80002f0 ) 80002b8: 681b ldr r3, [r3, #0] 80002ba: 1ad3 subs r3, r2, r3 80002bc: 2bc8 cmp r3, #200 @ 0xc8 80002be: d90e bls.n 80002de lbp = timer_ticks; 80002c0: 4b0a ldr r3, [pc, #40] @ (80002ec ) 80002c2: 681b ldr r3, [r3, #0] 80002c4: 4a0a ldr r2, [pc, #40] @ (80002f0 ) 80002c6: 6013 str r3, [r2, #0] if(ampel_aktiv == 0){ 80002c8: 4b0a ldr r3, [pc, #40] @ (80002f4 ) 80002ca: 781b ldrb r3, [r3, #0] 80002cc: b2db uxtb r3, r3 80002ce: 2b00 cmp r3, #0 80002d0: d105 bne.n 80002de timer_ticks = 0; 80002d2: 4b06 ldr r3, [pc, #24] @ (80002ec ) 80002d4: 2200 movs r2, #0 80002d6: 601a str r2, [r3, #0] ampel_aktiv=1; 80002d8: 4b06 ldr r3, [pc, #24] @ (80002f4 ) 80002da: 2201 movs r2, #1 80002dc: 701a strb r2, [r3, #0] } } } //TIM6_DAC_IRQHandler();timer_ticks } 80002de: bf00 nop 80002e0: 46bd mov sp, r7 80002e2: f85d 7b04 ldr.w r7, [sp], #4 80002e6: 4770 bx lr 80002e8: 40010400 .word 0x40010400 80002ec: 2000001c .word 0x2000001c 80002f0: 20000024 .word 0x20000024 80002f4: 20000020 .word 0x20000020 080002f8 : void TIM6_DAC_IRQHandler(void){ 80002f8: b480 push {r7} 80002fa: af00 add r7, sp, #0 if(TIM6->SR & (1<<0)){ 80002fc: 4b50 ldr r3, [pc, #320] @ (8000440 ) 80002fe: 691b ldr r3, [r3, #16] 8000300: f003 0301 and.w r3, r3, #1 8000304: 2b00 cmp r3, #0 8000306: f000 8095 beq.w 8000434 TIM6->SR &= ~(1U<<0); 800030a: 4b4d ldr r3, [pc, #308] @ (8000440 ) 800030c: 691b ldr r3, [r3, #16] 800030e: 4a4c ldr r2, [pc, #304] @ (8000440 ) 8000310: f023 0301 bic.w r3, r3, #1 8000314: 6113 str r3, [r2, #16] timer_ticks++; 8000316: 4b4b ldr r3, [pc, #300] @ (8000444 ) 8000318: 681b ldr r3, [r3, #0] 800031a: 3301 adds r3, #1 800031c: 4a49 ldr r2, [pc, #292] @ (8000444 ) 800031e: 6013 str r3, [r2, #0] if(ampel_aktiv == 1){ 8000320: 4b49 ldr r3, [pc, #292] @ (8000448 ) 8000322: 781b ldrb r3, [r3, #0] 8000324: b2db uxtb r3, r3 8000326: 2b01 cmp r3, #1 8000328: f040 8084 bne.w 8000434 switch(timer_ticks){ 800032c: 4b45 ldr r3, [pc, #276] @ (8000444 ) 800032e: 681b ldr r3, [r3, #0] 8000330: f646 5260 movw r2, #28000 @ 0x6d60 8000334: 4293 cmp r3, r2 8000336: d03a beq.n 80003ae 8000338: f646 5260 movw r2, #28000 @ 0x6d60 800033c: 4293 cmp r3, r2 800033e: d848 bhi.n 80003d2 8000340: f646 1278 movw r2, #27000 @ 0x6978 8000344: 4293 cmp r3, r2 8000346: d028 beq.n 800039a 8000348: f646 1278 movw r2, #27000 @ 0x6978 800034c: 4293 cmp r3, r2 800034e: d840 bhi.n 80003d2 8000350: f642 62e0 movw r2, #12000 @ 0x2ee0 8000354: 4293 cmp r3, r2 8000356: d03b beq.n 80003d0 8000358: f642 62e0 movw r2, #12000 @ 0x2ee0 800035c: 4293 cmp r3, r2 800035e: d838 bhi.n 80003d2 8000360: f242 7210 movw r2, #10000 @ 0x2710 8000364: 4293 cmp r3, r2 8000366: d004 beq.n 8000372 8000368: f642 22f8 movw r2, #11000 @ 0x2af8 800036c: 4293 cmp r3, r2 800036e: d00a beq.n 8000386 8000370: e02f b.n 80003d2 case 10000: GRÜN_AUS; 8000372: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000376: 2204 movs r2, #4 8000378: 619a str r2, [r3, #24] GELB_AN; 800037a: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 800037e: f44f 3200 mov.w r2, #131072 @ 0x20000 8000382: 619a str r2, [r3, #24] break; 8000384: e025 b.n 80003d2 case 11000: GELB_AUS; 8000386: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 800038a: 2202 movs r2, #2 800038c: 619a str r2, [r3, #24] ROT_AN; 800038e: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000392: f44f 3280 mov.w r2, #65536 @ 0x10000 8000396: 619a str r2, [r3, #24] break; 8000398: e01b b.n 80003d2 case 12000: break; case 27000: BLAU_AUS; 800039a: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 800039e: 2208 movs r2, #8 80003a0: 619a str r2, [r3, #24] GELB_AN; 80003a2: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80003a6: f44f 3200 mov.w r2, #131072 @ 0x20000 80003aa: 619a str r2, [r3, #24] break; 80003ac: e011 b.n 80003d2 case 28000: ROT_AUS; 80003ae: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80003b2: 2201 movs r2, #1 80003b4: 619a str r2, [r3, #24] GELB_AUS; 80003b6: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80003ba: 2202 movs r2, #2 80003bc: 619a str r2, [r3, #24] GRÜN_AN; 80003be: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80003c2: f44f 2280 mov.w r2, #262144 @ 0x40000 80003c6: 619a str r2, [r3, #24] ampel_aktiv = 0; 80003c8: 4b1f ldr r3, [pc, #124] @ (8000448 ) 80003ca: 2200 movs r2, #0 80003cc: 701a strb r2, [r3, #0] break; 80003ce: e000 b.n 80003d2 break; 80003d0: bf00 nop } if(timer_ticks >=12000 && timer_ticks < 27000){ 80003d2: 4b1c ldr r3, [pc, #112] @ (8000444 ) 80003d4: 681b ldr r3, [r3, #0] 80003d6: f642 62df movw r2, #11999 @ 0x2edf 80003da: 4293 cmp r3, r2 80003dc: d92a bls.n 8000434 80003de: 4b19 ldr r3, [pc, #100] @ (8000444 ) 80003e0: 681b ldr r3, [r3, #0] 80003e2: f646 1277 movw r2, #26999 @ 0x6977 80003e6: 4293 cmp r3, r2 80003e8: d824 bhi.n 8000434 if(timer_ticks % 1000 == 0){ 80003ea: 4b16 ldr r3, [pc, #88] @ (8000444 ) 80003ec: 681a ldr r2, [r3, #0] 80003ee: 4b17 ldr r3, [pc, #92] @ (800044c ) 80003f0: fba3 1302 umull r1, r3, r3, r2 80003f4: 099b lsrs r3, r3, #6 80003f6: f44f 717a mov.w r1, #1000 @ 0x3e8 80003fa: fb01 f303 mul.w r3, r1, r3 80003fe: 1ad3 subs r3, r2, r3 8000400: 2b00 cmp r3, #0 8000402: d105 bne.n 8000410 BLAU_AN; 8000404: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000408: f44f 2200 mov.w r2, #524288 @ 0x80000 800040c: 619a str r2, [r3, #24] BLAU_AUS; } } } } } 800040e: e011 b.n 8000434 else if(timer_ticks % 1000 == 500){ 8000410: 4b0c ldr r3, [pc, #48] @ (8000444 ) 8000412: 681a ldr r2, [r3, #0] 8000414: 4b0d ldr r3, [pc, #52] @ (800044c ) 8000416: fba3 1302 umull r1, r3, r3, r2 800041a: 099b lsrs r3, r3, #6 800041c: f44f 717a mov.w r1, #1000 @ 0x3e8 8000420: fb01 f303 mul.w r3, r1, r3 8000424: 1ad3 subs r3, r2, r3 8000426: f5b3 7ffa cmp.w r3, #500 @ 0x1f4 800042a: d103 bne.n 8000434 BLAU_AUS; 800042c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000430: 2208 movs r2, #8 8000432: 619a str r2, [r3, #24] } 8000434: bf00 nop 8000436: 46bd mov sp, r7 8000438: f85d 7b04 ldr.w r7, [sp], #4 800043c: 4770 bx lr 800043e: bf00 nop 8000440: 40001000 .word 0x40001000 8000444: 2000001c .word 0x2000001c 8000448: 20000020 .word 0x20000020 800044c: 10624dd3 .word 0x10624dd3 08000450 : * requires: - nothing - * parameters: - none - * returns: - nothing - \* ------------------------------------------------------------------------------------ */ static void GPIO_init(void) { 8000450: b480 push {r7} 8000452: af00 add r7, sp, #0 RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN; 8000454: 4b17 ldr r3, [pc, #92] @ (80004b4 ) 8000456: 6cdb ldr r3, [r3, #76] @ 0x4c 8000458: 4a16 ldr r2, [pc, #88] @ (80004b4 ) 800045a: f043 0303 orr.w r3, r3, #3 800045e: 64d3 str r3, [r2, #76] @ 0x4c // LEDs PA0-PA3 Output (01) GPIOA->MODER &= ~(0xFF); 8000460: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000464: 681b ldr r3, [r3, #0] 8000466: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 800046a: f023 03ff bic.w r3, r3, #255 @ 0xff 800046e: 6013 str r3, [r2, #0] GPIOA->MODER |= 0x55; 8000470: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000474: 681b ldr r3, [r3, #0] 8000476: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 800047a: f043 0355 orr.w r3, r3, #85 @ 0x55 800047e: 6013 str r3, [r2, #0] // Initial alle aus (Low-Active: 1 = AUS) GPIOA->ODR |= 0x0F; 8000480: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000484: 695b ldr r3, [r3, #20] 8000486: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 800048a: f043 030f orr.w r3, r3, #15 800048e: 6153 str r3, [r2, #20] // S0 (PB0) Input (00) mit Pull-Up (01) GPIOB->MODER &= ~(3 << 0); 8000490: 4b09 ldr r3, [pc, #36] @ (80004b8 ) 8000492: 681b ldr r3, [r3, #0] 8000494: 4a08 ldr r2, [pc, #32] @ (80004b8 ) 8000496: f023 0303 bic.w r3, r3, #3 800049a: 6013 str r3, [r2, #0] GPIOB->PUPDR |= (1 << 0); 800049c: 4b06 ldr r3, [pc, #24] @ (80004b8 ) 800049e: 68db ldr r3, [r3, #12] 80004a0: 4a05 ldr r2, [pc, #20] @ (80004b8 ) 80004a2: f043 0301 orr.w r3, r3, #1 80004a6: 60d3 str r3, [r2, #12] } 80004a8: bf00 nop 80004aa: 46bd mov sp, r7 80004ac: f85d 7b04 ldr.w r7, [sp], #4 80004b0: 4770 bx lr 80004b2: bf00 nop 80004b4: 40021000 .word 0x40021000 80004b8: 48000400 .word 0x48000400 080004bc : void Timer_init(void) { 80004bc: b580 push {r7, lr} 80004be: af00 add r7, sp, #0 RCC->APB1ENR1 |= RCC_APB1ENR1_TIM6EN; 80004c0: 4b0e ldr r3, [pc, #56] @ (80004fc ) 80004c2: 6d9b ldr r3, [r3, #88] @ 0x58 80004c4: 4a0d ldr r2, [pc, #52] @ (80004fc ) 80004c6: f043 0310 orr.w r3, r3, #16 80004ca: 6593 str r3, [r2, #88] @ 0x58 // 16MHz Systemtakt. 16MHz / 16 (PSC+1) = 1MHz. // Bei 1MHz sind 1000 Ticks (ARR+1) exakt 1 Millisekunde. TIM6->PSC = 15; 80004cc: 4b0c ldr r3, [pc, #48] @ (8000500 ) 80004ce: 220f movs r2, #15 80004d0: 629a str r2, [r3, #40] @ 0x28 TIM6->ARR = 999; 80004d2: 4b0b ldr r3, [pc, #44] @ (8000500 ) 80004d4: f240 32e7 movw r2, #999 @ 0x3e7 80004d8: 62da str r2, [r3, #44] @ 0x2c TIM6->DIER |=(1<<0); 80004da: 4b09 ldr r3, [pc, #36] @ (8000500 ) 80004dc: 68db ldr r3, [r3, #12] 80004de: 4a08 ldr r2, [pc, #32] @ (8000500 ) 80004e0: f043 0301 orr.w r3, r3, #1 80004e4: 60d3 str r3, [r2, #12] NVIC_EnableIRQ(TIM6_DAC_IRQn); 80004e6: 2036 movs r0, #54 @ 0x36 80004e8: f7ff fe96 bl 8000218 <__NVIC_EnableIRQ> TIM6->CR1 |= (1<<0); 80004ec: 4b04 ldr r3, [pc, #16] @ (8000500 ) 80004ee: 681b ldr r3, [r3, #0] 80004f0: 4a03 ldr r2, [pc, #12] @ (8000500 ) 80004f2: f043 0301 orr.w r3, r3, #1 80004f6: 6013 str r3, [r2, #0] } 80004f8: bf00 nop 80004fa: bd80 pop {r7, pc} 80004fc: 40021000 .word 0x40021000 8000500: 40001000 .word 0x40001000 08000504 : void EXTI_init(void) { 8000504: b580 push {r7, lr} 8000506: af00 add r7, sp, #0 RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; 8000508: 4b0f ldr r3, [pc, #60] @ (8000548 ) 800050a: 6e1b ldr r3, [r3, #96] @ 0x60 800050c: 4a0e ldr r2, [pc, #56] @ (8000548 ) 800050e: f043 0301 orr.w r3, r3, #1 8000512: 6613 str r3, [r2, #96] @ 0x60 SYSCFG->EXTICR[0] = (SYSCFG->EXTICR[0] & ~(0xF)) | 0x1; 8000514: 4b0d ldr r3, [pc, #52] @ (800054c ) 8000516: 689b ldr r3, [r3, #8] 8000518: f023 030f bic.w r3, r3, #15 800051c: 4a0b ldr r2, [pc, #44] @ (800054c ) 800051e: f043 0301 orr.w r3, r3, #1 8000522: 6093 str r3, [r2, #8] EXTI->IMR1 |= (1<<0); 8000524: 4b0a ldr r3, [pc, #40] @ (8000550 ) 8000526: 681b ldr r3, [r3, #0] 8000528: 4a09 ldr r2, [pc, #36] @ (8000550 ) 800052a: f043 0301 orr.w r3, r3, #1 800052e: 6013 str r3, [r2, #0] EXTI->FTSR1 |= (1<<0); 8000530: 4b07 ldr r3, [pc, #28] @ (8000550 ) 8000532: 68db ldr r3, [r3, #12] 8000534: 4a06 ldr r2, [pc, #24] @ (8000550 ) 8000536: f043 0301 orr.w r3, r3, #1 800053a: 60d3 str r3, [r2, #12] NVIC_EnableIRQ(EXTI0_IRQn); 800053c: 2006 movs r0, #6 800053e: f7ff fe6b bl 8000218 <__NVIC_EnableIRQ> } 8000542: bf00 nop 8000544: bd80 pop {r7, pc} 8000546: bf00 nop 8000548: 40021000 .word 0x40021000 800054c: 40010000 .word 0x40010000 8000550: 40010400 .word 0x40010400 08000554 : * * Default interrupt handler for core interrupts. * Enables the green and red LED on the STefi Light board. \* ------------------------------------------------------------------------------------ */ void ISR_error(void) { 8000554: b480 push {r7} 8000556: af00 add r7, sp, #0 /* init */ RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs) 8000558: 4b10 ldr r3, [pc, #64] @ (800059c ) 800055a: 6cdb ldr r3, [r3, #76] @ 0x4c 800055c: 4a0f ldr r2, [pc, #60] @ (800059c ) 800055e: f043 0301 orr.w r3, r3, #1 8000562: 64d3 str r3, [r2, #76] @ 0x4c GPIOA->ODR |= 0x0F; 8000564: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000568: 695b ldr r3, [r3, #20] 800056a: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 800056e: f043 030f orr.w r3, r3, #15 8000572: 6153 str r3, [r2, #20] GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x11; 8000574: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000578: 681b ldr r3, [r3, #0] 800057a: f023 03ff bic.w r3, r3, #255 @ 0xff 800057e: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 8000582: f043 0311 orr.w r3, r3, #17 8000586: 6013 str r3, [r2, #0] while(1) { /* light up the LEDs permanently */ GPIOA->ODR &= ~((1 << 2) | (1 << 0)); 8000588: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 800058c: 695b ldr r3, [r3, #20] 800058e: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 8000592: f023 0305 bic.w r3, r3, #5 8000596: 6153 str r3, [r2, #20] 8000598: e7f6 b.n 8000588 800059a: bf00 nop 800059c: 40021000 .word 0x40021000 080005a0 : * * Default interrupt handler for non-core interrupts. * Enables the blue and yellow LED on the STefi Light board. \* ------------------------------------------------------------------------------------ */ void ISR_default(void) { 80005a0: b480 push {r7} 80005a2: af00 add r7, sp, #0 /* init */ RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs) 80005a4: 4b10 ldr r3, [pc, #64] @ (80005e8 ) 80005a6: 6cdb ldr r3, [r3, #76] @ 0x4c 80005a8: 4a0f ldr r2, [pc, #60] @ (80005e8 ) 80005aa: f043 0301 orr.w r3, r3, #1 80005ae: 64d3 str r3, [r2, #76] @ 0x4c GPIOA->ODR |= 0x0F; 80005b0: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80005b4: 695b ldr r3, [r3, #20] 80005b6: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80005ba: f043 030f orr.w r3, r3, #15 80005be: 6153 str r3, [r2, #20] GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x44; 80005c0: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80005c4: 681b ldr r3, [r3, #0] 80005c6: f023 03ff bic.w r3, r3, #255 @ 0xff 80005ca: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80005ce: f043 0344 orr.w r3, r3, #68 @ 0x44 80005d2: 6013 str r3, [r2, #0] while(1) { /* light up the LEDs permanently */ GPIOA->ODR &= ~((1 << 3) | (1 << 1)); 80005d4: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80005d8: 695b ldr r3, [r3, #20] 80005da: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80005de: f023 030a bic.w r3, r3, #10 80005e2: 6153 str r3, [r2, #20] 80005e4: e7f6 b.n 80005d4 80005e6: bf00 nop 80005e8: 40021000 .word 0x40021000 080005ec : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack 80005ec: 480c ldr r0, [pc, #48] @ (8000620 ) mov sp, r0 /* set stack pointer */ 80005ee: 4685 mov sp, r0 /* Call the clock system initialization function.*/ // bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 80005f0: 480c ldr r0, [pc, #48] @ (8000624 ) ldr r1, =_edata 80005f2: 490d ldr r1, [pc, #52] @ (8000628 ) ldr r2, =_sidata 80005f4: 4a0d ldr r2, [pc, #52] @ (800062c ) movs r3, #0 80005f6: 2300 movs r3, #0 b LoopCopyDataInit 80005f8: e002 b.n 8000600 080005fa : CopyDataInit: ldr r4, [r2, r3] 80005fa: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 80005fc: 50c4 str r4, [r0, r3] adds r3, r3, #4 80005fe: 3304 adds r3, #4 08000600 : LoopCopyDataInit: adds r4, r0, r3 8000600: 18c4 adds r4, r0, r3 cmp r4, r1 8000602: 428c cmp r4, r1 bcc CopyDataInit 8000604: d3f9 bcc.n 80005fa /* Zero fill the bss segment. */ ldr r2, =_sbss 8000606: 4a0a ldr r2, [pc, #40] @ (8000630 ) ldr r4, =_ebss 8000608: 4c0a ldr r4, [pc, #40] @ (8000634 ) movs r3, #0 800060a: 2300 movs r3, #0 b LoopFillZerobss 800060c: e001 b.n 8000612 0800060e : FillZerobss: str r3, [r2] 800060e: 6013 str r3, [r2, #0] adds r2, r2, #4 8000610: 3204 adds r2, #4 08000612 : LoopFillZerobss: cmp r2, r4 8000612: 42a2 cmp r2, r4 bcc FillZerobss 8000614: d3fb bcc.n 800060e /* Call static constructors */ bl __libc_init_array 8000616: f000 f80f bl 8000638 <__libc_init_array> /* Call the application's entry point.*/ bl main 800061a: f7ff fe1b bl 8000254
0800061e : LoopForever: b LoopForever 800061e: e7fe b.n 800061e ldr r0, =_estack 8000620: 20008000 .word 0x20008000 ldr r0, =_sdata 8000624: 20000000 .word 0x20000000 ldr r1, =_edata 8000628: 20000000 .word 0x20000000 ldr r2, =_sidata 800062c: 080006a0 .word 0x080006a0 ldr r2, =_sbss 8000630: 20000000 .word 0x20000000 ldr r4, =_ebss 8000634: 20000028 .word 0x20000028 08000638 <__libc_init_array>: 8000638: b570 push {r4, r5, r6, lr} 800063a: 4d0d ldr r5, [pc, #52] @ (8000670 <__libc_init_array+0x38>) 800063c: 4c0d ldr r4, [pc, #52] @ (8000674 <__libc_init_array+0x3c>) 800063e: 1b64 subs r4, r4, r5 8000640: 10a4 asrs r4, r4, #2 8000642: 2600 movs r6, #0 8000644: 42a6 cmp r6, r4 8000646: d109 bne.n 800065c <__libc_init_array+0x24> 8000648: 4d0b ldr r5, [pc, #44] @ (8000678 <__libc_init_array+0x40>) 800064a: 4c0c ldr r4, [pc, #48] @ (800067c <__libc_init_array+0x44>) 800064c: f000 f818 bl 8000680 <_init> 8000650: 1b64 subs r4, r4, r5 8000652: 10a4 asrs r4, r4, #2 8000654: 2600 movs r6, #0 8000656: 42a6 cmp r6, r4 8000658: d105 bne.n 8000666 <__libc_init_array+0x2e> 800065a: bd70 pop {r4, r5, r6, pc} 800065c: f855 3b04 ldr.w r3, [r5], #4 8000660: 4798 blx r3 8000662: 3601 adds r6, #1 8000664: e7ee b.n 8000644 <__libc_init_array+0xc> 8000666: f855 3b04 ldr.w r3, [r5], #4 800066a: 4798 blx r3 800066c: 3601 adds r6, #1 800066e: e7f2 b.n 8000656 <__libc_init_array+0x1e> 8000670: 08000698 .word 0x08000698 8000674: 08000698 .word 0x08000698 8000678: 08000698 .word 0x08000698 800067c: 0800069c .word 0x0800069c 08000680 <_init>: 8000680: b5f8 push {r3, r4, r5, r6, r7, lr} 8000682: bf00 nop 8000684: bcf8 pop {r3, r4, r5, r6, r7} 8000686: bc08 pop {r3} 8000688: 469e mov lr, r3 800068a: 4770 bx lr 0800068c <_fini>: 800068c: b5f8 push {r3, r4, r5, r6, r7, lr} 800068e: bf00 nop 8000690: bcf8 pop {r3, r4, r5, r6, r7} 8000692: bc08 pop {r3} 8000694: 469e mov lr, r3 8000696: 4770 bx lr