task4.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001d8 08000000 08000000 00001000 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 000001e8 080001d8 080001d8 000011d8 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000000 080003c0 080003c8 000013c8 2**0 CONTENTS, ALLOC, LOAD, DATA 3 .ARM.extab 00000000 080003c0 080003c0 000013c8 2**0 CONTENTS 4 .ARM 00000000 080003c0 080003c0 000013c8 2**0 CONTENTS 5 .preinit_array 00000000 080003c0 080003c8 000013c8 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 080003c0 080003c0 000013c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 080003c4 080003c4 000013c4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 00000000 20000000 20000000 000013c8 2**0 CONTENTS, ALLOC, LOAD, DATA 9 .ccmsram 00000000 10000000 10000000 000013c8 2**0 CONTENTS 10 .bss 0000001c 20000000 20000000 00002000 2**2 ALLOC 11 ._user_heap_stack 00000604 2000001c 2000001c 00002000 2**0 ALLOC 12 .ARM.attributes 00000030 00000000 00000000 000013c8 2**0 CONTENTS, READONLY 13 .debug_info 00000733 00000000 00000000 000013f8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_abbrev 0000021a 00000000 00000000 00001b2b 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_aranges 00000070 00000000 00000000 00001d48 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_rnglists 00000032 00000000 00000000 00001db8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_macro 00013734 00000000 00000000 00001dea 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_line 000008e4 00000000 00000000 0001551e 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .debug_str 0006f7d7 00000000 00000000 00015e02 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 20 .comment 00000043 00000000 00000000 000855d9 2**0 CONTENTS, READONLY 21 .debug_frame 000000b8 00000000 00000000 0008561c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 22 .debug_line_str 0000007a 00000000 00000000 000856d4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001d8 <__do_global_dtors_aux>: 80001d8: b510 push {r4, lr} 80001da: 4c05 ldr r4, [pc, #20] @ (80001f0 <__do_global_dtors_aux+0x18>) 80001dc: 7823 ldrb r3, [r4, #0] 80001de: b933 cbnz r3, 80001ee <__do_global_dtors_aux+0x16> 80001e0: 4b04 ldr r3, [pc, #16] @ (80001f4 <__do_global_dtors_aux+0x1c>) 80001e2: b113 cbz r3, 80001ea <__do_global_dtors_aux+0x12> 80001e4: 4804 ldr r0, [pc, #16] @ (80001f8 <__do_global_dtors_aux+0x20>) 80001e6: f3af 8000 nop.w 80001ea: 2301 movs r3, #1 80001ec: 7023 strb r3, [r4, #0] 80001ee: bd10 pop {r4, pc} 80001f0: 20000000 .word 0x20000000 80001f4: 00000000 .word 0x00000000 80001f8: 080003a8 .word 0x080003a8 080001fc : 80001fc: b508 push {r3, lr} 80001fe: 4b03 ldr r3, [pc, #12] @ (800020c ) 8000200: b11b cbz r3, 800020a 8000202: 4903 ldr r1, [pc, #12] @ (8000210 ) 8000204: 4803 ldr r0, [pc, #12] @ (8000214 ) 8000206: f3af 8000 nop.w 800020a: bd08 pop {r3, pc} 800020c: 00000000 .word 0x00000000 8000210: 20000004 .word 0x20000004 8000214: 080003a8 .word 0x080003a8 08000218
: static void GPIO_init(void); /* ------------------------------------ M A I N --------------------------------------- */ int main(void) { 8000218: b580 push {r7, lr} 800021a: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 800021c: b672 cpsid i } 800021e: bf00 nop /* --- initialization --- */ __disable_irq(); // disable interrupts globally GPIO_init(); 8000220: f000 f804 bl 800022c __ASM volatile ("cpsie i" : : : "memory"); 8000224: b662 cpsie i } 8000226: bf00 nop /* --- infinite processing loop --- */ while (1) { /* ... add your code to implement the lab assignment ... */ __WFI(); 8000228: bf30 wfi 800022a: e7fd b.n 8000228 0800022c : * requires: - nothing - * parameters: - none - * returns: - nothing - \* ------------------------------------------------------------------------------------ */ static void GPIO_init(void) { 800022c: b480 push {r7} 800022e: af00 add r7, sp, #0 /* enable port clocks */ RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // LEDs: A 8000230: 4b11 ldr r3, [pc, #68] @ (8000278 ) 8000232: 6cdb ldr r3, [r3, #76] @ 0x4c 8000234: 4a10 ldr r2, [pc, #64] @ (8000278 ) 8000236: f043 0301 orr.w r3, r3, #1 800023a: 64d3 str r3, [r2, #76] @ 0x4c /* --- LEDs --- */ GPIOA->ODR |= MASK_LED_RED; 800023c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000240: 695b ldr r3, [r3, #20] 8000242: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 8000246: f043 0301 orr.w r3, r3, #1 800024a: 6153 str r3, [r2, #20] GPIOA->MODER &= ~(3 << 0); 800024c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000250: 681b ldr r3, [r3, #0] 8000252: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 8000256: f023 0303 bic.w r3, r3, #3 800025a: 6013 str r3, [r2, #0] GPIOA->MODER |= (1 << 0); // set LED pin to output 800025c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000260: 681b ldr r3, [r3, #0] 8000262: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 8000266: f043 0301 orr.w r3, r3, #1 800026a: 6013 str r3, [r2, #0] } 800026c: bf00 nop 800026e: 46bd mov sp, r7 8000270: f85d 7b04 ldr.w r7, [sp], #4 8000274: 4770 bx lr 8000276: bf00 nop 8000278: 40021000 .word 0x40021000 0800027c : * * Default interrupt handler for core interrupts. * Enables the green and red LED on the STefi Light board. \* ------------------------------------------------------------------------------------ */ void ISR_error(void) { 800027c: b480 push {r7} 800027e: af00 add r7, sp, #0 /* init */ RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs) 8000280: 4b10 ldr r3, [pc, #64] @ (80002c4 ) 8000282: 6cdb ldr r3, [r3, #76] @ 0x4c 8000284: 4a0f ldr r2, [pc, #60] @ (80002c4 ) 8000286: f043 0301 orr.w r3, r3, #1 800028a: 64d3 str r3, [r2, #76] @ 0x4c GPIOA->ODR |= MASK_LED_ALL; 800028c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000290: 695b ldr r3, [r3, #20] 8000292: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 8000296: f043 030f orr.w r3, r3, #15 800029a: 6153 str r3, [r2, #20] GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x11; 800029c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80002a0: 681b ldr r3, [r3, #0] 80002a2: f023 03ff bic.w r3, r3, #255 @ 0xff 80002a6: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80002aa: f043 0311 orr.w r3, r3, #17 80002ae: 6013 str r3, [r2, #0] while(1) { /* light up the LEDs permanently */ GPIOA->ODR &= ~(MASK_LED_GREEN | MASK_LED_RED); 80002b0: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80002b4: 695b ldr r3, [r3, #20] 80002b6: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80002ba: f023 0305 bic.w r3, r3, #5 80002be: 6153 str r3, [r2, #20] 80002c0: e7f6 b.n 80002b0 80002c2: bf00 nop 80002c4: 40021000 .word 0x40021000 080002c8 : * * Default interrupt handler for non-core interrupts. * Enables the blue and yellow LED on the STefi Light board. \* ------------------------------------------------------------------------------------ */ void ISR_default(void) { 80002c8: b480 push {r7} 80002ca: af00 add r7, sp, #0 /* init */ RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs) 80002cc: 4b10 ldr r3, [pc, #64] @ (8000310 ) 80002ce: 6cdb ldr r3, [r3, #76] @ 0x4c 80002d0: 4a0f ldr r2, [pc, #60] @ (8000310 ) 80002d2: f043 0301 orr.w r3, r3, #1 80002d6: 64d3 str r3, [r2, #76] @ 0x4c GPIOA->ODR |= MASK_LED_ALL; 80002d8: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80002dc: 695b ldr r3, [r3, #20] 80002de: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80002e2: f043 030f orr.w r3, r3, #15 80002e6: 6153 str r3, [r2, #20] GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x44; 80002e8: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80002ec: 681b ldr r3, [r3, #0] 80002ee: f023 03ff bic.w r3, r3, #255 @ 0xff 80002f2: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 80002f6: f043 0344 orr.w r3, r3, #68 @ 0x44 80002fa: 6013 str r3, [r2, #0] while(1) { /* light up the LEDs permanently */ GPIOA->ODR &= ~(MASK_LED_BLUE | MASK_LED_YELLOW); 80002fc: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8000300: 695b ldr r3, [r3, #20] 8000302: f04f 4290 mov.w r2, #1207959552 @ 0x48000000 8000306: f023 030a bic.w r3, r3, #10 800030a: 6153 str r3, [r2, #20] 800030c: e7f6 b.n 80002fc 800030e: bf00 nop 8000310: 40021000 .word 0x40021000 08000314 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack 8000314: 480c ldr r0, [pc, #48] @ (8000348 ) mov sp, r0 /* set stack pointer */ 8000316: 4685 mov sp, r0 /* Call the clock system initialization function.*/ // bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8000318: 480c ldr r0, [pc, #48] @ (800034c ) ldr r1, =_edata 800031a: 490d ldr r1, [pc, #52] @ (8000350 ) ldr r2, =_sidata 800031c: 4a0d ldr r2, [pc, #52] @ (8000354 ) movs r3, #0 800031e: 2300 movs r3, #0 b LoopCopyDataInit 8000320: e002 b.n 8000328 08000322 : CopyDataInit: ldr r4, [r2, r3] 8000322: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8000324: 50c4 str r4, [r0, r3] adds r3, r3, #4 8000326: 3304 adds r3, #4 08000328 : LoopCopyDataInit: adds r4, r0, r3 8000328: 18c4 adds r4, r0, r3 cmp r4, r1 800032a: 428c cmp r4, r1 bcc CopyDataInit 800032c: d3f9 bcc.n 8000322 /* Zero fill the bss segment. */ ldr r2, =_sbss 800032e: 4a0a ldr r2, [pc, #40] @ (8000358 ) ldr r4, =_ebss 8000330: 4c0a ldr r4, [pc, #40] @ (800035c ) movs r3, #0 8000332: 2300 movs r3, #0 b LoopFillZerobss 8000334: e001 b.n 800033a 08000336 : FillZerobss: str r3, [r2] 8000336: 6013 str r3, [r2, #0] adds r2, r2, #4 8000338: 3204 adds r2, #4 0800033a : LoopFillZerobss: cmp r2, r4 800033a: 42a2 cmp r2, r4 bcc FillZerobss 800033c: d3fb bcc.n 8000336 /* Call static constructors */ bl __libc_init_array 800033e: f000 f80f bl 8000360 <__libc_init_array> /* Call the application's entry point.*/ bl main 8000342: f7ff ff69 bl 8000218
08000346 : LoopForever: b LoopForever 8000346: e7fe b.n 8000346 ldr r0, =_estack 8000348: 20008000 .word 0x20008000 ldr r0, =_sdata 800034c: 20000000 .word 0x20000000 ldr r1, =_edata 8000350: 20000000 .word 0x20000000 ldr r2, =_sidata 8000354: 080003c8 .word 0x080003c8 ldr r2, =_sbss 8000358: 20000000 .word 0x20000000 ldr r4, =_ebss 800035c: 2000001c .word 0x2000001c 08000360 <__libc_init_array>: 8000360: b570 push {r4, r5, r6, lr} 8000362: 4d0d ldr r5, [pc, #52] @ (8000398 <__libc_init_array+0x38>) 8000364: 4c0d ldr r4, [pc, #52] @ (800039c <__libc_init_array+0x3c>) 8000366: 1b64 subs r4, r4, r5 8000368: 10a4 asrs r4, r4, #2 800036a: 2600 movs r6, #0 800036c: 42a6 cmp r6, r4 800036e: d109 bne.n 8000384 <__libc_init_array+0x24> 8000370: 4d0b ldr r5, [pc, #44] @ (80003a0 <__libc_init_array+0x40>) 8000372: 4c0c ldr r4, [pc, #48] @ (80003a4 <__libc_init_array+0x44>) 8000374: f000 f818 bl 80003a8 <_init> 8000378: 1b64 subs r4, r4, r5 800037a: 10a4 asrs r4, r4, #2 800037c: 2600 movs r6, #0 800037e: 42a6 cmp r6, r4 8000380: d105 bne.n 800038e <__libc_init_array+0x2e> 8000382: bd70 pop {r4, r5, r6, pc} 8000384: f855 3b04 ldr.w r3, [r5], #4 8000388: 4798 blx r3 800038a: 3601 adds r6, #1 800038c: e7ee b.n 800036c <__libc_init_array+0xc> 800038e: f855 3b04 ldr.w r3, [r5], #4 8000392: 4798 blx r3 8000394: 3601 adds r6, #1 8000396: e7f2 b.n 800037e <__libc_init_array+0x1e> 8000398: 080003c0 .word 0x080003c0 800039c: 080003c0 .word 0x080003c0 80003a0: 080003c0 .word 0x080003c0 80003a4: 080003c4 .word 0x080003c4 080003a8 <_init>: 80003a8: b5f8 push {r3, r4, r5, r6, r7, lr} 80003aa: bf00 nop 80003ac: bcf8 pop {r3, r4, r5, r6, r7} 80003ae: bc08 pop {r3} 80003b0: 469e mov lr, r3 80003b2: 4770 bx lr 080003b4 <_fini>: 80003b4: b5f8 push {r3, r4, r5, r6, r7, lr} 80003b6: bf00 nop 80003b8: bcf8 pop {r3, r4, r5, r6, r7} 80003ba: bc08 pop {r3} 80003bc: 469e mov lr, r3 80003be: 4770 bx lr