65 lines
2.0 KiB
Plaintext
65 lines
2.0 KiB
Plaintext
/* ***************************************************************************************
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* Project: task2 - switch triggered LEDs
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* File: ldscript_rom.ld
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*
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* Language: ld
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*
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* Hardware: STefi Light v1.1
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* Processor: STM32G431KBT6U
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*
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* Author: Manuel Lederhofer
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* Datum: 31.10.2014
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*
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* Version: 6.0
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* History:
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* 31.10.2014 ML create file for Kinetis tower
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* 22.07.2015 ML change MEMORY to switch from MK60N512VMD100 to MKL05Z32VLC4
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* 05.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
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* remove PROTECT area, fit MEMORY regions
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* 25.09.2019 ML change PGM memory base from 0x08002000 to 0x08000400
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* 04.09.2020 HL port from STM32L476RG to STM32F411xE
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* 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
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* 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
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*
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* Status: working
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*
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* Description:
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* Linker script for the STefi Light in MCT lab exercises.
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*
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* Notes:
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* The G431 incorporates three types of memory:
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* - 128K flash @ 0x08000000
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* - 32K SRAM @ SRAM1 (16K): 0x20000000, SRAM2 (6K): 0x20004000
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* - 10K CCMSRAM @ 0x10000000 || 0x20005800
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************************************************************************************** */
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MEMORY
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{
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IVECS (R) : ORIGIN = 0x08000000, LENGTH = 0x000001D8
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PGM (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000C00
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EXHANDS (RX) : ORIGIN = 0x08001000, LENGTH = 0x00000400
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RAM (RW) : ORIGIN = 0x20000000, LENGTH = 0x00001800
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}
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SECTIONS
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{
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.vectortable (READONLY) :
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{
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. = ALIGN(4);
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KEEP(*(.vectortable))
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. = ALIGN(4);
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} > IVECS
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.text (READONLY) :
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{
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*(.text)
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} > PGM
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.exhand (READONLY) :
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{
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*(.exhand)
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} > EXHANDS
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}
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/* ************************************ E O F ***************************************** */ |