38 lines
2.5 KiB
Tcl
Executable File
38 lines
2.5 KiB
Tcl
Executable File
###POWER PLANNING####
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##Make PG rails and stripes and connect macros to the power pins##
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create_supply_net -net_name VDD -power_net true
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create_supply_net -net_name VSS -power_net false
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connect_supply_net VDD -pins [get_pins *vdd* ]
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connect_supply_net VSS -pins [get_pins *gnd* ]
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## Adding Power Structure
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remove_routing -route_types pre_route
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create_pg_rings -partitions "demo_chip" -nets "VDD VSS" -window false -layers { metal9 metal10 } -widths { 45000a 50000a } -step 32000a -spacing 15000a -offset { 165000a 165000a 165000a 165000a } -keep_pattern all -bridge_pattern single -ignore_blockages { placement } -check_drc { all } -measure_from edge -corner_style concentric -insert_vias true -location auto
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create_pg_stripes -partitions "demo_chip" -nets "VDD VSS" -window false -layer metal10 -widths { 80000a 80000a } -step 500000a -spacing 20000a -direction vertical -offset { 500000a 500000a } -margin { 300000a 300000a } -measure_from center_line -keep_pattern false -ignore_blockages { placement } -check_drc { all }
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create_pg_stripes -partitions "demo_chip" -nets "VDD VSS" -window false -layer metal9 -widths { 80000a 80000a } -step 500000a -spacing 20000a -direction horizontal -offset { 500000a 500000a } -margin { 300000a 300000a } -measure_from center_line -keep_pattern false -ignore_blockages { placement } -check_drc { all }
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insert_pg_vias -nets {VDD VSS} -layers {metal9 metal10} -extend true -from_type stripe -to_type ring
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insert_pg_vias -nets {VDD VSS} -from_type stripe -to_type stripe -layers {metal9 metal10}
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create_pg_stripes -partitions "demo_chip" -nets "VDD VSS" -window false -layer metal4 -widths { 40000a 40000a } -step 500000a -spacing 20000a -direction vertical -offset { 800000a 800000a } -margin { 300000a 300000a } -measure_from center_line -keep_pattern false -ignore_blockages { placement } -check_drc { all }
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insert_pg_vias -nets {VDD VSS} -from_type stripe -to_type stripe -layers {metal9 metal4} -extend true
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insert_pg_vias -nets {VDD VSS} -from_type ring -to_type stripe -layers {metal9 metal4} -extend true
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create_pg_rails -partitions "demo_chip" -nets "VDD VSS" -window false -sites "FreePDK45_38x28_10R_NP_162NW_34O" -ignore_blockages { none }
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insert_pg_vias -from_type stripe -to_type rail -layers {metal1 metal4}
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insert_pg_vias -nets {VDD VSS} -layers {metal6 metal10} -from_type stripe -to_type macro_port
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insert_pg_vias -nets {VDD VSS} -layers {metal4 metal5} -from_type stripe -to_type macro_port
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####################Check DRC####################
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check_drc -only false
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clean_drc -force
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check_drc -with_pre_route
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