diff --git a/Bus_if/Bus_if.sv b/Bus_if/Bus_if.sv
index caf33ee..f5fdcbd 100644
--- a/Bus_if/Bus_if.sv
+++ b/Bus_if/Bus_if.sv
@@ -9,7 +9,6 @@ interface Bus_if (input clk);
     logic[9:0] Data;
     logic SendData;
     logic TimerMeas;
-    logic Clk;
     logic DataValid;
     logic AlarmAmpel;
     logic TasteAktiv;
@@ -29,4 +28,18 @@ interface Bus_if (input clk);
         output SendData,
         output TimerEN
     );
+
+    modport timer (
+        input clk,
+        input Taste,
+        input TimerEN,
+        output ReadTemp,
+        output TasteAktiv
+    );
+
+/*
+    module parallelport wird in top level design
+    ohne modport verbunden, da inEndOfConv nicht
+    Teil des Bus_if ist.
+*/
 endinterface //Bus
\ No newline at end of file