From 6ab278694e1e3320aef8df9bba144590f9c43a46 Mon Sep 17 00:00:00 2001
From: sessleral71711 <sessleral71711@th-nuernberg.de>
Date: Tue, 14 Jun 2022 10:35:05 +0200
Subject: [PATCH] Initalized top level design

---
 Top/Top.sv    | 15 +++++++++++++++
 Top/tb_Top.sv |  5 +++++
 2 files changed, 20 insertions(+)
 create mode 100644 Top/Top.sv
 create mode 100644 Top/tb_Top.sv

diff --git a/Top/Top.sv b/Top/Top.sv
new file mode 100644
index 0000000..d8e489c
--- /dev/null
+++ b/Top/Top.sv
@@ -0,0 +1,15 @@
+`include "../spi_interface.v"
+`include "../fsm/Fsm.sv"
+
+module Top(
+    input wire clk
+);
+    // Bus (Interface)
+    // SPI Interface
+    // FSM
+    // Parallelport
+    // FRAM-Controller
+    // Timer
+    // Ampelsteuerung
+    
+endmodule
\ No newline at end of file
diff --git a/Top/tb_Top.sv b/Top/tb_Top.sv
new file mode 100644
index 0000000..cf1b286
--- /dev/null
+++ b/Top/tb_Top.sv
@@ -0,0 +1,5 @@
+`include "Top.sv"
+
+module tb_Top;
+    
+endmodule
\ No newline at end of file