modports angepasst

This commit is contained in:
sessleral71711 2022-06-17 11:49:26 +02:00
parent 71fd941588
commit 97113a9804

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@ -30,16 +30,12 @@ interface spi_interface_ports (input clk);
logic spi1_sck_io; // Clock for SPI-Slave logic spi1_sck_io; // Clock for SPI-Slave
// MODPORT form BUS perspective (internal) // MODPORT form BUS perspective (internal)
// modport output from BUS (internal) // modport input and output from BUS (internal)
modport BUS (output sb_clk_i, sb_stb_i, sb_wr_i, sb_adr_i, sb_dat_i, spi1_miso_io); modport BUS (output sb_clk_i, sb_stb_i, sb_wr_i, sb_adr_i, sb_dat_i, spi1_miso_io, input sb_dat_o, sb_ack_o, spi1_mosi_io, spi1_mcs_n_o, spi1_sck_io);
// modport input to BUS (internal)
modport BUS (input sb_dat_o, sb_ack_o, spi1_mosi_io, spi1_mcs_n_o, spi_sck_io);
// MODPORT from SPI perspective (external) // MODPORT from SPI perspective (external)
// modport output from SPI (external) // modport input and output from SPI (external)
modport SPI (output spi1_miso_io); modport SPI (output spi1_miso_io, input spi1_mosi_io, spi1_mcs_n_o, spi1_sck_io);
// modport input to SPI (external)
modport SPI (input spi1_mosi_io, spi1_mcs_n_o, spi_sck_io);
endinterface endinterface