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„Timer.sv“ hinzufügen

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Johannes Schmitt 1 year ago
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//------------------------------------------------------
//
// File : Timer.sv
// Related Files :
// Author(s) :
// Email :
// Organization : Georg-Simon-Ohm-Hochschule Nuernberg
// Notes :
//
//------------------------------------------------------
// History
//------------------------------------------------------
// Version| Author | Mod. Date | Changes Made:
// v1.00 | | 11.05.2023 |
//------------------------------------------------------
//eoh


module timer (bus_e bus); // (bus.timer b, clock_if.clock_port_top i)

integer counter = 0; // internal count reg
integer reload_val;

always @ (posedge bus.clk or bus.reset) begin // b.dip[0] <---- soll reset sein i.clk <-- busclk
if (!bus.reset) begin
counter <= 0;
bus.out_10s <= 0; // b.timer <--- out_10s
end else begin
if(counter <= 100) begin // zu testzwecken kürzer 1000000
counter++;
bus.out_10s <= 0;
end else begin
counter <= 0;
bus.out_10s <= 1;
end
end

end

endmodule : timer

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