Initial commit
This commit is contained in:
@@ -0,0 +1,37 @@
|
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001080B3
|
||||
40210133
|
||||
0031C1B3
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||||
00426233
|
||||
0052F2B3
|
||||
00631333
|
||||
0073D3B3
|
||||
40845433
|
||||
0094A4B3
|
||||
00A53533
|
||||
00B58593
|
||||
00C64613
|
||||
00D6E693
|
||||
00E77713
|
||||
00F79793
|
||||
01085813
|
||||
4118D893
|
||||
01292913
|
||||
0139B993
|
||||
014A0A03
|
||||
015A9A83
|
||||
016B2B03
|
||||
017BCB83
|
||||
018C5C03
|
||||
019C8CA3
|
||||
01AD1D23
|
||||
01BDADA3
|
||||
01CE0E63
|
||||
01CE1E63
|
||||
01EF4F63
|
||||
01EF5F63
|
||||
00216163
|
||||
00217163
|
||||
0040026F
|
||||
00420267
|
||||
000052B7
|
||||
00006317
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||||
@@ -0,0 +1,65 @@
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// *********************************************************************************************
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// Description : Assembly instructions for decoder test
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// Project Version : v1.0
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// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
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// -----
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// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
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// Created : 15.Oct.2025 by Hussein Elzomor
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// Last Modified : 15.Oct.2025 by Hussein Elzomor
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||||
// -----
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// HISTORY : Date By Comments
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// ----------- --------- -------------------------------------------------
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// *********************************************************************************************
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# Iteration over all implemented instructions to test decoder
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# R-instruction # Hex # bin f7 rs2 rs1 f3 rd opcode
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add x1 , x1 , x1 # 0x001080B3 # 0b 0000000 00001 00001 000 00001 0110011
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sub x2 , x2 , x2 # 0x40210133 # 0b 0100000 00010 00010 000 00010 0110011
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xor x3 , x3 , x3 # 0x0031C1B3 # 0b 0000000 00011 00011 100 00011 0110011
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or x4 , x4 , x4 # 0x00426233 # 0b 0000000 00100 00100 110 00100 0110011
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and x5 , x5 , x5 # 0x0052F2B3 # 0b 0000000 00101 00101 111 00101 0110011
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sll x6 , x6 , x6 # 0x00631333 # 0b 0000000 00110 00110 001 00110 0110011
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srl x7 , x7 , x7 # 0x0073D3B3 # 0b 0000000 00111 00111 101 00111 0110011
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sra x8 , x8 , x8 # 0x40845433 # 0b 0100000 01000 01000 101 01000 0110011
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slt x9 , x9 , x9 # 0x0094A4B3 # 0b 0000000 01001 01001 010 01001 0110011
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sltu x10, x10, x10 # 0x00A53533 # 0b 0000000 01010 01010 011 01010 0110011
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# I-instruction # Hex # bin imm rs1 f3 rd opcode
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addi x11, x11, 11 # 0x00B58593 # 0b 000000001011 01011 000 01011 0010011
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xori x12, x12, 12 # 0x00C64613 # 0b 000000001100 01100 100 01100 0010011
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ori x13, x13, 13 # 0x00D6E693 # 0b 000000001101 01101 110 01101 0010011
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andi x14, x14, 14 # 0x00E77713 # 0b 000000001110 01110 111 01110 0010011
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slli x15, x15, 15 # 0x00F79793 # 0b 000000001111 01111 001 01111 0010011
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srli x16, x16, 16 # 0x01085813 # 0b 000000010000 10000 101 10000 0010011
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srai x17, x17, 17 # 0x4118D893 # 0b 010000010001 10001 101 10001 0010011
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slti x18, x18, 18 # 0x01292913 # 0b 000000010010 10010 010 10010 0010011
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sltiu x19, x19, 19 # 0x0139B993 # 0b 000000010011 10011 011 10011 0010011
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lb x20, 20(x20) # 0x014A0A03 # 0b 000000010100 10100 000 10100 0000011
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lh x21, 21(x21) # 0x015A9A83 # 0b 000000010101 10101 001 10101 0000011
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lw x22, 22(x22) # 0x016B2B03 # 0b 000000010110 10110 010 10110 0000011
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lbu x23, 23(x23) # 0x017BCB83 # 0b 000000010111 10111 100 10111 0000011
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lhu x24, 24(x24) # 0x018C5C03 # 0b 000000011000 11000 101 11000 0000011
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# S-instruction # Hex # bin imm rs2 rs1 f3 imm opcode
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sb x25, 25(x25) # 0x019C8CA3 # 0b 0000000 11001 11001 000 11001 0100011
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sh x26, 26(x26) # 0x01AD1D23 # 0b 0000000 11010 11010 001 11010 0100011
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sw x27, 27(x27) # 0x01BDADA3 # 0b 0000000 11011 11011 010 11011 0100011
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# B-instruction # Hex # bin imm rs2 rs1 f3 imm opcode
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beq x28, x28, 28 # 0x01CE0E63 # 0b 0000000 11100 11100 000 11100 1100011
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bne x28, x28, 28 # 0x01CE1E63 # 0b 0000000 11100 11100 001 11100 1100011
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blt x30, x30, 30 # 0x01EF4F63 # 0b 0000000 11110 11110 100 11110 1100011
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bge x30, x30, 30 # 0x01EF5F63 # 0b 0000000 11110 11110 101 11110 1100011
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bltu x2 , x2 , 2 # 0x00216163 # 0b 0000000 00010 00010 110 00010 1100011
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bgeu x2 , x2 , 2 # 0x00217163 # 0b 0000000 00010 00010 111 00010 1100011
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# J-instruction # Hex # bin f7 rd opcode
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jal x4 , 4 # 0x0040026F # 0b 00000000010000000000 00100 1101111
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jalr x4 , x4, 4 # 0x00420267 # 0b 00000000010000100000 00100 1100111
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# U-instruction # Hex # bin f7 rd opcode
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lui x5 , 5 # 0x000052B7 # 0b 00000000000000000101 00101 0110111
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auipc x6 , 6 # 0x00006317 # 0b 00000000000000000110 00110 0010111
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@@ -0,0 +1,29 @@
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// *********************************************************************************************
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// Description : C Program to calculate the Fibonacci numbers until a given number of terms
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// File : v1.0
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// Project Version : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
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// Project : RISCV_IN3DAYS
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// -----
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// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
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// Created : 13.Oct.2025, 11:00:00 by Fuad Mammadzada (fuad.mammadzada@fau.de)
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// -----
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// HISTORY : Date By Comments
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// ----------- --------- -------------------------------------------------
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// *********************************************************************************************
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asm(".global _start, halt; _start: lui sp 2; addi sp sp -4; jal x0 main");
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int main() {
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int n = 10; // count of Fibonacci numbers to be evaluated
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int fib_number[20];
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fib_number[0] = 0;
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fib_number[1] = 1;
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for (int i = 2; i < n; i++) {
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fib_number[i] = fib_number[i-1] + fib_number[i-2];
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}
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asm("j halt");
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}
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@@ -0,0 +1,16 @@
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00002137
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FFC10113
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||||
0080006F
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0000006F
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FB010113
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||||
00100513
|
||||
00810593
|
||||
00012023
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||||
00A12223
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||||
02810613
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||||
FF85A683
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||||
00A68533
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||||
00A5A023
|
||||
00458593
|
||||
FEC598E3
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||||
FD1FF06F
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||||
@@ -0,0 +1,38 @@
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// *********************************************************************************************
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||||
// Description : Assembly instructions for fibonacci program
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// Project Version : v1.0
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||||
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
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// -----
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||||
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
|
||||
// Created : 15.Oct.2025 by Fuad Mammadzada
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// Last Modified : 21.Oct.2025 by Fuad Mammadzada
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// -----
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||||
// HISTORY : Date By Comments
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||||
// ----------- --------- -------------------------------------------------
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||||
// *********************************************************************************************
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||||
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# Instruction # Hex code # MemAddr(PC) # Corresponding C code & explanation
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_start:
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lui sp, 2 # 0x00002137 # 0x00000000 # Initialize stack pointer value to size of memory (0x00002000)
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addi sp, sp -4 # 0xFFC10113 # 0x00000004 # Subtract stack pointer value by 4 to point to the last memory address (0x00001FFC)
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jal x0, main # 0x0080006F # 0x00000008 # Jump to main without saving the return address
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halt:
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jal x0, halt # 0x0000006F # 0x0000000C # Halt the program (infinite loop)
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main: # -------- # fibonacci.c:17: int main() {
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addi sp, sp, -80 # 0xFB010113 # 0x00000010 # fibonacci.c:20: int fib_number[20]; (allocate 20*4B from the stack)
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addi a0, x0, 1 # 0x00100513 # 0x00000014 # a0 = 0 + 1 (this is later used in fibonacci.c:22)
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addi a1, sp, 8 # 0x00810593 # 0x00000018 # calculate and save the address of fib_number[2]
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sw x0, 0(sp) # 0x00012023 # 0x0000001C # fibonacci.c:21: fib_number[0] = x0 = 0
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sw a0, 4(sp) # 0x00A12223 # 0x00000020 # fibonacci.c:22: fib_number[1] = a0 = 1
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addi a2, sp, 40 # 0x02810613 # 0x00000024 # fibonacci.c:24: calculate the last array index for the loop condition (since n=10, n*4B)
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.for_loop:
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lw a3, -8(a1) # 0xFF85A683 # 0x00000028 # fibonacci.c:25: a3 = fib_number[i-2]
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add a0, a3, a0 # 0x00A68533 # 0x0000002C # fibonacci.c:25: a0 = fib_number[i-1] + fib_number[i-2]
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sw a0, 0(a1) # 0x00A5A023 # 0x00000030 # fibonacci.c:25: fib_number[i] = a0
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addi a1, a1, 4 # 0x00458593 # 0x00000034 # fibonacci.c:24: i++
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bne a1, a2, .for_loop # 0xFEC598E3 # 0x00000038 # fibonacci.c:24: loop back if i != n
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jal x0, halt # 0xFD1FF06F # 0x0000003C # fibonacci.c:28: asm("j halt");
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@@ -0,0 +1,43 @@
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// *********************************************************************************************
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||||
// Description : C Program to store the sentence 'hello world!' in a char array in memory
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// Project Version : v1.0
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||||
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
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||||
// -----
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||||
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
|
||||
// Created : 15.Oct.2025 by Hussein Elzomor
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||||
// Last Modified : 15.Oct.2025 by Hussein Elzomor
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||||
// -----
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||||
// HISTORY : Date By Comments
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||||
// ----------- --------- -------------------------------------------------
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||||
// *********************************************************************************************
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||||
|
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asm(".global _start, halt; .set DataMem 0x1; _start: lui sp 0x2; addi sp sp -4; jal main;");
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// DataMem address usage is set manually in the assembly code after its generation.
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void storeChar(char c, char *location)
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{
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*location = c;
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||||
}
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||||
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int main()
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||||
{
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||||
static char mem[13];
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||||
|
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storeChar('h', &mem[0]);
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storeChar('e', &mem[1]);
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||||
storeChar('l', &mem[2]);
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||||
storeChar('l', &mem[3]);
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||||
storeChar('o', &mem[4]);
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||||
storeChar(' ', &mem[5]);
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storeChar('w', &mem[6]);
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||||
storeChar('o', &mem[7]);
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||||
storeChar('r', &mem[8]);
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||||
storeChar('l', &mem[9]);
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||||
storeChar('d', &mem[10]);
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||||
storeChar('!', &mem[11]);
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||||
storeChar('\0', &mem[12]); // Don't forget the null terminator!
|
||||
|
||||
return 0; // End the main function and return 0 on success
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||||
}
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||||
@@ -0,0 +1,92 @@
|
||||
00002137
|
||||
FFC10113
|
||||
03C000EF
|
||||
0000006F
|
||||
FE010113
|
||||
00112E23
|
||||
00812C23
|
||||
02010413
|
||||
FEB42423
|
||||
FEA407A3
|
||||
FE842783
|
||||
FEF44703
|
||||
00E78023
|
||||
01C12083
|
||||
01812403
|
||||
02010113
|
||||
00008067
|
||||
FF010113
|
||||
00112623
|
||||
00812423
|
||||
01010413
|
||||
000015B7
|
||||
00058593
|
||||
06800513
|
||||
00000317
|
||||
FB0300E7
|
||||
000015B7
|
||||
00158593
|
||||
06500513
|
||||
00000317
|
||||
F9C300E7
|
||||
000015B7
|
||||
00258593
|
||||
06C00513
|
||||
00000317
|
||||
F88300E7
|
||||
000015B7
|
||||
00358593
|
||||
06C00513
|
||||
00000317
|
||||
F74300E7
|
||||
000015B7
|
||||
00458593
|
||||
06F00513
|
||||
00000317
|
||||
F60300E7
|
||||
000015B7
|
||||
00558593
|
||||
02000513
|
||||
00000317
|
||||
F4C300E7
|
||||
000015B7
|
||||
00658593
|
||||
07700513
|
||||
00000317
|
||||
F38300E7
|
||||
000015B7
|
||||
00758593
|
||||
06F00513
|
||||
00000317
|
||||
F24300E7
|
||||
000015B7
|
||||
00858593
|
||||
07200513
|
||||
00000317
|
||||
F10300E7
|
||||
000015B7
|
||||
00958593
|
||||
06C00513
|
||||
00000317
|
||||
EFC300E7
|
||||
000015B7
|
||||
00A58593
|
||||
06400513
|
||||
00000317
|
||||
EE8300E7
|
||||
000015B7
|
||||
00B58593
|
||||
02100513
|
||||
00000317
|
||||
ED4300E7
|
||||
000015B7
|
||||
00C58593
|
||||
00000513
|
||||
00000317
|
||||
EC0300E7
|
||||
00000793
|
||||
00078513
|
||||
00C12083
|
||||
00812403
|
||||
01010113
|
||||
00008067
|
||||
@@ -0,0 +1,121 @@
|
||||
// *********************************************************************************************
|
||||
// Description : Assembly instructions for hello world program
|
||||
// Project Version : v1.0
|
||||
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
|
||||
// -----
|
||||
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
|
||||
// Created : 15.Oct.2025 by Hussein Elzomor
|
||||
// Last Modified : 21.Oct.2025 by Hussein Elzomor
|
||||
// -----
|
||||
// HISTORY : Date By Comments
|
||||
// ----------- --------- -------------------------------------------------
|
||||
// *********************************************************************************************
|
||||
|
||||
|
||||
|
||||
# GNU C++17 (crosstool-NG UNKNOWN) version 15.2.0 (riscv32-unknown-linux-gnu)
|
||||
# compiled by GNU C version 16.0.0 20250802 (experimental), GMP version 6.3.0, MPFR version 4.2.1, MPC version 1.3.1, isl version isl-0.24-GMP
|
||||
|
||||
# GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
|
||||
# options passed: -mabi=ilp32d -misa-spec=20191213 -mtls-dialect=trad -march=rv32ifd_zicsr -g
|
||||
.set DataMem,0x1 # Start of Data Memory 0x1000 (translates to 0x400 due to 4 bytes adressing system)
|
||||
_start:
|
||||
lui sp, 0x2 # Initialize stack pointer value to size of memory (0x00002000)
|
||||
addi sp, sp -4 # Subtract stack pointer value by 4 to point to the last memory address (0x00001FFC)
|
||||
jal main # Jump to main and save return address to ra
|
||||
halt:
|
||||
j halt # Get stuck here in a loop forever
|
||||
storeChar:
|
||||
addi sp,sp,-32 # Reserve some space on the stack
|
||||
sw ra,28(sp) # Save the return address on the stack
|
||||
sw s0,24(sp) # Save the caller frame pointer value on the stack
|
||||
addi s0,sp,32 # Store the callee frame pointer value in s0 (end address of the stack frame)
|
||||
sw a1,-24(s0) # arg1, location
|
||||
sb a0,-17(s0) # arg0, c
|
||||
# helloWorld.c:8: *location = c;
|
||||
lw a5,-24(s0) # tmp136, location
|
||||
lbu a4,-17(s0) # tmp137, c
|
||||
sb a4,0(a5) # tmp137, *location_2(D)
|
||||
# helloWorld.c:9: }
|
||||
lw ra,28(sp) # Load the return address from the stack and store it in ra
|
||||
lw s0,24(sp) # Load the caller frame pointer value from the stack and store it in s0
|
||||
addi sp,sp,32 # Free the allocated stack space for the function call
|
||||
jr ra # Return to address stored in ra
|
||||
main:
|
||||
addi sp,sp,-16 # Reserve some space on the stack
|
||||
sw ra,12(sp) # Save the return address on the stack
|
||||
sw s0,8(sp) # Save the caller frame pointer value on the stack
|
||||
addi s0,sp,16 # Store the callee frame pointer value in s0 (end address of the stack frame)
|
||||
# helloWorld.c:15: storeChar('h', &mem[0]);
|
||||
lui a1,DataMem # tmp136, DataMem
|
||||
addi a1,a1,0 # arg1, tmp136 + 0
|
||||
li a0,104 # arg0, 'h'
|
||||
call storeChar #
|
||||
# helloWorld.c:16: storeChar('e', &mem[1]);
|
||||
lui a1,DataMem # tmp137, DataMem
|
||||
addi a1,a1,1 # arg1, tmp137 + 1
|
||||
li a0,101 # arg0, 'e'
|
||||
call storeChar #
|
||||
# helloWorld.c:17: storeChar('l', &mem[2]);
|
||||
lui a1,DataMem # tmp138, DataMem
|
||||
addi a1,a1,2 # arg1, tmp138 + 2
|
||||
li a0,108 # arg0, 'l'
|
||||
call storeChar #
|
||||
# helloWorld.c:18: storeChar('l', &mem[3]);
|
||||
lui a1,DataMem # tmp139, DataMem
|
||||
addi a1,a1,3 # arg1, tmp139 + 3
|
||||
li a0,108 # arg0, 'l'
|
||||
call storeChar #
|
||||
# helloWorld.c:19: storeChar('o', &mem[4]);
|
||||
lui a1,DataMem # tmp140, DataMem
|
||||
addi a1,a1,4 # arg1, tmp140 + 4
|
||||
li a0,111 # arg0, 'o'
|
||||
call storeChar #
|
||||
# helloWorld.c:20: storeChar(' ', &mem[5]);
|
||||
lui a1,DataMem # tmp141, DataMem
|
||||
addi a1,a1,5 # arg1, tmp141 + 5
|
||||
li a0,32 # arg0, ' '
|
||||
call storeChar #
|
||||
# helloWorld.c:21: storeChar('w', &mem[6]);
|
||||
lui a1,DataMem # tmp142, DataMem
|
||||
addi a1,a1,6 # arg1, tmp142 + 6
|
||||
li a0,119 # arg0, 'w'
|
||||
call storeChar #
|
||||
# helloWorld.c:22: storeChar('o', &mem[7]);
|
||||
lui a1,DataMem # tmp143, DataMem
|
||||
addi a1,a1,7 # arg1, tmp143 + 7
|
||||
li a0,111 # arg0, 'o'
|
||||
call storeChar #
|
||||
# helloWorld.c:23: storeChar('r', &mem[8]);
|
||||
lui a1,DataMem # tmp144, DataMem
|
||||
addi a1,a1,8 # arg1, tmp144 + 8
|
||||
li a0,114 # arg0, 'r'
|
||||
call storeChar #
|
||||
# helloWorld.c:24: storeChar('l', &mem[9]);
|
||||
lui a1,DataMem # tmp145, DataMem
|
||||
addi a1,a1,9 # arg1, tmp145 + 9
|
||||
li a0,108 # arg0, 'l'
|
||||
call storeChar #
|
||||
# helloWorld.c:25: storeChar('d', &mem[10]);
|
||||
lui a1,DataMem # tmp146, DataMem
|
||||
addi a1,a1,10 # arg1, tmp146 + 10
|
||||
li a0,100 # arg0, 'd'
|
||||
call storeChar #
|
||||
# helloWorld.c:26: storeChar('!', &mem[11]);
|
||||
lui a1,DataMem # tmp147, DataMem
|
||||
addi a1,a1,11 # arg1, tmp147 + 11
|
||||
li a0,33 # arg0, '!'
|
||||
call storeChar #
|
||||
# helloWorld.c:27: storeChar('\0', &mem[12]); // Don't forget the null terminator!
|
||||
lui a1,DataMem # tmp148, DataMem
|
||||
addi a1,a1,12 # arg1, tmp148 + 12
|
||||
li a0,0 # arg0, '\0
|
||||
call storeChar #
|
||||
# helloWorld.c:29: return 0; // End the main function and return 0 on success
|
||||
li a5,0 # _16,
|
||||
# helloWorld.c:30: }
|
||||
mv a0,a5 #, <retval>
|
||||
lw ra,12(sp) # Load the return address from the stack and store it in ra
|
||||
lw s0,8(sp) # Load the caller frame pointer value from the stack and store it in s0
|
||||
addi sp,sp,16 # Free the allocated stack space for the function call
|
||||
jr ra # Return to address stored in ra
|
||||
@@ -0,0 +1,120 @@
|
||||
// *********************************************************************************************
|
||||
// Description : Simplified assembly instructions for hello world program
|
||||
// Project Version : v1.0
|
||||
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
|
||||
// -----
|
||||
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
|
||||
// Created : 15.Oct.2025 by Hussein Elzomor
|
||||
// Last Modified : 21.Oct.2025 by Hussein Elzomor
|
||||
// -----
|
||||
// HISTORY : Date By Comments
|
||||
// ----------- --------- -------------------------------------------------
|
||||
// *********************************************************************************************
|
||||
|
||||
|
||||
|
||||
# 1 to 1 mapping of the Hex instructions in helloWorld.hex
|
||||
# Simplified version of helloWorld.s
|
||||
## Replaced pseudo instructions with the proper rv32i instructions
|
||||
## Replaced jumps to labels with address offset values
|
||||
|
||||
# Use as a cross reference to identify:
|
||||
## - the instruction being run on your processor
|
||||
## - which part of the program is being run
|
||||
## - confirm registers and memory addresses contain the correct data
|
||||
_start: # Hex # MemAddr(PC)
|
||||
lui x2 2 # 0x00002137 # 0x00000000
|
||||
addi x2 x2 -4 # 0xFFC10113 # 0x00000004
|
||||
jal x1 60 # 0x03C000EF # 0x00000008
|
||||
halt:
|
||||
jal x0 0 # 0x0000006F # 0x0000000C
|
||||
storeChar:
|
||||
addi x2 x2 -32 # 0xFE010113 # 0x00000010
|
||||
sw x1 28(x2) # 0x00112E23 # 0x00000014
|
||||
sw x8 24(x2) # 0x00812C23 # 0x00000018
|
||||
addi x8 x2 32 # 0x02010413 # 0x0000001C
|
||||
sw x11 -24(x8) # 0xFEB42423 # 0x00000020
|
||||
sb x10 -17(x8) # 0xFEA407A3 # 0x00000024
|
||||
lw x15 -24(x8) # 0xFE842783 # 0x00000028
|
||||
lbu x14 -17(x8) # 0xFEF44703 # 0x0000002C
|
||||
sb x14 0(x15) # 0x00E78023 # 0x00000030
|
||||
lw x1 28(x2) # 0x01C12083 # 0x00000034
|
||||
lw x8 24(x2) # 0x01812403 # 0x00000038
|
||||
addi x2 x2 32 # 0x02010113 # 0x0000003C
|
||||
jalr x0 x1 0 # 0x00008067 # 0x00000040
|
||||
main:
|
||||
addi x2 x2 -16 # 0xFF010113 # 0x00000044
|
||||
sw x1 12(x2) # 0x00112623 # 0x00000048
|
||||
sw x8 8(x2) # 0x00812423 # 0x0000004C
|
||||
addi x8 x2 16 # 0x01010413 # 0x00000050
|
||||
lui x11 1 # 0x000015B7 # 0x00000054
|
||||
addi x11 x11 0 # 0x00058593 # 0x00000058
|
||||
addi x10 x0 104 # 0x06800513 # 0x0000005C
|
||||
auipc x6 0 # 0x00000317 # 0x00000060
|
||||
jalr x1 x6 -80 # 0xFB0300E7 # 0x00000064
|
||||
lui x11 1 # 0x000015B7 # 0x00000068
|
||||
addi x11 x11 1 # 0x00158593 # 0x0000006C
|
||||
addi x10 x0 101 # 0x06500513 # 0x00000070
|
||||
auipc x6 0 # 0x00000317 # 0x00000074
|
||||
jalr x1 x6 -100 # 0xF9C300E7 # 0x00000078
|
||||
lui x11 1 # 0x000015B7 # 0x0000007C
|
||||
addi x11 x11 2 # 0x00258593 # 0x00000080
|
||||
addi x10 x0 108 # 0x06C00513 # 0x00000084
|
||||
auipc x6 0 # 0x00000317 # 0x00000088
|
||||
jalr x1 x6 -120 # 0xF88300E7 # 0x0000008C
|
||||
lui x11 1 # 0x000015B7 # 0x00000090
|
||||
addi x11 x11 3 # 0x00358593 # 0x00000094
|
||||
addi x10 x0 108 # 0x06C00513 # 0x00000098
|
||||
auipc x6 0 # 0x00000317 # 0x0000009C
|
||||
jalr x1 x6 -140 # 0xF74300E7 # 0x000000A0
|
||||
lui x11 1 # 0x000015B7 # 0x000000A4
|
||||
addi x11 x11 4 # 0x00458593 # 0x000000A8
|
||||
addi x10 x0 111 # 0x06F00513 # 0x000000AC
|
||||
auipc x6 0 # 0x00000317 # 0x000000B0
|
||||
jalr x1 x6 -160 # 0xF60300E7 # 0x000000B4
|
||||
lui x11 1 # 0x000015B7 # 0x000000B8
|
||||
addi x11 x11 5 # 0x00558593 # 0x000000BC
|
||||
addi x10 x0 32 # 0x02000513 # 0x000000C0
|
||||
auipc x6 0 # 0x00000317 # 0x000000C4
|
||||
jalr x1 x6 -180 # 0xF4C300E7 # 0x000000C8
|
||||
lui x11 1 # 0x000015B7 # 0x000000CC
|
||||
addi x11 x11 6 # 0x00658593 # 0x000000D0
|
||||
addi x10 x0 119 # 0x07700513 # 0x000000D4
|
||||
auipc x6 0 # 0x00000317 # 0x000000D8
|
||||
jalr x1 x6 -200 # 0xF38300E7 # 0x000000DC
|
||||
lui x11 1 # 0x000015B7 # 0x000000E0
|
||||
addi x11 x11 7 # 0x00758593 # 0x000000E4
|
||||
addi x10 x0 111 # 0x06F00513 # 0x000000E8
|
||||
auipc x6 0 # 0x00000317 # 0x000000EC
|
||||
jalr x1 x6 -220 # 0xF24300E7 # 0x000000F0
|
||||
lui x11 1 # 0x000015B7 # 0x000000F4
|
||||
addi x11 x11 8 # 0x00858593 # 0x000000F8
|
||||
addi x10 x0 114 # 0x07200513 # 0x000000FC
|
||||
auipc x6 0 # 0x00000317 # 0x00000100
|
||||
jalr x1 x6 -240 # 0xF10300E7 # 0x00000104
|
||||
lui x11 1 # 0x000015B7 # 0x00000108
|
||||
addi x11 x11 9 # 0x00958593 # 0x0000010C
|
||||
addi x10 x0 108 # 0x06C00513 # 0x00000110
|
||||
auipc x6 0 # 0x00000317 # 0x00000114
|
||||
jalr x1 x6 -260 # 0xEFC300E7 # 0x00000118
|
||||
lui x11 1 # 0x000015B7 # 0x0000011C
|
||||
addi x11 x11 10 # 0x00A58593 # 0x00000120
|
||||
addi x10 x0 100 # 0x06400513 # 0x00000124
|
||||
auipc x6 0 # 0x00000317 # 0x00000128
|
||||
jalr x1 x6 -280 # 0xEE8300E7 # 0x0000012C
|
||||
lui x11 1 # 0x000015B7 # 0x00000130
|
||||
addi x11 x11 11 # 0x00B58593 # 0x00000134
|
||||
addi x10 x0 33 # 0x02100513 # 0x00000138
|
||||
auipc x6 0 # 0x00000317 # 0x0000013C
|
||||
jalr x1 x6 -300 # 0xED4300E7 # 0x00000140
|
||||
lui x11 1 # 0x000015B7 # 0x00000144
|
||||
addi x11 x11 12 # 0x00C58593 # 0x00000148
|
||||
addi x10 x0 0 # 0x00000513 # 0x0000014C
|
||||
auipc x6 0 # 0x00000317 # 0x00000150
|
||||
jalr x1 x6 -320 # 0xEC0300E7 # 0x00000154
|
||||
addi x15 x0 0 # 0x00000793 # 0x00000158
|
||||
addi x10 x15 0 # 0x00078513 # 0x0000015C
|
||||
lw x1 12(x2) # 0x00C12083 # 0x00000160
|
||||
lw x8 8(x2) # 0x00812403 # 0x00000164
|
||||
addi x2 x2 16 # 0x01010113 # 0x00000168
|
||||
jalr x0 x1 0 # 0x00008067 # 0x0000016C
|
||||
File diff suppressed because it is too large
Load Diff
Binary file not shown.
@@ -0,0 +1,53 @@
|
||||
// *********************************************************************************************
|
||||
// Description : C Program to find prime factors of a Number
|
||||
// Project Version : v1.0
|
||||
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
|
||||
// -----
|
||||
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
|
||||
// Created : 15.Oct.2025 by Hussein Elzomor
|
||||
// Last Modified : 15.Oct.2025 by Hussein Elzomor
|
||||
// -----
|
||||
// HISTORY : Date By Comments
|
||||
// ----------- --------- -------------------------------------------------
|
||||
// *********************************************************************************************
|
||||
|
||||
|
||||
|
||||
asm(".global _start, halt; _start: lui sp 0x2; addi sp sp -4; jal main");
|
||||
|
||||
int main()
|
||||
{
|
||||
int i, iModulo, j, Number, NumberModulo, isPrime, Prime; // Create variables
|
||||
Number = 39; // Set initial value for Number to be factorized
|
||||
Prime = 0; // Set initial value for Prime to be printed
|
||||
for (i = 2; i <= Number; i++) // Iterate over i from 2 to Number, all possible numbers excluding 1 & 0
|
||||
{
|
||||
NumberModulo = Number;
|
||||
while (NumberModulo > 0) // Calculate Number % i using subtraction and store in NumberModulo
|
||||
{
|
||||
NumberModulo -= i;
|
||||
}
|
||||
if (NumberModulo == 0) // If Number % i == 0, it is possible that it's a prime number
|
||||
{
|
||||
isPrime = 1;
|
||||
for (j = 2; j <= i / 2; j++) // Iterate over j from 2 to i/2
|
||||
{
|
||||
iModulo = i;
|
||||
while (iModulo > 0) // Calculate i % j using subtraction and store in iModulo
|
||||
{
|
||||
iModulo -= j;
|
||||
}
|
||||
if (iModulo == 0) // If i % j == 0, it is not a prime number
|
||||
{
|
||||
isPrime = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (isPrime == 1) // Print i if i is a prime number
|
||||
{
|
||||
Prime = i; // Set variable Prime to the prime number. Used for printing in the TB upon change
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0; // End the main function and return 0 on success
|
||||
}
|
||||
@@ -0,0 +1,71 @@
|
||||
00002137
|
||||
FFC10113
|
||||
008000EF
|
||||
0000006F
|
||||
FD010113
|
||||
02112623
|
||||
02812423
|
||||
03010413
|
||||
02700793
|
||||
00078813
|
||||
FCF42C23
|
||||
FC042A23
|
||||
00200793
|
||||
FEF42623
|
||||
0C00006F
|
||||
FD842783
|
||||
FEF42023
|
||||
0140006F
|
||||
FE042703
|
||||
FEC42783
|
||||
40F707B3
|
||||
FEF42023
|
||||
FE042783
|
||||
FEF046E3
|
||||
FE042783
|
||||
08079463
|
||||
00100793
|
||||
FCF42E23
|
||||
00200793
|
||||
FEF42223
|
||||
0440006F
|
||||
FEC42783
|
||||
FEF42423
|
||||
0140006F
|
||||
FE842703
|
||||
FE442783
|
||||
40F707B3
|
||||
FEF42423
|
||||
FE842783
|
||||
FEF046E3
|
||||
FE842783
|
||||
00079663
|
||||
FC042E23
|
||||
02C0006F
|
||||
FE442783
|
||||
00178793
|
||||
FEF42223
|
||||
FEC42783
|
||||
01F7D713
|
||||
00F707B3
|
||||
4017D793
|
||||
00078713
|
||||
FE442783
|
||||
FAF754E3
|
||||
FDC42703
|
||||
00100793
|
||||
00F71663
|
||||
FEC42883
|
||||
FD142A23
|
||||
FEC42783
|
||||
00178793
|
||||
FEF42623
|
||||
FEC42703
|
||||
FD842783
|
||||
F2E7DEE3
|
||||
00000793
|
||||
00078513
|
||||
02C12083
|
||||
02812403
|
||||
03010113
|
||||
00008067
|
||||
@@ -0,0 +1,140 @@
|
||||
// *********************************************************************************************
|
||||
// Description : Assembly instructions for prime factors program
|
||||
// Project Version : v1.0
|
||||
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
|
||||
// -----
|
||||
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
|
||||
// Created : 15.Oct.2025 by Hussein Elzomor
|
||||
// Last Modified : 21.Oct.2025 by Hussein Elzomor
|
||||
// -----
|
||||
// HISTORY : Date By Comments
|
||||
// ----------- --------- -------------------------------------------------
|
||||
// *********************************************************************************************
|
||||
|
||||
|
||||
|
||||
# GNU C23 (crosstool-NG UNKNOWN) version 15.2.0 (riscv32-unknown-linux-gnu)
|
||||
# compiled by GNU C version 16.0.0 20250802 (experimental), GMP version 6.3.0, MPFR version 4.2.1, MPC version 1.3.1, isl version isl-0.24-GMP
|
||||
|
||||
# GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
|
||||
# options passed: -mabi=ilp32d -misa-spec=20191213 -mtls-dialect=trad -march=rv32imafdc_zicsr_zifencei_zmmul_zaamo_zalrsc_zca_zcd_zcf -g
|
||||
_start:
|
||||
lui sp, 0x2 # Initialize stack pointer value to size of memory (0x00002000)
|
||||
addi sp, sp -4 # Subtract stack pointer value by 4 to point to the last memory address (0x00001FFC)
|
||||
jal main # Jump to main and save return address to ra
|
||||
halt:
|
||||
j halt # Get stuck here in a loop forever
|
||||
main:
|
||||
addi sp,sp,-48 # Reserve some space on the stack
|
||||
sw ra,44(sp) # Save the return address on the stack
|
||||
sw s0,40(sp) # Save the caller frame pointer value on the stack
|
||||
addi s0,sp,48 # Store the callee frame pointer value in s0 (end address of the stack frame)
|
||||
# primeFactors.c:6: Number = 39; // Set initial value for Number to be factorized
|
||||
li a5,39 # tmp137,39 # Change the Number (39) to different values to test the program
|
||||
mv a6, a5 # ,tmp137 # Used for printing in the TB upon change
|
||||
sw a5,-40(s0) # tmp137, Number
|
||||
# primeFactors.c:7: Prime = 0; // Set initial value for Prime to be printed
|
||||
sw zero,-44(s0) #, Prime
|
||||
loop_i_init:
|
||||
# primeFactors.c:8: for (i = 2; i <= Number; i++) // Iterate over i from 2 to Number, all possible numbers excluding 1 & 0
|
||||
li a5,2 # tmp138,
|
||||
sw a5,-20(s0) # tmp138, i
|
||||
# primeFactors.c:8: for (i = 2; i <= Number; i++) // Iterate over i from 2 to Number, all possible numbers excluding 1 & 0
|
||||
j loop_i_check #
|
||||
num_mod_set:
|
||||
# primeFactors.c:10: NumberModulo = Number;
|
||||
lw a5,-40(s0) # tmp139, Number
|
||||
sw a5,-32(s0) # tmp139, NumberModulo
|
||||
# primeFactors.c:11: while (NumberModulo > 0) // Calculate Number % i using subtraction and store in NumberModulo
|
||||
j num_mod_loop #
|
||||
num_mod_sub_i:
|
||||
# primeFactors.c:13: NumberModulo -= i;
|
||||
lw a4,-32(s0) # tmp141, NumberModulo
|
||||
lw a5,-20(s0) # tmp142, i
|
||||
sub a5,a4,a5 # NumberModulo_21, tmp141, tmp142
|
||||
sw a5,-32(s0) # NumberModulo_21, NumberModulo
|
||||
num_mod_loop:
|
||||
# primeFactors.c:11: while (NumberModulo > 0) // Calculate Number % i using subtraction and store in NumberModulo
|
||||
lw a5,-32(s0) # tmp143, NumberModulo
|
||||
bgt a5,zero,num_mod_sub_i #, tmp143,,
|
||||
num_mod_check:
|
||||
# primeFactors.c:15: if (NumberModulo == 0) // If Number % i == 0, it is possible that it's a prime number
|
||||
lw a5,-32(s0) # tmp144, NumberModulo
|
||||
bne a5,zero,loop_i_inc #, tmp144,,
|
||||
|
||||
# primeFactors.c:17: isPrime = 1;
|
||||
li a5,1 # tmp145,
|
||||
sw a5,-36(s0) # tmp145, isPrime
|
||||
loop_j_init:
|
||||
# primeFactors.c:18: for (j = 2; j <= i / 2; j++) // Iterate over j from 2 to i/2
|
||||
li a5,2 # tmp146,
|
||||
sw a5,-28(s0) # tmp146, j
|
||||
# primeFactors.c:18: for (j = 2; j <= i / 2; j++) // Iterate over j from 2 to i/2
|
||||
j loop_j_check #
|
||||
i_mod_set:
|
||||
# primeFactors.c:20: iModulo = i;
|
||||
lw a5,-20(s0) # tmp147, i
|
||||
sw a5,-24(s0) # tmp147, iModulo
|
||||
# primeFactors.c:21: while (iModulo > 0) // Calculate i % j using subtraction and store in iModulo
|
||||
j i_mod_loop #
|
||||
i_mod_sub_j:
|
||||
# primeFactors.c:23: iModulo -= j;
|
||||
lw a4,-24(s0) # tmp149, iModulo
|
||||
lw a5,-28(s0) # tmp150, j
|
||||
sub a5,a4,a5 # iModulo_18, tmp149, tmp150
|
||||
sw a5,-24(s0) # iModulo_18, iModulo
|
||||
i_mod_loop:
|
||||
# primeFactors.c:21: while (iModulo > 0) // Calculate i % j using subtraction and store in iModulo
|
||||
lw a5,-24(s0) # tmp151, iModulo
|
||||
bgt a5,zero,i_mod_sub_j #, tmp151,,
|
||||
i_mod_check:
|
||||
# primeFactors.c:25: if (iModulo == 0) // If i % j == 0, it is not a prime number
|
||||
lw a5,-24(s0) # tmp152, iModulo
|
||||
bne a5,zero,loop_j_inc #, tmp152,,
|
||||
# primeFactors.c:27: isPrime = 0;
|
||||
sw zero,-36(s0) #, isPrime
|
||||
# primeFactors.c:28: break;
|
||||
j prime_check #
|
||||
loop_j_inc:
|
||||
# primeFactors.c:18: for (j = 2; j <= i / 2; j++) // Iterate over j from 2 to i/2
|
||||
lw a5,-28(s0) # tmp154, j
|
||||
addi a5,a5,1 #, j_16, tmp154
|
||||
sw a5,-28(s0) # j_16, j
|
||||
loop_j_check:
|
||||
# primeFactors.c:18: for (j = 2; j <= i / 2; j++) // Iterate over j from 2 to i/2
|
||||
lw a5,-20(s0) # tmp155, i
|
||||
srli a4,a5,31 #, tmp156, tmp155
|
||||
add a5,a4,a5 # tmp155, tmp157, tmp156
|
||||
srai a5,a5,1 #, _1, tmp157
|
||||
mv a4,a5 # _1, _1
|
||||
# primeFactors.c:18: for (j = 2; j <= i / 2; j++) // Iterate over j from 2 to i/2
|
||||
lw a5,-28(s0) # tmp159, j
|
||||
ble a5,a4,i_mod_set #, tmp159, _1,
|
||||
prime_check:
|
||||
# primeFactors.c:31: if (isPrime == 1) // Print i if i is a prime number
|
||||
lw a4,-36(s0) # tmp160, isPrime
|
||||
li a5,1 # tmp161,
|
||||
bne a4,a5,loop_i_inc #, tmp160, tmp161,
|
||||
prime_set:
|
||||
# primeFactors.c:33: Prime = i; // Set variable Prime to the prime number. Used for printing in the TB upon change
|
||||
lw a7,-20(s0) # tmp162, i
|
||||
sw a7,-44(s0) # tmp162, Prime
|
||||
loop_i_inc:
|
||||
# primeFactors.c:8: for (i = 2; i <= Number; i++) // Iterate over i from 2 to Number, all possible numbers excluding 1 & 0
|
||||
lw a5,-20(s0) # tmp164, i
|
||||
addi a5,a5,1 #, i_20, tmp164
|
||||
sw a5,-20(s0) # i_20, i
|
||||
loop_i_check:
|
||||
# primeFactors.c:8: for (i = 2; i <= Number; i++) // Iterate over i from 2 to Number, all possible numbers excluding 1 & 0
|
||||
lw a4,-20(s0) # tmp165, i
|
||||
lw a5,-40(s0) # tmp166, Number
|
||||
ble a4,a5,num_mod_set #, tmp165, tmp166,
|
||||
return:
|
||||
# primeFactors.c:37: return 0; // return the main function and return 0 on success
|
||||
li a5,0 # _10,
|
||||
# primeFactors.c:38: }
|
||||
mv a0,a5 #, <retval>
|
||||
lw ra,44(sp) # Load the return address from the stack and store it in ra
|
||||
lw s0,40(sp) # Load the caller frame pointer value from the stack and store it in s0
|
||||
addi sp,sp,48 # Free the allocated stack space for the function call
|
||||
jr ra # Return to address stored in ra
|
||||
@@ -0,0 +1,115 @@
|
||||
// *********************************************************************************************
|
||||
// Description : Simplified assembly instructions for prime factors program
|
||||
// Project Version : v1.0
|
||||
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
|
||||
// -----
|
||||
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
|
||||
// Created : 15.Oct.2025 by Hussein Elzomor
|
||||
// Last Modified : 21.Oct.2025 by Hussein Elzomor
|
||||
// -----
|
||||
// HISTORY : Date By Comments
|
||||
// ----------- --------- -------------------------------------------------
|
||||
// *********************************************************************************************
|
||||
|
||||
|
||||
|
||||
# 1 to 1 mapping of the Hex instructions in primeFactors.hex
|
||||
# Simplified version of primeFactors.s
|
||||
## Replaced pseudo instructions with the proper rv32i instructions
|
||||
## Replaced jumps to labels with address offset values
|
||||
|
||||
# Use as a cross reference to identify:
|
||||
## - the instruction being run on your processor
|
||||
## - which part of the program is being run
|
||||
## - confirm registers and memory addresses contain the correct data
|
||||
_start: # Hex # MemAddr(PC)
|
||||
lui x2 2 # 0x00002137 # 0x00000000
|
||||
addi x2 x2 -4 # 0xFFC10113 # 0x00000004
|
||||
jal x1 8 # 0x008000EF # 0x00000008
|
||||
halt:
|
||||
jal x0 0 # 0x0000006F # 0x0000000C
|
||||
main:
|
||||
addi x2 x2 -48 # 0xFD010113 # 0x00000010
|
||||
sw x1 44(x2) # 0x02112623 # 0x00000014
|
||||
sw x8 40(x2) # 0x02812423 # 0x00000018
|
||||
addi x8 x2 48 # 0x03010413 # 0x0000001C
|
||||
addi x15 x0 39 # 0x02700793 # 0x00000020 # Change the Number (39) to different values to test the program
|
||||
addi x16 x15 0 # 0x00078813 # 0x00000024 # Used for printing in the TB upon change
|
||||
sw x15 -40(x8) # 0xFCF42C23 # 0x00000028
|
||||
sw x0 -44(x8) # 0xFC042A23 # 0x0000002C
|
||||
loop_i_init:
|
||||
addi x15 x0 2 # 0x00200793 # 0x00000030
|
||||
sw x15 -20(x8) # 0xFEF42623 # 0x00000034
|
||||
jal x0 192 # 0x0C00006F # 0x00000038
|
||||
num_mod_set:
|
||||
lw x15 -40(x8) # 0xFD842783 # 0x0000003C
|
||||
sw x15 -32(x8) # 0xFEF42023 # 0x00000040
|
||||
jal x0 20 # 0x0140006F # 0x00000044
|
||||
num_mod_sub_i:
|
||||
lw x14 -32(x8) # 0xFE042703 # 0x00000048
|
||||
lw x15 -20(x8) # 0xFEC42783 # 0x0000004C
|
||||
sub x15 x14 x15 # 0x40F707B3 # 0x00000050
|
||||
sw x15 -32(x8) # 0xFEF42023 # 0x00000054
|
||||
num_mod_loop:
|
||||
lw x15 -32(x8) # 0xFE042783 # 0x00000058
|
||||
blt x0 x15 -20 # 0xFEF046E3 # 0x0000005C
|
||||
num_mod_check:
|
||||
lw x15 -32(x8) # 0xFE042783 # 0x00000060
|
||||
bne x15 x0 136 # 0x08079463 # 0x00000064
|
||||
addi x15 x0 1 # 0x00100793 # 0x00000068
|
||||
sw x15 -36(x8) # 0xFCF42E23 # 0x0000006C
|
||||
loop_j_init:
|
||||
addi x15 x0 2 # 0x00200793 # 0x00000070
|
||||
sw x15 -28(x8) # 0xFEF42223 # 0x00000074
|
||||
jal x0 68 # 0x0440006F # 0x00000078
|
||||
i_mod_set:
|
||||
lw x15 -20(x8) # 0xFEC42783 # 0x0000007C
|
||||
sw x15 -24(x8) # 0xFEF42423 # 0x00000080
|
||||
jal x0 20 # 0x0140006F # 0x00000084
|
||||
i_mod_sub_j:
|
||||
lw x14 -24(x8) # 0xFE842703 # 0x00000088
|
||||
lw x15 -28(x8) # 0xFE442783 # 0x0000008C
|
||||
sub x15 x14 x15 # 0x40F707B3 # 0x00000090
|
||||
sw x15 -24(x8) # 0xFEF42423 # 0x00000094
|
||||
i_mod_loop:
|
||||
lw x15 -24(x8) # 0xFE842783 # 0x00000098
|
||||
blt x0 x15 -20 # 0xFEF046E3 # 0x0000009C
|
||||
i_mod_check:
|
||||
lw x15 -24(x8) # 0xFE842783 # 0x000000A0
|
||||
bne x15 x0 12 # 0x00079663 # 0x000000A4
|
||||
sw x0 -36(x8) # 0xFC042E23 # 0x000000A8
|
||||
jal x0 44 # 0x02C0006F # 0x000000AC
|
||||
loop_j_inc:
|
||||
lw x15 -28(x8) # 0xFE442783 # 0x000000B0
|
||||
addi x15 x15 1 # 0x00178793 # 0x000000B4
|
||||
sw x15 -28(x8) # 0xFEF42223 # 0x000000B8
|
||||
loop_j_check:
|
||||
lw x15 -20(x8) # 0xFEC42783 # 0x000000BC
|
||||
srli x14 x15 31 # 0x01F7D713 # 0x000000C0
|
||||
add x15 x14 x15 # 0x00F707B3 # 0x000000C4
|
||||
srai x15 x15 1 # 0x4017D793 # 0x000000C8
|
||||
addi x14 x15 0 # 0x00078713 # 0x000000CC
|
||||
lw x15 -28(x8) # 0xFE442783 # 0x000000D0
|
||||
bge x14 x15 -88 # 0xFAF754E3 # 0x000000D4
|
||||
prime_check:
|
||||
lw x14 -36(x8) # 0xFDC42703 # 0x000000D8
|
||||
addi x15 x0 1 # 0x00100793 # 0x000000DC
|
||||
bne x14 x15 12 # 0x00F71663 # 0x000000E0
|
||||
prime_set:
|
||||
lw x17 -20(x8) # 0xFEC42883 # 0x000000E4
|
||||
sw x17 -44(x8) # 0xFD142A23 # 0x000000E8 # Used for printing in the TB upon change
|
||||
loop_i_inc:
|
||||
lw x15 -20(x8) # 0xFEC42783 # 0x000000EC
|
||||
addi x15 x15 1 # 0x00178793 # 0x000000F0
|
||||
sw x15 -20(x8) # 0xFEF42623 # 0x000000F4
|
||||
loop_i_check:
|
||||
lw x14 -20(x8) # 0xFEC42703 # 0x000000F8
|
||||
lw x15 -40(x8) # 0xFD842783 # 0x000000FC
|
||||
bge x15 x14 -196 # 0xF2E7DEE3 # 0x00000100
|
||||
return:
|
||||
addi x15 x0 0 # 0x00000793 # 0x00000104
|
||||
addi x10 x15 0 # 0x00078513 # 0x00000108
|
||||
lw x1 44(x2) # 0x02C12083 # 0x0000010C
|
||||
lw x8 40(x2) # 0x02812403 # 0x00000110
|
||||
addi x2 x2 48 # 0x03010113 # 0x00000114
|
||||
jalr x0 x1 0 # 0x00008067 # 0x00000118
|
||||
Reference in New Issue
Block a user