#
# Information Dictionary File produced by Tessent Shell 2023.4-p1
# Date           : Thu May 28 18:01:24 2026
#
# <view> : (interface) | scan_graybox | full | ijtag_graybox
# <language_version> : (verilog_2001) | verilog_sv31a

set pattern_info_dict {
  version 1
  pattern_type scan
  ssn off
  current_mode unwrapped
  simulation_design_view {
    testbench_language verilog_2001
    testbench_name cpu_cpu_patterns_serial_v_ctl
    dut_inst cpu_inst
    current_design_block {
      module_name cpu
      view full
    }
  }
}