86 lines
2.4 KiB
Verilog
Executable File
86 lines
2.4 KiB
Verilog
Executable File
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//
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// Wrapper for CPU + memory
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module cpu_sys (
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input clock,
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input reset,
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input [4:0] Interrupts, // 5 general-purpose hardware interrupts
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input NMI, // Non-maskable interrupt
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// Data Memory Interface
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input [31:0] per_dout, //
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output DataMem_Read,
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output [3:0] DataMem_Write, // 4-bit Write, one for each byte in word.
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output [29:0] DataMem_Address, // Addresses are words, not bytes.
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output [31:0] DataMem_Out
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);
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// Instruction Memory Interface
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wire [31:0] pmem_dout;
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wire [29:0] pmem_addr; // Addresses are words, not bytes.
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wire pmem_cen;
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wire dmem_cen;
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wire [31:0] dmem_dout; // Data Memory data output
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wire [31:0] DataMem_In;
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// ---------------------------------
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// MIPS processor
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// ---------------------------------
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Processor MIPS_CPU (
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.clock(clock),
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.reset(reset),
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.Interrupts(Interrupts), // 5 general-purpose hardware interrupts
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.NMI(NMI), // Non-maskable interrupt
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// Data Memory Interface
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.DataMem_In(DataMem_In),
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.DataMem_Ready(1'b1),
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.DataMem_Read(),
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.DataMem_Write(DataMem_Write), // 4-bit Write, one for each byte in word.
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.DataMem_Address(DataMem_Address), // Addresses are words, not bytes.
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.DataMem_Out(DataMem_Out),
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// Instruction Memory Interface
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.InstMem_In(pmem_dout),
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.InstMem_Address(pmem_addr), // Addresses are words, not bytes.
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.InstMem_Ready(1'b1),
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.InstMem_Read(pmem_cen),
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.IP() // Pending interrupts (diagnostic)
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);
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// ---------------------------------
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// Program Memory RAM //
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// ---------------------------------
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MemGen_32_12 program_memory (
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.chip_en(pmem_cen),
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.clock(clock),
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.addr(pmem_addr[11:0]),
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.rd_data(pmem_dout),
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.rd_en(pmem_cen),
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.wr_data(32'h00000000),
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.wr_en(1'b0)
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);
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// ---------------------------------
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// Program Memory RAM //
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// ---------------------------------
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assign DataMem_In = DataMem_Address[29] ? per_dout : dmem_dout;
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assign dmem_cen = !DataMem_Address[29];
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MemGen_32_12 data_memory (
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.chip_en(dmem_cen),
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.clock(clock),
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.addr(DataMem_Address[11:0]),
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.rd_data(dmem_dout),
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.rd_en(DataMem_Read),
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.wr_data(DataMem_Out),
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.wr_en(DataMem_Write[0])
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);
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endmodule
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