32 lines
1.1 KiB
Tcl
Executable File
32 lines
1.1 KiB
Tcl
Executable File
# Enable capture of commands
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config_shell -echo true
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###################Top Module Specification###########
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set top_module "demo_chip"
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set max_route_layer "10"
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# Set design file path variables
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set script_dir [file dirname [info script]]
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set ekit_dir [file dirname ${script_dir}]
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set demo_chip_rtl_dir "${ekit_dir}/demo_chip_rtl"
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set demo_chip_sdc_files "${ekit_dir}/constraints/demo_chip_func.sdc"
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set output_dir "${ekit_dir}/output"
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#set a consistant reporting format for timing
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config_report timing -format "cell edge arrival delay arc_delay net_delay slew net_load load fanout location power_domain"
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# Set DFT flow settings
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# To run the tessent DFT flow, please set the dft_flow variable to "tessent" from "oasys" and update tessent_build path
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set dft_flow tessent
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set tessent_build "/applications/SiemensEDA/siemenseda2023/tessent/bin/tessent"
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#set tessent_build $env(TESSENT)/bin/tessent
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#Source the script that sets the path variables for all input files
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source ${script_dir}/demo_chip_design_files.tcl
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echo "\n-----------------------------"
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echo "\nDone setting design variables"
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echo "\n-----------------------------\n"
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