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DfT/oasys.tessent.00/Scan_0/scan.log
muellerlu fedfd92270 Initial commit
2026-05-29 10:19:13 +02:00

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/applications/SiemensEDA/siemenseda2023/tessent_2023.4-p1/bin/tessent -shell -dofile /tmp/oasys.2483642/.tmpTessentFile -log_file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/scan.log -replace
// Tessent Shell 2023.4-p1 Mon Feb 19 16:22:02 GMT 2024
// Unpublished work. Copyright 2024 Siemens
//
// This material contains trade secrets or otherwise confidential
// information owned by Siemens Industry Software Inc. or its affiliates
// (collectively, "SISW"), or its licensors. Access to and use of this
// information is strictly limited as set forth in the Customer's
// applicable agreements with SISW.
//
// Siemens software executing under x86-64 Linux on Thu May 28 17:28:57 CEST 2026.
// 64 bit version
// Host: efiapps0.ads1.fh-nuernberg.de (12 x 3.5 GHz, 48014 MB RAM, 24575 MB Swap)
//
// command: if {[catch {source /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/scan.do} msg]} {
// puts "$msg"
// puts "TESSENT_ER_ORTL" }
// sub-command: set_context dft -scan -no_rtl -design_id Scan_0
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_slow_0p85V_conditional_nldm.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_slow_0p85V_conditional_nldm.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_slow_0p85V_conditional_nldm.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_low_temp_ccs.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_low_temp_ccs.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_low_temp_ccs.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_worst_low_ccs_0.85v.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_worst_low_ccs_0.85v.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_worst_low_ccs_0.85v.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_worst_low_ccs.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_worst_low_ccs.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_worst_low_ccs.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_low_temp_ccs.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_low_temp_ccs.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_low_temp_ccs.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_worst_low_ccs_0.85v.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_worst_low_ccs_0.85v.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/LowPowerOpenCellLibrary_worst_low_ccs_0.85v.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_conditional_nldm.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_conditional_nldm.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_conditional_nldm.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_0p85V_conditional_nldm.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_0p85V_conditional_nldm.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_0p85V_conditional_nldm.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_worst_low_conditional_nldm.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_worst_low_conditional_nldm.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_worst_low_conditional_nldm.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_slow_0p85V_conditional_nldm.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_slow_0p85V_conditional_nldm.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_slow_0p85V_conditional_nldm.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_worst_low_conditional_nldm.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_worst_low_conditional_nldm.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_worst_low_conditional_nldm.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/PLL.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/PLL.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/PLL.fslib
// sub-command: read_cell_library /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/IO.fslib
// Reading DFT Library file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/IO.fslib
// Finished reading file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/IO.fslib
// sub-command: set_module_matching_options -suffix_pattern_list {[_]+[0-9]+[_]+[0-9]+} -regexp -append
// sub-command: set_module_matching_options -suffix_pattern_list {[_]+[A-Z]+} -regexp -append
// sub-command: set_module_matching_options -suffix_pattern_list {[_]+[0-9]+[_]+[0-9]+[_]+[A-Z]+} -regexp -append
// sub-command: read_verilog /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/oasys_netlist.v
// sub-command: set_tsdb_output_directory /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/tsdb_outdir
// sub-command: read_sdc /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/oasys.sdc
// Command 'read_sdc' requires an elaborated design. Automatically elaborating the design ...
// Note: 640 duplicate cell library models were read. The last model read of the same name was kept.
// To see detailed messages per duplicate model, issue 'set_cell_library_options -report_duplicate_models on'
// before issuing 'read_cell_library'.
// Warning: 1 cell library model contained 2 floating model outputs.
// To see detailed messages per model, issue 'set_cell_library_options -report_floating_nets on'
// before issuing 'read_cell_library'.
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X1' line 812 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_worst_low_ccs_0.85v.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X2' line 843 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_worst_low_ccs_0.85v.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X4' line 874 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_worst_low_ccs_0.85v.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X8' line 905 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_worst_low_ccs_0.85v.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X1_HVT' line 812 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_0p85V_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X2_HVT' line 843 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_0p85V_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X4_HVT' line 874 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_0p85V_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X8_HVT' line 905 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_HVT_worst_low_0p85V_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X1_SVT' line 812 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_worst_low_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X2_SVT' line 843 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_worst_low_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X4_SVT' line 874 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_worst_low_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X8_SVT' line 905 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_SVT_worst_low_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X1_LVT' line 812 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_worst_low_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X2_LVT' line 843 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_worst_low_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X4_LVT' line 874 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_worst_low_conditional_nldm.fslib'
// Note: Changing pin 'CK' function from 'active_low_clock' to 'clock_in'
// Model 'CLKGATE_X8_LVT' line 905 file '/users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/libs/fastscan/NangateOpenCellLibrary_45nm_LVT_worst_low_conditional_nldm.fslib'
// Note: Top design is 'cpu'.
// Warning: Undefined modules were found.
// Before using "set_system_mode" or "create_flat_model", you must either define
// the missing modules using "read_verilog" and/or "read_cell_library", or use the
// following command to treat them as black boxes:
add_black_boxes -modules { \
MemGen_16_10 \
}
// You can also use "add_black_boxes -auto" to black box all undefined modules but
// it is recommended that you do not add this command to your dofile. Doing so may
// unintentionally black-box new undefined modules in future runs.
// Warning: 32 cases: Unused net in DFT library model
// Warning: 110 cases: Undriven net in netlist module
// Warning: 1 case: Floating input on instance in netlist
// Warning: 47 cases: Net in netlist not connected
// Note: Issue set_current_design with the -show_elaboration_warnings option to see more details about previous warnings
// Design elaboration successful.
// Reading SDC file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/oasys.sdc ...
// Finished reading SDC file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/oasys.sdc.
// Read SDC summary: 1 false path, 0 multi-cycle paths, 0 erroneous paths
// 0 disable timings, 0 case analysis, 0 clock groups
// sub-command: set_current_design cpu -show_elaboration_warnings
// Warning: Undefined modules were found.
// Before using "set_system_mode" or "create_flat_model", you must either define
// the missing modules using "read_verilog" and/or "read_cell_library", or use the
// following command to treat them as black boxes:
add_black_boxes -modules { \
MemGen_16_10 \
}
// You can also use "add_black_boxes -auto" to black box all undefined modules but
// it is recommended that you do not add this command to your dofile. Doing so may
// unintentionally black-box new undefined modules in future runs.
// Warning: Net 'SO_1' in module 'cpu' is not driven
// Warning: Net 'SO_2' in module 'cpu' is not driven
// Warning: Net 'SO_3' in module 'cpu' is not driven
// Warning: Net 'SO_4' in module 'cpu' is not driven
// Warning: Net 'DAddr[31]' in module 'cpu' has no pins
// Warning: Net 'DAddr[30]' in module 'cpu' has no pins
// Warning: Net 'DAddr[29]' in module 'cpu' has no pins
// Warning: Net 'DAddr[28]' in module 'cpu' has no pins
// Warning: Net 'DAddr[27]' in module 'cpu' has no pins
// Warning: Net 'DAddr[26]' in module 'cpu' has no pins
// Warning: Net 'DAddr[25]' in module 'cpu' has no pins
// Warning: Net 'DAddr[24]' in module 'cpu' has no pins
// Warning: Net 'DAddr[23]' in module 'cpu' has no pins
// Warning: Net 'DAddr[22]' in module 'cpu' has no pins
// Warning: Net 'DAddr[21]' in module 'cpu' has no pins
// Warning: Net 'DAddr[20]' in module 'cpu' has no pins
// Warning: Net 'DAddr[19]' in module 'cpu' has no pins
// Warning: Net 'DAddr[18]' in module 'cpu' has no pins
// Warning: Net 'DAddr[17]' in module 'cpu' has no pins
// Warning: Net 'DAddr[16]' in module 'cpu' has no pins
// Warning: Net 'DAddr[15]' in module 'cpu' has no pins
// Warning: Net 'DAddr[14]' in module 'cpu' has no pins
// Warning: Net 'DAddr[13]' in module 'cpu' has no pins
// Warning: Net 'NextPC[31]' in module 'cpu' has no pins
// Warning: Net 'NextPC[30]' in module 'cpu' has no pins
// Warning: Net 'NextPC[29]' in module 'cpu' has no pins
// Warning: Net 'NextPC[28]' in module 'cpu' has no pins
// Warning: Net 'NextPC[27]' in module 'cpu' has no pins
// Warning: Net 'NextPC[26]' in module 'cpu' has no pins
// Warning: Net 'NextPC[25]' in module 'cpu' has no pins
// Warning: Net 'NextPC[24]' in module 'cpu' has no pins
// Warning: Net 'NextPC[23]' in module 'cpu' has no pins
// Warning: Net 'NextPC[22]' in module 'cpu' has no pins
// Warning: Net 'NextPC[21]' in module 'cpu' has no pins
// Warning: Net 'NextPC[20]' in module 'cpu' has no pins
// Warning: Net 'NextPC[19]' in module 'cpu' has no pins
// Warning: Net 'NextPC[18]' in module 'cpu' has no pins
// Warning: Net 'NextPC[17]' in module 'cpu' has no pins
// Warning: Net 'NextPC[16]' in module 'cpu' has no pins
// Warning: Net 'NextPC[15]' in module 'cpu' has no pins
// Warning: Net 'NextPC[14]' in module 'cpu' has no pins
// Warning: Net 'NextPC[13]' in module 'cpu' has no pins
// Warning: Net 'NextPC[7]' in module 'cpu' has no pins
// Warning: Net 'NextPC[6]' in module 'cpu' has no pins
// Warning: Net 'NextPC[5]' in module 'cpu' has no pins
// Warning: Net 'NextPC[4]' in module 'cpu' has no pins
// Warning: Net 'NextPC[3]' in module 'cpu' has no pins
// Warning: Net 'NextPC[2]' in module 'cpu' has no pins
// Warning: Net 'NextPC[1]' in module 'cpu' has no pins
// Warning: Net 'NextPC[0]' in module 'cpu' has no pins
// Warning: Net 'uc_0' in module 'cpu' is not driven
// Warning: Net 'uc_1' in module 'cpu' is not driven
// Warning: Net 'uc_2' in module 'cpu' is not driven
// Warning: Net 'uc_3' in module 'cpu' is not driven
// Warning: Net 'uc_4' in module 'cpu' is not driven
// Warning: Net 'uc_5' in module 'cpu' is not driven
// Warning: Net 'uc_6' in module 'cpu' is not driven
// Warning: Net 'uc_7' in module 'cpu' is not driven
// Warning: Net 'uc_8' in module 'cpu' is not driven
// Warning: Net 'uc_9' in module 'cpu' is not driven
// Warning: Net 'uc_10' in module 'cpu' is not driven
// Warning: Net 'uc_11' in module 'cpu' is not driven
// Warning: Net 'uc_12' in module 'cpu' is not driven
// Warning: Net 'uc_13' in module 'cpu' is not driven
// Warning: Net 'uc_14' in module 'cpu' is not driven
// Warning: Net 'uc_15' in module 'cpu' is not driven
// Warning: Net 'uc_16' in module 'cpu' is not driven
// Warning: Net 'uc_17' in module 'cpu' is not driven
// Warning: Net 'uc_18' in module 'cpu' is not driven
// Warning: Net 'uc_19' in module 'cpu' is not driven
// Warning: Net 'uc_20' in module 'cpu' is not driven
// Warning: Net 'uc_21' in module 'cpu' is not driven
// Warning: Net 'uc_22' in module 'cpu' is not driven
// Warning: Net 'uc_23' in module 'cpu' is not driven
// Warning: Net 'uc_24' in module 'cpu' is not driven
// Warning: Net 'uc_25' in module 'cpu' is not driven
// Warning: Net 'uc_26' in module 'cpu' is not driven
// Warning: Net 'uc_27' in module 'cpu' is not driven
// Warning: Net 'uc_28' in module 'cpu' is not driven
// Warning: Net 'uc_29' in module 'cpu' is not driven
// Warning: Net 'uc_30' in module 'cpu' is not driven
// Warning: Net 'uc_31' in module 'cpu' is not driven
// Warning: Net 'uc_32' in module 'cpu' is not driven
// Warning: Net 'uc_33' in module 'cpu' is not driven
// Warning: Net 'uc_34' in module 'cpu' is not driven
// Warning: Net 'uc_35' in module 'cpu' is not driven
// Warning: Net 'uc_36' in module 'cpu' is not driven
// Warning: Net 'uc_37' in module 'cpu' is not driven
// Warning: Net 'uc_38' in module 'cpu' is not driven
// Warning: Net 'uc_39' in module 'cpu' is not driven
// Warning: Floating input 'chip_en' at instance 'RAM' in module 'main_mem'
// Warning: Net 'mem_sel[1]' in module 'MemGen_32_11' has no pins
// Warning: Net 'DAddr[31]' in module 'decoder' is not driven
// Warning: Net 'DAddr[30]' in module 'decoder' is not driven
// Warning: Net 'DAddr[29]' in module 'decoder' is not driven
// Warning: Net 'DAddr[28]' in module 'decoder' is not driven
// Warning: Net 'DAddr[27]' in module 'decoder' is not driven
// Warning: Net 'DAddr[26]' in module 'decoder' is not driven
// Warning: Net 'DAddr[25]' in module 'decoder' is not driven
// Warning: Net 'DAddr[24]' in module 'decoder' is not driven
// Warning: Net 'DAddr[23]' in module 'decoder' is not driven
// Warning: Net 'DAddr[22]' in module 'decoder' is not driven
// Warning: Net 'DAddr[21]' in module 'decoder' is not driven
// Warning: Net 'DAddr[20]' in module 'decoder' is not driven
// Warning: Net 'DAddr[19]' in module 'decoder' is not driven
// Warning: Net 'DAddr[18]' in module 'decoder' is not driven
// Warning: Net 'DAddr[17]' in module 'decoder' is not driven
// Warning: Net 'DAddr[16]' in module 'decoder' is not driven
// Warning: Net 'DAddr[15]' in module 'decoder' is not driven
// Warning: Net 'DAddr[14]' in module 'decoder' is not driven
// Warning: Net 'DAddr[13]' in module 'decoder' is not driven
// Warning: Net 'WData[31]' in module 'decoder' is not driven
// Warning: Net 'WData[30]' in module 'decoder' is not driven
// Warning: Net 'WData[29]' in module 'decoder' is not driven
// Warning: Net 'WData[28]' in module 'decoder' is not driven
// Warning: Net 'WData[27]' in module 'decoder' is not driven
// Warning: Net 'WData[26]' in module 'decoder' is not driven
// Warning: Net 'WData[25]' in module 'decoder' is not driven
// Warning: Net 'WData[24]' in module 'decoder' is not driven
// Warning: Net 'WData[23]' in module 'decoder' is not driven
// Warning: Net 'WData[22]' in module 'decoder' is not driven
// Warning: Net 'WData[21]' in module 'decoder' is not driven
// Warning: Net 'WData[20]' in module 'decoder' is not driven
// Warning: Net 'WData[19]' in module 'decoder' is not driven
// Warning: Net 'WData[18]' in module 'decoder' is not driven
// Warning: Net 'WData[17]' in module 'decoder' is not driven
// Warning: Net 'WData[16]' in module 'decoder' is not driven
// Warning: Net 'WData[15]' in module 'decoder' is not driven
// Warning: Net 'WData[14]' in module 'decoder' is not driven
// Warning: Net 'WData[13]' in module 'decoder' is not driven
// Warning: Net 'WData[12]' in module 'decoder' is not driven
// Warning: Net 'WData[11]' in module 'decoder' is not driven
// Warning: Net 'WData[10]' in module 'decoder' is not driven
// Warning: Net 'WData[9]' in module 'decoder' is not driven
// Warning: Net 'WData[8]' in module 'decoder' is not driven
// Warning: Net 'WData[7]' in module 'decoder' is not driven
// Warning: Net 'WData[6]' in module 'decoder' is not driven
// Warning: Net 'WData[5]' in module 'decoder' is not driven
// Warning: Net 'WData[4]' in module 'decoder' is not driven
// Warning: Net 'WData[3]' in module 'decoder' is not driven
// Warning: Net 'WData[2]' in module 'decoder' is not driven
// Warning: Net 'WData[1]' in module 'decoder' is not driven
// Warning: Net 'WData[0]' in module 'decoder' is not driven
// Warning: Net 'Rs1[4]' in module 'decoder' is not driven
// Warning: Net 'Rs1[3]' in module 'decoder' is not driven
// Warning: Net 'Rs1[2]' in module 'decoder' is not driven
// Warning: Net 'Rs1[1]' in module 'decoder' is not driven
// Warning: Net 'Rs1[0]' in module 'decoder' is not driven
// Warning: Net 'Rs2[4]' in module 'decoder' is not driven
// Warning: Net 'Rs2[3]' in module 'decoder' is not driven
// Warning: Net 'Rs2[2]' in module 'decoder' is not driven
// Warning: Net 'Rs2[1]' in module 'decoder' is not driven
// Warning: Net 'Rs2[0]' in module 'decoder' is not driven
// Warning: Net 'Rd[4]' in module 'decoder' is not driven
// Warning: Net 'Rd[3]' in module 'decoder' is not driven
// Warning: Net 'Rd[2]' in module 'decoder' is not driven
// Warning: Net 'Rd[1]' in module 'decoder' is not driven
// Warning: Net 'Rd[0]' in module 'decoder' is not driven
// sub-command: set_design_level physical_block
// sub-command: set_shift_register_identification off
// sub-command: add_nonscan_instances -instances "{/theMem/\IRData_reg[31] } {/theMem/\IRData_reg[30] } {/theMem/\IRData_reg[29] } {/theMem/\IRData_reg[28] } {/theMem/\IRData_reg[27] } {/theMem/\IRData_reg[26] } {/theMem/\IRData_reg[25] } {/theMem/\IRData_reg[24] } {/theMem/\IRData_reg[23] } {/theMem/\IRData_reg[22] } {/theMem/\IRData_reg[21] } {/theMem/\IRData_reg[20] } {/theMem/\IRData_reg[19] } {/theMem/\IRData_reg[18] } {/theMem/\IRData_reg[17] } {/theMem/\IRData_reg[16] } {/theMem/\IRData_reg[15] } {/theMem/\IRData_reg[14] } {/theMem/\IRData_reg[13] } {/theMem/\IRData_reg[12] } {/theMem/\IRData_reg[11] } {/theMem/\IRData_reg[10] } {/theMem/\IRData_reg[9] } {/theMem/\IRData_reg[8] } {/theMem/\IRData_reg[7] } {/theMem/\IRData_reg[6] } {/theMem/\IRData_reg[5] } {/theMem/\IRData_reg[4] } {/theMem/\IRData_reg[3] } {/theMem/\IRData_reg[2] } {/theMem/\IRData_reg[1] } {/theMem/\IRData_reg[0] } {/theMem/\mem_addr_reg[10] } {/theMem/\mem_addr_reg[9] } {/theMem/\mem_addr_reg[8] } {/theMem/\mem_addr_reg[7] } {/theMem/\mem_addr_reg[6] } {/theMem/\mem_addr_reg[5] } {/theMem/\mem_addr_reg[4] } {/theMem/\mem_addr_reg[3] } {/theMem/\mem_addr_reg[2] } {/theMem/\mem_addr_reg[1] } {/theMem/\mem_addr_reg[0] } {/theMem/\drTmp_reg[31] } {/theMem/\drTmp_reg[30] } {/theMem/\drTmp_reg[29] } {/theMem/\drTmp_reg[28] } {/theMem/\drTmp_reg[27] } {/theMem/\drTmp_reg[26] } {/theMem/\drTmp_reg[25] } {/theMem/\drTmp_reg[24] } {/theMem/\drTmp_reg[23] } {/theMem/\drTmp_reg[22] } {/theMem/\drTmp_reg[21] } {/theMem/\drTmp_reg[20] } {/theMem/\drTmp_reg[19] } {/theMem/\drTmp_reg[18] } {/theMem/\drTmp_reg[17] } {/theMem/\drTmp_reg[16] } {/theMem/\drTmp_reg[15] } {/theMem/\drTmp_reg[14] } {/theMem/\drTmp_reg[13] } {/theMem/\drTmp_reg[12] } {/theMem/\drTmp_reg[11] } {/theMem/\drTmp_reg[10] } {/theMem/\drTmp_reg[9] } {/theMem/\drTmp_reg[8] } {/theMem/\drTmp_reg[7] } {/theMem/\drTmp_reg[6] } {/theMem/\drTmp_reg[5] } {/theMem/\drTmp_reg[4] } {/theMem/\drTmp_reg[3] } {/theMem/\drTmp_reg[2] } {/theMem/\drTmp_reg[1] } {/theMem/\drTmp_reg[0] } {/theMem/\mem_wdata_reg[31] } {/theMem/\mem_wdata_reg[30] } {/theMem/\mem_wdata_reg[29] } {/theMem/\mem_wdata_reg[28] } {/theMem/\mem_wdata_reg[27] } {/theMem/\mem_wdata_reg[26] } {/theMem/\mem_wdata_reg[25] } {/theMem/\mem_wdata_reg[24] } {/theMem/\mem_wdata_reg[23] } {/theMem/\mem_wdata_reg[22] } {/theMem/\mem_wdata_reg[21] } {/theMem/\mem_wdata_reg[20] } {/theMem/\mem_wdata_reg[19] } {/theMem/\mem_wdata_reg[18] } {/theMem/\mem_wdata_reg[17] } {/theMem/\mem_wdata_reg[16] } {/theMem/\mem_wdata_reg[15] } {/theMem/\mem_wdata_reg[14] } {/theMem/\mem_wdata_reg[13] } {/theMem/\mem_wdata_reg[12] } {/theMem/\mem_wdata_reg[11] } {/theMem/\mem_wdata_reg[10] } {/theMem/\mem_wdata_reg[9] } {/theMem/\mem_wdata_reg[8] } {/theMem/\mem_wdata_reg[7] } {/theMem/\mem_wdata_reg[6] } {/theMem/\mem_wdata_reg[5] } {/theMem/\mem_wdata_reg[4] } {/theMem/\mem_wdata_reg[3] } {/theMem/\mem_wdata_reg[2] } {/theMem/\mem_wdata_reg[1] } {/theMem/\mem_wdata_reg[0] } "
// sub-command: add_clocks 0 " clk_25mhz "
// sub-command: set_scan_enable scan_en -active high
// sub-command: add_input_constraints btn[0] -C1
// sub-command: set_scan_enable scan_en -active high -cluster_name scanChain_1
// sub-command: set_scan_enable scan_en -active high -cluster_name scanChain_2
// sub-command: set_scan_enable scan_en -active high -cluster_name scanChain_3
// sub-command: set_scan_enable scan_en -active high -cluster_name scanChain_4
// sub-command: add_black_boxes -modules " MemGen_16_10 "
// sub-command: set_scan_insertion_options -single_clock_edge_chains on -si_port_format oas_ts_si[%d] -so_port_format oas_ts_so[%d]
// sub-command: set_system_mode analysis
// Warning: Rule FN1 violation occurs 157 times
// Warning: Rule FP13 violation occurs 1 times
// Flattening process completed, cell instances=4379, gates=18234, PIs=13, POs=12, CPU time=0.09 sec.
// ---------------------------------------------------------------------------
// Begin circuit learning analyses.
// --------------------------------
// Learning completed, CPU time=0.01 sec.
// ---------------------------------------------------------------------------
// Begin scan chain identification process, memory elements = 1194,
// sequential library cells = 1194.
// ---------------------------------------------------------------------------
// Warning: Model 'DLH_X1_LVT' has no muxscan scan equivalent and is treated as nonscan model
// ------------------------------------------------------------------------------
// 170 sequential library cells are treated as non-scan.
// ------------------------------------------------------------------------------
// 63 sequential library cells missing mux-scan equivalent.
// 107 sequential library cells defined non-scan.
// ---------------------------------------------------------------------------
// Begin scannability rules checking for 1024 sequential library cells.
// ---------------------------------------------------------------------------
// 1024 sequential library cells identified as scannable.
// ---------------------------------------------------------------------------
// Begin transparent latch checking for 63 latches.
// ---------------------------------------------------------------------------
// Warning: 32 latches not transparent due to uncontrollable. (D6)
// Number transparent latches = 31.
// ---------------------------------------------------------------------------
// Begin scan clock rules checking.
// ---------------------------------------------------------------------------
// 1 scan clock/set/reset lines have been identified.
// All scan clocks successfully passed off-state check.
// 1131 sequential cells passed clock stability checking.
// There were 43 clock rule C3 fails (clock may capture data affected by its captured data).
// Note: Trailing edge triggered device can capture data affected by leading edge.
// ---------------------------------------------------------------------------
// 170 non-scan memory elements are identified.
// ---------------------------------------------------------------------------
// 32 non-scan memory elements are identified as TIE-X. (D5)
// 107 non-scan memory elements are identified as INIT-X. (D5)
// 31 non-scan memory elements are identified as TLA. (D5)
// ---------------------------------------------------------------------------
// Number of targeted sequential library cells = 1024
// Warning: The tool may require a shift-capture clock during insertion,
// but no 'shift_capture_clock' DFT signal was identified
// and no TCLK source was specified using the command 'set_scan_signals -tclk'.
// Note: The system clock 'clk_25mhz' will be used as the shift-capture clock, if needed.
// sub-command: report_drc_rules
C3: #fails=43 handling=note (clock may capture data affected by its captured data)
D5: #fails=170 handling=warning (non-scan memory element)
D6: #fails=32 handling=warning (non-transparent non-scan latches)
// sub-command: create_scan_chain_family scanChain_1 -include_elements "{/\thePC_CurrentPC_reg[0] } {/\thePC_CurrentPC_reg[10] } {/\thePC_CurrentPC_reg[11] } {/\thePC_CurrentPC_reg[12] } {/\thePC_CurrentPC_reg[13] } {/\thePC_CurrentPC_reg[14] } {/\thePC_CurrentPC_reg[15] } {/\thePC_CurrentPC_reg[16] } {/\thePC_CurrentPC_reg[17] } {/\thePC_CurrentPC_reg[18] } {/\thePC_CurrentPC_reg[19] } {/\thePC_CurrentPC_reg[1] } {/\thePC_CurrentPC_reg[20] } {/\thePC_CurrentPC_reg[21] } {/\thePC_CurrentPC_reg[22] } {/\thePC_CurrentPC_reg[23] } {/\thePC_CurrentPC_reg[24] } {/\thePC_CurrentPC_reg[25] } {/\thePC_CurrentPC_reg[26] } {/\thePC_CurrentPC_reg[27] } {/\thePC_CurrentPC_reg[28] } {/\thePC_CurrentPC_reg[29] } {/\thePC_CurrentPC_reg[2] } {/\thePC_CurrentPC_reg[30] } {/\thePC_CurrentPC_reg[31] } {/\thePC_CurrentPC_reg[3] } {/\thePC_CurrentPC_reg[4] } {/\thePC_CurrentPC_reg[5] } {/\thePC_CurrentPC_reg[6] } {/\thePC_CurrentPC_reg[7] } {/\thePC_CurrentPC_reg[8] } {/\thePC_CurrentPC_reg[9] } {/theRegisters/\registers_reg[10][0] } {/theRegisters/\registers_reg[10][10] } {/theRegisters/\registers_reg[10][11] } {/theRegisters/\registers_reg[10][12] } {/theRegisters/\registers_reg[10][13] } {/theRegisters/\registers_reg[10][14] } {/theRegisters/\registers_reg[10][15] } {/theRegisters/\registers_reg[10][16] } {/theRegisters/\registers_reg[10][17] } {/theRegisters/\registers_reg[10][18] } {/theRegisters/\registers_reg[10][19] } {/theRegisters/\registers_reg[10][1] } {/theRegisters/\registers_reg[10][20] } {/theRegisters/\registers_reg[10][21] } {/theRegisters/\registers_reg[10][22] } {/theRegisters/\registers_reg[10][23] } {/theRegisters/\registers_reg[10][24] } {/theRegisters/\registers_reg[10][25] } {/theRegisters/\registers_reg[10][26] } {/theRegisters/\registers_reg[10][27] } {/theRegisters/\registers_reg[10][28] } {/theRegisters/\registers_reg[10][29] } {/theRegisters/\registers_reg[10][2] } {/theRegisters/\registers_reg[10][30] } {/theRegisters/\registers_reg[10][31] } {/theRegisters/\registers_reg[10][3] } {/theRegisters/\registers_reg[10][4] } {/theRegisters/\registers_reg[10][5] } {/theRegisters/\registers_reg[10][6] } {/theRegisters/\registers_reg[10][7] } {/theRegisters/\registers_reg[10][8] } {/theRegisters/\registers_reg[10][9] } {/theRegisters/\registers_reg[11][0] } {/theRegisters/\registers_reg[11][10] } {/theRegisters/\registers_reg[11][11] } {/theRegisters/\registers_reg[11][12] } {/theRegisters/\registers_reg[11][13] } {/theRegisters/\registers_reg[11][14] } {/theRegisters/\registers_reg[11][15] } {/theRegisters/\registers_reg[11][16] } {/theRegisters/\registers_reg[11][17] } {/theRegisters/\registers_reg[11][18] } {/theRegisters/\registers_reg[11][19] } {/theRegisters/\registers_reg[11][1] } {/theRegisters/\registers_reg[11][20] } {/theRegisters/\registers_reg[11][21] } {/theRegisters/\registers_reg[11][22] } {/theRegisters/\registers_reg[11][23] } {/theRegisters/\registers_reg[11][24] } {/theRegisters/\registers_reg[11][25] } {/theRegisters/\registers_reg[11][26] } {/theRegisters/\registers_reg[11][27] } {/theRegisters/\registers_reg[11][28] } {/theRegisters/\registers_reg[11][29] } {/theRegisters/\registers_reg[11][2] } {/theRegisters/\registers_reg[11][30] } {/theRegisters/\registers_reg[11][31] } {/theRegisters/\registers_reg[11][3] } {/theRegisters/\registers_reg[11][4] } {/theRegisters/\registers_reg[11][5] } {/theRegisters/\registers_reg[11][6] } {/theRegisters/\registers_reg[11][7] } {/theRegisters/\registers_reg[11][8] } {/theRegisters/\registers_reg[11][9] } {/theRegisters/\registers_reg[12][0] } {/theRegisters/\registers_reg[12][10] } {/theRegisters/\registers_reg[12][11] } {/theRegisters/\registers_reg[12][12] } {/theRegisters/\registers_reg[12][13] } {/theRegisters/\registers_reg[12][14] } {/theRegisters/\registers_reg[12][15] } {/theRegisters/\registers_reg[12][16] } {/theRegisters/\registers_reg[12][17] } {/theRegisters/\registers_reg[12][18] } {/theRegisters/\registers_reg[12][19] } {/theRegisters/\registers_reg[12][1] } {/theRegisters/\registers_reg[12][20] } {/theRegisters/\registers_reg[12][21] } {/theRegisters/\registers_reg[12][22] } {/theRegisters/\registers_reg[12][23] } {/theRegisters/\registers_reg[12][24] } {/theRegisters/\registers_reg[12][25] } {/theRegisters/\registers_reg[12][26] } {/theRegisters/\registers_reg[12][27] } {/theRegisters/\registers_reg[12][28] } {/theRegisters/\registers_reg[12][29] } {/theRegisters/\registers_reg[12][2] } {/theRegisters/\registers_reg[12][30] } {/theRegisters/\registers_reg[12][31] } {/theRegisters/\registers_reg[12][3] } {/theRegisters/\registers_reg[12][4] } {/theRegisters/\registers_reg[12][5] } {/theRegisters/\registers_reg[12][6] } {/theRegisters/\registers_reg[12][7] } {/theRegisters/\registers_reg[12][8] } {/theRegisters/\registers_reg[12][9] } {/theRegisters/\registers_reg[13][0] } {/theRegisters/\registers_reg[13][10] } {/theRegisters/\registers_reg[13][11] } {/theRegisters/\registers_reg[13][12] } {/theRegisters/\registers_reg[13][13] } {/theRegisters/\registers_reg[13][14] } {/theRegisters/\registers_reg[13][15] } {/theRegisters/\registers_reg[13][16] } {/theRegisters/\registers_reg[13][17] } {/theRegisters/\registers_reg[13][18] } {/theRegisters/\registers_reg[13][19] } {/theRegisters/\registers_reg[13][1] } {/theRegisters/\registers_reg[13][20] } {/theRegisters/\registers_reg[13][21] } {/theRegisters/\registers_reg[13][22] } {/theRegisters/\registers_reg[13][23] } {/theRegisters/\registers_reg[13][24] } {/theRegisters/\registers_reg[13][25] } {/theRegisters/\registers_reg[13][26] } {/theRegisters/\registers_reg[13][27] } {/theRegisters/\registers_reg[13][28] } {/theRegisters/\registers_reg[13][29] } {/theRegisters/\registers_reg[13][2] } {/theRegisters/\registers_reg[13][30] } {/theRegisters/\registers_reg[13][31] } {/theRegisters/\registers_reg[13][3] } {/theRegisters/\registers_reg[13][4] } {/theRegisters/\registers_reg[13][5] } {/theRegisters/\registers_reg[13][6] } {/theRegisters/\registers_reg[13][7] } {/theRegisters/\registers_reg[13][8] } {/theRegisters/\registers_reg[13][9] } {/theRegisters/\registers_reg[14][0] } {/theRegisters/\registers_reg[14][10] } {/theRegisters/\registers_reg[14][11] } {/theRegisters/\registers_reg[14][12] } {/theRegisters/\registers_reg[14][13] } {/theRegisters/\registers_reg[14][14] } {/theRegisters/\registers_reg[14][15] } {/theRegisters/\registers_reg[14][16] } {/theRegisters/\registers_reg[14][17] } {/theRegisters/\registers_reg[14][18] } {/theRegisters/\registers_reg[14][19] } {/theRegisters/\registers_reg[14][1] } {/theRegisters/\registers_reg[14][20] } {/theRegisters/\registers_reg[14][21] } {/theRegisters/\registers_reg[14][22] } {/theRegisters/\registers_reg[14][23] } {/theRegisters/\registers_reg[14][24] } {/theRegisters/\registers_reg[14][25] } {/theRegisters/\registers_reg[14][26] } {/theRegisters/\registers_reg[14][27] } {/theRegisters/\registers_reg[14][28] } {/theRegisters/\registers_reg[14][29] } {/theRegisters/\registers_reg[14][2] } {/theRegisters/\registers_reg[14][30] } {/theRegisters/\registers_reg[14][31] } {/theRegisters/\registers_reg[14][3] } {/theRegisters/\registers_reg[14][4] } {/theRegisters/\registers_reg[14][5] } {/theRegisters/\registers_reg[14][6] } {/theRegisters/\registers_reg[14][7] } {/theRegisters/\registers_reg[14][8] } {/theRegisters/\registers_reg[14][9] } {/theRegisters/\registers_reg[15][0] } {/theRegisters/\registers_reg[15][10] } {/theRegisters/\registers_reg[15][11] } {/theRegisters/\registers_reg[15][12] } {/theRegisters/\registers_reg[15][13] } {/theRegisters/\registers_reg[15][14] } {/theRegisters/\registers_reg[15][15] } {/theRegisters/\registers_reg[15][16] } {/theRegisters/\registers_reg[15][17] } {/theRegisters/\registers_reg[15][18] } {/theRegisters/\registers_reg[15][19] } {/theRegisters/\registers_reg[15][1] } {/theRegisters/\registers_reg[15][20] } {/theRegisters/\registers_reg[15][21] } {/theRegisters/\registers_reg[15][22] } {/theRegisters/\registers_reg[15][23] } {/theRegisters/\registers_reg[15][24] } {/theRegisters/\registers_reg[15][25] } {/theRegisters/\registers_reg[15][26] } {/theRegisters/\registers_reg[15][27] } {/theRegisters/\registers_reg[15][28] } {/theRegisters/\registers_reg[15][29] } {/theRegisters/\registers_reg[15][2] } {/theRegisters/\registers_reg[15][30] } {/theRegisters/\registers_reg[15][31] } {/theRegisters/\registers_reg[15][3] } {/theRegisters/\registers_reg[15][4] } {/theRegisters/\registers_reg[15][5] } {/theRegisters/\registers_reg[15][6] } {/theRegisters/\registers_reg[15][7] } {/theRegisters/\registers_reg[15][8] } {/theRegisters/\registers_reg[15][9] } {/theRegisters/\registers_reg[16][0] } {/theRegisters/\registers_reg[16][10] } {/theRegisters/\registers_reg[16][11] } {/theRegisters/\registers_reg[16][12] } {/theRegisters/\registers_reg[16][13] } {/theRegisters/\registers_reg[16][14] } {/theRegisters/\registers_reg[16][15] } {/theRegisters/\registers_reg[16][16] } {/theRegisters/\registers_reg[16][17] } {/theRegisters/\registers_reg[16][18] } {/theRegisters/\registers_reg[16][19] } {/theRegisters/\registers_reg[16][1] } {/theRegisters/\registers_reg[16][20] } {/theRegisters/\registers_reg[16][21] } {/theRegisters/\registers_reg[16][22] } {/theRegisters/\registers_reg[16][23] } {/theRegisters/\registers_reg[16][24] } {/theRegisters/\registers_reg[16][25] } {/theRegisters/\registers_reg[16][26] } {/theRegisters/\registers_reg[16][27] } {/theRegisters/\registers_reg[16][28] } {/theRegisters/\registers_reg[16][29] } {/theRegisters/\registers_reg[16][2] } {/theRegisters/\registers_reg[16][30] } {/theRegisters/\registers_reg[16][31] } {/theRegisters/\registers_reg[16][3] } {/theRegisters/\registers_reg[16][4] } {/theRegisters/\registers_reg[16][5] } {/theRegisters/\registers_reg[16][6] } {/theRegisters/\registers_reg[16][7] } {/theRegisters/\registers_reg[16][8] } {/theRegisters/\registers_reg[16][9] } " -si_connections "SI_1 " -so_connections "SO_1 " -chain_count 1
// sub-command: create_scan_chain_family scanChain_2 -include_elements "{/theRegisters/\registers_reg[17][0] } {/theRegisters/\registers_reg[17][10] } {/theRegisters/\registers_reg[17][11] } {/theRegisters/\registers_reg[17][12] } {/theRegisters/\registers_reg[17][13] } {/theRegisters/\registers_reg[17][14] } {/theRegisters/\registers_reg[17][15] } {/theRegisters/\registers_reg[17][16] } {/theRegisters/\registers_reg[17][17] } {/theRegisters/\registers_reg[17][18] } {/theRegisters/\registers_reg[17][19] } {/theRegisters/\registers_reg[17][1] } {/theRegisters/\registers_reg[17][20] } {/theRegisters/\registers_reg[17][21] } {/theRegisters/\registers_reg[17][22] } {/theRegisters/\registers_reg[17][23] } {/theRegisters/\registers_reg[17][24] } {/theRegisters/\registers_reg[17][25] } {/theRegisters/\registers_reg[17][26] } {/theRegisters/\registers_reg[17][27] } {/theRegisters/\registers_reg[17][28] } {/theRegisters/\registers_reg[17][29] } {/theRegisters/\registers_reg[17][2] } {/theRegisters/\registers_reg[17][30] } {/theRegisters/\registers_reg[17][31] } {/theRegisters/\registers_reg[17][3] } {/theRegisters/\registers_reg[17][4] } {/theRegisters/\registers_reg[17][5] } {/theRegisters/\registers_reg[17][6] } {/theRegisters/\registers_reg[17][7] } {/theRegisters/\registers_reg[17][8] } {/theRegisters/\registers_reg[17][9] } {/theRegisters/\registers_reg[18][0] } {/theRegisters/\registers_reg[18][10] } {/theRegisters/\registers_reg[18][11] } {/theRegisters/\registers_reg[18][12] } {/theRegisters/\registers_reg[18][13] } {/theRegisters/\registers_reg[18][14] } {/theRegisters/\registers_reg[18][15] } {/theRegisters/\registers_reg[18][16] } {/theRegisters/\registers_reg[18][17] } {/theRegisters/\registers_reg[18][18] } {/theRegisters/\registers_reg[18][19] } {/theRegisters/\registers_reg[18][1] } {/theRegisters/\registers_reg[18][20] } {/theRegisters/\registers_reg[18][21] } {/theRegisters/\registers_reg[18][22] } {/theRegisters/\registers_reg[18][23] } {/theRegisters/\registers_reg[18][24] } {/theRegisters/\registers_reg[18][25] } {/theRegisters/\registers_reg[18][26] } {/theRegisters/\registers_reg[18][27] } {/theRegisters/\registers_reg[18][28] } {/theRegisters/\registers_reg[18][29] } {/theRegisters/\registers_reg[18][2] } {/theRegisters/\registers_reg[18][30] } {/theRegisters/\registers_reg[18][31] } {/theRegisters/\registers_reg[18][3] } {/theRegisters/\registers_reg[18][4] } {/theRegisters/\registers_reg[18][5] } {/theRegisters/\registers_reg[18][6] } {/theRegisters/\registers_reg[18][7] } {/theRegisters/\registers_reg[18][8] } {/theRegisters/\registers_reg[18][9] } {/theRegisters/\registers_reg[19][0] } {/theRegisters/\registers_reg[19][10] } {/theRegisters/\registers_reg[19][11] } {/theRegisters/\registers_reg[19][12] } {/theRegisters/\registers_reg[19][13] } {/theRegisters/\registers_reg[19][14] } {/theRegisters/\registers_reg[19][15] } {/theRegisters/\registers_reg[19][16] } {/theRegisters/\registers_reg[19][17] } {/theRegisters/\registers_reg[19][18] } {/theRegisters/\registers_reg[19][19] } {/theRegisters/\registers_reg[19][1] } {/theRegisters/\registers_reg[19][20] } {/theRegisters/\registers_reg[19][21] } {/theRegisters/\registers_reg[19][22] } {/theRegisters/\registers_reg[19][23] } {/theRegisters/\registers_reg[19][24] } {/theRegisters/\registers_reg[19][25] } {/theRegisters/\registers_reg[19][26] } {/theRegisters/\registers_reg[19][27] } {/theRegisters/\registers_reg[19][28] } {/theRegisters/\registers_reg[19][29] } {/theRegisters/\registers_reg[19][2] } {/theRegisters/\registers_reg[19][30] } {/theRegisters/\registers_reg[19][31] } {/theRegisters/\registers_reg[19][3] } {/theRegisters/\registers_reg[19][4] } {/theRegisters/\registers_reg[19][5] } {/theRegisters/\registers_reg[19][6] } {/theRegisters/\registers_reg[19][7] } {/theRegisters/\registers_reg[19][8] } {/theRegisters/\registers_reg[19][9] } {/theRegisters/\registers_reg[1][0] } {/theRegisters/\registers_reg[1][10] } {/theRegisters/\registers_reg[1][11] } {/theRegisters/\registers_reg[1][12] } {/theRegisters/\registers_reg[1][13] } {/theRegisters/\registers_reg[1][14] } {/theRegisters/\registers_reg[1][15] } {/theRegisters/\registers_reg[1][16] } {/theRegisters/\registers_reg[1][17] } {/theRegisters/\registers_reg[1][18] } {/theRegisters/\registers_reg[1][19] } {/theRegisters/\registers_reg[1][1] } {/theRegisters/\registers_reg[1][20] } {/theRegisters/\registers_reg[1][21] } {/theRegisters/\registers_reg[1][22] } {/theRegisters/\registers_reg[1][23] } {/theRegisters/\registers_reg[1][24] } {/theRegisters/\registers_reg[1][25] } {/theRegisters/\registers_reg[1][26] } {/theRegisters/\registers_reg[1][27] } {/theRegisters/\registers_reg[1][28] } {/theRegisters/\registers_reg[1][29] } {/theRegisters/\registers_reg[1][2] } {/theRegisters/\registers_reg[1][30] } {/theRegisters/\registers_reg[1][31] } {/theRegisters/\registers_reg[1][3] } {/theRegisters/\registers_reg[1][4] } {/theRegisters/\registers_reg[1][5] } {/theRegisters/\registers_reg[1][6] } {/theRegisters/\registers_reg[1][7] } {/theRegisters/\registers_reg[1][8] } {/theRegisters/\registers_reg[1][9] } {/theRegisters/\registers_reg[20][0] } {/theRegisters/\registers_reg[20][10] } {/theRegisters/\registers_reg[20][11] } {/theRegisters/\registers_reg[20][12] } {/theRegisters/\registers_reg[20][13] } {/theRegisters/\registers_reg[20][14] } {/theRegisters/\registers_reg[20][15] } {/theRegisters/\registers_reg[20][16] } {/theRegisters/\registers_reg[20][17] } {/theRegisters/\registers_reg[20][18] } {/theRegisters/\registers_reg[20][19] } {/theRegisters/\registers_reg[20][1] } {/theRegisters/\registers_reg[20][20] } {/theRegisters/\registers_reg[20][21] } {/theRegisters/\registers_reg[20][22] } {/theRegisters/\registers_reg[20][23] } {/theRegisters/\registers_reg[20][24] } {/theRegisters/\registers_reg[20][25] } {/theRegisters/\registers_reg[20][26] } {/theRegisters/\registers_reg[20][27] } {/theRegisters/\registers_reg[20][28] } {/theRegisters/\registers_reg[20][29] } {/theRegisters/\registers_reg[20][2] } {/theRegisters/\registers_reg[20][30] } {/theRegisters/\registers_reg[20][31] } {/theRegisters/\registers_reg[20][3] } {/theRegisters/\registers_reg[20][4] } {/theRegisters/\registers_reg[20][5] } {/theRegisters/\registers_reg[20][6] } {/theRegisters/\registers_reg[20][7] } {/theRegisters/\registers_reg[20][8] } {/theRegisters/\registers_reg[20][9] } {/theRegisters/\registers_reg[21][0] } {/theRegisters/\registers_reg[21][10] } {/theRegisters/\registers_reg[21][11] } {/theRegisters/\registers_reg[21][12] } {/theRegisters/\registers_reg[21][13] } {/theRegisters/\registers_reg[21][14] } {/theRegisters/\registers_reg[21][15] } {/theRegisters/\registers_reg[21][16] } {/theRegisters/\registers_reg[21][17] } {/theRegisters/\registers_reg[21][18] } {/theRegisters/\registers_reg[21][19] } {/theRegisters/\registers_reg[21][1] } {/theRegisters/\registers_reg[21][20] } {/theRegisters/\registers_reg[21][21] } {/theRegisters/\registers_reg[21][22] } {/theRegisters/\registers_reg[21][23] } {/theRegisters/\registers_reg[21][24] } {/theRegisters/\registers_reg[21][25] } {/theRegisters/\registers_reg[21][26] } {/theRegisters/\registers_reg[21][27] } {/theRegisters/\registers_reg[21][28] } {/theRegisters/\registers_reg[21][29] } {/theRegisters/\registers_reg[21][2] } {/theRegisters/\registers_reg[21][30] } {/theRegisters/\registers_reg[21][31] } {/theRegisters/\registers_reg[21][3] } {/theRegisters/\registers_reg[21][4] } {/theRegisters/\registers_reg[21][5] } {/theRegisters/\registers_reg[21][6] } {/theRegisters/\registers_reg[21][7] } {/theRegisters/\registers_reg[21][8] } {/theRegisters/\registers_reg[21][9] } {/theRegisters/\registers_reg[22][0] } {/theRegisters/\registers_reg[22][10] } {/theRegisters/\registers_reg[22][11] } {/theRegisters/\registers_reg[22][12] } {/theRegisters/\registers_reg[22][13] } {/theRegisters/\registers_reg[22][14] } {/theRegisters/\registers_reg[22][15] } {/theRegisters/\registers_reg[22][16] } {/theRegisters/\registers_reg[22][17] } {/theRegisters/\registers_reg[22][18] } {/theRegisters/\registers_reg[22][19] } {/theRegisters/\registers_reg[22][1] } {/theRegisters/\registers_reg[22][20] } {/theRegisters/\registers_reg[22][21] } {/theRegisters/\registers_reg[22][22] } {/theRegisters/\registers_reg[22][23] } {/theRegisters/\registers_reg[22][24] } {/theRegisters/\registers_reg[22][25] } {/theRegisters/\registers_reg[22][26] } {/theRegisters/\registers_reg[22][27] } {/theRegisters/\registers_reg[22][28] } {/theRegisters/\registers_reg[22][29] } {/theRegisters/\registers_reg[22][2] } {/theRegisters/\registers_reg[22][30] } {/theRegisters/\registers_reg[22][31] } {/theRegisters/\registers_reg[22][3] } {/theRegisters/\registers_reg[22][4] } {/theRegisters/\registers_reg[22][5] } {/theRegisters/\registers_reg[22][6] } {/theRegisters/\registers_reg[22][7] } {/theRegisters/\registers_reg[22][8] } {/theRegisters/\registers_reg[22][9] } {/theRegisters/\registers_reg[23][0] } {/theRegisters/\registers_reg[23][10] } {/theRegisters/\registers_reg[23][11] } {/theRegisters/\registers_reg[23][12] } {/theRegisters/\registers_reg[23][13] } {/theRegisters/\registers_reg[23][14] } {/theRegisters/\registers_reg[23][15] } {/theRegisters/\registers_reg[23][16] } {/theRegisters/\registers_reg[23][17] } {/theRegisters/\registers_reg[23][18] } {/theRegisters/\registers_reg[23][19] } {/theRegisters/\registers_reg[23][1] } {/theRegisters/\registers_reg[23][20] } {/theRegisters/\registers_reg[23][21] } {/theRegisters/\registers_reg[23][22] } {/theRegisters/\registers_reg[23][23] } {/theRegisters/\registers_reg[23][24] } {/theRegisters/\registers_reg[23][25] } {/theRegisters/\registers_reg[23][26] } {/theRegisters/\registers_reg[23][27] } {/theRegisters/\registers_reg[23][28] } {/theRegisters/\registers_reg[23][29] } {/theRegisters/\registers_reg[23][2] } {/theRegisters/\registers_reg[23][30] } {/theRegisters/\registers_reg[23][31] } {/theRegisters/\registers_reg[23][3] } {/theRegisters/\registers_reg[23][4] } {/theRegisters/\registers_reg[23][5] } {/theRegisters/\registers_reg[23][6] } {/theRegisters/\registers_reg[23][7] } {/theRegisters/\registers_reg[23][8] } {/theRegisters/\registers_reg[23][9] } " -si_connections "SI_2 " -so_connections "SO_2 " -chain_count 1
// sub-command: create_scan_chain_family scanChain_3 -include_elements "{/theRegisters/\registers_reg[24][0] } {/theRegisters/\registers_reg[24][10] } {/theRegisters/\registers_reg[24][11] } {/theRegisters/\registers_reg[24][12] } {/theRegisters/\registers_reg[24][13] } {/theRegisters/\registers_reg[24][14] } {/theRegisters/\registers_reg[24][15] } {/theRegisters/\registers_reg[24][16] } {/theRegisters/\registers_reg[24][17] } {/theRegisters/\registers_reg[24][18] } {/theRegisters/\registers_reg[24][19] } {/theRegisters/\registers_reg[24][1] } {/theRegisters/\registers_reg[24][20] } {/theRegisters/\registers_reg[24][21] } {/theRegisters/\registers_reg[24][22] } {/theRegisters/\registers_reg[24][23] } {/theRegisters/\registers_reg[24][24] } {/theRegisters/\registers_reg[24][25] } {/theRegisters/\registers_reg[24][26] } {/theRegisters/\registers_reg[24][27] } {/theRegisters/\registers_reg[24][28] } {/theRegisters/\registers_reg[24][29] } {/theRegisters/\registers_reg[24][2] } {/theRegisters/\registers_reg[24][30] } {/theRegisters/\registers_reg[24][31] } {/theRegisters/\registers_reg[24][3] } {/theRegisters/\registers_reg[24][4] } {/theRegisters/\registers_reg[24][5] } {/theRegisters/\registers_reg[24][6] } {/theRegisters/\registers_reg[24][7] } {/theRegisters/\registers_reg[24][8] } {/theRegisters/\registers_reg[24][9] } {/theRegisters/\registers_reg[25][0] } {/theRegisters/\registers_reg[25][10] } {/theRegisters/\registers_reg[25][11] } {/theRegisters/\registers_reg[25][12] } {/theRegisters/\registers_reg[25][13] } {/theRegisters/\registers_reg[25][14] } {/theRegisters/\registers_reg[25][15] } {/theRegisters/\registers_reg[25][16] } {/theRegisters/\registers_reg[25][17] } {/theRegisters/\registers_reg[25][18] } {/theRegisters/\registers_reg[25][19] } {/theRegisters/\registers_reg[25][1] } {/theRegisters/\registers_reg[25][20] } {/theRegisters/\registers_reg[25][21] } {/theRegisters/\registers_reg[25][22] } {/theRegisters/\registers_reg[25][23] } {/theRegisters/\registers_reg[25][24] } {/theRegisters/\registers_reg[25][25] } {/theRegisters/\registers_reg[25][26] } {/theRegisters/\registers_reg[25][27] } {/theRegisters/\registers_reg[25][28] } {/theRegisters/\registers_reg[25][29] } {/theRegisters/\registers_reg[25][2] } {/theRegisters/\registers_reg[25][30] } {/theRegisters/\registers_reg[25][31] } {/theRegisters/\registers_reg[25][3] } {/theRegisters/\registers_reg[25][4] } {/theRegisters/\registers_reg[25][5] } {/theRegisters/\registers_reg[25][6] } {/theRegisters/\registers_reg[25][7] } {/theRegisters/\registers_reg[25][8] } {/theRegisters/\registers_reg[25][9] } {/theRegisters/\registers_reg[26][0] } {/theRegisters/\registers_reg[26][10] } {/theRegisters/\registers_reg[26][11] } {/theRegisters/\registers_reg[26][12] } {/theRegisters/\registers_reg[26][13] } {/theRegisters/\registers_reg[26][14] } {/theRegisters/\registers_reg[26][15] } {/theRegisters/\registers_reg[26][16] } {/theRegisters/\registers_reg[26][17] } {/theRegisters/\registers_reg[26][18] } {/theRegisters/\registers_reg[26][19] } {/theRegisters/\registers_reg[26][1] } {/theRegisters/\registers_reg[26][20] } {/theRegisters/\registers_reg[26][21] } {/theRegisters/\registers_reg[26][22] } {/theRegisters/\registers_reg[26][23] } {/theRegisters/\registers_reg[26][24] } {/theRegisters/\registers_reg[26][25] } {/theRegisters/\registers_reg[26][26] } {/theRegisters/\registers_reg[26][27] } {/theRegisters/\registers_reg[26][28] } {/theRegisters/\registers_reg[26][29] } {/theRegisters/\registers_reg[26][2] } {/theRegisters/\registers_reg[26][30] } {/theRegisters/\registers_reg[26][31] } {/theRegisters/\registers_reg[26][3] } {/theRegisters/\registers_reg[26][4] } {/theRegisters/\registers_reg[26][5] } {/theRegisters/\registers_reg[26][6] } {/theRegisters/\registers_reg[26][7] } {/theRegisters/\registers_reg[26][8] } {/theRegisters/\registers_reg[26][9] } {/theRegisters/\registers_reg[27][0] } {/theRegisters/\registers_reg[27][10] } {/theRegisters/\registers_reg[27][11] } {/theRegisters/\registers_reg[27][12] } {/theRegisters/\registers_reg[27][13] } {/theRegisters/\registers_reg[27][14] } {/theRegisters/\registers_reg[27][15] } {/theRegisters/\registers_reg[27][16] } {/theRegisters/\registers_reg[27][17] } {/theRegisters/\registers_reg[27][18] } {/theRegisters/\registers_reg[27][19] } {/theRegisters/\registers_reg[27][1] } {/theRegisters/\registers_reg[27][20] } {/theRegisters/\registers_reg[27][21] } {/theRegisters/\registers_reg[27][22] } {/theRegisters/\registers_reg[27][23] } {/theRegisters/\registers_reg[27][24] } {/theRegisters/\registers_reg[27][25] } {/theRegisters/\registers_reg[27][26] } {/theRegisters/\registers_reg[27][27] } {/theRegisters/\registers_reg[27][28] } {/theRegisters/\registers_reg[27][29] } {/theRegisters/\registers_reg[27][2] } {/theRegisters/\registers_reg[27][30] } {/theRegisters/\registers_reg[27][31] } {/theRegisters/\registers_reg[27][3] } {/theRegisters/\registers_reg[27][4] } {/theRegisters/\registers_reg[27][5] } {/theRegisters/\registers_reg[27][6] } {/theRegisters/\registers_reg[27][7] } {/theRegisters/\registers_reg[27][8] } {/theRegisters/\registers_reg[27][9] } {/theRegisters/\registers_reg[28][0] } {/theRegisters/\registers_reg[28][10] } {/theRegisters/\registers_reg[28][11] } {/theRegisters/\registers_reg[28][12] } {/theRegisters/\registers_reg[28][13] } {/theRegisters/\registers_reg[28][14] } {/theRegisters/\registers_reg[28][15] } {/theRegisters/\registers_reg[28][16] } {/theRegisters/\registers_reg[28][17] } {/theRegisters/\registers_reg[28][18] } {/theRegisters/\registers_reg[28][19] } {/theRegisters/\registers_reg[28][1] } {/theRegisters/\registers_reg[28][20] } {/theRegisters/\registers_reg[28][21] } {/theRegisters/\registers_reg[28][22] } {/theRegisters/\registers_reg[28][23] } {/theRegisters/\registers_reg[28][24] } {/theRegisters/\registers_reg[28][25] } {/theRegisters/\registers_reg[28][26] } {/theRegisters/\registers_reg[28][27] } {/theRegisters/\registers_reg[28][28] } {/theRegisters/\registers_reg[28][29] } {/theRegisters/\registers_reg[28][2] } {/theRegisters/\registers_reg[28][30] } {/theRegisters/\registers_reg[28][31] } {/theRegisters/\registers_reg[28][3] } {/theRegisters/\registers_reg[28][4] } {/theRegisters/\registers_reg[28][5] } {/theRegisters/\registers_reg[28][6] } {/theRegisters/\registers_reg[28][7] } {/theRegisters/\registers_reg[28][8] } {/theRegisters/\registers_reg[28][9] } {/theRegisters/\registers_reg[29][0] } {/theRegisters/\registers_reg[29][10] } {/theRegisters/\registers_reg[29][11] } {/theRegisters/\registers_reg[29][12] } {/theRegisters/\registers_reg[29][13] } {/theRegisters/\registers_reg[29][14] } {/theRegisters/\registers_reg[29][15] } {/theRegisters/\registers_reg[29][16] } {/theRegisters/\registers_reg[29][17] } {/theRegisters/\registers_reg[29][18] } {/theRegisters/\registers_reg[29][19] } {/theRegisters/\registers_reg[29][1] } {/theRegisters/\registers_reg[29][20] } {/theRegisters/\registers_reg[29][21] } {/theRegisters/\registers_reg[29][22] } {/theRegisters/\registers_reg[29][23] } {/theRegisters/\registers_reg[29][24] } {/theRegisters/\registers_reg[29][25] } {/theRegisters/\registers_reg[29][26] } {/theRegisters/\registers_reg[29][27] } {/theRegisters/\registers_reg[29][28] } {/theRegisters/\registers_reg[29][29] } {/theRegisters/\registers_reg[29][2] } {/theRegisters/\registers_reg[29][30] } {/theRegisters/\registers_reg[29][31] } {/theRegisters/\registers_reg[29][3] } {/theRegisters/\registers_reg[29][4] } {/theRegisters/\registers_reg[29][5] } {/theRegisters/\registers_reg[29][6] } {/theRegisters/\registers_reg[29][7] } {/theRegisters/\registers_reg[29][8] } {/theRegisters/\registers_reg[29][9] } {/theRegisters/\registers_reg[2][0] } {/theRegisters/\registers_reg[2][10] } {/theRegisters/\registers_reg[2][11] } {/theRegisters/\registers_reg[2][12] } {/theRegisters/\registers_reg[2][13] } {/theRegisters/\registers_reg[2][14] } {/theRegisters/\registers_reg[2][15] } {/theRegisters/\registers_reg[2][16] } {/theRegisters/\registers_reg[2][17] } {/theRegisters/\registers_reg[2][18] } {/theRegisters/\registers_reg[2][19] } {/theRegisters/\registers_reg[2][1] } {/theRegisters/\registers_reg[2][20] } {/theRegisters/\registers_reg[2][21] } {/theRegisters/\registers_reg[2][22] } {/theRegisters/\registers_reg[2][23] } {/theRegisters/\registers_reg[2][24] } {/theRegisters/\registers_reg[2][25] } {/theRegisters/\registers_reg[2][26] } {/theRegisters/\registers_reg[2][27] } {/theRegisters/\registers_reg[2][28] } {/theRegisters/\registers_reg[2][29] } {/theRegisters/\registers_reg[2][2] } {/theRegisters/\registers_reg[2][30] } {/theRegisters/\registers_reg[2][31] } {/theRegisters/\registers_reg[2][3] } {/theRegisters/\registers_reg[2][4] } {/theRegisters/\registers_reg[2][5] } {/theRegisters/\registers_reg[2][6] } {/theRegisters/\registers_reg[2][7] } {/theRegisters/\registers_reg[2][8] } {/theRegisters/\registers_reg[2][9] } {/theRegisters/\registers_reg[30][0] } {/theRegisters/\registers_reg[30][10] } {/theRegisters/\registers_reg[30][11] } {/theRegisters/\registers_reg[30][12] } {/theRegisters/\registers_reg[30][13] } {/theRegisters/\registers_reg[30][14] } {/theRegisters/\registers_reg[30][15] } {/theRegisters/\registers_reg[30][16] } {/theRegisters/\registers_reg[30][17] } {/theRegisters/\registers_reg[30][18] } {/theRegisters/\registers_reg[30][19] } {/theRegisters/\registers_reg[30][1] } {/theRegisters/\registers_reg[30][20] } {/theRegisters/\registers_reg[30][21] } {/theRegisters/\registers_reg[30][22] } {/theRegisters/\registers_reg[30][23] } {/theRegisters/\registers_reg[30][24] } {/theRegisters/\registers_reg[30][25] } {/theRegisters/\registers_reg[30][26] } {/theRegisters/\registers_reg[30][27] } {/theRegisters/\registers_reg[30][28] } {/theRegisters/\registers_reg[30][29] } {/theRegisters/\registers_reg[30][2] } {/theRegisters/\registers_reg[30][30] } {/theRegisters/\registers_reg[30][31] } {/theRegisters/\registers_reg[30][3] } {/theRegisters/\registers_reg[30][4] } {/theRegisters/\registers_reg[30][5] } {/theRegisters/\registers_reg[30][6] } {/theRegisters/\registers_reg[30][7] } {/theRegisters/\registers_reg[30][8] } {/theRegisters/\registers_reg[30][9] } " -si_connections "SI_3 " -so_connections "SO_3 " -chain_count 1
// sub-command: create_scan_chain_family scanChain_4 -include_elements "{/theRegisters/\registers_reg[31][0] } {/theRegisters/\registers_reg[31][10] } {/theRegisters/\registers_reg[31][11] } {/theRegisters/\registers_reg[31][12] } {/theRegisters/\registers_reg[31][13] } {/theRegisters/\registers_reg[31][14] } {/theRegisters/\registers_reg[31][15] } {/theRegisters/\registers_reg[31][16] } {/theRegisters/\registers_reg[31][17] } {/theRegisters/\registers_reg[31][18] } {/theRegisters/\registers_reg[31][19] } {/theRegisters/\registers_reg[31][1] } {/theRegisters/\registers_reg[31][20] } {/theRegisters/\registers_reg[31][21] } {/theRegisters/\registers_reg[31][22] } {/theRegisters/\registers_reg[31][23] } {/theRegisters/\registers_reg[31][24] } {/theRegisters/\registers_reg[31][25] } {/theRegisters/\registers_reg[31][26] } {/theRegisters/\registers_reg[31][27] } {/theRegisters/\registers_reg[31][28] } {/theRegisters/\registers_reg[31][29] } {/theRegisters/\registers_reg[31][2] } {/theRegisters/\registers_reg[31][30] } {/theRegisters/\registers_reg[31][31] } {/theRegisters/\registers_reg[31][3] } {/theRegisters/\registers_reg[31][4] } {/theRegisters/\registers_reg[31][5] } {/theRegisters/\registers_reg[31][6] } {/theRegisters/\registers_reg[31][7] } {/theRegisters/\registers_reg[31][8] } {/theRegisters/\registers_reg[31][9] } {/theRegisters/\registers_reg[3][0] } {/theRegisters/\registers_reg[3][10] } {/theRegisters/\registers_reg[3][11] } {/theRegisters/\registers_reg[3][12] } {/theRegisters/\registers_reg[3][13] } {/theRegisters/\registers_reg[3][14] } {/theRegisters/\registers_reg[3][15] } {/theRegisters/\registers_reg[3][16] } {/theRegisters/\registers_reg[3][17] } {/theRegisters/\registers_reg[3][18] } {/theRegisters/\registers_reg[3][19] } {/theRegisters/\registers_reg[3][1] } {/theRegisters/\registers_reg[3][20] } {/theRegisters/\registers_reg[3][21] } {/theRegisters/\registers_reg[3][22] } {/theRegisters/\registers_reg[3][23] } {/theRegisters/\registers_reg[3][24] } {/theRegisters/\registers_reg[3][25] } {/theRegisters/\registers_reg[3][26] } {/theRegisters/\registers_reg[3][27] } {/theRegisters/\registers_reg[3][28] } {/theRegisters/\registers_reg[3][29] } {/theRegisters/\registers_reg[3][2] } {/theRegisters/\registers_reg[3][30] } {/theRegisters/\registers_reg[3][31] } {/theRegisters/\registers_reg[3][3] } {/theRegisters/\registers_reg[3][4] } {/theRegisters/\registers_reg[3][5] } {/theRegisters/\registers_reg[3][6] } {/theRegisters/\registers_reg[3][7] } {/theRegisters/\registers_reg[3][8] } {/theRegisters/\registers_reg[3][9] } {/theRegisters/\registers_reg[4][0] } {/theRegisters/\registers_reg[4][10] } {/theRegisters/\registers_reg[4][11] } {/theRegisters/\registers_reg[4][12] } {/theRegisters/\registers_reg[4][13] } {/theRegisters/\registers_reg[4][14] } {/theRegisters/\registers_reg[4][15] } {/theRegisters/\registers_reg[4][16] } {/theRegisters/\registers_reg[4][17] } {/theRegisters/\registers_reg[4][18] } {/theRegisters/\registers_reg[4][19] } {/theRegisters/\registers_reg[4][1] } {/theRegisters/\registers_reg[4][20] } {/theRegisters/\registers_reg[4][21] } {/theRegisters/\registers_reg[4][22] } {/theRegisters/\registers_reg[4][23] } {/theRegisters/\registers_reg[4][24] } {/theRegisters/\registers_reg[4][25] } {/theRegisters/\registers_reg[4][26] } {/theRegisters/\registers_reg[4][27] } {/theRegisters/\registers_reg[4][28] } {/theRegisters/\registers_reg[4][29] } {/theRegisters/\registers_reg[4][2] } {/theRegisters/\registers_reg[4][30] } {/theRegisters/\registers_reg[4][31] } {/theRegisters/\registers_reg[4][3] } {/theRegisters/\registers_reg[4][4] } {/theRegisters/\registers_reg[4][5] } {/theRegisters/\registers_reg[4][6] } {/theRegisters/\registers_reg[4][7] } {/theRegisters/\registers_reg[4][8] } {/theRegisters/\registers_reg[4][9] } {/theRegisters/\registers_reg[5][0] } {/theRegisters/\registers_reg[5][10] } {/theRegisters/\registers_reg[5][11] } {/theRegisters/\registers_reg[5][12] } {/theRegisters/\registers_reg[5][13] } {/theRegisters/\registers_reg[5][14] } {/theRegisters/\registers_reg[5][15] } {/theRegisters/\registers_reg[5][16] } {/theRegisters/\registers_reg[5][17] } {/theRegisters/\registers_reg[5][18] } {/theRegisters/\registers_reg[5][19] } {/theRegisters/\registers_reg[5][1] } {/theRegisters/\registers_reg[5][20] } {/theRegisters/\registers_reg[5][21] } {/theRegisters/\registers_reg[5][22] } {/theRegisters/\registers_reg[5][23] } {/theRegisters/\registers_reg[5][24] } {/theRegisters/\registers_reg[5][25] } {/theRegisters/\registers_reg[5][26] } {/theRegisters/\registers_reg[5][27] } {/theRegisters/\registers_reg[5][28] } {/theRegisters/\registers_reg[5][29] } {/theRegisters/\registers_reg[5][2] } {/theRegisters/\registers_reg[5][30] } {/theRegisters/\registers_reg[5][31] } {/theRegisters/\registers_reg[5][3] } {/theRegisters/\registers_reg[5][4] } {/theRegisters/\registers_reg[5][5] } {/theRegisters/\registers_reg[5][6] } {/theRegisters/\registers_reg[5][7] } {/theRegisters/\registers_reg[5][8] } {/theRegisters/\registers_reg[5][9] } {/theRegisters/\registers_reg[6][0] } {/theRegisters/\registers_reg[6][10] } {/theRegisters/\registers_reg[6][11] } {/theRegisters/\registers_reg[6][12] } {/theRegisters/\registers_reg[6][13] } {/theRegisters/\registers_reg[6][14] } {/theRegisters/\registers_reg[6][15] } {/theRegisters/\registers_reg[6][16] } {/theRegisters/\registers_reg[6][17] } {/theRegisters/\registers_reg[6][18] } {/theRegisters/\registers_reg[6][19] } {/theRegisters/\registers_reg[6][1] } {/theRegisters/\registers_reg[6][20] } {/theRegisters/\registers_reg[6][21] } {/theRegisters/\registers_reg[6][22] } {/theRegisters/\registers_reg[6][23] } {/theRegisters/\registers_reg[6][24] } {/theRegisters/\registers_reg[6][25] } {/theRegisters/\registers_reg[6][26] } {/theRegisters/\registers_reg[6][27] } {/theRegisters/\registers_reg[6][28] } {/theRegisters/\registers_reg[6][29] } {/theRegisters/\registers_reg[6][2] } {/theRegisters/\registers_reg[6][30] } {/theRegisters/\registers_reg[6][31] } {/theRegisters/\registers_reg[6][3] } {/theRegisters/\registers_reg[6][4] } {/theRegisters/\registers_reg[6][5] } {/theRegisters/\registers_reg[6][6] } {/theRegisters/\registers_reg[6][7] } {/theRegisters/\registers_reg[6][8] } {/theRegisters/\registers_reg[6][9] } {/theRegisters/\registers_reg[7][0] } {/theRegisters/\registers_reg[7][10] } {/theRegisters/\registers_reg[7][11] } {/theRegisters/\registers_reg[7][12] } {/theRegisters/\registers_reg[7][13] } {/theRegisters/\registers_reg[7][14] } {/theRegisters/\registers_reg[7][15] } {/theRegisters/\registers_reg[7][16] } {/theRegisters/\registers_reg[7][17] } {/theRegisters/\registers_reg[7][18] } {/theRegisters/\registers_reg[7][19] } {/theRegisters/\registers_reg[7][1] } {/theRegisters/\registers_reg[7][20] } {/theRegisters/\registers_reg[7][21] } {/theRegisters/\registers_reg[7][22] } {/theRegisters/\registers_reg[7][23] } {/theRegisters/\registers_reg[7][24] } {/theRegisters/\registers_reg[7][25] } {/theRegisters/\registers_reg[7][26] } {/theRegisters/\registers_reg[7][27] } {/theRegisters/\registers_reg[7][28] } {/theRegisters/\registers_reg[7][29] } {/theRegisters/\registers_reg[7][2] } {/theRegisters/\registers_reg[7][30] } {/theRegisters/\registers_reg[7][31] } {/theRegisters/\registers_reg[7][3] } {/theRegisters/\registers_reg[7][4] } {/theRegisters/\registers_reg[7][5] } {/theRegisters/\registers_reg[7][6] } {/theRegisters/\registers_reg[7][7] } {/theRegisters/\registers_reg[7][8] } {/theRegisters/\registers_reg[7][9] } {/theRegisters/\registers_reg[8][0] } {/theRegisters/\registers_reg[8][10] } {/theRegisters/\registers_reg[8][11] } {/theRegisters/\registers_reg[8][12] } {/theRegisters/\registers_reg[8][13] } {/theRegisters/\registers_reg[8][14] } {/theRegisters/\registers_reg[8][15] } {/theRegisters/\registers_reg[8][16] } {/theRegisters/\registers_reg[8][17] } {/theRegisters/\registers_reg[8][18] } {/theRegisters/\registers_reg[8][19] } {/theRegisters/\registers_reg[8][1] } {/theRegisters/\registers_reg[8][20] } {/theRegisters/\registers_reg[8][21] } {/theRegisters/\registers_reg[8][22] } {/theRegisters/\registers_reg[8][23] } {/theRegisters/\registers_reg[8][24] } {/theRegisters/\registers_reg[8][25] } {/theRegisters/\registers_reg[8][26] } {/theRegisters/\registers_reg[8][27] } {/theRegisters/\registers_reg[8][28] } {/theRegisters/\registers_reg[8][29] } {/theRegisters/\registers_reg[8][2] } {/theRegisters/\registers_reg[8][30] } {/theRegisters/\registers_reg[8][31] } {/theRegisters/\registers_reg[8][3] } {/theRegisters/\registers_reg[8][4] } {/theRegisters/\registers_reg[8][5] } {/theRegisters/\registers_reg[8][6] } {/theRegisters/\registers_reg[8][7] } {/theRegisters/\registers_reg[8][8] } {/theRegisters/\registers_reg[8][9] } {/theRegisters/\registers_reg[9][0] } {/theRegisters/\registers_reg[9][10] } {/theRegisters/\registers_reg[9][11] } {/theRegisters/\registers_reg[9][12] } {/theRegisters/\registers_reg[9][13] } {/theRegisters/\registers_reg[9][14] } {/theRegisters/\registers_reg[9][15] } {/theRegisters/\registers_reg[9][16] } {/theRegisters/\registers_reg[9][17] } {/theRegisters/\registers_reg[9][18] } {/theRegisters/\registers_reg[9][19] } {/theRegisters/\registers_reg[9][1] } {/theRegisters/\registers_reg[9][20] } {/theRegisters/\registers_reg[9][21] } {/theRegisters/\registers_reg[9][22] } {/theRegisters/\registers_reg[9][23] } {/theRegisters/\registers_reg[9][24] } {/theRegisters/\registers_reg[9][25] } {/theRegisters/\registers_reg[9][26] } {/theRegisters/\registers_reg[9][27] } {/theRegisters/\registers_reg[9][28] } {/theRegisters/\registers_reg[9][29] } {/theRegisters/\registers_reg[9][2] } {/theRegisters/\registers_reg[9][30] } {/theRegisters/\registers_reg[9][31] } {/theRegisters/\registers_reg[9][3] } {/theRegisters/\registers_reg[9][4] } {/theRegisters/\registers_reg[9][5] } {/theRegisters/\registers_reg[9][6] } {/theRegisters/\registers_reg[9][7] } {/theRegisters/\registers_reg[9][8] } {/theRegisters/\registers_reg[9][9] } " -si_connections "SI_4 " -so_connections "SO_4 " -chain_count 1
// sub-command: analyze_scan_chains
// Chain allocation of 'unwrapped' mode completed:
// 4 distributed chains of size 256
// sub-command: insert_test_logic -write_in_tsdb on
=============================
Test Logic Insertion Summary:
=============================
Structural Data:
----------------
Added top-level port count: 0
Added instance count: 8
Logical Data:
-------------
Added retiming logic count: 4
Added scan chain count (unwrapped): 4
// Warning: Flattened model deleted.
//
// Writing out netlist and related files in /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/tsdb_outdir/dft_inserted_designs/cpu_Scan_0.dft_inserted_design
// sub-command: report_scan_chains
===============================
Scan Chains Created by the Tool
===============================
Scan mode 'unwrapped' scan chains:
----------------------------------
Cluster 'scanChain_1' chains:
-----------------------------
chain = scanChain_1 group = dummy input = /SI_1 output = /SO_1 length = 256
Cluster 'scanChain_2' chains:
-----------------------------
chain = scanChain_2 group = dummy input = /SI_2 output = /SO_2 length = 256
Cluster 'scanChain_3' chains:
-----------------------------
chain = scanChain_3 group = dummy input = /SI_3 output = /SO_3 length = 256
Cluster 'scanChain_4' chains:
-----------------------------
chain = scanChain_4 group = dummy input = /SI_4 output = /SO_4 length = 256
// sub-command: write_scan_order /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/cpu.scandef -use_escaping_rule Lefdef -replace
// sub-command: write_design -output_file /users/projekte/projekt01/RISC-V_w_RAM-Macros_single_clock/oasys.tessent.00/Scan_0/post_scan.v -replace
// command: exit
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