DfT/riscv_rtl/run.do
2026-05-29 10:19:13 +02:00

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if [file exists "work"] {vdel -all}
vlib work
# Comment out either the SystemVerilog or VHDL DUT.
# There can be only one!
# VHDL DUT
#vcom -f rtl_flist.f
vlog -sv dummz_memgen_16.sv
# SystemVerilog DUT
vlog -sv -lint -pedanticerrors -f rtl_flist.f
vopt work.cpu -o cpu_opt +acc -pedanticerrors
quit