Selbst erstellte Altium Lib hochgeladen

This commit is contained in:
Julian Rico
2021-10-11 17:01:14 +02:00
parent 6dc6f66e64
commit e413666b16
41 changed files with 1021 additions and 0 deletions
+16
View File
@@ -0,0 +1,16 @@
### Altium ###
# Previews Folders
**/__Previews/
# History Folders
**/History/*
# Project Logs
Project Logs*/
# Auto-conversion notices
*.PcbDoc.htm
# Access lock file for dbLib sources
**/*.ldb
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T€T€#v 2 s k  €#v 2 s k  €#v 2 s k  €#v 2 s k €#v 2 s k €#v 2 s k  €#v 2 s k €#v 2 s k  €#v 2 s k  €#v 2 s k  €#v 2 s k €#v 2 s k €#v 2 s k  €#v 2 s k € €# €7 8€78  €7 8€78 €78€78€78€# €78€78 €78€78€7 8€7 8€78 €# €78€7€8€7€7 8€7 €7 €8 €7 €7 €78€8€8€8€# €78€8€7 8 €8 €7 €7 €7 €7 €7 €7 €8 €7 €7 €7 €7 €7 €# €78€8€# €78€8€8€8€8€8€8€8 €7€8€8€8€8€8€8€8€# €78€8€# €7 8€8€7€8€T €
@@ -0,0 +1,22 @@
----------------------------------------------------------------------------------------------------------------------------------
NCDrill File Report For: Platine.PcbDoc 02.08.2021 23:43:27
----------------------------------------------------------------------------------------------------------------------------------
Layer Pair : Top Layer to Bottom Layer
ASCII RoundHoles File : Platine.TXT
EIA File : Platine.DRL
Tool Hole Size Hole Tolerance Hole Type Hole Count Plated Tool Travel
----------------------------------------------------------------------------------------------------------------------------------
T1 28mil (0.711mm) Round 7 PTH 0.00inch (0.00mm)
T2 30mil (0.762mm) Round 7 PTH 0.00inch (0.00mm)
T3 32mil (0.8mm) Round 14 PTH 0.00inch (0.00mm)
T4 35mil (0.9mm) Round 16 PTH 0.00inch (0.00mm)
T5 39mil (1mm) Round 2 PTH 0.00inch (0.00mm)
T6 40mil (1.016mm) Round 16 PTH 0.00inch (0.00mm)
T7 47mil (1.2mm) Round 2 PTH 0.00inch (0.00mm)
T8 114mil (2.9mm) Round 4 NPTH 0.00inch (0.00mm)
----------------------------------------------------------------------------------------------------------------------------------
Totals 68
Total Processing Time (hh:mm:ss) : 00:00:00
@@ -0,0 +1,18 @@
------------------------------------------------------------------------------------------
Gerber File Extension Report For: Platine.GBR 02.08.2021 23:43:26
------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------
Layer Extension Layer Description
------------------------------------------------------------------------------------------
.GTO Top Overlay
.GTP Top Paste
.GTS Top Solder
.GTL Top Layer
.GBL Bottom Layer
.GBS Bottom Solder
.GBP Bottom Paste
.GBO Bottom Overlay
.GM1 Mechanical 1
------------------------------------------------------------------------------------------
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,16 @@
G04*
G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,21.5.1 (32)*
G04*
G04 Layer_Color=32896*
%FSLAX25Y25*%
%MOIN*%
G70*
G04*
G04 #@! TF.SameCoordinates,6B47F07E-1737-4CAB-AE6A-8125E67B32FB*
G04*
G04*
G04 #@! TF.FilePolarity,Positive*
G04*
G01*
G75*
M02*
@@ -0,0 +1,16 @@
G04*
G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,21.5.1 (32)*
G04*
G04 Layer_Color=128*
%FSLAX25Y25*%
%MOIN*%
G70*
G04*
G04 #@! TF.SameCoordinates,6B47F07E-1737-4CAB-AE6A-8125E67B32FB*
G04*
G04*
G04 #@! TF.FilePolarity,Positive*
G04*
G01*
G75*
M02*
@@ -0,0 +1,168 @@
G04*
G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,21.5.1 (32)*
G04*
G04 Layer_Color=16711935*
%FSLAX25Y25*%
%MOIN*%
G70*
G04*
G04 #@! TF.SameCoordinates,6B47F07E-1737-4CAB-AE6A-8125E67B32FB*
G04*
G04*
G04 #@! TF.FilePolarity,Negative*
G04*
G01*
G75*
%ADD30C,0.06706*%
%ADD31C,0.06800*%
%ADD32C,0.05131*%
%ADD33C,0.08674*%
%ADD34R,0.06706X0.06706*%
%ADD35C,0.07874*%
%ADD36C,0.12217*%
%ADD37C,0.05800*%
D30*
X16913Y55245D02*
D03*
Y43434D02*
D03*
X254331Y36614D02*
D03*
Y117323D02*
D03*
X433366Y57441D02*
D03*
X321240Y113740D02*
D03*
X331240D02*
D03*
X341240D02*
D03*
X351240D02*
D03*
X361240D02*
D03*
X371240D02*
D03*
X311240Y143740D02*
D03*
X321240D02*
D03*
X331240D02*
D03*
X341240D02*
D03*
X351240D02*
D03*
X361240D02*
D03*
X371240D02*
D03*
X433366Y25492D02*
D03*
D31*
X235433Y100394D02*
D03*
X79528Y67716D02*
D03*
X26913Y43434D02*
D03*
Y55245D02*
D03*
X293791Y76272D02*
D03*
X380421Y35917D02*
D03*
X433366Y47441D02*
D03*
Y15492D02*
D03*
X342126Y126870D02*
D03*
X385531Y75984D02*
D03*
X435039Y72835D02*
D03*
X94488Y102362D02*
D03*
Y92362D02*
D03*
Y82362D02*
D03*
Y72362D02*
D03*
Y62362D02*
D03*
Y52362D02*
D03*
Y42362D02*
D03*
Y32362D02*
D03*
X184488Y102362D02*
D03*
Y92362D02*
D03*
Y82362D02*
D03*
Y72362D02*
D03*
Y62362D02*
D03*
Y52362D02*
D03*
Y42362D02*
D03*
Y32362D02*
D03*
D32*
X57500Y63779D02*
D03*
X42500D02*
D03*
X50000D02*
D03*
Y93307D02*
D03*
X57500D02*
D03*
X42500D02*
D03*
D33*
X433563Y143425D02*
D03*
Y123622D02*
D03*
D34*
X311240Y113740D02*
D03*
D35*
X22441Y72953D02*
D03*
Y82953D02*
D03*
D36*
X412598Y27953D02*
D03*
Y125591D02*
D03*
X40157D02*
D03*
Y27953D02*
D03*
D37*
X392309Y111457D02*
D03*
X392618Y26378D02*
D03*
X277264Y108760D02*
D03*
X441823Y101575D02*
D03*
X253740Y97342D02*
D03*
X382283Y59842D02*
D03*
X387274Y55135D02*
D03*
M02*
@@ -0,0 +1,25 @@
G04*
G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,21.5.1 (32)*
G04*
G04 Layer_Color=16711935*
%FSLAX25Y25*%
%MOIN*%
G70*
G04*
G04 #@! TF.SameCoordinates,6B47F07E-1737-4CAB-AE6A-8125E67B32FB*
G04*
G04*
G04 #@! TF.FilePolarity,Positive*
G04*
G01*
G75*
%ADD11C,0.01000*%
D11*
Y153543D01*
X452756Y0D02*
Y153543D01*
X0Y0D02*
X452756D01*
X0Y153543D02*
X452756D01*
M02*
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,122 @@
G04*
G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,21.5.1 (32)*
G04*
G04 Layer_Color=8421504*
%FSLAX25Y25*%
%MOIN*%
G70*
G04*
G04 #@! TF.SameCoordinates,6B47F07E-1737-4CAB-AE6A-8125E67B32FB*
G04*
G04*
G04 #@! TF.FilePolarity,Positive*
G04*
G01*
G75*
%ADD18R,0.01969X0.02362*%
%ADD19R,0.06693X0.03740*%
%ADD20R,0.04331X0.06693*%
%ADD21R,0.03740X0.06693*%
%ADD22R,0.02165X0.02362*%
%ADD23O,0.09055X0.02362*%
D18*
X424902Y110236D02*
D03*
X432382D02*
D03*
X428642Y102362D02*
D03*
D19*
X388779Y136024D02*
D03*
Y125000D02*
D03*
X170866Y107087D02*
D03*
Y118110D02*
D03*
X418504Y60532D02*
D03*
Y71555D02*
D03*
X105118Y118110D02*
D03*
Y107087D02*
D03*
D20*
X344291Y67402D02*
D03*
X355709D02*
D03*
X344291Y57008D02*
D03*
X355709D02*
D03*
X344291Y77795D02*
D03*
X355709D02*
D03*
X344291Y88189D02*
D03*
X355709D02*
D03*
Y46614D02*
D03*
X344291D02*
D03*
Y36220D02*
D03*
X355709D02*
D03*
D21*
X379528Y98425D02*
D03*
X390551D02*
D03*
D22*
X435237Y93406D02*
D03*
Y96752D02*
D03*
X428347Y93405D02*
D03*
Y96752D02*
D03*
X442126Y93406D02*
D03*
Y96752D02*
D03*
D23*
X371063Y89547D02*
D03*
Y84547D02*
D03*
Y79547D02*
D03*
Y74547D02*
D03*
Y69547D02*
D03*
Y64547D02*
D03*
Y59547D02*
D03*
Y54547D02*
D03*
X406890Y89547D02*
D03*
Y84547D02*
D03*
Y79547D02*
D03*
Y74547D02*
D03*
Y69547D02*
D03*
Y64547D02*
D03*
Y59547D02*
D03*
Y54547D02*
D03*
M02*
@@ -0,0 +1,274 @@
G04*
G04 #@! TF.GenerationSoftware,Altium Limited,Altium Designer,21.5.1 (32)*
G04*
G04 Layer_Color=8388736*
%FSLAX25Y25*%
%MOIN*%
G70*
G04*
G04 #@! TF.SameCoordinates,6B47F07E-1737-4CAB-AE6A-8125E67B32FB*
G04*
G04*
G04 #@! TF.FilePolarity,Negative*
G04*
G01*
G75*
%ADD24R,0.07493X0.04540*%
%ADD25R,0.05131X0.07493*%
%ADD26R,0.04540X0.07493*%
%ADD27R,0.02965X0.03162*%
%ADD28O,0.09855X0.03162*%
%ADD29R,0.02362X0.02756*%
%ADD30C,0.06706*%
%ADD31C,0.06800*%
%ADD32C,0.05131*%
%ADD33C,0.08674*%
%ADD34R,0.06706X0.06706*%
%ADD35C,0.07874*%
%ADD36C,0.12217*%
%ADD37C,0.05800*%
D24*
X388779Y136024D02*
D03*
Y125000D02*
D03*
X170866Y107087D02*
D03*
Y118110D02*
D03*
X418504Y60532D02*
D03*
Y71555D02*
D03*
X105118Y118110D02*
D03*
Y107087D02*
D03*
D25*
X344291Y67402D02*
D03*
X355709D02*
D03*
X344291Y57008D02*
D03*
X355709D02*
D03*
X344291Y77795D02*
D03*
X355709D02*
D03*
X344291Y88189D02*
D03*
X355709D02*
D03*
Y46614D02*
D03*
X344291D02*
D03*
Y36220D02*
D03*
X355709D02*
D03*
D26*
X379528Y98425D02*
D03*
X390551D02*
D03*
D27*
X435237Y93406D02*
D03*
Y96752D02*
D03*
X428347Y93405D02*
D03*
Y96752D02*
D03*
X442126Y93406D02*
D03*
Y96752D02*
D03*
D28*
X371063Y89547D02*
D03*
Y84547D02*
D03*
Y79547D02*
D03*
Y74547D02*
D03*
Y69547D02*
D03*
Y64547D02*
D03*
Y59547D02*
D03*
Y54547D02*
D03*
X406890Y89547D02*
D03*
Y84547D02*
D03*
Y79547D02*
D03*
Y74547D02*
D03*
Y69547D02*
D03*
Y64547D02*
D03*
Y59547D02*
D03*
Y54547D02*
D03*
D29*
X428642Y102362D02*
D03*
X424902Y110236D02*
D03*
X432382D02*
D03*
D30*
X16913Y55245D02*
D03*
Y43434D02*
D03*
X254331Y36614D02*
D03*
Y117323D02*
D03*
X433366Y57441D02*
D03*
X321240Y113740D02*
D03*
X331240D02*
D03*
X341240D02*
D03*
X351240D02*
D03*
X361240D02*
D03*
X371240D02*
D03*
X311240Y143740D02*
D03*
X321240D02*
D03*
X331240D02*
D03*
X341240D02*
D03*
X351240D02*
D03*
X361240D02*
D03*
X371240D02*
D03*
X433366Y25492D02*
D03*
D31*
X235433Y100394D02*
D03*
X79528Y67716D02*
D03*
X26913Y43434D02*
D03*
Y55245D02*
D03*
X293791Y76272D02*
D03*
X380421Y35917D02*
D03*
X433366Y47441D02*
D03*
Y15492D02*
D03*
X342126Y126870D02*
D03*
X385531Y75984D02*
D03*
X435039Y72835D02*
D03*
X94488Y102362D02*
D03*
Y92362D02*
D03*
Y82362D02*
D03*
Y72362D02*
D03*
Y62362D02*
D03*
Y52362D02*
D03*
Y42362D02*
D03*
Y32362D02*
D03*
X184488Y102362D02*
D03*
Y92362D02*
D03*
Y82362D02*
D03*
Y72362D02*
D03*
Y62362D02*
D03*
Y52362D02*
D03*
Y42362D02*
D03*
Y32362D02*
D03*
D32*
X57500Y63779D02*
D03*
X42500D02*
D03*
X50000D02*
D03*
Y93307D02*
D03*
X57500D02*
D03*
X42500D02*
D03*
D33*
X433563Y143425D02*
D03*
Y123622D02*
D03*
D34*
X311240Y113740D02*
D03*
D35*
X22441Y72953D02*
D03*
Y82953D02*
D03*
D36*
X412598Y27953D02*
D03*
Y125591D02*
D03*
X40157D02*
D03*
Y27953D02*
D03*
D37*
X392309Y111457D02*
D03*
X392618Y26378D02*
D03*
X277264Y108760D02*
D03*
X441823Y101575D02*
D03*
X253740Y97342D02*
D03*
X382283Y59842D02*
D03*
X387274Y55135D02*
D03*
M02*
@@ -0,0 +1,2 @@
Layer Pairs Export File for PCB: C:\Users\Julian\Documents\Git Repositories\SS21_PRA\Platine.PcbDoc
LayersSetName=Top_Bot_Thru_Holes|DrillFile=platine.txt|DrillLayers=gtl,gbl
@@ -0,0 +1,176 @@
*************************************************************
FileName = Platine.GBR
AutoAperture = True
*************************************************************
Generating : Mechanical 1
File : Platine.GM1
Adding Layer : Mechanical 1
Used DCodes :
D11
*************************************************************
*************************************************************
Generating : Bottom Overlay
File : Platine.GBO
Adding Layer : Bottom Overlay
Used DCodes :
*************************************************************
*************************************************************
Generating : Bottom Paste
File : Platine.GBP
Adding Layer : Bottom Paste
Adding Layer : Bottom Layer
Adding Layer : Multi-Layer
Used DCodes :
*************************************************************
*************************************************************
Generating : Bottom Solder
File : Platine.GBS
Adding Layer : Bottom Solder
Adding Layer : Bottom Layer
Adding Layer : Multi-Layer
Used DCodes :
D30
D31
D32
D33
D34
D35
D36
D37
*************************************************************
*************************************************************
Generating : Top Solder
File : Platine.GTS
Adding Layer : Top Solder
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
*************************************************************
*************************************************************
Generating : Top Paste
File : Platine.GTP
Adding Layer : Top Paste
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D18
D19
D20
D21
D22
D23
*************************************************************
*************************************************************
Generating : Top Overlay
File : Platine.GTO
Adding Layer : Top Overlay
Used DCodes :
D10
D11
D12
D13
D14
D15
D16
D17
*************************************************************
*************************************************************
Generating : Bottom Layer
File : Platine.GBL
Adding Layer : Bottom Layer
Adding Layer : Multi-Layer
Used DCodes :
D10
D11
D35
D38
D39
D40
D41
D42
D43
D44
*************************************************************
*************************************************************
Generating : Top Layer
File : Platine.GTL
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D10
D11
D19
D20
D21
D22
D23
D29
D35
D38
D39
D40
D41
D42
D43
D44
*************************************************************
@@ -0,0 +1,5 @@
DRC Rules Export File for PCB: C:\Users\Julian\Documents\Git Repositories\SS21_PRA\Platine.PcbDoc
RuleKind=SolderMaskExpansion|RuleName=SolderMaskExpansion|Scope=Board|Minimum=4.00
RuleKind=Width|RuleName=Width|Scope=Board|Minimum=10.00
RuleKind=Clearance|RuleName=Clearance|Scope=Board|Minimum=10.00
RuleKind=ShortCircuit|RuleName=ShortCircuit|Scope=Board|Allowed=0
@@ -0,0 +1,92 @@
M48
;Layer_Color=9474304
;FILE_FORMAT=2:5
INCH,TZ
;TYPE=PLATED
T1F00S00C0.02800
T2F00S00C0.03000
T3F00S00C0.03150
T4F00S00C0.03543
T5F00S00C0.03937
T6F00S00C0.04000
T7F00S00C0.04724
;TYPE=NON_PLATED
T8F00S00C0.11417
%
T01
X253740Y97342
X277264Y108760
X392309Y111457
X441823Y101575
X387274Y55135
X382283Y59842
X392618Y26378
T02
X79528Y67716
X235433Y100394
X293791Y76272
X385531Y75984
X380421Y35917
X435039Y72835
X342126Y126870
T03
X16913Y43434
X26913
Y55245
X16913
X42500Y63779
X50000
X57500
Y93307
X50000
X42500
X433366Y57441
Y47441
Y25492
Y15492
T04
X254331Y36614
Y117323
X311240Y113740
Y143740
X321240
X331240
X341240
X351240
X361240
X371240
Y113740
X361240
X351240
X341240
X331240
X321240
T05
X22441Y72953
Y82953
T06
X94488Y32362
Y42362
Y52362
Y62362
Y72362
Y82362
Y92362
Y102362
X184488
Y92362
Y82362
Y72362
Y62362
Y52362
Y42362
Y32362
T07
X433563Y123622
Y143425
T08
X40157Y27953
Y125591
X412598
Y27953
M30
@@ -0,0 +1,35 @@
D10 ROUNDED 11.811 11.811 0.000 LINE 0.000
D11 ROUNDED 10.000 10.000 0.000 LINE 0.000
D12 ROUNDED 20.000 20.000 0.000 LINE 0.000
D13 ROUNDED 7.874 7.874 0.000 LINE 0.000
D14 ROUNDED 9.842 9.842 0.000 LINE 0.000
D15 ROUNDED 23.622 23.622 0.000 LINE 0.000
D16 ROUNDED 5.906 5.906 0.000 LINE 0.000
D17 ROUNDED 8.000 8.000 0.000 LINE 0.000
D18 RECTANGULAR 19.686 23.622 0.000 FLASH 0.000
D19 RECTANGULAR 66.929 37.402 0.000 FLASH 0.000
D20 RECTANGULAR 66.929 43.307 0.000 FLASH 90.000
D21 RECTANGULAR 66.929 37.402 0.000 FLASH 90.000
D22 RECTANGULAR 21.654 23.622 0.000 FLASH 180.000
D23 ROUNDED 23.622 90.551 0.000 FLASH 270.000
D24 RECTANGULAR 74.929 45.402 0.000 FLASH 0.000
D25 RECTANGULAR 74.929 51.307 0.000 FLASH 90.000
D26 RECTANGULAR 74.929 45.402 0.000 FLASH 90.000
D27 RECTANGULAR 29.654 31.622 0.000 FLASH 180.000
D28 ROUNDED 31.622 98.551 0.000 FLASH 270.000
D29 RECTANGULAR 27.559 23.622 0.000 FLASH 270.000
D30 ROUNDED 67.055 67.055 0.000 FLASH 0.000
D31 ROUNDED 68.000 68.000 0.000 FLASH 0.000
D32 ROUNDED 51.307 51.307 0.000 FLASH 0.000
D33 ROUNDED 86.740 86.740 0.000 FLASH 0.000
D34 RECTANGULAR 67.055 67.055 0.000 FLASH 90.000
D35 ROUNDED 78.740 78.740 0.000 FLASH 0.000
D36 ROUNDED 122.173 122.173 0.000 FLASH 0.000
D37 ROUNDED 58.000 58.000 0.000 FLASH 0.000
D38 ROUNDED 13.780 13.780 0.000 LINE 0.000
D39 ROUNDED 59.055 59.055 0.000 FLASH 0.000
D40 ROUNDED 60.000 60.000 0.000 FLASH 0.000
D41 ROUNDED 43.307 43.307 0.000 FLASH 0.000
D42 RECTANGULAR 59.055 59.055 0.000 FLASH 90.000
D43 ROUNDED 114.173 114.173 0.000 FLASH 0.000
D44 ROUNDED 50.000 50.000 0.000 FLASH 0.000
@@ -0,0 +1,13 @@
Output: Drill_Files
Type : NC Drill
From : PCB Document [Platine.PcbDoc]
Generated File[Platine.TXT]
Generated File[Platine.DRL]
Generated File[Platine.LDP]
Generated File[Platine.DRR]
Files Generated : 4
Documents Printed : 0
Finished Output Generation At 23:43:27 On 02.08.2021
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,14 @@
Project Outputs Generation Report
---------------------------------
Start Output Generation At 23:43:17 On 02.08.2021
Output: STEP_model
Type : ExportSTEP
From : Variant [[No Variations]] of PCB Document [Platine.PcbDoc]
Generated File[Model_SS21_PRA.step]
Files Generated : 1
Documents Printed : 0
Finished Output Generation At 23:43:23 On 02.08.2021
File diff suppressed because it is too large Load Diff
+1
View File
@@ -0,0 +1 @@
Record=TopLevelDocument|FileName=Schaltplan.SchDoc|SheetNumber=1
Binary file not shown.