new matlab stateflow

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/FSMTreppe.cpp

@@ -0,0 +1,304 @@
+//
+// Academic License - for use in teaching, academic research, and meeting
+// course requirements at degree granting institutions only.  Not for
+// government, commercial, or other organizational use.
+//
+// File: FSMTreppe.cpp
+//
+// Code generated for Simulink model 'FSMTreppe'.
+//
+// Model version                  : 1.64
+// Simulink Coder version         : 9.5 (R2021a) 14-Nov-2020
+// C/C++ source code generated on : Tue Sep  7 08:38:51 2021
+//
+// Target selection: ert.tlc
+// Embedded hardware selection: ARM Compatible->ARM Cortex-M
+// Code generation objectives: Unspecified
+// Validation result: Not run
+//
+#include "FSMTreppe.h"
+#include "FSMTreppe_private.h"
+
+// Named constants for Chart: '<Root>/FSMTreppe'
+const uint8_T FSMTreppe_IN_abdimmen_hoch = 1U;
+const uint8_T FSMTreppe_IN_abdimmen_ldr = 2U;
+const uint8_T FSMTreppe_IN_abdimmen_runter = 3U;
+const uint8_T FSMTreppe_IN_aufdimmen_hoch = 4U;
+const uint8_T FSMTreppe_IN_aufdimmen_ldr = 5U;
+const uint8_T FSMTreppe_IN_aufdimmen_runter = 6U;
+const uint8_T FSMTreppe_IN_dimm_regelung = 7U;
+const uint8_T FSMTreppe_IN_inaktiv = 8U;
+const uint8_T FSMTreppe_IN_ruhezustand = 9U;
+const uint8_T FSMTreppe_IN_warten_hoch = 10U;
+const uint8_T FSMTreppe_IN_warten_runter = 11U;
+
+// Model step function
+void FSMTreppeModelClass::step()
+{
+  // Chart: '<Root>/FSMTreppe' incorporates:
+  //   Inport: '<Root>/anim_beendet'
+  //   Inport: '<Root>/ldr_changed'
+  //   Inport: '<Root>/ldr_schwelle'
+  //   Inport: '<Root>/sensor_oben'
+  //   Inport: '<Root>/sensor_unten'
+
+  if (FSMTreppe_DW.temporalCounter_i1 < 511U) {
+    FSMTreppe_DW.temporalCounter_i1 = static_cast<uint16_T>
+      (FSMTreppe_DW.temporalCounter_i1 + 1U);
+  }
+
+  if (FSMTreppe_DW.is_active_c3_FSMTreppe == 0U) {
+    FSMTreppe_DW.is_active_c3_FSMTreppe = 1U;
+    FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_inaktiv;
+
+    // Outport: '<Root>/status'
+    FSMTreppe_Y.status = 0U;
+  } else {
+    switch (FSMTreppe_DW.is_c3_FSMTreppe) {
+     case FSMTreppe_IN_abdimmen_hoch:
+      // Outport: '<Root>/dimmrichtung'
+      FSMTreppe_Y.dimmrichtung = 0U;
+
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 6U;
+      if ((FSMTreppe_U.anim_beendet == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_ruhezustand;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 3U;
+      }
+      break;
+
+     case FSMTreppe_IN_abdimmen_ldr:
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 2U;
+
+      // Outport: '<Root>/dimmrichtung'
+      FSMTreppe_Y.dimmrichtung = 0U;
+      if ((FSMTreppe_U.anim_beendet == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_inaktiv;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 0U;
+      }
+      break;
+
+     case FSMTreppe_IN_abdimmen_runter:
+      // Outport: '<Root>/dimmrichtung'
+      FSMTreppe_Y.dimmrichtung = 0U;
+
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 9U;
+      if ((FSMTreppe_U.anim_beendet == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_ruhezustand;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 3U;
+      }
+      break;
+
+     case FSMTreppe_IN_aufdimmen_hoch:
+      // Outport: '<Root>/laufrichtung'
+      FSMTreppe_Y.laufrichtung = 1U;
+
+      // Outport: '<Root>/dimmrichtung'
+      FSMTreppe_Y.dimmrichtung = 1U;
+
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 4U;
+      if ((FSMTreppe_U.anim_beendet == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_warten_hoch;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 5U;
+      }
+      break;
+
+     case FSMTreppe_IN_aufdimmen_ldr:
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 1U;
+
+      // Outport: '<Root>/dimmrichtung'
+      FSMTreppe_Y.dimmrichtung = 1U;
+      if ((FSMTreppe_U.anim_beendet == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_ruhezustand;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 3U;
+      }
+      break;
+
+     case FSMTreppe_IN_aufdimmen_runter:
+      // Outport: '<Root>/laufrichtung'
+      FSMTreppe_Y.laufrichtung = 0U;
+
+      // Outport: '<Root>/dimmrichtung'
+      FSMTreppe_Y.dimmrichtung = 1U;
+
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 7U;
+      if ((FSMTreppe_U.anim_beendet == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_warten_runter;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 8U;
+      }
+      break;
+
+     case FSMTreppe_IN_dimm_regelung:
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 10U;
+      if ((FSMTreppe_DW.temporalCounter_i1 >= 500U) || (FSMTreppe_U.anim_beendet
+           == 1U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_ruhezustand;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 3U;
+      }
+      break;
+
+     case FSMTreppe_IN_inaktiv:
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 0U;
+      if (FSMTreppe_U.ldr_schwelle == 1U) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_aufdimmen_ldr;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 1U;
+
+        // Outport: '<Root>/dimmrichtung'
+        FSMTreppe_Y.dimmrichtung = 1U;
+      }
+      break;
+
+     case FSMTreppe_IN_ruhezustand:
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 3U;
+      if (FSMTreppe_U.sensor_unten == 1U) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_aufdimmen_hoch;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/laufrichtung'
+        FSMTreppe_Y.laufrichtung = 1U;
+
+        // Outport: '<Root>/dimmrichtung'
+        FSMTreppe_Y.dimmrichtung = 1U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 4U;
+      } else if (FSMTreppe_U.sensor_oben == 1U) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_aufdimmen_runter;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/laufrichtung'
+        FSMTreppe_Y.laufrichtung = 0U;
+
+        // Outport: '<Root>/dimmrichtung'
+        FSMTreppe_Y.dimmrichtung = 1U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 7U;
+      } else if (FSMTreppe_U.ldr_schwelle == 0U) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_abdimmen_ldr;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 2U;
+
+        // Outport: '<Root>/dimmrichtung'
+        FSMTreppe_Y.dimmrichtung = 0U;
+      } else if (FSMTreppe_U.ldr_changed == 1.0) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_dimm_regelung;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 10U;
+      }
+      break;
+
+     case FSMTreppe_IN_warten_hoch:
+      // Outport: '<Root>/status'
+      FSMTreppe_Y.status = 5U;
+      if ((FSMTreppe_U.sensor_oben == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_abdimmen_hoch;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/dimmrichtung'
+        FSMTreppe_Y.dimmrichtung = 0U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 6U;
+      }
+      break;
+
+     default:
+      // Outport: '<Root>/status'
+      // case IN_warten_runter:
+      FSMTreppe_Y.status = 8U;
+      if ((FSMTreppe_U.sensor_unten == 1U) || (FSMTreppe_DW.temporalCounter_i1 >=
+           500U)) {
+        FSMTreppe_DW.is_c3_FSMTreppe = FSMTreppe_IN_abdimmen_runter;
+        FSMTreppe_DW.temporalCounter_i1 = 0U;
+
+        // Outport: '<Root>/dimmrichtung'
+        FSMTreppe_Y.dimmrichtung = 0U;
+
+        // Outport: '<Root>/status'
+        FSMTreppe_Y.status = 9U;
+      }
+      break;
+    }
+  }
+
+  // End of Chart: '<Root>/FSMTreppe'
+}
+
+// Model initialize function
+void FSMTreppeModelClass::initialize()
+{
+  // (no initialization code required)
+}
+
+// Model terminate function
+void FSMTreppeModelClass::terminate()
+{
+  // (no terminate code required)
+}
+
+// Constructor
+FSMTreppeModelClass::FSMTreppeModelClass() :
+  FSMTreppe_DW(),
+  FSMTreppe_U(),
+  FSMTreppe_Y(),
+  FSMTreppe_M()
+{
+  // Currently there is no constructor body generated.
+}
+
+// Destructor
+FSMTreppeModelClass::~FSMTreppeModelClass()
+{
+  // Currently there is no destructor body generated.
+}
+
+// Real-Time Model get method
+FSMTreppeModelClass::RT_MODEL_FSMTreppe_T * FSMTreppeModelClass::getRTM()
+{
+  return (&FSMTreppe_M);
+}
+
+//
+// File trailer for generated code.
+//
+// [EOF]
+//

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/FSMTreppe.h

@@ -0,0 +1,140 @@
+//
+// Academic License - for use in teaching, academic research, and meeting
+// course requirements at degree granting institutions only.  Not for
+// government, commercial, or other organizational use.
+//
+// File: FSMTreppe.h
+//
+// Code generated for Simulink model 'FSMTreppe'.
+//
+// Model version                  : 1.64
+// Simulink Coder version         : 9.5 (R2021a) 14-Nov-2020
+// C/C++ source code generated on : Tue Sep  7 08:38:51 2021
+//
+// Target selection: ert.tlc
+// Embedded hardware selection: ARM Compatible->ARM Cortex-M
+// Code generation objectives: Unspecified
+// Validation result: Not run
+//
+#ifndef RTW_HEADER_FSMTreppe_h_
+#define RTW_HEADER_FSMTreppe_h_
+#include "rtwtypes.h"
+#include "FSMTreppe_types.h"
+
+// Macros for accessing real-time model data structure
+#ifndef rtmGetErrorStatus
+#define rtmGetErrorStatus(rtm)         ((rtm)->errorStatus)
+#endif
+
+#ifndef rtmSetErrorStatus
+#define rtmSetErrorStatus(rtm, val)    ((rtm)->errorStatus = (val))
+#endif
+
+// Class declaration for model FSMTreppe
+class FSMTreppeModelClass {
+  // public data and function members
+ public:
+  // Block states (default storage) for system '<Root>'
+  struct DW_FSMTreppe_T {
+    uint16_T temporalCounter_i1;       // '<Root>/FSMTreppe'
+    uint8_T is_active_c3_FSMTreppe;    // '<Root>/FSMTreppe'
+    uint8_T is_c3_FSMTreppe;           // '<Root>/FSMTreppe'
+  };
+
+  // External inputs (root inport signals with default storage)
+  struct ExtU_FSMTreppe_T {
+    uint32_T sensor_unten;             // '<Root>/sensor_unten'
+    uint32_T sensor_oben;              // '<Root>/sensor_oben'
+    uint32_T anim_beendet;             // '<Root>/anim_beendet'
+    uint32_T ldr_schwelle;             // '<Root>/ldr_schwelle'
+    real_T ldr_changed;                // '<Root>/ldr_changed'
+  };
+
+  // External outputs (root outports fed by signals with default storage)
+  struct ExtY_FSMTreppe_T {
+    uint32_T laufrichtung;             // '<Root>/laufrichtung'
+    uint32_T status;                   // '<Root>/status'
+    uint32_T dimmrichtung;             // '<Root>/dimmrichtung'
+  };
+
+  // Real-time Model Data Structure
+  struct RT_MODEL_FSMTreppe_T {
+    const char_T * volatile errorStatus;
+  };
+
+  // model initialize function
+  void initialize();
+
+  // model step function
+  void step();
+
+  // model terminate function
+  void terminate();
+
+  // Constructor
+  FSMTreppeModelClass();
+
+  // Destructor
+  ~FSMTreppeModelClass();
+
+  // Root-level structure-based inputs set method
+
+  // Root inports set method
+  void setExternalInputs(const ExtU_FSMTreppe_T* pExtU_FSMTreppe_T)
+  {
+    FSMTreppe_U = *pExtU_FSMTreppe_T;
+  }
+
+  // Root-level structure-based outputs get method
+
+  // Root outports get method
+  const FSMTreppeModelClass::ExtY_FSMTreppe_T & getExternalOutputs() const
+  {
+    return FSMTreppe_Y;
+  }
+
+  // Real-Time Model get method
+  FSMTreppeModelClass::RT_MODEL_FSMTreppe_T * getRTM();
+
+  // private data and function members
+ private:
+  // Block states
+  DW_FSMTreppe_T FSMTreppe_DW;
+
+  // External inputs
+  ExtU_FSMTreppe_T FSMTreppe_U;
+
+  // External outputs
+  ExtY_FSMTreppe_T FSMTreppe_Y;
+
+  // Real-Time Model
+  RT_MODEL_FSMTreppe_T FSMTreppe_M;
+};
+
+//-
+//  The generated code includes comments that allow you to trace directly
+//  back to the appropriate location in the model.  The basic format
+//  is <system>/block_name, where system is the system number (uniquely
+//  assigned by Simulink) and block_name is the name of the block.
+//
+//  Note that this particular code originates from a subsystem build,
+//  and has its own system numbers different from the parent model.
+//  Refer to the system hierarchy for this subsystem below, and use the
+//  MATLAB hilite_system command to trace the generated code back
+//  to the parent model.  For example,
+//
+//  hilite_system('FSM_Treppenlicht/FSMTreppe')    - opens subsystem FSM_Treppenlicht/FSMTreppe
+//  hilite_system('FSM_Treppenlicht/FSMTreppe/Kp') - opens and selects block Kp
+//
+//  Here is the system hierarchy for this model
+//
+//  '<Root>' : 'FSM_Treppenlicht'
+//  '<S1>'   : 'FSM_Treppenlicht/FSMTreppe'
+
+#endif                                 // RTW_HEADER_FSMTreppe_h_
+
+//
+// File trailer for generated code.
+//
+// [EOF]
+//

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/FSMTreppe_private.h

@@ -0,0 +1,28 @@
+//
+// Academic License - for use in teaching, academic research, and meeting
+// course requirements at degree granting institutions only.  Not for
+// government, commercial, or other organizational use.
+//
+// File: FSMTreppe_private.h
+//
+// Code generated for Simulink model 'FSMTreppe'.
+//
+// Model version                  : 1.64
+// Simulink Coder version         : 9.5 (R2021a) 14-Nov-2020
+// C/C++ source code generated on : Tue Sep  7 08:38:51 2021
+//
+// Target selection: ert.tlc
+// Embedded hardware selection: ARM Compatible->ARM Cortex-M
+// Code generation objectives: Unspecified
+// Validation result: Not run
+//
+#ifndef RTW_HEADER_FSMTreppe_private_h_
+#define RTW_HEADER_FSMTreppe_private_h_
+#include "rtwtypes.h"
+#endif                                 // RTW_HEADER_FSMTreppe_private_h_
+
+//
+// File trailer for generated code.
+//
+// [EOF]
+//

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/FSMTreppe_types.h

@@ -0,0 +1,29 @@
+//
+// Academic License - for use in teaching, academic research, and meeting
+// course requirements at degree granting institutions only.  Not for
+// government, commercial, or other organizational use.
+//
+// File: FSMTreppe_types.h
+//
+// Code generated for Simulink model 'FSMTreppe'.
+//
+// Model version                  : 1.64
+// Simulink Coder version         : 9.5 (R2021a) 14-Nov-2020
+// C/C++ source code generated on : Tue Sep  7 08:38:51 2021
+//
+// Target selection: ert.tlc
+// Embedded hardware selection: ARM Compatible->ARM Cortex-M
+// Code generation objectives: Unspecified
+// Validation result: Not run
+//
+#ifndef RTW_HEADER_FSMTreppe_types_h_
+#define RTW_HEADER_FSMTreppe_types_h_
+
+// Model Code Variants
+#endif                                 // RTW_HEADER_FSMTreppe_types_h_
+
+//
+// File trailer for generated code.
+//
+// [EOF]
+//

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/defines.txt

@@ -0,0 +1,14 @@
+MODEL=FSMTreppe
+NUMST=1
+NCSTATES=0
+HAVESTDIO
+MODEL_HAS_DYNAMICALLY_LOADED_SFCNS=0
+CLASSIC_INTERFACE=0
+ALLOCATIONFCN=0
+TID01EQ=0
+TERMFCN=1
+ONESTEPFCN=1
+MAT_FILE=0
+MULTI_INSTANCE_CODE=1
+INTEGER_CODE=0
+MT=0

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/ert_main.cpp

@@ -0,0 +1,109 @@
+//
+// Academic License - for use in teaching, academic research, and meeting
+// course requirements at degree granting institutions only.  Not for
+// government, commercial, or other organizational use.
+//
+// File: ert_main.cpp
+//
+// Code generated for Simulink model 'FSMTreppe'.
+//
+// Model version                  : 1.64
+// Simulink Coder version         : 9.5 (R2021a) 14-Nov-2020
+// C/C++ source code generated on : Tue Sep  7 08:38:51 2021
+//
+// Target selection: ert.tlc
+// Embedded hardware selection: ARM Compatible->ARM Cortex-M
+// Code generation objectives: Unspecified
+// Validation result: Not run
+//
+#include <stddef.h>
+#include <stdio.h>                // This ert_main.c example uses printf/fflush
+#include "FSMTreppe.h"                 // Model's header file
+#include "rtwtypes.h"
+
+static FSMTreppeModelClass FSMTreppe_Obj;// Instance of model class
+
+//
+// Associating rt_OneStep with a real-time clock or interrupt service routine
+// is what makes the generated code "real-time".  The function rt_OneStep is
+// always associated with the base rate of the model.  Subrates are managed
+// by the base rate from inside the generated code.  Enabling/disabling
+// interrupts and floating point context switches are target specific.  This
+// example code indicates where these should take place relative to executing
+// the generated code step function.  Overrun behavior should be tailored to
+// your application needs.  This example simply sets an error status in the
+// real-time model and returns from rt_OneStep.
+//
+void rt_OneStep(void);
+void rt_OneStep(void)
+{
+  static boolean_T OverrunFlag = false;
+
+  // Disable interrupts here
+
+  // Check for overrun
+  if (OverrunFlag) {
+    rtmSetErrorStatus(FSMTreppe_Obj.getRTM(), "Overrun");
+    return;
+  }
+
+  OverrunFlag = true;
+
+  // Save FPU context here (if necessary)
+  // Re-enable timer or interrupt here
+  // Set model inputs here
+
+  // Step the model
+  FSMTreppe_Obj.step();
+
+  // Get model outputs here
+
+  // Indicate task complete
+  OverrunFlag = false;
+
+  // Disable interrupts here
+  // Restore FPU context here (if necessary)
+  // Enable interrupts here
+}
+
+//
+// The example "main" function illustrates what is required by your
+// application code to initialize, execute, and terminate the generated code.
+// Attaching rt_OneStep to a real-time clock is target specific.  This example
+// illustrates how you do this relative to initializing the model.
+//
+int_T main(int_T argc, const char *argv[])
+{
+  // Unused arguments
+  (void)(argc);
+  (void)(argv);
+
+  // Initialize model
+  FSMTreppe_Obj.initialize();
+
+  // Attach rt_OneStep to a timer or interrupt service routine with
+  //  period 0.01 seconds (the model's base sample time) here.  The
+  //  call syntax for rt_OneStep is
+  //
+  //   rt_OneStep();
+
+  printf("Warning: The simulation will run forever. "
+         "Generated ERT main won't simulate model step behavior. "
+         "To change this behavior select the 'MAT-file logging' option.\n");
+  fflush((NULL));
+  while (rtmGetErrorStatus(FSMTreppe_Obj.getRTM()) == (NULL)) {
+    //  Perform other application tasks here
+  }
+
+  // Disable rt_OneStep() here
+
+  // Terminate model
+  FSMTreppe_Obj.terminate();
+  return 0;
+}
+
+//
+// File trailer for generated code.
+//
+// [EOF]
+//

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/modelsources.txt

@@ -0,0 +1,2 @@
+  FSMTreppe.cpp
+

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/rtw_proj.tmw

@@ -0,0 +1,4 @@
+Simulink Coder project for FSMTreppe using . MATLAB root = C:\Program Files\MATLAB\R2021a. SimStruct date: 15-Nov-2020 02:10:14
+This file is generated by Simulink Coder for use by the make utility
+to determine when to rebuild objects when the name of the current Simulink Coder project changes.
+The rtwinfomat located at: ..\slprj\ert\FSMTreppe\tmwinternal\binfo.mat

lib/treppe/MatLabSrc/FSMTreppe_ert_rtw/rtwtypes.h

@@ -0,0 +1,160 @@
+//
+// Academic License - for use in teaching, academic research, and meeting
+// course requirements at degree granting institutions only.  Not for
+// government, commercial, or other organizational use.
+//
+// File: rtwtypes.h
+//
+// Code generated for Simulink model 'FSMTreppe'.
+//
+// Model version                  : 1.64
+// Simulink Coder version         : 9.5 (R2021a) 14-Nov-2020
+// C/C++ source code generated on : Tue Sep  7 08:38:51 2021
+//
+// Target selection: ert.tlc
+// Embedded hardware selection: ARM Compatible->ARM Cortex-M
+// Code generation objectives: Unspecified
+// Validation result: Not run
+//
+
+#ifndef RTWTYPES_H
+#define RTWTYPES_H
+
+// Logical type definitions
+#if (!defined(__cplusplus))
+#ifndef false
+#define false                          (0U)
+#endif
+
+#ifndef true
+#define true                           (1U)
+#endif
+#endif
+
+//=======================================================================*
+//  Target hardware information
+//    Device type: ARM Compatible->ARM Cortex-M
+//    Number of bits:     char:   8    short:   16    int:  32
+//                        long:  32
+//                        native word size:  32
+//    Byte ordering: LittleEndian
+//    Signed integer division rounds to: Zero
+//    Shift right on a signed integer as arithmetic shift: on
+// =======================================================================
+
+//=======================================================================*
+//  Fixed width word size data types:                                     *
+//    int8_T, int16_T, int32_T     - signed 8, 16, or 32 bit integers     *
+//    uint8_T, uint16_T, uint32_T  - unsigned 8, 16, or 32 bit integers   *
+//    real32_T, real64_T           - 32 and 64 bit floating point numbers *
+// =======================================================================
+typedef signed char int8_T;
+typedef unsigned char uint8_T;
+typedef short int16_T;
+typedef unsigned short uint16_T;
+typedef int int32_T;
+typedef unsigned int uint32_T;
+typedef float real32_T;
+typedef double real64_T;
+
+//===========================================================================*
+//  Generic type definitions: boolean_T, char_T, byte_T, int_T, uint_T,       *
+//                            real_T, time_T, ulong_T.                        *
+// ===========================================================================
+typedef double real_T;
+typedef double time_T;
+typedef unsigned char boolean_T;
+typedef int int_T;
+typedef unsigned int uint_T;
+typedef unsigned long ulong_T;
+typedef char char_T;
+typedef unsigned char uchar_T;
+typedef char_T byte_T;
+
+//===========================================================================*
+//  Complex number type definitions                                           *
+// ===========================================================================
+#define CREAL_T
+
+typedef struct {
+  real32_T re;
+  real32_T im;
+} creal32_T;
+
+typedef struct {
+  real64_T re;
+  real64_T im;
+} creal64_T;
+
+typedef struct {
+  real_T re;
+  real_T im;
+} creal_T;
+
+#define CINT8_T
+
+typedef struct {
+  int8_T re;
+  int8_T im;
+} cint8_T;
+
+#define CUINT8_T
+
+typedef struct {
+  uint8_T re;
+  uint8_T im;
+} cuint8_T;
+
+#define CINT16_T
+
+typedef struct {
+  int16_T re;
+  int16_T im;
+} cint16_T;
+
+#define CUINT16_T
+
+typedef struct {
+  uint16_T re;
+  uint16_T im;
+} cuint16_T;
+
+#define CINT32_T
+
+typedef struct {
+  int32_T re;
+  int32_T im;
+} cint32_T;
+
+#define CUINT32_T
+
+typedef struct {
+  uint32_T re;
+  uint32_T im;
+} cuint32_T;
+
+//=======================================================================*
+//  Min and Max:                                                          *
+//    int8_T, int16_T, int32_T     - signed 8, 16, or 32 bit integers     *
+//    uint8_T, uint16_T, uint32_T  - unsigned 8, 16, or 32 bit integers   *
+// =======================================================================
+#define MAX_int8_T                     ((int8_T)(127))
+#define MIN_int8_T                     ((int8_T)(-128))
+#define MAX_uint8_T                    ((uint8_T)(255U))
+#define MAX_int16_T                    ((int16_T)(32767))
+#define MIN_int16_T                    ((int16_T)(-32768))
+#define MAX_uint16_T                   ((uint16_T)(65535U))
+#define MAX_int32_T                    ((int32_T)(2147483647))
+#define MIN_int32_T                    ((int32_T)(-2147483647-1))
+#define MAX_uint32_T                   ((uint32_T)(0xFFFFFFFFU))
+
+// Block D-Work pointer type
+typedef void * pointer_T;
+
+#endif                                 // RTWTYPES_H
+
+//
+// File trailer for generated code.
+//
+// [EOF]
+//

lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/FSMTreppe_rtw.tlc

@@ -0,0 +1,49 @@
+%implements "machineSource" "C"
+%function CacheMachineDefinitions(block,system) void
+%openfile tmpFcnBuf
+%closefile tmpFcnBuf
+%<SLibCacheCodeToFile("sf_machine_data_defn",tmpFcnBuf)>\
+
+%endfunction
+%function DumpMachineInitializer(block) Output
+
+%openfile tmpFcnBuf
+
+%closefile tmpFcnBuf
+%if !WHITE_SPACE(tmpFcnBuf)
+
+  /* Machine initializer */
+  %<tmpFcnBuf>\
+%endif
+%endfunction
+%function GlobalMachineInitializer(block) void
+  %openfile tmpFcnBuf
+  %<DumpMachineInitializer(block)>\
+  %closefile tmpFcnBuf
+  %return tmpFcnBuf              
+%endfunction %% GlobalMachineInitializer
+
+%function DumpMachineTerminator(block) Output
+%openfile tmpFcnBuf
+
+%closefile tmpFcnBuf
+%if !WHITE_SPACE(tmpFcnBuf)
+
+  /* Machine initializer */
+  %<tmpFcnBuf>\
+%endif
+%endfunction
+%function GlobalMachineTerminator(block) void
+  %openfile tmpFcnBuf
+  %<DumpMachineTerminator(block)>\
+  %closefile tmpFcnBuf
+  %return tmpFcnBuf              
+%endfunction %% GlobalMachineTerminator
+
+%function CacheMachineFunctions(block,system) void
+  %openfile tmpFcnBuf
+            
+            
+  %closefile tmpFcnBuf
+  %<SLibCacheCodeToFile("sf_machine_fcn_defn",tmpFcnBuf)>
+%endfunction

lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/FSMTreppe_rtw.tlh

@@ -0,0 +1,40 @@
+%implements "machineHeader" "C"
+%function CacheOutputs(block,system) void
+ %assign srcFileName = SLibGetFullFileNameForSystemCode("sys_src_incl", system.SystemIdx)
+%openfile typedefsBuf   
+            
+%closefile typedefsBuf
+%<SLibCacheCodeToFile("sf_machine_typedef",typedefsBuf)>
+%if !WHITE_SPACE(typedefsBuf)
+  %<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_typedef"))>
+%endif
+%openfile definesBuf   
+%closefile definesBuf
+%<SLibCacheCodeToFile("sf_machine_data_define",definesBuf)>
+%if !WHITE_SPACE(definesBuf)
+  %<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_data_define"))>
+%endif
+%openfile externDataBuf
+%closefile externDataBuf
+%<SLibCacheCodeToFile("sf_machine_extern_data_decl",externDataBuf)>
+%if !WHITE_SPACE(externDataBuf)
+  %<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_extern_data_decl"))>
+%endif
+%openfile externDataBuf
+%closefile externDataBuf
+%<SLibCacheCodeToFile("sf_machine_public_extern_data_decl",externDataBuf)>
+%if !WHITE_SPACE(externDataBuf)
+  %<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_public_extern_data_decl"))>
+%endif
+%openfile externDataBuf
+
+            
+            
+%closefile externDataBuf
+%<SLibCacheCodeToFile("sf_machine_extern_fcn_decl",externDataBuf)>
+%if !WHITE_SPACE(externDataBuf)
+  %<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_extern_fcn_decl"))>
+%endif
+%endfunction %% CacheOutputs
+ 
+

lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/c3_FSMTreppe.tlc

@@ -0,0 +1,39 @@
+%implements "chartSource" "C"
+%function ChartConfig(block, system) void
+  %createrecord chartConfiguration { ...
+          executeAtInitialization  0 ...
+  }
+  %return chartConfiguration
+%endfunction
+%function ChartDataMap(block, system) void
+  %createrecord ChartDataElements {\
+    NumChartData   3 \
+    ChartDataDefaults {\
+      RecordType   "ChartData"\
+      Dimensions   []\
+      IsTestPoint  0\
+    }\
+    ChartData {\
+      Name         "is_active_c3_FSMTreppe"\
+      Description  "StateIsActive"\
+      SFName       ""\
+      Path         ""\
+      SrcLocation  ""\
+    }\
+    ChartData {\
+      Name         "is_c3_FSMTreppe"\
+      Description  "StateActiveChild"\
+      SFName       ""\
+      Path         ""\
+      SrcLocation  ""\
+    }\
+    ChartData {\
+      Name         "temporalCounter_i1"\
+      Description  "TemporalCounter"\
+      SFName       ""\
+      Path         ""\
+      SrcLocation  ""\
+    }\
+  }
+  %return ChartDataElements
+%endfunction

lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/c3_FSMTreppe.tlh

@@ -0,0 +1 @@
+

lib/treppe/MatLabSrc/slprj/ert/FSMTreppe/tmwinternal/CompileInfo.xml

@@ -0,0 +1,368 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<MF0 version="1.1" packageUris="http://schema.mathworks.com/mf0/ci/19700101 http://schema.mathworks.com/mf0/sl_modelref_info/R2021a http://schema.mathworks.com/mf0/slexec_mm_sto/R2021a_202007071525">
+  <ModelRefInfoRepo.ModelRefInfoRoot type="ModelRefInfoRepo.ModelRefInfoRoot" uuid="7555d04e-b2fe-446f-9fe1-318583822c6f">
+    <autoSolverStatusFlags>327</autoSolverStatusFlags>
+    <childModelRefInfo type="ModelRefInfoRepo.ChildModelRefInfo" uuid="03f2a4ea-5cb0-4e3f-90a0-dd0e1805a761">
+      <modelName>FSMTreppe</modelName>
+      <modelPath>FSMTreppe</modelPath>
+    </childModelRefInfo>
+    <dataTransferInfos>AAFJTQAAAAAOAAAAOAAAAAYAAAAIAAAAAgAAAAAAAAAFAAAACAAAAAAAAAABAAAAAQAAAAAAAAAFAAQAAQAAAAEAAAAAAAAA</dataTransferInfos>
+    <fundamentalSampleTimePeriod>.01</fundamentalSampleTimePeriod>
+    <hasBlockWithPeriodicDiscreteSampleTime>true</hasBlockWithPeriodicDiscreteSampleTime>
+    <hasBwsAccessed>true</hasBwsAccessed>
+    <hasBwsAccessedByAnyModel>true</hasBwsAccessedByAnyModel>
+    <hasStatesModifiedInOutputUpdate>true</hasStatesModifiedInOutputUpdate>
+    <inports type="ModelRefInfoRepo.InportInformation" uuid="96dc434b-7559-48bc-809e-c4e76148958a">
+      <isNotDerivPort>true</isNotDerivPort>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <indexType>2</indexType>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="b7c3a0c2-0424-4f2c-ad98-6946e41cc9c6"/>
+    </inports>
+    <inports type="ModelRefInfoRepo.InportInformation" uuid="b6a4a316-d1eb-44ef-b08e-641a6afda1e1">
+      <isNotDerivPort>true</isNotDerivPort>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <indexType>2</indexType>
+      <originalPortNumber>1</originalPortNumber>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="418561e6-ffb5-470a-90d9-f15eff4f4f30"/>
+    </inports>
+    <inports type="ModelRefInfoRepo.InportInformation" uuid="3aa6343e-6d39-42af-9615-9947972bdfcd">
+      <isNotDerivPort>true</isNotDerivPort>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <indexType>2</indexType>
+      <originalPortNumber>2</originalPortNumber>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="1b16866b-129a-4603-9f13-4830178f2710"/>
+    </inports>
+    <inports type="ModelRefInfoRepo.InportInformation" uuid="bffcdc1c-176a-4f58-b0cc-c190848613c0">
+      <isNotDerivPort>true</isNotDerivPort>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <indexType>2</indexType>
+      <originalPortNumber>3</originalPortNumber>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="44a75dc2-a909-4071-8714-05eeb6859d93"/>
+    </inports>
+    <inports type="ModelRefInfoRepo.InportInformation" uuid="0c897dc9-dc8f-4173-b90a-dc2578d10b7c">
+      <isNotDerivPort>true</isNotDerivPort>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <indexType>2</indexType>
+      <originalPortNumber>4</originalPortNumber>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="d5424f81-ff3d-4ba3-8e39-3f31745085c5"/>
+    </inports>
+    <isBdInSimModeForSimCodegenVariants>false</isBdInSimModeForSimCodegenVariants>
+    <isInlineParamsOn>true</isInlineParamsOn>
+    <isOrigInportVirtualBus>false</isOrigInportVirtualBus>
+    <isOrigInportVirtualBus>false</isOrigInportVirtualBus>
+    <isOrigInportVirtualBus>false</isOrigInportVirtualBus>
+    <isOrigInportVirtualBus>false</isOrigInportVirtualBus>
+    <isOrigInportVirtualBus>false</isOrigInportVirtualBus>
+    <isOrigOutportVirtualBus>false</isOrigOutportVirtualBus>
+    <isOrigOutportVirtualBus>false</isOrigOutportVirtualBus>
+    <isOrigOutportVirtualBus>false</isOrigOutportVirtualBus>
+    <loggingSaveFormat>2</loggingSaveFormat>
+    <maxFreqHz>-1.0</maxFreqHz>
+    <numDataInputPorts>5</numDataInputPorts>
+    <numLoggableJacobianDStates>0</numLoggableJacobianDStates>
+    <origInportBusType></origInportBusType>
+    <origInportBusType></origInportBusType>
+    <origInportBusType></origInportBusType>
+    <origInportBusType></origInportBusType>
+    <origInportBusType></origInportBusType>
+    <origOutportBusOutputAsStruct>false</origOutportBusOutputAsStruct>
+    <origOutportBusOutputAsStruct>false</origOutportBusOutputAsStruct>
+    <origOutportBusOutputAsStruct>false</origOutportBusOutputAsStruct>
+    <origOutportBusType></origOutportBusType>
+    <origOutportBusType></origOutportBusType>
+    <origOutportBusType></origOutportBusType>
+    <outports type="ModelRefInfoRepo.OutportInformation" uuid="10253844-4a79-4779-8d8d-a5ec80db828b">
+      <hasSystemInitMethod>true</hasSystemInitMethod>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="52063b6d-7cc4-4c8b-8d92-d1715afbe8e2"/>
+    </outports>
+    <outports type="ModelRefInfoRepo.OutportInformation" uuid="11796f98-a0b7-4eb0-b64e-49bf2ffe978d">
+      <hasSystemInitMethod>true</hasSystemInitMethod>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <originalPortNumber>1</originalPortNumber>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="21f58345-79e5-4411-9eef-d114196a5e0e"/>
+    </outports>
+    <outports type="ModelRefInfoRepo.OutportInformation" uuid="f8910c79-7cff-4166-b02d-97bf6428b343">
+      <hasSystemInitMethod>true</hasSystemInitMethod>
+      <designMax>Inf</designMax>
+      <designMin>-Inf</designMin>
+      <originalPortNumber>2</originalPortNumber>
+      <rateInfo type="ModelRefInfoRepo.RateInfo">
+        <compiled>true</compiled>
+        <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+        <period>.01</period>
+        <priority>40</priority>
+        <rateIdx>0</rateIdx>
+      </rateInfo>
+      <resolvedSignalObject></resolvedSignalObject>
+      <sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="c2674bf4-ac65-4b69-823e-fac5a85b7dc0"/>
+    </outports>
+    <removeResetFunc>true</removeResetFunc>
+    <runtimeNonFcnCallRateInfos type="ModelRefInfoRepo.RateInfo">
+      <compiled>true</compiled>
+      <nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
+      <period>.01</period>
+      <priority>40</priority>
+      <rateIdx>0</rateIdx>
+    </runtimeNonFcnCallRateInfos>
+    <sampleTimeInheritanceRule>2</sampleTimeInheritanceRule>
+    <timingAndTaskingRegistry>&lt;?xml version=&quot;1.0&quot;?&gt;
+&lt;slexec_sto version=&quot;1.1&quot; packageUris=&quot;http://schema.mathworks.com/mf0/slexec_mm_sto/R2021a_202007071525&quot;&gt;
+  &lt;sto.Registry type=&quot;sto.Registry&quot; uuid=&quot;ba7c0a74-67aa-483e-8150-1c7f77bd4db1&quot;&gt;
+    &lt;clocks type=&quot;sto.Timer&quot; uuid=&quot;588e59c8-3f1f-47d4-8b44-94c98d3a35a5&quot;&gt;
+      &lt;computedFundamentalDiscretePeriod&gt;.01&lt;/computedFundamentalDiscretePeriod&gt;
+      &lt;resolution&gt;.01&lt;/resolution&gt;
+      &lt;clockTickConstraint&gt;PeriodicWithFixedResolution&lt;/clockTickConstraint&gt;
+      &lt;specifiedTaskingMode&gt;ClassicMultiTasking&lt;/specifiedTaskingMode&gt;
+      &lt;timeAdvanceMode&gt;FixedStep&lt;/timeAdvanceMode&gt;
+      &lt;clockDomain type=&quot;sto.ClockDomain&quot; uuid=&quot;5f4d6ed0-4e4d-479f-9712-7cf4da42ed97&quot;&gt;
+        &lt;baseTaskID&gt;_task0&lt;/baseTaskID&gt;
+        &lt;rates type=&quot;sto.Rate&quot; uuid=&quot;d24609d5-a5fb-4db3-9540-ed0b011f0b3a&quot;/&gt;
+        &lt;rootTaskHierarchyElements type=&quot;sto.Task&quot; uuid=&quot;29015274-7e5f-4a50-819e-621bfb182f06&quot;&gt;
+          &lt;isExecutable&gt;true&lt;/isExecutable&gt;
+          &lt;orderIndex&gt;1&lt;/orderIndex&gt;
+          &lt;rates type=&quot;sto.Rate&quot; uuid=&quot;d24609d5-a5fb-4db3-9540-ed0b011f0b3a&quot;&gt;
+            &lt;annotation&gt;D1&lt;/annotation&gt;
+            &lt;colorIndex&gt;2&lt;/colorIndex&gt;
+            &lt;description&gt;Discrete 1&lt;/description&gt;
+            &lt;eventSourceType&gt;UNSPECIFIED_EVENT_SOURCE&lt;/eventSourceType&gt;
+            &lt;registry type=&quot;sto.Registry&quot; uuid=&quot;ba7c0a74-67aa-483e-8150-1c7f77bd4db1&quot;/&gt;
+            &lt;taskId&gt;_task0&lt;/taskId&gt;
+            &lt;rateSpec type=&quot;sto.RateSpec&quot; uuid=&quot;3191e5c3-988f-4441-8cc9-a9d20920c22d&quot;&gt;
+              &lt;period&gt;.01&lt;/period&gt;
+              &lt;rateType&gt;ClassicPeriodicDiscrete&lt;/rateType&gt;
+            &lt;/rateSpec&gt;
+          &lt;/rates&gt;
+          &lt;elementType&gt;Task&lt;/elementType&gt;
+          &lt;identifier&gt;_task0&lt;/identifier&gt;
+          &lt;priority&gt;40&lt;/priority&gt;
+        &lt;/rootTaskHierarchyElements&gt;
+      &lt;/clockDomain&gt;
+    &lt;/clocks&gt;
+    &lt;executionSpec&gt;Undetermined&lt;/executionSpec&gt;
+    &lt;taskDependencyGraph type=&quot;sto.SerializedTaskConnectionList&quot; uuid=&quot;ee1864fc-d534-42ce-aec5-7292148af732&quot;&gt;
+      &lt;taskIdentifier&gt;_task0&lt;/taskIdentifier&gt;
+    &lt;/taskDependencyGraph&gt;
+    &lt;taskPriorityDirection&gt;HighNumberLast&lt;/taskPriorityDirection&gt;
+    &lt;taskingMode&gt;ClassicMultiTasking&lt;/taskingMode&gt;
+    &lt;tasks type=&quot;sto.Task&quot; uuid=&quot;29015274-7e5f-4a50-819e-621bfb182f06&quot;/&gt;
+    &lt;timeAdvanceMode&gt;FixedStep&lt;/timeAdvanceMode&gt;
+  &lt;/sto.Registry&gt;
+&lt;/slexec_sto&gt;</timingAndTaskingRegistry>
+    <zeroInternalMemoryAtStartupUnchecked>true</zeroInternalMemoryAtStartupUnchecked>
+    <FMUBlockMap type="ModelRefInfoRepo.FMUBlockInfo" uuid="2dd4025f-9351-4e7c-9074-0e7aa39cdf36"/>
+    <codeGenInfo type="ModelRefInfoRepo.CodeGenInformation" uuid="2e133251-5287-43b2-9b4a-5389aafb25f2"/>
+    <configSettingsForConsistencyChecks type="ModelRefInfoRepo.ConfigSettingsForConsistencyChecks" uuid="6546012e-563f-4082-866c-56b3b4442d30">
+      <consistentOutportInitialization>true</consistentOutportInitialization>
+      <fixedStepSize>.01</fixedStepSize>
+      <hasHybridSampleTime>true</hasHybridSampleTime>
+      <optimizedInitCode>true</optimizedInitCode>
+      <signalLoggingSaveFormat>2</signalLoggingSaveFormat>
+      <simSIMDOptimization>1</simSIMDOptimization>
+      <solverName>FixedStepDiscrete</solverName>
+      <solverType>SOLVER_TYPE_FIXEDSTEP</solverType>
+      <hardwareSettings type="ModelRefInfoRepo.HardwareSettings" uuid="eb5a4b10-25e9-40c6-bb62-c40e4583ea06">
+        <prodBitPerChar>8</prodBitPerChar>
+        <prodBitPerDouble>64</prodBitPerDouble>
+        <prodBitPerFloat>32</prodBitPerFloat>
+        <prodBitPerInt>32</prodBitPerInt>
+        <prodBitPerLong>32</prodBitPerLong>
+        <prodBitPerLongLong>64</prodBitPerLongLong>
+        <prodBitPerPointer>32</prodBitPerPointer>
+        <prodBitPerPtrDiffT>32</prodBitPerPtrDiffT>
+        <prodBitPerShort>16</prodBitPerShort>
+        <prodBitPerSizeT>32</prodBitPerSizeT>
+        <prodEndianess>1</prodEndianess>
+        <prodLargestAtomicFloat>1</prodLargestAtomicFloat>
+        <prodLargestAtomicInteger>3</prodLargestAtomicInteger>
+        <prodShiftRight>true</prodShiftRight>
+        <prodWordSize>32</prodWordSize>
+      </hardwareSettings>
+    </configSettingsForConsistencyChecks>
+    <controllableInputRatesMap type="ModelRefInfoRepo.VarTsUIDMap" uuid="e700b233-60b9-4bae-a176-4252a98ea9df"/>
+    <controllableOutputRatesMap type="ModelRefInfoRepo.VarTsUIDMap" uuid="d6389860-36b9-4d36-ab76-159980d60dc2"/>
+    <dataPortGroup type="ModelRefInfoRepo.DataPortGroup" uuid="0f8667e7-fe6e-4660-a547-82a75ba80f86">
+      <compDataInputPorts>0</compDataInputPorts>
+      <compDataInputPorts>1</compDataInputPorts>
+      <compDataInputPorts>2</compDataInputPorts>
+      <compDataInputPorts>3</compDataInputPorts>
+      <compDataInputPorts>4</compDataInputPorts>
+      <compDataOutputPorts>0</compDataOutputPorts>
+      <compDataOutputPorts>1</compDataOutputPorts>
+      <compDataOutputPorts>2</compDataOutputPorts>
+      <dataInputPorts>0</dataInputPorts>
+      <dataInputPorts>1</dataInputPorts>
+      <dataInputPorts>2</dataInputPorts>
+      <dataInputPorts>3</dataInputPorts>
+      <dataInputPorts>4</dataInputPorts>
+      <dataOutputPorts>0</dataOutputPorts>
+      <dataOutputPorts>1</dataOutputPorts>
+      <dataOutputPorts>2</dataOutputPorts>
+    </dataPortGroup>
+    <expFcnUnconnectedDataPortGroup type="ModelRefInfoRepo.DataPortGroup" uuid="54f645f4-7048-4a7a-bdba-987f462f9049"/>
+    <interfaceParameterInfo type="ModelRefInfoRepo.InterfaceParameterInfo" uuid="f3ffe881-fe0f-4380-b6d4-fc2904df6735"/>
+    <messageInfo type="ModelRefInfoRepo.MessageInformation" uuid="417f8bab-9c4c-43fe-bb6c-a5fa82a05f7d"/>
+    <methodInfo type="ModelRefInfoRepo.MethodExistenceInfo" uuid="1742a0ba-e6d5-4884-aeac-07757b6c68df">
+      <hasEnableMethod>true</hasEnableMethod>
+      <hasSystemInitializeMethod>true</hasSystemInitializeMethod>
+      <hasSystemResetMethod>true</hasSystemResetMethod>
+      <hasTerminateMethod>true</hasTerminateMethod>
+    </methodInfo>
+    <periodicEventPortUnsupportedBlockInfo type="ModelRefInfoRepo.PeriodicEventPortUnsupportedBlockInfo" uuid="ac9bb6a2-0700-4ee3-9008-5e19e55c5010"/>
+    <portGroupsRequireSameRate type="ModelRefInfoRepo.PortGroupsRequireSameRate" uuid="ece8d6c3-f133-445b-a473-3082ea4d0485">
+      <DSMPortGroups type="ModelRefInfoRepo.NameToPortGroupIdxVectMap" uuid="55bbc064-14a3-480d-b127-7ab64cafc98e"/>
+      <GlobalDSMPortGroups type="ModelRefInfoRepo.NameToPortGroupIdxVectMap" uuid="be54cdd0-e105-46b0-91c1-fb6def8fc679"/>
+      <mergedPortGroups type="ModelRefInfoRepo.NameToPortGroupIdxVectMap" uuid="1833b1af-1f19-40ab-84c0-7bccd46c9745"/>
+    </portGroupsRequireSameRate>
+    <rateBasedMdlGlobalDSMRateSpec type="ModelRefInfoRepo.GlobalDSMRateSpecMap" uuid="ffb0ca00-9662-40c0-84da-e487c5dc546e"/>
+    <rateSpecOfGlobalDSMAccessedByDescExpFcnMdlMap type="ModelRefInfoRepo.GlobalDSMRateSpecMap" uuid="eca8ad4f-0c38-46d9-9832-66b8d77ec8cb"/>
+    <rootBlockDiagramInterface type="ci.Model" uuid="a83d0372-6504-4aff-bc66-ef8bd8998783">
+      <p_RootComponentInterface type="ci.ComponentInterface" uuid="bda18f0d-f088-4d3e-9118-5ec3e1f6d2b0">
+        <p_InputPorts type="ci.SignalInterface" uuid="b99a5f21-4128-4029-938f-6ee457b0f36d">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+          <p_ComputedType>uint32</p_ComputedType>
+        </p_InputPorts>
+        <p_InputPorts type="ci.SignalInterface" uuid="6a5be651-5127-4b00-b1fe-7f037b420f72">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+          <p_ComputedType>uint32</p_ComputedType>
+        </p_InputPorts>
+        <p_InputPorts type="ci.SignalInterface" uuid="8786dad2-1d32-4804-bb88-db269c473b9e">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+          <p_ComputedType>uint32</p_ComputedType>
+        </p_InputPorts>
+        <p_InputPorts type="ci.SignalInterface" uuid="5b5c02c6-c37a-4d51-8f0e-5bf15e0a817d">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+          <p_ComputedType>uint32</p_ComputedType>
+        </p_InputPorts>
+        <p_InputPorts type="ci.SignalInterface" uuid="1f3758be-eeec-4263-8ac9-55386a85f6f2">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+        </p_InputPorts>
+        <p_Name>FSMTreppe</p_Name>
+        <p_OutputPorts type="ci.SignalInterface" uuid="b7ae01fb-67a8-499e-8dfb-a34ae83e9536">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+          <p_ComputedType>uint32</p_ComputedType>
+        </p_OutputPorts>
+        <p_OutputPorts type="ci.SignalInterface" uuid="3ba52f46-b991-4ffc-bbc2-dabf9138da2f">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+          <p_ComputedType>uint32</p_ComputedType>
+        </p_OutputPorts>
+        <p_OutputPorts type="ci.SignalInterface" uuid="2c8a0fdf-a813-4a6c-90ed-616b12e0372f">
+          <p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
+          <p_ComputedSampleTime>.01</p_ComputedSampleTime>
+          <p_ComputedSampleTime>0.0</p_ComputedSampleTime>
+          <p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
+          <p_ComputedType>uint32</p_ComputedType>
+        </p_OutputPorts>
+        <p_Type>ROOT</p_Type>
+      </p_RootComponentInterface>
+    </rootBlockDiagramInterface>
+    <simulinkFunctions type="ModelRefInfoRepo.SimulinkFunctions" uuid="51f47d31-bf69-45c2-9925-aa1697244457">
+      <compSimulinkFunctionCatalog></compSimulinkFunctionCatalog>
+    </simulinkFunctions>
+    <stateWriterToOwnerMap type="ModelRefInfoRepo.StateWriterInfo" uuid="a88190c0-15f9-4e52-a6ab-81ddfb811279"/>
+    <stoClientDataRegistry type="sto.ClientDataRegistry" uuid="2c8ac090-591a-44b7-9b7a-a7ac062c172d">
+      <dataSets type="sto.ClientClockNamedDataSet" uuid="5b0a4d1d-030d-4f88-9e9e-3e12190e42db">
+        <tag>sltpEvents</tag>
+      </dataSets>
+      <dataSets type="sto.ClientTaskHierarchyElementNamedDataSet" uuid="2d7a8ed4-f0bd-4eab-b498-23b0dbedc489">
+        <tag>sltpTaskGroups</tag>
+      </dataSets>
+      <dataSets type="sto.ClientTaskHierarchyElementNamedDataSet" uuid="c135ba12-cf4d-4052-8821-1c8c3030ce09">
+        <dSet type="ModelRefInfoRepo.SltpTaskData" uuid="d63284be-885e-4fb9-8db1-d89efe1107d9"/>
+        <tSet type="ModelRefInfoRepo.SltpTaskData" uuid="d63284be-885e-4fb9-8db1-d89efe1107d9">
+          <dataName>D1</dataName>
+          <linkedSet type="sto.ClientTaskHierarchyElementNamedDataSet" uuid="c135ba12-cf4d-4052-8821-1c8c3030ce09"/>
+          <id type="sto.TaskHierarchyElementId">
+            <id>_task0</id>
+          </id>
+        </tSet>
+        <tag>sltpTasks</tag>
+      </dataSets>
+    </stoClientDataRegistry>
+    <varTsUIDMap type="ModelRefInfoRepo.VarTsUIDMap" uuid="f0b6a5ce-69cc-4e9c-87e1-435ad3c8bcb8"/>
+  </ModelRefInfoRepo.ModelRefInfoRoot>
+</MF0>

lib/treppe/MatLabSrc/slprj/sl_proj.tmw

@@ -0,0 +1,2 @@
+Simulink Coder project marker file. Please don't change it. 
+slprjVersion: 10.3_086

lib/treppe/treppe.cpp

@@ -7,7 +7,10 @@
 */
 bool Treppe::dimmer_tick(dimmer_t *dimmer, bool dim_type) {
   dimmer->pwm += dimmer->delta_pwm;
+  
+#ifdef DIMMDEBUG
   Serial.printf("%.0f", dimmer->pwm);
+#endif
 
   if (dim_type == DIM_STUFEN) {
     pwmController.setChannelPWM(dimmer->stufe,
@@ -18,10 +21,14 @@ bool Treppe::dimmer_tick(dimmer_t *dimmer, bool dim_type) {
 
   dimmer->tick++;
   if (dimmer->tick < dimmer->ticks) {
+#ifdef DIMMDEBUG
     Serial.print("-");
+#endif
     return false;
   }
+#ifdef DIMMDEBUG
   Serial.println("");
+#endif
 
   if (dim_type == DIM_LDR) {
     Serial.printf("DIM_LDR: start: %d, ziel: %d\n", dimmer->start_pwm,
@@ -174,11 +181,9 @@ float Treppe::read_ldr() {
   */
   // float ldr_ohm = 37280.00 / analogRead(A0);
   float vol_adc = analogRead(A0) * 0.0036;
-  if(vol_adc > 3.29)
+  if(vol_adc > 3.29) // prevent negative values !
     vol_adc = 3.29;
-
   float ldr_ohm = 40.67 * (3.3 - vol_adc) / vol_adc;
-
   float ldr_value = 6526.6 / (ldr_ohm * ldr_ohm);
 #ifdef LDRDEBUG
   Serial.printf("vol_adc: %f Ohm: %f lux: %f Comp: %d\n", vol_adc, ldr_ohm, ldr_value,
@@ -187,18 +192,48 @@ float Treppe::read_ldr() {
   return ldr_value;
 }
 
-bool Treppe::check_ldr() {
-  static uint8_t active = 0;
+void Treppe::sample_ldr() {
+  ldr_average += read_ldr();
+  ldr_average_cnt++;
+  if(ldr_average_cnt > LDR_AVERAGE_SAMPLES) {
+    float ldr_avg = static_cast<float>(ldr_average / LDR_AVERAGE_SAMPLES);
+    Serial.printf("ldr_avg: %f schwelle: %d\n", ldr_avg, param.ldr_schwelle);
+    if(check_ldr(ldr_avg)) {
+      update_soll_pwm_with_ldr(ldr_avg);
+    }
+
+    ldr_average = 0.0;
+    ldr_average_cnt = 0;
+  }
+}
 
-  // follow up: averaging over many samples?
-  float ldr = read_ldr();
+void Treppe::update_soll_pwm_with_ldr(float ldr_avg) {
+  // LDR quasi linear :)
+/*
+  soll     ldr_average
+  ----  =  ------------
+  ist      ldr_schwelle
+*/
+  if(ldr_avg >= param.ldr_schwelle) {
+    return;
+  }
+  idle_pwm_soll = (1 - (ldr_avg / param.ldr_schwelle)) * param.idle_pwm_max;
+  Serial.printf("Update idle_pwm_soll_with_ldr: %d\n", idle_pwm_soll);
+
+  if(idle_pwm_ist != idle_pwm_soll)
+    fsm_pend.ldr_changed = true;
+}
 
-  if (ldr < param.ldr_schwelle) {
+bool Treppe::check_ldr(float ldr_avg) {
+  static uint8_t active = 0;
+  
+  if (ldr_avg < param.ldr_schwelle) {
     active = 1;
   }
-  if (ldr > param.ldr_schwelle + LDR_HYS) {
+  if (ldr_avg > param.ldr_schwelle + LDR_HYS) {
     active = 0;
   }
+  fsm_inputs.ldr_schwelle = active;
   return active;
 }
 
@@ -206,10 +241,7 @@ void Treppe::task() {
 #ifdef DEBUG_TIMING
   uint32_t m = micros();
 #endif
-
-  // TODO wenn LDR geändert => idle_pwm_soll anpassen
-  // fsm_pend.ldr_changed = true;
-  fsm_inputs.ldr_schwelle = check_ldr();
+  sample_ldr();
 
 #ifdef DEBUG_TIMING
   Serial.print("1:");
@@ -258,15 +290,23 @@ void Treppe::task() {
       fsm_pend.anim_beendet = dimmer_tick(&dimmer_stufen, DIM_STUFEN);
   } else if (fsm_outputs.status == ST_AUFDIMMEN_LDR ||
              fsm_outputs.status == ST_ABDIMMEN_LDR) {
-    if (fsm_pend.anim_beendet)
-      start_animation(&dimmer_ldr, DIM_LDR, idle_pwm_ist, 0);
+    if (fsm_pend.anim_beendet) {
+      start_animation(&dimmer_ldr, DIM_LDR, idle_pwm_soll, 0);
+      idle_pwm_ist = idle_pwm_soll;
+    }
     else
       fsm_pend.anim_beendet = dimmer_tick(&dimmer_ldr, DIM_LDR);
   } else if (fsm_outputs.status == ST_RUHEZUSTAND) {
     if (fsm_pend.ldr_changed) {
       fsm_pend.ldr_changed = false;
-      fsm_outputs.dimmrichtung = DR_AUFDIMMEN;
-      start_animation(&dimmer_ldr, DIM_LDR, idle_pwm_soll, idle_pwm_ist);
+      if(idle_pwm_soll < idle_pwm_ist) {
+        fsm_outputs.dimmrichtung = DR_ABDIMMEN;
+        start_animation(&dimmer_ldr, DIM_LDR, idle_pwm_ist, idle_pwm_soll);
+      }
+      else {
+        fsm_outputs.dimmrichtung = DR_AUFDIMMEN;
+        start_animation(&dimmer_ldr, DIM_LDR, idle_pwm_soll, idle_pwm_ist);
+      }
       idle_pwm_ist = idle_pwm_soll;
     }
     if (!fsm_pend.anim_beendet) {

lib/treppe/treppe.h

@@ -5,8 +5,9 @@
 #include "PCA9685.h"
 #include <EEPROM.h>
 
-#define LDRDEBUG  // comment in to override LDR measurement
+// #define LDRDEBUG  // comment in to override LDR measurement
 #define LDR_HYS 100 // Hysteresis for switching off FSM [lux]
+#define LDR_AVERAGE_SAMPLES 50
 
 #define SENSOR_OBEN 16
 #define SENSOR_UNTEN 12
@@ -34,7 +35,9 @@ private:
   stairway_param_t param_pend; // zwischenspeicher änderungen
   bool param_changed = false;
 
-  uint16_t idle_pwm_ist = param.idle_pwm_max;
+  float ldr_average = 0.0;
+  uint16_t ldr_average_cnt = 0;
+  uint16_t idle_pwm_ist = 0;
   uint16_t idle_pwm_soll = 0;
 
   struct fsm_pending_inputs_t {
@@ -94,7 +97,10 @@ private:
   /* LDR */
   bool read_sensor(int sensor);
   float read_ldr();
-  bool check_ldr();
+  void sample_ldr();
+
+  bool check_ldr(float ldr_avg);
+  void update_soll_pwm_with_ldr(float ldr_avg);
 
 public:
   Treppe(uint8_t _stufen) : stufen(_stufen) { FSMTreppe_Obj.initialize(); }