From 3c2c09f0b90118a2464874e293f0f672d9efd327 Mon Sep 17 00:00:00 2001 From: Simon Date: Wed, 9 Jun 2021 11:15:13 +0200 Subject: [PATCH] correct makefile error --- 4-bit-counter-cocotb/tests/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/4-bit-counter-cocotb/tests/Makefile b/4-bit-counter-cocotb/tests/Makefile index 8359ad6..190a467 100644 --- a/4-bit-counter-cocotb/tests/Makefile +++ b/4-bit-counter-cocotb/tests/Makefile @@ -32,7 +32,7 @@ TOPLEVEL_LANG ?= verilog PWD=$(shell pwd) ifeq ($(TOPLEVEL_LANG),verilog) - VERILOG_SOURCES = $(PWD)/../hdl/counter.sv + VERILOG_SOURCES = $(PWD)/../hdl/counter.v else ifeq ($(TOPLEVEL_LANG),vhdl) VHDL_SOURCES = $(PWD)/../hdl/counter.vhdl else