Loesung des Praktikums Systementwurf
- Bjarne Hoesch
- Bernhard Schoeffel
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- artifacts += data.py __pycache__
- CHECK_RESULTS = true
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- include ../vhdl.mk
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- plot: CHECK_RESULTS = false
- plot: sim
- @echo Plotting resulting signal vs. expected signal ...
- @../../scripts/plot.py ${expected_data} 2> /dev/null
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