set_property SRC_FILE_INFO {cfile:C:/Users/Felix/OneDrive/Master/Projektarbeit_FPGA/Programme/Git_Projekte/FPGA_Projekt_Regler/StreckenSim_mitRegler/StreckeSim_counter_working/StreckeSim/Coraz7_Test.srcs/constrs_1/imports/digilent-xdc-master/Cora-Z7-10-Master.xdc rfile:../../../Coraz7_Test.srcs/constrs_1/imports/digilent-xdc-master/Cora-Z7-10-Master.xdc id:1} [current_design]
set_property src_info {type:XDC file:1 line:7 export:INPUT save:INPUT read:READ} [current_design]
set_property -dict { PACKAGE_PIN H16   IOSTANDARD LVCMOS33 } [get_ports { clk }]; #IO_L13P_T2_MRCC_35 Sch=sysclk