FPGA_Projekt_Regler/StreckenSim_mitRegler/StreckeSim_counter_working/StreckeSim/Coraz7_Test.hw/hw_1/hw.xml

<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2021.2 (64-bit)                     -->
<!--                                                              -->
<!-- Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.        -->

<hwsession version="1" minor="2">
  <device name="xc7z010_1" gui_info=""/>
  <ObjectList object_type="hw_device" gui_info="">
    <Object name="xc7z010_1" gui_info="">
      <Properties Property="FULL_PROBES.FILE" value=""/>
      <Properties Property="PROBES.FILE" value=""/>
      <Properties Property="PROGRAM.HW_BITSTREAM" value="$_project_name_.runs/impl_1/pwm_test.bit"/>
      <Properties Property="SLR.COUNT" value="1"/>
    </Object>
  </ObjectList>
  <probeset name="hw project" active="false"/>
</hwsession>