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FPGA_Projekt_Regler
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FPGA_Projekt_Regler/StreckenSim_mitRegler/StreckeSim_counter_working/StreckeSim/Coraz7_Test.runs/.jobs/vrs_config_18.xml

vrs_config_18.xml 659B
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  1. <?xml version="1.0"?>

  2. <Runs Version="1" Minor="0">

  3. 	<Run Id="synth_1" LaunchDir="C:/Users/Felix/OneDrive/Master/Projektarbeit_FPGA/Programme/Coraz7_Test/Coraz7_Test.runs/synth_1" FlowId="Vivado_Synthesis" FromStepId="vivado" ToStepId="vivado"/>

  4. 	<Run Id="impl_1" LaunchDir="C:/Users/Felix/OneDrive/Master/Projektarbeit_FPGA/Programme/Coraz7_Test/Coraz7_Test.runs/impl_1" FlowId="Vivado_Implementation" FromStepId="init_design" ToStepId="write_bitstream">

  5. 		<Parent Id="synth_1"/>

  6. 	</Run>

  7. 	<Parameters>

  8. 		<Parameter Name="runs.monitorLSFJobs" Val="true" Type="bool"/>

  9. 		<Parameter Name="runs.enableClusterConf" Val="true" Type="bool"/>

  10. 	</Parameters>

  11. </Runs>