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Add SC_Card_F401RE

alice
Alice Steiner 3 years ago
parent
1f4423a2bb
commit
84a0298e2d
100 changed files with 5357 additions and 259 deletions
Split View Show Diff Stats
  1. 2
    2
      SD_CARD_SPI/.settings/language.settings.xml
  2. BIN
      SD_CARD_SPI/Debug/Core/Src/fatfs_sd.o
  3. BIN
      SD_CARD_SPI/Debug/Core/Src/main.o
  4. BIN
      SD_CARD_SPI/Debug/Core/Src/stm32l1xx_hal_msp.o
  5. BIN
      SD_CARD_SPI/Debug/Core/Src/stm32l1xx_it.o
  6. BIN
      SD_CARD_SPI/Debug/Core/Src/system_stm32l1xx.o
  7. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
  8. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
  9. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o
  10. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o
  11. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o
  12. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o
  13. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o
  14. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o
  15. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o
  16. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o
  17. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o
  18. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o
  19. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o
  20. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.o
  21. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.o
  22. BIN
      SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o
  23. BIN
      SD_CARD_SPI/Debug/FATFS/App/fatfs.o
  24. BIN
      SD_CARD_SPI/Debug/FATFS/Target/user_diskio.o
  25. BIN
      SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/diskio.o
  26. BIN
      SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/ff.o
  27. BIN
      SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/ff_gen_drv.o
  28. BIN
      SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/option/ccsbcs.o
  29. BIN
      SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/option/syscall.o
  30. BIN
      SD_CARD_SPI/Debug/SD_CARD_SPI.elf
  31. 254
    254
      SD_CARD_SPI/Debug/SD_CARD_SPI.map
  32. 17
    2
      SD_CARD_SPI/Debug/makefile
  33. 0
    1
      SD_CARD_SPI/SD_CARD_SPI.ioc
  34. 186
    0
      SD_Card_F401RE/.cproject
  35. 34
    0
      SD_Card_F401RE/.mxproject
  36. 33
    0
      SD_Card_F401RE/.project
  37. 27
    0
      SD_Card_F401RE/.settings/language.settings.xml
  38. 4
    0
      SD_Card_F401RE/.settings/stm32cubeide.project.prefs
  39. 42
    0
      SD_Card_F401RE/Core/Inc/fatfs_sd.h
  40. 83
    0
      SD_Card_F401RE/Core/Inc/main.h
  41. 486
    0
      SD_Card_F401RE/Core/Inc/stm32f4xx_hal_conf.h
  42. 69
    0
      SD_Card_F401RE/Core/Inc/stm32f4xx_it.h
  43. 544
    0
      SD_Card_F401RE/Core/Src/fatfs_sd.c
  44. 382
    0
      SD_Card_F401RE/Core/Src/main.c
  45. 218
    0
      SD_Card_F401RE/Core/Src/stm32f4xx_hal_msp.c
  46. 205
    0
      SD_Card_F401RE/Core/Src/stm32f4xx_it.c
  47. 159
    0
      SD_Card_F401RE/Core/Src/syscalls.c
  48. 80
    0
      SD_Card_F401RE/Core/Src/sysmem.c
  49. 727
    0
      SD_Card_F401RE/Core/Src/system_stm32f4xx.c
  50. 432
    0
      SD_Card_F401RE/Core/Startup/startup_stm32f401retx.s
  51. 90
    0
      SD_Card_F401RE/Debug/Core/Src/fatfs_sd.d
  52. BIN
      SD_Card_F401RE/Debug/Core/Src/fatfs_sd.o
  53. 18
    0
      SD_Card_F401RE/Debug/Core/Src/fatfs_sd.su
  54. 108
    0
      SD_Card_F401RE/Debug/Core/Src/main.d
  55. BIN
      SD_Card_F401RE/Debug/Core/Src/main.o
  56. 7
    0
      SD_Card_F401RE/Debug/Core/Src/main.su
  57. 84
    0
      SD_Card_F401RE/Debug/Core/Src/stm32f4xx_hal_msp.d
  58. BIN
      SD_Card_F401RE/Debug/Core/Src/stm32f4xx_hal_msp.o
  59. 5
    0
      SD_Card_F401RE/Debug/Core/Src/stm32f4xx_hal_msp.su
  60. 87
    0
      SD_Card_F401RE/Debug/Core/Src/stm32f4xx_it.d
  61. BIN
      SD_Card_F401RE/Debug/Core/Src/stm32f4xx_it.o
  62. 9
    0
      SD_Card_F401RE/Debug/Core/Src/stm32f4xx_it.su
  63. 49
    0
      SD_Card_F401RE/Debug/Core/Src/subdir.mk
  64. 1
    0
      SD_Card_F401RE/Debug/Core/Src/syscalls.d
  65. BIN
      SD_Card_F401RE/Debug/Core/Src/syscalls.o
  66. 18
    0
      SD_Card_F401RE/Debug/Core/Src/syscalls.su
  67. 1
    0
      SD_Card_F401RE/Debug/Core/Src/sysmem.d
  68. BIN
      SD_Card_F401RE/Debug/Core/Src/sysmem.o
  69. 1
    0
      SD_Card_F401RE/Debug/Core/Src/sysmem.su
  70. 82
    0
      SD_Card_F401RE/Debug/Core/Src/system_stm32f4xx.d
  71. BIN
      SD_Card_F401RE/Debug/Core/Src/system_stm32f4xx.o
  72. 2
    0
      SD_Card_F401RE/Debug/Core/Src/system_stm32f4xx.su
  73. 2
    0
      SD_Card_F401RE/Debug/Core/Startup/startup_stm32f401retx.d
  74. BIN
      SD_Card_F401RE/Debug/Core/Startup/startup_stm32f401retx.o
  75. 19
    0
      SD_Card_F401RE/Debug/Core/Startup/subdir.mk
  76. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d
  77. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
  78. 27
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su
  79. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d
  80. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
  81. 32
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su
  82. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d
  83. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o
  84. 15
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su
  85. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d
  86. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
  87. 4
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su
  88. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d
  89. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o
  90. 9
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su
  91. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d
  92. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o
  93. 17
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su
  94. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d
  95. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o
  96. 22
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su
  97. 83
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d
  98. BIN
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o
  99. 0
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su
  100. 0
    0
      SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d

+ 2
- 2
SD_CARD_SPI/.settings/language.settings.xml View File

@@ -6,7 +6,7 @@
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1792295911939766049" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1269982718955581026" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
@@ -18,7 +18,7 @@
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1792295911939766049" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1269982718955581026" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>

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SD_CARD_SPI/Debug/Core/Src/fatfs_sd.o View File


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SD_CARD_SPI/Debug/Core/Src/main.o View File


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SD_CARD_SPI/Debug/Core/Src/stm32l1xx_hal_msp.o View File


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SD_CARD_SPI/Debug/Core/Src/stm32l1xx_it.o View File


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SD_CARD_SPI/Debug/Core/Src/system_stm32l1xx.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_spi.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.o View File


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SD_CARD_SPI/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o View File


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SD_CARD_SPI/Debug/FATFS/App/fatfs.o View File


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SD_CARD_SPI/Debug/FATFS/Target/user_diskio.o View File


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SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/diskio.o View File


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SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/ff.o View File


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SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/ff_gen_drv.o View File


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SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/option/ccsbcs.o View File


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SD_CARD_SPI/Debug/Middlewares/Third_Party/FatFs/src/option/syscall.o View File


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SD_CARD_SPI/Debug/SD_CARD_SPI.elf View File


+ 254
- 254
SD_CARD_SPI/Debug/SD_CARD_SPI.map View File

@@ -1,64 +1,64 @@
Archive member included to satisfy reference by file (symbol)

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Core/Src/syscalls.o (__errno)
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c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-reallocr.o) (_malloc_usable_size_r)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-reent.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-sbrkr.o) (errno)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_addsubdf3.o)
Core/Src/main.o (__aeabi_ui2d)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_muldivdf3.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_muldivdf3.o)
Core/Src/main.o (__aeabi_dmul)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_fixunsdfsi.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_fixunsdfsi.o)
Core/Src/main.o (__aeabi_d2uiz)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o)
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o (__aeabi_uldivmod)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_udivmoddi4.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o) (__udivmoddi4)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_dvmd_tls.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o) (__aeabi_ldiv0)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_udivmoddi4.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o) (__udivmoddi4)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_dvmd_tls.o)
c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o) (__aeabi_ldiv0)

Allocating common symbols
Common symbol size file

fre_clust 0x4 Core/Src/main.o
USERPath 0x4 FATFS/App/fatfs.o
errno 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-reent.o)
errno 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-reent.o)
fs 0x1038 Core/Src/main.o
totalSpace 0x4 Core/Src/main.o
uwTick 0x4 Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o
@@ -78,17 +78,17 @@ USERFatFS 0x1038 FATFS/App/fatfs.o

Discarded input sections

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.text 0x0000000000000000 0x74 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/crt0.o
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.ARM.attributes
0x0000000000000000 0x1b c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/crt0.o
0x0000000000000000 0x1b c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/crt0.o
.group 0x0000000000000000 0xc Core/Src/fatfs_sd.o
.group 0x0000000000000000 0xc Core/Src/fatfs_sd.o
.group 0x0000000000000000 0xc Core/Src/fatfs_sd.o
@@ -3206,101 +3206,101 @@ Discarded input sections
.comment 0x0000000000000000 0x7c Middlewares/Third_Party/FatFs/src/option/syscall.o
.ARM.attributes
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.ARM.attributes
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.bss 0x0000000000000000 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtn.o

Memory Configuration

@@ -3311,9 +3311,9 @@ FLASH 0x0000000008000000 0x0000000000080000 xr

Linker script and memory map

LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crti.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/crt0.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crti.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/crt0.o
LOAD Core/Src/fatfs_sd.o
LOAD Core/Src/main.o
LOAD Core/Src/stm32l1xx_hal_msp.o
@@ -3346,25 +3346,25 @@ LOAD Middlewares/Third_Party/FatFs/src/ff_gen_drv.o
LOAD Middlewares/Third_Party/FatFs/src/option/ccsbcs.o
LOAD Middlewares/Third_Party/FatFs/src/option/syscall.o
START GROUP
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libm.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libm.a
END GROUP
START GROUP
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
END GROUP
START GROUP
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libnosys.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libnosys.a
END GROUP
START GROUP
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libnosys.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libnosys.a
END GROUP
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtend.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtn.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtend.o
LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtn.o
0x0000000020014000 _estack = (ORIGIN (RAM) + LENGTH (RAM))
0x0000000000000200 _Min_Heap_Size = 0x200
0x0000000000000400 _Min_Stack_Size = 0x400
@@ -3379,10 +3379,10 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
.text 0x000000000800013c 0x7870
0x000000000800013c . = ALIGN (0x4)
*(.text)
.text 0x000000000800013c 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
.text 0x000000000800017c 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-strlen.o)
.text 0x000000000800013c 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
.text 0x000000000800017c 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-strlen.o)
0x000000000800017c strlen
.text 0x000000000800018c 0x378 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_addsubdf3.o)
.text 0x000000000800018c 0x378 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_addsubdf3.o)
0x000000000800018c __aeabi_drsub
0x0000000008000194 __aeabi_dsub
0x0000000008000194 __subdf3
@@ -3398,19 +3398,19 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
0x0000000008000498 __aeabi_ul2d
0x00000000080004a8 __floatdidf
0x00000000080004a8 __aeabi_l2d
.text 0x0000000008000504 0x424 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_muldivdf3.o)
.text 0x0000000008000504 0x424 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_muldivdf3.o)
0x0000000008000504 __aeabi_dmul
0x0000000008000504 __muldf3
0x0000000008000758 __divdf3
0x0000000008000758 __aeabi_ddiv
.text 0x0000000008000928 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_fixunsdfsi.o)
.text 0x0000000008000928 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_arm_fixunsdfsi.o)
0x0000000008000928 __aeabi_d2uiz
0x0000000008000928 __fixunsdfsi
.text 0x0000000008000968 0x30 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o)
.text 0x0000000008000968 0x30 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_aeabi_uldivmod.o)
0x0000000008000968 __aeabi_uldivmod
.text 0x0000000008000998 0x2d0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_udivmoddi4.o)
.text 0x0000000008000998 0x2d0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_udivmoddi4.o)
0x0000000008000998 __udivmoddi4
.text 0x0000000008000c68 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_dvmd_tls.o)
.text 0x0000000008000c68 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_dvmd_tls.o)
0x0000000008000c68 __aeabi_idiv0
0x0000000008000c68 __aeabi_ldiv0
*(.text*)
@@ -3810,70 +3810,70 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
.text.ff_wtoupper
0x0000000008006fec 0x110 Middlewares/Third_Party/FatFs/src/option/ccsbcs.o
0x0000000008006fec ff_wtoupper
.text.__errno 0x00000000080070fc 0xc c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-errno.o)
.text.__errno 0x00000000080070fc 0xc c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-errno.o)
0x00000000080070fc __errno
.text.__libc_init_array
0x0000000008007108 0x48 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-init.o)
0x0000000008007108 0x48 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-init.o)
0x0000000008007108 __libc_init_array
.text.memset 0x0000000008007150 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memset.o)
.text.memset 0x0000000008007150 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memset.o)
0x0000000008007150 memset
.text.sprintf 0x0000000008007160 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-sprintf.o)
.text.sprintf 0x0000000008007160 0x40 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-sprintf.o)
0x0000000008007160 siprintf
0x0000000008007160 sprintf
.text.strcpy 0x00000000080071a0 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-strcpy.o)
.text.strcpy 0x00000000080071a0 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-strcpy.o)
0x00000000080071a0 strcpy
.text.__ssputs_r
0x00000000080071b0 0xb4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-svfprintf.o)
0x00000000080071b0 0xb4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-svfprintf.o)
0x00000000080071b0 __ssputs_r
.text._svfprintf_r
0x0000000008007264 0x1f0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-svfprintf.o)
0x0000000008007264 0x1f0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-svfprintf.o)
0x0000000008007264 _svfiprintf_r
0x0000000008007264 _svfprintf_r
.text._printf_common
0x0000000008007454 0xec c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
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0x0000000008007454 _printf_common
.text._printf_i
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0x0000000008007540 0x224 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
0x0000000008007540 _printf_i
.text.memchr 0x0000000008007764 0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memchr-stub.o)
.text.memchr 0x0000000008007764 0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memchr-stub.o)
0x0000000008007764 memchr
.text.memcpy 0x0000000008007780 0x16 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memcpy-stub.o)
.text.memcpy 0x0000000008007780 0x16 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memcpy-stub.o)
0x0000000008007780 memcpy
.text.memmove 0x0000000008007796 0x32 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memmove.o)
.text.memmove 0x0000000008007796 0x32 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-memmove.o)
0x0000000008007796 memmove
.text._free_r 0x00000000080077c8 0x98 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-freer.o)
.text._free_r 0x00000000080077c8 0x98 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-freer.o)
0x00000000080077c8 _free_r
.text._malloc_r
0x0000000008007860 0xb4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-mallocr.o)
0x0000000008007860 0xb4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-mallocr.o)
0x0000000008007860 _malloc_r
.text._realloc_r
0x0000000008007914 0x4c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-reallocr.o)
0x0000000008007914 0x4c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-reallocr.o)
0x0000000008007914 _realloc_r
.text._sbrk_r 0x0000000008007960 0x20 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-sbrkr.o)
.text._sbrk_r 0x0000000008007960 0x20 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-sbrkr.o)
0x0000000008007960 _sbrk_r
.text.__malloc_lock
0x0000000008007980 0x2 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-mlock.o)
0x0000000008007980 0x2 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-mlock.o)
0x0000000008007980 __malloc_lock
.text.__malloc_unlock
0x0000000008007982 0x2 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-mlock.o)
0x0000000008007982 0x2 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-mlock.o)
0x0000000008007982 __malloc_unlock
.text._malloc_usable_size_r
0x0000000008007984 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-msizer.o)
0x0000000008007984 0x10 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-msizer.o)
0x0000000008007984 _malloc_usable_size_r
*(.glue_7)
.glue_7 0x0000000008007994 0x0 linker stubs
*(.glue_7t)
.glue_7t 0x0000000008007994 0x0 linker stubs
*(.eh_frame)
.eh_frame 0x0000000008007994 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
.eh_frame 0x0000000008007994 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
*(.init)
.init 0x0000000008007994 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crti.o
.init 0x0000000008007994 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crti.o
0x0000000008007994 _init
.init 0x0000000008007998 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtn.o
.init 0x0000000008007998 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtn.o
*(.fini)
.fini 0x00000000080079a0 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crti.o
.fini 0x00000000080079a0 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crti.o
0x00000000080079a0 _fini
.fini 0x00000000080079a4 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtn.o
.fini 0x00000000080079a4 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtn.o
0x00000000080079ac . = ALIGN (0x4)
0x00000000080079ac _etext = .

@@ -3884,7 +3884,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
.v4_bx 0x00000000080079ac 0x0 linker stubs

.iplt 0x00000000080079ac 0x0
.iplt 0x00000000080079ac 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
.iplt 0x00000000080079ac 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o

.rodata 0x00000000080079ac 0x610
0x00000000080079ac . = ALIGN (0x4)
@@ -3914,9 +3914,9 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
.rodata.cvt2.6660
0x0000000008007ecc 0xbc Middlewares/Third_Party/FatFs/src/option/ccsbcs.o
.rodata._svfprintf_r.str1.1
0x0000000008007f88 0x11 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-svfprintf.o)
0x0000000008007f88 0x11 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-svfprintf.o)
.rodata._printf_i.str1.1
0x0000000008007f99 0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
0x0000000008007f99 0x22 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-nano-vfprintf_i.o)
0x0000000008007fbc . = ALIGN (0x4)
*fill* 0x0000000008007fbb 0x1

@@ -3929,12 +3929,12 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
0x0000000008007fbc . = ALIGN (0x4)
0x0000000008007fbc __exidx_start = .
*(.ARM.exidx*)
.ARM.exidx 0x0000000008007fbc 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_udivmoddi4.o)
.ARM.exidx 0x0000000008007fbc 0x8 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m\libgcc.a(_udivmoddi4.o)
0x0000000008007fc4 __exidx_end = .
0x0000000008007fc4 . = ALIGN (0x4)

.rel.dyn 0x0000000008007fc4 0x0
.rel.iplt 0x0000000008007fc4 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
.rel.iplt 0x0000000008007fc4 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o

.preinit_array 0x0000000008007fc4 0x0
0x0000000008007fc4 . = ALIGN (0x4)
@@ -3948,7 +3948,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
0x0000000008007fc4 PROVIDE (__init_array_start = .)
*(SORT_BY_NAME(.init_array.*))
*(.init_array*)
.init_array 0x0000000008007fc4 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
.init_array 0x0000000008007fc4 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
0x0000000008007fc8 PROVIDE (__init_array_end = .)
0x0000000008007fc8 . = ALIGN (0x4)

@@ -3957,7 +3957,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
[!provide] PROVIDE (__fini_array_start = .)
*(SORT_BY_NAME(.fini_array.*))
*(.fini_array*)
.fini_array 0x0000000008007fc8 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
.fini_array 0x0000000008007fc8 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
[!provide] PROVIDE (__fini_array_end = .)
0x0000000008007fcc . = ALIGN (0x4)
0x0000000008007fcc _sidata = LOADADDR (.data)
@@ -3982,22 +3982,22 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
0x0000000020000010 0x14 FATFS/Target/user_diskio.o
0x0000000020000010 USER_Driver
.data._impure_ptr
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0x0000000020000088 . = ALIGN (0x4)
0x0000000020000088 _edata = .

.igot.plt 0x0000000020000088 0x0 load address 0x0000000008008054
.igot.plt 0x0000000020000088 0x0 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.4.0.202007081208/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
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0x0000000020000088 . = ALIGN (0x4)

.bss 0x0000000020000088 0x4454 load address 0x0000000008008054
0x0000000020000088 _sbss = .
0x0000000020000088 __bss_start__ = _sbss
*(.bss)
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.bss 0x0000000020000088 0x1c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crtbegin.o
*(.bss*)
.bss.CardType 0x00000000200000a4 0x1 Core/Src/fatfs_sd.o
.bss.PowerFlag
@@ -4013,10 +4013,10 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
.bss.disk 0x00000000200002d4 0xc Middlewares/Third_Party/FatFs/src/ff_gen_drv.o
0x00000000200002d4 disk
.bss.__malloc_free_list
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0x00000000200002e4 __malloc_sbrk_start
*(COMMON)
COMMON 0x00000000200002e8 0x4 Core/Src/fatfs_sd.o
@@ -4040,7 +4040,7 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
0x000000002000246c retUSER
0x0000000020002470 USERFile
0x00000000200034a0 USERFatFS
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COMMON 0x00000000200044d8 0x4 c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-reent.o)
0x00000000200044d8 errno
0x00000000200044dc . = ALIGN (0x4)
0x00000000200044dc _ebss = .
@@ -4067,9 +4067,9 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
0x0000000000000000 0x29
*(.ARM.attributes)
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0x0000000000000000 0x1d c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/thumb/v7-m/crti.o
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@@ -4109,57 +4109,57 @@ LOAD c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.exte
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OUTPUT(SD_CARD_SPI.elf elf32-littlearm)

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.debug_frame 0x00000000000031a4 0x2c c:/st/stm32cubeide_1.4.0/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.7-2018-q2-update.win32_1.5.0.202011040924/tools/bin/../lib/gcc/arm-none-eabi/7.3.1/../../../../arm-none-eabi/lib/thumb/v7-m\libc_nano.a(lib_a-sbrkr.o)
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+ 17
- 2
SD_CARD_SPI/Debug/makefile View File

@@ -32,6 +32,11 @@ endif

-include ../makefile.defs

BUILD_ARTIFACT_NAME := SD_CARD_SPI
BUILD_ARTIFACT_EXTENSION := elf
BUILD_ARTIFACT_PREFIX :=
BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME).$(BUILD_ARTIFACT_EXTENSION)

# Add inputs and outputs from these tool invocations to the build variables
EXECUTABLES += \
SD_CARD_SPI.elf \
@@ -47,7 +52,10 @@ SD_CARD_SPI.bin \


# All Target
all: SD_CARD_SPI.elf secondary-outputs
all: main-build

# Main-build Target
main-build: SD_CARD_SPI.elf secondary-outputs

# Tool invocations
SD_CARD_SPI.elf: $(OBJS) $(USER_OBJS) C:\Users\Gregor\Desktop\Projektarbeit\Workspace\SD_CARD_SPI\STM32L152RETX_FLASH.ld
@@ -77,7 +85,14 @@ clean:

secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN)

.PHONY: all clean dependents
fail-specified-linker-script-missing:
@echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.'
@exit 2

warn-no-linker-script-specified:
@echo 'Warning: No linker script specified. Check the linker settings in the build configuration.'

.PHONY: all clean dependents fail-specified-linker-script-missing warn-no-linker-script-specified
.SECONDARY:

-include ../makefile.targets

+ 0
- 1
SD_CARD_SPI/SD_CARD_SPI.ioc View File

@@ -172,4 +172,3 @@ VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=NUCLEO-L152RE
boardIOC=true
isbadioc=false

+ 186
- 0
SD_Card_F401RE/.cproject View File

@@ -0,0 +1,186 @@
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SD_Card_F401RE/.mxproject View File

@@ -0,0 +1,34 @@
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CDefines=USE_HAL_DRIVER;STM32F401xE;USE_HAL_DRIVER;USE_HAL_DRIVER;

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+ 33
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SD_Card_F401RE/.project View File

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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>SD_Card_F401RE</name>
<comment></comment>
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+ 27
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SD_Card_F401RE/.settings/language.settings.xml View File

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<project>
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.67320444" name="Release">
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SD_Card_F401RE/.settings/stm32cubeide.project.prefs View File

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+ 42
- 0
SD_Card_F401RE/Core/Inc/fatfs_sd.h View File

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#ifndef __FATFS_SD_H
#define __FATFS_SD_H

/* Definitions for MMC/SDC command */
#define CMD0 (0x40+0) /* GO_IDLE_STATE */
#define CMD1 (0x40+1) /* SEND_OP_COND */
#define CMD8 (0x40+8) /* SEND_IF_COND */
#define CMD9 (0x40+9) /* SEND_CSD */
#define CMD10 (0x40+10) /* SEND_CID */
#define CMD12 (0x40+12) /* STOP_TRANSMISSION */
#define CMD16 (0x40+16) /* SET_BLOCKLEN */
#define CMD17 (0x40+17) /* READ_SINGLE_BLOCK */
#define CMD18 (0x40+18) /* READ_MULTIPLE_BLOCK */
#define CMD23 (0x40+23) /* SET_BLOCK_COUNT */
#define CMD24 (0x40+24) /* WRITE_BLOCK */
#define CMD25 (0x40+25) /* WRITE_MULTIPLE_BLOCK */
#define CMD41 (0x40+41) /* SEND_OP_COND (ACMD) */
#define CMD55 (0x40+55) /* APP_CMD */
#define CMD58 (0x40+58) /* READ_OCR */

/* MMC card type flags (MMC_GET_TYPE) */
#define CT_MMC 0x01 /* MMC ver 3 */
#define CT_SD1 0x02 /* SD ver 1 */
#define CT_SD2 0x04 /* SD ver 2 */
#define CT_SDC 0x06 /* SD */
#define CT_BLOCK 0x08 /* Block addressing */

/* Functions */
DSTATUS SD_disk_initialize (BYTE pdrv);
DSTATUS SD_disk_status (BYTE pdrv);
DRESULT SD_disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
DRESULT SD_disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
DRESULT SD_disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);

#define SPI_TIMEOUT 100

extern SPI_HandleTypeDef hspi1;
#define HSPI_SDCARD &hspi1
#define SD_CS_PORT GPIOB
#define SD_CS_PIN GPIO_PIN_6

#endif

+ 83
- 0
SD_Card_F401RE/Core/Inc/main.h View File

@@ -0,0 +1,83 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H

#ifdef __cplusplus
extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"

/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */

/* USER CODE END ET */

/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */

/* USER CODE END EC */

/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */

/* USER CODE END EM */

/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);

/* USER CODE BEGIN EFP */

/* USER CODE END EFP */

/* Private defines -----------------------------------------------------------*/
#define B1_Pin GPIO_PIN_13
#define B1_GPIO_Port GPIOC
#define USART_TX_Pin GPIO_PIN_2
#define USART_TX_GPIO_Port GPIOA
#define USART_RX_Pin GPIO_PIN_3
#define USART_RX_GPIO_Port GPIOA
#define TMS_Pin GPIO_PIN_13
#define TMS_GPIO_Port GPIOA
#define TCK_Pin GPIO_PIN_14
#define TCK_GPIO_Port GPIOA
#define SWO_Pin GPIO_PIN_3
#define SWO_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */

/* USER CODE END Private defines */

#ifdef __cplusplus
}
#endif

#endif /* __MAIN_H */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 486
- 0
SD_Card_F401RE/Core/Inc/stm32f4xx_hal_conf.h View File

@@ -0,0 +1,486 @@
/**
******************************************************************************
* @file stm32f4xx_hal_conf_template.h
* @author MCD Application Team
* @brief HAL configuration template file.
* This file should be copied to the application folder and renamed
* to stm32f4xx_hal_conf.h.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CONF_H
#define __STM32F4xx_HAL_CONF_H

#ifdef __cplusplus
extern "C" {
#endif

/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/

/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED

/* #define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
/* #define HAL_TIM_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* #define HAL_PCD_MODULE_ENABLED */
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_FMPI2C_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED

/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */

#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */

/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */

/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */

#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */

/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */

/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */

/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U

#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */

/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */

/* ################## Ethernet peripheral configuration ##################### */

/* Section 1 : Ethernet peripheral configuration */

/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2U
#define MAC_ADDR1 0U
#define MAC_ADDR2 0U
#define MAC_ADDR3 0U
#define MAC_ADDR4 0U
#define MAC_ADDR5 0U

/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */

/* Section 2: PHY configuration section */

/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)

#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)

/* Section 3: Common PHY Registers */

#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */

#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */

#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */

/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */

#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */

/* ################## SPI peripheral configuration ########################## */

/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/

#define USE_SPI_CRC 0U

/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/

#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */

#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */

#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */

#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */

#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */

#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */

#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */

#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */

#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */

#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */

#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */

#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */

#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32f4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */

#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */

#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */

#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */

#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */

#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */

#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */

#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */

#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */

#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */

#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */

#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */

#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */

#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32f4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */

#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */

#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32f4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */

#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */

#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32f4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */

#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */

#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */

#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */

#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */

#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */

#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */

#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */

#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */

#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */

#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */

#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32f4xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */

#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32f4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */

#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f4xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */

#ifdef HAL_FMPI2C_MODULE_ENABLED
#include "stm32f4xx_hal_fmpi2c.h"
#endif /* HAL_FMPI2C_MODULE_ENABLED */

#ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32f4xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */

#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32f4xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */

#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32f4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */

#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */

/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */

#ifdef __cplusplus
}
#endif

#endif /* __STM32F4xx_HAL_CONF_H */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 69
- 0
SD_Card_F401RE/Core/Inc/stm32f4xx_it.h View File

@@ -0,0 +1,69 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_IT_H
#define __STM32F4xx_IT_H

#ifdef __cplusplus
extern "C" {
#endif

/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */

/* USER CODE END ET */

/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */

/* USER CODE END EC */

/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */

/* USER CODE END EM */

/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
/* USER CODE BEGIN EFP */

/* USER CODE END EFP */

#ifdef __cplusplus
}
#endif

#endif /* __STM32F4xx_IT_H */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 544
- 0
SD_Card_F401RE/Core/Src/fatfs_sd.c View File

@@ -0,0 +1,544 @@
#define TRUE 1
#define FALSE 0
#define bool BYTE

#include "stm32f4xx_hal.h"

#include "diskio.h"
#include "fatfs_sd.h"

uint16_t Timer1, Timer2; /* 1ms Timer Counter */

static volatile DSTATUS Stat = STA_NOINIT; /* Disk Status */
static uint8_t CardType; /* Type 0:MMC, 1:SDC, 2:Block addressing */
static uint8_t PowerFlag = 0; /* Power flag */

/***************************************
* SPI functions
**************************************/

/* slave select */
static void SELECT(void)
{
HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_RESET);
HAL_Delay(1);
}

/* slave deselect */
static void DESELECT(void)
{
HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_SET);
HAL_Delay(1);
}

/* SPI transmit a byte */
static void SPI_TxByte(uint8_t data)
{
while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
HAL_SPI_Transmit(HSPI_SDCARD, &data, 1, SPI_TIMEOUT);
}

/* SPI transmit buffer */
static void SPI_TxBuffer(uint8_t *buffer, uint16_t len)
{
while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
HAL_SPI_Transmit(HSPI_SDCARD, buffer, len, SPI_TIMEOUT);
}

/* SPI receive a byte */
static uint8_t SPI_RxByte(void)
{
uint8_t dummy, data;
dummy = 0xFF;

while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
HAL_SPI_TransmitReceive(HSPI_SDCARD, &dummy, &data, 1, SPI_TIMEOUT);

return data;
}

/* SPI receive a byte via pointer */
static void SPI_RxBytePtr(uint8_t *buff)
{
*buff = SPI_RxByte();
}

/***************************************
* SD functions
**************************************/

/* wait SD ready */
static uint8_t SD_ReadyWait(void)
{
uint8_t res;

/* timeout 500ms */
Timer2 = 500;

/* if SD goes ready, receives 0xFF */
do {
res = SPI_RxByte();
} while ((res != 0xFF) && Timer2);

return res;
}

/* power on */
static void SD_PowerOn(void)
{
uint8_t args[6];
uint32_t cnt = 0x1FFF;

/* transmit bytes to wake up */
DESELECT();
for(int i = 0; i < 10; i++)
{
SPI_TxByte(0xFF);
}

/* slave select */
SELECT();

/* make idle state */
args[0] = CMD0; /* CMD0:GO_IDLE_STATE */
args[1] = 0;
args[2] = 0;
args[3] = 0;
args[4] = 0;
args[5] = 0x95; /* CRC */

SPI_TxBuffer(args, sizeof(args));

/* wait response */
while ((SPI_RxByte() != 0x01) && cnt)
{
cnt--;
}

DESELECT();
SPI_TxByte(0XFF);

PowerFlag = 1;
}

/* power off */
static void SD_PowerOff(void)
{
PowerFlag = 0;
}

/* check power flag */
static uint8_t SD_CheckPower(void)
{
return PowerFlag;
}

/* receive data block */
static bool SD_RxDataBlock(BYTE *buff, UINT len)
{
uint8_t token;

/* timeout 200ms */
Timer1 = 200;

/* loop until receive a response or timeout */
do {
token = SPI_RxByte();
} while((token == 0xFF) && Timer1);

/* invalid response */
if(token != 0xFE) return FALSE;

/* receive data */
do {
SPI_RxBytePtr(buff++);
} while(len--);

/* discard CRC */
SPI_RxByte();
SPI_RxByte();

return TRUE;
}

/* transmit data block */
#if _USE_WRITE == 1
static bool SD_TxDataBlock(const uint8_t *buff, BYTE token)
{
uint8_t resp;
uint8_t i = 0;

/* wait SD ready */
if (SD_ReadyWait() != 0xFF) return FALSE;

/* transmit token */
SPI_TxByte(token);

/* if it's not STOP token, transmit data */
if (token != 0xFD)
{
SPI_TxBuffer((uint8_t*)buff, 512);

/* discard CRC */
SPI_RxByte();
SPI_RxByte();

/* receive response */
while (i <= 64)
{
resp = SPI_RxByte();

/* transmit 0x05 accepted */
if ((resp & 0x1F) == 0x05) break;
i++;
}

/* recv buffer clear */
while (SPI_RxByte() == 0);
}

/* transmit 0x05 accepted */
if ((resp & 0x1F) == 0x05) return TRUE;

return FALSE;
}
#endif /* _USE_WRITE */

/* transmit command */
static BYTE SD_SendCmd(BYTE cmd, uint32_t arg)
{
uint8_t crc, res;

/* wait SD ready */
if (SD_ReadyWait() != 0xFF) return 0xFF;

/* transmit command */
SPI_TxByte(cmd); /* Command */
SPI_TxByte((uint8_t)(arg >> 24)); /* Argument[31..24] */
SPI_TxByte((uint8_t)(arg >> 16)); /* Argument[23..16] */
SPI_TxByte((uint8_t)(arg >> 8)); /* Argument[15..8] */
SPI_TxByte((uint8_t)arg); /* Argument[7..0] */

/* prepare CRC */
if(cmd == CMD0) crc = 0x95; /* CRC for CMD0(0) */
else if(cmd == CMD8) crc = 0x87; /* CRC for CMD8(0x1AA) */
else crc = 1;

/* transmit CRC */
SPI_TxByte(crc);

/* Skip a stuff byte when STOP_TRANSMISSION */
if (cmd == CMD12) SPI_RxByte();

/* receive response */
uint8_t n = 10;
do {
res = SPI_RxByte();
} while ((res & 0x80) && --n);

return res;
}

/***************************************
* user_diskio.c functions
**************************************/

/* initialize SD */
DSTATUS SD_disk_initialize(BYTE drv)
{
uint8_t n, type, ocr[4];

/* single drive, drv should be 0 */
if(drv) return STA_NOINIT;

/* no disk */
if(Stat & STA_NODISK) return Stat;

/* power on */
SD_PowerOn();

/* slave select */
SELECT();

/* check disk type */
type = 0;

/* send GO_IDLE_STATE command */
if (SD_SendCmd(CMD0, 0) == 1)
{
/* timeout 1 sec */
Timer1 = 1000;

/* SDC V2+ accept CMD8 command, http://elm-chan.org/docs/mmc/mmc_e.html */
if (SD_SendCmd(CMD8, 0x1AA) == 1)
{
/* operation condition register */
for (n = 0; n < 4; n++)
{
ocr[n] = SPI_RxByte();
}

/* voltage range 2.7-3.6V */
if (ocr[2] == 0x01 && ocr[3] == 0xAA)
{
/* ACMD41 with HCS bit */
do {
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0) break;
} while (Timer1);

/* READ_OCR */
if (Timer1 && SD_SendCmd(CMD58, 0) == 0)
{
/* Check CCS bit */
for (n = 0; n < 4; n++)
{
ocr[n] = SPI_RxByte();
}

/* SDv2 (HC or SC) */
type = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
}
}
}
else
{
/* SDC V1 or MMC */
type = (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) <= 1) ? CT_SD1 : CT_MMC;

do
{
if (type == CT_SD1)
{
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) == 0) break; /* ACMD41 */
}
else
{
if (SD_SendCmd(CMD1, 0) == 0) break; /* CMD1 */
}

} while (Timer1);

/* SET_BLOCKLEN */
if (!Timer1 || SD_SendCmd(CMD16, 512) != 0) type = 0;
}
}

CardType = type;

/* Idle */
DESELECT();
SPI_RxByte();

/* Clear STA_NOINIT */
if (type)
{
Stat &= ~STA_NOINIT;
}
else
{
/* Initialization failed */
SD_PowerOff();
}

return Stat;
}

/* return disk status */
DSTATUS SD_disk_status(BYTE drv)
{
if (drv) return STA_NOINIT;
return Stat;
}

/* read sector */
DRESULT SD_disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count)
{
/* pdrv should be 0 */
if (pdrv || !count) return RES_PARERR;

/* no disk */
if (Stat & STA_NOINIT) return RES_NOTRDY;

/* convert to byte address */
if (!(CardType & CT_SD2)) sector *= 512;

SELECT();

if (count == 1)
{
/* READ_SINGLE_BLOCK */
if ((SD_SendCmd(CMD17, sector) == 0) && SD_RxDataBlock(buff, 512)) count = 0;
}
else
{
/* READ_MULTIPLE_BLOCK */
if (SD_SendCmd(CMD18, sector) == 0)
{
do {
if (!SD_RxDataBlock(buff, 512)) break;
buff += 512;
} while (--count);

/* STOP_TRANSMISSION */
SD_SendCmd(CMD12, 0);
}
}

/* Idle */
DESELECT();
SPI_RxByte();

return count ? RES_ERROR : RES_OK;
}

/* write sector */
#if _USE_WRITE == 1
DRESULT SD_disk_write(BYTE pdrv, const BYTE* buff, DWORD sector, UINT count)
{
/* pdrv should be 0 */
if (pdrv || !count) return RES_PARERR;

/* no disk */
if (Stat & STA_NOINIT) return RES_NOTRDY;

/* write protection */
if (Stat & STA_PROTECT) return RES_WRPRT;

/* convert to byte address */
if (!(CardType & CT_SD2)) sector *= 512;

SELECT();

if (count == 1)
{
/* WRITE_BLOCK */
if ((SD_SendCmd(CMD24, sector) == 0) && SD_TxDataBlock(buff, 0xFE))
count = 0;
}
else
{
/* WRITE_MULTIPLE_BLOCK */
if (CardType & CT_SD1)
{
SD_SendCmd(CMD55, 0);
SD_SendCmd(CMD23, count); /* ACMD23 */
}

if (SD_SendCmd(CMD25, sector) == 0)
{
do {
if(!SD_TxDataBlock(buff, 0xFC)) break;
buff += 512;
} while (--count);

/* STOP_TRAN token */
if(!SD_TxDataBlock(0, 0xFD))
{
count = 1;
}
}
}

/* Idle */
DESELECT();
SPI_RxByte();

return count ? RES_ERROR : RES_OK;
}
#endif /* _USE_WRITE */

/* ioctl */
DRESULT SD_disk_ioctl(BYTE drv, BYTE ctrl, void *buff)
{
DRESULT res;
uint8_t n, csd[16], *ptr = buff;
WORD csize;

/* pdrv should be 0 */
if (drv) return RES_PARERR;
res = RES_ERROR;

if (ctrl == CTRL_POWER)
{
switch (*ptr)
{
case 0:
SD_PowerOff(); /* Power Off */
res = RES_OK;
break;
case 1:
SD_PowerOn(); /* Power On */
res = RES_OK;
break;
case 2:
*(ptr + 1) = SD_CheckPower();
res = RES_OK; /* Power Check */
break;
default:
res = RES_PARERR;
}
}
else
{
/* no disk */
if (Stat & STA_NOINIT) return RES_NOTRDY;

SELECT();

switch (ctrl)
{
case GET_SECTOR_COUNT:
/* SEND_CSD */
if ((SD_SendCmd(CMD9, 0) == 0) && SD_RxDataBlock(csd, 16))
{
if ((csd[0] >> 6) == 1)
{
/* SDC V2 */
csize = csd[9] + ((WORD) csd[8] << 8) + 1;
*(DWORD*) buff = (DWORD) csize << 10;
}
else
{
/* MMC or SDC V1 */
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
csize = (csd[8] >> 6) + ((WORD) csd[7] << 2) + ((WORD) (csd[6] & 3) << 10) + 1;
*(DWORD*) buff = (DWORD) csize << (n - 9);
}
res = RES_OK;
}
break;
case GET_SECTOR_SIZE:
*(WORD*) buff = 512;
res = RES_OK;
break;
case CTRL_SYNC:
if (SD_ReadyWait() == 0xFF) res = RES_OK;
break;
case MMC_GET_CSD:
/* SEND_CSD */
if (SD_SendCmd(CMD9, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
break;
case MMC_GET_CID:
/* SEND_CID */
if (SD_SendCmd(CMD10, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
break;
case MMC_GET_OCR:
/* READ_OCR */
if (SD_SendCmd(CMD58, 0) == 0)
{
for (n = 0; n < 4; n++)
{
*ptr++ = SPI_RxByte();
}
res = RES_OK;
}
default:
res = RES_PARERR;
}

DESELECT();
SPI_RxByte();
}

return res;
}

+ 382
- 0
SD_Card_F401RE/Core/Src/main.c View File

@@ -0,0 +1,382 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "fatfs.h"

/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "fatfs_sd.h"
#include "string.h"
#include "stdio.h"

/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */

/* USER CODE END PTD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
FATFS fs;
FATFS *pfs;
FIL fil;
FRESULT fres;
DWORD fre_clust;
uint32_t totalSpace, freeSpace;
char buffer[100];
/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */

/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/
SPI_HandleTypeDef hspi1;

UART_HandleTypeDef huart2;

/* USER CODE BEGIN PV */

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_USART2_UART_Init(void);
static void MX_SPI1_Init(void);
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
// sending to UART
void transmit_uart(char *string){
uint8_t len = strlen(string);
HAL_UART_Transmit(&huart2, (uint8_t*) string, len, 200);
}
/* USER CODE END 0 */

/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */

/* USER CODE END 1 */

/* MCU Configuration--------------------------------------------------------*/

/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();

/* USER CODE BEGIN Init */

/* USER CODE END Init */

/* Configure the system clock */
SystemClock_Config();

/* USER CODE BEGIN SysInit */

/* USER CODE END SysInit */

/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_USART2_UART_Init();
MX_SPI1_Init();
MX_FATFS_Init();
/* USER CODE BEGIN 2 */

/* Waiting for the Micro SD module to initialize */
HAL_Delay(500);

fres = f_mount(&fs, "", 0);
if (fres == FR_OK) {
transmit_uart("SD card is mounted successfully!\r\n");
} else if (fres != FR_OK) {
transmit_uart("SD card is not mounted!\r\n");
}

// FA_OPEN_APPEND opens file if it exists and if not then creates it,
// the pointer is set at the end of the file for appending
fres = f_open(&fil, "log-file.txt", FA_OPEN_APPEND | FA_WRITE | FA_READ);
if (fres == FR_OK) {
transmit_uart("File opened.\r\n");
} else if (fres != FR_OK) {
transmit_uart("File was not opened!\r\n");
}

fres = f_getfree("", &fre_clust, &pfs);
totalSpace = (uint32_t) ((pfs->n_fatent - 2) * pfs->csize * 0.5);
freeSpace = (uint32_t) (fre_clust * pfs->csize * 0.5);
char mSz[12];
sprintf(mSz, "%lu", freeSpace);
if (fres == FR_OK) {
transmit_uart("Free space: \r");
transmit_uart(mSz);
transmit_uart("\r\n");
} else if (fres != FR_OK) {
transmit_uart("Free space could not be determined!\r\n");
}

f_puts("Example Text\n", &fil);


fres = f_close(&fil);
if (fres == FR_OK) {
transmit_uart("File is closed.\r\n");
} else if (fres != FR_OK) {
transmit_uart("File was not closed.\r\n");
}

/* Open file to read */
fres = f_open(&fil, "log-file.txt", FA_READ);
if (fres == FR_OK) {
transmit_uart("File opened.\r\n");
} else if (fres != FR_OK) {
transmit_uart("File was not opened!\r\n");
}

while (f_gets(buffer, sizeof(buffer), &fil)) {
char mRd[100];
sprintf(mRd, "%s", buffer);
transmit_uart(mRd);

}

/* Close file */
fres = f_close(&fil);
if (fres == FR_OK) {
transmit_uart("File is closed.\r\n");
} else if (fres != FR_OK) {
transmit_uart("File was not closed.\r\n");
}

f_mount(NULL, "", 1);
if (fres == FR_OK) {
transmit_uart("SD card is unmounted!\r\n");
} else if (fres != FR_OK) {
transmit_uart("SD card was not unmounted!\r\n");
}

/* USER CODE END 2 */

/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */

/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}

/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 16;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
}

/**
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static void MX_SPI1_Init(void)
{

/* USER CODE BEGIN SPI1_Init 0 */

/* USER CODE END SPI1_Init 0 */

/* USER CODE BEGIN SPI1_Init 1 */

/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 10;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */

/* USER CODE END SPI1_Init 2 */

}

/**
* @brief USART2 Initialization Function
* @param None
* @retval None
*/
static void MX_USART2_UART_Init(void)
{

/* USER CODE BEGIN USART2_Init 0 */

/* USER CODE END USART2_Init 0 */

/* USER CODE BEGIN USART2_Init 1 */

/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
huart2.Init.BaudRate = 115200;
huart2.Init.WordLength = UART_WORDLENGTH_8B;
huart2.Init.StopBits = UART_STOPBITS_1;
huart2.Init.Parity = UART_PARITY_NONE;
huart2.Init.Mode = UART_MODE_TX_RX;
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART2_Init 2 */

/* USER CODE END USART2_Init 2 */

}

/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};

/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();

/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET);

/*Configure GPIO pin : B1_Pin */
GPIO_InitStruct.Pin = B1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);

/*Configure GPIO pin : PB6 */
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

}

/* USER CODE BEGIN 4 */

/* USER CODE END 4 */

/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}

#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 218
- 0
SD_Card_F401RE/Core/Src/stm32f4xx_hal_msp.c View File

@@ -0,0 +1,218 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

/* USER CODE END TD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */

/* USER CODE END Define */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */

/* USER CODE END Macro */

/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */

/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */

/* USER CODE END ExternalFunctions */

/* USER CODE BEGIN 0 */

/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */

/* USER CODE END MspInit 0 */

__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();

HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);

/* System interrupt init*/

/* USER CODE BEGIN MspInit 1 */

/* USER CODE END MspInit 1 */
}

/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */

/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();

__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

/* USER CODE BEGIN SPI1_MspInit 1 */

/* USER CODE END SPI1_MspInit 1 */
}

}

/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
{
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspDeInit 0 */

/* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE();

/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);

/* USER CODE BEGIN SPI1_MspDeInit 1 */

/* USER CODE END SPI1_MspDeInit 1 */
}

}

/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */

/* USER CODE END USART2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE();

__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

/* USER CODE BEGIN USART2_MspInit 1 */

/* USER CODE END USART2_MspInit 1 */
}

}

/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */

/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();

/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);

/* USER CODE BEGIN USART2_MspDeInit 1 */

/* USER CODE END USART2_MspDeInit 1 */
}

}

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 205
- 0
SD_Card_F401RE/Core/Src/stm32f4xx_it.c View File

@@ -0,0 +1,205 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f4xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

/* USER CODE END TD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */

/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */

/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */

/* USER CODE END 0 */

/* External variables --------------------------------------------------------*/

/* USER CODE BEGIN EV */

/* USER CODE END EV */

/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */

/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}

/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */

/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}

/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */

/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}

/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */

/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}

/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */

/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}

/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */

/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */

/* USER CODE END SVCall_IRQn 1 */
}

/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */

/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */

/* USER CODE END DebugMonitor_IRQn 1 */
}

/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */

/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */

/* USER CODE END PendSV_IRQn 1 */
}

/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */

/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */

/* USER CODE END SysTick_IRQn 1 */
}

/******************************************************************************/
/* STM32F4xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f4xx.s). */
/******************************************************************************/

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 159
- 0
SD_Card_F401RE/Core/Src/syscalls.c View File

@@ -0,0 +1,159 @@
/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeIDE
* @brief STM32CubeIDE Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>


/* Variables */
//#undef errno
extern int errno;
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));

register char * stack_ptr asm("sp");

char *__env[1] = { 0 };
char **environ = __env;


/* Functions */
void initialise_monitor_handles()
{
}

int _getpid(void)
{
return 1;
}

int _kill(int pid, int sig)
{
errno = EINVAL;
return -1;
}

void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}

__attribute__((weak)) int _read(int file, char *ptr, int len)
{
int DataIdx;

for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}

return len;
}

__attribute__((weak)) int _write(int file, char *ptr, int len)
{
int DataIdx;

for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}

int _close(int file)
{
return -1;
}


int _fstat(int file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}

int _isatty(int file)
{
return 1;
}

int _lseek(int file, int ptr, int dir)
{
return 0;
}

int _open(char *path, int flags, ...)
{
/* Pretend like we always fail */
return -1;
}

int _wait(int *status)
{
errno = ECHILD;
return -1;
}

int _unlink(char *name)
{
errno = ENOENT;
return -1;
}

int _times(struct tms *buf)
{
return -1;
}

int _stat(char *file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}

int _link(char *old, char *new)
{
errno = EMLINK;
return -1;
}

int _fork(void)
{
errno = EAGAIN;
return -1;
}

int _execve(char *name, char **argv, char **env)
{
errno = ENOMEM;
return -1;
}

+ 80
- 0
SD_Card_F401RE/Core/Src/sysmem.c View File

@@ -0,0 +1,80 @@
/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeIDE
* @brief STM32CubeIDE System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/* Includes */
#include <errno.h>
#include <stdint.h>

/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;

/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;

/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}

/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}

prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;

return (void *)prev_heap_end;
}

+ 727
- 0
SD_Card_F401RE/Core/Src/system_stm32f4xx.c View File

@@ -0,0 +1,727 @@
/**
******************************************************************************
* @file system_stm32f4xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f4xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/** @addtogroup CMSIS
* @{
*/

/** @addtogroup stm32f4xx_system
* @{
*/
/** @addtogroup STM32F4xx_System_Private_Includes
* @{
*/


#include "stm32f4xx.h"

#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
#endif /* HSE_VALUE */

#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */

/**
* @}
*/

/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
* @{
*/

/**
* @}
*/

/** @addtogroup STM32F4xx_System_Private_Defines
* @{
*/

/************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
STM32F412Zx || STM32F412Vx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
/* #define DATA_IN_ExtSDRAM */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
STM32F479xx */

/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/******************************************************************************/

/**
* @}
*/

/** @addtogroup STM32F4xx_System_Private_Macros
* @{
*/

/**
* @}
*/

/** @addtogroup STM32F4xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/

/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
* @{
*/

#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */

/**
* @}
*/

/** @addtogroup STM32F4xx_System_Private_Functions
* @{
*/

/**
* @brief Setup the microcontroller system
* Initialize the FPU setting, vector table location and External memory
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif

#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */

/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
}

/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
* depends on the application requirements), user has to ensure that HSE_VALUE
* is same as the real frequency of the crystal used. Otherwise, this function
* may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;

switch (tmp)
{
case 0x00: /* HSI used as system clock source */
SystemCoreClock = HSI_VALUE;
break;
case 0x04: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE;
break;
case 0x08: /* PLL used as system clock source */

/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
SYSCLK = PLL_VCO / PLL_P
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
if (pllsource != 0)
{
/* HSE used as PLL clock source */
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}
else
{
/* HSI used as PLL clock source */
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}

pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
SystemCoreClock = pllvco/pllp;
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK frequency --------------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK frequency */
SystemCoreClock >>= tmp;
}

#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx)
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f4xx.s before jump to main.
* This function configures the external memories (SRAM/SDRAM)
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmp = 0x00;

register uint32_t tmpreg = 0, timeout = 0xFFFF;
register __IO uint32_t index;

/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
RCC->AHB1ENR |= 0x000001F8;

/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x00CCC0CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A8A;
/* Configure PDx pins speed to 100 MHz */
GPIOD->OSPEEDR = 0xFFFF0FCF;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;

/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00CC0CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA828A;
/* Configure PEx pins speed to 100 MHz */
GPIOE->OSPEEDR = 0xFFFFC3CF;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0xCCCCCCCC;
GPIOF->AFR[1] = 0xCCCCCCCC;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA800AAA;
/* Configure PFx pins speed to 50 MHz */
GPIOF->OSPEEDR = 0xAA800AAA;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;

/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0xCCCCCCCC;
GPIOG->AFR[1] = 0xCCCCCCCC;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0xAAAAAAAA;
/* Configure PGx pins speed to 50 MHz */
GPIOG->OSPEEDR = 0xAAAAAAAA;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/* Connect PHx pins to FMC Alternate function */
GPIOH->AFR[0] = 0x00C0CC00;
GPIOH->AFR[1] = 0xCCCCCCCC;
/* Configure PHx pins in Alternate function mode */
GPIOH->MODER = 0xAAAA08A0;
/* Configure PHx pins speed to 50 MHz */
GPIOH->OSPEEDR = 0xAAAA08A0;
/* Configure PHx pins Output type to push-pull */
GPIOH->OTYPER = 0x00000000;
/* No pull-up, pull-down for PHx pins */
GPIOH->PUPDR = 0x00000000;
/* Connect PIx pins to FMC Alternate function */
GPIOI->AFR[0] = 0xCCCCCCCC;
GPIOI->AFR[1] = 0x00000CC0;
/* Configure PIx pins in Alternate function mode */
GPIOI->MODER = 0x0028AAAA;
/* Configure PIx pins speed to 50 MHz */
GPIOI->OSPEEDR = 0x0028AAAA;
/* Configure PIx pins Output type to push-pull */
GPIOI->OTYPER = 0x00000000;
/* No pull-up, pull-down for PIx pins */
GPIOI->PUPDR = 0x00000000;
/*-- FMC Configuration -------------------------------------------------------*/
/* Enable the FMC interface clock */
RCC->AHB3ENR |= 0x00000001;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);

FMC_Bank5_6->SDCR[0] = 0x000019E4;
FMC_Bank5_6->SDTR[0] = 0x01115351;
/* SDRAM initialization sequence */
/* Clock enable command */
FMC_Bank5_6->SDCMR = 0x00000011;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}

/* Delay */
for (index = 0; index<1000; index++);
/* PALL command */
FMC_Bank5_6->SDCMR = 0x00000012;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Auto refresh command */
FMC_Bank5_6->SDCMR = 0x00000073;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* MRD register program */
FMC_Bank5_6->SDCMR = 0x00046014;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Set refresh count */
tmpreg = FMC_Bank5_6->SDRTR;
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
/* Disable write protection */
tmpreg = FMC_Bank5_6->SDCR[0];
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);

#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001011;
FMC_Bank1->BTCR[3] = 0x00000201;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
#if defined(STM32F469xx) || defined(STM32F479xx)
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001091;
FMC_Bank1->BTCR[3] = 0x00110212;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F469xx || STM32F479xx */

(void)(tmp);
}
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f4xx.s before jump to main.
* This function configures the external memories (SRAM/SDRAM)
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmp = 0x00;
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
#if defined (DATA_IN_ExtSDRAM)
register uint32_t tmpreg = 0, timeout = 0xFFFF;
register __IO uint32_t index;

#if defined(STM32F446xx)
/* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
clock */
RCC->AHB1ENR |= 0x0000007D;
#else
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
clock */
RCC->AHB1ENR |= 0x000001F8;
#endif /* STM32F446xx */
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
#if defined(STM32F446xx)
/* Connect PAx pins to FMC Alternate function */
GPIOA->AFR[0] |= 0xC0000000;
GPIOA->AFR[1] |= 0x00000000;
/* Configure PDx pins in Alternate function mode */
GPIOA->MODER |= 0x00008000;
/* Configure PDx pins speed to 50 MHz */
GPIOA->OSPEEDR |= 0x00008000;
/* Configure PDx pins Output type to push-pull */
GPIOA->OTYPER |= 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOA->PUPDR |= 0x00000000;

/* Connect PCx pins to FMC Alternate function */
GPIOC->AFR[0] |= 0x00CC0000;
GPIOC->AFR[1] |= 0x00000000;
/* Configure PDx pins in Alternate function mode */
GPIOC->MODER |= 0x00000A00;
/* Configure PDx pins speed to 50 MHz */
GPIOC->OSPEEDR |= 0x00000A00;
/* Configure PDx pins Output type to push-pull */
GPIOC->OTYPER |= 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOC->PUPDR |= 0x00000000;
#endif /* STM32F446xx */

/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x000000CC;
GPIOD->AFR[1] = 0xCC000CCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xA02A000A;
/* Configure PDx pins speed to 50 MHz */
GPIOD->OSPEEDR = 0xA02A000A;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;

/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00000CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA800A;
/* Configure PEx pins speed to 50 MHz */
GPIOE->OSPEEDR = 0xAAAA800A;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;

/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0xCCCCCCCC;
GPIOF->AFR[1] = 0xCCCCCCCC;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA800AAA;
/* Configure PFx pins speed to 50 MHz */
GPIOF->OSPEEDR = 0xAA800AAA;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;

/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0xCCCCCCCC;
GPIOG->AFR[1] = 0xCCCCCCCC;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0xAAAAAAAA;
/* Configure PGx pins speed to 50 MHz */
GPIOG->OSPEEDR = 0xAAAAAAAA;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;

#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx)
/* Connect PHx pins to FMC Alternate function */
GPIOH->AFR[0] = 0x00C0CC00;
GPIOH->AFR[1] = 0xCCCCCCCC;
/* Configure PHx pins in Alternate function mode */
GPIOH->MODER = 0xAAAA08A0;
/* Configure PHx pins speed to 50 MHz */
GPIOH->OSPEEDR = 0xAAAA08A0;
/* Configure PHx pins Output type to push-pull */
GPIOH->OTYPER = 0x00000000;
/* No pull-up, pull-down for PHx pins */
GPIOH->PUPDR = 0x00000000;
/* Connect PIx pins to FMC Alternate function */
GPIOI->AFR[0] = 0xCCCCCCCC;
GPIOI->AFR[1] = 0x00000CC0;
/* Configure PIx pins in Alternate function mode */
GPIOI->MODER = 0x0028AAAA;
/* Configure PIx pins speed to 50 MHz */
GPIOI->OSPEEDR = 0x0028AAAA;
/* Configure PIx pins Output type to push-pull */
GPIOI->OTYPER = 0x00000000;
/* No pull-up, pull-down for PIx pins */
GPIOI->PUPDR = 0x00000000;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
/*-- FMC Configuration -------------------------------------------------------*/
/* Enable the FMC interface clock */
RCC->AHB3ENR |= 0x00000001;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);

/* Configure and enable SDRAM bank1 */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCR[0] = 0x00001954;
#else
FMC_Bank5_6->SDCR[0] = 0x000019E4;
#endif /* STM32F446xx */
FMC_Bank5_6->SDTR[0] = 0x01115351;
/* SDRAM initialization sequence */
/* Clock enable command */
FMC_Bank5_6->SDCMR = 0x00000011;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}

/* Delay */
for (index = 0; index<1000; index++);
/* PALL command */
FMC_Bank5_6->SDCMR = 0x00000012;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Auto refresh command */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCMR = 0x000000F3;
#else
FMC_Bank5_6->SDCMR = 0x00000073;
#endif /* STM32F446xx */
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* MRD register program */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCMR = 0x00044014;
#else
FMC_Bank5_6->SDCMR = 0x00046014;
#endif /* STM32F446xx */
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Set refresh count */
tmpreg = FMC_Bank5_6->SDRTR;
#if defined(STM32F446xx)
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
#else
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
#endif /* STM32F446xx */
/* Disable write protection */
tmpreg = FMC_Bank5_6->SDCR[0];
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
#endif /* DATA_IN_ExtSDRAM */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */

#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)

#if defined(DATA_IN_ExtSRAM)
/*-- GPIOs Configuration -----------------------------------------------------*/
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
RCC->AHB1ENR |= 0x00000078;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x00CCC0CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A8A;
/* Configure PDx pins speed to 100 MHz */
GPIOD->OSPEEDR = 0xFFFF0FCF;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;

/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00CC0CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA828A;
/* Configure PEx pins speed to 100 MHz */
GPIOE->OSPEEDR = 0xFFFFC3CF;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;

/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0x00CCCCCC;
GPIOF->AFR[1] = 0xCCCC0000;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA000AAA;
/* Configure PFx pins speed to 100 MHz */
GPIOF->OSPEEDR = 0xFF000FFF;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;

/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0x00CCCCCC;
GPIOG->AFR[1] = 0x000000C0;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0x00085AAA;
/* Configure PGx pins speed to 100 MHz */
GPIOG->OSPEEDR = 0x000CAFFF;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/*-- FMC/FSMC Configuration --------------------------------------------------*/
/* Enable the FMC/FSMC interface clock */
RCC->AHB3ENR |= 0x00000001;

#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001011;
FMC_Bank1->BTCR[3] = 0x00000201;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
#if defined(STM32F469xx) || defined(STM32F479xx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001091;
FMC_Bank1->BTCR[3] = 0x00110212;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F469xx || STM32F479xx */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
|| defined(STM32F412Zx) || defined(STM32F412Vx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
/* Configure and enable Bank1_SRAM2 */
FSMC_Bank1->BTCR[2] = 0x00001011;
FSMC_Bank1->BTCR[3] = 0x00000201;
FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */

#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
(void)(tmp);
}
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
/**
* @}
*/

/**
* @}
*/

/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

+ 432
- 0
SD_Card_F401RE/Core/Startup/startup_stm32f401retx.s View File

@@ -0,0 +1,432 @@
/**
******************************************************************************
* @file startup_stm32f401xe.s
* @author MCD Application Team
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M4 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb

.global g_pfnVectors
.global Default_Handler

/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */

/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/

.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */

/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit

CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss

/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler

/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* External Interrupts */
.word WWDG_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EXTI Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
.word FLASH_IRQHandler /* FLASH */
.word RCC_IRQHandler /* RCC */
.word EXTI0_IRQHandler /* EXTI Line0 */
.word EXTI1_IRQHandler /* EXTI Line1 */
.word EXTI2_IRQHandler /* EXTI Line2 */
.word EXTI3_IRQHandler /* EXTI Line3 */
.word EXTI4_IRQHandler /* EXTI Line4 */
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
.word TIM2_IRQHandler /* TIM2 */
.word TIM3_IRQHandler /* TIM3 */
.word TIM4_IRQHandler /* TIM4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word 0 /* Reserved */
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
.word 0 /* Reserved */
.word SDIO_IRQHandler /* SDIO */
.word TIM5_IRQHandler /* TIM5 */
.word SPI3_IRQHandler /* SPI3 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word FPU_IRQHandler /* FPU */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SPI4_IRQHandler /* SPI4 */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler

.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler

.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler

.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler

.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler

.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Stream0_IRQHandler
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
.weak DMA1_Stream1_IRQHandler
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
.weak DMA1_Stream2_IRQHandler
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
.weak DMA1_Stream3_IRQHandler
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
.weak DMA1_Stream4_IRQHandler
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
.weak DMA1_Stream5_IRQHandler
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
.weak DMA1_Stream6_IRQHandler
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_TIM9_IRQHandler
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
.weak TIM1_UP_TIM10_IRQHandler
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_TIM11_IRQHandler
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
.weak DMA1_Stream7_IRQHandler
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak DMA2_Stream0_IRQHandler
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
.weak DMA2_Stream1_IRQHandler
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
.weak DMA2_Stream2_IRQHandler
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
.weak DMA2_Stream3_IRQHandler
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
.weak DMA2_Stream4_IRQHandler
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_Stream5_IRQHandler
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
.weak DMA2_Stream6_IRQHandler
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
.weak DMA2_Stream7_IRQHandler
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
.weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler

.weak SPI4_IRQHandler
.thumb_set SPI4_IRQHandler,Default_Handler

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/


+ 90
- 0
SD_Card_F401RE/Debug/Core/Src/fatfs_sd.d View File

@@ -0,0 +1,90 @@
Core/Src/fatfs_sd.o: ../Core/Src/fatfs_sd.c \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
../Middlewares/Third_Party/FatFs/src/diskio.h \
../Middlewares/Third_Party/FatFs/src/integer.h ../Core/Inc/fatfs_sd.h

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

../Middlewares/Third_Party/FatFs/src/diskio.h:

../Middlewares/Third_Party/FatFs/src/integer.h:

../Core/Inc/fatfs_sd.h:

BIN
SD_Card_F401RE/Debug/Core/Src/fatfs_sd.o View File


+ 18
- 0
SD_Card_F401RE/Debug/Core/Src/fatfs_sd.su View File

@@ -0,0 +1,18 @@
fatfs_sd.c:21:13:SELECT 8 static
fatfs_sd.c:28:13:DESELECT 8 static
fatfs_sd.c:35:13:SPI_TxByte 16 static
fatfs_sd.c:42:13:SPI_TxBuffer 16 static
fatfs_sd.c:49:16:SPI_RxByte 24 static
fatfs_sd.c:61:13:SPI_RxBytePtr 16 static
fatfs_sd.c:71:16:SD_ReadyWait 16 static
fatfs_sd.c:87:13:SD_PowerOn 24 static
fatfs_sd.c:125:13:SD_PowerOff 4 static
fatfs_sd.c:131:16:SD_CheckPower 4 static
fatfs_sd.c:137:13:SD_RxDataBlock 24 static
fatfs_sd.c:166:13:SD_TxDataBlock 24 static
fatfs_sd.c:208:13:SD_SendCmd 24 static
fatfs_sd.c:247:9:SD_disk_initialize 32 static
fatfs_sd.c:347:9:SD_disk_status 16 static
fatfs_sd.c:354:9:SD_disk_read 24 static
fatfs_sd.c:396:9:SD_disk_write 24 static
fatfs_sd.c:451:9:SD_disk_ioctl 56 static

+ 108
- 0
SD_Card_F401RE/Debug/Core/Src/main.d View File

@@ -0,0 +1,108 @@
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
../FATFS/App/fatfs.h ../Middlewares/Third_Party/FatFs/src/ff.h \
../Middlewares/Third_Party/FatFs/src/integer.h ../FATFS/Target/ffconf.h \
../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h \
../Middlewares/Third_Party/FatFs/src/diskio.h \
../Middlewares/Third_Party/FatFs/src/ff.h ../FATFS/Target/user_diskio.h \
../Core/Inc/fatfs_sd.h

../Core/Inc/main.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

../FATFS/App/fatfs.h:

../Middlewares/Third_Party/FatFs/src/ff.h:

../Middlewares/Third_Party/FatFs/src/integer.h:

../FATFS/Target/ffconf.h:

../Middlewares/Third_Party/FatFs/src/ff_gen_drv.h:

../Middlewares/Third_Party/FatFs/src/diskio.h:

../Middlewares/Third_Party/FatFs/src/ff.h:

../FATFS/Target/user_diskio.h:

../Core/Inc/fatfs_sd.h:

BIN
SD_Card_F401RE/Debug/Core/Src/main.o View File


+ 7
- 0
SD_Card_F401RE/Debug/Core/Src/main.su View File

@@ -0,0 +1,7 @@
main.c:74:6:transmit_uart 24 static
main.c:84:5:main 128 static
main.c:202:6:SystemClock_Config 88 static
main.c:247:13:MX_SPI1_Init 8 static
main.c:285:13:MX_USART2_UART_Init 8 static
main.c:318:13:MX_GPIO_Init 48 static
main.c:354:6:Error_Handler 4 static,ignoring_inline_asm

+ 84
- 0
SD_Card_F401RE/Debug/Core/Src/stm32f4xx_hal_msp.d View File

@@ -0,0 +1,84 @@
Core/Src/stm32f4xx_hal_msp.o: ../Core/Src/stm32f4xx_hal_msp.c \
../Core/Inc/main.h ../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h

../Core/Inc/main.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

BIN
SD_Card_F401RE/Debug/Core/Src/stm32f4xx_hal_msp.o View File


+ 5
- 0
SD_Card_F401RE/Debug/Core/Src/stm32f4xx_hal_msp.su View File

@@ -0,0 +1,5 @@
stm32f4xx_hal_msp.c:64:6:HAL_MspInit 16 static
stm32f4xx_hal_msp.c:88:6:HAL_SPI_MspInit 48 static
stm32f4xx_hal_msp.c:125:6:HAL_SPI_MspDeInit 16 static
stm32f4xx_hal_msp.c:155:6:HAL_UART_MspInit 48 static
stm32f4xx_hal_msp.c:191:6:HAL_UART_MspDeInit 16 static

+ 87
- 0
SD_Card_F401RE/Debug/Core/Src/stm32f4xx_it.d View File

@@ -0,0 +1,87 @@
Core/Src/stm32f4xx_it.o: ../Core/Src/stm32f4xx_it.c ../Core/Inc/main.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
../Core/Inc/stm32f4xx_it.h

../Core/Inc/main.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

../Core/Inc/stm32f4xx_it.h:

BIN
SD_Card_F401RE/Debug/Core/Src/stm32f4xx_it.o View File


+ 9
- 0
SD_Card_F401RE/Debug/Core/Src/stm32f4xx_it.su View File

@@ -0,0 +1,9 @@
stm32f4xx_it.c:70:6:NMI_Handler 4 static
stm32f4xx_it.c:85:6:HardFault_Handler 4 static
stm32f4xx_it.c:100:6:MemManage_Handler 4 static
stm32f4xx_it.c:115:6:BusFault_Handler 4 static
stm32f4xx_it.c:130:6:UsageFault_Handler 4 static
stm32f4xx_it.c:145:6:SVC_Handler 4 static
stm32f4xx_it.c:158:6:DebugMon_Handler 4 static
stm32f4xx_it.c:171:6:PendSV_Handler 4 static
stm32f4xx_it.c:184:6:SysTick_Handler 8 static

+ 49
- 0
SD_Card_F401RE/Debug/Core/Src/subdir.mk View File

@@ -0,0 +1,49 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################

# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Core/Src/fatfs_sd.c \
../Core/Src/main.c \
../Core/Src/stm32f4xx_hal_msp.c \
../Core/Src/stm32f4xx_it.c \
../Core/Src/syscalls.c \
../Core/Src/sysmem.c \
../Core/Src/system_stm32f4xx.c

OBJS += \
./Core/Src/fatfs_sd.o \
./Core/Src/main.o \
./Core/Src/stm32f4xx_hal_msp.o \
./Core/Src/stm32f4xx_it.o \
./Core/Src/syscalls.o \
./Core/Src/sysmem.o \
./Core/Src/system_stm32f4xx.o

C_DEPS += \
./Core/Src/fatfs_sd.d \
./Core/Src/main.d \
./Core/Src/stm32f4xx_hal_msp.d \
./Core/Src/stm32f4xx_it.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32f4xx.d


# Each subdirectory must supply rules for building sources it contributes
Core/Src/fatfs_sd.o: ../Core/Src/fatfs_sd.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../FATFS/App -I../Middlewares/Third_Party/FatFs/src -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/fatfs_sd.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
Core/Src/main.o: ../Core/Src/main.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../FATFS/App -I../Middlewares/Third_Party/FatFs/src -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
Core/Src/stm32f4xx_hal_msp.o: ../Core/Src/stm32f4xx_hal_msp.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../FATFS/App -I../Middlewares/Third_Party/FatFs/src -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f4xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
Core/Src/stm32f4xx_it.o: ../Core/Src/stm32f4xx_it.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../FATFS/App -I../Middlewares/Third_Party/FatFs/src -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f4xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
Core/Src/syscalls.o: ../Core/Src/syscalls.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../FATFS/App -I../Middlewares/Third_Party/FatFs/src -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
Core/Src/sysmem.o: ../Core/Src/sysmem.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../FATFS/App -I../Middlewares/Third_Party/FatFs/src -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
Core/Src/system_stm32f4xx.o: ../Core/Src/system_stm32f4xx.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -I../FATFS/Target -I../FATFS/App -I../Middlewares/Third_Party/FatFs/src -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32f4xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"


+ 1
- 0
SD_Card_F401RE/Debug/Core/Src/syscalls.d View File

@@ -0,0 +1 @@
Core/Src/syscalls.o: ../Core/Src/syscalls.c

BIN
SD_Card_F401RE/Debug/Core/Src/syscalls.o View File


+ 18
- 0
SD_Card_F401RE/Debug/Core/Src/syscalls.su View File

@@ -0,0 +1,18 @@
syscalls.c:48:6:initialise_monitor_handles 4 static
syscalls.c:52:5:_getpid 4 static
syscalls.c:57:5:_kill 16 static
syscalls.c:63:6:_exit 16 static
syscalls.c:69:27:_read 32 static
syscalls.c:81:27:_write 32 static
syscalls.c:92:5:_close 16 static
syscalls.c:98:5:_fstat 16 static
syscalls.c:104:5:_isatty 16 static
syscalls.c:109:5:_lseek 24 static
syscalls.c:114:5:_open 12 static
syscalls.c:120:5:_wait 16 static
syscalls.c:126:5:_unlink 16 static
syscalls.c:132:5:_times 16 static
syscalls.c:137:5:_stat 16 static
syscalls.c:143:5:_link 16 static
syscalls.c:149:5:_fork 8 static
syscalls.c:155:5:_execve 24 static

+ 1
- 0
SD_Card_F401RE/Debug/Core/Src/sysmem.d View File

@@ -0,0 +1 @@
Core/Src/sysmem.o: ../Core/Src/sysmem.c

BIN
SD_Card_F401RE/Debug/Core/Src/sysmem.o View File


+ 1
- 0
SD_Card_F401RE/Debug/Core/Src/sysmem.su View File

@@ -0,0 +1 @@
sysmem.c:54:7:_sbrk 32 static

+ 82
- 0
SD_Card_F401RE/Debug/Core/Src/system_stm32f4xx.d View File

@@ -0,0 +1,82 @@
Core/Src/system_stm32f4xx.o: ../Core/Src/system_stm32f4xx.c \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

BIN
SD_Card_F401RE/Debug/Core/Src/system_stm32f4xx.o View File


+ 2
- 0
SD_Card_F401RE/Debug/Core/Src/system_stm32f4xx.su View File

@@ -0,0 +1,2 @@
system_stm32f4xx.c:150:6:SystemInit 4 static
system_stm32f4xx.c:205:6:SystemCoreClockUpdate 32 static

+ 2
- 0
SD_Card_F401RE/Debug/Core/Startup/startup_stm32f401retx.d View File

@@ -0,0 +1,2 @@
Core/Startup/startup_stm32f401retx.o: \
../Core/Startup/startup_stm32f401retx.s

BIN
SD_Card_F401RE/Debug/Core/Startup/startup_stm32f401retx.o View File


+ 19
- 0
SD_Card_F401RE/Debug/Core/Startup/subdir.mk View File

@@ -0,0 +1,19 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################

# Add inputs and outputs from these tool invocations to the build variables
S_SRCS += \
../Core/Startup/startup_stm32f401retx.s

OBJS += \
./Core/Startup/startup_stm32f401retx.o

S_DEPS += \
./Core/Startup/startup_stm32f401retx.d


# Each subdirectory must supply rules for building sources it contributes
Core/Startup/startup_stm32f401retx.o: ../Core/Startup/startup_stm32f401retx.s
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -x assembler-with-cpp -MMD -MP -MF"Core/Startup/startup_stm32f401retx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"


+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o: \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o View File


+ 27
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.su View File

@@ -0,0 +1,27 @@
stm32f4xx_hal.c:157:19:HAL_Init 8 static
stm32f4xx_hal.c:190:19:HAL_DeInit 8 static
stm32f4xx_hal.c:219:13:HAL_MspInit 4 static
stm32f4xx_hal.c:230:13:HAL_MspDeInit 4 static
stm32f4xx_hal.c:253:26:HAL_InitTick 16 static
stm32f4xx_hal.c:312:13:HAL_IncTick 4 static
stm32f4xx_hal.c:323:17:HAL_GetTick 4 static
stm32f4xx_hal.c:332:10:HAL_GetTickPrio 4 static
stm32f4xx_hal.c:341:19:HAL_SetTickFreq 24 static
stm32f4xx_hal.c:373:21:HAL_GetTickFreq 4 static
stm32f4xx_hal.c:389:13:HAL_Delay 24 static
stm32f4xx_hal.c:415:13:HAL_SuspendTick 4 static
stm32f4xx_hal.c:431:13:HAL_ResumeTick 4 static
stm32f4xx_hal.c:441:10:HAL_GetHalVersion 4 static
stm32f4xx_hal.c:450:10:HAL_GetREVID 4 static
stm32f4xx_hal.c:459:10:HAL_GetDEVID 4 static
stm32f4xx_hal.c:468:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
stm32f4xx_hal.c:477:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
stm32f4xx_hal.c:486:6:HAL_DBGMCU_EnableDBGStopMode 4 static
stm32f4xx_hal.c:495:6:HAL_DBGMCU_DisableDBGStopMode 4 static
stm32f4xx_hal.c:504:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
stm32f4xx_hal.c:513:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static
stm32f4xx_hal.c:524:6:HAL_EnableCompensationCell 4 static
stm32f4xx_hal.c:535:6:HAL_DisableCompensationCell 4 static
stm32f4xx_hal.c:544:10:HAL_GetUIDw0 4 static
stm32f4xx_hal.c:553:10:HAL_GetUIDw1 4 static
stm32f4xx_hal.c:562:10:HAL_GetUIDw2 4 static

+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o: \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o View File


+ 32
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.su View File

@@ -0,0 +1,32 @@
core_cm4.h:1657:22:__NVIC_SetPriorityGrouping 24 static
core_cm4.h:1676:26:__NVIC_GetPriorityGrouping 4 static
core_cm4.h:1688:22:__NVIC_EnableIRQ 16 static
core_cm4.h:1724:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm
core_cm4.h:1743:26:__NVIC_GetPendingIRQ 16 static
core_cm4.h:1762:22:__NVIC_SetPendingIRQ 16 static
core_cm4.h:1777:22:__NVIC_ClearPendingIRQ 16 static
core_cm4.h:1794:26:__NVIC_GetActive 16 static
core_cm4.h:1816:22:__NVIC_SetPriority 16 static
core_cm4.h:1838:26:__NVIC_GetPriority 16 static
core_cm4.h:1863:26:NVIC_EncodePriority 40 static
core_cm4.h:1890:22:NVIC_DecodePriority 40 static
core_cm4.h:1939:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
core_cm4.h:2022:26:SysTick_Config 16 static
stm32f4xx_hal_cortex.c:143:6:HAL_NVIC_SetPriorityGrouping 16 static
stm32f4xx_hal_cortex.c:165:6:HAL_NVIC_SetPriority 32 static
stm32f4xx_hal_cortex.c:187:6:HAL_NVIC_EnableIRQ 16 static
stm32f4xx_hal_cortex.c:203:6:HAL_NVIC_DisableIRQ 16 static
stm32f4xx_hal_cortex.c:216:6:HAL_NVIC_SystemReset 8 static
stm32f4xx_hal_cortex.c:229:10:HAL_SYSTICK_Config 16 static
stm32f4xx_hal_cortex.c:258:6:HAL_MPU_Disable 4 static,ignoring_inline_asm
stm32f4xx_hal_cortex.c:281:6:HAL_MPU_Enable 16 static,ignoring_inline_asm
stm32f4xx_hal_cortex.c:300:6:HAL_MPU_ConfigRegion 16 static
stm32f4xx_hal_cortex.c:344:10:HAL_NVIC_GetPriorityGrouping 8 static
stm32f4xx_hal_cortex.c:371:6:HAL_NVIC_GetPriority 24 static
stm32f4xx_hal_cortex.c:386:6:HAL_NVIC_SetPendingIRQ 16 static
stm32f4xx_hal_cortex.c:404:10:HAL_NVIC_GetPendingIRQ 16 static
stm32f4xx_hal_cortex.c:420:6:HAL_NVIC_ClearPendingIRQ 16 static
stm32f4xx_hal_cortex.c:437:10:HAL_NVIC_GetActive 16 static
stm32f4xx_hal_cortex.c:454:6:HAL_SYSTICK_CLKSourceConfig 16 static
stm32f4xx_hal_cortex.c:472:6:HAL_SYSTICK_IRQHandler 8 static
stm32f4xx_hal_cortex.c:481:13:HAL_SYSTICK_Callback 4 static

+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o: \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

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BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o View File


+ 15
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.su View File

@@ -0,0 +1,15 @@
stm32f4xx_hal_dma.c:171:19:HAL_DMA_Init 32 static
stm32f4xx_hal_dma.c:310:19:HAL_DMA_DeInit 24 static
stm32f4xx_hal_dma.c:408:19:HAL_DMA_Start 32 static
stm32f4xx_hal_dma.c:452:19:HAL_DMA_Start_IT 32 static
stm32f4xx_hal_dma.c:514:19:HAL_DMA_Abort 24 static
stm32f4xx_hal_dma.c:581:19:HAL_DMA_Abort_IT 16 static
stm32f4xx_hal_dma.c:611:19:HAL_DMA_PollForTransfer 48 static
stm32f4xx_hal_dma.c:747:6:HAL_DMA_IRQHandler 32 static
stm32f4xx_hal_dma.c:968:19:HAL_DMA_RegisterCallback 32 static
stm32f4xx_hal_dma.c:1028:19:HAL_DMA_UnRegisterCallback 24 static
stm32f4xx_hal_dma.c:1113:22:HAL_DMA_GetState 16 static
stm32f4xx_hal_dma.c:1124:10:HAL_DMA_GetError 16 static
stm32f4xx_hal_dma.c:1150:13:DMA_SetConfig 24 static
stm32f4xx_hal_dma.c:1184:17:DMA_CalcBaseAndBitshift 24 static
stm32f4xx_hal_dma.c:1212:26:DMA_CheckFifoParam 24 static

+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o: \
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BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o View File


+ 4
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.su View File

@@ -0,0 +1,4 @@
stm32f4xx_hal_dma_ex.c:101:19:HAL_DMAEx_MultiBufferStart 32 static
stm32f4xx_hal_dma_ex.c:155:19:HAL_DMAEx_MultiBufferStart_IT 32 static
stm32f4xx_hal_dma_ex.c:240:19:HAL_DMAEx_ChangeMemory 24 static
stm32f4xx_hal_dma_ex.c:277:13:DMA_MultiBufferSetConfig 24 static

+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o: \
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BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o View File


+ 9
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.su View File

@@ -0,0 +1,9 @@
stm32f4xx_hal_exti.c:143:19:HAL_EXTI_SetConfigLine 32 static
stm32f4xx_hal_exti.c:238:19:HAL_EXTI_GetConfigLine 32 static
stm32f4xx_hal_exti.c:327:19:HAL_EXTI_ClearConfigLine 32 static
stm32f4xx_hal_exti.c:380:19:HAL_EXTI_RegisterCallback 32 static
stm32f4xx_hal_exti.c:405:19:HAL_EXTI_GetHandle 16 static
stm32f4xx_hal_exti.c:445:6:HAL_EXTI_IRQHandler 24 static
stm32f4xx_hal_exti.c:477:10:HAL_EXTI_GetPending 32 static
stm32f4xx_hal_exti.c:506:6:HAL_EXTI_ClearPending 24 static
stm32f4xx_hal_exti.c:527:6:HAL_EXTI_GenerateSWI 24 static

+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o: \
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BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o View File


+ 17
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SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.su View File

@@ -0,0 +1,17 @@
stm32f4xx_hal_flash.c:156:19:HAL_FLASH_Program 32 static
stm32f4xx_hal_flash.c:214:19:HAL_FLASH_Program_IT 32 static
stm32f4xx_hal_flash.c:261:6:HAL_FLASH_IRQHandler 16 static
stm32f4xx_hal_flash.c:384:13:HAL_FLASH_EndOfOperationCallback 16 static
stm32f4xx_hal_flash.c:401:13:HAL_FLASH_OperationErrorCallback 16 static
stm32f4xx_hal_flash.c:433:19:HAL_FLASH_Unlock 16 static
stm32f4xx_hal_flash.c:457:19:HAL_FLASH_Lock 4 static
stm32f4xx_hal_flash.c:469:19:HAL_FLASH_OB_Unlock 4 static
stm32f4xx_hal_flash.c:489:19:HAL_FLASH_OB_Lock 4 static
stm32f4xx_hal_flash.c:501:19:HAL_FLASH_OB_Launch 8 static
stm32f4xx_hal_flash.c:538:10:HAL_FLASH_GetError 4 static
stm32f4xx_hal_flash.c:552:19:FLASH_WaitForLastOperation 24 static
stm32f4xx_hal_flash.c:612:13:FLASH_Program_DoubleWord 24 static,ignoring_inline_asm
stm32f4xx_hal_flash.c:646:13:FLASH_Program_Word 16 static
stm32f4xx_hal_flash.c:671:13:FLASH_Program_HalfWord 16 static
stm32f4xx_hal_flash.c:696:13:FLASH_Program_Byte 16 static
stm32f4xx_hal_flash.c:713:13:FLASH_SetErrorCode 4 static

+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o: \
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../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o View File


+ 22
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.su View File

@@ -0,0 +1,22 @@
stm32f4xx_hal_flash_ex.c:162:19:HAL_FLASHEx_Erase 24 static
stm32f4xx_hal_flash_ex.c:233:19:HAL_FLASHEx_Erase_IT 24 static
stm32f4xx_hal_flash_ex.c:286:19:HAL_FLASHEx_OBProgram 24 static
stm32f4xx_hal_flash_ex.c:345:6:HAL_FLASHEx_OBGetConfig 16 static
stm32f4xx_hal_flash_ex.c:374:19:HAL_FLASHEx_AdvOBProgram 24 static
stm32f4xx_hal_flash_ex.c:430:6:HAL_FLASHEx_AdvOBGetConfig 16 static
stm32f4xx_hal_flash_ex.c:462:19:HAL_FLASHEx_OB_SelectPCROP 16 static
stm32f4xx_hal_flash_ex.c:487:19:HAL_FLASHEx_OB_DeSelectPCROP 16 static
stm32f4xx_hal_flash_ex.c:953:13:FLASH_MassErase 16 static
stm32f4xx_hal_flash_ex.c:982:6:FLASH_Erase_Sector 24 static
stm32f4xx_hal_flash_ex.c:1032:26:FLASH_OB_EnableWRP 24 static
stm32f4xx_hal_flash_ex.c:1068:26:FLASH_OB_DisableWRP 24 static
stm32f4xx_hal_flash_ex.c:1101:26:FLASH_OB_EnablePCROP 24 static
stm32f4xx_hal_flash_ex.c:1129:26:FLASH_OB_DisablePCROP 24 static
stm32f4xx_hal_flash_ex.c:1162:26:FLASH_OB_RDP_LevelConfig 24 static
stm32f4xx_hal_flash_ex.c:1196:26:FLASH_OB_UserConfig 24 static
stm32f4xx_hal_flash_ex.c:1231:26:FLASH_OB_BOR_LevelConfig 16 static
stm32f4xx_hal_flash_ex.c:1249:16:FLASH_OB_GetUser 4 static
stm32f4xx_hal_flash_ex.c:1259:17:FLASH_OB_GetWRP 4 static
stm32f4xx_hal_flash_ex.c:1273:16:FLASH_OB_GetRDP 16 static
stm32f4xx_hal_flash_ex.c:1301:16:FLASH_OB_GetBOR 4 static
stm32f4xx_hal_flash_ex.c:1311:6:FLASH_FlushCaches 4 static

+ 83
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.d View File

@@ -0,0 +1,83 @@
Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o: \
../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
../Core/Inc/stm32f4xx_hal_conf.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
../Drivers/CMSIS/Include/core_cm4.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h \
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:

../Core/Inc/stm32f4xx_hal_conf.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:

../Drivers/CMSIS/Include/core_cm4.h:

../Drivers/CMSIS/Include/cmsis_version.h:

../Drivers/CMSIS/Include/cmsis_compiler.h:

../Drivers/CMSIS/Include/cmsis_gcc.h:

../Drivers/CMSIS/Include/mpu_armv7.h:

../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h:

../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

BIN
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o View File


+ 0
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.su View File


+ 0
- 0
SD_Card_F401RE/Debug/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.d View File


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