: /** * @brief The application entry point. * @retval int */ int main(void) { 8001834: b5b0 push {r4, r5, r7, lr} 8001836: b0ae sub sp, #184 ; 0xb8 8001838: af02 add r7, sp, #8 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 800183a: f000 fb6b bl 8001f14 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 800183e: f000 f8e1 bl 8001a04 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8001842: f000 f9e5 bl 8001c10 MX_USART2_UART_Init(); 8001846: f000 f9b9 bl 8001bbc MX_RTC_Init(); 800184a: f000 f95f bl 8001b0c /* USER CODE BEGIN 2 */ int hours = 0; 800184e: 2300 movs r3, #0 8001850: f8c7 309c str.w r3, [r7, #156] ; 0x9c int minutes = 0; 8001854: 2300 movs r3, #0 8001856: f8c7 3098 str.w r3, [r7, #152] ; 0x98 int seconds = 0; 800185a: 2300 movs r3, #0 800185c: f8c7 3094 str.w r3, [r7, #148] ; 0x94 int weekDay = 0; 8001860: 2300 movs r3, #0 8001862: f8c7 30ac str.w r3, [r7, #172] ; 0xac int month = 0; 8001866: 2300 movs r3, #0 8001868: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 int date = 0; 800186c: 2300 movs r3, #0 800186e: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 int year = 0; 8001872: 2300 movs r3, #0 8001874: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 int sunrise_h = 0; 8001878: 2300 movs r3, #0 800187a: f8c7 3090 str.w r3, [r7, #144] ; 0x90 int sunset_h = 0; 800187e: 2300 movs r3, #0 8001880: f8c7 308c str.w r3, [r7, #140] ; 0x8c int int_sunrise_min = 0; 8001884: 2300 movs r3, #0 8001886: f8c7 3088 str.w r3, [r7, #136] ; 0x88 int int_sunset_min = 0; 800188a: 2300 movs r3, #0 800188c: f8c7 3084 str.w r3, [r7, #132] ; 0x84 int sunrise_time[2] = {0}; 8001890: f107 0378 add.w r3, r7, #120 ; 0x78 8001894: 2200 movs r2, #0 8001896: 601a str r2, [r3, #0] 8001898: 605a str r2, [r3, #4] int sunset_time[2] = {0}; 800189a: f107 0370 add.w r3, r7, #112 ; 0x70 800189e: 2200 movs r2, #0 80018a0: 601a str r2, [r3, #0] 80018a2: 605a str r2, [r3, #4] int tomorrows_date[4] = {0}; 80018a4: f107 0360 add.w r3, r7, #96 ; 0x60 80018a8: 2200 movs r2, #0 80018aa: 601a str r2, [r3, #0] 80018ac: 605a str r2, [r3, #4] 80018ae: 609a str r2, [r3, #8] 80018b0: 60da str r2, [r3, #12] int DaysInMonth[12] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; 80018b2: 4b4d ldr r3, [pc, #308] ; (80019e8 ) 80018b4: f107 0430 add.w r4, r7, #48 ; 0x30 80018b8: 461d mov r5, r3 80018ba: cd0f ldmia r5!, {r0, r1, r2, r3} 80018bc: c40f stmia r4!, {r0, r1, r2, r3} 80018be: cd0f ldmia r5!, {r0, r1, r2, r3} 80018c0: c40f stmia r4!, {r0, r1, r2, r3} 80018c2: e895 000f ldmia.w r5, {r0, r1, r2, r3} 80018c6: e884 000f stmia.w r4, {r0, r1, r2, r3} int DaysInMonthLeapYear[12] = {31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}; 80018ca: 4b48 ldr r3, [pc, #288] ; (80019ec ) 80018cc: 463c mov r4, r7 80018ce: 461d mov r5, r3 80018d0: cd0f ldmia r5!, {r0, r1, r2, r3} 80018d2: c40f stmia r4!, {r0, r1, r2, r3} 80018d4: cd0f ldmia r5!, {r0, r1, r2, r3} 80018d6: c40f stmia r4!, {r0, r1, r2, r3} 80018d8: e895 000f ldmia.w r5, {r0, r1, r2, r3} 80018dc: e884 000f stmia.w r4, {r0, r1, r2, r3} bool leap_year = false; 80018e0: 2300 movs r3, #0 80018e2: f887 3083 strb.w r3, [r7, #131] ; 0x83 /* USER CODE BEGIN WHILE */ while (1) { //Get Time and Date if (HAL_RTC_GetTime(&hrtc, &sTime, RTC_FORMAT_BIN) == HAL_OK) 80018e6: 2200 movs r2, #0 80018e8: 4941 ldr r1, [pc, #260] ; (80019f0 ) 80018ea: 4842 ldr r0, [pc, #264] ; (80019f4 ) 80018ec: f001 fd2e bl 800334c 80018f0: 4603 mov r3, r0 80018f2: 2b00 cmp r3, #0 80018f4: d10b bne.n 800190e { hours = sTime.Hours; 80018f6: 4b3e ldr r3, [pc, #248] ; (80019f0 ) 80018f8: 781b ldrb r3, [r3, #0] 80018fa: f8c7 309c str.w r3, [r7, #156] ; 0x9c minutes = sTime.Minutes; 80018fe: 4b3c ldr r3, [pc, #240] ; (80019f0 ) 8001900: 785b ldrb r3, [r3, #1] 8001902: f8c7 3098 str.w r3, [r7, #152] ; 0x98 seconds = sTime.Seconds; 8001906: 4b3a ldr r3, [pc, #232] ; (80019f0 ) 8001908: 789b ldrb r3, [r3, #2] 800190a: f8c7 3094 str.w r3, [r7, #148] ; 0x94 } if (HAL_RTC_GetDate(&hrtc, &sDate, RTC_FORMAT_BIN) == HAL_OK) 800190e: 2200 movs r2, #0 8001910: 4939 ldr r1, [pc, #228] ; (80019f8 ) 8001912: 4838 ldr r0, [pc, #224] ; (80019f4 ) 8001914: f001 fe1f bl 8003556 8001918: 4603 mov r3, r0 800191a: 2b00 cmp r3, #0 800191c: d111 bne.n 8001942 { weekDay = sDate.WeekDay; 800191e: 4b36 ldr r3, [pc, #216] ; (80019f8 ) 8001920: 781b ldrb r3, [r3, #0] 8001922: f8c7 30ac str.w r3, [r7, #172] ; 0xac month = sDate.Month; 8001926: 4b34 ldr r3, [pc, #208] ; (80019f8 ) 8001928: 785b ldrb r3, [r3, #1] 800192a: f8c7 30a8 str.w r3, [r7, #168] ; 0xa8 date = sDate.Date; 800192e: 4b32 ldr r3, [pc, #200] ; (80019f8 ) 8001930: 789b ldrb r3, [r3, #2] 8001932: f8c7 30a4 str.w r3, [r7, #164] ; 0xa4 year = 2000 + sDate.Year; 8001936: 4b30 ldr r3, [pc, #192] ; (80019f8 ) 8001938: 78db ldrb r3, [r3, #3] 800193a: f503 63fa add.w r3, r3, #2000 ; 0x7d0 800193e: f8c7 30a0 str.w r3, [r7, #160] ; 0xa0 } // check for leap year leap_year = leap_year_check(year); 8001942: f8d7 00a0 ldr.w r0, [r7, #160] ; 0xa0 8001946: f7ff faa3 bl 8000e90 800194a: 4603 mov r3, r0 800194c: 2b00 cmp r3, #0 800194e: bf14 ite ne 8001950: 2301 movne r3, #1 8001952: 2300 moveq r3, #0 8001954: f887 3083 strb.w r3, [r7, #131] ; 0x83 if (leap_year) 8001958: f897 3083 ldrb.w r3, [r7, #131] ; 0x83 800195c: 2b00 cmp r3, #0 800195e: d00f beq.n 8001980 { //Calculate tomorrow's date calc_tomorrows_date(date, weekDay, month, year, DaysInMonthLeapYear, tomorrows_date); 8001960: f107 0360 add.w r3, r7, #96 ; 0x60 8001964: 9301 str r3, [sp, #4] 8001966: 463b mov r3, r7 8001968: 9300 str r3, [sp, #0] 800196a: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0 800196e: f8d7 20a8 ldr.w r2, [r7, #168] ; 0xa8 8001972: f8d7 10ac ldr.w r1, [r7, #172] ; 0xac 8001976: f8d7 00a4 ldr.w r0, [r7, #164] ; 0xa4 800197a: f7ff fec1 bl 8001700 800197e: e00f b.n 80019a0 } else { //Calculate tomorrow's date calc_tomorrows_date(date, weekDay, month, year, DaysInMonth, tomorrows_date); 8001980: f107 0360 add.w r3, r7, #96 ; 0x60 8001984: 9301 str r3, [sp, #4] 8001986: f107 0330 add.w r3, r7, #48 ; 0x30 800198a: 9300 str r3, [sp, #0] 800198c: f8d7 30a0 ldr.w r3, [r7, #160] ; 0xa0 8001990: f8d7 20a8 ldr.w r2, [r7, #168] ; 0xa8 8001994: f8d7 10ac ldr.w r1, [r7, #172] ; 0xac 8001998: f8d7 00a4 ldr.w r0, [r7, #164] ; 0xa4 800199c: f7ff feb0 bl 8001700 } //Calculate sunrise and sunset time for tomorrow calc_sunrise_sunset(tomorrows_date[0], tomorrows_date[2], tomorrows_date[3], sunrise_time, sunset_time); 80019a0: 6e38 ldr r0, [r7, #96] ; 0x60 80019a2: 6eb9 ldr r1, [r7, #104] ; 0x68 80019a4: 6efa ldr r2, [r7, #108] ; 0x6c 80019a6: f107 0478 add.w r4, r7, #120 ; 0x78 80019aa: f107 0370 add.w r3, r7, #112 ; 0x70 80019ae: 9300 str r3, [sp, #0] 80019b0: 4623 mov r3, r4 80019b2: f7ff fb1d bl 8000ff0 set_Alarm(16, 22, 1); 80019b6: 2201 movs r2, #1 80019b8: 2116 movs r1, #22 80019ba: 2010 movs r0, #16 80019bc: f7ff fee4 bl 8001788 HAL_Delay(5000); 80019c0: f241 3088 movw r0, #5000 ; 0x1388 80019c4: f000 fb18 bl 8001ff8 transmit_uart("Ich gehe schlafen!\r\n"); 80019c8: 480c ldr r0, [pc, #48] ; (80019fc ) 80019ca: f7ff ff1d bl 8001808 // Suspend Tick increment to prevent wake up by Systick interrupt HAL_SuspendTick(); 80019ce: f000 fb35 bl 800203c HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); //Interrupt for wake up 80019d2: 2101 movs r1, #1 80019d4: 2000 movs r0, #0 80019d6: f000 fdff bl 80025d8 HAL_ResumeTick(); 80019da: f000 fb3f bl 800205c transmit_uart("Bin wieder wach!\r\n"); 80019de: 4808 ldr r0, [pc, #32] ; (8001a00 ) 80019e0: f7ff ff12 bl 8001808 if (HAL_RTC_GetTime(&hrtc, &sTime, RTC_FORMAT_BIN) == HAL_OK) 80019e4: e77f b.n 80018e6 80019e6: bf00 nop 80019e8: 08005fac .word 0x08005fac 80019ec: 08005fdc .word 0x08005fdc 80019f0: 200000a4 .word 0x200000a4 80019f4: 200000e4 .word 0x200000e4 80019f8: 200000e0 .word 0x200000e0 80019fc: 08005f80 .word 0x08005f80 8001a00: 08005f98 .word 0x08005f98 08001a04 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8001a04: b580 push {r7, lr} 8001a06: b098 sub sp, #96 ; 0x60 8001a08: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 8001a0a: f107 0330 add.w r3, r7, #48 ; 0x30 8001a0e: 2230 movs r2, #48 ; 0x30 8001a10: 2100 movs r1, #0 8001a12: 4618 mov r0, r3 8001a14: f002 fcdc bl 80043d0 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8001a18: f107 031c add.w r3, r7, #28 8001a1c: 2200 movs r2, #0 8001a1e: 601a str r2, [r3, #0] 8001a20: 605a str r2, [r3, #4] 8001a22: 609a str r2, [r3, #8] 8001a24: 60da str r2, [r3, #12] 8001a26: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 8001a28: f107 0308 add.w r3, r7, #8 8001a2c: 2200 movs r2, #0 8001a2e: 601a str r2, [r3, #0] 8001a30: 605a str r2, [r3, #4] 8001a32: 609a str r2, [r3, #8] 8001a34: 60da str r2, [r3, #12] 8001a36: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); 8001a38: 2300 movs r3, #0 8001a3a: 607b str r3, [r7, #4] 8001a3c: 4b31 ldr r3, [pc, #196] ; (8001b04 ) 8001a3e: 6c1b ldr r3, [r3, #64] ; 0x40 8001a40: 4a30 ldr r2, [pc, #192] ; (8001b04 ) 8001a42: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8001a46: 6413 str r3, [r2, #64] ; 0x40 8001a48: 4b2e ldr r3, [pc, #184] ; (8001b04 ) 8001a4a: 6c1b ldr r3, [r3, #64] ; 0x40 8001a4c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001a50: 607b str r3, [r7, #4] 8001a52: 687b ldr r3, [r7, #4] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); 8001a54: 2300 movs r3, #0 8001a56: 603b str r3, [r7, #0] 8001a58: 4b2b ldr r3, [pc, #172] ; (8001b08 ) 8001a5a: 681b ldr r3, [r3, #0] 8001a5c: f423 4340 bic.w r3, r3, #49152 ; 0xc000 8001a60: 4a29 ldr r2, [pc, #164] ; (8001b08 ) 8001a62: f443 4300 orr.w r3, r3, #32768 ; 0x8000 8001a66: 6013 str r3, [r2, #0] 8001a68: 4b27 ldr r3, [pc, #156] ; (8001b08 ) 8001a6a: 681b ldr r3, [r3, #0] 8001a6c: f403 4340 and.w r3, r3, #49152 ; 0xc000 8001a70: 603b str r3, [r7, #0] 8001a72: 683b ldr r3, [r7, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI; 8001a74: 230a movs r3, #10 8001a76: 633b str r3, [r7, #48] ; 0x30 RCC_OscInitStruct.HSIState = RCC_HSI_ON; 8001a78: 2301 movs r3, #1 8001a7a: 63fb str r3, [r7, #60] ; 0x3c RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; 8001a7c: 2310 movs r3, #16 8001a7e: 643b str r3, [r7, #64] ; 0x40 RCC_OscInitStruct.LSIState = RCC_LSI_ON; 8001a80: 2301 movs r3, #1 8001a82: 647b str r3, [r7, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001a84: 2302 movs r3, #2 8001a86: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; 8001a88: 2300 movs r3, #0 8001a8a: 64fb str r3, [r7, #76] ; 0x4c RCC_OscInitStruct.PLL.PLLM = 16; 8001a8c: 2310 movs r3, #16 8001a8e: 653b str r3, [r7, #80] ; 0x50 RCC_OscInitStruct.PLL.PLLN = 336; 8001a90: f44f 73a8 mov.w r3, #336 ; 0x150 8001a94: 657b str r3, [r7, #84] ; 0x54 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; 8001a96: 2304 movs r3, #4 8001a98: 65bb str r3, [r7, #88] ; 0x58 RCC_OscInitStruct.PLL.PLLQ = 7; 8001a9a: 2307 movs r3, #7 8001a9c: 65fb str r3, [r7, #92] ; 0x5c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001a9e: f107 0330 add.w r3, r7, #48 ; 0x30 8001aa2: 4618 mov r0, r3 8001aa4: f000 fdb4 bl 8002610 8001aa8: 4603 mov r3, r0 8001aaa: 2b00 cmp r3, #0 8001aac: d001 beq.n 8001ab2 { Error_Handler(); 8001aae: f000 f91f bl 8001cf0 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001ab2: 230f movs r3, #15 8001ab4: 61fb str r3, [r7, #28] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001ab6: 2302 movs r3, #2 8001ab8: 623b str r3, [r7, #32] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8001aba: 2300 movs r3, #0 8001abc: 627b str r3, [r7, #36] ; 0x24 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8001abe: f44f 5380 mov.w r3, #4096 ; 0x1000 8001ac2: 62bb str r3, [r7, #40] ; 0x28 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8001ac4: 2300 movs r3, #0 8001ac6: 62fb str r3, [r7, #44] ; 0x2c if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) 8001ac8: f107 031c add.w r3, r7, #28 8001acc: 2102 movs r1, #2 8001ace: 4618 mov r0, r3 8001ad0: f001 f80e bl 8002af0 8001ad4: 4603 mov r3, r0 8001ad6: 2b00 cmp r3, #0 8001ad8: d001 beq.n 8001ade { Error_Handler(); 8001ada: f000 f909 bl 8001cf0 } PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC; 8001ade: 2302 movs r3, #2 8001ae0: 60bb str r3, [r7, #8] PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI; 8001ae2: f44f 7300 mov.w r3, #512 ; 0x200 8001ae6: 617b str r3, [r7, #20] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8001ae8: f107 0308 add.w r3, r7, #8 8001aec: 4618 mov r0, r3 8001aee: f001 f9f1 bl 8002ed4 8001af2: 4603 mov r3, r0 8001af4: 2b00 cmp r3, #0 8001af6: d001 beq.n 8001afc { Error_Handler(); 8001af8: f000 f8fa bl 8001cf0 } } 8001afc: bf00 nop 8001afe: 3760 adds r7, #96 ; 0x60 8001b00: 46bd mov sp, r7 8001b02: bd80 pop {r7, pc} 8001b04: 40023800 .word 0x40023800 8001b08: 40007000 .word 0x40007000 08001b0c : * @brief RTC Initialization Function * @param None * @retval None */ static void MX_RTC_Init(void) { 8001b0c: b580 push {r7, lr} 8001b0e: af00 add r7, sp, #0 /* USER CODE BEGIN RTC_Init 1 */ /* USER CODE END RTC_Init 1 */ /** Initialize RTC Only */ hrtc.Instance = RTC; 8001b10: 4b26 ldr r3, [pc, #152] ; (8001bac ) 8001b12: 4a27 ldr r2, [pc, #156] ; (8001bb0 ) 8001b14: 601a str r2, [r3, #0] hrtc.Init.HourFormat = RTC_HOURFORMAT_24; 8001b16: 4b25 ldr r3, [pc, #148] ; (8001bac ) 8001b18: 2200 movs r2, #0 8001b1a: 605a str r2, [r3, #4] hrtc.Init.AsynchPrediv = 127; 8001b1c: 4b23 ldr r3, [pc, #140] ; (8001bac ) 8001b1e: 227f movs r2, #127 ; 0x7f 8001b20: 609a str r2, [r3, #8] hrtc.Init.SynchPrediv = 255; 8001b22: 4b22 ldr r3, [pc, #136] ; (8001bac ) 8001b24: 22ff movs r2, #255 ; 0xff 8001b26: 60da str r2, [r3, #12] hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; 8001b28: 4b20 ldr r3, [pc, #128] ; (8001bac ) 8001b2a: 2200 movs r2, #0 8001b2c: 611a str r2, [r3, #16] hrtc.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH; 8001b2e: 4b1f ldr r3, [pc, #124] ; (8001bac ) 8001b30: 2200 movs r2, #0 8001b32: 615a str r2, [r3, #20] hrtc.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN; 8001b34: 4b1d ldr r3, [pc, #116] ; (8001bac ) 8001b36: 2200 movs r2, #0 8001b38: 619a str r2, [r3, #24] if (HAL_RTC_Init(&hrtc) != HAL_OK) 8001b3a: 481c ldr r0, [pc, #112] ; (8001bac ) 8001b3c: f001 fab8 bl 80030b0 8001b40: 4603 mov r3, r0 8001b42: 2b00 cmp r3, #0 8001b44: d001 beq.n 8001b4a { Error_Handler(); 8001b46: f000 f8d3 bl 8001cf0 /* USER CODE END Check_RTC_BKUP */ /** Initialize RTC and set the Time and Date */ sTime.Hours = 16; 8001b4a: 4b1a ldr r3, [pc, #104] ; (8001bb4 ) 8001b4c: 2210 movs r2, #16 8001b4e: 701a strb r2, [r3, #0] sTime.Minutes = 20; 8001b50: 4b18 ldr r3, [pc, #96] ; (8001bb4 ) 8001b52: 2214 movs r2, #20 8001b54: 705a strb r2, [r3, #1] sTime.Seconds = 30; 8001b56: 4b17 ldr r3, [pc, #92] ; (8001bb4 ) 8001b58: 221e movs r2, #30 8001b5a: 709a strb r2, [r3, #2] sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; 8001b5c: 4b15 ldr r3, [pc, #84] ; (8001bb4 ) 8001b5e: 2200 movs r2, #0 8001b60: 60da str r2, [r3, #12] sTime.StoreOperation = RTC_STOREOPERATION_RESET; 8001b62: 4b14 ldr r3, [pc, #80] ; (8001bb4 ) 8001b64: 2200 movs r2, #0 8001b66: 611a str r2, [r3, #16] if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK) 8001b68: 2200 movs r2, #0 8001b6a: 4912 ldr r1, [pc, #72] ; (8001bb4 ) 8001b6c: 480f ldr r0, [pc, #60] ; (8001bac ) 8001b6e: f001 fb30 bl 80031d2 8001b72: 4603 mov r3, r0 8001b74: 2b00 cmp r3, #0 8001b76: d001 beq.n 8001b7c { Error_Handler(); 8001b78: f000 f8ba bl 8001cf0 } sDate.WeekDay = RTC_WEEKDAY_MONDAY; 8001b7c: 4b0e ldr r3, [pc, #56] ; (8001bb8 ) 8001b7e: 2201 movs r2, #1 8001b80: 701a strb r2, [r3, #0] sDate.Month = RTC_MONTH_JANUARY; 8001b82: 4b0d ldr r3, [pc, #52] ; (8001bb8 ) 8001b84: 2201 movs r2, #1 8001b86: 705a strb r2, [r3, #1] sDate.Date = 11; 8001b88: 4b0b ldr r3, [pc, #44] ; (8001bb8 ) 8001b8a: 220b movs r2, #11 8001b8c: 709a strb r2, [r3, #2] sDate.Year = 21; 8001b8e: 4b0a ldr r3, [pc, #40] ; (8001bb8 ) 8001b90: 2215 movs r2, #21 8001b92: 70da strb r2, [r3, #3] if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BIN) != HAL_OK) 8001b94: 2200 movs r2, #0 8001b96: 4908 ldr r1, [pc, #32] ; (8001bb8 ) 8001b98: 4804 ldr r0, [pc, #16] ; (8001bac ) 8001b9a: f001 fc35 bl 8003408 8001b9e: 4603 mov r3, r0 8001ba0: 2b00 cmp r3, #0 8001ba2: d001 beq.n 8001ba8 { Error_Handler(); 8001ba4: f000 f8a4 bl 8001cf0 /* USER CODE BEGIN RTC_Init 2 */ /* USER CODE END RTC_Init 2 */ } 8001ba8: bf00 nop 8001baa: bd80 pop {r7, pc} 8001bac: 200000e4 .word 0x200000e4 8001bb0: 40002800 .word 0x40002800 8001bb4: 200000a4 .word 0x200000a4 8001bb8: 200000e0 .word 0x200000e0 08001bbc : * @brief USART2 Initialization Function * @param None * @retval None */ static void MX_USART2_UART_Init(void) { 8001bbc: b580 push {r7, lr} 8001bbe: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 8001bc0: 4b11 ldr r3, [pc, #68] ; (8001c08 ) 8001bc2: 4a12 ldr r2, [pc, #72] ; (8001c0c ) 8001bc4: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 8001bc6: 4b10 ldr r3, [pc, #64] ; (8001c08 ) 8001bc8: f44f 32e1 mov.w r2, #115200 ; 0x1c200 8001bcc: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 8001bce: 4b0e ldr r3, [pc, #56] ; (8001c08 ) 8001bd0: 2200 movs r2, #0 8001bd2: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8001bd4: 4b0c ldr r3, [pc, #48] ; (8001c08 ) 8001bd6: 2200 movs r2, #0 8001bd8: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 8001bda: 4b0b ldr r3, [pc, #44] ; (8001c08 ) 8001bdc: 2200 movs r2, #0 8001bde: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8001be0: 4b09 ldr r3, [pc, #36] ; (8001c08 ) 8001be2: 220c movs r2, #12 8001be4: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8001be6: 4b08 ldr r3, [pc, #32] ; (8001c08 ) 8001be8: 2200 movs r2, #0 8001bea: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8001bec: 4b06 ldr r3, [pc, #24] ; (8001c08 ) 8001bee: 2200 movs r2, #0 8001bf0: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8001bf2: 4805 ldr r0, [pc, #20] ; (8001c08 ) 8001bf4: f001 ff16 bl 8003a24 8001bf8: 4603 mov r3, r0 8001bfa: 2b00 cmp r3, #0 8001bfc: d001 beq.n 8001c02 { Error_Handler(); 8001bfe: f000 f877 bl 8001cf0 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 8001c02: bf00 nop 8001c04: bd80 pop {r7, pc} 8001c06: bf00 nop 8001c08: 20000104 .word 0x20000104 8001c0c: 40004400 .word 0x40004400 08001c10 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8001c10: b580 push {r7, lr} 8001c12: b08a sub sp, #40 ; 0x28 8001c14: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001c16: f107 0314 add.w r3, r7, #20 8001c1a: 2200 movs r2, #0 8001c1c: 601a str r2, [r3, #0] 8001c1e: 605a str r2, [r3, #4] 8001c20: 609a str r2, [r3, #8] 8001c22: 60da str r2, [r3, #12] 8001c24: 611a str r2, [r3, #16] /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8001c26: 2300 movs r3, #0 8001c28: 613b str r3, [r7, #16] 8001c2a: 4b2d ldr r3, [pc, #180] ; (8001ce0 ) 8001c2c: 6b1b ldr r3, [r3, #48] ; 0x30 8001c2e: 4a2c ldr r2, [pc, #176] ; (8001ce0 ) 8001c30: f043 0304 orr.w r3, r3, #4 8001c34: 6313 str r3, [r2, #48] ; 0x30 8001c36: 4b2a ldr r3, [pc, #168] ; (8001ce0 ) 8001c38: 6b1b ldr r3, [r3, #48] ; 0x30 8001c3a: f003 0304 and.w r3, r3, #4 8001c3e: 613b str r3, [r7, #16] 8001c40: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOH_CLK_ENABLE(); 8001c42: 2300 movs r3, #0 8001c44: 60fb str r3, [r7, #12] 8001c46: 4b26 ldr r3, [pc, #152] ; (8001ce0 ) 8001c48: 6b1b ldr r3, [r3, #48] ; 0x30 8001c4a: 4a25 ldr r2, [pc, #148] ; (8001ce0 ) 8001c4c: f043 0380 orr.w r3, r3, #128 ; 0x80 8001c50: 6313 str r3, [r2, #48] ; 0x30 8001c52: 4b23 ldr r3, [pc, #140] ; (8001ce0 ) 8001c54: 6b1b ldr r3, [r3, #48] ; 0x30 8001c56: f003 0380 and.w r3, r3, #128 ; 0x80 8001c5a: 60fb str r3, [r7, #12] 8001c5c: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c5e: 2300 movs r3, #0 8001c60: 60bb str r3, [r7, #8] 8001c62: 4b1f ldr r3, [pc, #124] ; (8001ce0 ) 8001c64: 6b1b ldr r3, [r3, #48] ; 0x30 8001c66: 4a1e ldr r2, [pc, #120] ; (8001ce0 ) 8001c68: f043 0301 orr.w r3, r3, #1 8001c6c: 6313 str r3, [r2, #48] ; 0x30 8001c6e: 4b1c ldr r3, [pc, #112] ; (8001ce0 ) 8001c70: 6b1b ldr r3, [r3, #48] ; 0x30 8001c72: f003 0301 and.w r3, r3, #1 8001c76: 60bb str r3, [r7, #8] 8001c78: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001c7a: 2300 movs r3, #0 8001c7c: 607b str r3, [r7, #4] 8001c7e: 4b18 ldr r3, [pc, #96] ; (8001ce0 ) 8001c80: 6b1b ldr r3, [r3, #48] ; 0x30 8001c82: 4a17 ldr r2, [pc, #92] ; (8001ce0 ) 8001c84: f043 0302 orr.w r3, r3, #2 8001c88: 6313 str r3, [r2, #48] ; 0x30 8001c8a: 4b15 ldr r3, [pc, #84] ; (8001ce0 ) 8001c8c: 6b1b ldr r3, [r3, #48] ; 0x30 8001c8e: f003 0302 and.w r3, r3, #2 8001c92: 607b str r3, [r7, #4] 8001c94: 687b ldr r3, [r7, #4] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); 8001c96: 2200 movs r2, #0 8001c98: 2120 movs r1, #32 8001c9a: 4812 ldr r0, [pc, #72] ; (8001ce4 ) 8001c9c: f000 fc82 bl 80025a4 /*Configure GPIO pin : B1_Pin */ GPIO_InitStruct.Pin = B1_Pin; 8001ca0: f44f 5300 mov.w r3, #8192 ; 0x2000 8001ca4: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; 8001ca6: 4b10 ldr r3, [pc, #64] ; (8001ce8 ) 8001ca8: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001caa: 2300 movs r3, #0 8001cac: 61fb str r3, [r7, #28] HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); 8001cae: f107 0314 add.w r3, r7, #20 8001cb2: 4619 mov r1, r3 8001cb4: 480d ldr r0, [pc, #52] ; (8001cec ) 8001cb6: f000 faf3 bl 80022a0 /*Configure GPIO pin : LD2_Pin */ GPIO_InitStruct.Pin = LD2_Pin; 8001cba: 2320 movs r3, #32 8001cbc: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001cbe: 2301 movs r3, #1 8001cc0: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001cc2: 2300 movs r3, #0 8001cc4: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001cc6: 2300 movs r3, #0 8001cc8: 623b str r3, [r7, #32] HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); 8001cca: f107 0314 add.w r3, r7, #20 8001cce: 4619 mov r1, r3 8001cd0: 4804 ldr r0, [pc, #16] ; (8001ce4 ) 8001cd2: f000 fae5 bl 80022a0 } 8001cd6: bf00 nop 8001cd8: 3728 adds r7, #40 ; 0x28 8001cda: 46bd mov sp, r7 8001cdc: bd80 pop {r7, pc} 8001cde: bf00 nop 8001ce0: 40023800 .word 0x40023800 8001ce4: 40020000 .word 0x40020000 8001ce8: 10210000 .word 0x10210000 8001cec: 40020800 .word 0x40020800 08001cf0 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001cf0: b480 push {r7} 8001cf2: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8001cf4: b672 cpsid i /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8001cf6: e7fe b.n 8001cf6 08001cf8 : * @brief Alarm callback * @param hrtc: RTC handle * @retval None */ void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc) { 8001cf8: b580 push {r7, lr} 8001cfa: b082 sub sp, #8 8001cfc: af00 add r7, sp, #0 8001cfe: 6078 str r0, [r7, #4] /* Alarm generation */ transmit_uart("Alarm!!!!\r\n"); 8001d00: 4803 ldr r0, [pc, #12] ; (8001d10 ) 8001d02: f7ff fd81 bl 8001808 } 8001d06: bf00 nop 8001d08: 3708 adds r7, #8 8001d0a: 46bd mov sp, r7 8001d0c: bd80 pop {r7, pc} 8001d0e: bf00 nop 8001d10: 0800600c .word 0x0800600c 08001d14 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8001d14: b580 push {r7, lr} 8001d16: b082 sub sp, #8 8001d18: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8001d1a: 2300 movs r3, #0 8001d1c: 607b str r3, [r7, #4] 8001d1e: 4b10 ldr r3, [pc, #64] ; (8001d60 ) 8001d20: 6c5b ldr r3, [r3, #68] ; 0x44 8001d22: 4a0f ldr r2, [pc, #60] ; (8001d60 ) 8001d24: f443 4380 orr.w r3, r3, #16384 ; 0x4000 8001d28: 6453 str r3, [r2, #68] ; 0x44 8001d2a: 4b0d ldr r3, [pc, #52] ; (8001d60 ) 8001d2c: 6c5b ldr r3, [r3, #68] ; 0x44 8001d2e: f403 4380 and.w r3, r3, #16384 ; 0x4000 8001d32: 607b str r3, [r7, #4] 8001d34: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 8001d36: 2300 movs r3, #0 8001d38: 603b str r3, [r7, #0] 8001d3a: 4b09 ldr r3, [pc, #36] ; (8001d60 ) 8001d3c: 6c1b ldr r3, [r3, #64] ; 0x40 8001d3e: 4a08 ldr r2, [pc, #32] ; (8001d60 ) 8001d40: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8001d44: 6413 str r3, [r2, #64] ; 0x40 8001d46: 4b06 ldr r3, [pc, #24] ; (8001d60 ) 8001d48: 6c1b ldr r3, [r3, #64] ; 0x40 8001d4a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8001d4e: 603b str r3, [r7, #0] 8001d50: 683b ldr r3, [r7, #0] HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0); 8001d52: 2007 movs r0, #7 8001d54: f000 fa62 bl 800221c /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001d58: bf00 nop 8001d5a: 3708 adds r7, #8 8001d5c: 46bd mov sp, r7 8001d5e: bd80 pop {r7, pc} 8001d60: 40023800 .word 0x40023800 08001d64 : * This function configures the hardware resources used in this example * @param hrtc: RTC handle pointer * @retval None */ void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) { 8001d64: b580 push {r7, lr} 8001d66: b082 sub sp, #8 8001d68: af00 add r7, sp, #0 8001d6a: 6078 str r0, [r7, #4] if(hrtc->Instance==RTC) 8001d6c: 687b ldr r3, [r7, #4] 8001d6e: 681b ldr r3, [r3, #0] 8001d70: 4a08 ldr r2, [pc, #32] ; (8001d94 ) 8001d72: 4293 cmp r3, r2 8001d74: d10a bne.n 8001d8c { /* USER CODE BEGIN RTC_MspInit 0 */ /* USER CODE END RTC_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_RTC_ENABLE(); 8001d76: 4b08 ldr r3, [pc, #32] ; (8001d98 ) 8001d78: 2201 movs r2, #1 8001d7a: 601a str r2, [r3, #0] /* RTC interrupt Init */ HAL_NVIC_SetPriority(RTC_Alarm_IRQn, 0, 0); 8001d7c: 2200 movs r2, #0 8001d7e: 2100 movs r1, #0 8001d80: 2029 movs r0, #41 ; 0x29 8001d82: f000 fa56 bl 8002232 HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn); 8001d86: 2029 movs r0, #41 ; 0x29 8001d88: f000 fa6f bl 800226a /* USER CODE BEGIN RTC_MspInit 1 */ /* USER CODE END RTC_MspInit 1 */ } } 8001d8c: bf00 nop 8001d8e: 3708 adds r7, #8 8001d90: 46bd mov sp, r7 8001d92: bd80 pop {r7, pc} 8001d94: 40002800 .word 0x40002800 8001d98: 42470e3c .word 0x42470e3c 08001d9c : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001d9c: b580 push {r7, lr} 8001d9e: b08a sub sp, #40 ; 0x28 8001da0: af00 add r7, sp, #0 8001da2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001da4: f107 0314 add.w r3, r7, #20 8001da8: 2200 movs r2, #0 8001daa: 601a str r2, [r3, #0] 8001dac: 605a str r2, [r3, #4] 8001dae: 609a str r2, [r3, #8] 8001db0: 60da str r2, [r3, #12] 8001db2: 611a str r2, [r3, #16] if(huart->Instance==USART2) 8001db4: 687b ldr r3, [r7, #4] 8001db6: 681b ldr r3, [r3, #0] 8001db8: 4a19 ldr r2, [pc, #100] ; (8001e20 ) 8001dba: 4293 cmp r3, r2 8001dbc: d12b bne.n 8001e16 { /* USER CODE BEGIN USART2_MspInit 0 */ /* USER CODE END USART2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_USART2_CLK_ENABLE(); 8001dbe: 2300 movs r3, #0 8001dc0: 613b str r3, [r7, #16] 8001dc2: 4b18 ldr r3, [pc, #96] ; (8001e24 ) 8001dc4: 6c1b ldr r3, [r3, #64] ; 0x40 8001dc6: 4a17 ldr r2, [pc, #92] ; (8001e24 ) 8001dc8: f443 3300 orr.w r3, r3, #131072 ; 0x20000 8001dcc: 6413 str r3, [r2, #64] ; 0x40 8001dce: 4b15 ldr r3, [pc, #84] ; (8001e24 ) 8001dd0: 6c1b ldr r3, [r3, #64] ; 0x40 8001dd2: f403 3300 and.w r3, r3, #131072 ; 0x20000 8001dd6: 613b str r3, [r7, #16] 8001dd8: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 8001dda: 2300 movs r3, #0 8001ddc: 60fb str r3, [r7, #12] 8001dde: 4b11 ldr r3, [pc, #68] ; (8001e24 ) 8001de0: 6b1b ldr r3, [r3, #48] ; 0x30 8001de2: 4a10 ldr r2, [pc, #64] ; (8001e24 ) 8001de4: f043 0301 orr.w r3, r3, #1 8001de8: 6313 str r3, [r2, #48] ; 0x30 8001dea: 4b0e ldr r3, [pc, #56] ; (8001e24 ) 8001dec: 6b1b ldr r3, [r3, #48] ; 0x30 8001dee: f003 0301 and.w r3, r3, #1 8001df2: 60fb str r3, [r7, #12] 8001df4: 68fb ldr r3, [r7, #12] /**USART2 GPIO Configuration PA2 ------> USART2_TX PA3 ------> USART2_RX */ GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; 8001df6: 230c movs r3, #12 8001df8: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001dfa: 2302 movs r3, #2 8001dfc: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001dfe: 2300 movs r3, #0 8001e00: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001e02: 2300 movs r3, #0 8001e04: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 8001e06: 2307 movs r3, #7 8001e08: 627b str r3, [r7, #36] ; 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001e0a: f107 0314 add.w r3, r7, #20 8001e0e: 4619 mov r1, r3 8001e10: 4805 ldr r0, [pc, #20] ; (8001e28 ) 8001e12: f000 fa45 bl 80022a0 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8001e16: bf00 nop 8001e18: 3728 adds r7, #40 ; 0x28 8001e1a: 46bd mov sp, r7 8001e1c: bd80 pop {r7, pc} 8001e1e: bf00 nop 8001e20: 40004400 .word 0x40004400 8001e24: 40023800 .word 0x40023800 8001e28: 40020000 .word 0x40020000 08001e2c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8001e2c: b480 push {r7} 8001e2e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8001e30: e7fe b.n 8001e30 08001e32 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001e32: b480 push {r7} 8001e34: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8001e36: e7fe b.n 8001e36 08001e38 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001e38: b480 push {r7} 8001e3a: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8001e3c: e7fe b.n 8001e3c 08001e3e : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { 8001e3e: b480 push {r7} 8001e40: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8001e42: e7fe b.n 8001e42 08001e44 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001e44: b480 push {r7} 8001e46: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8001e48: e7fe b.n 8001e48 08001e4a : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8001e4a: b480 push {r7} 8001e4c: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8001e4e: bf00 nop 8001e50: 46bd mov sp, r7 8001e52: f85d 7b04 ldr.w r7, [sp], #4 8001e56: 4770 bx lr 08001e58 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8001e58: b480 push {r7} 8001e5a: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8001e5c: bf00 nop 8001e5e: 46bd mov sp, r7 8001e60: f85d 7b04 ldr.w r7, [sp], #4 8001e64: 4770 bx lr 08001e66 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8001e66: b480 push {r7} 8001e68: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8001e6a: bf00 nop 8001e6c: 46bd mov sp, r7 8001e6e: f85d 7b04 ldr.w r7, [sp], #4 8001e72: 4770 bx lr 08001e74 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8001e74: b580 push {r7, lr} 8001e76: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001e78: f000 f89e bl 8001fb8 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8001e7c: bf00 nop 8001e7e: bd80 pop {r7, pc} 08001e80 : /** * @brief This function handles RTC alarms A and B interrupt through EXTI line 17. */ void RTC_Alarm_IRQHandler(void) { 8001e80: b580 push {r7, lr} 8001e82: af00 add r7, sp, #0 /* USER CODE BEGIN RTC_Alarm_IRQn 0 */ /* USER CODE END RTC_Alarm_IRQn 0 */ HAL_RTC_AlarmIRQHandler(&hrtc); 8001e84: 4802 ldr r0, [pc, #8] ; (8001e90 ) 8001e86: f001 fced bl 8003864 /* USER CODE BEGIN RTC_Alarm_IRQn 1 */ /* USER CODE END RTC_Alarm_IRQn 1 */ } 8001e8a: bf00 nop 8001e8c: bd80 pop {r7, pc} 8001e8e: bf00 nop 8001e90: 200000e4 .word 0x200000e4 08001e94 : * configuration. * @param None * @retval None */ void SystemInit(void) { 8001e94: b480 push {r7} 8001e96: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 8001e98: 4b08 ldr r3, [pc, #32] ; (8001ebc ) 8001e9a: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 8001e9e: 4a07 ldr r2, [pc, #28] ; (8001ebc ) 8001ea0: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 8001ea4: f8c2 3088 str.w r3, [r2, #136] ; 0x88 /* Configure the Vector Table location add offset address ------------------*/ #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ 8001ea8: 4b04 ldr r3, [pc, #16] ; (8001ebc ) 8001eaa: f04f 6200 mov.w r2, #134217728 ; 0x8000000 8001eae: 609a str r2, [r3, #8] #endif } 8001eb0: bf00 nop 8001eb2: 46bd mov sp, r7 8001eb4: f85d 7b04 ldr.w r7, [sp], #4 8001eb8: 4770 bx lr 8001eba: bf00 nop 8001ebc: e000ed00 .word 0xe000ed00 08001ec0 : 8001ec0: f8df d034 ldr.w sp, [pc, #52] ; 8001ef8 8001ec4: 2100 movs r1, #0 8001ec6: e003 b.n 8001ed0 08001ec8 : 8001ec8: 4b0c ldr r3, [pc, #48] ; (8001efc ) 8001eca: 585b ldr r3, [r3, r1] 8001ecc: 5043 str r3, [r0, r1] 8001ece: 3104 adds r1, #4 08001ed0 : 8001ed0: 480b ldr r0, [pc, #44] ; (8001f00 ) 8001ed2: 4b0c ldr r3, [pc, #48] ; (8001f04 ) 8001ed4: 1842 adds r2, r0, r1 8001ed6: 429a cmp r2, r3 8001ed8: d3f6 bcc.n 8001ec8 8001eda: 4a0b ldr r2, [pc, #44] ; (8001f08 ) 8001edc: e002 b.n 8001ee4 08001ede : 8001ede: 2300 movs r3, #0 8001ee0: f842 3b04 str.w r3, [r2], #4 08001ee4 : 8001ee4: 4b09 ldr r3, [pc, #36] ; (8001f0c ) 8001ee6: 429a cmp r2, r3 8001ee8: d3f9 bcc.n 8001ede 8001eea: f7ff ffd3 bl 8001e94 8001eee: f002 fa4b bl 8004388 <__libc_init_array> 8001ef2: f7ff fc9f bl 8001834

8001ef6: 4770 bx lr 8001ef8: 20018000 .word 0x20018000 8001efc: 08006220 .word 0x08006220 8001f00: 20000000 .word 0x20000000 8001f04: 20000088 .word 0x20000088 8001f08: 20000088 .word 0x20000088 8001f0c: 20000148 .word 0x20000148 08001f10 : 8001f10: e7fe b.n 8001f10 ... 08001f14 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001f14: b580 push {r7, lr} 8001f16: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); 8001f18: 4b0e ldr r3, [pc, #56] ; (8001f54 ) 8001f1a: 681b ldr r3, [r3, #0] 8001f1c: 4a0d ldr r2, [pc, #52] ; (8001f54 ) 8001f1e: f443 7300 orr.w r3, r3, #512 ; 0x200 8001f22: 6013 str r3, [r2, #0] #endif /* INSTRUCTION_CACHE_ENABLE */ #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); 8001f24: 4b0b ldr r3, [pc, #44] ; (8001f54 ) 8001f26: 681b ldr r3, [r3, #0] 8001f28: 4a0a ldr r2, [pc, #40] ; (8001f54 ) 8001f2a: f443 6380 orr.w r3, r3, #1024 ; 0x400 8001f2e: 6013 str r3, [r2, #0] #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 8001f30: 4b08 ldr r3, [pc, #32] ; (8001f54 ) 8001f32: 681b ldr r3, [r3, #0] 8001f34: 4a07 ldr r2, [pc, #28] ; (8001f54 ) 8001f36: f443 7380 orr.w r3, r3, #256 ; 0x100 8001f3a: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 8001f3c: 2003 movs r0, #3 8001f3e: f000 f96d bl 800221c /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8001f42: 2000 movs r0, #0 8001f44: f000 f808 bl 8001f58 /* Init the low level hardware */ HAL_MspInit(); 8001f48: f7ff fee4 bl 8001d14 /* Return function status */ return HAL_OK; 8001f4c: 2300 movs r3, #0 } 8001f4e: 4618 mov r0, r3 8001f50: bd80 pop {r7, pc} 8001f52: bf00 nop 8001f54: 40023c00 .word 0x40023c00 08001f58 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8001f58: b580 push {r7, lr} 8001f5a: b082 sub sp, #8 8001f5c: af00 add r7, sp, #0 8001f5e: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 8001f60: 4b12 ldr r3, [pc, #72] ; (8001fac ) 8001f62: 681a ldr r2, [r3, #0] 8001f64: 4b12 ldr r3, [pc, #72] ; (8001fb0 ) 8001f66: 781b ldrb r3, [r3, #0] 8001f68: 4619 mov r1, r3 8001f6a: f44f 737a mov.w r3, #1000 ; 0x3e8 8001f6e: fbb3 f3f1 udiv r3, r3, r1 8001f72: fbb2 f3f3 udiv r3, r2, r3 8001f76: 4618 mov r0, r3 8001f78: f000 f985 bl 8002286 8001f7c: 4603 mov r3, r0 8001f7e: 2b00 cmp r3, #0 8001f80: d001 beq.n 8001f86 { return HAL_ERROR; 8001f82: 2301 movs r3, #1 8001f84: e00e b.n 8001fa4 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8001f86: 687b ldr r3, [r7, #4] 8001f88: 2b0f cmp r3, #15 8001f8a: d80a bhi.n 8001fa2 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001f8c: 2200 movs r2, #0 8001f8e: 6879 ldr r1, [r7, #4] 8001f90: f04f 30ff mov.w r0, #4294967295 8001f94: f000 f94d bl 8002232 uwTickPrio = TickPriority; 8001f98: 4a06 ldr r2, [pc, #24] ; (8001fb4 ) 8001f9a: 687b ldr r3, [r7, #4] 8001f9c: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8001f9e: 2300 movs r3, #0 8001fa0: e000 b.n 8001fa4 return HAL_ERROR; 8001fa2: 2301 movs r3, #1 } 8001fa4: 4618 mov r0, r3 8001fa6: 3708 adds r7, #8 8001fa8: 46bd mov sp, r7 8001faa: bd80 pop {r7, pc} 8001fac: 20000014 .word 0x20000014 8001fb0: 2000001c .word 0x2000001c 8001fb4: 20000018 .word 0x20000018 08001fb8 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001fb8: b480 push {r7} 8001fba: af00 add r7, sp, #0 uwTick += uwTickFreq; 8001fbc: 4b06 ldr r3, [pc, #24] ; (8001fd8 ) 8001fbe: 781b ldrb r3, [r3, #0] 8001fc0: 461a mov r2, r3 8001fc2: 4b06 ldr r3, [pc, #24] ; (8001fdc ) 8001fc4: 681b ldr r3, [r3, #0] 8001fc6: 4413 add r3, r2 8001fc8: 4a04 ldr r2, [pc, #16] ; (8001fdc ) 8001fca: 6013 str r3, [r2, #0] } 8001fcc: bf00 nop 8001fce: 46bd mov sp, r7 8001fd0: f85d 7b04 ldr.w r7, [sp], #4 8001fd4: 4770 bx lr 8001fd6: bf00 nop 8001fd8: 2000001c .word 0x2000001c 8001fdc: 20000144 .word 0x20000144 08001fe0 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001fe0: b480 push {r7} 8001fe2: af00 add r7, sp, #0 return uwTick; 8001fe4: 4b03 ldr r3, [pc, #12] ; (8001ff4 ) 8001fe6: 681b ldr r3, [r3, #0] } 8001fe8: 4618 mov r0, r3 8001fea: 46bd mov sp, r7 8001fec: f85d 7b04 ldr.w r7, [sp], #4 8001ff0: 4770 bx lr 8001ff2: bf00 nop 8001ff4: 20000144 .word 0x20000144 08001ff8 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8001ff8: b580 push {r7, lr} 8001ffa: b084 sub sp, #16 8001ffc: af00 add r7, sp, #0 8001ffe: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8002000: f7ff ffee bl 8001fe0 8002004: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 8002006: 687b ldr r3, [r7, #4] 8002008: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800200a: 68fb ldr r3, [r7, #12] 800200c: f1b3 3fff cmp.w r3, #4294967295 8002010: d005 beq.n 800201e { wait += (uint32_t)(uwTickFreq); 8002012: 4b09 ldr r3, [pc, #36] ; (8002038 ) 8002014: 781b ldrb r3, [r3, #0] 8002016: 461a mov r2, r3 8002018: 68fb ldr r3, [r7, #12] 800201a: 4413 add r3, r2 800201c: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) 800201e: bf00 nop 8002020: f7ff ffde bl 8001fe0 8002024: 4602 mov r2, r0 8002026: 68bb ldr r3, [r7, #8] 8002028: 1ad3 subs r3, r2, r3 800202a: 68fa ldr r2, [r7, #12] 800202c: 429a cmp r2, r3 800202e: d8f7 bhi.n 8002020 { } } 8002030: bf00 nop 8002032: 3710 adds r7, #16 8002034: 46bd mov sp, r7 8002036: bd80 pop {r7, pc} 8002038: 2000001c .word 0x2000001c 0800203c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_SuspendTick(void) { 800203c: b480 push {r7} 800203e: af00 add r7, sp, #0 /* Disable SysTick Interrupt */ SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk; 8002040: 4b05 ldr r3, [pc, #20] ; (8002058 ) 8002042: 681b ldr r3, [r3, #0] 8002044: 4a04 ldr r2, [pc, #16] ; (8002058 ) 8002046: f023 0302 bic.w r3, r3, #2 800204a: 6013 str r3, [r2, #0] } 800204c: bf00 nop 800204e: 46bd mov sp, r7 8002050: f85d 7b04 ldr.w r7, [sp], #4 8002054: 4770 bx lr 8002056: bf00 nop 8002058: e000e010 .word 0xe000e010 0800205c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_ResumeTick(void) { 800205c: b480 push {r7} 800205e: af00 add r7, sp, #0 /* Enable SysTick Interrupt */ SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk; 8002060: 4b05 ldr r3, [pc, #20] ; (8002078 ) 8002062: 681b ldr r3, [r3, #0] 8002064: 4a04 ldr r2, [pc, #16] ; (8002078 ) 8002066: f043 0302 orr.w r3, r3, #2 800206a: 6013 str r3, [r2, #0] } 800206c: bf00 nop 800206e: 46bd mov sp, r7 8002070: f85d 7b04 ldr.w r7, [sp], #4 8002074: 4770 bx lr 8002076: bf00 nop 8002078: e000e010 .word 0xe000e010 0800207c <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 800207c: b480 push {r7} 800207e: b085 sub sp, #20 8002080: af00 add r7, sp, #0 8002082: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002084: 687b ldr r3, [r7, #4] 8002086: f003 0307 and.w r3, r3, #7 800208a: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 800208c: 4b0c ldr r3, [pc, #48] ; (80020c0 <__NVIC_SetPriorityGrouping+0x44>) 800208e: 68db ldr r3, [r3, #12] 8002090: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8002092: 68ba ldr r2, [r7, #8] 8002094: f64f 03ff movw r3, #63743 ; 0xf8ff 8002098: 4013 ands r3, r2 800209a: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 800209c: 68fb ldr r3, [r7, #12] 800209e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80020a0: 68bb ldr r3, [r7, #8] 80020a2: 4313 orrs r3, r2 reg_value = (reg_value | 80020a4: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80020a8: f443 3300 orr.w r3, r3, #131072 ; 0x20000 80020ac: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80020ae: 4a04 ldr r2, [pc, #16] ; (80020c0 <__NVIC_SetPriorityGrouping+0x44>) 80020b0: 68bb ldr r3, [r7, #8] 80020b2: 60d3 str r3, [r2, #12] } 80020b4: bf00 nop 80020b6: 3714 adds r7, #20 80020b8: 46bd mov sp, r7 80020ba: f85d 7b04 ldr.w r7, [sp], #4 80020be: 4770 bx lr 80020c0: e000ed00 .word 0xe000ed00 080020c4 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 80020c4: b480 push {r7} 80020c6: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 80020c8: 4b04 ldr r3, [pc, #16] ; (80020dc <__NVIC_GetPriorityGrouping+0x18>) 80020ca: 68db ldr r3, [r3, #12] 80020cc: 0a1b lsrs r3, r3, #8 80020ce: f003 0307 and.w r3, r3, #7 } 80020d2: 4618 mov r0, r3 80020d4: 46bd mov sp, r7 80020d6: f85d 7b04 ldr.w r7, [sp], #4 80020da: 4770 bx lr 80020dc: e000ed00 .word 0xe000ed00 080020e0 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 80020e0: b480 push {r7} 80020e2: b083 sub sp, #12 80020e4: af00 add r7, sp, #0 80020e6: 4603 mov r3, r0 80020e8: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 80020ea: f997 3007 ldrsb.w r3, [r7, #7] 80020ee: 2b00 cmp r3, #0 80020f0: db0b blt.n 800210a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 80020f2: 79fb ldrb r3, [r7, #7] 80020f4: f003 021f and.w r2, r3, #31 80020f8: 4907 ldr r1, [pc, #28] ; (8002118 <__NVIC_EnableIRQ+0x38>) 80020fa: f997 3007 ldrsb.w r3, [r7, #7] 80020fe: 095b lsrs r3, r3, #5 8002100: 2001 movs r0, #1 8002102: fa00 f202 lsl.w r2, r0, r2 8002106: f841 2023 str.w r2, [r1, r3, lsl #2] } } 800210a: bf00 nop 800210c: 370c adds r7, #12 800210e: 46bd mov sp, r7 8002110: f85d 7b04 ldr.w r7, [sp], #4 8002114: 4770 bx lr 8002116: bf00 nop 8002118: e000e100 .word 0xe000e100 0800211c <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 800211c: b480 push {r7} 800211e: b083 sub sp, #12 8002120: af00 add r7, sp, #0 8002122: 4603 mov r3, r0 8002124: 6039 str r1, [r7, #0] 8002126: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8002128: f997 3007 ldrsb.w r3, [r7, #7] 800212c: 2b00 cmp r3, #0 800212e: db0a blt.n 8002146 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002130: 683b ldr r3, [r7, #0] 8002132: b2da uxtb r2, r3 8002134: 490c ldr r1, [pc, #48] ; (8002168 <__NVIC_SetPriority+0x4c>) 8002136: f997 3007 ldrsb.w r3, [r7, #7] 800213a: 0112 lsls r2, r2, #4 800213c: b2d2 uxtb r2, r2 800213e: 440b add r3, r1 8002140: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8002144: e00a b.n 800215c <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8002146: 683b ldr r3, [r7, #0] 8002148: b2da uxtb r2, r3 800214a: 4908 ldr r1, [pc, #32] ; (800216c <__NVIC_SetPriority+0x50>) 800214c: 79fb ldrb r3, [r7, #7] 800214e: f003 030f and.w r3, r3, #15 8002152: 3b04 subs r3, #4 8002154: 0112 lsls r2, r2, #4 8002156: b2d2 uxtb r2, r2 8002158: 440b add r3, r1 800215a: 761a strb r2, [r3, #24] } 800215c: bf00 nop 800215e: 370c adds r7, #12 8002160: 46bd mov sp, r7 8002162: f85d 7b04 ldr.w r7, [sp], #4 8002166: 4770 bx lr 8002168: e000e100 .word 0xe000e100 800216c: e000ed00 .word 0xe000ed00 08002170 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8002170: b480 push {r7} 8002172: b089 sub sp, #36 ; 0x24 8002174: af00 add r7, sp, #0 8002176: 60f8 str r0, [r7, #12] 8002178: 60b9 str r1, [r7, #8] 800217a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 800217c: 68fb ldr r3, [r7, #12] 800217e: f003 0307 and.w r3, r3, #7 8002182: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8002184: 69fb ldr r3, [r7, #28] 8002186: f1c3 0307 rsb r3, r3, #7 800218a: 2b04 cmp r3, #4 800218c: bf28 it cs 800218e: 2304 movcs r3, #4 8002190: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8002192: 69fb ldr r3, [r7, #28] 8002194: 3304 adds r3, #4 8002196: 2b06 cmp r3, #6 8002198: d902 bls.n 80021a0 800219a: 69fb ldr r3, [r7, #28] 800219c: 3b03 subs r3, #3 800219e: e000 b.n 80021a2 80021a0: 2300 movs r3, #0 80021a2: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80021a4: f04f 32ff mov.w r2, #4294967295 80021a8: 69bb ldr r3, [r7, #24] 80021aa: fa02 f303 lsl.w r3, r2, r3 80021ae: 43da mvns r2, r3 80021b0: 68bb ldr r3, [r7, #8] 80021b2: 401a ands r2, r3 80021b4: 697b ldr r3, [r7, #20] 80021b6: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 80021b8: f04f 31ff mov.w r1, #4294967295 80021bc: 697b ldr r3, [r7, #20] 80021be: fa01 f303 lsl.w r3, r1, r3 80021c2: 43d9 mvns r1, r3 80021c4: 687b ldr r3, [r7, #4] 80021c6: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80021c8: 4313 orrs r3, r2 ); } 80021ca: 4618 mov r0, r3 80021cc: 3724 adds r7, #36 ; 0x24 80021ce: 46bd mov sp, r7 80021d0: f85d 7b04 ldr.w r7, [sp], #4 80021d4: 4770 bx lr ... 080021d8 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 80021d8: b580 push {r7, lr} 80021da: b082 sub sp, #8 80021dc: af00 add r7, sp, #0 80021de: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 80021e0: 687b ldr r3, [r7, #4] 80021e2: 3b01 subs r3, #1 80021e4: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 80021e8: d301 bcc.n 80021ee { return (1UL); /* Reload value impossible */ 80021ea: 2301 movs r3, #1 80021ec: e00f b.n 800220e } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 80021ee: 4a0a ldr r2, [pc, #40] ; (8002218 ) 80021f0: 687b ldr r3, [r7, #4] 80021f2: 3b01 subs r3, #1 80021f4: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 80021f6: 210f movs r1, #15 80021f8: f04f 30ff mov.w r0, #4294967295 80021fc: f7ff ff8e bl 800211c <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8002200: 4b05 ldr r3, [pc, #20] ; (8002218 ) 8002202: 2200 movs r2, #0 8002204: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8002206: 4b04 ldr r3, [pc, #16] ; (8002218 ) 8002208: 2207 movs r2, #7 800220a: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 800220c: 2300 movs r3, #0 } 800220e: 4618 mov r0, r3 8002210: 3708 adds r7, #8 8002212: 46bd mov sp, r7 8002214: bd80 pop {r7, pc} 8002216: bf00 nop 8002218: e000e010 .word 0xe000e010 0800221c : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 800221c: b580 push {r7, lr} 800221e: b082 sub sp, #8 8002220: af00 add r7, sp, #0 8002222: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8002224: 6878 ldr r0, [r7, #4] 8002226: f7ff ff29 bl 800207c <__NVIC_SetPriorityGrouping> } 800222a: bf00 nop 800222c: 3708 adds r7, #8 800222e: 46bd mov sp, r7 8002230: bd80 pop {r7, pc} 08002232 : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 8002232: b580 push {r7, lr} 8002234: b086 sub sp, #24 8002236: af00 add r7, sp, #0 8002238: 4603 mov r3, r0 800223a: 60b9 str r1, [r7, #8] 800223c: 607a str r2, [r7, #4] 800223e: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8002240: 2300 movs r3, #0 8002242: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8002244: f7ff ff3e bl 80020c4 <__NVIC_GetPriorityGrouping> 8002248: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 800224a: 687a ldr r2, [r7, #4] 800224c: 68b9 ldr r1, [r7, #8] 800224e: 6978 ldr r0, [r7, #20] 8002250: f7ff ff8e bl 8002170 8002254: 4602 mov r2, r0 8002256: f997 300f ldrsb.w r3, [r7, #15] 800225a: 4611 mov r1, r2 800225c: 4618 mov r0, r3 800225e: f7ff ff5d bl 800211c <__NVIC_SetPriority> } 8002262: bf00 nop 8002264: 3718 adds r7, #24 8002266: 46bd mov sp, r7 8002268: bd80 pop {r7, pc} 0800226a : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 800226a: b580 push {r7, lr} 800226c: b082 sub sp, #8 800226e: af00 add r7, sp, #0 8002270: 4603 mov r3, r0 8002272: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 8002274: f997 3007 ldrsb.w r3, [r7, #7] 8002278: 4618 mov r0, r3 800227a: f7ff ff31 bl 80020e0 <__NVIC_EnableIRQ> } 800227e: bf00 nop 8002280: 3708 adds r7, #8 8002282: 46bd mov sp, r7 8002284: bd80 pop {r7, pc} 08002286 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 8002286: b580 push {r7, lr} 8002288: b082 sub sp, #8 800228a: af00 add r7, sp, #0 800228c: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 800228e: 6878 ldr r0, [r7, #4] 8002290: f7ff ffa2 bl 80021d8 8002294: 4603 mov r3, r0 } 8002296: 4618 mov r0, r3 8002298: 3708 adds r7, #8 800229a: 46bd mov sp, r7 800229c: bd80 pop {r7, pc} ... 080022a0 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80022a0: b480 push {r7} 80022a2: b089 sub sp, #36 ; 0x24 80022a4: af00 add r7, sp, #0 80022a6: 6078 str r0, [r7, #4] 80022a8: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; 80022aa: 2300 movs r3, #0 80022ac: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; 80022ae: 2300 movs r3, #0 80022b0: 613b str r3, [r7, #16] uint32_t temp = 0x00U; 80022b2: 2300 movs r3, #0 80022b4: 61bb str r3, [r7, #24] assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) 80022b6: 2300 movs r3, #0 80022b8: 61fb str r3, [r7, #28] 80022ba: e159 b.n 8002570 { /* Get the IO position */ ioposition = 0x01U << position; 80022bc: 2201 movs r2, #1 80022be: 69fb ldr r3, [r7, #28] 80022c0: fa02 f303 lsl.w r3, r2, r3 80022c4: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80022c6: 683b ldr r3, [r7, #0] 80022c8: 681b ldr r3, [r3, #0] 80022ca: 697a ldr r2, [r7, #20] 80022cc: 4013 ands r3, r2 80022ce: 613b str r3, [r7, #16] if(iocurrent == ioposition) 80022d0: 693a ldr r2, [r7, #16] 80022d2: 697b ldr r3, [r7, #20] 80022d4: 429a cmp r2, r3 80022d6: f040 8148 bne.w 800256a { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || 80022da: 683b ldr r3, [r7, #0] 80022dc: 685b ldr r3, [r3, #4] 80022de: 2b01 cmp r3, #1 80022e0: d00b beq.n 80022fa 80022e2: 683b ldr r3, [r7, #0] 80022e4: 685b ldr r3, [r3, #4] 80022e6: 2b02 cmp r3, #2 80022e8: d007 beq.n 80022fa (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) 80022ea: 683b ldr r3, [r7, #0] 80022ec: 685b ldr r3, [r3, #4] if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || 80022ee: 2b11 cmp r3, #17 80022f0: d003 beq.n 80022fa (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) 80022f2: 683b ldr r3, [r7, #0] 80022f4: 685b ldr r3, [r3, #4] 80022f6: 2b12 cmp r3, #18 80022f8: d130 bne.n 800235c { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 80022fa: 687b ldr r3, [r7, #4] 80022fc: 689b ldr r3, [r3, #8] 80022fe: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); 8002300: 69fb ldr r3, [r7, #28] 8002302: 005b lsls r3, r3, #1 8002304: 2203 movs r2, #3 8002306: fa02 f303 lsl.w r3, r2, r3 800230a: 43db mvns r3, r3 800230c: 69ba ldr r2, [r7, #24] 800230e: 4013 ands r3, r2 8002310: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); 8002312: 683b ldr r3, [r7, #0] 8002314: 68da ldr r2, [r3, #12] 8002316: 69fb ldr r3, [r7, #28] 8002318: 005b lsls r3, r3, #1 800231a: fa02 f303 lsl.w r3, r2, r3 800231e: 69ba ldr r2, [r7, #24] 8002320: 4313 orrs r3, r2 8002322: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; 8002324: 687b ldr r3, [r7, #4] 8002326: 69ba ldr r2, [r7, #24] 8002328: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 800232a: 687b ldr r3, [r7, #4] 800232c: 685b ldr r3, [r3, #4] 800232e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; 8002330: 2201 movs r2, #1 8002332: 69fb ldr r3, [r7, #28] 8002334: fa02 f303 lsl.w r3, r2, r3 8002338: 43db mvns r3, r3 800233a: 69ba ldr r2, [r7, #24] 800233c: 4013 ands r3, r2 800233e: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); 8002340: 683b ldr r3, [r7, #0] 8002342: 685b ldr r3, [r3, #4] 8002344: 091b lsrs r3, r3, #4 8002346: f003 0201 and.w r2, r3, #1 800234a: 69fb ldr r3, [r7, #28] 800234c: fa02 f303 lsl.w r3, r2, r3 8002350: 69ba ldr r2, [r7, #24] 8002352: 4313 orrs r3, r2 8002354: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; 8002356: 687b ldr r3, [r7, #4] 8002358: 69ba ldr r2, [r7, #24] 800235a: 605a str r2, [r3, #4] } /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; 800235c: 687b ldr r3, [r7, #4] 800235e: 68db ldr r3, [r3, #12] 8002360: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); 8002362: 69fb ldr r3, [r7, #28] 8002364: 005b lsls r3, r3, #1 8002366: 2203 movs r2, #3 8002368: fa02 f303 lsl.w r3, r2, r3 800236c: 43db mvns r3, r3 800236e: 69ba ldr r2, [r7, #24] 8002370: 4013 ands r3, r2 8002372: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); 8002374: 683b ldr r3, [r7, #0] 8002376: 689a ldr r2, [r3, #8] 8002378: 69fb ldr r3, [r7, #28] 800237a: 005b lsls r3, r3, #1 800237c: fa02 f303 lsl.w r3, r2, r3 8002380: 69ba ldr r2, [r7, #24] 8002382: 4313 orrs r3, r2 8002384: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; 8002386: 687b ldr r3, [r7, #4] 8002388: 69ba ldr r2, [r7, #24] 800238a: 60da str r2, [r3, #12] /* In case of Alternate function mode selection */ if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) 800238c: 683b ldr r3, [r7, #0] 800238e: 685b ldr r3, [r3, #4] 8002390: 2b02 cmp r3, #2 8002392: d003 beq.n 800239c 8002394: 683b ldr r3, [r7, #0] 8002396: 685b ldr r3, [r3, #4] 8002398: 2b12 cmp r3, #18 800239a: d123 bne.n 80023e4 { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; 800239c: 69fb ldr r3, [r7, #28] 800239e: 08da lsrs r2, r3, #3 80023a0: 687b ldr r3, [r7, #4] 80023a2: 3208 adds r2, #8 80023a4: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80023a8: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; 80023aa: 69fb ldr r3, [r7, #28] 80023ac: f003 0307 and.w r3, r3, #7 80023b0: 009b lsls r3, r3, #2 80023b2: 220f movs r2, #15 80023b4: fa02 f303 lsl.w r3, r2, r3 80023b8: 43db mvns r3, r3 80023ba: 69ba ldr r2, [r7, #24] 80023bc: 4013 ands r3, r2 80023be: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); 80023c0: 683b ldr r3, [r7, #0] 80023c2: 691a ldr r2, [r3, #16] 80023c4: 69fb ldr r3, [r7, #28] 80023c6: f003 0307 and.w r3, r3, #7 80023ca: 009b lsls r3, r3, #2 80023cc: fa02 f303 lsl.w r3, r2, r3 80023d0: 69ba ldr r2, [r7, #24] 80023d2: 4313 orrs r3, r2 80023d4: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; 80023d6: 69fb ldr r3, [r7, #28] 80023d8: 08da lsrs r2, r3, #3 80023da: 687b ldr r3, [r7, #4] 80023dc: 3208 adds r2, #8 80023de: 69b9 ldr r1, [r7, #24] 80023e0: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 80023e4: 687b ldr r3, [r7, #4] 80023e6: 681b ldr r3, [r3, #0] 80023e8: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); 80023ea: 69fb ldr r3, [r7, #28] 80023ec: 005b lsls r3, r3, #1 80023ee: 2203 movs r2, #3 80023f0: fa02 f303 lsl.w r3, r2, r3 80023f4: 43db mvns r3, r3 80023f6: 69ba ldr r2, [r7, #24] 80023f8: 4013 ands r3, r2 80023fa: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); 80023fc: 683b ldr r3, [r7, #0] 80023fe: 685b ldr r3, [r3, #4] 8002400: f003 0203 and.w r2, r3, #3 8002404: 69fb ldr r3, [r7, #28] 8002406: 005b lsls r3, r3, #1 8002408: fa02 f303 lsl.w r3, r2, r3 800240c: 69ba ldr r2, [r7, #24] 800240e: 4313 orrs r3, r2 8002410: 61bb str r3, [r7, #24] GPIOx->MODER = temp; 8002412: 687b ldr r3, [r7, #4] 8002414: 69ba ldr r2, [r7, #24] 8002416: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) 8002418: 683b ldr r3, [r7, #0] 800241a: 685b ldr r3, [r3, #4] 800241c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8002420: 2b00 cmp r3, #0 8002422: f000 80a2 beq.w 800256a { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8002426: 2300 movs r3, #0 8002428: 60fb str r3, [r7, #12] 800242a: 4b56 ldr r3, [pc, #344] ; (8002584 ) 800242c: 6c5b ldr r3, [r3, #68] ; 0x44 800242e: 4a55 ldr r2, [pc, #340] ; (8002584 ) 8002430: f443 4380 orr.w r3, r3, #16384 ; 0x4000 8002434: 6453 str r3, [r2, #68] ; 0x44 8002436: 4b53 ldr r3, [pc, #332] ; (8002584 ) 8002438: 6c5b ldr r3, [r3, #68] ; 0x44 800243a: f403 4380 and.w r3, r3, #16384 ; 0x4000 800243e: 60fb str r3, [r7, #12] 8002440: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; 8002442: 4a51 ldr r2, [pc, #324] ; (8002588 ) 8002444: 69fb ldr r3, [r7, #28] 8002446: 089b lsrs r3, r3, #2 8002448: 3302 adds r3, #2 800244a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800244e: 61bb str r3, [r7, #24] temp &= ~(0x0FU << (4U * (position & 0x03U))); 8002450: 69fb ldr r3, [r7, #28] 8002452: f003 0303 and.w r3, r3, #3 8002456: 009b lsls r3, r3, #2 8002458: 220f movs r2, #15 800245a: fa02 f303 lsl.w r3, r2, r3 800245e: 43db mvns r3, r3 8002460: 69ba ldr r2, [r7, #24] 8002462: 4013 ands r3, r2 8002464: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 8002466: 687b ldr r3, [r7, #4] 8002468: 4a48 ldr r2, [pc, #288] ; (800258c ) 800246a: 4293 cmp r3, r2 800246c: d019 beq.n 80024a2 800246e: 687b ldr r3, [r7, #4] 8002470: 4a47 ldr r2, [pc, #284] ; (8002590 ) 8002472: 4293 cmp r3, r2 8002474: d013 beq.n 800249e 8002476: 687b ldr r3, [r7, #4] 8002478: 4a46 ldr r2, [pc, #280] ; (8002594 ) 800247a: 4293 cmp r3, r2 800247c: d00d beq.n 800249a 800247e: 687b ldr r3, [r7, #4] 8002480: 4a45 ldr r2, [pc, #276] ; (8002598 ) 8002482: 4293 cmp r3, r2 8002484: d007 beq.n 8002496 8002486: 687b ldr r3, [r7, #4] 8002488: 4a44 ldr r2, [pc, #272] ; (800259c ) 800248a: 4293 cmp r3, r2 800248c: d101 bne.n 8002492 800248e: 2304 movs r3, #4 8002490: e008 b.n 80024a4 8002492: 2307 movs r3, #7 8002494: e006 b.n 80024a4 8002496: 2303 movs r3, #3 8002498: e004 b.n 80024a4 800249a: 2302 movs r3, #2 800249c: e002 b.n 80024a4 800249e: 2301 movs r3, #1 80024a0: e000 b.n 80024a4 80024a2: 2300 movs r3, #0 80024a4: 69fa ldr r2, [r7, #28] 80024a6: f002 0203 and.w r2, r2, #3 80024aa: 0092 lsls r2, r2, #2 80024ac: 4093 lsls r3, r2 80024ae: 69ba ldr r2, [r7, #24] 80024b0: 4313 orrs r3, r2 80024b2: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; 80024b4: 4934 ldr r1, [pc, #208] ; (8002588 ) 80024b6: 69fb ldr r3, [r7, #28] 80024b8: 089b lsrs r3, r3, #2 80024ba: 3302 adds r3, #2 80024bc: 69ba ldr r2, [r7, #24] 80024be: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear EXTI line configuration */ temp = EXTI->IMR; 80024c2: 4b37 ldr r3, [pc, #220] ; (80025a0 ) 80024c4: 681b ldr r3, [r3, #0] 80024c6: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 80024c8: 693b ldr r3, [r7, #16] 80024ca: 43db mvns r3, r3 80024cc: 69ba ldr r2, [r7, #24] 80024ce: 4013 ands r3, r2 80024d0: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) 80024d2: 683b ldr r3, [r7, #0] 80024d4: 685b ldr r3, [r3, #4] 80024d6: f403 3380 and.w r3, r3, #65536 ; 0x10000 80024da: 2b00 cmp r3, #0 80024dc: d003 beq.n 80024e6 { temp |= iocurrent; 80024de: 69ba ldr r2, [r7, #24] 80024e0: 693b ldr r3, [r7, #16] 80024e2: 4313 orrs r3, r2 80024e4: 61bb str r3, [r7, #24] } EXTI->IMR = temp; 80024e6: 4a2e ldr r2, [pc, #184] ; (80025a0 ) 80024e8: 69bb ldr r3, [r7, #24] 80024ea: 6013 str r3, [r2, #0] temp = EXTI->EMR; 80024ec: 4b2c ldr r3, [pc, #176] ; (80025a0 ) 80024ee: 685b ldr r3, [r3, #4] 80024f0: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 80024f2: 693b ldr r3, [r7, #16] 80024f4: 43db mvns r3, r3 80024f6: 69ba ldr r2, [r7, #24] 80024f8: 4013 ands r3, r2 80024fa: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) 80024fc: 683b ldr r3, [r7, #0] 80024fe: 685b ldr r3, [r3, #4] 8002500: f403 3300 and.w r3, r3, #131072 ; 0x20000 8002504: 2b00 cmp r3, #0 8002506: d003 beq.n 8002510 { temp |= iocurrent; 8002508: 69ba ldr r2, [r7, #24] 800250a: 693b ldr r3, [r7, #16] 800250c: 4313 orrs r3, r2 800250e: 61bb str r3, [r7, #24] } EXTI->EMR = temp; 8002510: 4a23 ldr r2, [pc, #140] ; (80025a0 ) 8002512: 69bb ldr r3, [r7, #24] 8002514: 6053 str r3, [r2, #4] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; 8002516: 4b22 ldr r3, [pc, #136] ; (80025a0 ) 8002518: 689b ldr r3, [r3, #8] 800251a: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 800251c: 693b ldr r3, [r7, #16] 800251e: 43db mvns r3, r3 8002520: 69ba ldr r2, [r7, #24] 8002522: 4013 ands r3, r2 8002524: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) 8002526: 683b ldr r3, [r7, #0] 8002528: 685b ldr r3, [r3, #4] 800252a: f403 1380 and.w r3, r3, #1048576 ; 0x100000 800252e: 2b00 cmp r3, #0 8002530: d003 beq.n 800253a { temp |= iocurrent; 8002532: 69ba ldr r2, [r7, #24] 8002534: 693b ldr r3, [r7, #16] 8002536: 4313 orrs r3, r2 8002538: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; 800253a: 4a19 ldr r2, [pc, #100] ; (80025a0 ) 800253c: 69bb ldr r3, [r7, #24] 800253e: 6093 str r3, [r2, #8] temp = EXTI->FTSR; 8002540: 4b17 ldr r3, [pc, #92] ; (80025a0 ) 8002542: 68db ldr r3, [r3, #12] 8002544: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8002546: 693b ldr r3, [r7, #16] 8002548: 43db mvns r3, r3 800254a: 69ba ldr r2, [r7, #24] 800254c: 4013 ands r3, r2 800254e: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) 8002550: 683b ldr r3, [r7, #0] 8002552: 685b ldr r3, [r3, #4] 8002554: f403 1300 and.w r3, r3, #2097152 ; 0x200000 8002558: 2b00 cmp r3, #0 800255a: d003 beq.n 8002564 { temp |= iocurrent; 800255c: 69ba ldr r2, [r7, #24] 800255e: 693b ldr r3, [r7, #16] 8002560: 4313 orrs r3, r2 8002562: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; 8002564: 4a0e ldr r2, [pc, #56] ; (80025a0 ) 8002566: 69bb ldr r3, [r7, #24] 8002568: 60d3 str r3, [r2, #12] for(position = 0U; position < GPIO_NUMBER; position++) 800256a: 69fb ldr r3, [r7, #28] 800256c: 3301 adds r3, #1 800256e: 61fb str r3, [r7, #28] 8002570: 69fb ldr r3, [r7, #28] 8002572: 2b0f cmp r3, #15 8002574: f67f aea2 bls.w 80022bc } } } } 8002578: bf00 nop 800257a: 3724 adds r7, #36 ; 0x24 800257c: 46bd mov sp, r7 800257e: f85d 7b04 ldr.w r7, [sp], #4 8002582: 4770 bx lr 8002584: 40023800 .word 0x40023800 8002588: 40013800 .word 0x40013800 800258c: 40020000 .word 0x40020000 8002590: 40020400 .word 0x40020400 8002594: 40020800 .word 0x40020800 8002598: 40020c00 .word 0x40020c00 800259c: 40021000 .word 0x40021000 80025a0: 40013c00 .word 0x40013c00 080025a4 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80025a4: b480 push {r7} 80025a6: b083 sub sp, #12 80025a8: af00 add r7, sp, #0 80025aa: 6078 str r0, [r7, #4] 80025ac: 460b mov r3, r1 80025ae: 807b strh r3, [r7, #2] 80025b0: 4613 mov r3, r2 80025b2: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) 80025b4: 787b ldrb r3, [r7, #1] 80025b6: 2b00 cmp r3, #0 80025b8: d003 beq.n 80025c2 { GPIOx->BSRR = GPIO_Pin; 80025ba: 887a ldrh r2, [r7, #2] 80025bc: 687b ldr r3, [r7, #4] 80025be: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } 80025c0: e003 b.n 80025ca GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 80025c2: 887b ldrh r3, [r7, #2] 80025c4: 041a lsls r2, r3, #16 80025c6: 687b ldr r3, [r7, #4] 80025c8: 619a str r2, [r3, #24] } 80025ca: bf00 nop 80025cc: 370c adds r7, #12 80025ce: 46bd mov sp, r7 80025d0: f85d 7b04 ldr.w r7, [sp], #4 80025d4: 4770 bx lr ... 080025d8 : * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction * @retval None */ void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) { 80025d8: b480 push {r7} 80025da: b083 sub sp, #12 80025dc: af00 add r7, sp, #0 80025de: 6078 str r0, [r7, #4] 80025e0: 460b mov r3, r1 80025e2: 70fb strb r3, [r7, #3] /* Check the parameters */ assert_param(IS_PWR_REGULATOR(Regulator)); assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); /* Clear SLEEPDEEP bit of Cortex System Control Register */ CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); 80025e4: 4b09 ldr r3, [pc, #36] ; (800260c ) 80025e6: 691b ldr r3, [r3, #16] 80025e8: 4a08 ldr r2, [pc, #32] ; (800260c ) 80025ea: f023 0304 bic.w r3, r3, #4 80025ee: 6113 str r3, [r2, #16] /* Select SLEEP mode entry -------------------------------------------------*/ if(SLEEPEntry == PWR_SLEEPENTRY_WFI) 80025f0: 78fb ldrb r3, [r7, #3] 80025f2: 2b01 cmp r3, #1 80025f4: d101 bne.n 80025fa { /* Request Wait For Interrupt */ __WFI(); 80025f6: bf30 wfi /* Request Wait For Event */ __SEV(); __WFE(); __WFE(); } } 80025f8: e002 b.n 8002600 __SEV(); 80025fa: bf40 sev __WFE(); 80025fc: bf20 wfe __WFE(); 80025fe: bf20 wfe } 8002600: bf00 nop 8002602: 370c adds r7, #12 8002604: 46bd mov sp, r7 8002606: f85d 7b04 ldr.w r7, [sp], #4 800260a: 4770 bx lr 800260c: e000ed00 .word 0xe000ed00 08002610 : * supported by this API. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 8002610: b580 push {r7, lr} 8002612: b086 sub sp, #24 8002614: af00 add r7, sp, #0 8002616: 6078 str r0, [r7, #4] uint32_t tickstart, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) 8002618: 687b ldr r3, [r7, #4] 800261a: 2b00 cmp r3, #0 800261c: d101 bne.n 8002622 { return HAL_ERROR; 800261e: 2301 movs r3, #1 8002620: e25b b.n 8002ada } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8002622: 687b ldr r3, [r7, #4] 8002624: 681b ldr r3, [r3, #0] 8002626: f003 0301 and.w r3, r3, #1 800262a: 2b00 cmp r3, #0 800262c: d075 beq.n 800271a { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ 800262e: 4ba3 ldr r3, [pc, #652] ; (80028bc ) 8002630: 689b ldr r3, [r3, #8] 8002632: f003 030c and.w r3, r3, #12 8002636: 2b04 cmp r3, #4 8002638: d00c beq.n 8002654 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 800263a: 4ba0 ldr r3, [pc, #640] ; (80028bc ) 800263c: 689b ldr r3, [r3, #8] 800263e: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\ 8002642: 2b08 cmp r3, #8 8002644: d112 bne.n 800266c ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 8002646: 4b9d ldr r3, [pc, #628] ; (80028bc ) 8002648: 685b ldr r3, [r3, #4] 800264a: f403 0380 and.w r3, r3, #4194304 ; 0x400000 800264e: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000 8002652: d10b bne.n 800266c { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8002654: 4b99 ldr r3, [pc, #612] ; (80028bc ) 8002656: 681b ldr r3, [r3, #0] 8002658: f403 3300 and.w r3, r3, #131072 ; 0x20000 800265c: 2b00 cmp r3, #0 800265e: d05b beq.n 8002718 8002660: 687b ldr r3, [r7, #4] 8002662: 685b ldr r3, [r3, #4] 8002664: 2b00 cmp r3, #0 8002666: d157 bne.n 8002718 { return HAL_ERROR; 8002668: 2301 movs r3, #1 800266a: e236 b.n 8002ada } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 800266c: 687b ldr r3, [r7, #4] 800266e: 685b ldr r3, [r3, #4] 8002670: f5b3 3f80 cmp.w r3, #65536 ; 0x10000 8002674: d106 bne.n 8002684 8002676: 4b91 ldr r3, [pc, #580] ; (80028bc ) 8002678: 681b ldr r3, [r3, #0] 800267a: 4a90 ldr r2, [pc, #576] ; (80028bc ) 800267c: f443 3380 orr.w r3, r3, #65536 ; 0x10000 8002680: 6013 str r3, [r2, #0] 8002682: e01d b.n 80026c0 8002684: 687b ldr r3, [r7, #4] 8002686: 685b ldr r3, [r3, #4] 8002688: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000 800268c: d10c bne.n 80026a8 800268e: 4b8b ldr r3, [pc, #556] ; (80028bc ) 8002690: 681b ldr r3, [r3, #0] 8002692: 4a8a ldr r2, [pc, #552] ; (80028bc ) 8002694: f443 2380 orr.w r3, r3, #262144 ; 0x40000 8002698: 6013 str r3, [r2, #0] 800269a: 4b88 ldr r3, [pc, #544] ; (80028bc ) 800269c: 681b ldr r3, [r3, #0] 800269e: 4a87 ldr r2, [pc, #540] ; (80028bc ) 80026a0: f443 3380 orr.w r3, r3, #65536 ; 0x10000 80026a4: 6013 str r3, [r2, #0] 80026a6: e00b b.n 80026c0 80026a8: 4b84 ldr r3, [pc, #528] ; (80028bc ) 80026aa: 681b ldr r3, [r3, #0] 80026ac: 4a83 ldr r2, [pc, #524] ; (80028bc ) 80026ae: f423 3380 bic.w r3, r3, #65536 ; 0x10000 80026b2: 6013 str r3, [r2, #0] 80026b4: 4b81 ldr r3, [pc, #516] ; (80028bc ) 80026b6: 681b ldr r3, [r3, #0] 80026b8: 4a80 ldr r2, [pc, #512] ; (80028bc ) 80026ba: f423 2380 bic.w r3, r3, #262144 ; 0x40000 80026be: 6013 str r3, [r2, #0] /* Check the HSE State */ if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) 80026c0: 687b ldr r3, [r7, #4] 80026c2: 685b ldr r3, [r3, #4] 80026c4: 2b00 cmp r3, #0 80026c6: d013 beq.n 80026f0 { /* Get Start Tick */ tickstart = HAL_GetTick(); 80026c8: f7ff fc8a bl 8001fe0 80026cc: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80026ce: e008 b.n 80026e2 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80026d0: f7ff fc86 bl 8001fe0 80026d4: 4602 mov r2, r0 80026d6: 693b ldr r3, [r7, #16] 80026d8: 1ad3 subs r3, r2, r3 80026da: 2b64 cmp r3, #100 ; 0x64 80026dc: d901 bls.n 80026e2 { return HAL_TIMEOUT; 80026de: 2303 movs r3, #3 80026e0: e1fb b.n 8002ada while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80026e2: 4b76 ldr r3, [pc, #472] ; (80028bc ) 80026e4: 681b ldr r3, [r3, #0] 80026e6: f403 3300 and.w r3, r3, #131072 ; 0x20000 80026ea: 2b00 cmp r3, #0 80026ec: d0f0 beq.n 80026d0 80026ee: e014 b.n 800271a } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); 80026f0: f7ff fc76 bl 8001fe0 80026f4: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 80026f6: e008 b.n 800270a { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) 80026f8: f7ff fc72 bl 8001fe0 80026fc: 4602 mov r2, r0 80026fe: 693b ldr r3, [r7, #16] 8002700: 1ad3 subs r3, r2, r3 8002702: 2b64 cmp r3, #100 ; 0x64 8002704: d901 bls.n 800270a { return HAL_TIMEOUT; 8002706: 2303 movs r3, #3 8002708: e1e7 b.n 8002ada while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 800270a: 4b6c ldr r3, [pc, #432] ; (80028bc ) 800270c: 681b ldr r3, [r3, #0] 800270e: f403 3300 and.w r3, r3, #131072 ; 0x20000 8002712: 2b00 cmp r3, #0 8002714: d1f0 bne.n 80026f8 8002716: e000 b.n 800271a if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8002718: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 800271a: 687b ldr r3, [r7, #4] 800271c: 681b ldr r3, [r3, #0] 800271e: f003 0302 and.w r3, r3, #2 8002722: 2b00 cmp r3, #0 8002724: d063 beq.n 80027ee /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ 8002726: 4b65 ldr r3, [pc, #404] ; (80028bc ) 8002728: 689b ldr r3, [r3, #8] 800272a: f003 030c and.w r3, r3, #12 800272e: 2b00 cmp r3, #0 8002730: d00b beq.n 800274a ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 8002732: 4b62 ldr r3, [pc, #392] ; (80028bc ) 8002734: 689b ldr r3, [r3, #8] 8002736: f003 030c and.w r3, r3, #12 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\ 800273a: 2b08 cmp r3, #8 800273c: d11c bne.n 8002778 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 800273e: 4b5f ldr r3, [pc, #380] ; (80028bc ) 8002740: 685b ldr r3, [r3, #4] 8002742: f403 0380 and.w r3, r3, #4194304 ; 0x400000 8002746: 2b00 cmp r3, #0 8002748: d116 bne.n 8002778 { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800274a: 4b5c ldr r3, [pc, #368] ; (80028bc ) 800274c: 681b ldr r3, [r3, #0] 800274e: f003 0302 and.w r3, r3, #2 8002752: 2b00 cmp r3, #0 8002754: d005 beq.n 8002762 8002756: 687b ldr r3, [r7, #4] 8002758: 68db ldr r3, [r3, #12] 800275a: 2b01 cmp r3, #1 800275c: d001 beq.n 8002762 { return HAL_ERROR; 800275e: 2301 movs r3, #1 8002760: e1bb b.n 8002ada } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8002762: 4b56 ldr r3, [pc, #344] ; (80028bc ) 8002764: 681b ldr r3, [r3, #0] 8002766: f023 02f8 bic.w r2, r3, #248 ; 0xf8 800276a: 687b ldr r3, [r7, #4] 800276c: 691b ldr r3, [r3, #16] 800276e: 00db lsls r3, r3, #3 8002770: 4952 ldr r1, [pc, #328] ; (80028bc ) 8002772: 4313 orrs r3, r2 8002774: 600b str r3, [r1, #0] if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8002776: e03a b.n 80027ee } } else { /* Check the HSI State */ if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF) 8002778: 687b ldr r3, [r7, #4] 800277a: 68db ldr r3, [r3, #12] 800277c: 2b00 cmp r3, #0 800277e: d020 beq.n 80027c2 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 8002780: 4b4f ldr r3, [pc, #316] ; (80028c0 ) 8002782: 2201 movs r2, #1 8002784: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8002786: f7ff fc2b bl 8001fe0 800278a: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800278c: e008 b.n 80027a0 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 800278e: f7ff fc27 bl 8001fe0 8002792: 4602 mov r2, r0 8002794: 693b ldr r3, [r7, #16] 8002796: 1ad3 subs r3, r2, r3 8002798: 2b02 cmp r3, #2 800279a: d901 bls.n 80027a0 { return HAL_TIMEOUT; 800279c: 2303 movs r3, #3 800279e: e19c b.n 8002ada while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80027a0: 4b46 ldr r3, [pc, #280] ; (80028bc ) 80027a2: 681b ldr r3, [r3, #0] 80027a4: f003 0302 and.w r3, r3, #2 80027a8: 2b00 cmp r3, #0 80027aa: d0f0 beq.n 800278e } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80027ac: 4b43 ldr r3, [pc, #268] ; (80028bc ) 80027ae: 681b ldr r3, [r3, #0] 80027b0: f023 02f8 bic.w r2, r3, #248 ; 0xf8 80027b4: 687b ldr r3, [r7, #4] 80027b6: 691b ldr r3, [r3, #16] 80027b8: 00db lsls r3, r3, #3 80027ba: 4940 ldr r1, [pc, #256] ; (80028bc ) 80027bc: 4313 orrs r3, r2 80027be: 600b str r3, [r1, #0] 80027c0: e015 b.n 80027ee } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80027c2: 4b3f ldr r3, [pc, #252] ; (80028c0 ) 80027c4: 2200 movs r2, #0 80027c6: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80027c8: f7ff fc0a bl 8001fe0 80027cc: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80027ce: e008 b.n 80027e2 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) 80027d0: f7ff fc06 bl 8001fe0 80027d4: 4602 mov r2, r0 80027d6: 693b ldr r3, [r7, #16] 80027d8: 1ad3 subs r3, r2, r3 80027da: 2b02 cmp r3, #2 80027dc: d901 bls.n 80027e2 { return HAL_TIMEOUT; 80027de: 2303 movs r3, #3 80027e0: e17b b.n 8002ada while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80027e2: 4b36 ldr r3, [pc, #216] ; (80028bc ) 80027e4: 681b ldr r3, [r3, #0] 80027e6: f003 0302 and.w r3, r3, #2 80027ea: 2b00 cmp r3, #0 80027ec: d1f0 bne.n 80027d0 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 80027ee: 687b ldr r3, [r7, #4] 80027f0: 681b ldr r3, [r3, #0] 80027f2: f003 0308 and.w r3, r3, #8 80027f6: 2b00 cmp r3, #0 80027f8: d030 beq.n 800285c { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF) 80027fa: 687b ldr r3, [r7, #4] 80027fc: 695b ldr r3, [r3, #20] 80027fe: 2b00 cmp r3, #0 8002800: d016 beq.n 8002830 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8002802: 4b30 ldr r3, [pc, #192] ; (80028c4 ) 8002804: 2201 movs r2, #1 8002806: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8002808: f7ff fbea bl 8001fe0 800280c: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 800280e: e008 b.n 8002822 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 8002810: f7ff fbe6 bl 8001fe0 8002814: 4602 mov r2, r0 8002816: 693b ldr r3, [r7, #16] 8002818: 1ad3 subs r3, r2, r3 800281a: 2b02 cmp r3, #2 800281c: d901 bls.n 8002822 { return HAL_TIMEOUT; 800281e: 2303 movs r3, #3 8002820: e15b b.n 8002ada while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8002822: 4b26 ldr r3, [pc, #152] ; (80028bc ) 8002824: 6f5b ldr r3, [r3, #116] ; 0x74 8002826: f003 0302 and.w r3, r3, #2 800282a: 2b00 cmp r3, #0 800282c: d0f0 beq.n 8002810 800282e: e015 b.n 800285c } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8002830: 4b24 ldr r3, [pc, #144] ; (80028c4 ) 8002832: 2200 movs r2, #0 8002834: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); 8002836: f7ff fbd3 bl 8001fe0 800283a: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 800283c: e008 b.n 8002850 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) 800283e: f7ff fbcf bl 8001fe0 8002842: 4602 mov r2, r0 8002844: 693b ldr r3, [r7, #16] 8002846: 1ad3 subs r3, r2, r3 8002848: 2b02 cmp r3, #2 800284a: d901 bls.n 8002850 { return HAL_TIMEOUT; 800284c: 2303 movs r3, #3 800284e: e144 b.n 8002ada while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8002850: 4b1a ldr r3, [pc, #104] ; (80028bc ) 8002852: 6f5b ldr r3, [r3, #116] ; 0x74 8002854: f003 0302 and.w r3, r3, #2 8002858: 2b00 cmp r3, #0 800285a: d1f0 bne.n 800283e } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 800285c: 687b ldr r3, [r7, #4] 800285e: 681b ldr r3, [r3, #0] 8002860: f003 0304 and.w r3, r3, #4 8002864: 2b00 cmp r3, #0 8002866: f000 80a0 beq.w 80029aa { FlagStatus pwrclkchanged = RESET; 800286a: 2300 movs r3, #0 800286c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) 800286e: 4b13 ldr r3, [pc, #76] ; (80028bc ) 8002870: 6c1b ldr r3, [r3, #64] ; 0x40 8002872: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8002876: 2b00 cmp r3, #0 8002878: d10f bne.n 800289a { __HAL_RCC_PWR_CLK_ENABLE(); 800287a: 2300 movs r3, #0 800287c: 60bb str r3, [r7, #8] 800287e: 4b0f ldr r3, [pc, #60] ; (80028bc ) 8002880: 6c1b ldr r3, [r3, #64] ; 0x40 8002882: 4a0e ldr r2, [pc, #56] ; (80028bc ) 8002884: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8002888: 6413 str r3, [r2, #64] ; 0x40 800288a: 4b0c ldr r3, [pc, #48] ; (80028bc ) 800288c: 6c1b ldr r3, [r3, #64] ; 0x40 800288e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8002892: 60bb str r3, [r7, #8] 8002894: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8002896: 2301 movs r3, #1 8002898: 75fb strb r3, [r7, #23] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 800289a: 4b0b ldr r3, [pc, #44] ; (80028c8