/**
******************************************************************************
* @file x_nucleo_ihm05a1_stm32f4xx.h
* @author IPC Rennes
* @version V1.5.0
* @date June 1st, 2018
* @brief Header for BSP driver for x-nucleo-ihm05a1 Nucleo extension board
* (based on L6208)
******************************************************************************
* @attention
*
*
© COPYRIGHT(c) 2018 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef X_NUCLEO_IHM05A1_STM32F4XX_H
#define X_NUCLEO_IHM05A1_STM32F4XX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_nucleo.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup X_NUCLEO_IHM05A1_STM32F4XX
* @{
*/
/* Exported Constants --------------------------------------------------------*/
/** @defgroup IHM05A1_Exported_Constants IHM05A1 Exported Constants
* @{
*/
/******************************************************************************/
/* USE_STM32F4XX_NUCLEO */
/******************************************************************************/
/** @defgroup Constants_For_STM32F4XX_NUCLEO Constants For STM32F4XX NUCLEO
* @{
*/
/// GPIO Pin used for the VREFA
#define BSP_MOTOR_CONTROL_BOARD_VREFA_PIN (GPIO_PIN_3)
/// GPIO port used for the VREFA
#define BSP_MOTOR_CONTROL_BOARD_VREFA_PORT (GPIOB)
/// Interrupt line used for L6208 OCD and OVT
#define FLAG_EXTI_LINE_IRQn (EXTI15_10_IRQn)
/// Timer used to generate the VREFA PWM
#define BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM (TIM2)
/// Timer used to generate the VREFB PWM
#define BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM (TIM3)
/// Channel Timer used for the VREFA PWM
#define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFA_PWM (TIM_CHANNEL_2)
/// Channel Timer used for the VREFB PWM
#define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFB_PWM (TIM_CHANNEL_2)
/// HAL Active Channel Timer used for the VREFA PWM
#define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_VREFA_PWM (HAL_TIM_ACTIVE_CHANNEL_2)
/// HAL Active Channel Timer used for the VREFB PWM
#define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_VREFB_PWM (HAL_TIM_ACTIVE_CHANNEL_2)
/// Timer Clock Enable for the VREFA PWM
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM_CLCK_ENABLE() __TIM2_CLK_ENABLE()
/// Timer Clock Disable for the VREFA PWM
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM_CLCK_DISABLE() __TIM2_CLK_DISABLE()
/// Timer Clock Enable for the VREFB PWMs
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM_CLCK_ENABLE() __TIM3_CLK_ENABLE()
/// Timer Clock Disable for the VREFB PWMs
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM_CLCK_DISABLE() __TIM3_CLK_DISABLE()
/// VREFA PWM GPIO alternate function
#define BSP_MOTOR_CONTROL_BOARD_AFx_TIMx_VREFA_PWM (GPIO_AF1_TIM2)
/// VREFB PWM GPIO alternate function
#define BSP_MOTOR_CONTROL_BOARD_AFx_TIMx_VREFB_PWM (GPIO_AF2_TIM3)
/// Timer used to generate the tick
#define BSP_MOTOR_CONTROL_BOARD_TIMER_TICK (TIM4)
/// tick timer global interrupt
#define BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_IRQn (TIM4_IRQn)
/// Channel Timer used for the tick
#define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_TICK (TIM_CHANNEL_1)
/// Timer Clock Enable for the tick
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_CLCK_ENABLE() __TIM4_CLK_ENABLE()
/// Timer Clock Disable for the tick
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_CLCK_DISABLE() __TIM4_CLK_DISABLE()
/// HAL Active Channel Timer used for the tick
#define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_TICK (HAL_TIM_ACTIVE_CHANNEL_1)
/// Flag interrupt priority
#define BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PRIORITY (1)
/// tick timer priority (lower than flag interrupt priority)
#define BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_PRIORITY (BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PRIORITY + 1)
/**
* @}
*/
/******************************************************************************/
/* Independent plateform definitions */
/******************************************************************************/
/** @defgroup Constants_For_All_Nucleo_Platforms Constants For All Nucleo Platforms
* @{
*/
/// GPIO Pin used for the VREFB
#define BSP_MOTOR_CONTROL_BOARD_VREFB_PIN (GPIO_PIN_7)
/// GPIO Port used for the VREFB
#define BSP_MOTOR_CONTROL_BOARD_VREFB_PORT (GPIOC)
/// GPIO Pin used for the L6208 clock pin (step clock input)
#define BSP_MOTOR_CONTROL_BOARD_CLOCK_PIN (GPIO_PIN_10)
/// GPIO port used for the L6208 clock pin (step clock input)
#define BSP_MOTOR_CONTROL_BOARD_CLOCK_PORT (GPIOB)
/// GPIO Pin used for the L6208 CW/CCW pin (direction)
#define BSP_MOTOR_CONTROL_BOARD_DIR_PIN (GPIO_PIN_8)
/// GPIO port used for the L6208 CW/CCW pin (direction)
#define BSP_MOTOR_CONTROL_BOARD_DIR_PORT (GPIOA)
/// GPIO Pin used for the L6208 HALF/FULL pin (step mode selector)
#define BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PIN (GPIO_PIN_5)
/// GPIO port used for the L6208 HALF/FULL pin (step mode selector)
#define BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PORT (GPIOB)
/// GPIO Pin used for the L6208 control pin (decay mode selector)
#define BSP_MOTOR_CONTROL_BOARD_CONTROL_PIN (GPIO_PIN_4)
/// GPIO port used for the L6208 control pin (decay mode selector)
#define BSP_MOTOR_CONTROL_BOARD_CONTROL_PORT (GPIOB)
/// GPIO Pin used for the L6208 reset pin
#define BSP_MOTOR_CONTROL_BOARD_RESET_PIN (GPIO_PIN_9)
/// GPIO port used for the L6208 reset pin
#define BSP_MOTOR_CONTROL_BOARD_RESET_PORT (GPIOA)
/// GPIO Pin used for the L6208 EN pin (chip enable) and OCD and OVT alarms
#define BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN (GPIO_PIN_10)
/// GPIO port used for the L6208 EN pin (chip enable) OCD and OVT alarms
#define BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PORT (GPIOA)
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* X_NUCLEO_IHM05A1_STM32F4XX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/