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stm32l1xx_hal_pcd.h 33KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_pcd.h
  4. * @author MCD Application Team
  5. * @brief Header file of PCD HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32L1xx_HAL_PCD_H
  21. #define STM32L1xx_HAL_PCD_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32l1xx_ll_usb.h"
  27. #if defined (USB)
  28. /** @addtogroup STM32L1xx_HAL_Driver
  29. * @{
  30. */
  31. /** @addtogroup PCD
  32. * @{
  33. */
  34. /* Exported types ------------------------------------------------------------*/
  35. /** @defgroup PCD_Exported_Types PCD Exported Types
  36. * @{
  37. */
  38. /**
  39. * @brief PCD State structure definition
  40. */
  41. typedef enum
  42. {
  43. HAL_PCD_STATE_RESET = 0x00,
  44. HAL_PCD_STATE_READY = 0x01,
  45. HAL_PCD_STATE_ERROR = 0x02,
  46. HAL_PCD_STATE_BUSY = 0x03,
  47. HAL_PCD_STATE_TIMEOUT = 0x04
  48. } PCD_StateTypeDef;
  49. /* Device LPM suspend state */
  50. typedef enum
  51. {
  52. LPM_L0 = 0x00, /* on */
  53. LPM_L1 = 0x01, /* LPM L1 sleep */
  54. LPM_L2 = 0x02, /* suspend */
  55. LPM_L3 = 0x03, /* off */
  56. } PCD_LPM_StateTypeDef;
  57. typedef enum
  58. {
  59. PCD_LPM_L0_ACTIVE = 0x00, /* on */
  60. PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
  61. } PCD_LPM_MsgTypeDef;
  62. typedef enum
  63. {
  64. PCD_BCD_ERROR = 0xFF,
  65. PCD_BCD_CONTACT_DETECTION = 0xFE,
  66. PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
  67. PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
  68. PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
  69. PCD_BCD_DISCOVERY_COMPLETED = 0x00,
  70. } PCD_BCD_MsgTypeDef;
  71. typedef USB_TypeDef PCD_TypeDef;
  72. typedef USB_CfgTypeDef PCD_InitTypeDef;
  73. typedef USB_EPTypeDef PCD_EPTypeDef;
  74. /**
  75. * @brief PCD Handle Structure definition
  76. */
  77. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  78. typedef struct __PCD_HandleTypeDef
  79. #else
  80. typedef struct
  81. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  82. {
  83. PCD_TypeDef *Instance; /*!< Register base address */
  84. PCD_InitTypeDef Init; /*!< PCD required parameters */
  85. __IO uint8_t USB_Address; /*!< USB Address */
  86. PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
  87. PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
  88. HAL_LockTypeDef Lock; /*!< PCD peripheral status */
  89. __IO PCD_StateTypeDef State; /*!< PCD communication state */
  90. __IO uint32_t ErrorCode; /*!< PCD Error code */
  91. uint32_t Setup[12]; /*!< Setup packet buffer */
  92. PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
  93. uint32_t BESL;
  94. void *pData; /*!< Pointer to upper stack Handler */
  95. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  96. void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
  97. void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
  98. void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
  99. void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
  100. void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
  101. void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
  102. void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
  103. void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
  104. void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
  105. void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
  106. void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
  107. void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
  108. void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
  109. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  110. } PCD_HandleTypeDef;
  111. /**
  112. * @}
  113. */
  114. /* Include PCD HAL Extended module */
  115. #include "stm32l1xx_hal_pcd_ex.h"
  116. /* Exported constants --------------------------------------------------------*/
  117. /** @defgroup PCD_Exported_Constants PCD Exported Constants
  118. * @{
  119. */
  120. /** @defgroup PCD_Speed PCD Speed
  121. * @{
  122. */
  123. #define PCD_SPEED_FULL 2U
  124. /**
  125. * @}
  126. */
  127. /** @defgroup PCD_PHY_Module PCD PHY Module
  128. * @{
  129. */
  130. #define PCD_PHY_ULPI 1U
  131. #define PCD_PHY_EMBEDDED 2U
  132. #define PCD_PHY_UTMI 3U
  133. /**
  134. * @}
  135. */
  136. /** @defgroup PCD_Error_Code_definition PCD Error Code definition
  137. * @brief PCD Error Code definition
  138. * @{
  139. */
  140. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  141. #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
  142. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  143. /**
  144. * @}
  145. */
  146. /**
  147. * @}
  148. */
  149. /* Exported macros -----------------------------------------------------------*/
  150. /** @defgroup PCD_Exported_Macros PCD Exported Macros
  151. * @brief macros to handle interrupts and specific clock configurations
  152. * @{
  153. */
  154. #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
  155. #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
  156. #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
  157. #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
  158. #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE
  159. #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
  160. #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_WAKEUP_EXTI_LINE)
  161. #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_WAKEUP_EXTI_LINE
  162. #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
  163. do { \
  164. EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE); \
  165. EXTI->RTSR |= USB_WAKEUP_EXTI_LINE; \
  166. } while(0U)
  167. /**
  168. * @}
  169. */
  170. /* Exported functions --------------------------------------------------------*/
  171. /** @addtogroup PCD_Exported_Functions PCD Exported Functions
  172. * @{
  173. */
  174. /* Initialization/de-initialization functions ********************************/
  175. /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
  176. * @{
  177. */
  178. HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
  179. HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
  180. void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
  181. void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
  182. #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
  183. /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
  184. * @brief HAL USB OTG PCD Callback ID enumeration definition
  185. * @{
  186. */
  187. typedef enum
  188. {
  189. HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
  190. HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
  191. HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
  192. HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
  193. HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
  194. HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
  195. HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
  196. HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
  197. HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
  198. } HAL_PCD_CallbackIDTypeDef;
  199. /**
  200. * @}
  201. */
  202. /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
  203. * @brief HAL USB OTG PCD Callback pointer definition
  204. * @{
  205. */
  206. typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
  207. typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
  208. typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
  209. typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
  210. typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
  211. /**
  212. * @}
  213. */
  214. HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
  215. HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
  216. HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
  217. HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
  218. HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
  219. HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
  220. HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
  221. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
  222. HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
  223. HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
  224. #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
  225. /**
  226. * @}
  227. */
  228. /* I/O operation functions ***************************************************/
  229. /* Non-Blocking mode: Interrupt */
  230. /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
  231. * @{
  232. */
  233. HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
  234. HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
  235. void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
  236. void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
  237. void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
  238. void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
  239. void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
  240. void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
  241. void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
  242. void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
  243. void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  244. void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  245. void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  246. void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
  247. /**
  248. * @}
  249. */
  250. /* Peripheral Control functions **********************************************/
  251. /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
  252. * @{
  253. */
  254. HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
  255. HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
  256. HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
  257. HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
  258. HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  259. HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  260. HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
  261. uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  262. HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  263. HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  264. HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
  265. HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  266. HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
  267. /**
  268. * @}
  269. */
  270. /* Peripheral State functions ************************************************/
  271. /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
  272. * @{
  273. */
  274. PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
  275. /**
  276. * @}
  277. */
  278. /**
  279. * @}
  280. */
  281. /* Private constants ---------------------------------------------------------*/
  282. /** @defgroup PCD_Private_Constants PCD Private Constants
  283. * @{
  284. */
  285. /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
  286. * @{
  287. */
  288. #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
  289. /**
  290. * @}
  291. */
  292. /** @defgroup PCD_EP0_MPS PCD EP0 MPS
  293. * @{
  294. */
  295. #define PCD_EP0MPS_64 DEP0CTL_MPS_64
  296. #define PCD_EP0MPS_32 DEP0CTL_MPS_32
  297. #define PCD_EP0MPS_16 DEP0CTL_MPS_16
  298. #define PCD_EP0MPS_08 DEP0CTL_MPS_8
  299. /**
  300. * @}
  301. */
  302. /** @defgroup PCD_ENDP PCD ENDP
  303. * @{
  304. */
  305. #define PCD_ENDP0 0U
  306. #define PCD_ENDP1 1U
  307. #define PCD_ENDP2 2U
  308. #define PCD_ENDP3 3U
  309. #define PCD_ENDP4 4U
  310. #define PCD_ENDP5 5U
  311. #define PCD_ENDP6 6U
  312. #define PCD_ENDP7 7U
  313. /**
  314. * @}
  315. */
  316. /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
  317. * @{
  318. */
  319. #define PCD_SNG_BUF 0U
  320. #define PCD_DBL_BUF 1U
  321. /**
  322. * @}
  323. */
  324. /**
  325. * @}
  326. */
  327. /* Private macros ------------------------------------------------------------*/
  328. /** @defgroup PCD_Private_Macros PCD Private Macros
  329. * @{
  330. */
  331. /******************** Bit definition for USB_COUNTn_RX register *************/
  332. #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
  333. #define USB_CNTRX_BLSIZE (0x1U << 15)
  334. /* SetENDPOINT */
  335. #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
  336. /* GetENDPOINT */
  337. #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
  338. /* ENDPOINT transfer */
  339. #define USB_EP0StartXfer USB_EPStartXfer
  340. /**
  341. * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
  342. * @param USBx USB peripheral instance register address.
  343. * @param bEpNum Endpoint Number.
  344. * @param wType Endpoint Type.
  345. * @retval None
  346. */
  347. #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
  348. ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
  349. /**
  350. * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
  351. * @param USBx USB peripheral instance register address.
  352. * @param bEpNum Endpoint Number.
  353. * @retval Endpoint Type
  354. */
  355. #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
  356. /**
  357. * @brief free buffer used from the application realizing it to the line
  358. * toggles bit SW_BUF in the double buffered endpoint register
  359. * @param USBx USB device.
  360. * @param bEpNum, bDir
  361. * @retval None
  362. */
  363. #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
  364. if ((bDir) == 0U) \
  365. { \
  366. /* OUT double buffered endpoint */ \
  367. PCD_TX_DTOG((USBx), (bEpNum)); \
  368. } \
  369. else if ((bDir) == 1U) \
  370. { \
  371. /* IN double buffered endpoint */ \
  372. PCD_RX_DTOG((USBx), (bEpNum)); \
  373. } \
  374. } while(0)
  375. /**
  376. * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
  377. * @param USBx USB peripheral instance register address.
  378. * @param bEpNum Endpoint Number.
  379. * @param wState new state
  380. * @retval None
  381. */
  382. #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
  383. register uint16_t _wRegVal; \
  384. \
  385. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
  386. /* toggle first bit ? */ \
  387. if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
  388. { \
  389. _wRegVal ^= USB_EPTX_DTOG1; \
  390. } \
  391. /* toggle second bit ? */ \
  392. if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
  393. { \
  394. _wRegVal ^= USB_EPTX_DTOG2; \
  395. } \
  396. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  397. } while(0) /* PCD_SET_EP_TX_STATUS */
  398. /**
  399. * @brief sets the status for rx transfer (bits STAT_TX[1:0])
  400. * @param USBx USB peripheral instance register address.
  401. * @param bEpNum Endpoint Number.
  402. * @param wState new state
  403. * @retval None
  404. */
  405. #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
  406. register uint16_t _wRegVal; \
  407. \
  408. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
  409. /* toggle first bit ? */ \
  410. if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
  411. { \
  412. _wRegVal ^= USB_EPRX_DTOG1; \
  413. } \
  414. /* toggle second bit ? */ \
  415. if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
  416. { \
  417. _wRegVal ^= USB_EPRX_DTOG2; \
  418. } \
  419. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  420. } while(0) /* PCD_SET_EP_RX_STATUS */
  421. /**
  422. * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
  423. * @param USBx USB peripheral instance register address.
  424. * @param bEpNum Endpoint Number.
  425. * @param wStaterx new state.
  426. * @param wStatetx new state.
  427. * @retval None
  428. */
  429. #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
  430. register uint16_t _wRegVal; \
  431. \
  432. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
  433. /* toggle first bit ? */ \
  434. if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
  435. { \
  436. _wRegVal ^= USB_EPRX_DTOG1; \
  437. } \
  438. /* toggle second bit ? */ \
  439. if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
  440. { \
  441. _wRegVal ^= USB_EPRX_DTOG2; \
  442. } \
  443. /* toggle first bit ? */ \
  444. if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
  445. { \
  446. _wRegVal ^= USB_EPTX_DTOG1; \
  447. } \
  448. /* toggle second bit ? */ \
  449. if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
  450. { \
  451. _wRegVal ^= USB_EPTX_DTOG2; \
  452. } \
  453. \
  454. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  455. } while(0) /* PCD_SET_EP_TXRX_STATUS */
  456. /**
  457. * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
  458. * /STAT_RX[1:0])
  459. * @param USBx USB peripheral instance register address.
  460. * @param bEpNum Endpoint Number.
  461. * @retval status
  462. */
  463. #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
  464. #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
  465. /**
  466. * @brief sets directly the VALID tx/rx-status into the endpoint register
  467. * @param USBx USB peripheral instance register address.
  468. * @param bEpNum Endpoint Number.
  469. * @retval None
  470. */
  471. #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
  472. #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
  473. /**
  474. * @brief checks stall condition in an endpoint.
  475. * @param USBx USB peripheral instance register address.
  476. * @param bEpNum Endpoint Number.
  477. * @retval TRUE = endpoint in stall condition.
  478. */
  479. #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
  480. == USB_EP_TX_STALL)
  481. #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
  482. == USB_EP_RX_STALL)
  483. /**
  484. * @brief set & clear EP_KIND bit.
  485. * @param USBx USB peripheral instance register address.
  486. * @param bEpNum Endpoint Number.
  487. * @retval None
  488. */
  489. #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
  490. register uint16_t _wRegVal; \
  491. \
  492. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  493. \
  494. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
  495. } while(0) /* PCD_SET_EP_KIND */
  496. #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
  497. register uint16_t _wRegVal; \
  498. \
  499. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
  500. \
  501. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  502. } while(0) /* PCD_CLEAR_EP_KIND */
  503. /**
  504. * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
  505. * @param USBx USB peripheral instance register address.
  506. * @param bEpNum Endpoint Number.
  507. * @retval None
  508. */
  509. #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  510. #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  511. /**
  512. * @brief Sets/clears directly EP_KIND bit in the endpoint register.
  513. * @param USBx USB peripheral instance register address.
  514. * @param bEpNum Endpoint Number.
  515. * @retval None
  516. */
  517. #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
  518. #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
  519. /**
  520. * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
  521. * @param USBx USB peripheral instance register address.
  522. * @param bEpNum Endpoint Number.
  523. * @retval None
  524. */
  525. #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
  526. register uint16_t _wRegVal; \
  527. \
  528. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
  529. \
  530. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
  531. } while(0) /* PCD_CLEAR_RX_EP_CTR */
  532. #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
  533. register uint16_t _wRegVal; \
  534. \
  535. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
  536. \
  537. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
  538. } while(0) /* PCD_CLEAR_TX_EP_CTR */
  539. /**
  540. * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
  541. * @param USBx USB peripheral instance register address.
  542. * @param bEpNum Endpoint Number.
  543. * @retval None
  544. */
  545. #define PCD_RX_DTOG(USBx, bEpNum) do { \
  546. register uint16_t _wEPVal; \
  547. \
  548. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  549. \
  550. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
  551. } while(0) /* PCD_RX_DTOG */
  552. #define PCD_TX_DTOG(USBx, bEpNum) do { \
  553. register uint16_t _wEPVal; \
  554. \
  555. _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
  556. \
  557. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
  558. } while(0) /* PCD_TX_DTOG */
  559. /**
  560. * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
  561. * @param USBx USB peripheral instance register address.
  562. * @param bEpNum Endpoint Number.
  563. * @retval None
  564. */
  565. #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
  566. register uint16_t _wRegVal; \
  567. \
  568. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  569. \
  570. if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
  571. { \
  572. PCD_RX_DTOG((USBx), (bEpNum)); \
  573. } \
  574. } while(0) /* PCD_CLEAR_RX_DTOG */
  575. #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
  576. register uint16_t _wRegVal; \
  577. \
  578. _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
  579. \
  580. if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
  581. { \
  582. PCD_TX_DTOG((USBx), (bEpNum)); \
  583. } \
  584. } while(0) /* PCD_CLEAR_TX_DTOG */
  585. /**
  586. * @brief Sets address in an endpoint register.
  587. * @param USBx USB peripheral instance register address.
  588. * @param bEpNum Endpoint Number.
  589. * @param bAddr Address.
  590. * @retval None
  591. */
  592. #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
  593. register uint16_t _wRegVal; \
  594. \
  595. _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
  596. \
  597. PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
  598. } while(0) /* PCD_SET_EP_ADDRESS */
  599. /**
  600. * @brief Gets address in an endpoint register.
  601. * @param USBx USB peripheral instance register address.
  602. * @param bEpNum Endpoint Number.
  603. * @retval None
  604. */
  605. #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
  606. #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  607. #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
  608. /**
  609. * @brief sets address of the tx/rx buffer.
  610. * @param USBx USB peripheral instance register address.
  611. * @param bEpNum Endpoint Number.
  612. * @param wAddr address to be set (must be word aligned).
  613. * @retval None
  614. */
  615. #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
  616. register uint16_t *_wRegVal; \
  617. register uint32_t _wRegBase = (uint32_t)USBx; \
  618. \
  619. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  620. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
  621. *_wRegVal = ((wAddr) >> 1) << 1; \
  622. } while(0) /* PCD_SET_EP_TX_ADDRESS */
  623. #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
  624. register uint16_t *_wRegVal; \
  625. register uint32_t _wRegBase = (uint32_t)USBx; \
  626. \
  627. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  628. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
  629. *_wRegVal = ((wAddr) >> 1) << 1; \
  630. } while(0) /* PCD_SET_EP_RX_ADDRESS */
  631. /**
  632. * @brief Gets address of the tx/rx buffer.
  633. * @param USBx USB peripheral instance register address.
  634. * @param bEpNum Endpoint Number.
  635. * @retval address of the buffer.
  636. */
  637. #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
  638. #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
  639. /**
  640. * @brief Sets counter of rx buffer with no. of blocks.
  641. * @param pdwReg Register pointer
  642. * @param wCount Counter.
  643. * @param wNBlocks no. of Blocks.
  644. * @retval None
  645. */
  646. #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
  647. (wNBlocks) = (wCount) >> 5; \
  648. *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
  649. } while(0) /* PCD_CALC_BLK32 */
  650. #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
  651. (wNBlocks) = (wCount) >> 1; \
  652. if (((wCount) & 0x1U) != 0U) \
  653. { \
  654. (wNBlocks)++; \
  655. } \
  656. *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
  657. } while(0) /* PCD_CALC_BLK2 */
  658. #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \
  659. uint32_t wNBlocks; \
  660. if ((wCount) == 0U) \
  661. { \
  662. *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
  663. *(pdwReg) |= USB_CNTRX_BLSIZE; \
  664. } \
  665. else if((wCount) < 62U) \
  666. { \
  667. PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
  668. } \
  669. else \
  670. { \
  671. PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \
  672. } \
  673. } while(0) /* PCD_SET_EP_CNT_RX_REG */
  674. #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
  675. register uint32_t _wRegBase = (uint32_t)(USBx); \
  676. uint16_t *pdwReg; \
  677. \
  678. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  679. pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  680. PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
  681. } while(0)
  682. /**
  683. * @brief sets counter for the tx/rx buffer.
  684. * @param USBx USB peripheral instance register address.
  685. * @param bEpNum Endpoint Number.
  686. * @param wCount Counter value.
  687. * @retval None
  688. */
  689. #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
  690. register uint32_t _wRegBase = (uint32_t)(USBx); \
  691. uint16_t *_wRegVal; \
  692. \
  693. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  694. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
  695. *_wRegVal = (uint16_t)(wCount); \
  696. } while(0)
  697. #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
  698. register uint32_t _wRegBase = (uint32_t)(USBx); \
  699. uint16_t *_wRegVal; \
  700. \
  701. _wRegBase += (uint32_t)(USBx)->BTABLE; \
  702. _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  703. PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
  704. } while(0)
  705. /**
  706. * @brief gets counter of the tx buffer.
  707. * @param USBx USB peripheral instance register address.
  708. * @param bEpNum Endpoint Number.
  709. * @retval Counter value
  710. */
  711. #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
  712. #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
  713. /**
  714. * @brief Sets buffer 0/1 address in a double buffer endpoint.
  715. * @param USBx USB peripheral instance register address.
  716. * @param bEpNum Endpoint Number.
  717. * @param wBuf0Addr buffer 0 address.
  718. * @retval Counter value
  719. */
  720. #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
  721. PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
  722. } while(0) /* PCD_SET_EP_DBUF0_ADDR */
  723. #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
  724. PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
  725. } while(0) /* PCD_SET_EP_DBUF1_ADDR */
  726. /**
  727. * @brief Sets addresses in a double buffer endpoint.
  728. * @param USBx USB peripheral instance register address.
  729. * @param bEpNum Endpoint Number.
  730. * @param wBuf0Addr: buffer 0 address.
  731. * @param wBuf1Addr = buffer 1 address.
  732. * @retval None
  733. */
  734. #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
  735. PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
  736. PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
  737. } while(0) /* PCD_SET_EP_DBUF_ADDR */
  738. /**
  739. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  740. * @param USBx USB peripheral instance register address.
  741. * @param bEpNum Endpoint Number.
  742. * @retval None
  743. */
  744. #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
  745. #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
  746. /**
  747. * @brief Gets buffer 0/1 address of a double buffer endpoint.
  748. * @param USBx USB peripheral instance register address.
  749. * @param bEpNum Endpoint Number.
  750. * @param bDir endpoint dir EP_DBUF_OUT = OUT
  751. * EP_DBUF_IN = IN
  752. * @param wCount: Counter value
  753. * @retval None
  754. */
  755. #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
  756. if ((bDir) == 0U) \
  757. /* OUT endpoint */ \
  758. { \
  759. PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
  760. } \
  761. else \
  762. { \
  763. if ((bDir) == 1U) \
  764. { \
  765. /* IN endpoint */ \
  766. PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
  767. } \
  768. } \
  769. } while(0) /* SetEPDblBuf0Count*/
  770. #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
  771. register uint32_t _wBase = (uint32_t)(USBx); \
  772. uint16_t *_wEPRegVal; \
  773. \
  774. if ((bDir) == 0U) \
  775. { \
  776. /* OUT endpoint */ \
  777. PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
  778. } \
  779. else \
  780. { \
  781. if ((bDir) == 1U) \
  782. { \
  783. /* IN endpoint */ \
  784. _wBase += (uint32_t)(USBx)->BTABLE; \
  785. _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
  786. *_wEPRegVal = (uint16_t)(wCount); \
  787. } \
  788. } \
  789. } while(0) /* SetEPDblBuf1Count */
  790. #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
  791. PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  792. PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
  793. } while(0) /* PCD_SET_EP_DBUF_CNT */
  794. /**
  795. * @brief Gets buffer 0/1 rx/tx counter for double buffering.
  796. * @param USBx USB peripheral instance register address.
  797. * @param bEpNum Endpoint Number.
  798. * @retval None
  799. */
  800. #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
  801. #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
  802. /**
  803. * @}
  804. */
  805. /**
  806. * @}
  807. */
  808. /**
  809. * @}
  810. */
  811. #endif /* defined (USB) */
  812. #ifdef __cplusplus
  813. }
  814. #endif
  815. #endif /* STM32L1xx_HAL_PCD_H */
  816. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/