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stm32l1xx_hal_pwr.h 16KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __STM32L1xx_HAL_PWR_H
  21. #define __STM32L1xx_HAL_PWR_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32l1xx_hal_def.h"
  27. /** @addtogroup STM32L1xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup PWR
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup PWR_Exported_Types PWR Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief PWR PVD configuration structure definition
  39. */
  40. typedef struct
  41. {
  42. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  43. This parameter can be a value of @ref PWR_PVD_detection_level */
  44. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  45. This parameter can be a value of @ref PWR_PVD_Mode */
  46. }PWR_PVDTypeDef;
  47. /**
  48. * @}
  49. */
  50. /* Internal constants --------------------------------------------------------*/
  51. /** @addtogroup PWR_Private_Constants
  52. * @{
  53. */
  54. #define PWR_EXTI_LINE_PVD (0x00010000U) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
  55. /**
  56. * @}
  57. */
  58. /* Exported constants --------------------------------------------------------*/
  59. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  60. * @{
  61. */
  62. /** @defgroup PWR_register_alias_address PWR Register alias address
  63. * @{
  64. */
  65. /* ------------- PWR registers bit address in the alias region ---------------*/
  66. #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
  67. #define PWR_CR_OFFSET 0x00
  68. #define PWR_CSR_OFFSET 0x04
  69. #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
  70. #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
  71. /**
  72. * @}
  73. */
  74. /** @defgroup PWR_CR_register_alias PWR CR Register alias address
  75. * @{
  76. */
  77. /* --- CR Register ---*/
  78. /* Alias word address of LPSDSR bit */
  79. #define LPSDSR_BIT_NUMBER POSITION_VAL(PWR_CR_LPSDSR)
  80. #define CR_LPSDSR_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPSDSR_BIT_NUMBER * 4)))
  81. /* Alias word address of DBP bit */
  82. #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
  83. #define CR_DBP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (DBP_BIT_NUMBER * 4)))
  84. /* Alias word address of LPRUN bit */
  85. #define LPRUN_BIT_NUMBER POSITION_VAL(PWR_CR_LPRUN)
  86. #define CR_LPRUN_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPRUN_BIT_NUMBER * 4)))
  87. /* Alias word address of PVDE bit */
  88. #define PVDE_BIT_NUMBER POSITION_VAL(PWR_CR_PVDE)
  89. #define CR_PVDE_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (PVDE_BIT_NUMBER * 4)))
  90. /* Alias word address of FWU bit */
  91. #define FWU_BIT_NUMBER POSITION_VAL(PWR_CR_FWU)
  92. #define CR_FWU_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FWU_BIT_NUMBER * 4)))
  93. /* Alias word address of ULP bit */
  94. #define ULP_BIT_NUMBER POSITION_VAL(PWR_CR_ULP)
  95. #define CR_ULP_BB ((uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ULP_BIT_NUMBER * 4)))
  96. /**
  97. * @}
  98. */
  99. /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
  100. * @{
  101. */
  102. /* --- CSR Register ---*/
  103. /* Alias word address of EWUP1, EWUP2 and EWUP3 bits */
  104. #define CSR_EWUP_BB(VAL) ((uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (POSITION_VAL(VAL) * 4)))
  105. /**
  106. * @}
  107. */
  108. /** @defgroup PWR_PVD_detection_level PWR PVD detection level
  109. * @{
  110. */
  111. #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
  112. #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
  113. #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
  114. #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
  115. #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
  116. #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
  117. #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
  118. #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7 /* External input analog voltage
  119. (Compare internally to VREFINT) */
  120. /**
  121. * @}
  122. */
  123. /** @defgroup PWR_PVD_Mode PWR PVD Mode
  124. * @{
  125. */
  126. #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< basic mode is used */
  127. #define PWR_PVD_MODE_IT_RISING (0x00010001U) /*!< External Interrupt Mode with Rising edge trigger detection */
  128. #define PWR_PVD_MODE_IT_FALLING (0x00010002U) /*!< External Interrupt Mode with Falling edge trigger detection */
  129. #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  130. #define PWR_PVD_MODE_EVENT_RISING (0x00020001U) /*!< Event Mode with Rising edge trigger detection */
  131. #define PWR_PVD_MODE_EVENT_FALLING (0x00020002U) /*!< Event Mode with Falling edge trigger detection */
  132. #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) /*!< Event Mode with Rising/Falling edge trigger detection */
  133. /**
  134. * @}
  135. */
  136. /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR Regulator state in SLEEP/STOP mode
  137. * @{
  138. */
  139. #define PWR_MAINREGULATOR_ON (0x00000000U)
  140. #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPSDSR
  141. /**
  142. * @}
  143. */
  144. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  145. * @{
  146. */
  147. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
  148. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
  149. /**
  150. * @}
  151. */
  152. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  153. * @{
  154. */
  155. #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
  156. #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
  157. /**
  158. * @}
  159. */
  160. /** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
  161. * @{
  162. */
  163. #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS_0
  164. #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1
  165. #define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS
  166. /**
  167. * @}
  168. */
  169. /** @defgroup PWR_Flag PWR Flag
  170. * @{
  171. */
  172. #define PWR_FLAG_WU PWR_CSR_WUF
  173. #define PWR_FLAG_SB PWR_CSR_SBF
  174. #define PWR_FLAG_PVDO PWR_CSR_PVDO
  175. #define PWR_FLAG_VREFINTRDY PWR_CSR_VREFINTRDYF
  176. #define PWR_FLAG_VOS PWR_CSR_VOSF
  177. #define PWR_FLAG_REGLP PWR_CSR_REGLPF
  178. /**
  179. * @}
  180. */
  181. /**
  182. * @}
  183. */
  184. /* Exported macro ------------------------------------------------------------*/
  185. /** @defgroup PWR_Exported_Macros PWR Exported Macros
  186. * @{
  187. */
  188. /** @brief macros configure the main internal regulator output voltage.
  189. * @param __REGULATOR__ specifies the regulator output voltage to achieve
  190. * a tradeoff between performance and power consumption when the device does
  191. * not operate at the maximum frequency (refer to the datasheets for more details).
  192. * This parameter can be one of the following values:
  193. * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode,
  194. * System frequency up to 32 MHz.
  195. * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode,
  196. * System frequency up to 16 MHz.
  197. * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode,
  198. * System frequency up to 4.2 MHz
  199. * @retval None
  200. */
  201. #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) (MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)))
  202. /** @brief Check PWR flag is set or not.
  203. * @param __FLAG__ specifies the flag to check.
  204. * This parameter can be one of the following values:
  205. * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
  206. * was received from the WKUP pin or from the RTC alarm (Alarm B),
  207. * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
  208. * An additional wakeup event is detected if the WKUP pin is enabled
  209. * (by setting the EWUP bit) when the WKUP pin level is already high.
  210. * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
  211. * resumed from StandBy mode.
  212. * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
  213. * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
  214. * For this reason, this bit is equal to 0 after Standby or reset
  215. * until the PVDE bit is set.
  216. * @arg PWR_FLAG_VREFINTRDY: Internal voltage reference (VREFINT) ready flag.
  217. * This bit indicates the state of the internal voltage reference, VREFINT.
  218. * @arg PWR_FLAG_VOS: Voltage Scaling select flag. A delay is required for
  219. * the internal regulator to be ready after the voltage range is changed.
  220. * The VOSF bit indicates that the regulator has reached the voltage level
  221. * defined with bits VOS of PWR_CR register.
  222. * @arg PWR_FLAG_REGLP: Regulator LP flag. When the MCU exits from Low power run
  223. * mode, this bit stays at 1 until the regulator is ready in main mode.
  224. * A polling on this bit is recommended to wait for the regulator main mode.
  225. * This bit is reset by hardware when the regulator is ready.
  226. * @retval The new state of __FLAG__ (TRUE or FALSE).
  227. */
  228. #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
  229. /** @brief Clear the PWR's pending flags.
  230. * @param __FLAG__ specifies the flag to clear.
  231. * This parameter can be one of the following values:
  232. * @arg PWR_FLAG_WU: Wake Up flag
  233. * @arg PWR_FLAG_SB: StandBy flag
  234. */
  235. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR->CR, ((__FLAG__) << 2))
  236. /**
  237. * @brief Enable interrupt on PVD Exti Line 16.
  238. * @retval None.
  239. */
  240. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  241. /**
  242. * @brief Disable interrupt on PVD Exti Line 16.
  243. * @retval None.
  244. */
  245. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  246. /**
  247. * @brief Enable event on PVD Exti Line 16.
  248. * @retval None.
  249. */
  250. #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
  251. /**
  252. * @brief Disable event on PVD Exti Line 16.
  253. * @retval None.
  254. */
  255. #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EXTI_LINE_PVD)
  256. /**
  257. * @brief PVD EXTI line configuration: set falling edge trigger.
  258. * @retval None.
  259. */
  260. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  261. /**
  262. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  263. * @retval None.
  264. */
  265. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  266. /**
  267. * @brief PVD EXTI line configuration: set rising edge trigger.
  268. * @retval None.
  269. */
  270. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  271. /**
  272. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  273. * @retval None.
  274. */
  275. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  276. /**
  277. * @brief PVD EXTI line configuration: set rising & falling edge trigger.
  278. * @retval None.
  279. */
  280. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
  281. do { \
  282. __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
  283. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
  284. } while(0)
  285. /**
  286. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  287. * @retval None.
  288. */
  289. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
  290. do { \
  291. __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
  292. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
  293. } while(0)
  294. /**
  295. * @brief Check whether the specified PVD EXTI interrupt flag is set or not.
  296. * @retval EXTI PVD Line Status.
  297. */
  298. #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
  299. /**
  300. * @brief Clear the PVD EXTI flag.
  301. * @retval None.
  302. */
  303. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
  304. /**
  305. * @brief Generate a Software interrupt on selected EXTI line.
  306. * @retval None.
  307. */
  308. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
  309. /**
  310. * @}
  311. */
  312. /* Private macro -------------------------------------------------------------*/
  313. /** @defgroup PWR_Private_Macros PWR Private Macros
  314. * @{
  315. */
  316. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  317. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  318. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  319. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  320. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
  321. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
  322. ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
  323. ((MODE) == PWR_PVD_MODE_NORMAL))
  324. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  325. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  326. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
  327. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) )
  328. #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
  329. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
  330. ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
  331. /**
  332. * @}
  333. */
  334. /* Include PWR HAL Extension module */
  335. #include "stm32l1xx_hal_pwr_ex.h"
  336. /* Exported functions --------------------------------------------------------*/
  337. /** @addtogroup PWR_Exported_Functions PWR Exported Functions
  338. * @{
  339. */
  340. /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  341. * @{
  342. */
  343. /* Initialization and de-initialization functions *******************************/
  344. void HAL_PWR_DeInit(void);
  345. void HAL_PWR_EnableBkUpAccess(void);
  346. void HAL_PWR_DisableBkUpAccess(void);
  347. /**
  348. * @}
  349. */
  350. /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
  351. * @{
  352. */
  353. /* Peripheral Control functions ************************************************/
  354. void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  355. void HAL_PWR_EnablePVD(void);
  356. void HAL_PWR_DisablePVD(void);
  357. /* WakeUp pins configuration functions ****************************************/
  358. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
  359. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  360. /* Low Power modes configuration functions ************************************/
  361. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  362. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  363. void HAL_PWR_EnterSTANDBYMode(void);
  364. void HAL_PWR_EnableSleepOnExit(void);
  365. void HAL_PWR_DisableSleepOnExit(void);
  366. void HAL_PWR_EnableSEVOnPend(void);
  367. void HAL_PWR_DisableSEVOnPend(void);
  368. void HAL_PWR_PVD_IRQHandler(void);
  369. void HAL_PWR_PVDCallback(void);
  370. /**
  371. * @}
  372. */
  373. /**
  374. * @}
  375. */
  376. /**
  377. * @}
  378. */
  379. /**
  380. * @}
  381. */
  382. #ifdef __cplusplus
  383. }
  384. #endif
  385. #endif /* __STM32L1xx_HAL_PWR_H */
  386. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/