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stm32l1xx_ll_pwr.h 23KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_ll_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __STM32L1xx_LL_PWR_H
  21. #define __STM32L1xx_LL_PWR_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32l1xx.h"
  27. /** @addtogroup STM32L1xx_LL_Driver
  28. * @{
  29. */
  30. #if defined(PWR)
  31. /** @defgroup PWR_LL PWR
  32. * @{
  33. */
  34. /* Private types -------------------------------------------------------------*/
  35. /* Private variables ---------------------------------------------------------*/
  36. /* Private constants ---------------------------------------------------------*/
  37. /* Private macros ------------------------------------------------------------*/
  38. /* Exported types ------------------------------------------------------------*/
  39. /* Exported constants --------------------------------------------------------*/
  40. /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
  41. * @{
  42. */
  43. /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
  44. * @brief Flags defines which can be used with LL_PWR_WriteReg function
  45. * @{
  46. */
  47. #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
  48. #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
  49. /**
  50. * @}
  51. */
  52. /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
  53. * @brief Flags defines which can be used with LL_PWR_ReadReg function
  54. * @{
  55. */
  56. #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
  57. #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
  58. #if defined(PWR_PVD_SUPPORT)
  59. #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
  60. #endif /* PWR_PVD_SUPPORT */
  61. #if defined(PWR_CSR_VREFINTRDYF)
  62. #define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */
  63. #endif /* PWR_CSR_VREFINTRDYF */
  64. #define LL_PWR_CSR_VOS PWR_CSR_VOSF /*!< Voltage scaling select flag */
  65. #define LL_PWR_CSR_REGLPF PWR_CSR_REGLPF /*!< Regulator low power flag */
  66. #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */
  67. #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */
  68. #if defined(PWR_CSR_EWUP3)
  69. #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */
  70. #endif /* PWR_CSR_EWUP3 */
  71. /**
  72. * @}
  73. */
  74. /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage
  75. * @{
  76. */
  77. #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0) /*!< 1.8V (range 1) */
  78. #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) /*!< 1.5V (range 2) */
  79. #define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /*!< 1.2V (range 3) */
  80. /**
  81. * @}
  82. */
  83. /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
  84. * @{
  85. */
  86. #define LL_PWR_MODE_STOP 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
  87. #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
  88. /**
  89. * @}
  90. */
  91. /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES Regulator Mode In Low Power Modes
  92. * @{
  93. */
  94. #define LL_PWR_REGU_LPMODES_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep/sleep/low-power run mode */
  95. #define LL_PWR_REGU_LPMODES_LOW_POWER (PWR_CR_LPSDSR) /*!< Voltage Regulator in low-power mode during deepsleep/sleep/low-power run mode */
  96. /**
  97. * @}
  98. */
  99. #if defined(PWR_CR_LPDS)
  100. /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
  101. * @{
  102. */
  103. #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
  104. #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
  105. /**
  106. * @}
  107. */
  108. #endif /* PWR_CR_LPDS */
  109. #if defined(PWR_PVD_SUPPORT)
  110. /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
  111. * @{
  112. */
  113. #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 1.9 V */
  114. #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.1 V */
  115. #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.3 V */
  116. #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
  117. #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.7 V */
  118. #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.9 V */
  119. #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 3.1 V */
  120. #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< External input analog voltage (Compare internally to VREFINT) */
  121. /**
  122. * @}
  123. */
  124. #endif /* PWR_PVD_SUPPORT */
  125. /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
  126. * @{
  127. */
  128. #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */
  129. #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */
  130. #if defined(PWR_CSR_EWUP3)
  131. #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */
  132. #endif /* PWR_CSR_EWUP3 */
  133. /**
  134. * @}
  135. */
  136. /**
  137. * @}
  138. */
  139. /* Exported macro ------------------------------------------------------------*/
  140. /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
  141. * @{
  142. */
  143. /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
  144. * @{
  145. */
  146. /**
  147. * @brief Write a value in PWR register
  148. * @param __REG__ Register to be written
  149. * @param __VALUE__ Value to be written in the register
  150. * @retval None
  151. */
  152. #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
  153. /**
  154. * @brief Read a value in PWR register
  155. * @param __REG__ Register to be read
  156. * @retval Register value
  157. */
  158. #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
  159. /**
  160. * @}
  161. */
  162. /**
  163. * @}
  164. */
  165. /* Exported functions --------------------------------------------------------*/
  166. /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
  167. * @{
  168. */
  169. /** @defgroup PWR_LL_EF_Configuration Configuration
  170. * @{
  171. */
  172. /**
  173. * @brief Switch the Regulator from main mode to low-power mode
  174. * @rmtoll CR LPRUN LL_PWR_EnableLowPowerRunMode
  175. * @note Remind to set the Regulator to low power before enabling
  176. * LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER).
  177. * @retval None
  178. */
  179. __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void)
  180. {
  181. SET_BIT(PWR->CR, PWR_CR_LPRUN);
  182. }
  183. /**
  184. * @brief Switch the Regulator from low-power mode to main mode
  185. * @rmtoll CR LPRUN LL_PWR_DisableLowPowerRunMode
  186. * @retval None
  187. */
  188. __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void)
  189. {
  190. CLEAR_BIT(PWR->CR, PWR_CR_LPRUN);
  191. }
  192. /**
  193. * @brief Check if the Regulator is in low-power mode
  194. * @rmtoll CR LPRUN LL_PWR_IsEnabledLowPowerRunMode
  195. * @retval State of bit (1 or 0).
  196. */
  197. __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void)
  198. {
  199. return ((READ_BIT(PWR->CR, PWR_CR_LPRUN) == PWR_CR_LPRUN) ? 1UL : 0UL);
  200. }
  201. /**
  202. * @brief Set voltage Regulator to low-power and switch from
  203. * run main mode to run low-power mode.
  204. * @rmtoll CR LPSDSR LL_PWR_EnterLowPowerRunMode\n
  205. * CR LPRUN LL_PWR_EnterLowPowerRunMode
  206. * @note This "high level" function is introduced to provide functional
  207. * compatibility with other families. Notice that the two registers
  208. * have to be written sequentially, so this function is not atomic.
  209. * To assure atomicity you can call separately the following functions:
  210. * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER);
  211. * - @ref LL_PWR_EnableLowPowerRunMode();
  212. * @retval None
  213. */
  214. __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void)
  215. {
  216. SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */
  217. SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */
  218. }
  219. /**
  220. * @brief Set voltage Regulator to main and switch from
  221. * run main mode to low-power mode.
  222. * @rmtoll CR LPSDSR LL_PWR_ExitLowPowerRunMode\n
  223. * CR LPRUN LL_PWR_ExitLowPowerRunMode
  224. * @note This "high level" function is introduced to provide functional
  225. * compatibility with other families. Notice that the two registers
  226. * have to be written sequentially, so this function is not atomic.
  227. * To assure atomicity you can call separately the following functions:
  228. * - @ref LL_PWR_DisableLowPowerRunMode();
  229. * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN);
  230. * @retval None
  231. */
  232. __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void)
  233. {
  234. CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */
  235. CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */
  236. }
  237. /**
  238. * @brief Set the main internal Regulator output voltage
  239. * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling
  240. * @param VoltageScaling This parameter can be one of the following values:
  241. * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
  242. * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
  243. * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
  244. * @retval None
  245. */
  246. __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)
  247. {
  248. MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling);
  249. }
  250. /**
  251. * @brief Get the main internal Regulator output voltage
  252. * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling
  253. * @retval Returned value can be one of the following values:
  254. * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1
  255. * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2
  256. * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3
  257. */
  258. __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void)
  259. {
  260. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS));
  261. }
  262. /**
  263. * @brief Enable access to the backup domain
  264. * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
  265. * @retval None
  266. */
  267. __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
  268. {
  269. SET_BIT(PWR->CR, PWR_CR_DBP);
  270. }
  271. /**
  272. * @brief Disable access to the backup domain
  273. * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
  274. * @retval None
  275. */
  276. __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
  277. {
  278. CLEAR_BIT(PWR->CR, PWR_CR_DBP);
  279. }
  280. /**
  281. * @brief Check if the backup domain is enabled
  282. * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
  283. * @retval State of bit (1 or 0).
  284. */
  285. __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
  286. {
  287. return ((READ_BIT(PWR->CR, PWR_CR_DBP) == PWR_CR_DBP) ? 1UL : 0UL);
  288. }
  289. /**
  290. * @brief Set voltage Regulator mode during low power modes
  291. * @rmtoll CR LPSDSR LL_PWR_SetRegulModeLP
  292. * @param RegulMode This parameter can be one of the following values:
  293. * @arg @ref LL_PWR_REGU_LPMODES_MAIN
  294. * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
  295. * @retval None
  296. */
  297. __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode)
  298. {
  299. MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode);
  300. }
  301. /**
  302. * @brief Get voltage Regulator mode during low power modes
  303. * @rmtoll CR LPSDSR LL_PWR_GetRegulModeLP
  304. * @retval Returned value can be one of the following values:
  305. * @arg @ref LL_PWR_REGU_LPMODES_MAIN
  306. * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER
  307. */
  308. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void)
  309. {
  310. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR));
  311. }
  312. #if defined(PWR_CR_LPDS)
  313. /**
  314. * @brief Set voltage Regulator mode during deep sleep mode
  315. * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
  316. * @param RegulMode This parameter can be one of the following values:
  317. * @arg @ref LL_PWR_REGU_DSMODE_MAIN
  318. * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  319. * @retval None
  320. */
  321. __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
  322. {
  323. MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
  324. }
  325. /**
  326. * @brief Get voltage Regulator mode during deep sleep mode
  327. * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
  328. * @retval Returned value can be one of the following values:
  329. * @arg @ref LL_PWR_REGU_DSMODE_MAIN
  330. * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
  331. */
  332. __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
  333. {
  334. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
  335. }
  336. #endif /* PWR_CR_LPDS */
  337. /**
  338. * @brief Set Power Down mode when CPU enters deepsleep
  339. * @rmtoll CR PDDS LL_PWR_SetPowerMode
  340. * @param PDMode This parameter can be one of the following values:
  341. * @arg @ref LL_PWR_MODE_STOP
  342. * @arg @ref LL_PWR_MODE_STANDBY
  343. * @note Set the Regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER)
  344. * before setting MODE_STOP. If the Regulator remains in "main mode",
  345. * it consumes more power without providing any additional feature.
  346. * In MODE_STANDBY the Regulator is automatically off.
  347. * @retval None
  348. */
  349. __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
  350. {
  351. MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode);
  352. }
  353. /**
  354. * @brief Get Power Down mode when CPU enters deepsleep
  355. * @rmtoll CR PDDS LL_PWR_GetPowerMode
  356. * @retval Returned value can be one of the following values:
  357. * @arg @ref LL_PWR_MODE_STOP
  358. * @arg @ref LL_PWR_MODE_STANDBY
  359. */
  360. __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
  361. {
  362. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS));
  363. }
  364. #if defined(PWR_PVD_SUPPORT)
  365. /**
  366. * @brief Configure the voltage threshold detected by the Power Voltage Detector
  367. * @rmtoll CR PLS LL_PWR_SetPVDLevel
  368. * @param PVDLevel This parameter can be one of the following values:
  369. * @arg @ref LL_PWR_PVDLEVEL_0
  370. * @arg @ref LL_PWR_PVDLEVEL_1
  371. * @arg @ref LL_PWR_PVDLEVEL_2
  372. * @arg @ref LL_PWR_PVDLEVEL_3
  373. * @arg @ref LL_PWR_PVDLEVEL_4
  374. * @arg @ref LL_PWR_PVDLEVEL_5
  375. * @arg @ref LL_PWR_PVDLEVEL_6
  376. * @arg @ref LL_PWR_PVDLEVEL_7
  377. * @retval None
  378. */
  379. __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
  380. {
  381. MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
  382. }
  383. /**
  384. * @brief Get the voltage threshold detection
  385. * @rmtoll CR PLS LL_PWR_GetPVDLevel
  386. * @retval Returned value can be one of the following values:
  387. * @arg @ref LL_PWR_PVDLEVEL_0
  388. * @arg @ref LL_PWR_PVDLEVEL_1
  389. * @arg @ref LL_PWR_PVDLEVEL_2
  390. * @arg @ref LL_PWR_PVDLEVEL_3
  391. * @arg @ref LL_PWR_PVDLEVEL_4
  392. * @arg @ref LL_PWR_PVDLEVEL_5
  393. * @arg @ref LL_PWR_PVDLEVEL_6
  394. * @arg @ref LL_PWR_PVDLEVEL_7
  395. */
  396. __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
  397. {
  398. return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
  399. }
  400. /**
  401. * @brief Enable Power Voltage Detector
  402. * @rmtoll CR PVDE LL_PWR_EnablePVD
  403. * @retval None
  404. */
  405. __STATIC_INLINE void LL_PWR_EnablePVD(void)
  406. {
  407. SET_BIT(PWR->CR, PWR_CR_PVDE);
  408. }
  409. /**
  410. * @brief Disable Power Voltage Detector
  411. * @rmtoll CR PVDE LL_PWR_DisablePVD
  412. * @retval None
  413. */
  414. __STATIC_INLINE void LL_PWR_DisablePVD(void)
  415. {
  416. CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
  417. }
  418. /**
  419. * @brief Check if Power Voltage Detector is enabled
  420. * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
  421. * @retval State of bit (1 or 0).
  422. */
  423. __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
  424. {
  425. return ((READ_BIT(PWR->CR, PWR_CR_PVDE) == PWR_CR_PVDE) ? 1UL : 0UL);
  426. }
  427. #endif /* PWR_PVD_SUPPORT */
  428. /**
  429. * @brief Enable the WakeUp PINx functionality
  430. * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n
  431. * @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n
  432. * @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin
  433. * @param WakeUpPin This parameter can be one of the following values:
  434. * @arg @ref LL_PWR_WAKEUP_PIN1
  435. * @arg @ref LL_PWR_WAKEUP_PIN2
  436. * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  437. *
  438. * (*) not available on all devices
  439. * @retval None
  440. */
  441. __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
  442. {
  443. SET_BIT(PWR->CSR, WakeUpPin);
  444. }
  445. /**
  446. * @brief Disable the WakeUp PINx functionality
  447. * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n
  448. * @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n
  449. * @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin
  450. * @param WakeUpPin This parameter can be one of the following values:
  451. * @arg @ref LL_PWR_WAKEUP_PIN1
  452. * @arg @ref LL_PWR_WAKEUP_PIN2
  453. * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  454. *
  455. * (*) not available on all devices
  456. * @retval None
  457. */
  458. __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
  459. {
  460. CLEAR_BIT(PWR->CSR, WakeUpPin);
  461. }
  462. /**
  463. * @brief Check if the WakeUp PINx functionality is enabled
  464. * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n
  465. * @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n
  466. * @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin
  467. * @param WakeUpPin This parameter can be one of the following values:
  468. * @arg @ref LL_PWR_WAKEUP_PIN1
  469. * @arg @ref LL_PWR_WAKEUP_PIN2
  470. * @arg @ref LL_PWR_WAKEUP_PIN3 (*)
  471. *
  472. * (*) not available on all devices
  473. * @retval State of bit (1 or 0).
  474. */
  475. __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
  476. {
  477. return ((READ_BIT(PWR->CSR, WakeUpPin) == WakeUpPin) ? 1UL : 0UL);
  478. }
  479. /**
  480. * @brief Enable ultra low-power mode by enabling VREFINT switch off in low-power modes
  481. * @rmtoll CR ULP LL_PWR_EnableUltraLowPower
  482. * @retval None
  483. */
  484. __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void)
  485. {
  486. SET_BIT(PWR->CR, PWR_CR_ULP);
  487. }
  488. /**
  489. * @brief Disable ultra low-power mode by disabling VREFINT switch off in low-power modes
  490. * @rmtoll CR ULP LL_PWR_DisableUltraLowPower
  491. * @retval None
  492. */
  493. __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void)
  494. {
  495. CLEAR_BIT(PWR->CR, PWR_CR_ULP);
  496. }
  497. /**
  498. * @brief Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled
  499. * @rmtoll CR ULP LL_PWR_IsEnabledUltraLowPower
  500. * @retval State of bit (1 or 0).
  501. */
  502. __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void)
  503. {
  504. return ((READ_BIT(PWR->CR, PWR_CR_ULP) == PWR_CR_ULP) ? 1UL : 0UL);
  505. }
  506. /**
  507. * @brief Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode
  508. * @rmtoll CR FWU LL_PWR_EnableFastWakeUp
  509. * @note Works in conjunction with ultra low power mode.
  510. * @retval None
  511. */
  512. __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void)
  513. {
  514. SET_BIT(PWR->CR, PWR_CR_FWU);
  515. }
  516. /**
  517. * @brief Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode
  518. * @rmtoll CR FWU LL_PWR_DisableFastWakeUp
  519. * @note Works in conjunction with ultra low power mode.
  520. * @retval None
  521. */
  522. __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void)
  523. {
  524. CLEAR_BIT(PWR->CR, PWR_CR_FWU);
  525. }
  526. /**
  527. * @brief Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored
  528. * @rmtoll CR FWU LL_PWR_IsEnabledFastWakeUp
  529. * @retval State of bit (1 or 0).
  530. */
  531. __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void)
  532. {
  533. return ((READ_BIT(PWR->CR, PWR_CR_FWU) == PWR_CR_FWU) ? 1UL : 0UL);
  534. }
  535. /**
  536. * @}
  537. */
  538. /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
  539. * @{
  540. */
  541. /**
  542. * @brief Get Wake-up Flag
  543. * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
  544. * @retval State of bit (1 or 0).
  545. */
  546. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
  547. {
  548. return ((READ_BIT(PWR->CSR, PWR_CSR_WUF) == PWR_CSR_WUF) ? 1UL : 0UL);
  549. }
  550. /**
  551. * @brief Get Standby Flag
  552. * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
  553. * @retval State of bit (1 or 0).
  554. */
  555. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
  556. {
  557. return ((READ_BIT(PWR->CSR, PWR_CSR_SBF) == PWR_CSR_SBF) ? 1UL : 0UL);
  558. }
  559. #if defined(PWR_PVD_SUPPORT)
  560. /**
  561. * @brief Indicate whether VDD voltage is below the selected PVD threshold
  562. * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
  563. * @retval State of bit (1 or 0).
  564. */
  565. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
  566. {
  567. return ((READ_BIT(PWR->CSR, PWR_CSR_PVDO) == PWR_CSR_PVDO) ? 1UL : 0UL);
  568. }
  569. #endif /* PWR_PVD_SUPPORT */
  570. #if defined(PWR_CSR_VREFINTRDYF)
  571. /**
  572. * @brief Get Internal Reference VrefInt Flag
  573. * @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY
  574. * @retval State of bit (1 or 0).
  575. */
  576. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void)
  577. {
  578. return ((READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == PWR_CSR_VREFINTRDYF) ? 1UL : 0UL);
  579. }
  580. #endif /* PWR_CSR_VREFINTRDYF */
  581. /**
  582. * @brief Indicate whether the Regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level
  583. * @rmtoll CSR VOSF LL_PWR_IsActiveFlag_VOS
  584. * @retval State of bit (1 or 0).
  585. */
  586. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void)
  587. {
  588. return ((READ_BIT(PWR->CSR, PWR_CSR_VOSF) == PWR_CSR_VOSF) ? 1UL : 0UL);
  589. }
  590. /**
  591. * @brief Indicate whether the Regulator is ready in main mode or is in low-power mode
  592. * @rmtoll CSR REGLPF LL_PWR_IsActiveFlag_REGLPF
  593. * @note Take care, return value "0" means the Regulator is ready. Return value "1" means the output voltage range is still changing.
  594. * @retval State of bit (1 or 0).
  595. */
  596. __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void)
  597. {
  598. return ((READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == PWR_CSR_REGLPF) ? 1UL : 0UL);
  599. }
  600. /**
  601. * @brief Clear Standby Flag
  602. * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
  603. * @retval None
  604. */
  605. __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
  606. {
  607. SET_BIT(PWR->CR, PWR_CR_CSBF);
  608. }
  609. /**
  610. * @brief Clear Wake-up Flags
  611. * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
  612. * @retval None
  613. */
  614. __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
  615. {
  616. SET_BIT(PWR->CR, PWR_CR_CWUF);
  617. }
  618. /**
  619. * @}
  620. */
  621. #if defined(USE_FULL_LL_DRIVER)
  622. /** @defgroup PWR_LL_EF_Init De-initialization function
  623. * @{
  624. */
  625. ErrorStatus LL_PWR_DeInit(void);
  626. /**
  627. * @}
  628. */
  629. #endif /* USE_FULL_LL_DRIVER */
  630. /** @defgroup PWR_LL_EF_Legacy_Functions PWR legacy functions name
  631. * @{
  632. */
  633. /* Old functions name kept for legacy purpose, to be replaced by the */
  634. /* current functions name. */
  635. #define LL_PWR_IsActiveFlag_VOSF LL_PWR_IsActiveFlag_VOS
  636. /**
  637. * @}
  638. */
  639. /**
  640. * @}
  641. */
  642. /**
  643. * @}
  644. */
  645. #endif /* defined(PWR) */
  646. /**
  647. * @}
  648. */
  649. #ifdef __cplusplus
  650. }
  651. #endif
  652. #endif /* __STM32L1xx_LL_PWR_H */
  653. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/