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stm32l1xx_hal_adc_ex.c 34KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_hal_adc_ex.c
  4. * @author MCD Application Team
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Analog to Digital Convertor (ADC)
  7. * peripheral:
  8. * + Operation functions
  9. * ++ Start, stop, get result of conversions of injected
  10. * group, using 2 possible modes: polling, interruption.
  11. * + Control functions
  12. * ++ Channels configuration on injected group
  13. * Other functions (generic functions) are available in file
  14. * "stm32l1xx_hal_adc.c".
  15. *
  16. @verbatim
  17. [..]
  18. (@) Sections "ADC peripheral features" and "How to use this driver" are
  19. available in file of generic functions "stm32l1xx_hal_adc.c".
  20. [..]
  21. @endverbatim
  22. ******************************************************************************
  23. * @attention
  24. *
  25. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  26. * All rights reserved.</center></h2>
  27. *
  28. * This software component is licensed by ST under BSD 3-Clause license,
  29. * the "License"; You may not use this file except in compliance with the
  30. * License. You may obtain a copy of the License at:
  31. * opensource.org/licenses/BSD-3-Clause
  32. *
  33. ******************************************************************************
  34. */
  35. /* Includes ------------------------------------------------------------------*/
  36. #include "stm32l1xx_hal.h"
  37. /** @addtogroup STM32L1xx_HAL_Driver
  38. * @{
  39. */
  40. /** @defgroup ADCEx ADCEx
  41. * @brief ADC Extension HAL module driver
  42. * @{
  43. */
  44. #ifdef HAL_ADC_MODULE_ENABLED
  45. /* Private typedef -----------------------------------------------------------*/
  46. /* Private define ------------------------------------------------------------*/
  47. /** @defgroup ADCEx_Private_Constants ADCEx Private Constants
  48. * @{
  49. */
  50. /* ADC conversion cycles (unit: ADC clock cycles) */
  51. /* (selected sampling time + conversion time of 12 ADC clock cycles, with */
  52. /* resolution 12 bits) */
  53. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_4CYCLE5 ( 16U)
  54. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_9CYCLES ( 21U)
  55. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_16CYCLES ( 28U)
  56. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_24CYCLES ( 36U)
  57. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_48CYCLES ( 60U)
  58. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_96CYCLES (108U)
  59. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_192CYCLES (204U)
  60. #define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_384CYCLES (396U)
  61. /* Delay for temperature sensor stabilization time. */
  62. /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
  63. /* Unit: us */
  64. #define ADC_TEMPSENSOR_DELAY_US (10U)
  65. /**
  66. * @}
  67. */
  68. /* Private macro -------------------------------------------------------------*/
  69. /* Private variables ---------------------------------------------------------*/
  70. /* Private function prototypes -----------------------------------------------*/
  71. /* Private functions ---------------------------------------------------------*/
  72. /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions
  73. * @{
  74. */
  75. /** @defgroup ADCEx_Exported_Functions_Group1 ADC Extended IO operation functions
  76. * @brief ADC Extended Input and Output operation functions
  77. *
  78. @verbatim
  79. ===============================================================================
  80. ##### IO operation functions #####
  81. ===============================================================================
  82. [..] This section provides functions allowing to:
  83. (+) Start conversion of injected group.
  84. (+) Stop conversion of injected group.
  85. (+) Poll for conversion complete on injected group.
  86. (+) Get result of injected channel conversion.
  87. (+) Start conversion of injected group and enable interruptions.
  88. (+) Stop conversion of injected group and disable interruptions.
  89. @endverbatim
  90. * @{
  91. */
  92. /**
  93. * @brief Enables ADC, starts conversion of injected group.
  94. * Interruptions enabled in this function: None.
  95. * @param hadc ADC handle
  96. * @retval HAL status
  97. */
  98. HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
  99. {
  100. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  101. /* Check the parameters */
  102. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  103. /* Process locked */
  104. __HAL_LOCK(hadc);
  105. /* Enable the ADC peripheral */
  106. tmp_hal_status = ADC_Enable(hadc);
  107. /* Start conversion if ADC is effectively enabled */
  108. if (tmp_hal_status == HAL_OK)
  109. {
  110. /* Set ADC state */
  111. /* - Clear state bitfield related to injected group conversion results */
  112. /* - Set state bitfield related to injected operation */
  113. ADC_STATE_CLR_SET(hadc->State,
  114. HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
  115. HAL_ADC_STATE_INJ_BUSY);
  116. /* Check if a regular conversion is ongoing */
  117. /* Note: On this device, there is no ADC error code fields related to */
  118. /* conversions on group injected only. In case of conversion on */
  119. /* going on group regular, no error code is reset. */
  120. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
  121. {
  122. /* Reset ADC all error code fields */
  123. ADC_CLEAR_ERRORCODE(hadc);
  124. }
  125. /* Process unlocked */
  126. /* Unlock before starting ADC conversions: in case of potential */
  127. /* interruption, to let the process to ADC IRQ Handler. */
  128. __HAL_UNLOCK(hadc);
  129. /* Clear injected group conversion flag */
  130. /* (To ensure of no unknown state from potential previous ADC operations) */
  131. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
  132. /* Enable conversion of injected group. */
  133. /* If software start has been selected, conversion starts immediately. */
  134. /* If external trigger has been selected, conversion will start at next */
  135. /* trigger event. */
  136. /* If automatic injected conversion is enabled, conversion will start */
  137. /* after next regular group conversion. */
  138. if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
  139. HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
  140. {
  141. /* Enable ADC software conversion for injected channels */
  142. SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
  143. }
  144. }
  145. /* Return function status */
  146. return tmp_hal_status;
  147. }
  148. /**
  149. * @brief Stop conversion of injected channels. Disable ADC peripheral if
  150. * no regular conversion is on going.
  151. * @note If ADC must be disabled and if conversion is on going on
  152. * regular group, function HAL_ADC_Stop must be used to stop both
  153. * injected and regular groups, and disable the ADC.
  154. * @note If injected group mode auto-injection is enabled,
  155. * function HAL_ADC_Stop must be used.
  156. * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
  157. * @param hadc ADC handle
  158. * @retval None
  159. */
  160. HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
  161. {
  162. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  163. /* Check the parameters */
  164. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  165. /* Process locked */
  166. __HAL_LOCK(hadc);
  167. /* Stop potential conversion and disable ADC peripheral */
  168. /* Conditioned to: */
  169. /* - No conversion on the other group (regular group) is intended to */
  170. /* continue (injected and regular groups stop conversion and ADC disable */
  171. /* are common) */
  172. /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
  173. if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
  174. HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
  175. {
  176. /* Stop potential conversion on going, on regular and injected groups */
  177. /* Disable ADC peripheral */
  178. tmp_hal_status = ADC_ConversionStop_Disable(hadc);
  179. /* Check if ADC is effectively disabled */
  180. if (tmp_hal_status == HAL_OK)
  181. {
  182. /* Set ADC state */
  183. ADC_STATE_CLR_SET(hadc->State,
  184. HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
  185. HAL_ADC_STATE_READY);
  186. }
  187. }
  188. else
  189. {
  190. /* Update ADC state machine to error */
  191. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  192. tmp_hal_status = HAL_ERROR;
  193. }
  194. /* Process unlocked */
  195. __HAL_UNLOCK(hadc);
  196. /* Return function status */
  197. return tmp_hal_status;
  198. }
  199. /**
  200. * @brief Wait for injected group conversion to be completed.
  201. * @param hadc ADC handle
  202. * @param Timeout Timeout value in millisecond.
  203. * @retval HAL status
  204. */
  205. HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
  206. {
  207. uint32_t tickstart;
  208. /* Variables for polling in case of scan mode enabled and polling for each */
  209. /* conversion. */
  210. /* Note: Variable "conversion_timeout_cpu_cycles" set to offset 28 CPU */
  211. /* cycles to compensate number of CPU cycles for processing of variable */
  212. /* "conversion_timeout_cpu_cycles_max" */
  213. uint32_t conversion_timeout_cpu_cycles = 28;
  214. uint32_t conversion_timeout_cpu_cycles_max = 0;
  215. /* Check the parameters */
  216. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  217. /* Get timeout */
  218. tickstart = HAL_GetTick();
  219. /* Polling for end of conversion: differentiation if single/sequence */
  220. /* conversion. */
  221. /* For injected group, flag JEOC is set only at the end of the sequence, */
  222. /* not for each conversion within the sequence. */
  223. /* If setting "EOCSelection" is set to poll for each single conversion, */
  224. /* management of polling depends on setting of injected group sequencer: */
  225. /* - If single conversion for injected group (scan mode disabled or */
  226. /* InjectedNbrOfConversion ==1), flag JEOC is used to determine the */
  227. /* conversion completion. */
  228. /* - If sequence conversion for injected group (scan mode enabled and */
  229. /* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
  230. /* sequence. */
  231. /* To poll for each conversion, the maximum conversion time is computed */
  232. /* from ADC conversion time (selected sampling time + conversion time of */
  233. /* 12 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
  234. /* settings, conversion time range can vary from 8 to several thousands */
  235. /* of CPU cycles). */
  236. /* Note: On STM32L1, setting "EOCSelection" is related to regular group */
  237. /* only, by hardware. For compatibility with other STM32 devices, */
  238. /* this setting is related also to injected group by software. */
  239. if (((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET) ||
  240. (hadc->Init.EOCSelection != ADC_EOC_SINGLE_CONV) )
  241. {
  242. /* Wait until End of Conversion flag is raised */
  243. while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
  244. {
  245. /* Check if timeout is disabled (set to infinite wait) */
  246. if(Timeout != HAL_MAX_DELAY)
  247. {
  248. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  249. {
  250. /* Update ADC state machine to timeout */
  251. SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
  252. /* Process unlocked */
  253. __HAL_UNLOCK(hadc);
  254. return HAL_TIMEOUT;
  255. }
  256. }
  257. }
  258. }
  259. else
  260. {
  261. /* Computation of CPU cycles corresponding to ADC conversion cycles. */
  262. /* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
  263. /* channels. */
  264. conversion_timeout_cpu_cycles_max = ADC_GET_CLOCK_PRESCALER_DECIMAL(hadc);
  265. conversion_timeout_cpu_cycles_max *= ADC_CONVCYCLES_MAX_RANGE(hadc);
  266. /* Poll with maximum conversion time */
  267. while(conversion_timeout_cpu_cycles < conversion_timeout_cpu_cycles_max)
  268. {
  269. /* Check if timeout is disabled (set to infinite wait) */
  270. if(Timeout != HAL_MAX_DELAY)
  271. {
  272. if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
  273. {
  274. /* Update ADC state machine to timeout */
  275. SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
  276. /* Process unlocked */
  277. __HAL_UNLOCK(hadc);
  278. return HAL_TIMEOUT;
  279. }
  280. }
  281. conversion_timeout_cpu_cycles ++;
  282. }
  283. }
  284. /* Clear end of conversion flag of injected group if low power feature */
  285. /* "Auto Wait" is disabled, to not interfere with this feature until data */
  286. /* register is read using function HAL_ADCEx_InjectedGetValue(). */
  287. if (hadc->Init.LowPowerAutoWait == DISABLE)
  288. {
  289. /* Clear injected group conversion flag */
  290. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
  291. }
  292. /* Update ADC state machine */
  293. SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
  294. /* Determine whether any further conversion upcoming on group injected */
  295. /* by external trigger, continuous mode or scan sequence on going. */
  296. /* Note: On STM32L1, there is no independent flag of end of sequence. */
  297. /* The test of scan sequence on going is done either with scan */
  298. /* sequence disabled or with end of conversion flag set to */
  299. /* of end of sequence. */
  300. if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
  301. (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
  302. HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
  303. (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
  304. (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
  305. (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
  306. {
  307. /* Set ADC state */
  308. CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
  309. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
  310. {
  311. SET_BIT(hadc->State, HAL_ADC_STATE_READY);
  312. }
  313. }
  314. /* Return ADC state */
  315. return HAL_OK;
  316. }
  317. /**
  318. * @brief Enables ADC, starts conversion of injected group with interruption.
  319. * - JEOC (end of conversion of injected group)
  320. * Each of these interruptions has its dedicated callback function.
  321. * @param hadc ADC handle
  322. * @retval HAL status.
  323. */
  324. HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
  325. {
  326. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  327. /* Check the parameters */
  328. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  329. /* Process locked */
  330. __HAL_LOCK(hadc);
  331. /* Enable the ADC peripheral */
  332. tmp_hal_status = ADC_Enable(hadc);
  333. /* Start conversion if ADC is effectively enabled */
  334. if (tmp_hal_status == HAL_OK)
  335. {
  336. /* Set ADC state */
  337. /* - Clear state bitfield related to injected group conversion results */
  338. /* - Set state bitfield related to injected operation */
  339. ADC_STATE_CLR_SET(hadc->State,
  340. HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
  341. HAL_ADC_STATE_INJ_BUSY);
  342. /* Check if a regular conversion is ongoing */
  343. /* Note: On this device, there is no ADC error code fields related to */
  344. /* conversions on group injected only. In case of conversion on */
  345. /* going on group regular, no error code is reset. */
  346. if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
  347. {
  348. /* Reset ADC all error code fields */
  349. ADC_CLEAR_ERRORCODE(hadc);
  350. }
  351. /* Process unlocked */
  352. /* Unlock before starting ADC conversions: in case of potential */
  353. /* interruption, to let the process to ADC IRQ Handler. */
  354. __HAL_UNLOCK(hadc);
  355. /* Clear injected group conversion flag */
  356. /* (To ensure of no unknown state from potential previous ADC operations) */
  357. __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
  358. /* Enable end of conversion interrupt for injected channels */
  359. __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
  360. /* Enable conversion of injected group. */
  361. /* If software start has been selected, conversion starts immediately. */
  362. /* If external trigger has been selected, conversion will start at next */
  363. /* trigger event. */
  364. /* If automatic injected conversion is enabled, conversion will start */
  365. /* after next regular group conversion. */
  366. if (ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
  367. HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
  368. {
  369. /* Enable ADC software conversion for injected channels */
  370. SET_BIT(hadc->Instance->CR2, ADC_CR2_JSWSTART);
  371. }
  372. }
  373. /* Return function status */
  374. return tmp_hal_status;
  375. }
  376. /**
  377. * @brief Stop conversion of injected channels, disable interruption of
  378. * end-of-conversion. Disable ADC peripheral if no regular conversion
  379. * is on going.
  380. * @note If ADC must be disabled and if conversion is on going on
  381. * regular group, function HAL_ADC_Stop must be used to stop both
  382. * injected and regular groups, and disable the ADC.
  383. * @note If injected group mode auto-injection is enabled,
  384. * function HAL_ADC_Stop must be used.
  385. * @param hadc ADC handle
  386. * @retval None
  387. */
  388. HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
  389. {
  390. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  391. /* Check the parameters */
  392. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  393. /* Process locked */
  394. __HAL_LOCK(hadc);
  395. /* Stop potential conversion and disable ADC peripheral */
  396. /* Conditioned to: */
  397. /* - No conversion on the other group (regular group) is intended to */
  398. /* continue (injected and regular groups stop conversion and ADC disable */
  399. /* are common) */
  400. /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
  401. if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
  402. HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
  403. {
  404. /* Stop potential conversion on going, on regular and injected groups */
  405. /* Disable ADC peripheral */
  406. tmp_hal_status = ADC_ConversionStop_Disable(hadc);
  407. /* Check if ADC is effectively disabled */
  408. if (tmp_hal_status == HAL_OK)
  409. {
  410. /* Disable ADC end of conversion interrupt for injected channels */
  411. __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
  412. /* Set ADC state */
  413. ADC_STATE_CLR_SET(hadc->State,
  414. HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
  415. HAL_ADC_STATE_READY);
  416. }
  417. }
  418. else
  419. {
  420. /* Update ADC state machine to error */
  421. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  422. tmp_hal_status = HAL_ERROR;
  423. }
  424. /* Process unlocked */
  425. __HAL_UNLOCK(hadc);
  426. /* Return function status */
  427. return tmp_hal_status;
  428. }
  429. /**
  430. * @brief Get ADC injected group conversion result.
  431. * @note Reading register JDRx automatically clears ADC flag JEOC
  432. * (ADC group injected end of unitary conversion).
  433. * @note This function does not clear ADC flag JEOS
  434. * (ADC group injected end of sequence conversion)
  435. * Occurrence of flag JEOS rising:
  436. * - If sequencer is composed of 1 rank, flag JEOS is equivalent
  437. * to flag JEOC.
  438. * - If sequencer is composed of several ranks, during the scan
  439. * sequence flag JEOC only is raised, at the end of the scan sequence
  440. * both flags JEOC and EOS are raised.
  441. * Flag JEOS must not be cleared by this function because
  442. * it would not be compliant with low power features
  443. * (feature low power auto-wait, not available on all STM32 families).
  444. * To clear this flag, either use function:
  445. * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
  446. * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
  447. * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
  448. * @param hadc ADC handle
  449. * @param InjectedRank the converted ADC injected rank.
  450. * This parameter can be one of the following values:
  451. * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
  452. * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
  453. * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
  454. * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
  455. * @retval ADC group injected conversion data
  456. */
  457. uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
  458. {
  459. uint32_t tmp_jdr = 0;
  460. /* Check the parameters */
  461. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  462. assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
  463. /* Get ADC converted value */
  464. switch(InjectedRank)
  465. {
  466. case ADC_INJECTED_RANK_4:
  467. tmp_jdr = hadc->Instance->JDR4;
  468. break;
  469. case ADC_INJECTED_RANK_3:
  470. tmp_jdr = hadc->Instance->JDR3;
  471. break;
  472. case ADC_INJECTED_RANK_2:
  473. tmp_jdr = hadc->Instance->JDR2;
  474. break;
  475. case ADC_INJECTED_RANK_1:
  476. default:
  477. tmp_jdr = hadc->Instance->JDR1;
  478. break;
  479. }
  480. /* Return ADC converted value */
  481. return tmp_jdr;
  482. }
  483. /**
  484. * @brief Injected conversion complete callback in non blocking mode
  485. * @param hadc ADC handle
  486. * @retval None
  487. */
  488. __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
  489. {
  490. /* Prevent unused argument(s) compilation warning */
  491. UNUSED(hadc);
  492. /* NOTE : This function Should not be modified, when the callback is needed,
  493. the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
  494. */
  495. }
  496. /**
  497. * @}
  498. */
  499. /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
  500. * @brief ADC Extended Peripheral Control functions
  501. *
  502. @verbatim
  503. ===============================================================================
  504. ##### Peripheral Control functions #####
  505. ===============================================================================
  506. [..] This section provides functions allowing to:
  507. (+) Configure channels on injected group
  508. @endverbatim
  509. * @{
  510. */
  511. /**
  512. * @brief Configures the ADC injected group and the selected channel to be
  513. * linked to the injected group.
  514. * @note Possibility to update parameters on the fly:
  515. * This function initializes injected group, following calls to this
  516. * function can be used to reconfigure some parameters of structure
  517. * "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
  518. * The setting of these parameters is conditioned to ADC state:
  519. * this function must be called when ADC is not under conversion.
  520. * @param hadc ADC handle
  521. * @param sConfigInjected Structure of ADC injected group and ADC channel for
  522. * injected group.
  523. * @retval None
  524. */
  525. HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
  526. {
  527. HAL_StatusTypeDef tmp_hal_status = HAL_OK;
  528. __IO uint32_t wait_loop_index = 0;
  529. /* Check the parameters */
  530. assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
  531. assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
  532. assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
  533. assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
  534. assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
  535. assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, sConfigInjected->InjectedOffset));
  536. if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
  537. {
  538. assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
  539. assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
  540. assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
  541. }
  542. if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
  543. {
  544. assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
  545. }
  546. /* Process locked */
  547. __HAL_LOCK(hadc);
  548. /* Configuration of injected group sequencer: */
  549. /* - if scan mode is disabled, injected channels sequence length is set to */
  550. /* 0x00: 1 channel converted (channel on regular rank 1) */
  551. /* Parameter "InjectedNbrOfConversion" is discarded. */
  552. /* Note: Scan mode is present by hardware on this device and, if */
  553. /* disabled, discards automatically nb of conversions. Anyway, nb of */
  554. /* conversions is forced to 0x00 for alignment over all STM32 devices. */
  555. /* - if scan mode is enabled, injected channels sequence length is set to */
  556. /* parameter ""InjectedNbrOfConversion". */
  557. if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
  558. {
  559. if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
  560. {
  561. /* Clear the old SQx bits for all injected ranks */
  562. MODIFY_REG(hadc->Instance->JSQR ,
  563. ADC_JSQR_JL |
  564. ADC_JSQR_JSQ4 |
  565. ADC_JSQR_JSQ3 |
  566. ADC_JSQR_JSQ2 |
  567. ADC_JSQR_JSQ1 ,
  568. ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
  569. ADC_INJECTED_RANK_1,
  570. 0x01) );
  571. }
  572. /* If another injected rank than rank1 was intended to be set, and could */
  573. /* not due to ScanConvMode disabled, error is reported. */
  574. else
  575. {
  576. /* Update ADC state machine to error */
  577. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  578. tmp_hal_status = HAL_ERROR;
  579. }
  580. }
  581. else
  582. {
  583. /* Since injected channels rank conv. order depends on total number of */
  584. /* injected conversions, selected rank must be below or equal to total */
  585. /* number of injected conversions to be updated. */
  586. if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
  587. {
  588. /* Clear the old SQx bits for the selected rank */
  589. /* Set the SQx bits for the selected rank */
  590. MODIFY_REG(hadc->Instance->JSQR ,
  591. ADC_JSQR_JL |
  592. ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
  593. sConfigInjected->InjectedRank,
  594. sConfigInjected->InjectedNbrOfConversion) ,
  595. ADC_JSQR_JL_SHIFT(sConfigInjected->InjectedNbrOfConversion) |
  596. ADC_JSQR_RK_JL(sConfigInjected->InjectedChannel,
  597. sConfigInjected->InjectedRank,
  598. sConfigInjected->InjectedNbrOfConversion) );
  599. }
  600. else
  601. {
  602. /* Clear the old SQx bits for the selected rank */
  603. MODIFY_REG(hadc->Instance->JSQR ,
  604. ADC_JSQR_JL |
  605. ADC_JSQR_RK_JL(ADC_JSQR_JSQ1,
  606. sConfigInjected->InjectedRank,
  607. sConfigInjected->InjectedNbrOfConversion) ,
  608. 0x00000000 );
  609. }
  610. }
  611. /* Enable external trigger if trigger selection is different of software */
  612. /* start. */
  613. /* Note: This configuration keeps the hardware feature of parameter */
  614. /* ExternalTrigConvEdge "trigger edge none" equivalent to */
  615. /* software start. */
  616. if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
  617. {
  618. MODIFY_REG(hadc->Instance->CR2 ,
  619. ADC_CR2_JEXTEN |
  620. ADC_CR2_JEXTSEL ,
  621. sConfigInjected->ExternalTrigInjecConv |
  622. sConfigInjected->ExternalTrigInjecConvEdge );
  623. }
  624. else
  625. {
  626. MODIFY_REG(hadc->Instance->CR2,
  627. ADC_CR2_JEXTEN |
  628. ADC_CR2_JEXTSEL ,
  629. 0x00000000 );
  630. }
  631. /* Configuration of injected group */
  632. /* Parameters update conditioned to ADC state: */
  633. /* Parameters that can be updated only when ADC is disabled: */
  634. /* - Automatic injected conversion */
  635. /* - Injected discontinuous mode */
  636. if ((ADC_IS_ENABLE(hadc) == RESET))
  637. {
  638. hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO |
  639. ADC_CR1_JDISCEN );
  640. /* Automatic injected conversion can be enabled if injected group */
  641. /* external triggers are disabled. */
  642. if (sConfigInjected->AutoInjectedConv == ENABLE)
  643. {
  644. if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
  645. {
  646. SET_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO);
  647. }
  648. else
  649. {
  650. /* Update ADC state machine to error */
  651. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  652. tmp_hal_status = HAL_ERROR;
  653. }
  654. }
  655. /* Injected discontinuous can be enabled only if auto-injected mode is */
  656. /* disabled. */
  657. if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
  658. {
  659. if (sConfigInjected->AutoInjectedConv == DISABLE)
  660. {
  661. SET_BIT(hadc->Instance->CR1, ADC_CR1_JDISCEN);
  662. }
  663. else
  664. {
  665. /* Update ADC state machine to error */
  666. SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
  667. tmp_hal_status = HAL_ERROR;
  668. }
  669. }
  670. }
  671. /* Channel sampling time configuration */
  672. /* For InjectedChannels 0 to 9 */
  673. if (sConfigInjected->InjectedChannel < ADC_CHANNEL_10)
  674. {
  675. MODIFY_REG(hadc->Instance->SMPR3,
  676. ADC_SMPR3(ADC_SMPR3_SMP0, sConfigInjected->InjectedChannel),
  677. ADC_SMPR3(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
  678. }
  679. /* For InjectedChannels 10 to 19 */
  680. else if (sConfigInjected->InjectedChannel < ADC_CHANNEL_20)
  681. {
  682. MODIFY_REG(hadc->Instance->SMPR2,
  683. ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel),
  684. ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
  685. }
  686. /* For InjectedChannels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
  687. /* For InjectedChannels 20 to 29 for devices Cat4, Cat.5 */
  688. else if (sConfigInjected->InjectedChannel <= ADC_SMPR1_CHANNEL_MAX)
  689. {
  690. MODIFY_REG(hadc->Instance->SMPR1,
  691. ADC_SMPR1(ADC_SMPR1_SMP20, sConfigInjected->InjectedChannel),
  692. ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel) );
  693. }
  694. /* For InjectedChannels 30 to 31 for devices Cat4, Cat.5 */
  695. else
  696. {
  697. ADC_SMPR0_CHANNEL_SET(hadc, sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
  698. }
  699. /* Configure the offset: offset enable/disable, InjectedChannel, offset value */
  700. switch(sConfigInjected->InjectedRank)
  701. {
  702. case 1:
  703. /* Set injected channel 1 offset */
  704. MODIFY_REG(hadc->Instance->JOFR1,
  705. ADC_JOFR1_JOFFSET1,
  706. sConfigInjected->InjectedOffset);
  707. break;
  708. case 2:
  709. /* Set injected channel 2 offset */
  710. MODIFY_REG(hadc->Instance->JOFR2,
  711. ADC_JOFR2_JOFFSET2,
  712. sConfigInjected->InjectedOffset);
  713. break;
  714. case 3:
  715. /* Set injected channel 3 offset */
  716. MODIFY_REG(hadc->Instance->JOFR3,
  717. ADC_JOFR3_JOFFSET3,
  718. sConfigInjected->InjectedOffset);
  719. break;
  720. case 4:
  721. default:
  722. MODIFY_REG(hadc->Instance->JOFR4,
  723. ADC_JOFR4_JOFFSET4,
  724. sConfigInjected->InjectedOffset);
  725. break;
  726. }
  727. /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
  728. /* and VREFINT measurement path. */
  729. if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) ||
  730. (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) )
  731. {
  732. SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
  733. if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR))
  734. {
  735. /* Delay for temperature sensor stabilization time */
  736. /* Compute number of CPU cycles to wait for */
  737. wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
  738. while(wait_loop_index != 0)
  739. {
  740. wait_loop_index--;
  741. }
  742. }
  743. }
  744. /* Process unlocked */
  745. __HAL_UNLOCK(hadc);
  746. /* Return function status */
  747. return tmp_hal_status;
  748. }
  749. /**
  750. * @}
  751. */
  752. /**
  753. * @}
  754. */
  755. #endif /* HAL_ADC_MODULE_ENABLED */
  756. /**
  757. * @}
  758. */
  759. /**
  760. * @}
  761. */
  762. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/