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stm32l1xx_ll_sdmmc.c 48KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32l1xx_ll_sdmmc.c
  4. * @author MCD Application Team
  5. * @brief SDMMC Low Layer HAL module driver.
  6. *
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the SDMMC peripheral:
  9. * + Initialization/de-initialization functions
  10. * + I/O operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### SDMMC peripheral features #####
  17. ==============================================================================
  18. [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the AHB
  19. peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  20. devices.
  21. [..] The SDMMC features include the following:
  22. (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  23. for three different databus modes: 1-bit (default), 4-bit and 8-bit
  24. (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  25. (+) Full compliance with SD Memory Card Specifications Version 2.0
  26. (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  27. different data bus modes: 1-bit (default) and 4-bit
  28. (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  29. Rev1.1)
  30. (+) Data transfer up to 48 MHz for the 8 bit mode
  31. (+) Data and command output enable signals to control external bidirectional drivers
  32. ##### How to use this driver #####
  33. ==============================================================================
  34. [..]
  35. This driver is a considered as a driver of service for external devices drivers
  36. that interfaces with the SDMMC peripheral.
  37. According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  38. is used in the device's driver to perform SDMMC operations and functionalities.
  39. This driver is almost transparent for the final user, it is only used to implement other
  40. functionalities of the external device.
  41. [..]
  42. (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output (MSI, PLLUSB1CLK,
  43. PLLUSB2CLK). Before start working with SDMMC peripheral make sure that the
  44. PLL is well configured.
  45. The SDMMC peripheral uses two clock signals:
  46. (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
  47. (++) APB2 bus clock (PCLK2)
  48. -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  49. Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
  50. (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  51. peripheral.
  52. (+) Enable the Power ON State using the SDIO_PowerState_ON()
  53. function and disable it using the function SDIO_PowerState_OFF().
  54. (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
  55. (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT()
  56. and __SDIO_DISABLE_IT() if you need to use interrupt mode.
  57. (+) When using the DMA mode
  58. (++) Configure the DMA in the MSP layer of the external device
  59. (++) Active the needed channel Request
  60. (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
  61. __SDIO_DMA_DISABLE().
  62. (+) To control the CPSM (Command Path State Machine) and send
  63. commands to the card use the SDIO_SendCommand(),
  64. SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
  65. to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
  66. to the selected command to be sent.
  67. The parameters that should be filled are:
  68. (++) Command Argument
  69. (++) Command Index
  70. (++) Command Response type
  71. (++) Command Wait
  72. (++) CPSM Status (Enable or Disable).
  73. -@@- To check if the command is well received, read the SDIO_CMDRESP
  74. register using the SDIO_GetCommandResponse().
  75. The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the
  76. SDIO_GetResponse() function.
  77. (+) To control the DPSM (Data Path State Machine) and send/receive
  78. data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
  79. SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
  80. *** Read Operations ***
  81. =======================
  82. [..]
  83. (#) First, user has to fill the data structure (pointer to
  84. SDIO_DataInitTypeDef) according to the selected data type to be received.
  85. The parameters that should be filled are:
  86. (++) Data TimeOut
  87. (++) Data Length
  88. (++) Data Block size
  89. (++) Data Transfer direction: should be from card (To SDMMC)
  90. (++) Data Transfer mode
  91. (++) DPSM Status (Enable or Disable)
  92. (#) Configure the SDMMC resources to receive the data from the card
  93. according to selected transfer mode (Refer to Step 8, 9 and 10).
  94. (#) Send the selected Read command (refer to step 11).
  95. (#) Use the SDIO flags/interrupts to check the transfer status.
  96. *** Write Operations ***
  97. ========================
  98. [..]
  99. (#) First, user has to fill the data structure (pointer to
  100. SDIO_DataInitTypeDef) according to the selected data type to be received.
  101. The parameters that should be filled are:
  102. (++) Data TimeOut
  103. (++) Data Length
  104. (++) Data Block size
  105. (++) Data Transfer direction: should be to card (To CARD)
  106. (++) Data Transfer mode
  107. (++) DPSM Status (Enable or Disable)
  108. (#) Configure the SDMMC resources to send the data to the card according to
  109. selected transfer mode.
  110. (#) Send the selected Write command.
  111. (#) Use the SDIO flags/interrupts to check the transfer status.
  112. *** Command management operations ***
  113. =====================================
  114. [..]
  115. (#) The commands used for Read/Write/Erase operations are managed in
  116. separate functions.
  117. Each function allows to send the needed command with the related argument,
  118. then check the response.
  119. By the same approach, you could implement a command and check the response.
  120. @endverbatim
  121. ******************************************************************************
  122. * @attention
  123. *
  124. * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
  125. * All rights reserved.</center></h2>
  126. *
  127. * This software component is licensed by ST under BSD 3-Clause license,
  128. * the "License"; You may not use this file except in compliance with the
  129. * License. You may obtain a copy of the License at:
  130. * opensource.org/licenses/BSD-3-Clause
  131. *
  132. ******************************************************************************
  133. */
  134. /* Includes ------------------------------------------------------------------*/
  135. #include "stm32l1xx_hal.h"
  136. #if defined(SDIO)
  137. /** @addtogroup STM32L1xx_HAL_Driver
  138. * @{
  139. */
  140. /** @defgroup SDMMC_LL SDMMC Low Layer
  141. * @brief Low layer module for SD
  142. * @{
  143. */
  144. #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
  145. /* Private typedef -----------------------------------------------------------*/
  146. /* Private define ------------------------------------------------------------*/
  147. /* Private macro -------------------------------------------------------------*/
  148. /* Private variables ---------------------------------------------------------*/
  149. /* Private function prototypes -----------------------------------------------*/
  150. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx);
  151. static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout);
  152. static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx);
  153. static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx);
  154. static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx);
  155. static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA);
  156. /* Exported functions --------------------------------------------------------*/
  157. /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
  158. * @{
  159. */
  160. /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
  161. * @brief Initialization and Configuration functions
  162. *
  163. @verbatim
  164. ===============================================================================
  165. ##### Initialization/de-initialization functions #####
  166. ===============================================================================
  167. [..] This section provides functions allowing to:
  168. @endverbatim
  169. * @{
  170. */
  171. /**
  172. * @brief Initializes the SDMMC according to the specified
  173. * parameters in the SDMMC_InitTypeDef and create the associated handle.
  174. * @param SDIOx: Pointer to SDMMC register base
  175. * @param Init: SDMMC initialization structure
  176. * @retval HAL status
  177. */
  178. HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
  179. {
  180. uint32_t tmpreg = 0;
  181. /* Check the parameters */
  182. assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
  183. assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
  184. assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
  185. assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
  186. assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
  187. assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
  188. assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
  189. /* Set SDMMC configuration parameters */
  190. tmpreg |= (Init.ClockEdge |\
  191. Init.ClockBypass |\
  192. Init.ClockPowerSave |\
  193. Init.BusWide |\
  194. Init.HardwareFlowControl |\
  195. Init.ClockDiv
  196. );
  197. /* Write to SDMMC CLKCR */
  198. MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
  199. return HAL_OK;
  200. }
  201. /**
  202. * @}
  203. */
  204. /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
  205. * @brief Data transfers functions
  206. *
  207. @verbatim
  208. ===============================================================================
  209. ##### I/O operation functions #####
  210. ===============================================================================
  211. [..]
  212. This subsection provides a set of functions allowing to manage the SDMMC data
  213. transfers.
  214. @endverbatim
  215. * @{
  216. */
  217. /**
  218. * @brief Read data (word) from Rx FIFO in blocking mode (polling)
  219. * @param SDIOx: Pointer to SDMMC register base
  220. * @retval HAL status
  221. */
  222. uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
  223. {
  224. /* Read data from Rx FIFO */
  225. return (SDIOx->FIFO);
  226. }
  227. /**
  228. * @brief Write data (word) to Tx FIFO in blocking mode (polling)
  229. * @param SDIOx: Pointer to SDMMC register base
  230. * @param pWriteData: pointer to data to write
  231. * @retval HAL status
  232. */
  233. HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
  234. {
  235. /* Write data to FIFO */
  236. SDIOx->FIFO = *pWriteData;
  237. return HAL_OK;
  238. }
  239. /**
  240. * @}
  241. */
  242. /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
  243. * @brief management functions
  244. *
  245. @verbatim
  246. ===============================================================================
  247. ##### Peripheral Control functions #####
  248. ===============================================================================
  249. [..]
  250. This subsection provides a set of functions allowing to control the SDMMC data
  251. transfers.
  252. @endverbatim
  253. * @{
  254. */
  255. /**
  256. * @brief Set SDMMC Power state to ON.
  257. * @param SDIOx: Pointer to SDMMC register base
  258. * @retval HAL status
  259. */
  260. HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
  261. {
  262. /* Set power state to ON */
  263. SDIOx->POWER = SDIO_POWER_PWRCTRL;
  264. /* 1ms: required power up waiting time before starting the SD initialization
  265. sequence */
  266. HAL_Delay(2);
  267. return HAL_OK;
  268. }
  269. /**
  270. * @brief Set SDMMC Power state to OFF.
  271. * @param SDIOx: Pointer to SDMMC register base
  272. * @retval HAL status
  273. */
  274. HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
  275. {
  276. /* Set power state to OFF */
  277. SDIOx->POWER = (uint32_t)0x00000000;
  278. return HAL_OK;
  279. }
  280. /**
  281. * @brief Get SDMMC Power state.
  282. * @param SDIOx: Pointer to SDMMC register base
  283. * @retval Power status of the controller. The returned value can be one of the
  284. * following values:
  285. * - 0x00: Power OFF
  286. * - 0x02: Power UP
  287. * - 0x03: Power ON
  288. */
  289. uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
  290. {
  291. return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
  292. }
  293. /**
  294. * @brief Configure the SDMMC command path according to the specified parameters in
  295. * SDIO_CmdInitTypeDef structure and send the command
  296. * @param SDIOx: Pointer to SDMMC register base
  297. * @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
  298. * the configuration information for the SDMMC command
  299. * @retval HAL status
  300. */
  301. HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
  302. {
  303. uint32_t tmpreg = 0;
  304. /* Check the parameters */
  305. assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex));
  306. assert_param(IS_SDIO_RESPONSE(Command->Response));
  307. assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
  308. assert_param(IS_SDIO_CPSM(Command->CPSM));
  309. /* Set the SDMMC Argument value */
  310. SDIOx->ARG = Command->Argument;
  311. /* Set SDMMC command parameters */
  312. tmpreg |= (uint32_t)(Command->CmdIndex |\
  313. Command->Response |\
  314. Command->WaitForInterrupt |\
  315. Command->CPSM);
  316. /* Write to SDMMC CMD register */
  317. MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
  318. return HAL_OK;
  319. }
  320. /**
  321. * @brief Return the command index of last command for which response received
  322. * @param SDIOx: Pointer to SDMMC register base
  323. * @retval Command index of the last command response received
  324. */
  325. uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
  326. {
  327. return (uint8_t)(SDIOx->RESPCMD);
  328. }
  329. /**
  330. * @brief Return the response received from the card for the last command
  331. * @param SDIOx: Pointer to SDMMC register base
  332. * @param Response: Specifies the SDMMC response register.
  333. * This parameter can be one of the following values:
  334. * @arg SDIO_RESP1: Response Register 1
  335. * @arg SDIO_RESP2: Response Register 2
  336. * @arg SDIO_RESP3: Response Register 3
  337. * @arg SDIO_RESP4: Response Register 4
  338. * @retval The Corresponding response register value
  339. */
  340. uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
  341. {
  342. uint32_t tmp;
  343. /* Check the parameters */
  344. assert_param(IS_SDIO_RESP(Response));
  345. /* Get the response */
  346. tmp = (uint32_t)(&(SDIOx->RESP1)) + Response;
  347. return (*(__IO uint32_t *) tmp);
  348. }
  349. /**
  350. * @brief Configure the SDMMC data path according to the specified
  351. * parameters in the SDIO_DataInitTypeDef.
  352. * @param SDIOx: Pointer to SDIO register base
  353. * @param Data : pointer to a SDIO_DataInitTypeDef structure
  354. * that contains the configuration information for the SDMMC data.
  355. * @retval HAL status
  356. */
  357. HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
  358. {
  359. uint32_t tmpreg = 0;
  360. /* Check the parameters */
  361. assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength));
  362. assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize));
  363. assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
  364. assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
  365. assert_param(IS_SDIO_DPSM(Data->DPSM));
  366. /* Set the SDMMC Data TimeOut value */
  367. SDIOx->DTIMER = Data->DataTimeOut;
  368. /* Set the SDMMC DataLength value */
  369. SDIOx->DLEN = Data->DataLength;
  370. /* Set the SDMMC data configuration parameters */
  371. tmpreg |= (uint32_t)(Data->DataBlockSize |\
  372. Data->TransferDir |\
  373. Data->TransferMode |\
  374. Data->DPSM);
  375. /* Write to SDMMC DCTRL */
  376. MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
  377. return HAL_OK;
  378. }
  379. /**
  380. * @brief Returns number of remaining data bytes to be transferred.
  381. * @param SDIOx: Pointer to SDIO register base
  382. * @retval Number of remaining data bytes to be transferred
  383. */
  384. uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
  385. {
  386. return (SDIOx->DCOUNT);
  387. }
  388. /**
  389. * @brief Get the FIFO data
  390. * @param SDIOx: Pointer to SDIO register base
  391. * @retval Data received
  392. */
  393. uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
  394. {
  395. return (SDIOx->FIFO);
  396. }
  397. /**
  398. * @brief Sets one of the two options of inserting read wait interval.
  399. * @param SDIOx: Pointer to SDIO register base
  400. * @param SDIO_ReadWaitMode: SDMMC Read Wait operation mode.
  401. * This parameter can be:
  402. * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
  403. * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
  404. * @retval None
  405. */
  406. HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode)
  407. {
  408. /* Check the parameters */
  409. assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
  410. /* Set SDMMC read wait mode */
  411. MODIFY_REG(SDIOx->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode);
  412. return HAL_OK;
  413. }
  414. /**
  415. * @}
  416. */
  417. /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
  418. * @brief Data transfers functions
  419. *
  420. @verbatim
  421. ===============================================================================
  422. ##### Commands management functions #####
  423. ===============================================================================
  424. [..]
  425. This subsection provides a set of functions allowing to manage the needed commands.
  426. @endverbatim
  427. * @{
  428. */
  429. /**
  430. * @brief Send the Data Block Lenght command and check the response
  431. * @param SDIOx: Pointer to SDIO register base
  432. * @retval HAL status
  433. */
  434. uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
  435. {
  436. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  437. uint32_t errorstate;
  438. /* Set Block Size for Card */
  439. sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
  440. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
  441. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  442. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  443. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  444. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  445. /* Check for error conditions */
  446. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
  447. return errorstate;
  448. }
  449. /**
  450. * @brief Send the Read Single Block command and check the response
  451. * @param SDIOx: Pointer to SDIO register base
  452. * @retval HAL status
  453. */
  454. uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  455. {
  456. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  457. uint32_t errorstate;
  458. /* Set Block Size for Card */
  459. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  460. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
  461. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  462. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  463. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  464. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  465. /* Check for error conditions */
  466. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  467. return errorstate;
  468. }
  469. /**
  470. * @brief Send the Read Multi Block command and check the response
  471. * @param SDIOx: Pointer to SDIO register base
  472. * @retval HAL status
  473. */
  474. uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  475. {
  476. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  477. uint32_t errorstate;
  478. /* Set Block Size for Card */
  479. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  480. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
  481. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  482. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  483. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  484. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  485. /* Check for error conditions */
  486. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
  487. return errorstate;
  488. }
  489. /**
  490. * @brief Send the Write Single Block command and check the response
  491. * @param SDIOx: Pointer to SDIO register base
  492. * @retval HAL status
  493. */
  494. uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  495. {
  496. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  497. uint32_t errorstate;
  498. /* Set Block Size for Card */
  499. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  500. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
  501. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  502. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  503. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  504. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  505. /* Check for error conditions */
  506. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  507. return errorstate;
  508. }
  509. /**
  510. * @brief Send the Write Multi Block command and check the response
  511. * @param SDIOx: Pointer to SDIO register base
  512. * @retval HAL status
  513. */
  514. uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  515. {
  516. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  517. uint32_t errorstate;
  518. /* Set Block Size for Card */
  519. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  520. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
  521. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  522. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  523. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  524. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  525. /* Check for error conditions */
  526. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
  527. return errorstate;
  528. }
  529. /**
  530. * @brief Send the Start Address Erase command for SD and check the response
  531. * @param SDIOx: Pointer to SDIO register base
  532. * @retval HAL status
  533. */
  534. uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  535. {
  536. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  537. uint32_t errorstate;
  538. /* Set Block Size for Card */
  539. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  540. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
  541. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  542. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  543. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  544. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  545. /* Check for error conditions */
  546. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  547. return errorstate;
  548. }
  549. /**
  550. * @brief Send the End Address Erase command for SD and check the response
  551. * @param SDIOx: Pointer to SDIO register base
  552. * @retval HAL status
  553. */
  554. uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  555. {
  556. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  557. uint32_t errorstate;
  558. /* Set Block Size for Card */
  559. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  560. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
  561. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  562. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  563. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  564. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  565. /* Check for error conditions */
  566. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  567. return errorstate;
  568. }
  569. /**
  570. * @brief Send the Start Address Erase command and check the response
  571. * @param SDIOx: Pointer to SDIO register base
  572. * @retval HAL status
  573. */
  574. uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  575. {
  576. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  577. uint32_t errorstate;
  578. /* Set Block Size for Card */
  579. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  580. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START;
  581. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  582. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  583. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  584. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  585. /* Check for error conditions */
  586. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  587. return errorstate;
  588. }
  589. /**
  590. * @brief Send the End Address Erase command and check the response
  591. * @param SDIOx: Pointer to SDIO register base
  592. * @retval HAL status
  593. */
  594. uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  595. {
  596. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  597. uint32_t errorstate;
  598. /* Set Block Size for Card */
  599. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  600. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END;
  601. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  602. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  603. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  604. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  605. /* Check for error conditions */
  606. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  607. return errorstate;
  608. }
  609. /**
  610. * @brief Send the Erase command and check the response
  611. * @param SDIOx: Pointer to SDIO register base
  612. * @retval HAL status
  613. */
  614. uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx)
  615. {
  616. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  617. uint32_t errorstate;
  618. /* Set Block Size for Card */
  619. sdmmc_cmdinit.Argument = 0U;
  620. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
  621. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  622. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  623. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  624. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  625. /* Check for error conditions */
  626. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT);
  627. return errorstate;
  628. }
  629. /**
  630. * @brief Send the Stop Transfer command and check the response.
  631. * @param SDIOx: Pointer to SDIO register base
  632. * @retval HAL status
  633. */
  634. uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
  635. {
  636. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  637. uint32_t errorstate;
  638. /* Send CMD12 STOP_TRANSMISSION */
  639. sdmmc_cmdinit.Argument = 0U;
  640. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
  641. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  642. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  643. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  644. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  645. /* Check for error conditions */
  646. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, SDIO_STOPTRANSFERTIMEOUT);
  647. return errorstate;
  648. }
  649. /**
  650. * @brief Send the Select Deselect command and check the response.
  651. * @param SDIOx: Pointer to SDIO register base
  652. * @param addr: Address of the card to be selected
  653. * @retval HAL status
  654. */
  655. uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
  656. {
  657. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  658. uint32_t errorstate;
  659. /* Send CMD7 SDMMC_SEL_DESEL_CARD */
  660. sdmmc_cmdinit.Argument = (uint32_t)Addr;
  661. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
  662. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  663. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  664. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  665. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  666. /* Check for error conditions */
  667. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
  668. return errorstate;
  669. }
  670. /**
  671. * @brief Send the Go Idle State command and check the response.
  672. * @param SDIOx: Pointer to SDIO register base
  673. * @retval HAL status
  674. */
  675. uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
  676. {
  677. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  678. uint32_t errorstate;
  679. sdmmc_cmdinit.Argument = 0U;
  680. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
  681. sdmmc_cmdinit.Response = SDIO_RESPONSE_NO;
  682. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  683. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  684. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  685. /* Check for error conditions */
  686. errorstate = SDMMC_GetCmdError(SDIOx);
  687. return errorstate;
  688. }
  689. /**
  690. * @brief Send the Operating Condition command and check the response.
  691. * @param SDIOx: Pointer to SDIO register base
  692. * @retval HAL status
  693. */
  694. uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
  695. {
  696. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  697. uint32_t errorstate;
  698. /* Send CMD8 to verify SD card interface operating condition */
  699. /* Argument: - [31:12]: Reserved (shall be set to '0')
  700. - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
  701. - [7:0]: Check Pattern (recommended 0xAA) */
  702. /* CMD Response: R7 */
  703. sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
  704. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
  705. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  706. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  707. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  708. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  709. /* Check for error conditions */
  710. errorstate = SDMMC_GetCmdResp7(SDIOx);
  711. return errorstate;
  712. }
  713. /**
  714. * @brief Send the Application command to verify that that the next command
  715. * is an application specific com-mand rather than a standard command
  716. * and check the response.
  717. * @param SDIOx: Pointer to SDIO register base
  718. * @param Argument: Command Argument
  719. * @retval HAL status
  720. */
  721. uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
  722. {
  723. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  724. uint32_t errorstate;
  725. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  726. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
  727. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  728. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  729. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  730. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  731. /* Check for error conditions */
  732. /* If there is a HAL_ERROR, it is a MMC card, else
  733. it is a SD card: SD card 2.0 (voltage range mismatch)
  734. or SD card 1.x */
  735. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT);
  736. return errorstate;
  737. }
  738. /**
  739. * @brief Send the command asking the accessed card to send its operating
  740. * condition register (OCR)
  741. * @param SDIOx: Pointer to SDIO register base
  742. * @param Argument: Command Argument
  743. * @retval HAL status
  744. */
  745. uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
  746. {
  747. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  748. uint32_t errorstate;
  749. sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument;
  750. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
  751. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  752. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  753. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  754. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  755. /* Check for error conditions */
  756. errorstate = SDMMC_GetCmdResp3(SDIOx);
  757. return errorstate;
  758. }
  759. /**
  760. * @brief Send the Bus Width command and check the response.
  761. * @param SDIOx: Pointer to SDIO register base
  762. * @param BusWidth: BusWidth
  763. * @retval HAL status
  764. */
  765. uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
  766. {
  767. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  768. uint32_t errorstate;
  769. sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
  770. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
  771. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  772. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  773. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  774. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  775. /* Check for error conditions */
  776. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
  777. return errorstate;
  778. }
  779. /**
  780. * @brief Send the Send SCR command and check the response.
  781. * @param SDIOx: Pointer to SDIO register base
  782. * @retval HAL status
  783. */
  784. uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
  785. {
  786. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  787. uint32_t errorstate;
  788. /* Send CMD51 SD_APP_SEND_SCR */
  789. sdmmc_cmdinit.Argument = 0U;
  790. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
  791. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  792. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  793. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  794. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  795. /* Check for error conditions */
  796. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
  797. return errorstate;
  798. }
  799. /**
  800. * @brief Send the Send CID command and check the response.
  801. * @param SDIOx: Pointer to SDIO register base
  802. * @retval HAL status
  803. */
  804. uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
  805. {
  806. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  807. uint32_t errorstate;
  808. /* Send CMD2 ALL_SEND_CID */
  809. sdmmc_cmdinit.Argument = 0U;
  810. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
  811. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  812. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  813. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  814. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  815. /* Check for error conditions */
  816. errorstate = SDMMC_GetCmdResp2(SDIOx);
  817. return errorstate;
  818. }
  819. /**
  820. * @brief Send the Send CSD command and check the response.
  821. * @param SDIOx: Pointer to SDIO register base
  822. * @param Argument: Command Argument
  823. * @retval HAL status
  824. */
  825. uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
  826. {
  827. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  828. uint32_t errorstate;
  829. /* Send CMD9 SEND_CSD */
  830. sdmmc_cmdinit.Argument = Argument;
  831. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
  832. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  833. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  834. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  835. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  836. /* Check for error conditions */
  837. errorstate = SDMMC_GetCmdResp2(SDIOx);
  838. return errorstate;
  839. }
  840. /**
  841. * @brief Send the Send CSD command and check the response.
  842. * @param SDIOx: Pointer to SDIO register base
  843. * @param pRCA: Card RCA
  844. * @retval HAL status
  845. */
  846. uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
  847. {
  848. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  849. uint32_t errorstate;
  850. /* Send CMD3 SD_CMD_SET_REL_ADDR */
  851. sdmmc_cmdinit.Argument = 0U;
  852. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
  853. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  854. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  855. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  856. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  857. /* Check for error conditions */
  858. errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA);
  859. return errorstate;
  860. }
  861. /**
  862. * @brief Send the Status command and check the response.
  863. * @param SDIOx: Pointer to SDIO register base
  864. * @param Argument: Command Argument
  865. * @retval HAL status
  866. */
  867. uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
  868. {
  869. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  870. uint32_t errorstate;
  871. sdmmc_cmdinit.Argument = Argument;
  872. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
  873. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  874. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  875. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  876. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  877. /* Check for error conditions */
  878. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT);
  879. return errorstate;
  880. }
  881. /**
  882. * @brief Send the Status register command and check the response.
  883. * @param SDIOx: Pointer to SDIO register base
  884. * @retval HAL status
  885. */
  886. uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx)
  887. {
  888. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  889. uint32_t errorstate;
  890. sdmmc_cmdinit.Argument = 0U;
  891. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS;
  892. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  893. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  894. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  895. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  896. /* Check for error conditions */
  897. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT);
  898. return errorstate;
  899. }
  900. /**
  901. * @brief Sends host capacity support information and activates the card's
  902. * initialization process. Send SDMMC_CMD_SEND_OP_COND command
  903. * @param SDIOx: Pointer to SDIO register base
  904. * @parame Argument: Argument used for the command
  905. * @retval HAL status
  906. */
  907. uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument)
  908. {
  909. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  910. uint32_t errorstate;
  911. sdmmc_cmdinit.Argument = Argument;
  912. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
  913. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  914. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  915. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  916. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  917. /* Check for error conditions */
  918. errorstate = SDMMC_GetCmdResp3(SDIOx);
  919. return errorstate;
  920. }
  921. /**
  922. * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand
  923. * @param SDIOx: Pointer to SDIO register base
  924. * @parame Argument: Argument used for the command
  925. * @retval HAL status
  926. */
  927. uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument)
  928. {
  929. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  930. uint32_t errorstate;
  931. /* Send CMD6 to activate SDR50 Mode and Power Limit 1.44W */
  932. /* CMD Response: R1 */
  933. sdmmc_cmdinit.Argument = Argument; /* SDMMC_SDR25_SWITCH_PATTERN;*/
  934. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
  935. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  936. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  937. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  938. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  939. /* Check for error conditions */
  940. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT);
  941. return errorstate;
  942. }
  943. /**
  944. * @}
  945. */
  946. /* Private function ----------------------------------------------------------*/
  947. /** @addtogroup SD_Private_Functions
  948. * @{
  949. */
  950. /**
  951. * @brief Checks for error conditions for CMD0.
  952. * @param hsd: SD handle
  953. * @retval SD Card error state
  954. */
  955. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
  956. {
  957. /* 8 is the number of required instructions cycles for the below loop statement.
  958. The SDIO_CMDTIMEOUT is expressed in ms */
  959. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  960. do
  961. {
  962. if (count-- == 0U)
  963. {
  964. return SDMMC_ERROR_TIMEOUT;
  965. }
  966. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
  967. /* Clear all the static flags */
  968. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  969. return SDMMC_ERROR_NONE;
  970. }
  971. /**
  972. * @brief Checks for error conditions for R1 response.
  973. * @param hsd: SD handle
  974. * @param SD_CMD: The sent command index
  975. * @retval SD Card error state
  976. */
  977. static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
  978. {
  979. uint32_t response_r1;
  980. uint32_t sta_reg;
  981. /* 8 is the number of required instructions cycles for the below loop statement.
  982. The Timeout is expressed in ms */
  983. register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
  984. do
  985. {
  986. if (count-- == 0U)
  987. {
  988. return SDMMC_ERROR_TIMEOUT;
  989. }
  990. sta_reg = SDIOx->STA;
  991. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  992. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  993. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  994. {
  995. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  996. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  997. }
  998. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  999. {
  1000. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1001. return SDMMC_ERROR_CMD_CRC_FAIL;
  1002. }
  1003. else
  1004. {
  1005. /* Nothing to do */
  1006. }
  1007. /* Clear all the static flags */
  1008. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1009. /* Check response received is of desired command */
  1010. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1011. {
  1012. return SDMMC_ERROR_CMD_CRC_FAIL;
  1013. }
  1014. /* We have received response, retrieve it for analysis */
  1015. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1016. if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
  1017. {
  1018. return SDMMC_ERROR_NONE;
  1019. }
  1020. else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
  1021. {
  1022. return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
  1023. }
  1024. else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
  1025. {
  1026. return SDMMC_ERROR_ADDR_MISALIGNED;
  1027. }
  1028. else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
  1029. {
  1030. return SDMMC_ERROR_BLOCK_LEN_ERR;
  1031. }
  1032. else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
  1033. {
  1034. return SDMMC_ERROR_ERASE_SEQ_ERR;
  1035. }
  1036. else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
  1037. {
  1038. return SDMMC_ERROR_BAD_ERASE_PARAM;
  1039. }
  1040. else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
  1041. {
  1042. return SDMMC_ERROR_WRITE_PROT_VIOLATION;
  1043. }
  1044. else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
  1045. {
  1046. return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
  1047. }
  1048. else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
  1049. {
  1050. return SDMMC_ERROR_COM_CRC_FAILED;
  1051. }
  1052. else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
  1053. {
  1054. return SDMMC_ERROR_ILLEGAL_CMD;
  1055. }
  1056. else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
  1057. {
  1058. return SDMMC_ERROR_CARD_ECC_FAILED;
  1059. }
  1060. else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
  1061. {
  1062. return SDMMC_ERROR_CC_ERR;
  1063. }
  1064. else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
  1065. {
  1066. return SDMMC_ERROR_STREAM_READ_UNDERRUN;
  1067. }
  1068. else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
  1069. {
  1070. return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
  1071. }
  1072. else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
  1073. {
  1074. return SDMMC_ERROR_CID_CSD_OVERWRITE;
  1075. }
  1076. else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
  1077. {
  1078. return SDMMC_ERROR_WP_ERASE_SKIP;
  1079. }
  1080. else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
  1081. {
  1082. return SDMMC_ERROR_CARD_ECC_DISABLED;
  1083. }
  1084. else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
  1085. {
  1086. return SDMMC_ERROR_ERASE_RESET;
  1087. }
  1088. else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
  1089. {
  1090. return SDMMC_ERROR_AKE_SEQ_ERR;
  1091. }
  1092. else
  1093. {
  1094. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1095. }
  1096. }
  1097. /**
  1098. * @brief Checks for error conditions for R2 (CID or CSD) response.
  1099. * @param hsd: SD handle
  1100. * @retval SD Card error state
  1101. */
  1102. static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
  1103. {
  1104. uint32_t sta_reg;
  1105. /* 8 is the number of required instructions cycles for the below loop statement.
  1106. The SDIO_CMDTIMEOUT is expressed in ms */
  1107. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1108. do
  1109. {
  1110. if (count-- == 0U)
  1111. {
  1112. return SDMMC_ERROR_TIMEOUT;
  1113. }
  1114. sta_reg = SDIOx->STA;
  1115. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1116. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1117. if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1118. {
  1119. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1120. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1121. }
  1122. else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1123. {
  1124. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1125. return SDMMC_ERROR_CMD_CRC_FAIL;
  1126. }
  1127. else
  1128. {
  1129. /* No error flag set */
  1130. /* Clear all the static flags */
  1131. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1132. }
  1133. return SDMMC_ERROR_NONE;
  1134. }
  1135. /**
  1136. * @brief Checks for error conditions for R3 (OCR) response.
  1137. * @param hsd: SD handle
  1138. * @retval SD Card error state
  1139. */
  1140. static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
  1141. {
  1142. uint32_t sta_reg;
  1143. /* 8 is the number of required instructions cycles for the below loop statement.
  1144. The SDIO_CMDTIMEOUT is expressed in ms */
  1145. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1146. do
  1147. {
  1148. if (count-- == 0U)
  1149. {
  1150. return SDMMC_ERROR_TIMEOUT;
  1151. }
  1152. sta_reg = SDIOx->STA;
  1153. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1154. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1155. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1156. {
  1157. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1158. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1159. }
  1160. else
  1161. {
  1162. /* Clear all the static flags */
  1163. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1164. }
  1165. return SDMMC_ERROR_NONE;
  1166. }
  1167. /**
  1168. * @brief Checks for error conditions for R6 (RCA) response.
  1169. * @param hsd: SD handle
  1170. * @param SD_CMD: The sent command index
  1171. * @param pRCA: Pointer to the variable that will contain the SD card relative
  1172. * address RCA
  1173. * @retval SD Card error state
  1174. */
  1175. static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
  1176. {
  1177. uint32_t response_r1;
  1178. uint32_t sta_reg;
  1179. /* 8 is the number of required instructions cycles for the below loop statement.
  1180. The SDIO_CMDTIMEOUT is expressed in ms */
  1181. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1182. do
  1183. {
  1184. if (count-- == 0U)
  1185. {
  1186. return SDMMC_ERROR_TIMEOUT;
  1187. }
  1188. sta_reg = SDIOx->STA;
  1189. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1190. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1191. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1192. {
  1193. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1194. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1195. }
  1196. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1197. {
  1198. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1199. return SDMMC_ERROR_CMD_CRC_FAIL;
  1200. }
  1201. else
  1202. {
  1203. /* Nothing to do */
  1204. }
  1205. /* Check response received is of desired command */
  1206. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1207. {
  1208. return SDMMC_ERROR_CMD_CRC_FAIL;
  1209. }
  1210. /* Clear all the static flags */
  1211. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1212. /* We have received response, retrieve it. */
  1213. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1214. if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
  1215. {
  1216. *pRCA = (uint16_t) (response_r1 >> 16);
  1217. return SDMMC_ERROR_NONE;
  1218. }
  1219. else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
  1220. {
  1221. return SDMMC_ERROR_ILLEGAL_CMD;
  1222. }
  1223. else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
  1224. {
  1225. return SDMMC_ERROR_COM_CRC_FAILED;
  1226. }
  1227. else
  1228. {
  1229. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1230. }
  1231. }
  1232. /**
  1233. * @brief Checks for error conditions for R7 response.
  1234. * @param hsd: SD handle
  1235. * @retval SD Card error state
  1236. */
  1237. static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
  1238. {
  1239. uint32_t sta_reg;
  1240. /* 8 is the number of required instructions cycles for the below loop statement.
  1241. The SDIO_CMDTIMEOUT is expressed in ms */
  1242. register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1243. do
  1244. {
  1245. if (count-- == 0U)
  1246. {
  1247. return SDMMC_ERROR_TIMEOUT;
  1248. }
  1249. sta_reg = SDIOx->STA;
  1250. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1251. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1252. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1253. {
  1254. /* Card is SD V2.0 compliant */
  1255. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1256. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1257. }
  1258. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1259. {
  1260. /* Card is SD V2.0 compliant */
  1261. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1262. return SDMMC_ERROR_CMD_CRC_FAIL;
  1263. }
  1264. else
  1265. {
  1266. /* Nothing to do */
  1267. }
  1268. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
  1269. {
  1270. /* Card is SD V2.0 compliant */
  1271. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
  1272. }
  1273. return SDMMC_ERROR_NONE;
  1274. }
  1275. /**
  1276. * @}
  1277. */
  1278. #endif /* HAL_SD_MODULE_ENABLED || HAL_MMC_MODULE_ENABLED */
  1279. /**
  1280. * @}
  1281. */
  1282. /**
  1283. * @}
  1284. */
  1285. #endif /* SDIO */
  1286. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/