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  1. SD_CARD_SPI.elf: file format elf32-littlearm
  2. Sections:
  3. Idx Name Size VMA LMA File off Algn
  4. 0 .isr_vector 0000013c 08000000 08000000 00010000 2**0
  5. CONTENTS, ALLOC, LOAD, READONLY, DATA
  6. 1 .text 00007870 0800013c 0800013c 0001013c 2**2
  7. CONTENTS, ALLOC, LOAD, READONLY, CODE
  8. 2 .rodata 00000610 080079ac 080079ac 000179ac 2**2
  9. CONTENTS, ALLOC, LOAD, READONLY, DATA
  10. 3 .ARM.extab 00000000 08007fbc 08007fbc 00020088 2**0
  11. CONTENTS
  12. 4 .ARM 00000008 08007fbc 08007fbc 00017fbc 2**2
  13. CONTENTS, ALLOC, LOAD, READONLY, DATA
  14. 5 .preinit_array 00000000 08007fc4 08007fc4 00020088 2**0
  15. CONTENTS, ALLOC, LOAD, DATA
  16. 6 .init_array 00000004 08007fc4 08007fc4 00017fc4 2**2
  17. CONTENTS, ALLOC, LOAD, DATA
  18. 7 .fini_array 00000004 08007fc8 08007fc8 00017fc8 2**2
  19. CONTENTS, ALLOC, LOAD, DATA
  20. 8 .data 00000088 20000000 08007fcc 00020000 2**2
  21. CONTENTS, ALLOC, LOAD, DATA
  22. 9 .bss 00004454 20000088 08008054 00020088 2**2
  23. ALLOC
  24. 10 ._user_heap_stack 00000604 200044dc 08008054 000244dc 2**0
  25. ALLOC
  26. 11 .ARM.attributes 00000029 00000000 00000000 00020088 2**0
  27. CONTENTS, READONLY
  28. 12 .debug_info 0000fe66 00000000 00000000 000200b1 2**0
  29. CONTENTS, READONLY, DEBUGGING
  30. 13 .debug_abbrev 00002526 00000000 00000000 0002ff17 2**0
  31. CONTENTS, READONLY, DEBUGGING
  32. 14 .debug_aranges 00000bd0 00000000 00000000 00032440 2**3
  33. CONTENTS, READONLY, DEBUGGING
  34. 15 .debug_ranges 00000aa8 00000000 00000000 00033010 2**3
  35. CONTENTS, READONLY, DEBUGGING
  36. 16 .debug_macro 0001755b 00000000 00000000 00033ab8 2**0
  37. CONTENTS, READONLY, DEBUGGING
  38. 17 .debug_line 0000bd02 00000000 00000000 0004b013 2**0
  39. CONTENTS, READONLY, DEBUGGING
  40. 18 .debug_str 00087c91 00000000 00000000 00056d15 2**0
  41. CONTENTS, READONLY, DEBUGGING
  42. 19 .comment 0000007b 00000000 00000000 000de9a6 2**0
  43. CONTENTS, READONLY
  44. 20 .debug_frame 000033fc 00000000 00000000 000dea24 2**2
  45. CONTENTS, READONLY, DEBUGGING
  46. Disassembly of section .text:
  47. 0800013c <__do_global_dtors_aux>:
  48. 800013c: b510 push {r4, lr}
  49. 800013e: 4c05 ldr r4, [pc, #20] ; (8000154 <__do_global_dtors_aux+0x18>)
  50. 8000140: 7823 ldrb r3, [r4, #0]
  51. 8000142: b933 cbnz r3, 8000152 <__do_global_dtors_aux+0x16>
  52. 8000144: 4b04 ldr r3, [pc, #16] ; (8000158 <__do_global_dtors_aux+0x1c>)
  53. 8000146: b113 cbz r3, 800014e <__do_global_dtors_aux+0x12>
  54. 8000148: 4804 ldr r0, [pc, #16] ; (800015c <__do_global_dtors_aux+0x20>)
  55. 800014a: f3af 8000 nop.w
  56. 800014e: 2301 movs r3, #1
  57. 8000150: 7023 strb r3, [r4, #0]
  58. 8000152: bd10 pop {r4, pc}
  59. 8000154: 20000088 .word 0x20000088
  60. 8000158: 00000000 .word 0x00000000
  61. 800015c: 08007994 .word 0x08007994
  62. 08000160 <frame_dummy>:
  63. 8000160: b508 push {r3, lr}
  64. 8000162: 4b03 ldr r3, [pc, #12] ; (8000170 <frame_dummy+0x10>)
  65. 8000164: b11b cbz r3, 800016e <frame_dummy+0xe>
  66. 8000166: 4903 ldr r1, [pc, #12] ; (8000174 <frame_dummy+0x14>)
  67. 8000168: 4803 ldr r0, [pc, #12] ; (8000178 <frame_dummy+0x18>)
  68. 800016a: f3af 8000 nop.w
  69. 800016e: bd08 pop {r3, pc}
  70. 8000170: 00000000 .word 0x00000000
  71. 8000174: 2000008c .word 0x2000008c
  72. 8000178: 08007994 .word 0x08007994
  73. 0800017c <strlen>:
  74. 800017c: 4603 mov r3, r0
  75. 800017e: f813 2b01 ldrb.w r2, [r3], #1
  76. 8000182: 2a00 cmp r2, #0
  77. 8000184: d1fb bne.n 800017e <strlen+0x2>
  78. 8000186: 1a18 subs r0, r3, r0
  79. 8000188: 3801 subs r0, #1
  80. 800018a: 4770 bx lr
  81. 0800018c <__aeabi_drsub>:
  82. 800018c: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
  83. 8000190: e002 b.n 8000198 <__adddf3>
  84. 8000192: bf00 nop
  85. 08000194 <__aeabi_dsub>:
  86. 8000194: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
  87. 08000198 <__adddf3>:
  88. 8000198: b530 push {r4, r5, lr}
  89. 800019a: ea4f 0441 mov.w r4, r1, lsl #1
  90. 800019e: ea4f 0543 mov.w r5, r3, lsl #1
  91. 80001a2: ea94 0f05 teq r4, r5
  92. 80001a6: bf08 it eq
  93. 80001a8: ea90 0f02 teqeq r0, r2
  94. 80001ac: bf1f itttt ne
  95. 80001ae: ea54 0c00 orrsne.w ip, r4, r0
  96. 80001b2: ea55 0c02 orrsne.w ip, r5, r2
  97. 80001b6: ea7f 5c64 mvnsne.w ip, r4, asr #21
  98. 80001ba: ea7f 5c65 mvnsne.w ip, r5, asr #21
  99. 80001be: f000 80e2 beq.w 8000386 <__adddf3+0x1ee>
  100. 80001c2: ea4f 5454 mov.w r4, r4, lsr #21
  101. 80001c6: ebd4 5555 rsbs r5, r4, r5, lsr #21
  102. 80001ca: bfb8 it lt
  103. 80001cc: 426d neglt r5, r5
  104. 80001ce: dd0c ble.n 80001ea <__adddf3+0x52>
  105. 80001d0: 442c add r4, r5
  106. 80001d2: ea80 0202 eor.w r2, r0, r2
  107. 80001d6: ea81 0303 eor.w r3, r1, r3
  108. 80001da: ea82 0000 eor.w r0, r2, r0
  109. 80001de: ea83 0101 eor.w r1, r3, r1
  110. 80001e2: ea80 0202 eor.w r2, r0, r2
  111. 80001e6: ea81 0303 eor.w r3, r1, r3
  112. 80001ea: 2d36 cmp r5, #54 ; 0x36
  113. 80001ec: bf88 it hi
  114. 80001ee: bd30 pophi {r4, r5, pc}
  115. 80001f0: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
  116. 80001f4: ea4f 3101 mov.w r1, r1, lsl #12
  117. 80001f8: f44f 1c80 mov.w ip, #1048576 ; 0x100000
  118. 80001fc: ea4c 3111 orr.w r1, ip, r1, lsr #12
  119. 8000200: d002 beq.n 8000208 <__adddf3+0x70>
  120. 8000202: 4240 negs r0, r0
  121. 8000204: eb61 0141 sbc.w r1, r1, r1, lsl #1
  122. 8000208: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
  123. 800020c: ea4f 3303 mov.w r3, r3, lsl #12
  124. 8000210: ea4c 3313 orr.w r3, ip, r3, lsr #12
  125. 8000214: d002 beq.n 800021c <__adddf3+0x84>
  126. 8000216: 4252 negs r2, r2
  127. 8000218: eb63 0343 sbc.w r3, r3, r3, lsl #1
  128. 800021c: ea94 0f05 teq r4, r5
  129. 8000220: f000 80a7 beq.w 8000372 <__adddf3+0x1da>
  130. 8000224: f1a4 0401 sub.w r4, r4, #1
  131. 8000228: f1d5 0e20 rsbs lr, r5, #32
  132. 800022c: db0d blt.n 800024a <__adddf3+0xb2>
  133. 800022e: fa02 fc0e lsl.w ip, r2, lr
  134. 8000232: fa22 f205 lsr.w r2, r2, r5
  135. 8000236: 1880 adds r0, r0, r2
  136. 8000238: f141 0100 adc.w r1, r1, #0
  137. 800023c: fa03 f20e lsl.w r2, r3, lr
  138. 8000240: 1880 adds r0, r0, r2
  139. 8000242: fa43 f305 asr.w r3, r3, r5
  140. 8000246: 4159 adcs r1, r3
  141. 8000248: e00e b.n 8000268 <__adddf3+0xd0>
  142. 800024a: f1a5 0520 sub.w r5, r5, #32
  143. 800024e: f10e 0e20 add.w lr, lr, #32
  144. 8000252: 2a01 cmp r2, #1
  145. 8000254: fa03 fc0e lsl.w ip, r3, lr
  146. 8000258: bf28 it cs
  147. 800025a: f04c 0c02 orrcs.w ip, ip, #2
  148. 800025e: fa43 f305 asr.w r3, r3, r5
  149. 8000262: 18c0 adds r0, r0, r3
  150. 8000264: eb51 71e3 adcs.w r1, r1, r3, asr #31
  151. 8000268: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
  152. 800026c: d507 bpl.n 800027e <__adddf3+0xe6>
  153. 800026e: f04f 0e00 mov.w lr, #0
  154. 8000272: f1dc 0c00 rsbs ip, ip, #0
  155. 8000276: eb7e 0000 sbcs.w r0, lr, r0
  156. 800027a: eb6e 0101 sbc.w r1, lr, r1
  157. 800027e: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
  158. 8000282: d31b bcc.n 80002bc <__adddf3+0x124>
  159. 8000284: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
  160. 8000288: d30c bcc.n 80002a4 <__adddf3+0x10c>
  161. 800028a: 0849 lsrs r1, r1, #1
  162. 800028c: ea5f 0030 movs.w r0, r0, rrx
  163. 8000290: ea4f 0c3c mov.w ip, ip, rrx
  164. 8000294: f104 0401 add.w r4, r4, #1
  165. 8000298: ea4f 5244 mov.w r2, r4, lsl #21
  166. 800029c: f512 0f80 cmn.w r2, #4194304 ; 0x400000
  167. 80002a0: f080 809a bcs.w 80003d8 <__adddf3+0x240>
  168. 80002a4: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
  169. 80002a8: bf08 it eq
  170. 80002aa: ea5f 0c50 movseq.w ip, r0, lsr #1
  171. 80002ae: f150 0000 adcs.w r0, r0, #0
  172. 80002b2: eb41 5104 adc.w r1, r1, r4, lsl #20
  173. 80002b6: ea41 0105 orr.w r1, r1, r5
  174. 80002ba: bd30 pop {r4, r5, pc}
  175. 80002bc: ea5f 0c4c movs.w ip, ip, lsl #1
  176. 80002c0: 4140 adcs r0, r0
  177. 80002c2: eb41 0101 adc.w r1, r1, r1
  178. 80002c6: f411 1f80 tst.w r1, #1048576 ; 0x100000
  179. 80002ca: f1a4 0401 sub.w r4, r4, #1
  180. 80002ce: d1e9 bne.n 80002a4 <__adddf3+0x10c>
  181. 80002d0: f091 0f00 teq r1, #0
  182. 80002d4: bf04 itt eq
  183. 80002d6: 4601 moveq r1, r0
  184. 80002d8: 2000 moveq r0, #0
  185. 80002da: fab1 f381 clz r3, r1
  186. 80002de: bf08 it eq
  187. 80002e0: 3320 addeq r3, #32
  188. 80002e2: f1a3 030b sub.w r3, r3, #11
  189. 80002e6: f1b3 0220 subs.w r2, r3, #32
  190. 80002ea: da0c bge.n 8000306 <__adddf3+0x16e>
  191. 80002ec: 320c adds r2, #12
  192. 80002ee: dd08 ble.n 8000302 <__adddf3+0x16a>
  193. 80002f0: f102 0c14 add.w ip, r2, #20
  194. 80002f4: f1c2 020c rsb r2, r2, #12
  195. 80002f8: fa01 f00c lsl.w r0, r1, ip
  196. 80002fc: fa21 f102 lsr.w r1, r1, r2
  197. 8000300: e00c b.n 800031c <__adddf3+0x184>
  198. 8000302: f102 0214 add.w r2, r2, #20
  199. 8000306: bfd8 it le
  200. 8000308: f1c2 0c20 rsble ip, r2, #32
  201. 800030c: fa01 f102 lsl.w r1, r1, r2
  202. 8000310: fa20 fc0c lsr.w ip, r0, ip
  203. 8000314: bfdc itt le
  204. 8000316: ea41 010c orrle.w r1, r1, ip
  205. 800031a: 4090 lslle r0, r2
  206. 800031c: 1ae4 subs r4, r4, r3
  207. 800031e: bfa2 ittt ge
  208. 8000320: eb01 5104 addge.w r1, r1, r4, lsl #20
  209. 8000324: 4329 orrge r1, r5
  210. 8000326: bd30 popge {r4, r5, pc}
  211. 8000328: ea6f 0404 mvn.w r4, r4
  212. 800032c: 3c1f subs r4, #31
  213. 800032e: da1c bge.n 800036a <__adddf3+0x1d2>
  214. 8000330: 340c adds r4, #12
  215. 8000332: dc0e bgt.n 8000352 <__adddf3+0x1ba>
  216. 8000334: f104 0414 add.w r4, r4, #20
  217. 8000338: f1c4 0220 rsb r2, r4, #32
  218. 800033c: fa20 f004 lsr.w r0, r0, r4
  219. 8000340: fa01 f302 lsl.w r3, r1, r2
  220. 8000344: ea40 0003 orr.w r0, r0, r3
  221. 8000348: fa21 f304 lsr.w r3, r1, r4
  222. 800034c: ea45 0103 orr.w r1, r5, r3
  223. 8000350: bd30 pop {r4, r5, pc}
  224. 8000352: f1c4 040c rsb r4, r4, #12
  225. 8000356: f1c4 0220 rsb r2, r4, #32
  226. 800035a: fa20 f002 lsr.w r0, r0, r2
  227. 800035e: fa01 f304 lsl.w r3, r1, r4
  228. 8000362: ea40 0003 orr.w r0, r0, r3
  229. 8000366: 4629 mov r1, r5
  230. 8000368: bd30 pop {r4, r5, pc}
  231. 800036a: fa21 f004 lsr.w r0, r1, r4
  232. 800036e: 4629 mov r1, r5
  233. 8000370: bd30 pop {r4, r5, pc}
  234. 8000372: f094 0f00 teq r4, #0
  235. 8000376: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
  236. 800037a: bf06 itte eq
  237. 800037c: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
  238. 8000380: 3401 addeq r4, #1
  239. 8000382: 3d01 subne r5, #1
  240. 8000384: e74e b.n 8000224 <__adddf3+0x8c>
  241. 8000386: ea7f 5c64 mvns.w ip, r4, asr #21
  242. 800038a: bf18 it ne
  243. 800038c: ea7f 5c65 mvnsne.w ip, r5, asr #21
  244. 8000390: d029 beq.n 80003e6 <__adddf3+0x24e>
  245. 8000392: ea94 0f05 teq r4, r5
  246. 8000396: bf08 it eq
  247. 8000398: ea90 0f02 teqeq r0, r2
  248. 800039c: d005 beq.n 80003aa <__adddf3+0x212>
  249. 800039e: ea54 0c00 orrs.w ip, r4, r0
  250. 80003a2: bf04 itt eq
  251. 80003a4: 4619 moveq r1, r3
  252. 80003a6: 4610 moveq r0, r2
  253. 80003a8: bd30 pop {r4, r5, pc}
  254. 80003aa: ea91 0f03 teq r1, r3
  255. 80003ae: bf1e ittt ne
  256. 80003b0: 2100 movne r1, #0
  257. 80003b2: 2000 movne r0, #0
  258. 80003b4: bd30 popne {r4, r5, pc}
  259. 80003b6: ea5f 5c54 movs.w ip, r4, lsr #21
  260. 80003ba: d105 bne.n 80003c8 <__adddf3+0x230>
  261. 80003bc: 0040 lsls r0, r0, #1
  262. 80003be: 4149 adcs r1, r1
  263. 80003c0: bf28 it cs
  264. 80003c2: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
  265. 80003c6: bd30 pop {r4, r5, pc}
  266. 80003c8: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
  267. 80003cc: bf3c itt cc
  268. 80003ce: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
  269. 80003d2: bd30 popcc {r4, r5, pc}
  270. 80003d4: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
  271. 80003d8: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
  272. 80003dc: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
  273. 80003e0: f04f 0000 mov.w r0, #0
  274. 80003e4: bd30 pop {r4, r5, pc}
  275. 80003e6: ea7f 5c64 mvns.w ip, r4, asr #21
  276. 80003ea: bf1a itte ne
  277. 80003ec: 4619 movne r1, r3
  278. 80003ee: 4610 movne r0, r2
  279. 80003f0: ea7f 5c65 mvnseq.w ip, r5, asr #21
  280. 80003f4: bf1c itt ne
  281. 80003f6: 460b movne r3, r1
  282. 80003f8: 4602 movne r2, r0
  283. 80003fa: ea50 3401 orrs.w r4, r0, r1, lsl #12
  284. 80003fe: bf06 itte eq
  285. 8000400: ea52 3503 orrseq.w r5, r2, r3, lsl #12
  286. 8000404: ea91 0f03 teqeq r1, r3
  287. 8000408: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
  288. 800040c: bd30 pop {r4, r5, pc}
  289. 800040e: bf00 nop
  290. 08000410 <__aeabi_ui2d>:
  291. 8000410: f090 0f00 teq r0, #0
  292. 8000414: bf04 itt eq
  293. 8000416: 2100 moveq r1, #0
  294. 8000418: 4770 bxeq lr
  295. 800041a: b530 push {r4, r5, lr}
  296. 800041c: f44f 6480 mov.w r4, #1024 ; 0x400
  297. 8000420: f104 0432 add.w r4, r4, #50 ; 0x32
  298. 8000424: f04f 0500 mov.w r5, #0
  299. 8000428: f04f 0100 mov.w r1, #0
  300. 800042c: e750 b.n 80002d0 <__adddf3+0x138>
  301. 800042e: bf00 nop
  302. 08000430 <__aeabi_i2d>:
  303. 8000430: f090 0f00 teq r0, #0
  304. 8000434: bf04 itt eq
  305. 8000436: 2100 moveq r1, #0
  306. 8000438: 4770 bxeq lr
  307. 800043a: b530 push {r4, r5, lr}
  308. 800043c: f44f 6480 mov.w r4, #1024 ; 0x400
  309. 8000440: f104 0432 add.w r4, r4, #50 ; 0x32
  310. 8000444: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
  311. 8000448: bf48 it mi
  312. 800044a: 4240 negmi r0, r0
  313. 800044c: f04f 0100 mov.w r1, #0
  314. 8000450: e73e b.n 80002d0 <__adddf3+0x138>
  315. 8000452: bf00 nop
  316. 08000454 <__aeabi_f2d>:
  317. 8000454: 0042 lsls r2, r0, #1
  318. 8000456: ea4f 01e2 mov.w r1, r2, asr #3
  319. 800045a: ea4f 0131 mov.w r1, r1, rrx
  320. 800045e: ea4f 7002 mov.w r0, r2, lsl #28
  321. 8000462: bf1f itttt ne
  322. 8000464: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
  323. 8000468: f093 4f7f teqne r3, #4278190080 ; 0xff000000
  324. 800046c: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
  325. 8000470: 4770 bxne lr
  326. 8000472: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
  327. 8000476: bf08 it eq
  328. 8000478: 4770 bxeq lr
  329. 800047a: f093 4f7f teq r3, #4278190080 ; 0xff000000
  330. 800047e: bf04 itt eq
  331. 8000480: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
  332. 8000484: 4770 bxeq lr
  333. 8000486: b530 push {r4, r5, lr}
  334. 8000488: f44f 7460 mov.w r4, #896 ; 0x380
  335. 800048c: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
  336. 8000490: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
  337. 8000494: e71c b.n 80002d0 <__adddf3+0x138>
  338. 8000496: bf00 nop
  339. 08000498 <__aeabi_ul2d>:
  340. 8000498: ea50 0201 orrs.w r2, r0, r1
  341. 800049c: bf08 it eq
  342. 800049e: 4770 bxeq lr
  343. 80004a0: b530 push {r4, r5, lr}
  344. 80004a2: f04f 0500 mov.w r5, #0
  345. 80004a6: e00a b.n 80004be <__aeabi_l2d+0x16>
  346. 080004a8 <__aeabi_l2d>:
  347. 80004a8: ea50 0201 orrs.w r2, r0, r1
  348. 80004ac: bf08 it eq
  349. 80004ae: 4770 bxeq lr
  350. 80004b0: b530 push {r4, r5, lr}
  351. 80004b2: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
  352. 80004b6: d502 bpl.n 80004be <__aeabi_l2d+0x16>
  353. 80004b8: 4240 negs r0, r0
  354. 80004ba: eb61 0141 sbc.w r1, r1, r1, lsl #1
  355. 80004be: f44f 6480 mov.w r4, #1024 ; 0x400
  356. 80004c2: f104 0432 add.w r4, r4, #50 ; 0x32
  357. 80004c6: ea5f 5c91 movs.w ip, r1, lsr #22
  358. 80004ca: f43f aed8 beq.w 800027e <__adddf3+0xe6>
  359. 80004ce: f04f 0203 mov.w r2, #3
  360. 80004d2: ea5f 0cdc movs.w ip, ip, lsr #3
  361. 80004d6: bf18 it ne
  362. 80004d8: 3203 addne r2, #3
  363. 80004da: ea5f 0cdc movs.w ip, ip, lsr #3
  364. 80004de: bf18 it ne
  365. 80004e0: 3203 addne r2, #3
  366. 80004e2: eb02 02dc add.w r2, r2, ip, lsr #3
  367. 80004e6: f1c2 0320 rsb r3, r2, #32
  368. 80004ea: fa00 fc03 lsl.w ip, r0, r3
  369. 80004ee: fa20 f002 lsr.w r0, r0, r2
  370. 80004f2: fa01 fe03 lsl.w lr, r1, r3
  371. 80004f6: ea40 000e orr.w r0, r0, lr
  372. 80004fa: fa21 f102 lsr.w r1, r1, r2
  373. 80004fe: 4414 add r4, r2
  374. 8000500: e6bd b.n 800027e <__adddf3+0xe6>
  375. 8000502: bf00 nop
  376. 08000504 <__aeabi_dmul>:
  377. 8000504: b570 push {r4, r5, r6, lr}
  378. 8000506: f04f 0cff mov.w ip, #255 ; 0xff
  379. 800050a: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
  380. 800050e: ea1c 5411 ands.w r4, ip, r1, lsr #20
  381. 8000512: bf1d ittte ne
  382. 8000514: ea1c 5513 andsne.w r5, ip, r3, lsr #20
  383. 8000518: ea94 0f0c teqne r4, ip
  384. 800051c: ea95 0f0c teqne r5, ip
  385. 8000520: f000 f8de bleq 80006e0 <__aeabi_dmul+0x1dc>
  386. 8000524: 442c add r4, r5
  387. 8000526: ea81 0603 eor.w r6, r1, r3
  388. 800052a: ea21 514c bic.w r1, r1, ip, lsl #21
  389. 800052e: ea23 534c bic.w r3, r3, ip, lsl #21
  390. 8000532: ea50 3501 orrs.w r5, r0, r1, lsl #12
  391. 8000536: bf18 it ne
  392. 8000538: ea52 3503 orrsne.w r5, r2, r3, lsl #12
  393. 800053c: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
  394. 8000540: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
  395. 8000544: d038 beq.n 80005b8 <__aeabi_dmul+0xb4>
  396. 8000546: fba0 ce02 umull ip, lr, r0, r2
  397. 800054a: f04f 0500 mov.w r5, #0
  398. 800054e: fbe1 e502 umlal lr, r5, r1, r2
  399. 8000552: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
  400. 8000556: fbe0 e503 umlal lr, r5, r0, r3
  401. 800055a: f04f 0600 mov.w r6, #0
  402. 800055e: fbe1 5603 umlal r5, r6, r1, r3
  403. 8000562: f09c 0f00 teq ip, #0
  404. 8000566: bf18 it ne
  405. 8000568: f04e 0e01 orrne.w lr, lr, #1
  406. 800056c: f1a4 04ff sub.w r4, r4, #255 ; 0xff
  407. 8000570: f5b6 7f00 cmp.w r6, #512 ; 0x200
  408. 8000574: f564 7440 sbc.w r4, r4, #768 ; 0x300
  409. 8000578: d204 bcs.n 8000584 <__aeabi_dmul+0x80>
  410. 800057a: ea5f 0e4e movs.w lr, lr, lsl #1
  411. 800057e: 416d adcs r5, r5
  412. 8000580: eb46 0606 adc.w r6, r6, r6
  413. 8000584: ea42 21c6 orr.w r1, r2, r6, lsl #11
  414. 8000588: ea41 5155 orr.w r1, r1, r5, lsr #21
  415. 800058c: ea4f 20c5 mov.w r0, r5, lsl #11
  416. 8000590: ea40 505e orr.w r0, r0, lr, lsr #21
  417. 8000594: ea4f 2ece mov.w lr, lr, lsl #11
  418. 8000598: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
  419. 800059c: bf88 it hi
  420. 800059e: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
  421. 80005a2: d81e bhi.n 80005e2 <__aeabi_dmul+0xde>
  422. 80005a4: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
  423. 80005a8: bf08 it eq
  424. 80005aa: ea5f 0e50 movseq.w lr, r0, lsr #1
  425. 80005ae: f150 0000 adcs.w r0, r0, #0
  426. 80005b2: eb41 5104 adc.w r1, r1, r4, lsl #20
  427. 80005b6: bd70 pop {r4, r5, r6, pc}
  428. 80005b8: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
  429. 80005bc: ea46 0101 orr.w r1, r6, r1
  430. 80005c0: ea40 0002 orr.w r0, r0, r2
  431. 80005c4: ea81 0103 eor.w r1, r1, r3
  432. 80005c8: ebb4 045c subs.w r4, r4, ip, lsr #1
  433. 80005cc: bfc2 ittt gt
  434. 80005ce: ebd4 050c rsbsgt r5, r4, ip
  435. 80005d2: ea41 5104 orrgt.w r1, r1, r4, lsl #20
  436. 80005d6: bd70 popgt {r4, r5, r6, pc}
  437. 80005d8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
  438. 80005dc: f04f 0e00 mov.w lr, #0
  439. 80005e0: 3c01 subs r4, #1
  440. 80005e2: f300 80ab bgt.w 800073c <__aeabi_dmul+0x238>
  441. 80005e6: f114 0f36 cmn.w r4, #54 ; 0x36
  442. 80005ea: bfde ittt le
  443. 80005ec: 2000 movle r0, #0
  444. 80005ee: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
  445. 80005f2: bd70 pople {r4, r5, r6, pc}
  446. 80005f4: f1c4 0400 rsb r4, r4, #0
  447. 80005f8: 3c20 subs r4, #32
  448. 80005fa: da35 bge.n 8000668 <__aeabi_dmul+0x164>
  449. 80005fc: 340c adds r4, #12
  450. 80005fe: dc1b bgt.n 8000638 <__aeabi_dmul+0x134>
  451. 8000600: f104 0414 add.w r4, r4, #20
  452. 8000604: f1c4 0520 rsb r5, r4, #32
  453. 8000608: fa00 f305 lsl.w r3, r0, r5
  454. 800060c: fa20 f004 lsr.w r0, r0, r4
  455. 8000610: fa01 f205 lsl.w r2, r1, r5
  456. 8000614: ea40 0002 orr.w r0, r0, r2
  457. 8000618: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
  458. 800061c: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
  459. 8000620: eb10 70d3 adds.w r0, r0, r3, lsr #31
  460. 8000624: fa21 f604 lsr.w r6, r1, r4
  461. 8000628: eb42 0106 adc.w r1, r2, r6
  462. 800062c: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
  463. 8000630: bf08 it eq
  464. 8000632: ea20 70d3 biceq.w r0, r0, r3, lsr #31
  465. 8000636: bd70 pop {r4, r5, r6, pc}
  466. 8000638: f1c4 040c rsb r4, r4, #12
  467. 800063c: f1c4 0520 rsb r5, r4, #32
  468. 8000640: fa00 f304 lsl.w r3, r0, r4
  469. 8000644: fa20 f005 lsr.w r0, r0, r5
  470. 8000648: fa01 f204 lsl.w r2, r1, r4
  471. 800064c: ea40 0002 orr.w r0, r0, r2
  472. 8000650: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
  473. 8000654: eb10 70d3 adds.w r0, r0, r3, lsr #31
  474. 8000658: f141 0100 adc.w r1, r1, #0
  475. 800065c: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
  476. 8000660: bf08 it eq
  477. 8000662: ea20 70d3 biceq.w r0, r0, r3, lsr #31
  478. 8000666: bd70 pop {r4, r5, r6, pc}
  479. 8000668: f1c4 0520 rsb r5, r4, #32
  480. 800066c: fa00 f205 lsl.w r2, r0, r5
  481. 8000670: ea4e 0e02 orr.w lr, lr, r2
  482. 8000674: fa20 f304 lsr.w r3, r0, r4
  483. 8000678: fa01 f205 lsl.w r2, r1, r5
  484. 800067c: ea43 0302 orr.w r3, r3, r2
  485. 8000680: fa21 f004 lsr.w r0, r1, r4
  486. 8000684: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
  487. 8000688: fa21 f204 lsr.w r2, r1, r4
  488. 800068c: ea20 0002 bic.w r0, r0, r2
  489. 8000690: eb00 70d3 add.w r0, r0, r3, lsr #31
  490. 8000694: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
  491. 8000698: bf08 it eq
  492. 800069a: ea20 70d3 biceq.w r0, r0, r3, lsr #31
  493. 800069e: bd70 pop {r4, r5, r6, pc}
  494. 80006a0: f094 0f00 teq r4, #0
  495. 80006a4: d10f bne.n 80006c6 <__aeabi_dmul+0x1c2>
  496. 80006a6: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
  497. 80006aa: 0040 lsls r0, r0, #1
  498. 80006ac: eb41 0101 adc.w r1, r1, r1
  499. 80006b0: f411 1f80 tst.w r1, #1048576 ; 0x100000
  500. 80006b4: bf08 it eq
  501. 80006b6: 3c01 subeq r4, #1
  502. 80006b8: d0f7 beq.n 80006aa <__aeabi_dmul+0x1a6>
  503. 80006ba: ea41 0106 orr.w r1, r1, r6
  504. 80006be: f095 0f00 teq r5, #0
  505. 80006c2: bf18 it ne
  506. 80006c4: 4770 bxne lr
  507. 80006c6: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
  508. 80006ca: 0052 lsls r2, r2, #1
  509. 80006cc: eb43 0303 adc.w r3, r3, r3
  510. 80006d0: f413 1f80 tst.w r3, #1048576 ; 0x100000
  511. 80006d4: bf08 it eq
  512. 80006d6: 3d01 subeq r5, #1
  513. 80006d8: d0f7 beq.n 80006ca <__aeabi_dmul+0x1c6>
  514. 80006da: ea43 0306 orr.w r3, r3, r6
  515. 80006de: 4770 bx lr
  516. 80006e0: ea94 0f0c teq r4, ip
  517. 80006e4: ea0c 5513 and.w r5, ip, r3, lsr #20
  518. 80006e8: bf18 it ne
  519. 80006ea: ea95 0f0c teqne r5, ip
  520. 80006ee: d00c beq.n 800070a <__aeabi_dmul+0x206>
  521. 80006f0: ea50 0641 orrs.w r6, r0, r1, lsl #1
  522. 80006f4: bf18 it ne
  523. 80006f6: ea52 0643 orrsne.w r6, r2, r3, lsl #1
  524. 80006fa: d1d1 bne.n 80006a0 <__aeabi_dmul+0x19c>
  525. 80006fc: ea81 0103 eor.w r1, r1, r3
  526. 8000700: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
  527. 8000704: f04f 0000 mov.w r0, #0
  528. 8000708: bd70 pop {r4, r5, r6, pc}
  529. 800070a: ea50 0641 orrs.w r6, r0, r1, lsl #1
  530. 800070e: bf06 itte eq
  531. 8000710: 4610 moveq r0, r2
  532. 8000712: 4619 moveq r1, r3
  533. 8000714: ea52 0643 orrsne.w r6, r2, r3, lsl #1
  534. 8000718: d019 beq.n 800074e <__aeabi_dmul+0x24a>
  535. 800071a: ea94 0f0c teq r4, ip
  536. 800071e: d102 bne.n 8000726 <__aeabi_dmul+0x222>
  537. 8000720: ea50 3601 orrs.w r6, r0, r1, lsl #12
  538. 8000724: d113 bne.n 800074e <__aeabi_dmul+0x24a>
  539. 8000726: ea95 0f0c teq r5, ip
  540. 800072a: d105 bne.n 8000738 <__aeabi_dmul+0x234>
  541. 800072c: ea52 3603 orrs.w r6, r2, r3, lsl #12
  542. 8000730: bf1c itt ne
  543. 8000732: 4610 movne r0, r2
  544. 8000734: 4619 movne r1, r3
  545. 8000736: d10a bne.n 800074e <__aeabi_dmul+0x24a>
  546. 8000738: ea81 0103 eor.w r1, r1, r3
  547. 800073c: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
  548. 8000740: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
  549. 8000744: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
  550. 8000748: f04f 0000 mov.w r0, #0
  551. 800074c: bd70 pop {r4, r5, r6, pc}
  552. 800074e: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
  553. 8000752: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
  554. 8000756: bd70 pop {r4, r5, r6, pc}
  555. 08000758 <__aeabi_ddiv>:
  556. 8000758: b570 push {r4, r5, r6, lr}
  557. 800075a: f04f 0cff mov.w ip, #255 ; 0xff
  558. 800075e: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
  559. 8000762: ea1c 5411 ands.w r4, ip, r1, lsr #20
  560. 8000766: bf1d ittte ne
  561. 8000768: ea1c 5513 andsne.w r5, ip, r3, lsr #20
  562. 800076c: ea94 0f0c teqne r4, ip
  563. 8000770: ea95 0f0c teqne r5, ip
  564. 8000774: f000 f8a7 bleq 80008c6 <__aeabi_ddiv+0x16e>
  565. 8000778: eba4 0405 sub.w r4, r4, r5
  566. 800077c: ea81 0e03 eor.w lr, r1, r3
  567. 8000780: ea52 3503 orrs.w r5, r2, r3, lsl #12
  568. 8000784: ea4f 3101 mov.w r1, r1, lsl #12
  569. 8000788: f000 8088 beq.w 800089c <__aeabi_ddiv+0x144>
  570. 800078c: ea4f 3303 mov.w r3, r3, lsl #12
  571. 8000790: f04f 5580 mov.w r5, #268435456 ; 0x10000000
  572. 8000794: ea45 1313 orr.w r3, r5, r3, lsr #4
  573. 8000798: ea43 6312 orr.w r3, r3, r2, lsr #24
  574. 800079c: ea4f 2202 mov.w r2, r2, lsl #8
  575. 80007a0: ea45 1511 orr.w r5, r5, r1, lsr #4
  576. 80007a4: ea45 6510 orr.w r5, r5, r0, lsr #24
  577. 80007a8: ea4f 2600 mov.w r6, r0, lsl #8
  578. 80007ac: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
  579. 80007b0: 429d cmp r5, r3
  580. 80007b2: bf08 it eq
  581. 80007b4: 4296 cmpeq r6, r2
  582. 80007b6: f144 04fd adc.w r4, r4, #253 ; 0xfd
  583. 80007ba: f504 7440 add.w r4, r4, #768 ; 0x300
  584. 80007be: d202 bcs.n 80007c6 <__aeabi_ddiv+0x6e>
  585. 80007c0: 085b lsrs r3, r3, #1
  586. 80007c2: ea4f 0232 mov.w r2, r2, rrx
  587. 80007c6: 1ab6 subs r6, r6, r2
  588. 80007c8: eb65 0503 sbc.w r5, r5, r3
  589. 80007cc: 085b lsrs r3, r3, #1
  590. 80007ce: ea4f 0232 mov.w r2, r2, rrx
  591. 80007d2: f44f 1080 mov.w r0, #1048576 ; 0x100000
  592. 80007d6: f44f 2c00 mov.w ip, #524288 ; 0x80000
  593. 80007da: ebb6 0e02 subs.w lr, r6, r2
  594. 80007de: eb75 0e03 sbcs.w lr, r5, r3
  595. 80007e2: bf22 ittt cs
  596. 80007e4: 1ab6 subcs r6, r6, r2
  597. 80007e6: 4675 movcs r5, lr
  598. 80007e8: ea40 000c orrcs.w r0, r0, ip
  599. 80007ec: 085b lsrs r3, r3, #1
  600. 80007ee: ea4f 0232 mov.w r2, r2, rrx
  601. 80007f2: ebb6 0e02 subs.w lr, r6, r2
  602. 80007f6: eb75 0e03 sbcs.w lr, r5, r3
  603. 80007fa: bf22 ittt cs
  604. 80007fc: 1ab6 subcs r6, r6, r2
  605. 80007fe: 4675 movcs r5, lr
  606. 8000800: ea40 005c orrcs.w r0, r0, ip, lsr #1
  607. 8000804: 085b lsrs r3, r3, #1
  608. 8000806: ea4f 0232 mov.w r2, r2, rrx
  609. 800080a: ebb6 0e02 subs.w lr, r6, r2
  610. 800080e: eb75 0e03 sbcs.w lr, r5, r3
  611. 8000812: bf22 ittt cs
  612. 8000814: 1ab6 subcs r6, r6, r2
  613. 8000816: 4675 movcs r5, lr
  614. 8000818: ea40 009c orrcs.w r0, r0, ip, lsr #2
  615. 800081c: 085b lsrs r3, r3, #1
  616. 800081e: ea4f 0232 mov.w r2, r2, rrx
  617. 8000822: ebb6 0e02 subs.w lr, r6, r2
  618. 8000826: eb75 0e03 sbcs.w lr, r5, r3
  619. 800082a: bf22 ittt cs
  620. 800082c: 1ab6 subcs r6, r6, r2
  621. 800082e: 4675 movcs r5, lr
  622. 8000830: ea40 00dc orrcs.w r0, r0, ip, lsr #3
  623. 8000834: ea55 0e06 orrs.w lr, r5, r6
  624. 8000838: d018 beq.n 800086c <__aeabi_ddiv+0x114>
  625. 800083a: ea4f 1505 mov.w r5, r5, lsl #4
  626. 800083e: ea45 7516 orr.w r5, r5, r6, lsr #28
  627. 8000842: ea4f 1606 mov.w r6, r6, lsl #4
  628. 8000846: ea4f 03c3 mov.w r3, r3, lsl #3
  629. 800084a: ea43 7352 orr.w r3, r3, r2, lsr #29
  630. 800084e: ea4f 02c2 mov.w r2, r2, lsl #3
  631. 8000852: ea5f 1c1c movs.w ip, ip, lsr #4
  632. 8000856: d1c0 bne.n 80007da <__aeabi_ddiv+0x82>
  633. 8000858: f411 1f80 tst.w r1, #1048576 ; 0x100000
  634. 800085c: d10b bne.n 8000876 <__aeabi_ddiv+0x11e>
  635. 800085e: ea41 0100 orr.w r1, r1, r0
  636. 8000862: f04f 0000 mov.w r0, #0
  637. 8000866: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
  638. 800086a: e7b6 b.n 80007da <__aeabi_ddiv+0x82>
  639. 800086c: f411 1f80 tst.w r1, #1048576 ; 0x100000
  640. 8000870: bf04 itt eq
  641. 8000872: 4301 orreq r1, r0
  642. 8000874: 2000 moveq r0, #0
  643. 8000876: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
  644. 800087a: bf88 it hi
  645. 800087c: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
  646. 8000880: f63f aeaf bhi.w 80005e2 <__aeabi_dmul+0xde>
  647. 8000884: ebb5 0c03 subs.w ip, r5, r3
  648. 8000888: bf04 itt eq
  649. 800088a: ebb6 0c02 subseq.w ip, r6, r2
  650. 800088e: ea5f 0c50 movseq.w ip, r0, lsr #1
  651. 8000892: f150 0000 adcs.w r0, r0, #0
  652. 8000896: eb41 5104 adc.w r1, r1, r4, lsl #20
  653. 800089a: bd70 pop {r4, r5, r6, pc}
  654. 800089c: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
  655. 80008a0: ea4e 3111 orr.w r1, lr, r1, lsr #12
  656. 80008a4: eb14 045c adds.w r4, r4, ip, lsr #1
  657. 80008a8: bfc2 ittt gt
  658. 80008aa: ebd4 050c rsbsgt r5, r4, ip
  659. 80008ae: ea41 5104 orrgt.w r1, r1, r4, lsl #20
  660. 80008b2: bd70 popgt {r4, r5, r6, pc}
  661. 80008b4: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
  662. 80008b8: f04f 0e00 mov.w lr, #0
  663. 80008bc: 3c01 subs r4, #1
  664. 80008be: e690 b.n 80005e2 <__aeabi_dmul+0xde>
  665. 80008c0: ea45 0e06 orr.w lr, r5, r6
  666. 80008c4: e68d b.n 80005e2 <__aeabi_dmul+0xde>
  667. 80008c6: ea0c 5513 and.w r5, ip, r3, lsr #20
  668. 80008ca: ea94 0f0c teq r4, ip
  669. 80008ce: bf08 it eq
  670. 80008d0: ea95 0f0c teqeq r5, ip
  671. 80008d4: f43f af3b beq.w 800074e <__aeabi_dmul+0x24a>
  672. 80008d8: ea94 0f0c teq r4, ip
  673. 80008dc: d10a bne.n 80008f4 <__aeabi_ddiv+0x19c>
  674. 80008de: ea50 3401 orrs.w r4, r0, r1, lsl #12
  675. 80008e2: f47f af34 bne.w 800074e <__aeabi_dmul+0x24a>
  676. 80008e6: ea95 0f0c teq r5, ip
  677. 80008ea: f47f af25 bne.w 8000738 <__aeabi_dmul+0x234>
  678. 80008ee: 4610 mov r0, r2
  679. 80008f0: 4619 mov r1, r3
  680. 80008f2: e72c b.n 800074e <__aeabi_dmul+0x24a>
  681. 80008f4: ea95 0f0c teq r5, ip
  682. 80008f8: d106 bne.n 8000908 <__aeabi_ddiv+0x1b0>
  683. 80008fa: ea52 3503 orrs.w r5, r2, r3, lsl #12
  684. 80008fe: f43f aefd beq.w 80006fc <__aeabi_dmul+0x1f8>
  685. 8000902: 4610 mov r0, r2
  686. 8000904: 4619 mov r1, r3
  687. 8000906: e722 b.n 800074e <__aeabi_dmul+0x24a>
  688. 8000908: ea50 0641 orrs.w r6, r0, r1, lsl #1
  689. 800090c: bf18 it ne
  690. 800090e: ea52 0643 orrsne.w r6, r2, r3, lsl #1
  691. 8000912: f47f aec5 bne.w 80006a0 <__aeabi_dmul+0x19c>
  692. 8000916: ea50 0441 orrs.w r4, r0, r1, lsl #1
  693. 800091a: f47f af0d bne.w 8000738 <__aeabi_dmul+0x234>
  694. 800091e: ea52 0543 orrs.w r5, r2, r3, lsl #1
  695. 8000922: f47f aeeb bne.w 80006fc <__aeabi_dmul+0x1f8>
  696. 8000926: e712 b.n 800074e <__aeabi_dmul+0x24a>
  697. 08000928 <__aeabi_d2uiz>:
  698. 8000928: 004a lsls r2, r1, #1
  699. 800092a: d211 bcs.n 8000950 <__aeabi_d2uiz+0x28>
  700. 800092c: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
  701. 8000930: d211 bcs.n 8000956 <__aeabi_d2uiz+0x2e>
  702. 8000932: d50d bpl.n 8000950 <__aeabi_d2uiz+0x28>
  703. 8000934: f46f 7378 mvn.w r3, #992 ; 0x3e0
  704. 8000938: ebb3 5262 subs.w r2, r3, r2, asr #21
  705. 800093c: d40e bmi.n 800095c <__aeabi_d2uiz+0x34>
  706. 800093e: ea4f 23c1 mov.w r3, r1, lsl #11
  707. 8000942: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
  708. 8000946: ea43 5350 orr.w r3, r3, r0, lsr #21
  709. 800094a: fa23 f002 lsr.w r0, r3, r2
  710. 800094e: 4770 bx lr
  711. 8000950: f04f 0000 mov.w r0, #0
  712. 8000954: 4770 bx lr
  713. 8000956: ea50 3001 orrs.w r0, r0, r1, lsl #12
  714. 800095a: d102 bne.n 8000962 <__aeabi_d2uiz+0x3a>
  715. 800095c: f04f 30ff mov.w r0, #4294967295
  716. 8000960: 4770 bx lr
  717. 8000962: f04f 0000 mov.w r0, #0
  718. 8000966: 4770 bx lr
  719. 08000968 <__aeabi_uldivmod>:
  720. 8000968: b953 cbnz r3, 8000980 <__aeabi_uldivmod+0x18>
  721. 800096a: b94a cbnz r2, 8000980 <__aeabi_uldivmod+0x18>
  722. 800096c: 2900 cmp r1, #0
  723. 800096e: bf08 it eq
  724. 8000970: 2800 cmpeq r0, #0
  725. 8000972: bf1c itt ne
  726. 8000974: f04f 31ff movne.w r1, #4294967295
  727. 8000978: f04f 30ff movne.w r0, #4294967295
  728. 800097c: f000 b974 b.w 8000c68 <__aeabi_idiv0>
  729. 8000980: f1ad 0c08 sub.w ip, sp, #8
  730. 8000984: e96d ce04 strd ip, lr, [sp, #-16]!
  731. 8000988: f000 f806 bl 8000998 <__udivmoddi4>
  732. 800098c: f8dd e004 ldr.w lr, [sp, #4]
  733. 8000990: e9dd 2302 ldrd r2, r3, [sp, #8]
  734. 8000994: b004 add sp, #16
  735. 8000996: 4770 bx lr
  736. 08000998 <__udivmoddi4>:
  737. 8000998: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  738. 800099c: 468c mov ip, r1
  739. 800099e: 4604 mov r4, r0
  740. 80009a0: 9e08 ldr r6, [sp, #32]
  741. 80009a2: 2b00 cmp r3, #0
  742. 80009a4: d14b bne.n 8000a3e <__udivmoddi4+0xa6>
  743. 80009a6: 428a cmp r2, r1
  744. 80009a8: 4615 mov r5, r2
  745. 80009aa: d967 bls.n 8000a7c <__udivmoddi4+0xe4>
  746. 80009ac: fab2 f282 clz r2, r2
  747. 80009b0: b14a cbz r2, 80009c6 <__udivmoddi4+0x2e>
  748. 80009b2: f1c2 0720 rsb r7, r2, #32
  749. 80009b6: fa01 f302 lsl.w r3, r1, r2
  750. 80009ba: fa20 f707 lsr.w r7, r0, r7
  751. 80009be: 4095 lsls r5, r2
  752. 80009c0: ea47 0c03 orr.w ip, r7, r3
  753. 80009c4: 4094 lsls r4, r2
  754. 80009c6: ea4f 4e15 mov.w lr, r5, lsr #16
  755. 80009ca: fbbc f7fe udiv r7, ip, lr
  756. 80009ce: fa1f f885 uxth.w r8, r5
  757. 80009d2: fb0e c317 mls r3, lr, r7, ip
  758. 80009d6: fb07 f908 mul.w r9, r7, r8
  759. 80009da: 0c21 lsrs r1, r4, #16
  760. 80009dc: ea41 4303 orr.w r3, r1, r3, lsl #16
  761. 80009e0: 4599 cmp r9, r3
  762. 80009e2: d909 bls.n 80009f8 <__udivmoddi4+0x60>
  763. 80009e4: 18eb adds r3, r5, r3
  764. 80009e6: f107 31ff add.w r1, r7, #4294967295
  765. 80009ea: f080 811c bcs.w 8000c26 <__udivmoddi4+0x28e>
  766. 80009ee: 4599 cmp r9, r3
  767. 80009f0: f240 8119 bls.w 8000c26 <__udivmoddi4+0x28e>
  768. 80009f4: 3f02 subs r7, #2
  769. 80009f6: 442b add r3, r5
  770. 80009f8: eba3 0309 sub.w r3, r3, r9
  771. 80009fc: fbb3 f0fe udiv r0, r3, lr
  772. 8000a00: fb0e 3310 mls r3, lr, r0, r3
  773. 8000a04: fb00 f108 mul.w r1, r0, r8
  774. 8000a08: b2a4 uxth r4, r4
  775. 8000a0a: ea44 4403 orr.w r4, r4, r3, lsl #16
  776. 8000a0e: 42a1 cmp r1, r4
  777. 8000a10: d909 bls.n 8000a26 <__udivmoddi4+0x8e>
  778. 8000a12: 192c adds r4, r5, r4
  779. 8000a14: f100 33ff add.w r3, r0, #4294967295
  780. 8000a18: f080 8107 bcs.w 8000c2a <__udivmoddi4+0x292>
  781. 8000a1c: 42a1 cmp r1, r4
  782. 8000a1e: f240 8104 bls.w 8000c2a <__udivmoddi4+0x292>
  783. 8000a22: 3802 subs r0, #2
  784. 8000a24: 442c add r4, r5
  785. 8000a26: ea40 4007 orr.w r0, r0, r7, lsl #16
  786. 8000a2a: 2700 movs r7, #0
  787. 8000a2c: 1a64 subs r4, r4, r1
  788. 8000a2e: b11e cbz r6, 8000a38 <__udivmoddi4+0xa0>
  789. 8000a30: 2300 movs r3, #0
  790. 8000a32: 40d4 lsrs r4, r2
  791. 8000a34: e9c6 4300 strd r4, r3, [r6]
  792. 8000a38: 4639 mov r1, r7
  793. 8000a3a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  794. 8000a3e: 428b cmp r3, r1
  795. 8000a40: d909 bls.n 8000a56 <__udivmoddi4+0xbe>
  796. 8000a42: 2e00 cmp r6, #0
  797. 8000a44: f000 80ec beq.w 8000c20 <__udivmoddi4+0x288>
  798. 8000a48: 2700 movs r7, #0
  799. 8000a4a: e9c6 0100 strd r0, r1, [r6]
  800. 8000a4e: 4638 mov r0, r7
  801. 8000a50: 4639 mov r1, r7
  802. 8000a52: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  803. 8000a56: fab3 f783 clz r7, r3
  804. 8000a5a: 2f00 cmp r7, #0
  805. 8000a5c: d148 bne.n 8000af0 <__udivmoddi4+0x158>
  806. 8000a5e: 428b cmp r3, r1
  807. 8000a60: d302 bcc.n 8000a68 <__udivmoddi4+0xd0>
  808. 8000a62: 4282 cmp r2, r0
  809. 8000a64: f200 80fb bhi.w 8000c5e <__udivmoddi4+0x2c6>
  810. 8000a68: 1a84 subs r4, r0, r2
  811. 8000a6a: eb61 0303 sbc.w r3, r1, r3
  812. 8000a6e: 2001 movs r0, #1
  813. 8000a70: 469c mov ip, r3
  814. 8000a72: 2e00 cmp r6, #0
  815. 8000a74: d0e0 beq.n 8000a38 <__udivmoddi4+0xa0>
  816. 8000a76: e9c6 4c00 strd r4, ip, [r6]
  817. 8000a7a: e7dd b.n 8000a38 <__udivmoddi4+0xa0>
  818. 8000a7c: b902 cbnz r2, 8000a80 <__udivmoddi4+0xe8>
  819. 8000a7e: deff udf #255 ; 0xff
  820. 8000a80: fab2 f282 clz r2, r2
  821. 8000a84: 2a00 cmp r2, #0
  822. 8000a86: f040 808f bne.w 8000ba8 <__udivmoddi4+0x210>
  823. 8000a8a: 2701 movs r7, #1
  824. 8000a8c: 1b49 subs r1, r1, r5
  825. 8000a8e: ea4f 4815 mov.w r8, r5, lsr #16
  826. 8000a92: fa1f f985 uxth.w r9, r5
  827. 8000a96: fbb1 fef8 udiv lr, r1, r8
  828. 8000a9a: fb08 111e mls r1, r8, lr, r1
  829. 8000a9e: fb09 f00e mul.w r0, r9, lr
  830. 8000aa2: ea4f 4c14 mov.w ip, r4, lsr #16
  831. 8000aa6: ea4c 4301 orr.w r3, ip, r1, lsl #16
  832. 8000aaa: 4298 cmp r0, r3
  833. 8000aac: d907 bls.n 8000abe <__udivmoddi4+0x126>
  834. 8000aae: 18eb adds r3, r5, r3
  835. 8000ab0: f10e 31ff add.w r1, lr, #4294967295
  836. 8000ab4: d202 bcs.n 8000abc <__udivmoddi4+0x124>
  837. 8000ab6: 4298 cmp r0, r3
  838. 8000ab8: f200 80cd bhi.w 8000c56 <__udivmoddi4+0x2be>
  839. 8000abc: 468e mov lr, r1
  840. 8000abe: 1a1b subs r3, r3, r0
  841. 8000ac0: fbb3 f0f8 udiv r0, r3, r8
  842. 8000ac4: fb08 3310 mls r3, r8, r0, r3
  843. 8000ac8: fb09 f900 mul.w r9, r9, r0
  844. 8000acc: b2a4 uxth r4, r4
  845. 8000ace: ea44 4403 orr.w r4, r4, r3, lsl #16
  846. 8000ad2: 45a1 cmp r9, r4
  847. 8000ad4: d907 bls.n 8000ae6 <__udivmoddi4+0x14e>
  848. 8000ad6: 192c adds r4, r5, r4
  849. 8000ad8: f100 33ff add.w r3, r0, #4294967295
  850. 8000adc: d202 bcs.n 8000ae4 <__udivmoddi4+0x14c>
  851. 8000ade: 45a1 cmp r9, r4
  852. 8000ae0: f200 80b6 bhi.w 8000c50 <__udivmoddi4+0x2b8>
  853. 8000ae4: 4618 mov r0, r3
  854. 8000ae6: eba4 0409 sub.w r4, r4, r9
  855. 8000aea: ea40 400e orr.w r0, r0, lr, lsl #16
  856. 8000aee: e79e b.n 8000a2e <__udivmoddi4+0x96>
  857. 8000af0: f1c7 0520 rsb r5, r7, #32
  858. 8000af4: 40bb lsls r3, r7
  859. 8000af6: fa22 fc05 lsr.w ip, r2, r5
  860. 8000afa: ea4c 0c03 orr.w ip, ip, r3
  861. 8000afe: fa21 f405 lsr.w r4, r1, r5
  862. 8000b02: ea4f 4e1c mov.w lr, ip, lsr #16
  863. 8000b06: fbb4 f9fe udiv r9, r4, lr
  864. 8000b0a: fa1f f88c uxth.w r8, ip
  865. 8000b0e: fb0e 4419 mls r4, lr, r9, r4
  866. 8000b12: fa20 f305 lsr.w r3, r0, r5
  867. 8000b16: 40b9 lsls r1, r7
  868. 8000b18: fb09 fa08 mul.w sl, r9, r8
  869. 8000b1c: 4319 orrs r1, r3
  870. 8000b1e: 0c0b lsrs r3, r1, #16
  871. 8000b20: ea43 4404 orr.w r4, r3, r4, lsl #16
  872. 8000b24: 45a2 cmp sl, r4
  873. 8000b26: fa02 f207 lsl.w r2, r2, r7
  874. 8000b2a: fa00 f307 lsl.w r3, r0, r7
  875. 8000b2e: d90b bls.n 8000b48 <__udivmoddi4+0x1b0>
  876. 8000b30: eb1c 0404 adds.w r4, ip, r4
  877. 8000b34: f109 30ff add.w r0, r9, #4294967295
  878. 8000b38: f080 8088 bcs.w 8000c4c <__udivmoddi4+0x2b4>
  879. 8000b3c: 45a2 cmp sl, r4
  880. 8000b3e: f240 8085 bls.w 8000c4c <__udivmoddi4+0x2b4>
  881. 8000b42: f1a9 0902 sub.w r9, r9, #2
  882. 8000b46: 4464 add r4, ip
  883. 8000b48: eba4 040a sub.w r4, r4, sl
  884. 8000b4c: fbb4 f0fe udiv r0, r4, lr
  885. 8000b50: fb0e 4410 mls r4, lr, r0, r4
  886. 8000b54: fb00 fa08 mul.w sl, r0, r8
  887. 8000b58: b289 uxth r1, r1
  888. 8000b5a: ea41 4404 orr.w r4, r1, r4, lsl #16
  889. 8000b5e: 45a2 cmp sl, r4
  890. 8000b60: d908 bls.n 8000b74 <__udivmoddi4+0x1dc>
  891. 8000b62: eb1c 0404 adds.w r4, ip, r4
  892. 8000b66: f100 31ff add.w r1, r0, #4294967295
  893. 8000b6a: d26b bcs.n 8000c44 <__udivmoddi4+0x2ac>
  894. 8000b6c: 45a2 cmp sl, r4
  895. 8000b6e: d969 bls.n 8000c44 <__udivmoddi4+0x2ac>
  896. 8000b70: 3802 subs r0, #2
  897. 8000b72: 4464 add r4, ip
  898. 8000b74: ea40 4009 orr.w r0, r0, r9, lsl #16
  899. 8000b78: fba0 8902 umull r8, r9, r0, r2
  900. 8000b7c: eba4 040a sub.w r4, r4, sl
  901. 8000b80: 454c cmp r4, r9
  902. 8000b82: 4641 mov r1, r8
  903. 8000b84: 46ce mov lr, r9
  904. 8000b86: d354 bcc.n 8000c32 <__udivmoddi4+0x29a>
  905. 8000b88: d051 beq.n 8000c2e <__udivmoddi4+0x296>
  906. 8000b8a: 2e00 cmp r6, #0
  907. 8000b8c: d069 beq.n 8000c62 <__udivmoddi4+0x2ca>
  908. 8000b8e: 1a5a subs r2, r3, r1
  909. 8000b90: eb64 040e sbc.w r4, r4, lr
  910. 8000b94: fa04 f505 lsl.w r5, r4, r5
  911. 8000b98: fa22 f307 lsr.w r3, r2, r7
  912. 8000b9c: 40fc lsrs r4, r7
  913. 8000b9e: 431d orrs r5, r3
  914. 8000ba0: e9c6 5400 strd r5, r4, [r6]
  915. 8000ba4: 2700 movs r7, #0
  916. 8000ba6: e747 b.n 8000a38 <__udivmoddi4+0xa0>
  917. 8000ba8: 4095 lsls r5, r2
  918. 8000baa: f1c2 0320 rsb r3, r2, #32
  919. 8000bae: fa21 f003 lsr.w r0, r1, r3
  920. 8000bb2: ea4f 4815 mov.w r8, r5, lsr #16
  921. 8000bb6: fbb0 f7f8 udiv r7, r0, r8
  922. 8000bba: fa1f f985 uxth.w r9, r5
  923. 8000bbe: fb08 0017 mls r0, r8, r7, r0
  924. 8000bc2: fa24 f303 lsr.w r3, r4, r3
  925. 8000bc6: 4091 lsls r1, r2
  926. 8000bc8: fb07 fc09 mul.w ip, r7, r9
  927. 8000bcc: 430b orrs r3, r1
  928. 8000bce: 0c19 lsrs r1, r3, #16
  929. 8000bd0: ea41 4100 orr.w r1, r1, r0, lsl #16
  930. 8000bd4: 458c cmp ip, r1
  931. 8000bd6: fa04 f402 lsl.w r4, r4, r2
  932. 8000bda: d907 bls.n 8000bec <__udivmoddi4+0x254>
  933. 8000bdc: 1869 adds r1, r5, r1
  934. 8000bde: f107 30ff add.w r0, r7, #4294967295
  935. 8000be2: d231 bcs.n 8000c48 <__udivmoddi4+0x2b0>
  936. 8000be4: 458c cmp ip, r1
  937. 8000be6: d92f bls.n 8000c48 <__udivmoddi4+0x2b0>
  938. 8000be8: 3f02 subs r7, #2
  939. 8000bea: 4429 add r1, r5
  940. 8000bec: eba1 010c sub.w r1, r1, ip
  941. 8000bf0: fbb1 f0f8 udiv r0, r1, r8
  942. 8000bf4: fb08 1c10 mls ip, r8, r0, r1
  943. 8000bf8: fb00 fe09 mul.w lr, r0, r9
  944. 8000bfc: b299 uxth r1, r3
  945. 8000bfe: ea41 410c orr.w r1, r1, ip, lsl #16
  946. 8000c02: 458e cmp lr, r1
  947. 8000c04: d907 bls.n 8000c16 <__udivmoddi4+0x27e>
  948. 8000c06: 1869 adds r1, r5, r1
  949. 8000c08: f100 33ff add.w r3, r0, #4294967295
  950. 8000c0c: d218 bcs.n 8000c40 <__udivmoddi4+0x2a8>
  951. 8000c0e: 458e cmp lr, r1
  952. 8000c10: d916 bls.n 8000c40 <__udivmoddi4+0x2a8>
  953. 8000c12: 3802 subs r0, #2
  954. 8000c14: 4429 add r1, r5
  955. 8000c16: eba1 010e sub.w r1, r1, lr
  956. 8000c1a: ea40 4707 orr.w r7, r0, r7, lsl #16
  957. 8000c1e: e73a b.n 8000a96 <__udivmoddi4+0xfe>
  958. 8000c20: 4637 mov r7, r6
  959. 8000c22: 4630 mov r0, r6
  960. 8000c24: e708 b.n 8000a38 <__udivmoddi4+0xa0>
  961. 8000c26: 460f mov r7, r1
  962. 8000c28: e6e6 b.n 80009f8 <__udivmoddi4+0x60>
  963. 8000c2a: 4618 mov r0, r3
  964. 8000c2c: e6fb b.n 8000a26 <__udivmoddi4+0x8e>
  965. 8000c2e: 4543 cmp r3, r8
  966. 8000c30: d2ab bcs.n 8000b8a <__udivmoddi4+0x1f2>
  967. 8000c32: ebb8 0102 subs.w r1, r8, r2
  968. 8000c36: eb69 020c sbc.w r2, r9, ip
  969. 8000c3a: 3801 subs r0, #1
  970. 8000c3c: 4696 mov lr, r2
  971. 8000c3e: e7a4 b.n 8000b8a <__udivmoddi4+0x1f2>
  972. 8000c40: 4618 mov r0, r3
  973. 8000c42: e7e8 b.n 8000c16 <__udivmoddi4+0x27e>
  974. 8000c44: 4608 mov r0, r1
  975. 8000c46: e795 b.n 8000b74 <__udivmoddi4+0x1dc>
  976. 8000c48: 4607 mov r7, r0
  977. 8000c4a: e7cf b.n 8000bec <__udivmoddi4+0x254>
  978. 8000c4c: 4681 mov r9, r0
  979. 8000c4e: e77b b.n 8000b48 <__udivmoddi4+0x1b0>
  980. 8000c50: 3802 subs r0, #2
  981. 8000c52: 442c add r4, r5
  982. 8000c54: e747 b.n 8000ae6 <__udivmoddi4+0x14e>
  983. 8000c56: f1ae 0e02 sub.w lr, lr, #2
  984. 8000c5a: 442b add r3, r5
  985. 8000c5c: e72f b.n 8000abe <__udivmoddi4+0x126>
  986. 8000c5e: 4638 mov r0, r7
  987. 8000c60: e707 b.n 8000a72 <__udivmoddi4+0xda>
  988. 8000c62: 4637 mov r7, r6
  989. 8000c64: e6e8 b.n 8000a38 <__udivmoddi4+0xa0>
  990. 8000c66: bf00 nop
  991. 08000c68 <__aeabi_idiv0>:
  992. 8000c68: 4770 bx lr
  993. 8000c6a: bf00 nop
  994. 08000c6c <SELECT>:
  995. * SPI functions
  996. **************************************/
  997. /* slave select */
  998. static void SELECT(void)
  999. {
  1000. 8000c6c: b580 push {r7, lr}
  1001. 8000c6e: af00 add r7, sp, #0
  1002. HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_RESET);
  1003. 8000c70: 2200 movs r2, #0
  1004. 8000c72: 2140 movs r1, #64 ; 0x40
  1005. 8000c74: 4803 ldr r0, [pc, #12] ; (8000c84 <SELECT+0x18>)
  1006. 8000c76: f001 fb9f bl 80023b8 <HAL_GPIO_WritePin>
  1007. HAL_Delay(1);
  1008. 8000c7a: 2001 movs r0, #1
  1009. 8000c7c: f001 f8fc bl 8001e78 <HAL_Delay>
  1010. }
  1011. 8000c80: bf00 nop
  1012. 8000c82: bd80 pop {r7, pc}
  1013. 8000c84: 40020400 .word 0x40020400
  1014. 08000c88 <DESELECT>:
  1015. /* slave deselect */
  1016. static void DESELECT(void)
  1017. {
  1018. 8000c88: b580 push {r7, lr}
  1019. 8000c8a: af00 add r7, sp, #0
  1020. HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_SET);
  1021. 8000c8c: 2201 movs r2, #1
  1022. 8000c8e: 2140 movs r1, #64 ; 0x40
  1023. 8000c90: 4803 ldr r0, [pc, #12] ; (8000ca0 <DESELECT+0x18>)
  1024. 8000c92: f001 fb91 bl 80023b8 <HAL_GPIO_WritePin>
  1025. HAL_Delay(1);
  1026. 8000c96: 2001 movs r0, #1
  1027. 8000c98: f001 f8ee bl 8001e78 <HAL_Delay>
  1028. }
  1029. 8000c9c: bf00 nop
  1030. 8000c9e: bd80 pop {r7, pc}
  1031. 8000ca0: 40020400 .word 0x40020400
  1032. 08000ca4 <SPI_TxByte>:
  1033. /* SPI transmit a byte */
  1034. static void SPI_TxByte(uint8_t data)
  1035. {
  1036. 8000ca4: b580 push {r7, lr}
  1037. 8000ca6: b082 sub sp, #8
  1038. 8000ca8: af00 add r7, sp, #0
  1039. 8000caa: 4603 mov r3, r0
  1040. 8000cac: 71fb strb r3, [r7, #7]
  1041. while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
  1042. 8000cae: bf00 nop
  1043. 8000cb0: 4b08 ldr r3, [pc, #32] ; (8000cd4 <SPI_TxByte+0x30>)
  1044. 8000cb2: 681b ldr r3, [r3, #0]
  1045. 8000cb4: 689b ldr r3, [r3, #8]
  1046. 8000cb6: f003 0302 and.w r3, r3, #2
  1047. 8000cba: 2b02 cmp r3, #2
  1048. 8000cbc: d1f8 bne.n 8000cb0 <SPI_TxByte+0xc>
  1049. HAL_SPI_Transmit(HSPI_SDCARD, &data, 1, SPI_TIMEOUT);
  1050. 8000cbe: 1df9 adds r1, r7, #7
  1051. 8000cc0: 2364 movs r3, #100 ; 0x64
  1052. 8000cc2: 2201 movs r2, #1
  1053. 8000cc4: 4803 ldr r0, [pc, #12] ; (8000cd4 <SPI_TxByte+0x30>)
  1054. 8000cc6: f002 f9d8 bl 800307a <HAL_SPI_Transmit>
  1055. }
  1056. 8000cca: bf00 nop
  1057. 8000ccc: 3708 adds r7, #8
  1058. 8000cce: 46bd mov sp, r7
  1059. 8000cd0: bd80 pop {r7, pc}
  1060. 8000cd2: bf00 nop
  1061. 8000cd4: 20001398 .word 0x20001398
  1062. 08000cd8 <SPI_TxBuffer>:
  1063. /* SPI transmit buffer */
  1064. static void SPI_TxBuffer(uint8_t *buffer, uint16_t len)
  1065. {
  1066. 8000cd8: b580 push {r7, lr}
  1067. 8000cda: b082 sub sp, #8
  1068. 8000cdc: af00 add r7, sp, #0
  1069. 8000cde: 6078 str r0, [r7, #4]
  1070. 8000ce0: 460b mov r3, r1
  1071. 8000ce2: 807b strh r3, [r7, #2]
  1072. while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
  1073. 8000ce4: bf00 nop
  1074. 8000ce6: 4b08 ldr r3, [pc, #32] ; (8000d08 <SPI_TxBuffer+0x30>)
  1075. 8000ce8: 681b ldr r3, [r3, #0]
  1076. 8000cea: 689b ldr r3, [r3, #8]
  1077. 8000cec: f003 0302 and.w r3, r3, #2
  1078. 8000cf0: 2b02 cmp r3, #2
  1079. 8000cf2: d1f8 bne.n 8000ce6 <SPI_TxBuffer+0xe>
  1080. HAL_SPI_Transmit(HSPI_SDCARD, buffer, len, SPI_TIMEOUT);
  1081. 8000cf4: 887a ldrh r2, [r7, #2]
  1082. 8000cf6: 2364 movs r3, #100 ; 0x64
  1083. 8000cf8: 6879 ldr r1, [r7, #4]
  1084. 8000cfa: 4803 ldr r0, [pc, #12] ; (8000d08 <SPI_TxBuffer+0x30>)
  1085. 8000cfc: f002 f9bd bl 800307a <HAL_SPI_Transmit>
  1086. }
  1087. 8000d00: bf00 nop
  1088. 8000d02: 3708 adds r7, #8
  1089. 8000d04: 46bd mov sp, r7
  1090. 8000d06: bd80 pop {r7, pc}
  1091. 8000d08: 20001398 .word 0x20001398
  1092. 08000d0c <SPI_RxByte>:
  1093. /* SPI receive a byte */
  1094. static uint8_t SPI_RxByte(void)
  1095. {
  1096. 8000d0c: b580 push {r7, lr}
  1097. 8000d0e: b084 sub sp, #16
  1098. 8000d10: af02 add r7, sp, #8
  1099. uint8_t dummy, data;
  1100. dummy = 0xFF;
  1101. 8000d12: 23ff movs r3, #255 ; 0xff
  1102. 8000d14: 71fb strb r3, [r7, #7]
  1103. while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
  1104. 8000d16: bf00 nop
  1105. 8000d18: 4b09 ldr r3, [pc, #36] ; (8000d40 <SPI_RxByte+0x34>)
  1106. 8000d1a: 681b ldr r3, [r3, #0]
  1107. 8000d1c: 689b ldr r3, [r3, #8]
  1108. 8000d1e: f003 0302 and.w r3, r3, #2
  1109. 8000d22: 2b02 cmp r3, #2
  1110. 8000d24: d1f8 bne.n 8000d18 <SPI_RxByte+0xc>
  1111. HAL_SPI_TransmitReceive(HSPI_SDCARD, &dummy, &data, 1, SPI_TIMEOUT);
  1112. 8000d26: 1dba adds r2, r7, #6
  1113. 8000d28: 1df9 adds r1, r7, #7
  1114. 8000d2a: 2364 movs r3, #100 ; 0x64
  1115. 8000d2c: 9300 str r3, [sp, #0]
  1116. 8000d2e: 2301 movs r3, #1
  1117. 8000d30: 4803 ldr r0, [pc, #12] ; (8000d40 <SPI_RxByte+0x34>)
  1118. 8000d32: f002 fade bl 80032f2 <HAL_SPI_TransmitReceive>
  1119. return data;
  1120. 8000d36: 79bb ldrb r3, [r7, #6]
  1121. }
  1122. 8000d38: 4618 mov r0, r3
  1123. 8000d3a: 3708 adds r7, #8
  1124. 8000d3c: 46bd mov sp, r7
  1125. 8000d3e: bd80 pop {r7, pc}
  1126. 8000d40: 20001398 .word 0x20001398
  1127. 08000d44 <SPI_RxBytePtr>:
  1128. /* SPI receive a byte via pointer */
  1129. static void SPI_RxBytePtr(uint8_t *buff)
  1130. {
  1131. 8000d44: b580 push {r7, lr}
  1132. 8000d46: b082 sub sp, #8
  1133. 8000d48: af00 add r7, sp, #0
  1134. 8000d4a: 6078 str r0, [r7, #4]
  1135. *buff = SPI_RxByte();
  1136. 8000d4c: f7ff ffde bl 8000d0c <SPI_RxByte>
  1137. 8000d50: 4603 mov r3, r0
  1138. 8000d52: 461a mov r2, r3
  1139. 8000d54: 687b ldr r3, [r7, #4]
  1140. 8000d56: 701a strb r2, [r3, #0]
  1141. }
  1142. 8000d58: bf00 nop
  1143. 8000d5a: 3708 adds r7, #8
  1144. 8000d5c: 46bd mov sp, r7
  1145. 8000d5e: bd80 pop {r7, pc}
  1146. 08000d60 <SD_ReadyWait>:
  1147. * SD functions
  1148. **************************************/
  1149. /* wait SD ready */
  1150. static uint8_t SD_ReadyWait(void)
  1151. {
  1152. 8000d60: b580 push {r7, lr}
  1153. 8000d62: b082 sub sp, #8
  1154. 8000d64: af00 add r7, sp, #0
  1155. uint8_t res;
  1156. /* timeout 500ms */
  1157. Timer2 = 500;
  1158. 8000d66: 4b0a ldr r3, [pc, #40] ; (8000d90 <SD_ReadyWait+0x30>)
  1159. 8000d68: f44f 72fa mov.w r2, #500 ; 0x1f4
  1160. 8000d6c: 801a strh r2, [r3, #0]
  1161. /* if SD goes ready, receives 0xFF */
  1162. do {
  1163. res = SPI_RxByte();
  1164. 8000d6e: f7ff ffcd bl 8000d0c <SPI_RxByte>
  1165. 8000d72: 4603 mov r3, r0
  1166. 8000d74: 71fb strb r3, [r7, #7]
  1167. } while ((res != 0xFF) && Timer2);
  1168. 8000d76: 79fb ldrb r3, [r7, #7]
  1169. 8000d78: 2bff cmp r3, #255 ; 0xff
  1170. 8000d7a: d003 beq.n 8000d84 <SD_ReadyWait+0x24>
  1171. 8000d7c: 4b04 ldr r3, [pc, #16] ; (8000d90 <SD_ReadyWait+0x30>)
  1172. 8000d7e: 881b ldrh r3, [r3, #0]
  1173. 8000d80: 2b00 cmp r3, #0
  1174. 8000d82: d1f4 bne.n 8000d6e <SD_ReadyWait+0xe>
  1175. return res;
  1176. 8000d84: 79fb ldrb r3, [r7, #7]
  1177. }
  1178. 8000d86: 4618 mov r0, r3
  1179. 8000d88: 3708 adds r7, #8
  1180. 8000d8a: 46bd mov sp, r7
  1181. 8000d8c: bd80 pop {r7, pc}
  1182. 8000d8e: bf00 nop
  1183. 8000d90: 200002e8 .word 0x200002e8
  1184. 08000d94 <SD_PowerOn>:
  1185. /* power on */
  1186. static void SD_PowerOn(void)
  1187. {
  1188. 8000d94: b580 push {r7, lr}
  1189. 8000d96: b084 sub sp, #16
  1190. 8000d98: af00 add r7, sp, #0
  1191. uint8_t args[6];
  1192. uint32_t cnt = 0x1FFF;
  1193. 8000d9a: f641 73ff movw r3, #8191 ; 0x1fff
  1194. 8000d9e: 60fb str r3, [r7, #12]
  1195. /* transmit bytes to wake up */
  1196. DESELECT();
  1197. 8000da0: f7ff ff72 bl 8000c88 <DESELECT>
  1198. for(int i = 0; i < 10; i++)
  1199. 8000da4: 2300 movs r3, #0
  1200. 8000da6: 60bb str r3, [r7, #8]
  1201. 8000da8: e005 b.n 8000db6 <SD_PowerOn+0x22>
  1202. {
  1203. SPI_TxByte(0xFF);
  1204. 8000daa: 20ff movs r0, #255 ; 0xff
  1205. 8000dac: f7ff ff7a bl 8000ca4 <SPI_TxByte>
  1206. for(int i = 0; i < 10; i++)
  1207. 8000db0: 68bb ldr r3, [r7, #8]
  1208. 8000db2: 3301 adds r3, #1
  1209. 8000db4: 60bb str r3, [r7, #8]
  1210. 8000db6: 68bb ldr r3, [r7, #8]
  1211. 8000db8: 2b09 cmp r3, #9
  1212. 8000dba: ddf6 ble.n 8000daa <SD_PowerOn+0x16>
  1213. }
  1214. /* slave select */
  1215. SELECT();
  1216. 8000dbc: f7ff ff56 bl 8000c6c <SELECT>
  1217. /* make idle state */
  1218. args[0] = CMD0; /* CMD0:GO_IDLE_STATE */
  1219. 8000dc0: 2340 movs r3, #64 ; 0x40
  1220. 8000dc2: 703b strb r3, [r7, #0]
  1221. args[1] = 0;
  1222. 8000dc4: 2300 movs r3, #0
  1223. 8000dc6: 707b strb r3, [r7, #1]
  1224. args[2] = 0;
  1225. 8000dc8: 2300 movs r3, #0
  1226. 8000dca: 70bb strb r3, [r7, #2]
  1227. args[3] = 0;
  1228. 8000dcc: 2300 movs r3, #0
  1229. 8000dce: 70fb strb r3, [r7, #3]
  1230. args[4] = 0;
  1231. 8000dd0: 2300 movs r3, #0
  1232. 8000dd2: 713b strb r3, [r7, #4]
  1233. args[5] = 0x95; /* CRC */
  1234. 8000dd4: 2395 movs r3, #149 ; 0x95
  1235. 8000dd6: 717b strb r3, [r7, #5]
  1236. SPI_TxBuffer(args, sizeof(args));
  1237. 8000dd8: 463b mov r3, r7
  1238. 8000dda: 2106 movs r1, #6
  1239. 8000ddc: 4618 mov r0, r3
  1240. 8000dde: f7ff ff7b bl 8000cd8 <SPI_TxBuffer>
  1241. /* wait response */
  1242. while ((SPI_RxByte() != 0x01) && cnt)
  1243. 8000de2: e002 b.n 8000dea <SD_PowerOn+0x56>
  1244. {
  1245. cnt--;
  1246. 8000de4: 68fb ldr r3, [r7, #12]
  1247. 8000de6: 3b01 subs r3, #1
  1248. 8000de8: 60fb str r3, [r7, #12]
  1249. while ((SPI_RxByte() != 0x01) && cnt)
  1250. 8000dea: f7ff ff8f bl 8000d0c <SPI_RxByte>
  1251. 8000dee: 4603 mov r3, r0
  1252. 8000df0: 2b01 cmp r3, #1
  1253. 8000df2: d002 beq.n 8000dfa <SD_PowerOn+0x66>
  1254. 8000df4: 68fb ldr r3, [r7, #12]
  1255. 8000df6: 2b00 cmp r3, #0
  1256. 8000df8: d1f4 bne.n 8000de4 <SD_PowerOn+0x50>
  1257. }
  1258. DESELECT();
  1259. 8000dfa: f7ff ff45 bl 8000c88 <DESELECT>
  1260. SPI_TxByte(0XFF);
  1261. 8000dfe: 20ff movs r0, #255 ; 0xff
  1262. 8000e00: f7ff ff50 bl 8000ca4 <SPI_TxByte>
  1263. PowerFlag = 1;
  1264. 8000e04: 4b03 ldr r3, [pc, #12] ; (8000e14 <SD_PowerOn+0x80>)
  1265. 8000e06: 2201 movs r2, #1
  1266. 8000e08: 701a strb r2, [r3, #0]
  1267. }
  1268. 8000e0a: bf00 nop
  1269. 8000e0c: 3710 adds r7, #16
  1270. 8000e0e: 46bd mov sp, r7
  1271. 8000e10: bd80 pop {r7, pc}
  1272. 8000e12: bf00 nop
  1273. 8000e14: 200000a5 .word 0x200000a5
  1274. 08000e18 <SD_PowerOff>:
  1275. /* power off */
  1276. static void SD_PowerOff(void)
  1277. {
  1278. 8000e18: b480 push {r7}
  1279. 8000e1a: af00 add r7, sp, #0
  1280. PowerFlag = 0;
  1281. 8000e1c: 4b03 ldr r3, [pc, #12] ; (8000e2c <SD_PowerOff+0x14>)
  1282. 8000e1e: 2200 movs r2, #0
  1283. 8000e20: 701a strb r2, [r3, #0]
  1284. }
  1285. 8000e22: bf00 nop
  1286. 8000e24: 46bd mov sp, r7
  1287. 8000e26: bc80 pop {r7}
  1288. 8000e28: 4770 bx lr
  1289. 8000e2a: bf00 nop
  1290. 8000e2c: 200000a5 .word 0x200000a5
  1291. 08000e30 <SD_CheckPower>:
  1292. /* check power flag */
  1293. static uint8_t SD_CheckPower(void)
  1294. {
  1295. 8000e30: b480 push {r7}
  1296. 8000e32: af00 add r7, sp, #0
  1297. return PowerFlag;
  1298. 8000e34: 4b02 ldr r3, [pc, #8] ; (8000e40 <SD_CheckPower+0x10>)
  1299. 8000e36: 781b ldrb r3, [r3, #0]
  1300. }
  1301. 8000e38: 4618 mov r0, r3
  1302. 8000e3a: 46bd mov sp, r7
  1303. 8000e3c: bc80 pop {r7}
  1304. 8000e3e: 4770 bx lr
  1305. 8000e40: 200000a5 .word 0x200000a5
  1306. 08000e44 <SD_RxDataBlock>:
  1307. /* receive data block */
  1308. static bool SD_RxDataBlock(BYTE *buff, UINT len)
  1309. {
  1310. 8000e44: b580 push {r7, lr}
  1311. 8000e46: b084 sub sp, #16
  1312. 8000e48: af00 add r7, sp, #0
  1313. 8000e4a: 6078 str r0, [r7, #4]
  1314. 8000e4c: 6039 str r1, [r7, #0]
  1315. uint8_t token;
  1316. /* timeout 200ms */
  1317. Timer1 = 200;
  1318. 8000e4e: 4b13 ldr r3, [pc, #76] ; (8000e9c <SD_RxDataBlock+0x58>)
  1319. 8000e50: 22c8 movs r2, #200 ; 0xc8
  1320. 8000e52: 801a strh r2, [r3, #0]
  1321. /* loop until receive a response or timeout */
  1322. do {
  1323. token = SPI_RxByte();
  1324. 8000e54: f7ff ff5a bl 8000d0c <SPI_RxByte>
  1325. 8000e58: 4603 mov r3, r0
  1326. 8000e5a: 73fb strb r3, [r7, #15]
  1327. } while((token == 0xFF) && Timer1);
  1328. 8000e5c: 7bfb ldrb r3, [r7, #15]
  1329. 8000e5e: 2bff cmp r3, #255 ; 0xff
  1330. 8000e60: d103 bne.n 8000e6a <SD_RxDataBlock+0x26>
  1331. 8000e62: 4b0e ldr r3, [pc, #56] ; (8000e9c <SD_RxDataBlock+0x58>)
  1332. 8000e64: 881b ldrh r3, [r3, #0]
  1333. 8000e66: 2b00 cmp r3, #0
  1334. 8000e68: d1f4 bne.n 8000e54 <SD_RxDataBlock+0x10>
  1335. /* invalid response */
  1336. if(token != 0xFE) return FALSE;
  1337. 8000e6a: 7bfb ldrb r3, [r7, #15]
  1338. 8000e6c: 2bfe cmp r3, #254 ; 0xfe
  1339. 8000e6e: d001 beq.n 8000e74 <SD_RxDataBlock+0x30>
  1340. 8000e70: 2300 movs r3, #0
  1341. 8000e72: e00f b.n 8000e94 <SD_RxDataBlock+0x50>
  1342. /* receive data */
  1343. do {
  1344. SPI_RxBytePtr(buff++);
  1345. 8000e74: 687b ldr r3, [r7, #4]
  1346. 8000e76: 1c5a adds r2, r3, #1
  1347. 8000e78: 607a str r2, [r7, #4]
  1348. 8000e7a: 4618 mov r0, r3
  1349. 8000e7c: f7ff ff62 bl 8000d44 <SPI_RxBytePtr>
  1350. } while(len--);
  1351. 8000e80: 683b ldr r3, [r7, #0]
  1352. 8000e82: 1e5a subs r2, r3, #1
  1353. 8000e84: 603a str r2, [r7, #0]
  1354. 8000e86: 2b00 cmp r3, #0
  1355. 8000e88: d1f4 bne.n 8000e74 <SD_RxDataBlock+0x30>
  1356. /* discard CRC */
  1357. SPI_RxByte();
  1358. 8000e8a: f7ff ff3f bl 8000d0c <SPI_RxByte>
  1359. SPI_RxByte();
  1360. 8000e8e: f7ff ff3d bl 8000d0c <SPI_RxByte>
  1361. return TRUE;
  1362. 8000e92: 2301 movs r3, #1
  1363. }
  1364. 8000e94: 4618 mov r0, r3
  1365. 8000e96: 3710 adds r7, #16
  1366. 8000e98: 46bd mov sp, r7
  1367. 8000e9a: bd80 pop {r7, pc}
  1368. 8000e9c: 200002ea .word 0x200002ea
  1369. 08000ea0 <SD_TxDataBlock>:
  1370. /* transmit data block */
  1371. #if _USE_WRITE == 1
  1372. static bool SD_TxDataBlock(const uint8_t *buff, BYTE token)
  1373. {
  1374. 8000ea0: b580 push {r7, lr}
  1375. 8000ea2: b084 sub sp, #16
  1376. 8000ea4: af00 add r7, sp, #0
  1377. 8000ea6: 6078 str r0, [r7, #4]
  1378. 8000ea8: 460b mov r3, r1
  1379. 8000eaa: 70fb strb r3, [r7, #3]
  1380. uint8_t resp;
  1381. uint8_t i = 0;
  1382. 8000eac: 2300 movs r3, #0
  1383. 8000eae: 73bb strb r3, [r7, #14]
  1384. /* wait SD ready */
  1385. if (SD_ReadyWait() != 0xFF) return FALSE;
  1386. 8000eb0: f7ff ff56 bl 8000d60 <SD_ReadyWait>
  1387. 8000eb4: 4603 mov r3, r0
  1388. 8000eb6: 2bff cmp r3, #255 ; 0xff
  1389. 8000eb8: d001 beq.n 8000ebe <SD_TxDataBlock+0x1e>
  1390. 8000eba: 2300 movs r3, #0
  1391. 8000ebc: e02f b.n 8000f1e <SD_TxDataBlock+0x7e>
  1392. /* transmit token */
  1393. SPI_TxByte(token);
  1394. 8000ebe: 78fb ldrb r3, [r7, #3]
  1395. 8000ec0: 4618 mov r0, r3
  1396. 8000ec2: f7ff feef bl 8000ca4 <SPI_TxByte>
  1397. /* if it's not STOP token, transmit data */
  1398. if (token != 0xFD)
  1399. 8000ec6: 78fb ldrb r3, [r7, #3]
  1400. 8000ec8: 2bfd cmp r3, #253 ; 0xfd
  1401. 8000eca: d020 beq.n 8000f0e <SD_TxDataBlock+0x6e>
  1402. {
  1403. SPI_TxBuffer((uint8_t*)buff, 512);
  1404. 8000ecc: f44f 7100 mov.w r1, #512 ; 0x200
  1405. 8000ed0: 6878 ldr r0, [r7, #4]
  1406. 8000ed2: f7ff ff01 bl 8000cd8 <SPI_TxBuffer>
  1407. /* discard CRC */
  1408. SPI_RxByte();
  1409. 8000ed6: f7ff ff19 bl 8000d0c <SPI_RxByte>
  1410. SPI_RxByte();
  1411. 8000eda: f7ff ff17 bl 8000d0c <SPI_RxByte>
  1412. /* receive response */
  1413. while (i <= 64)
  1414. 8000ede: e00b b.n 8000ef8 <SD_TxDataBlock+0x58>
  1415. {
  1416. resp = SPI_RxByte();
  1417. 8000ee0: f7ff ff14 bl 8000d0c <SPI_RxByte>
  1418. 8000ee4: 4603 mov r3, r0
  1419. 8000ee6: 73fb strb r3, [r7, #15]
  1420. /* transmit 0x05 accepted */
  1421. if ((resp & 0x1F) == 0x05) break;
  1422. 8000ee8: 7bfb ldrb r3, [r7, #15]
  1423. 8000eea: f003 031f and.w r3, r3, #31
  1424. 8000eee: 2b05 cmp r3, #5
  1425. 8000ef0: d006 beq.n 8000f00 <SD_TxDataBlock+0x60>
  1426. i++;
  1427. 8000ef2: 7bbb ldrb r3, [r7, #14]
  1428. 8000ef4: 3301 adds r3, #1
  1429. 8000ef6: 73bb strb r3, [r7, #14]
  1430. while (i <= 64)
  1431. 8000ef8: 7bbb ldrb r3, [r7, #14]
  1432. 8000efa: 2b40 cmp r3, #64 ; 0x40
  1433. 8000efc: d9f0 bls.n 8000ee0 <SD_TxDataBlock+0x40>
  1434. 8000efe: e000 b.n 8000f02 <SD_TxDataBlock+0x62>
  1435. if ((resp & 0x1F) == 0x05) break;
  1436. 8000f00: bf00 nop
  1437. }
  1438. /* recv buffer clear */
  1439. while (SPI_RxByte() == 0);
  1440. 8000f02: bf00 nop
  1441. 8000f04: f7ff ff02 bl 8000d0c <SPI_RxByte>
  1442. 8000f08: 4603 mov r3, r0
  1443. 8000f0a: 2b00 cmp r3, #0
  1444. 8000f0c: d0fa beq.n 8000f04 <SD_TxDataBlock+0x64>
  1445. }
  1446. /* transmit 0x05 accepted */
  1447. if ((resp & 0x1F) == 0x05) return TRUE;
  1448. 8000f0e: 7bfb ldrb r3, [r7, #15]
  1449. 8000f10: f003 031f and.w r3, r3, #31
  1450. 8000f14: 2b05 cmp r3, #5
  1451. 8000f16: d101 bne.n 8000f1c <SD_TxDataBlock+0x7c>
  1452. 8000f18: 2301 movs r3, #1
  1453. 8000f1a: e000 b.n 8000f1e <SD_TxDataBlock+0x7e>
  1454. return FALSE;
  1455. 8000f1c: 2300 movs r3, #0
  1456. }
  1457. 8000f1e: 4618 mov r0, r3
  1458. 8000f20: 3710 adds r7, #16
  1459. 8000f22: 46bd mov sp, r7
  1460. 8000f24: bd80 pop {r7, pc}
  1461. 08000f26 <SD_SendCmd>:
  1462. #endif /* _USE_WRITE */
  1463. /* transmit command */
  1464. static BYTE SD_SendCmd(BYTE cmd, uint32_t arg)
  1465. {
  1466. 8000f26: b580 push {r7, lr}
  1467. 8000f28: b084 sub sp, #16
  1468. 8000f2a: af00 add r7, sp, #0
  1469. 8000f2c: 4603 mov r3, r0
  1470. 8000f2e: 6039 str r1, [r7, #0]
  1471. 8000f30: 71fb strb r3, [r7, #7]
  1472. uint8_t crc, res;
  1473. /* wait SD ready */
  1474. if (SD_ReadyWait() != 0xFF) return 0xFF;
  1475. 8000f32: f7ff ff15 bl 8000d60 <SD_ReadyWait>
  1476. 8000f36: 4603 mov r3, r0
  1477. 8000f38: 2bff cmp r3, #255 ; 0xff
  1478. 8000f3a: d001 beq.n 8000f40 <SD_SendCmd+0x1a>
  1479. 8000f3c: 23ff movs r3, #255 ; 0xff
  1480. 8000f3e: e042 b.n 8000fc6 <SD_SendCmd+0xa0>
  1481. /* transmit command */
  1482. SPI_TxByte(cmd); /* Command */
  1483. 8000f40: 79fb ldrb r3, [r7, #7]
  1484. 8000f42: 4618 mov r0, r3
  1485. 8000f44: f7ff feae bl 8000ca4 <SPI_TxByte>
  1486. SPI_TxByte((uint8_t)(arg >> 24)); /* Argument[31..24] */
  1487. 8000f48: 683b ldr r3, [r7, #0]
  1488. 8000f4a: 0e1b lsrs r3, r3, #24
  1489. 8000f4c: b2db uxtb r3, r3
  1490. 8000f4e: 4618 mov r0, r3
  1491. 8000f50: f7ff fea8 bl 8000ca4 <SPI_TxByte>
  1492. SPI_TxByte((uint8_t)(arg >> 16)); /* Argument[23..16] */
  1493. 8000f54: 683b ldr r3, [r7, #0]
  1494. 8000f56: 0c1b lsrs r3, r3, #16
  1495. 8000f58: b2db uxtb r3, r3
  1496. 8000f5a: 4618 mov r0, r3
  1497. 8000f5c: f7ff fea2 bl 8000ca4 <SPI_TxByte>
  1498. SPI_TxByte((uint8_t)(arg >> 8)); /* Argument[15..8] */
  1499. 8000f60: 683b ldr r3, [r7, #0]
  1500. 8000f62: 0a1b lsrs r3, r3, #8
  1501. 8000f64: b2db uxtb r3, r3
  1502. 8000f66: 4618 mov r0, r3
  1503. 8000f68: f7ff fe9c bl 8000ca4 <SPI_TxByte>
  1504. SPI_TxByte((uint8_t)arg); /* Argument[7..0] */
  1505. 8000f6c: 683b ldr r3, [r7, #0]
  1506. 8000f6e: b2db uxtb r3, r3
  1507. 8000f70: 4618 mov r0, r3
  1508. 8000f72: f7ff fe97 bl 8000ca4 <SPI_TxByte>
  1509. /* prepare CRC */
  1510. if(cmd == CMD0) crc = 0x95; /* CRC for CMD0(0) */
  1511. 8000f76: 79fb ldrb r3, [r7, #7]
  1512. 8000f78: 2b40 cmp r3, #64 ; 0x40
  1513. 8000f7a: d102 bne.n 8000f82 <SD_SendCmd+0x5c>
  1514. 8000f7c: 2395 movs r3, #149 ; 0x95
  1515. 8000f7e: 73fb strb r3, [r7, #15]
  1516. 8000f80: e007 b.n 8000f92 <SD_SendCmd+0x6c>
  1517. else if(cmd == CMD8) crc = 0x87; /* CRC for CMD8(0x1AA) */
  1518. 8000f82: 79fb ldrb r3, [r7, #7]
  1519. 8000f84: 2b48 cmp r3, #72 ; 0x48
  1520. 8000f86: d102 bne.n 8000f8e <SD_SendCmd+0x68>
  1521. 8000f88: 2387 movs r3, #135 ; 0x87
  1522. 8000f8a: 73fb strb r3, [r7, #15]
  1523. 8000f8c: e001 b.n 8000f92 <SD_SendCmd+0x6c>
  1524. else crc = 1;
  1525. 8000f8e: 2301 movs r3, #1
  1526. 8000f90: 73fb strb r3, [r7, #15]
  1527. /* transmit CRC */
  1528. SPI_TxByte(crc);
  1529. 8000f92: 7bfb ldrb r3, [r7, #15]
  1530. 8000f94: 4618 mov r0, r3
  1531. 8000f96: f7ff fe85 bl 8000ca4 <SPI_TxByte>
  1532. /* Skip a stuff byte when STOP_TRANSMISSION */
  1533. if (cmd == CMD12) SPI_RxByte();
  1534. 8000f9a: 79fb ldrb r3, [r7, #7]
  1535. 8000f9c: 2b4c cmp r3, #76 ; 0x4c
  1536. 8000f9e: d101 bne.n 8000fa4 <SD_SendCmd+0x7e>
  1537. 8000fa0: f7ff feb4 bl 8000d0c <SPI_RxByte>
  1538. /* receive response */
  1539. uint8_t n = 10;
  1540. 8000fa4: 230a movs r3, #10
  1541. 8000fa6: 73bb strb r3, [r7, #14]
  1542. do {
  1543. res = SPI_RxByte();
  1544. 8000fa8: f7ff feb0 bl 8000d0c <SPI_RxByte>
  1545. 8000fac: 4603 mov r3, r0
  1546. 8000fae: 737b strb r3, [r7, #13]
  1547. } while ((res & 0x80) && --n);
  1548. 8000fb0: f997 300d ldrsb.w r3, [r7, #13]
  1549. 8000fb4: 2b00 cmp r3, #0
  1550. 8000fb6: da05 bge.n 8000fc4 <SD_SendCmd+0x9e>
  1551. 8000fb8: 7bbb ldrb r3, [r7, #14]
  1552. 8000fba: 3b01 subs r3, #1
  1553. 8000fbc: 73bb strb r3, [r7, #14]
  1554. 8000fbe: 7bbb ldrb r3, [r7, #14]
  1555. 8000fc0: 2b00 cmp r3, #0
  1556. 8000fc2: d1f1 bne.n 8000fa8 <SD_SendCmd+0x82>
  1557. return res;
  1558. 8000fc4: 7b7b ldrb r3, [r7, #13]
  1559. }
  1560. 8000fc6: 4618 mov r0, r3
  1561. 8000fc8: 3710 adds r7, #16
  1562. 8000fca: 46bd mov sp, r7
  1563. 8000fcc: bd80 pop {r7, pc}
  1564. ...
  1565. 08000fd0 <SD_disk_initialize>:
  1566. * user_diskio.c functions
  1567. **************************************/
  1568. /* initialize SD */
  1569. DSTATUS SD_disk_initialize(BYTE drv)
  1570. {
  1571. 8000fd0: b590 push {r4, r7, lr}
  1572. 8000fd2: b085 sub sp, #20
  1573. 8000fd4: af00 add r7, sp, #0
  1574. 8000fd6: 4603 mov r3, r0
  1575. 8000fd8: 71fb strb r3, [r7, #7]
  1576. uint8_t n, type, ocr[4];
  1577. /* single drive, drv should be 0 */
  1578. if(drv) return STA_NOINIT;
  1579. 8000fda: 79fb ldrb r3, [r7, #7]
  1580. 8000fdc: 2b00 cmp r3, #0
  1581. 8000fde: d001 beq.n 8000fe4 <SD_disk_initialize+0x14>
  1582. 8000fe0: 2301 movs r3, #1
  1583. 8000fe2: e0d1 b.n 8001188 <SD_disk_initialize+0x1b8>
  1584. /* no disk */
  1585. if(Stat & STA_NODISK) return Stat;
  1586. 8000fe4: 4b6a ldr r3, [pc, #424] ; (8001190 <SD_disk_initialize+0x1c0>)
  1587. 8000fe6: 781b ldrb r3, [r3, #0]
  1588. 8000fe8: b2db uxtb r3, r3
  1589. 8000fea: f003 0302 and.w r3, r3, #2
  1590. 8000fee: 2b00 cmp r3, #0
  1591. 8000ff0: d003 beq.n 8000ffa <SD_disk_initialize+0x2a>
  1592. 8000ff2: 4b67 ldr r3, [pc, #412] ; (8001190 <SD_disk_initialize+0x1c0>)
  1593. 8000ff4: 781b ldrb r3, [r3, #0]
  1594. 8000ff6: b2db uxtb r3, r3
  1595. 8000ff8: e0c6 b.n 8001188 <SD_disk_initialize+0x1b8>
  1596. /* power on */
  1597. SD_PowerOn();
  1598. 8000ffa: f7ff fecb bl 8000d94 <SD_PowerOn>
  1599. /* slave select */
  1600. SELECT();
  1601. 8000ffe: f7ff fe35 bl 8000c6c <SELECT>
  1602. /* check disk type */
  1603. type = 0;
  1604. 8001002: 2300 movs r3, #0
  1605. 8001004: 73bb strb r3, [r7, #14]
  1606. /* send GO_IDLE_STATE command */
  1607. if (SD_SendCmd(CMD0, 0) == 1)
  1608. 8001006: 2100 movs r1, #0
  1609. 8001008: 2040 movs r0, #64 ; 0x40
  1610. 800100a: f7ff ff8c bl 8000f26 <SD_SendCmd>
  1611. 800100e: 4603 mov r3, r0
  1612. 8001010: 2b01 cmp r3, #1
  1613. 8001012: f040 80a1 bne.w 8001158 <SD_disk_initialize+0x188>
  1614. {
  1615. /* timeout 1 sec */
  1616. Timer1 = 1000;
  1617. 8001016: 4b5f ldr r3, [pc, #380] ; (8001194 <SD_disk_initialize+0x1c4>)
  1618. 8001018: f44f 727a mov.w r2, #1000 ; 0x3e8
  1619. 800101c: 801a strh r2, [r3, #0]
  1620. /* SDC V2+ accept CMD8 command, http://elm-chan.org/docs/mmc/mmc_e.html */
  1621. if (SD_SendCmd(CMD8, 0x1AA) == 1)
  1622. 800101e: f44f 71d5 mov.w r1, #426 ; 0x1aa
  1623. 8001022: 2048 movs r0, #72 ; 0x48
  1624. 8001024: f7ff ff7f bl 8000f26 <SD_SendCmd>
  1625. 8001028: 4603 mov r3, r0
  1626. 800102a: 2b01 cmp r3, #1
  1627. 800102c: d155 bne.n 80010da <SD_disk_initialize+0x10a>
  1628. {
  1629. /* operation condition register */
  1630. for (n = 0; n < 4; n++)
  1631. 800102e: 2300 movs r3, #0
  1632. 8001030: 73fb strb r3, [r7, #15]
  1633. 8001032: e00c b.n 800104e <SD_disk_initialize+0x7e>
  1634. {
  1635. ocr[n] = SPI_RxByte();
  1636. 8001034: 7bfc ldrb r4, [r7, #15]
  1637. 8001036: f7ff fe69 bl 8000d0c <SPI_RxByte>
  1638. 800103a: 4603 mov r3, r0
  1639. 800103c: 461a mov r2, r3
  1640. 800103e: f107 0310 add.w r3, r7, #16
  1641. 8001042: 4423 add r3, r4
  1642. 8001044: f803 2c08 strb.w r2, [r3, #-8]
  1643. for (n = 0; n < 4; n++)
  1644. 8001048: 7bfb ldrb r3, [r7, #15]
  1645. 800104a: 3301 adds r3, #1
  1646. 800104c: 73fb strb r3, [r7, #15]
  1647. 800104e: 7bfb ldrb r3, [r7, #15]
  1648. 8001050: 2b03 cmp r3, #3
  1649. 8001052: d9ef bls.n 8001034 <SD_disk_initialize+0x64>
  1650. }
  1651. /* voltage range 2.7-3.6V */
  1652. if (ocr[2] == 0x01 && ocr[3] == 0xAA)
  1653. 8001054: 7abb ldrb r3, [r7, #10]
  1654. 8001056: 2b01 cmp r3, #1
  1655. 8001058: d17e bne.n 8001158 <SD_disk_initialize+0x188>
  1656. 800105a: 7afb ldrb r3, [r7, #11]
  1657. 800105c: 2baa cmp r3, #170 ; 0xaa
  1658. 800105e: d17b bne.n 8001158 <SD_disk_initialize+0x188>
  1659. {
  1660. /* ACMD41 with HCS bit */
  1661. do {
  1662. if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0) break;
  1663. 8001060: 2100 movs r1, #0
  1664. 8001062: 2077 movs r0, #119 ; 0x77
  1665. 8001064: f7ff ff5f bl 8000f26 <SD_SendCmd>
  1666. 8001068: 4603 mov r3, r0
  1667. 800106a: 2b01 cmp r3, #1
  1668. 800106c: d807 bhi.n 800107e <SD_disk_initialize+0xae>
  1669. 800106e: f04f 4180 mov.w r1, #1073741824 ; 0x40000000
  1670. 8001072: 2069 movs r0, #105 ; 0x69
  1671. 8001074: f7ff ff57 bl 8000f26 <SD_SendCmd>
  1672. 8001078: 4603 mov r3, r0
  1673. 800107a: 2b00 cmp r3, #0
  1674. 800107c: d004 beq.n 8001088 <SD_disk_initialize+0xb8>
  1675. } while (Timer1);
  1676. 800107e: 4b45 ldr r3, [pc, #276] ; (8001194 <SD_disk_initialize+0x1c4>)
  1677. 8001080: 881b ldrh r3, [r3, #0]
  1678. 8001082: 2b00 cmp r3, #0
  1679. 8001084: d1ec bne.n 8001060 <SD_disk_initialize+0x90>
  1680. 8001086: e000 b.n 800108a <SD_disk_initialize+0xba>
  1681. if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0) break;
  1682. 8001088: bf00 nop
  1683. /* READ_OCR */
  1684. if (Timer1 && SD_SendCmd(CMD58, 0) == 0)
  1685. 800108a: 4b42 ldr r3, [pc, #264] ; (8001194 <SD_disk_initialize+0x1c4>)
  1686. 800108c: 881b ldrh r3, [r3, #0]
  1687. 800108e: 2b00 cmp r3, #0
  1688. 8001090: d062 beq.n 8001158 <SD_disk_initialize+0x188>
  1689. 8001092: 2100 movs r1, #0
  1690. 8001094: 207a movs r0, #122 ; 0x7a
  1691. 8001096: f7ff ff46 bl 8000f26 <SD_SendCmd>
  1692. 800109a: 4603 mov r3, r0
  1693. 800109c: 2b00 cmp r3, #0
  1694. 800109e: d15b bne.n 8001158 <SD_disk_initialize+0x188>
  1695. {
  1696. /* Check CCS bit */
  1697. for (n = 0; n < 4; n++)
  1698. 80010a0: 2300 movs r3, #0
  1699. 80010a2: 73fb strb r3, [r7, #15]
  1700. 80010a4: e00c b.n 80010c0 <SD_disk_initialize+0xf0>
  1701. {
  1702. ocr[n] = SPI_RxByte();
  1703. 80010a6: 7bfc ldrb r4, [r7, #15]
  1704. 80010a8: f7ff fe30 bl 8000d0c <SPI_RxByte>
  1705. 80010ac: 4603 mov r3, r0
  1706. 80010ae: 461a mov r2, r3
  1707. 80010b0: f107 0310 add.w r3, r7, #16
  1708. 80010b4: 4423 add r3, r4
  1709. 80010b6: f803 2c08 strb.w r2, [r3, #-8]
  1710. for (n = 0; n < 4; n++)
  1711. 80010ba: 7bfb ldrb r3, [r7, #15]
  1712. 80010bc: 3301 adds r3, #1
  1713. 80010be: 73fb strb r3, [r7, #15]
  1714. 80010c0: 7bfb ldrb r3, [r7, #15]
  1715. 80010c2: 2b03 cmp r3, #3
  1716. 80010c4: d9ef bls.n 80010a6 <SD_disk_initialize+0xd6>
  1717. }
  1718. /* SDv2 (HC or SC) */
  1719. type = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
  1720. 80010c6: 7a3b ldrb r3, [r7, #8]
  1721. 80010c8: f003 0340 and.w r3, r3, #64 ; 0x40
  1722. 80010cc: 2b00 cmp r3, #0
  1723. 80010ce: d001 beq.n 80010d4 <SD_disk_initialize+0x104>
  1724. 80010d0: 230c movs r3, #12
  1725. 80010d2: e000 b.n 80010d6 <SD_disk_initialize+0x106>
  1726. 80010d4: 2304 movs r3, #4
  1727. 80010d6: 73bb strb r3, [r7, #14]
  1728. 80010d8: e03e b.n 8001158 <SD_disk_initialize+0x188>
  1729. }
  1730. }
  1731. else
  1732. {
  1733. /* SDC V1 or MMC */
  1734. type = (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) <= 1) ? CT_SD1 : CT_MMC;
  1735. 80010da: 2100 movs r1, #0
  1736. 80010dc: 2077 movs r0, #119 ; 0x77
  1737. 80010de: f7ff ff22 bl 8000f26 <SD_SendCmd>
  1738. 80010e2: 4603 mov r3, r0
  1739. 80010e4: 2b01 cmp r3, #1
  1740. 80010e6: d808 bhi.n 80010fa <SD_disk_initialize+0x12a>
  1741. 80010e8: 2100 movs r1, #0
  1742. 80010ea: 2069 movs r0, #105 ; 0x69
  1743. 80010ec: f7ff ff1b bl 8000f26 <SD_SendCmd>
  1744. 80010f0: 4603 mov r3, r0
  1745. 80010f2: 2b01 cmp r3, #1
  1746. 80010f4: d801 bhi.n 80010fa <SD_disk_initialize+0x12a>
  1747. 80010f6: 2302 movs r3, #2
  1748. 80010f8: e000 b.n 80010fc <SD_disk_initialize+0x12c>
  1749. 80010fa: 2301 movs r3, #1
  1750. 80010fc: 73bb strb r3, [r7, #14]
  1751. do
  1752. {
  1753. if (type == CT_SD1)
  1754. 80010fe: 7bbb ldrb r3, [r7, #14]
  1755. 8001100: 2b02 cmp r3, #2
  1756. 8001102: d10e bne.n 8001122 <SD_disk_initialize+0x152>
  1757. {
  1758. if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) == 0) break; /* ACMD41 */
  1759. 8001104: 2100 movs r1, #0
  1760. 8001106: 2077 movs r0, #119 ; 0x77
  1761. 8001108: f7ff ff0d bl 8000f26 <SD_SendCmd>
  1762. 800110c: 4603 mov r3, r0
  1763. 800110e: 2b01 cmp r3, #1
  1764. 8001110: d80e bhi.n 8001130 <SD_disk_initialize+0x160>
  1765. 8001112: 2100 movs r1, #0
  1766. 8001114: 2069 movs r0, #105 ; 0x69
  1767. 8001116: f7ff ff06 bl 8000f26 <SD_SendCmd>
  1768. 800111a: 4603 mov r3, r0
  1769. 800111c: 2b00 cmp r3, #0
  1770. 800111e: d107 bne.n 8001130 <SD_disk_initialize+0x160>
  1771. 8001120: e00c b.n 800113c <SD_disk_initialize+0x16c>
  1772. }
  1773. else
  1774. {
  1775. if (SD_SendCmd(CMD1, 0) == 0) break; /* CMD1 */
  1776. 8001122: 2100 movs r1, #0
  1777. 8001124: 2041 movs r0, #65 ; 0x41
  1778. 8001126: f7ff fefe bl 8000f26 <SD_SendCmd>
  1779. 800112a: 4603 mov r3, r0
  1780. 800112c: 2b00 cmp r3, #0
  1781. 800112e: d004 beq.n 800113a <SD_disk_initialize+0x16a>
  1782. }
  1783. } while (Timer1);
  1784. 8001130: 4b18 ldr r3, [pc, #96] ; (8001194 <SD_disk_initialize+0x1c4>)
  1785. 8001132: 881b ldrh r3, [r3, #0]
  1786. 8001134: 2b00 cmp r3, #0
  1787. 8001136: d1e2 bne.n 80010fe <SD_disk_initialize+0x12e>
  1788. 8001138: e000 b.n 800113c <SD_disk_initialize+0x16c>
  1789. if (SD_SendCmd(CMD1, 0) == 0) break; /* CMD1 */
  1790. 800113a: bf00 nop
  1791. /* SET_BLOCKLEN */
  1792. if (!Timer1 || SD_SendCmd(CMD16, 512) != 0) type = 0;
  1793. 800113c: 4b15 ldr r3, [pc, #84] ; (8001194 <SD_disk_initialize+0x1c4>)
  1794. 800113e: 881b ldrh r3, [r3, #0]
  1795. 8001140: 2b00 cmp r3, #0
  1796. 8001142: d007 beq.n 8001154 <SD_disk_initialize+0x184>
  1797. 8001144: f44f 7100 mov.w r1, #512 ; 0x200
  1798. 8001148: 2050 movs r0, #80 ; 0x50
  1799. 800114a: f7ff feec bl 8000f26 <SD_SendCmd>
  1800. 800114e: 4603 mov r3, r0
  1801. 8001150: 2b00 cmp r3, #0
  1802. 8001152: d001 beq.n 8001158 <SD_disk_initialize+0x188>
  1803. 8001154: 2300 movs r3, #0
  1804. 8001156: 73bb strb r3, [r7, #14]
  1805. }
  1806. }
  1807. CardType = type;
  1808. 8001158: 4a0f ldr r2, [pc, #60] ; (8001198 <SD_disk_initialize+0x1c8>)
  1809. 800115a: 7bbb ldrb r3, [r7, #14]
  1810. 800115c: 7013 strb r3, [r2, #0]
  1811. /* Idle */
  1812. DESELECT();
  1813. 800115e: f7ff fd93 bl 8000c88 <DESELECT>
  1814. SPI_RxByte();
  1815. 8001162: f7ff fdd3 bl 8000d0c <SPI_RxByte>
  1816. /* Clear STA_NOINIT */
  1817. if (type)
  1818. 8001166: 7bbb ldrb r3, [r7, #14]
  1819. 8001168: 2b00 cmp r3, #0
  1820. 800116a: d008 beq.n 800117e <SD_disk_initialize+0x1ae>
  1821. {
  1822. Stat &= ~STA_NOINIT;
  1823. 800116c: 4b08 ldr r3, [pc, #32] ; (8001190 <SD_disk_initialize+0x1c0>)
  1824. 800116e: 781b ldrb r3, [r3, #0]
  1825. 8001170: b2db uxtb r3, r3
  1826. 8001172: f023 0301 bic.w r3, r3, #1
  1827. 8001176: b2da uxtb r2, r3
  1828. 8001178: 4b05 ldr r3, [pc, #20] ; (8001190 <SD_disk_initialize+0x1c0>)
  1829. 800117a: 701a strb r2, [r3, #0]
  1830. 800117c: e001 b.n 8001182 <SD_disk_initialize+0x1b2>
  1831. }
  1832. else
  1833. {
  1834. /* Initialization failed */
  1835. SD_PowerOff();
  1836. 800117e: f7ff fe4b bl 8000e18 <SD_PowerOff>
  1837. }
  1838. return Stat;
  1839. 8001182: 4b03 ldr r3, [pc, #12] ; (8001190 <SD_disk_initialize+0x1c0>)
  1840. 8001184: 781b ldrb r3, [r3, #0]
  1841. 8001186: b2db uxtb r3, r3
  1842. }
  1843. 8001188: 4618 mov r0, r3
  1844. 800118a: 3714 adds r7, #20
  1845. 800118c: 46bd mov sp, r7
  1846. 800118e: bd90 pop {r4, r7, pc}
  1847. 8001190: 20000000 .word 0x20000000
  1848. 8001194: 200002ea .word 0x200002ea
  1849. 8001198: 200000a4 .word 0x200000a4
  1850. 0800119c <SD_disk_status>:
  1851. /* return disk status */
  1852. DSTATUS SD_disk_status(BYTE drv)
  1853. {
  1854. 800119c: b480 push {r7}
  1855. 800119e: b083 sub sp, #12
  1856. 80011a0: af00 add r7, sp, #0
  1857. 80011a2: 4603 mov r3, r0
  1858. 80011a4: 71fb strb r3, [r7, #7]
  1859. if (drv) return STA_NOINIT;
  1860. 80011a6: 79fb ldrb r3, [r7, #7]
  1861. 80011a8: 2b00 cmp r3, #0
  1862. 80011aa: d001 beq.n 80011b0 <SD_disk_status+0x14>
  1863. 80011ac: 2301 movs r3, #1
  1864. 80011ae: e002 b.n 80011b6 <SD_disk_status+0x1a>
  1865. return Stat;
  1866. 80011b0: 4b03 ldr r3, [pc, #12] ; (80011c0 <SD_disk_status+0x24>)
  1867. 80011b2: 781b ldrb r3, [r3, #0]
  1868. 80011b4: b2db uxtb r3, r3
  1869. }
  1870. 80011b6: 4618 mov r0, r3
  1871. 80011b8: 370c adds r7, #12
  1872. 80011ba: 46bd mov sp, r7
  1873. 80011bc: bc80 pop {r7}
  1874. 80011be: 4770 bx lr
  1875. 80011c0: 20000000 .word 0x20000000
  1876. 080011c4 <SD_disk_read>:
  1877. /* read sector */
  1878. DRESULT SD_disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count)
  1879. {
  1880. 80011c4: b580 push {r7, lr}
  1881. 80011c6: b084 sub sp, #16
  1882. 80011c8: af00 add r7, sp, #0
  1883. 80011ca: 60b9 str r1, [r7, #8]
  1884. 80011cc: 607a str r2, [r7, #4]
  1885. 80011ce: 603b str r3, [r7, #0]
  1886. 80011d0: 4603 mov r3, r0
  1887. 80011d2: 73fb strb r3, [r7, #15]
  1888. /* pdrv should be 0 */
  1889. if (pdrv || !count) return RES_PARERR;
  1890. 80011d4: 7bfb ldrb r3, [r7, #15]
  1891. 80011d6: 2b00 cmp r3, #0
  1892. 80011d8: d102 bne.n 80011e0 <SD_disk_read+0x1c>
  1893. 80011da: 683b ldr r3, [r7, #0]
  1894. 80011dc: 2b00 cmp r3, #0
  1895. 80011de: d101 bne.n 80011e4 <SD_disk_read+0x20>
  1896. 80011e0: 2304 movs r3, #4
  1897. 80011e2: e051 b.n 8001288 <SD_disk_read+0xc4>
  1898. /* no disk */
  1899. if (Stat & STA_NOINIT) return RES_NOTRDY;
  1900. 80011e4: 4b2a ldr r3, [pc, #168] ; (8001290 <SD_disk_read+0xcc>)
  1901. 80011e6: 781b ldrb r3, [r3, #0]
  1902. 80011e8: b2db uxtb r3, r3
  1903. 80011ea: f003 0301 and.w r3, r3, #1
  1904. 80011ee: 2b00 cmp r3, #0
  1905. 80011f0: d001 beq.n 80011f6 <SD_disk_read+0x32>
  1906. 80011f2: 2303 movs r3, #3
  1907. 80011f4: e048 b.n 8001288 <SD_disk_read+0xc4>
  1908. /* convert to byte address */
  1909. if (!(CardType & CT_SD2)) sector *= 512;
  1910. 80011f6: 4b27 ldr r3, [pc, #156] ; (8001294 <SD_disk_read+0xd0>)
  1911. 80011f8: 781b ldrb r3, [r3, #0]
  1912. 80011fa: f003 0304 and.w r3, r3, #4
  1913. 80011fe: 2b00 cmp r3, #0
  1914. 8001200: d102 bne.n 8001208 <SD_disk_read+0x44>
  1915. 8001202: 687b ldr r3, [r7, #4]
  1916. 8001204: 025b lsls r3, r3, #9
  1917. 8001206: 607b str r3, [r7, #4]
  1918. SELECT();
  1919. 8001208: f7ff fd30 bl 8000c6c <SELECT>
  1920. if (count == 1)
  1921. 800120c: 683b ldr r3, [r7, #0]
  1922. 800120e: 2b01 cmp r3, #1
  1923. 8001210: d111 bne.n 8001236 <SD_disk_read+0x72>
  1924. {
  1925. /* READ_SINGLE_BLOCK */
  1926. if ((SD_SendCmd(CMD17, sector) == 0) && SD_RxDataBlock(buff, 512)) count = 0;
  1927. 8001212: 6879 ldr r1, [r7, #4]
  1928. 8001214: 2051 movs r0, #81 ; 0x51
  1929. 8001216: f7ff fe86 bl 8000f26 <SD_SendCmd>
  1930. 800121a: 4603 mov r3, r0
  1931. 800121c: 2b00 cmp r3, #0
  1932. 800121e: d129 bne.n 8001274 <SD_disk_read+0xb0>
  1933. 8001220: f44f 7100 mov.w r1, #512 ; 0x200
  1934. 8001224: 68b8 ldr r0, [r7, #8]
  1935. 8001226: f7ff fe0d bl 8000e44 <SD_RxDataBlock>
  1936. 800122a: 4603 mov r3, r0
  1937. 800122c: 2b00 cmp r3, #0
  1938. 800122e: d021 beq.n 8001274 <SD_disk_read+0xb0>
  1939. 8001230: 2300 movs r3, #0
  1940. 8001232: 603b str r3, [r7, #0]
  1941. 8001234: e01e b.n 8001274 <SD_disk_read+0xb0>
  1942. }
  1943. else
  1944. {
  1945. /* READ_MULTIPLE_BLOCK */
  1946. if (SD_SendCmd(CMD18, sector) == 0)
  1947. 8001236: 6879 ldr r1, [r7, #4]
  1948. 8001238: 2052 movs r0, #82 ; 0x52
  1949. 800123a: f7ff fe74 bl 8000f26 <SD_SendCmd>
  1950. 800123e: 4603 mov r3, r0
  1951. 8001240: 2b00 cmp r3, #0
  1952. 8001242: d117 bne.n 8001274 <SD_disk_read+0xb0>
  1953. {
  1954. do {
  1955. if (!SD_RxDataBlock(buff, 512)) break;
  1956. 8001244: f44f 7100 mov.w r1, #512 ; 0x200
  1957. 8001248: 68b8 ldr r0, [r7, #8]
  1958. 800124a: f7ff fdfb bl 8000e44 <SD_RxDataBlock>
  1959. 800124e: 4603 mov r3, r0
  1960. 8001250: 2b00 cmp r3, #0
  1961. 8001252: d00a beq.n 800126a <SD_disk_read+0xa6>
  1962. buff += 512;
  1963. 8001254: 68bb ldr r3, [r7, #8]
  1964. 8001256: f503 7300 add.w r3, r3, #512 ; 0x200
  1965. 800125a: 60bb str r3, [r7, #8]
  1966. } while (--count);
  1967. 800125c: 683b ldr r3, [r7, #0]
  1968. 800125e: 3b01 subs r3, #1
  1969. 8001260: 603b str r3, [r7, #0]
  1970. 8001262: 683b ldr r3, [r7, #0]
  1971. 8001264: 2b00 cmp r3, #0
  1972. 8001266: d1ed bne.n 8001244 <SD_disk_read+0x80>
  1973. 8001268: e000 b.n 800126c <SD_disk_read+0xa8>
  1974. if (!SD_RxDataBlock(buff, 512)) break;
  1975. 800126a: bf00 nop
  1976. /* STOP_TRANSMISSION */
  1977. SD_SendCmd(CMD12, 0);
  1978. 800126c: 2100 movs r1, #0
  1979. 800126e: 204c movs r0, #76 ; 0x4c
  1980. 8001270: f7ff fe59 bl 8000f26 <SD_SendCmd>
  1981. }
  1982. }
  1983. /* Idle */
  1984. DESELECT();
  1985. 8001274: f7ff fd08 bl 8000c88 <DESELECT>
  1986. SPI_RxByte();
  1987. 8001278: f7ff fd48 bl 8000d0c <SPI_RxByte>
  1988. return count ? RES_ERROR : RES_OK;
  1989. 800127c: 683b ldr r3, [r7, #0]
  1990. 800127e: 2b00 cmp r3, #0
  1991. 8001280: bf14 ite ne
  1992. 8001282: 2301 movne r3, #1
  1993. 8001284: 2300 moveq r3, #0
  1994. 8001286: b2db uxtb r3, r3
  1995. }
  1996. 8001288: 4618 mov r0, r3
  1997. 800128a: 3710 adds r7, #16
  1998. 800128c: 46bd mov sp, r7
  1999. 800128e: bd80 pop {r7, pc}
  2000. 8001290: 20000000 .word 0x20000000
  2001. 8001294: 200000a4 .word 0x200000a4
  2002. 08001298 <SD_disk_write>:
  2003. /* write sector */
  2004. #if _USE_WRITE == 1
  2005. DRESULT SD_disk_write(BYTE pdrv, const BYTE* buff, DWORD sector, UINT count)
  2006. {
  2007. 8001298: b580 push {r7, lr}
  2008. 800129a: b084 sub sp, #16
  2009. 800129c: af00 add r7, sp, #0
  2010. 800129e: 60b9 str r1, [r7, #8]
  2011. 80012a0: 607a str r2, [r7, #4]
  2012. 80012a2: 603b str r3, [r7, #0]
  2013. 80012a4: 4603 mov r3, r0
  2014. 80012a6: 73fb strb r3, [r7, #15]
  2015. /* pdrv should be 0 */
  2016. if (pdrv || !count) return RES_PARERR;
  2017. 80012a8: 7bfb ldrb r3, [r7, #15]
  2018. 80012aa: 2b00 cmp r3, #0
  2019. 80012ac: d102 bne.n 80012b4 <SD_disk_write+0x1c>
  2020. 80012ae: 683b ldr r3, [r7, #0]
  2021. 80012b0: 2b00 cmp r3, #0
  2022. 80012b2: d101 bne.n 80012b8 <SD_disk_write+0x20>
  2023. 80012b4: 2304 movs r3, #4
  2024. 80012b6: e06b b.n 8001390 <SD_disk_write+0xf8>
  2025. /* no disk */
  2026. if (Stat & STA_NOINIT) return RES_NOTRDY;
  2027. 80012b8: 4b37 ldr r3, [pc, #220] ; (8001398 <SD_disk_write+0x100>)
  2028. 80012ba: 781b ldrb r3, [r3, #0]
  2029. 80012bc: b2db uxtb r3, r3
  2030. 80012be: f003 0301 and.w r3, r3, #1
  2031. 80012c2: 2b00 cmp r3, #0
  2032. 80012c4: d001 beq.n 80012ca <SD_disk_write+0x32>
  2033. 80012c6: 2303 movs r3, #3
  2034. 80012c8: e062 b.n 8001390 <SD_disk_write+0xf8>
  2035. /* write protection */
  2036. if (Stat & STA_PROTECT) return RES_WRPRT;
  2037. 80012ca: 4b33 ldr r3, [pc, #204] ; (8001398 <SD_disk_write+0x100>)
  2038. 80012cc: 781b ldrb r3, [r3, #0]
  2039. 80012ce: b2db uxtb r3, r3
  2040. 80012d0: f003 0304 and.w r3, r3, #4
  2041. 80012d4: 2b00 cmp r3, #0
  2042. 80012d6: d001 beq.n 80012dc <SD_disk_write+0x44>
  2043. 80012d8: 2302 movs r3, #2
  2044. 80012da: e059 b.n 8001390 <SD_disk_write+0xf8>
  2045. /* convert to byte address */
  2046. if (!(CardType & CT_SD2)) sector *= 512;
  2047. 80012dc: 4b2f ldr r3, [pc, #188] ; (800139c <SD_disk_write+0x104>)
  2048. 80012de: 781b ldrb r3, [r3, #0]
  2049. 80012e0: f003 0304 and.w r3, r3, #4
  2050. 80012e4: 2b00 cmp r3, #0
  2051. 80012e6: d102 bne.n 80012ee <SD_disk_write+0x56>
  2052. 80012e8: 687b ldr r3, [r7, #4]
  2053. 80012ea: 025b lsls r3, r3, #9
  2054. 80012ec: 607b str r3, [r7, #4]
  2055. SELECT();
  2056. 80012ee: f7ff fcbd bl 8000c6c <SELECT>
  2057. if (count == 1)
  2058. 80012f2: 683b ldr r3, [r7, #0]
  2059. 80012f4: 2b01 cmp r3, #1
  2060. 80012f6: d110 bne.n 800131a <SD_disk_write+0x82>
  2061. {
  2062. /* WRITE_BLOCK */
  2063. if ((SD_SendCmd(CMD24, sector) == 0) && SD_TxDataBlock(buff, 0xFE))
  2064. 80012f8: 6879 ldr r1, [r7, #4]
  2065. 80012fa: 2058 movs r0, #88 ; 0x58
  2066. 80012fc: f7ff fe13 bl 8000f26 <SD_SendCmd>
  2067. 8001300: 4603 mov r3, r0
  2068. 8001302: 2b00 cmp r3, #0
  2069. 8001304: d13a bne.n 800137c <SD_disk_write+0xe4>
  2070. 8001306: 21fe movs r1, #254 ; 0xfe
  2071. 8001308: 68b8 ldr r0, [r7, #8]
  2072. 800130a: f7ff fdc9 bl 8000ea0 <SD_TxDataBlock>
  2073. 800130e: 4603 mov r3, r0
  2074. 8001310: 2b00 cmp r3, #0
  2075. 8001312: d033 beq.n 800137c <SD_disk_write+0xe4>
  2076. count = 0;
  2077. 8001314: 2300 movs r3, #0
  2078. 8001316: 603b str r3, [r7, #0]
  2079. 8001318: e030 b.n 800137c <SD_disk_write+0xe4>
  2080. }
  2081. else
  2082. {
  2083. /* WRITE_MULTIPLE_BLOCK */
  2084. if (CardType & CT_SD1)
  2085. 800131a: 4b20 ldr r3, [pc, #128] ; (800139c <SD_disk_write+0x104>)
  2086. 800131c: 781b ldrb r3, [r3, #0]
  2087. 800131e: f003 0302 and.w r3, r3, #2
  2088. 8001322: 2b00 cmp r3, #0
  2089. 8001324: d007 beq.n 8001336 <SD_disk_write+0x9e>
  2090. {
  2091. SD_SendCmd(CMD55, 0);
  2092. 8001326: 2100 movs r1, #0
  2093. 8001328: 2077 movs r0, #119 ; 0x77
  2094. 800132a: f7ff fdfc bl 8000f26 <SD_SendCmd>
  2095. SD_SendCmd(CMD23, count); /* ACMD23 */
  2096. 800132e: 6839 ldr r1, [r7, #0]
  2097. 8001330: 2057 movs r0, #87 ; 0x57
  2098. 8001332: f7ff fdf8 bl 8000f26 <SD_SendCmd>
  2099. }
  2100. if (SD_SendCmd(CMD25, sector) == 0)
  2101. 8001336: 6879 ldr r1, [r7, #4]
  2102. 8001338: 2059 movs r0, #89 ; 0x59
  2103. 800133a: f7ff fdf4 bl 8000f26 <SD_SendCmd>
  2104. 800133e: 4603 mov r3, r0
  2105. 8001340: 2b00 cmp r3, #0
  2106. 8001342: d11b bne.n 800137c <SD_disk_write+0xe4>
  2107. {
  2108. do {
  2109. if(!SD_TxDataBlock(buff, 0xFC)) break;
  2110. 8001344: 21fc movs r1, #252 ; 0xfc
  2111. 8001346: 68b8 ldr r0, [r7, #8]
  2112. 8001348: f7ff fdaa bl 8000ea0 <SD_TxDataBlock>
  2113. 800134c: 4603 mov r3, r0
  2114. 800134e: 2b00 cmp r3, #0
  2115. 8001350: d00a beq.n 8001368 <SD_disk_write+0xd0>
  2116. buff += 512;
  2117. 8001352: 68bb ldr r3, [r7, #8]
  2118. 8001354: f503 7300 add.w r3, r3, #512 ; 0x200
  2119. 8001358: 60bb str r3, [r7, #8]
  2120. } while (--count);
  2121. 800135a: 683b ldr r3, [r7, #0]
  2122. 800135c: 3b01 subs r3, #1
  2123. 800135e: 603b str r3, [r7, #0]
  2124. 8001360: 683b ldr r3, [r7, #0]
  2125. 8001362: 2b00 cmp r3, #0
  2126. 8001364: d1ee bne.n 8001344 <SD_disk_write+0xac>
  2127. 8001366: e000 b.n 800136a <SD_disk_write+0xd2>
  2128. if(!SD_TxDataBlock(buff, 0xFC)) break;
  2129. 8001368: bf00 nop
  2130. /* STOP_TRAN token */
  2131. if(!SD_TxDataBlock(0, 0xFD))
  2132. 800136a: 21fd movs r1, #253 ; 0xfd
  2133. 800136c: 2000 movs r0, #0
  2134. 800136e: f7ff fd97 bl 8000ea0 <SD_TxDataBlock>
  2135. 8001372: 4603 mov r3, r0
  2136. 8001374: 2b00 cmp r3, #0
  2137. 8001376: d101 bne.n 800137c <SD_disk_write+0xe4>
  2138. {
  2139. count = 1;
  2140. 8001378: 2301 movs r3, #1
  2141. 800137a: 603b str r3, [r7, #0]
  2142. }
  2143. }
  2144. }
  2145. /* Idle */
  2146. DESELECT();
  2147. 800137c: f7ff fc84 bl 8000c88 <DESELECT>
  2148. SPI_RxByte();
  2149. 8001380: f7ff fcc4 bl 8000d0c <SPI_RxByte>
  2150. return count ? RES_ERROR : RES_OK;
  2151. 8001384: 683b ldr r3, [r7, #0]
  2152. 8001386: 2b00 cmp r3, #0
  2153. 8001388: bf14 ite ne
  2154. 800138a: 2301 movne r3, #1
  2155. 800138c: 2300 moveq r3, #0
  2156. 800138e: b2db uxtb r3, r3
  2157. }
  2158. 8001390: 4618 mov r0, r3
  2159. 8001392: 3710 adds r7, #16
  2160. 8001394: 46bd mov sp, r7
  2161. 8001396: bd80 pop {r7, pc}
  2162. 8001398: 20000000 .word 0x20000000
  2163. 800139c: 200000a4 .word 0x200000a4
  2164. 080013a0 <SD_disk_ioctl>:
  2165. #endif /* _USE_WRITE */
  2166. /* ioctl */
  2167. DRESULT SD_disk_ioctl(BYTE drv, BYTE ctrl, void *buff)
  2168. {
  2169. 80013a0: b590 push {r4, r7, lr}
  2170. 80013a2: b08b sub sp, #44 ; 0x2c
  2171. 80013a4: af00 add r7, sp, #0
  2172. 80013a6: 4603 mov r3, r0
  2173. 80013a8: 603a str r2, [r7, #0]
  2174. 80013aa: 71fb strb r3, [r7, #7]
  2175. 80013ac: 460b mov r3, r1
  2176. 80013ae: 71bb strb r3, [r7, #6]
  2177. DRESULT res;
  2178. uint8_t n, csd[16], *ptr = buff;
  2179. 80013b0: 683b ldr r3, [r7, #0]
  2180. 80013b2: 623b str r3, [r7, #32]
  2181. WORD csize;
  2182. /* pdrv should be 0 */
  2183. if (drv) return RES_PARERR;
  2184. 80013b4: 79fb ldrb r3, [r7, #7]
  2185. 80013b6: 2b00 cmp r3, #0
  2186. 80013b8: d001 beq.n 80013be <SD_disk_ioctl+0x1e>
  2187. 80013ba: 2304 movs r3, #4
  2188. 80013bc: e113 b.n 80015e6 <SD_disk_ioctl+0x246>
  2189. res = RES_ERROR;
  2190. 80013be: 2301 movs r3, #1
  2191. 80013c0: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2192. if (ctrl == CTRL_POWER)
  2193. 80013c4: 79bb ldrb r3, [r7, #6]
  2194. 80013c6: 2b05 cmp r3, #5
  2195. 80013c8: d121 bne.n 800140e <SD_disk_ioctl+0x6e>
  2196. {
  2197. switch (*ptr)
  2198. 80013ca: 6a3b ldr r3, [r7, #32]
  2199. 80013cc: 781b ldrb r3, [r3, #0]
  2200. 80013ce: 2b01 cmp r3, #1
  2201. 80013d0: d009 beq.n 80013e6 <SD_disk_ioctl+0x46>
  2202. 80013d2: 2b02 cmp r3, #2
  2203. 80013d4: d00d beq.n 80013f2 <SD_disk_ioctl+0x52>
  2204. 80013d6: 2b00 cmp r3, #0
  2205. 80013d8: d115 bne.n 8001406 <SD_disk_ioctl+0x66>
  2206. {
  2207. case 0:
  2208. SD_PowerOff(); /* Power Off */
  2209. 80013da: f7ff fd1d bl 8000e18 <SD_PowerOff>
  2210. res = RES_OK;
  2211. 80013de: 2300 movs r3, #0
  2212. 80013e0: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2213. break;
  2214. 80013e4: e0fd b.n 80015e2 <SD_disk_ioctl+0x242>
  2215. case 1:
  2216. SD_PowerOn(); /* Power On */
  2217. 80013e6: f7ff fcd5 bl 8000d94 <SD_PowerOn>
  2218. res = RES_OK;
  2219. 80013ea: 2300 movs r3, #0
  2220. 80013ec: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2221. break;
  2222. 80013f0: e0f7 b.n 80015e2 <SD_disk_ioctl+0x242>
  2223. case 2:
  2224. *(ptr + 1) = SD_CheckPower();
  2225. 80013f2: 6a3b ldr r3, [r7, #32]
  2226. 80013f4: 1c5c adds r4, r3, #1
  2227. 80013f6: f7ff fd1b bl 8000e30 <SD_CheckPower>
  2228. 80013fa: 4603 mov r3, r0
  2229. 80013fc: 7023 strb r3, [r4, #0]
  2230. res = RES_OK; /* Power Check */
  2231. 80013fe: 2300 movs r3, #0
  2232. 8001400: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2233. break;
  2234. 8001404: e0ed b.n 80015e2 <SD_disk_ioctl+0x242>
  2235. default:
  2236. res = RES_PARERR;
  2237. 8001406: 2304 movs r3, #4
  2238. 8001408: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2239. 800140c: e0e9 b.n 80015e2 <SD_disk_ioctl+0x242>
  2240. }
  2241. }
  2242. else
  2243. {
  2244. /* no disk */
  2245. if (Stat & STA_NOINIT) return RES_NOTRDY;
  2246. 800140e: 4b78 ldr r3, [pc, #480] ; (80015f0 <SD_disk_ioctl+0x250>)
  2247. 8001410: 781b ldrb r3, [r3, #0]
  2248. 8001412: b2db uxtb r3, r3
  2249. 8001414: f003 0301 and.w r3, r3, #1
  2250. 8001418: 2b00 cmp r3, #0
  2251. 800141a: d001 beq.n 8001420 <SD_disk_ioctl+0x80>
  2252. 800141c: 2303 movs r3, #3
  2253. 800141e: e0e2 b.n 80015e6 <SD_disk_ioctl+0x246>
  2254. SELECT();
  2255. 8001420: f7ff fc24 bl 8000c6c <SELECT>
  2256. switch (ctrl)
  2257. 8001424: 79bb ldrb r3, [r7, #6]
  2258. 8001426: 2b0d cmp r3, #13
  2259. 8001428: f200 80cc bhi.w 80015c4 <SD_disk_ioctl+0x224>
  2260. 800142c: a201 add r2, pc, #4 ; (adr r2, 8001434 <SD_disk_ioctl+0x94>)
  2261. 800142e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
  2262. 8001432: bf00 nop
  2263. 8001434: 0800152f .word 0x0800152f
  2264. 8001438: 0800146d .word 0x0800146d
  2265. 800143c: 0800151f .word 0x0800151f
  2266. 8001440: 080015c5 .word 0x080015c5
  2267. 8001444: 080015c5 .word 0x080015c5
  2268. 8001448: 080015c5 .word 0x080015c5
  2269. 800144c: 080015c5 .word 0x080015c5
  2270. 8001450: 080015c5 .word 0x080015c5
  2271. 8001454: 080015c5 .word 0x080015c5
  2272. 8001458: 080015c5 .word 0x080015c5
  2273. 800145c: 080015c5 .word 0x080015c5
  2274. 8001460: 08001541 .word 0x08001541
  2275. 8001464: 08001565 .word 0x08001565
  2276. 8001468: 08001589 .word 0x08001589
  2277. {
  2278. case GET_SECTOR_COUNT:
  2279. /* SEND_CSD */
  2280. if ((SD_SendCmd(CMD9, 0) == 0) && SD_RxDataBlock(csd, 16))
  2281. 800146c: 2100 movs r1, #0
  2282. 800146e: 2049 movs r0, #73 ; 0x49
  2283. 8001470: f7ff fd59 bl 8000f26 <SD_SendCmd>
  2284. 8001474: 4603 mov r3, r0
  2285. 8001476: 2b00 cmp r3, #0
  2286. 8001478: f040 80a8 bne.w 80015cc <SD_disk_ioctl+0x22c>
  2287. 800147c: f107 030c add.w r3, r7, #12
  2288. 8001480: 2110 movs r1, #16
  2289. 8001482: 4618 mov r0, r3
  2290. 8001484: f7ff fcde bl 8000e44 <SD_RxDataBlock>
  2291. 8001488: 4603 mov r3, r0
  2292. 800148a: 2b00 cmp r3, #0
  2293. 800148c: f000 809e beq.w 80015cc <SD_disk_ioctl+0x22c>
  2294. {
  2295. if ((csd[0] >> 6) == 1)
  2296. 8001490: 7b3b ldrb r3, [r7, #12]
  2297. 8001492: 099b lsrs r3, r3, #6
  2298. 8001494: b2db uxtb r3, r3
  2299. 8001496: 2b01 cmp r3, #1
  2300. 8001498: d10e bne.n 80014b8 <SD_disk_ioctl+0x118>
  2301. {
  2302. /* SDC V2 */
  2303. csize = csd[9] + ((WORD) csd[8] << 8) + 1;
  2304. 800149a: 7d7b ldrb r3, [r7, #21]
  2305. 800149c: b29a uxth r2, r3
  2306. 800149e: 7d3b ldrb r3, [r7, #20]
  2307. 80014a0: b29b uxth r3, r3
  2308. 80014a2: 021b lsls r3, r3, #8
  2309. 80014a4: b29b uxth r3, r3
  2310. 80014a6: 4413 add r3, r2
  2311. 80014a8: b29b uxth r3, r3
  2312. 80014aa: 3301 adds r3, #1
  2313. 80014ac: 83fb strh r3, [r7, #30]
  2314. *(DWORD*) buff = (DWORD) csize << 10;
  2315. 80014ae: 8bfb ldrh r3, [r7, #30]
  2316. 80014b0: 029a lsls r2, r3, #10
  2317. 80014b2: 683b ldr r3, [r7, #0]
  2318. 80014b4: 601a str r2, [r3, #0]
  2319. 80014b6: e02e b.n 8001516 <SD_disk_ioctl+0x176>
  2320. }
  2321. else
  2322. {
  2323. /* MMC or SDC V1 */
  2324. n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
  2325. 80014b8: 7c7b ldrb r3, [r7, #17]
  2326. 80014ba: f003 030f and.w r3, r3, #15
  2327. 80014be: b2da uxtb r2, r3
  2328. 80014c0: 7dbb ldrb r3, [r7, #22]
  2329. 80014c2: 09db lsrs r3, r3, #7
  2330. 80014c4: b2db uxtb r3, r3
  2331. 80014c6: 4413 add r3, r2
  2332. 80014c8: b2da uxtb r2, r3
  2333. 80014ca: 7d7b ldrb r3, [r7, #21]
  2334. 80014cc: 005b lsls r3, r3, #1
  2335. 80014ce: b2db uxtb r3, r3
  2336. 80014d0: f003 0306 and.w r3, r3, #6
  2337. 80014d4: b2db uxtb r3, r3
  2338. 80014d6: 4413 add r3, r2
  2339. 80014d8: b2db uxtb r3, r3
  2340. 80014da: 3302 adds r3, #2
  2341. 80014dc: f887 3026 strb.w r3, [r7, #38] ; 0x26
  2342. csize = (csd[8] >> 6) + ((WORD) csd[7] << 2) + ((WORD) (csd[6] & 3) << 10) + 1;
  2343. 80014e0: 7d3b ldrb r3, [r7, #20]
  2344. 80014e2: 099b lsrs r3, r3, #6
  2345. 80014e4: b2db uxtb r3, r3
  2346. 80014e6: b29a uxth r2, r3
  2347. 80014e8: 7cfb ldrb r3, [r7, #19]
  2348. 80014ea: b29b uxth r3, r3
  2349. 80014ec: 009b lsls r3, r3, #2
  2350. 80014ee: b29b uxth r3, r3
  2351. 80014f0: 4413 add r3, r2
  2352. 80014f2: b29a uxth r2, r3
  2353. 80014f4: 7cbb ldrb r3, [r7, #18]
  2354. 80014f6: 029b lsls r3, r3, #10
  2355. 80014f8: b29b uxth r3, r3
  2356. 80014fa: f403 6340 and.w r3, r3, #3072 ; 0xc00
  2357. 80014fe: b29b uxth r3, r3
  2358. 8001500: 4413 add r3, r2
  2359. 8001502: b29b uxth r3, r3
  2360. 8001504: 3301 adds r3, #1
  2361. 8001506: 83fb strh r3, [r7, #30]
  2362. *(DWORD*) buff = (DWORD) csize << (n - 9);
  2363. 8001508: 8bfa ldrh r2, [r7, #30]
  2364. 800150a: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  2365. 800150e: 3b09 subs r3, #9
  2366. 8001510: 409a lsls r2, r3
  2367. 8001512: 683b ldr r3, [r7, #0]
  2368. 8001514: 601a str r2, [r3, #0]
  2369. }
  2370. res = RES_OK;
  2371. 8001516: 2300 movs r3, #0
  2372. 8001518: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2373. }
  2374. break;
  2375. 800151c: e056 b.n 80015cc <SD_disk_ioctl+0x22c>
  2376. case GET_SECTOR_SIZE:
  2377. *(WORD*) buff = 512;
  2378. 800151e: 683b ldr r3, [r7, #0]
  2379. 8001520: f44f 7200 mov.w r2, #512 ; 0x200
  2380. 8001524: 801a strh r2, [r3, #0]
  2381. res = RES_OK;
  2382. 8001526: 2300 movs r3, #0
  2383. 8001528: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2384. break;
  2385. 800152c: e055 b.n 80015da <SD_disk_ioctl+0x23a>
  2386. case CTRL_SYNC:
  2387. if (SD_ReadyWait() == 0xFF) res = RES_OK;
  2388. 800152e: f7ff fc17 bl 8000d60 <SD_ReadyWait>
  2389. 8001532: 4603 mov r3, r0
  2390. 8001534: 2bff cmp r3, #255 ; 0xff
  2391. 8001536: d14b bne.n 80015d0 <SD_disk_ioctl+0x230>
  2392. 8001538: 2300 movs r3, #0
  2393. 800153a: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2394. break;
  2395. 800153e: e047 b.n 80015d0 <SD_disk_ioctl+0x230>
  2396. case MMC_GET_CSD:
  2397. /* SEND_CSD */
  2398. if (SD_SendCmd(CMD9, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
  2399. 8001540: 2100 movs r1, #0
  2400. 8001542: 2049 movs r0, #73 ; 0x49
  2401. 8001544: f7ff fcef bl 8000f26 <SD_SendCmd>
  2402. 8001548: 4603 mov r3, r0
  2403. 800154a: 2b00 cmp r3, #0
  2404. 800154c: d142 bne.n 80015d4 <SD_disk_ioctl+0x234>
  2405. 800154e: 2110 movs r1, #16
  2406. 8001550: 6a38 ldr r0, [r7, #32]
  2407. 8001552: f7ff fc77 bl 8000e44 <SD_RxDataBlock>
  2408. 8001556: 4603 mov r3, r0
  2409. 8001558: 2b00 cmp r3, #0
  2410. 800155a: d03b beq.n 80015d4 <SD_disk_ioctl+0x234>
  2411. 800155c: 2300 movs r3, #0
  2412. 800155e: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2413. break;
  2414. 8001562: e037 b.n 80015d4 <SD_disk_ioctl+0x234>
  2415. case MMC_GET_CID:
  2416. /* SEND_CID */
  2417. if (SD_SendCmd(CMD10, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
  2418. 8001564: 2100 movs r1, #0
  2419. 8001566: 204a movs r0, #74 ; 0x4a
  2420. 8001568: f7ff fcdd bl 8000f26 <SD_SendCmd>
  2421. 800156c: 4603 mov r3, r0
  2422. 800156e: 2b00 cmp r3, #0
  2423. 8001570: d132 bne.n 80015d8 <SD_disk_ioctl+0x238>
  2424. 8001572: 2110 movs r1, #16
  2425. 8001574: 6a38 ldr r0, [r7, #32]
  2426. 8001576: f7ff fc65 bl 8000e44 <SD_RxDataBlock>
  2427. 800157a: 4603 mov r3, r0
  2428. 800157c: 2b00 cmp r3, #0
  2429. 800157e: d02b beq.n 80015d8 <SD_disk_ioctl+0x238>
  2430. 8001580: 2300 movs r3, #0
  2431. 8001582: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2432. break;
  2433. 8001586: e027 b.n 80015d8 <SD_disk_ioctl+0x238>
  2434. case MMC_GET_OCR:
  2435. /* READ_OCR */
  2436. if (SD_SendCmd(CMD58, 0) == 0)
  2437. 8001588: 2100 movs r1, #0
  2438. 800158a: 207a movs r0, #122 ; 0x7a
  2439. 800158c: f7ff fccb bl 8000f26 <SD_SendCmd>
  2440. 8001590: 4603 mov r3, r0
  2441. 8001592: 2b00 cmp r3, #0
  2442. 8001594: d116 bne.n 80015c4 <SD_disk_ioctl+0x224>
  2443. {
  2444. for (n = 0; n < 4; n++)
  2445. 8001596: 2300 movs r3, #0
  2446. 8001598: f887 3026 strb.w r3, [r7, #38] ; 0x26
  2447. 800159c: e00b b.n 80015b6 <SD_disk_ioctl+0x216>
  2448. {
  2449. *ptr++ = SPI_RxByte();
  2450. 800159e: 6a3c ldr r4, [r7, #32]
  2451. 80015a0: 1c63 adds r3, r4, #1
  2452. 80015a2: 623b str r3, [r7, #32]
  2453. 80015a4: f7ff fbb2 bl 8000d0c <SPI_RxByte>
  2454. 80015a8: 4603 mov r3, r0
  2455. 80015aa: 7023 strb r3, [r4, #0]
  2456. for (n = 0; n < 4; n++)
  2457. 80015ac: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  2458. 80015b0: 3301 adds r3, #1
  2459. 80015b2: f887 3026 strb.w r3, [r7, #38] ; 0x26
  2460. 80015b6: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  2461. 80015ba: 2b03 cmp r3, #3
  2462. 80015bc: d9ef bls.n 800159e <SD_disk_ioctl+0x1fe>
  2463. }
  2464. res = RES_OK;
  2465. 80015be: 2300 movs r3, #0
  2466. 80015c0: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2467. }
  2468. default:
  2469. res = RES_PARERR;
  2470. 80015c4: 2304 movs r3, #4
  2471. 80015c6: f887 3027 strb.w r3, [r7, #39] ; 0x27
  2472. 80015ca: e006 b.n 80015da <SD_disk_ioctl+0x23a>
  2473. break;
  2474. 80015cc: bf00 nop
  2475. 80015ce: e004 b.n 80015da <SD_disk_ioctl+0x23a>
  2476. break;
  2477. 80015d0: bf00 nop
  2478. 80015d2: e002 b.n 80015da <SD_disk_ioctl+0x23a>
  2479. break;
  2480. 80015d4: bf00 nop
  2481. 80015d6: e000 b.n 80015da <SD_disk_ioctl+0x23a>
  2482. break;
  2483. 80015d8: bf00 nop
  2484. }
  2485. DESELECT();
  2486. 80015da: f7ff fb55 bl 8000c88 <DESELECT>
  2487. SPI_RxByte();
  2488. 80015de: f7ff fb95 bl 8000d0c <SPI_RxByte>
  2489. }
  2490. return res;
  2491. 80015e2: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  2492. }
  2493. 80015e6: 4618 mov r0, r3
  2494. 80015e8: 372c adds r7, #44 ; 0x2c
  2495. 80015ea: 46bd mov sp, r7
  2496. 80015ec: bd90 pop {r4, r7, pc}
  2497. 80015ee: bf00 nop
  2498. 80015f0: 20000000 .word 0x20000000
  2499. 080015f4 <transmit_uart>:
  2500. /* Private user code ---------------------------------------------------------*/
  2501. /* USER CODE BEGIN 0 */
  2502. // sending to UART
  2503. void transmit_uart(char *string){
  2504. 80015f4: b580 push {r7, lr}
  2505. 80015f6: b084 sub sp, #16
  2506. 80015f8: af00 add r7, sp, #0
  2507. 80015fa: 6078 str r0, [r7, #4]
  2508. uint8_t len = strlen(string);
  2509. 80015fc: 6878 ldr r0, [r7, #4]
  2510. 80015fe: f7fe fdbd bl 800017c <strlen>
  2511. 8001602: 4603 mov r3, r0
  2512. 8001604: 73fb strb r3, [r7, #15]
  2513. HAL_UART_Transmit(&huart2, (uint8_t*) string, len, 200);
  2514. 8001606: 7bfb ldrb r3, [r7, #15]
  2515. 8001608: b29a uxth r2, r3
  2516. 800160a: 23c8 movs r3, #200 ; 0xc8
  2517. 800160c: 6879 ldr r1, [r7, #4]
  2518. 800160e: 4803 ldr r0, [pc, #12] ; (800161c <transmit_uart+0x28>)
  2519. 8001610: f002 f929 bl 8003866 <HAL_UART_Transmit>
  2520. }
  2521. 8001614: bf00 nop
  2522. 8001616: 3710 adds r7, #16
  2523. 8001618: 46bd mov sp, r7
  2524. 800161a: bd80 pop {r7, pc}
  2525. 800161c: 200013f0 .word 0x200013f0
  2526. 08001620 <main>:
  2527. /**
  2528. * @brief The application entry point.
  2529. * @retval int
  2530. */
  2531. int main(void)
  2532. {
  2533. 8001620: b590 push {r4, r7, lr}
  2534. 8001622: b09d sub sp, #116 ; 0x74
  2535. 8001624: af00 add r7, sp, #0
  2536. /* USER CODE END 1 */
  2537. /* MCU Configuration--------------------------------------------------------*/
  2538. /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  2539. HAL_Init();
  2540. 8001626: f000 fbb8 bl 8001d9a <HAL_Init>
  2541. /* USER CODE BEGIN Init */
  2542. /* USER CODE END Init */
  2543. /* Configure the system clock */
  2544. SystemClock_Config();
  2545. 800162a: f000 f937 bl 800189c <SystemClock_Config>
  2546. /* USER CODE BEGIN SysInit */
  2547. /* USER CODE END SysInit */
  2548. /* Initialize all configured peripherals */
  2549. MX_GPIO_Init();
  2550. 800162e: f000 f9e3 bl 80019f8 <MX_GPIO_Init>
  2551. MX_USART2_UART_Init();
  2552. 8001632: f000 f9b7 bl 80019a4 <MX_USART2_UART_Init>
  2553. MX_SPI1_Init();
  2554. 8001636: f000 f97f bl 8001938 <MX_SPI1_Init>
  2555. MX_FATFS_Init();
  2556. 800163a: f002 fadb bl 8003bf4 <MX_FATFS_Init>
  2557. /* USER CODE BEGIN 2 */
  2558. /* Waiting for the Micro SD module to initialize */
  2559. HAL_Delay(500);
  2560. 800163e: f44f 70fa mov.w r0, #500 ; 0x1f4
  2561. 8001642: f000 fc19 bl 8001e78 <HAL_Delay>
  2562. fres = f_mount(&fs, "", 0);
  2563. 8001646: 2200 movs r2, #0
  2564. 8001648: 497c ldr r1, [pc, #496] ; (800183c <main+0x21c>)
  2565. 800164a: 487d ldr r0, [pc, #500] ; (8001840 <main+0x220>)
  2566. 800164c: f004 fd00 bl 8006050 <f_mount>
  2567. 8001650: 4603 mov r3, r0
  2568. 8001652: 461a mov r2, r3
  2569. 8001654: 4b7b ldr r3, [pc, #492] ; (8001844 <main+0x224>)
  2570. 8001656: 701a strb r2, [r3, #0]
  2571. if (fres == FR_OK) {
  2572. 8001658: 4b7a ldr r3, [pc, #488] ; (8001844 <main+0x224>)
  2573. 800165a: 781b ldrb r3, [r3, #0]
  2574. 800165c: 2b00 cmp r3, #0
  2575. 800165e: d103 bne.n 8001668 <main+0x48>
  2576. transmit_uart("SD card is mounted successfully!\r\n");
  2577. 8001660: 4879 ldr r0, [pc, #484] ; (8001848 <main+0x228>)
  2578. 8001662: f7ff ffc7 bl 80015f4 <transmit_uart>
  2579. 8001666: e006 b.n 8001676 <main+0x56>
  2580. } else if (fres != FR_OK) {
  2581. 8001668: 4b76 ldr r3, [pc, #472] ; (8001844 <main+0x224>)
  2582. 800166a: 781b ldrb r3, [r3, #0]
  2583. 800166c: 2b00 cmp r3, #0
  2584. 800166e: d002 beq.n 8001676 <main+0x56>
  2585. transmit_uart("SD card is not mounted!\r\n");
  2586. 8001670: 4876 ldr r0, [pc, #472] ; (800184c <main+0x22c>)
  2587. 8001672: f7ff ffbf bl 80015f4 <transmit_uart>
  2588. }
  2589. // FA_OPEN_APPEND opens file if it exists and if not then creates it,
  2590. // the pointer is set at the end of the file for appending
  2591. fres = f_open(&fil, "log-file.txt", FA_OPEN_APPEND | FA_WRITE | FA_READ);
  2592. 8001676: 2233 movs r2, #51 ; 0x33
  2593. 8001678: 4975 ldr r1, [pc, #468] ; (8001850 <main+0x230>)
  2594. 800167a: 4876 ldr r0, [pc, #472] ; (8001854 <main+0x234>)
  2595. 800167c: f004 fd2e bl 80060dc <f_open>
  2596. 8001680: 4603 mov r3, r0
  2597. 8001682: 461a mov r2, r3
  2598. 8001684: 4b6f ldr r3, [pc, #444] ; (8001844 <main+0x224>)
  2599. 8001686: 701a strb r2, [r3, #0]
  2600. if (fres == FR_OK) {
  2601. 8001688: 4b6e ldr r3, [pc, #440] ; (8001844 <main+0x224>)
  2602. 800168a: 781b ldrb r3, [r3, #0]
  2603. 800168c: 2b00 cmp r3, #0
  2604. 800168e: d103 bne.n 8001698 <main+0x78>
  2605. transmit_uart("File opened.\r\n");
  2606. 8001690: 4871 ldr r0, [pc, #452] ; (8001858 <main+0x238>)
  2607. 8001692: f7ff ffaf bl 80015f4 <transmit_uart>
  2608. 8001696: e006 b.n 80016a6 <main+0x86>
  2609. } else if (fres != FR_OK) {
  2610. 8001698: 4b6a ldr r3, [pc, #424] ; (8001844 <main+0x224>)
  2611. 800169a: 781b ldrb r3, [r3, #0]
  2612. 800169c: 2b00 cmp r3, #0
  2613. 800169e: d002 beq.n 80016a6 <main+0x86>
  2614. transmit_uart("File was not opened!\r\n");
  2615. 80016a0: 486e ldr r0, [pc, #440] ; (800185c <main+0x23c>)
  2616. 80016a2: f7ff ffa7 bl 80015f4 <transmit_uart>
  2617. }
  2618. fres = f_getfree("", &fre_clust, &pfs);
  2619. 80016a6: 4a6e ldr r2, [pc, #440] ; (8001860 <main+0x240>)
  2620. 80016a8: 496e ldr r1, [pc, #440] ; (8001864 <main+0x244>)
  2621. 80016aa: 4864 ldr r0, [pc, #400] ; (800183c <main+0x21c>)
  2622. 80016ac: f005 fa7d bl 8006baa <f_getfree>
  2623. 80016b0: 4603 mov r3, r0
  2624. 80016b2: 461a mov r2, r3
  2625. 80016b4: 4b63 ldr r3, [pc, #396] ; (8001844 <main+0x224>)
  2626. 80016b6: 701a strb r2, [r3, #0]
  2627. totalSpace = (uint32_t) ((pfs->n_fatent - 2) * pfs->csize * 0.5);
  2628. 80016b8: 4b69 ldr r3, [pc, #420] ; (8001860 <main+0x240>)
  2629. 80016ba: 681b ldr r3, [r3, #0]
  2630. 80016bc: 69db ldr r3, [r3, #28]
  2631. 80016be: 3b02 subs r3, #2
  2632. 80016c0: 4a67 ldr r2, [pc, #412] ; (8001860 <main+0x240>)
  2633. 80016c2: 6812 ldr r2, [r2, #0]
  2634. 80016c4: 8952 ldrh r2, [r2, #10]
  2635. 80016c6: fb02 f303 mul.w r3, r2, r3
  2636. 80016ca: 4618 mov r0, r3
  2637. 80016cc: f7fe fea0 bl 8000410 <__aeabi_ui2d>
  2638. 80016d0: f04f 0200 mov.w r2, #0
  2639. 80016d4: 4b64 ldr r3, [pc, #400] ; (8001868 <main+0x248>)
  2640. 80016d6: f7fe ff15 bl 8000504 <__aeabi_dmul>
  2641. 80016da: 4603 mov r3, r0
  2642. 80016dc: 460c mov r4, r1
  2643. 80016de: 4618 mov r0, r3
  2644. 80016e0: 4621 mov r1, r4
  2645. 80016e2: f7ff f921 bl 8000928 <__aeabi_d2uiz>
  2646. 80016e6: 4602 mov r2, r0
  2647. 80016e8: 4b60 ldr r3, [pc, #384] ; (800186c <main+0x24c>)
  2648. 80016ea: 601a str r2, [r3, #0]
  2649. freeSpace = (uint32_t) (fre_clust * pfs->csize * 0.5);
  2650. 80016ec: 4b5c ldr r3, [pc, #368] ; (8001860 <main+0x240>)
  2651. 80016ee: 681b ldr r3, [r3, #0]
  2652. 80016f0: 895b ldrh r3, [r3, #10]
  2653. 80016f2: 461a mov r2, r3
  2654. 80016f4: 4b5b ldr r3, [pc, #364] ; (8001864 <main+0x244>)
  2655. 80016f6: 681b ldr r3, [r3, #0]
  2656. 80016f8: fb03 f302 mul.w r3, r3, r2
  2657. 80016fc: 4618 mov r0, r3
  2658. 80016fe: f7fe fe87 bl 8000410 <__aeabi_ui2d>
  2659. 8001702: f04f 0200 mov.w r2, #0
  2660. 8001706: 4b58 ldr r3, [pc, #352] ; (8001868 <main+0x248>)
  2661. 8001708: f7fe fefc bl 8000504 <__aeabi_dmul>
  2662. 800170c: 4603 mov r3, r0
  2663. 800170e: 460c mov r4, r1
  2664. 8001710: 4618 mov r0, r3
  2665. 8001712: 4621 mov r1, r4
  2666. 8001714: f7ff f908 bl 8000928 <__aeabi_d2uiz>
  2667. 8001718: 4602 mov r2, r0
  2668. 800171a: 4b55 ldr r3, [pc, #340] ; (8001870 <main+0x250>)
  2669. 800171c: 601a str r2, [r3, #0]
  2670. char mSz[12];
  2671. sprintf(mSz, "%lu", freeSpace);
  2672. 800171e: 4b54 ldr r3, [pc, #336] ; (8001870 <main+0x250>)
  2673. 8001720: 681a ldr r2, [r3, #0]
  2674. 8001722: f107 0364 add.w r3, r7, #100 ; 0x64
  2675. 8001726: 4953 ldr r1, [pc, #332] ; (8001874 <main+0x254>)
  2676. 8001728: 4618 mov r0, r3
  2677. 800172a: f005 fd19 bl 8007160 <siprintf>
  2678. if (fres == FR_OK) {
  2679. 800172e: 4b45 ldr r3, [pc, #276] ; (8001844 <main+0x224>)
  2680. 8001730: 781b ldrb r3, [r3, #0]
  2681. 8001732: 2b00 cmp r3, #0
  2682. 8001734: d10b bne.n 800174e <main+0x12e>
  2683. transmit_uart("Free space: \r");
  2684. 8001736: 4850 ldr r0, [pc, #320] ; (8001878 <main+0x258>)
  2685. 8001738: f7ff ff5c bl 80015f4 <transmit_uart>
  2686. transmit_uart(mSz);
  2687. 800173c: f107 0364 add.w r3, r7, #100 ; 0x64
  2688. 8001740: 4618 mov r0, r3
  2689. 8001742: f7ff ff57 bl 80015f4 <transmit_uart>
  2690. transmit_uart("\r\n");
  2691. 8001746: 484d ldr r0, [pc, #308] ; (800187c <main+0x25c>)
  2692. 8001748: f7ff ff54 bl 80015f4 <transmit_uart>
  2693. 800174c: e006 b.n 800175c <main+0x13c>
  2694. } else if (fres != FR_OK) {
  2695. 800174e: 4b3d ldr r3, [pc, #244] ; (8001844 <main+0x224>)
  2696. 8001750: 781b ldrb r3, [r3, #0]
  2697. 8001752: 2b00 cmp r3, #0
  2698. 8001754: d002 beq.n 800175c <main+0x13c>
  2699. transmit_uart("Free space could not be determined!\r\n");
  2700. 8001756: 484a ldr r0, [pc, #296] ; (8001880 <main+0x260>)
  2701. 8001758: f7ff ff4c bl 80015f4 <transmit_uart>
  2702. }
  2703. f_puts("Example Text\n", &fil);
  2704. 800175c: 493d ldr r1, [pc, #244] ; (8001854 <main+0x234>)
  2705. 800175e: 4849 ldr r0, [pc, #292] ; (8001884 <main+0x264>)
  2706. 8001760: f005 fb8c bl 8006e7c <f_puts>
  2707. fres = f_close(&fil);
  2708. 8001764: 483b ldr r0, [pc, #236] ; (8001854 <main+0x234>)
  2709. 8001766: f005 f9f6 bl 8006b56 <f_close>
  2710. 800176a: 4603 mov r3, r0
  2711. 800176c: 461a mov r2, r3
  2712. 800176e: 4b35 ldr r3, [pc, #212] ; (8001844 <main+0x224>)
  2713. 8001770: 701a strb r2, [r3, #0]
  2714. if (fres == FR_OK) {
  2715. 8001772: 4b34 ldr r3, [pc, #208] ; (8001844 <main+0x224>)
  2716. 8001774: 781b ldrb r3, [r3, #0]
  2717. 8001776: 2b00 cmp r3, #0
  2718. 8001778: d103 bne.n 8001782 <main+0x162>
  2719. transmit_uart("File is closed.\r\n");
  2720. 800177a: 4843 ldr r0, [pc, #268] ; (8001888 <main+0x268>)
  2721. 800177c: f7ff ff3a bl 80015f4 <transmit_uart>
  2722. 8001780: e006 b.n 8001790 <main+0x170>
  2723. } else if (fres != FR_OK) {
  2724. 8001782: 4b30 ldr r3, [pc, #192] ; (8001844 <main+0x224>)
  2725. 8001784: 781b ldrb r3, [r3, #0]
  2726. 8001786: 2b00 cmp r3, #0
  2727. 8001788: d002 beq.n 8001790 <main+0x170>
  2728. transmit_uart("File was not closed.\r\n");
  2729. 800178a: 4840 ldr r0, [pc, #256] ; (800188c <main+0x26c>)
  2730. 800178c: f7ff ff32 bl 80015f4 <transmit_uart>
  2731. }
  2732. /* Open file to read */
  2733. fres = f_open(&fil, "log-file.txt", FA_READ);
  2734. 8001790: 2201 movs r2, #1
  2735. 8001792: 492f ldr r1, [pc, #188] ; (8001850 <main+0x230>)
  2736. 8001794: 482f ldr r0, [pc, #188] ; (8001854 <main+0x234>)
  2737. 8001796: f004 fca1 bl 80060dc <f_open>
  2738. 800179a: 4603 mov r3, r0
  2739. 800179c: 461a mov r2, r3
  2740. 800179e: 4b29 ldr r3, [pc, #164] ; (8001844 <main+0x224>)
  2741. 80017a0: 701a strb r2, [r3, #0]
  2742. if (fres == FR_OK) {
  2743. 80017a2: 4b28 ldr r3, [pc, #160] ; (8001844 <main+0x224>)
  2744. 80017a4: 781b ldrb r3, [r3, #0]
  2745. 80017a6: 2b00 cmp r3, #0
  2746. 80017a8: d103 bne.n 80017b2 <main+0x192>
  2747. transmit_uart("File opened.\r\n");
  2748. 80017aa: 482b ldr r0, [pc, #172] ; (8001858 <main+0x238>)
  2749. 80017ac: f7ff ff22 bl 80015f4 <transmit_uart>
  2750. 80017b0: e010 b.n 80017d4 <main+0x1b4>
  2751. } else if (fres != FR_OK) {
  2752. 80017b2: 4b24 ldr r3, [pc, #144] ; (8001844 <main+0x224>)
  2753. 80017b4: 781b ldrb r3, [r3, #0]
  2754. 80017b6: 2b00 cmp r3, #0
  2755. 80017b8: d00c beq.n 80017d4 <main+0x1b4>
  2756. transmit_uart("File was not opened!\r\n");
  2757. 80017ba: 4828 ldr r0, [pc, #160] ; (800185c <main+0x23c>)
  2758. 80017bc: f7ff ff1a bl 80015f4 <transmit_uart>
  2759. }
  2760. while (f_gets(buffer, sizeof(buffer), &fil)) {
  2761. 80017c0: e008 b.n 80017d4 <main+0x1b4>
  2762. char mRd[100];
  2763. sprintf(mRd, "%s", buffer);
  2764. 80017c2: 463b mov r3, r7
  2765. 80017c4: 4932 ldr r1, [pc, #200] ; (8001890 <main+0x270>)
  2766. 80017c6: 4618 mov r0, r3
  2767. 80017c8: f005 fcea bl 80071a0 <strcpy>
  2768. transmit_uart(mRd);
  2769. 80017cc: 463b mov r3, r7
  2770. 80017ce: 4618 mov r0, r3
  2771. 80017d0: f7ff ff10 bl 80015f4 <transmit_uart>
  2772. while (f_gets(buffer, sizeof(buffer), &fil)) {
  2773. 80017d4: 4a1f ldr r2, [pc, #124] ; (8001854 <main+0x234>)
  2774. 80017d6: 2164 movs r1, #100 ; 0x64
  2775. 80017d8: 482d ldr r0, [pc, #180] ; (8001890 <main+0x270>)
  2776. 80017da: f005 fa9b bl 8006d14 <f_gets>
  2777. 80017de: 4603 mov r3, r0
  2778. 80017e0: 2b00 cmp r3, #0
  2779. 80017e2: d1ee bne.n 80017c2 <main+0x1a2>
  2780. }
  2781. /* Close file */
  2782. fres = f_close(&fil);
  2783. 80017e4: 481b ldr r0, [pc, #108] ; (8001854 <main+0x234>)
  2784. 80017e6: f005 f9b6 bl 8006b56 <f_close>
  2785. 80017ea: 4603 mov r3, r0
  2786. 80017ec: 461a mov r2, r3
  2787. 80017ee: 4b15 ldr r3, [pc, #84] ; (8001844 <main+0x224>)
  2788. 80017f0: 701a strb r2, [r3, #0]
  2789. if (fres == FR_OK) {
  2790. 80017f2: 4b14 ldr r3, [pc, #80] ; (8001844 <main+0x224>)
  2791. 80017f4: 781b ldrb r3, [r3, #0]
  2792. 80017f6: 2b00 cmp r3, #0
  2793. 80017f8: d103 bne.n 8001802 <main+0x1e2>
  2794. transmit_uart("File is closed.\r\n");
  2795. 80017fa: 4823 ldr r0, [pc, #140] ; (8001888 <main+0x268>)
  2796. 80017fc: f7ff fefa bl 80015f4 <transmit_uart>
  2797. 8001800: e006 b.n 8001810 <main+0x1f0>
  2798. } else if (fres != FR_OK) {
  2799. 8001802: 4b10 ldr r3, [pc, #64] ; (8001844 <main+0x224>)
  2800. 8001804: 781b ldrb r3, [r3, #0]
  2801. 8001806: 2b00 cmp r3, #0
  2802. 8001808: d002 beq.n 8001810 <main+0x1f0>
  2803. transmit_uart("File was not closed.\r\n");
  2804. 800180a: 4820 ldr r0, [pc, #128] ; (800188c <main+0x26c>)
  2805. 800180c: f7ff fef2 bl 80015f4 <transmit_uart>
  2806. }
  2807. f_mount(NULL, "", 1);
  2808. 8001810: 2201 movs r2, #1
  2809. 8001812: 490a ldr r1, [pc, #40] ; (800183c <main+0x21c>)
  2810. 8001814: 2000 movs r0, #0
  2811. 8001816: f004 fc1b bl 8006050 <f_mount>
  2812. if (fres == FR_OK) {
  2813. 800181a: 4b0a ldr r3, [pc, #40] ; (8001844 <main+0x224>)
  2814. 800181c: 781b ldrb r3, [r3, #0]
  2815. 800181e: 2b00 cmp r3, #0
  2816. 8001820: d103 bne.n 800182a <main+0x20a>
  2817. transmit_uart("SD card is unmounted!\r\n");
  2818. 8001822: 481c ldr r0, [pc, #112] ; (8001894 <main+0x274>)
  2819. 8001824: f7ff fee6 bl 80015f4 <transmit_uart>
  2820. 8001828: e006 b.n 8001838 <main+0x218>
  2821. } else if (fres != FR_OK) {
  2822. 800182a: 4b06 ldr r3, [pc, #24] ; (8001844 <main+0x224>)
  2823. 800182c: 781b ldrb r3, [r3, #0]
  2824. 800182e: 2b00 cmp r3, #0
  2825. 8001830: d002 beq.n 8001838 <main+0x218>
  2826. transmit_uart("SD card was not unmounted!\r\n");
  2827. 8001832: 4819 ldr r0, [pc, #100] ; (8001898 <main+0x278>)
  2828. 8001834: f7ff fede bl 80015f4 <transmit_uart>
  2829. /* USER CODE END 2 */
  2830. /* Infinite loop */
  2831. /* USER CODE BEGIN WHILE */
  2832. while (1)
  2833. 8001838: e7fe b.n 8001838 <main+0x218>
  2834. 800183a: bf00 nop
  2835. 800183c: 080079ac .word 0x080079ac
  2836. 8001840: 200002f0 .word 0x200002f0
  2837. 8001844: 20001430 .word 0x20001430
  2838. 8001848: 080079b0 .word 0x080079b0
  2839. 800184c: 080079d4 .word 0x080079d4
  2840. 8001850: 080079f0 .word 0x080079f0
  2841. 8001854: 20001434 .word 0x20001434
  2842. 8001858: 08007a00 .word 0x08007a00
  2843. 800185c: 08007a10 .word 0x08007a10
  2844. 8001860: 20001394 .word 0x20001394
  2845. 8001864: 200002ec .word 0x200002ec
  2846. 8001868: 3fe00000 .word 0x3fe00000
  2847. 800186c: 20001328 .word 0x20001328
  2848. 8001870: 20001390 .word 0x20001390
  2849. 8001874: 08007a28 .word 0x08007a28
  2850. 8001878: 08007a2c .word 0x08007a2c
  2851. 800187c: 08007a3c .word 0x08007a3c
  2852. 8001880: 08007a40 .word 0x08007a40
  2853. 8001884: 08007a68 .word 0x08007a68
  2854. 8001888: 08007a78 .word 0x08007a78
  2855. 800188c: 08007a8c .word 0x08007a8c
  2856. 8001890: 2000132c .word 0x2000132c
  2857. 8001894: 08007aa4 .word 0x08007aa4
  2858. 8001898: 08007abc .word 0x08007abc
  2859. 0800189c <SystemClock_Config>:
  2860. /**
  2861. * @brief System Clock Configuration
  2862. * @retval None
  2863. */
  2864. void SystemClock_Config(void)
  2865. {
  2866. 800189c: b580 push {r7, lr}
  2867. 800189e: b092 sub sp, #72 ; 0x48
  2868. 80018a0: af00 add r7, sp, #0
  2869. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  2870. 80018a2: f107 0314 add.w r3, r7, #20
  2871. 80018a6: 2234 movs r2, #52 ; 0x34
  2872. 80018a8: 2100 movs r1, #0
  2873. 80018aa: 4618 mov r0, r3
  2874. 80018ac: f005 fc50 bl 8007150 <memset>
  2875. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  2876. 80018b0: 463b mov r3, r7
  2877. 80018b2: 2200 movs r2, #0
  2878. 80018b4: 601a str r2, [r3, #0]
  2879. 80018b6: 605a str r2, [r3, #4]
  2880. 80018b8: 609a str r2, [r3, #8]
  2881. 80018ba: 60da str r2, [r3, #12]
  2882. 80018bc: 611a str r2, [r3, #16]
  2883. /** Configure the main internal regulator output voltage
  2884. */
  2885. __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
  2886. 80018be: 4b1d ldr r3, [pc, #116] ; (8001934 <SystemClock_Config+0x98>)
  2887. 80018c0: 681b ldr r3, [r3, #0]
  2888. 80018c2: f423 53c0 bic.w r3, r3, #6144 ; 0x1800
  2889. 80018c6: 4a1b ldr r2, [pc, #108] ; (8001934 <SystemClock_Config+0x98>)
  2890. 80018c8: f443 6300 orr.w r3, r3, #2048 ; 0x800
  2891. 80018cc: 6013 str r3, [r2, #0]
  2892. /** Initializes the RCC Oscillators according to the specified parameters
  2893. * in the RCC_OscInitTypeDef structure.
  2894. */
  2895. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
  2896. 80018ce: 2302 movs r3, #2
  2897. 80018d0: 617b str r3, [r7, #20]
  2898. RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  2899. 80018d2: 2301 movs r3, #1
  2900. 80018d4: 623b str r3, [r7, #32]
  2901. RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  2902. 80018d6: 2310 movs r3, #16
  2903. 80018d8: 627b str r3, [r7, #36] ; 0x24
  2904. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  2905. 80018da: 2302 movs r3, #2
  2906. 80018dc: 63bb str r3, [r7, #56] ; 0x38
  2907. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
  2908. 80018de: 2300 movs r3, #0
  2909. 80018e0: 63fb str r3, [r7, #60] ; 0x3c
  2910. RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
  2911. 80018e2: f44f 2300 mov.w r3, #524288 ; 0x80000
  2912. 80018e6: 643b str r3, [r7, #64] ; 0x40
  2913. RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3;
  2914. 80018e8: f44f 0300 mov.w r3, #8388608 ; 0x800000
  2915. 80018ec: 647b str r3, [r7, #68] ; 0x44
  2916. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  2917. 80018ee: f107 0314 add.w r3, r7, #20
  2918. 80018f2: 4618 mov r0, r3
  2919. 80018f4: f000 fd78 bl 80023e8 <HAL_RCC_OscConfig>
  2920. 80018f8: 4603 mov r3, r0
  2921. 80018fa: 2b00 cmp r3, #0
  2922. 80018fc: d001 beq.n 8001902 <SystemClock_Config+0x66>
  2923. {
  2924. Error_Handler();
  2925. 80018fe: f000 f8e3 bl 8001ac8 <Error_Handler>
  2926. }
  2927. /** Initializes the CPU, AHB and APB buses clocks
  2928. */
  2929. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  2930. 8001902: 230f movs r3, #15
  2931. 8001904: 603b str r3, [r7, #0]
  2932. |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  2933. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  2934. 8001906: 2303 movs r3, #3
  2935. 8001908: 607b str r3, [r7, #4]
  2936. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  2937. 800190a: 2300 movs r3, #0
  2938. 800190c: 60bb str r3, [r7, #8]
  2939. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  2940. 800190e: 2300 movs r3, #0
  2941. 8001910: 60fb str r3, [r7, #12]
  2942. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  2943. 8001912: 2300 movs r3, #0
  2944. 8001914: 613b str r3, [r7, #16]
  2945. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
  2946. 8001916: 463b mov r3, r7
  2947. 8001918: 2101 movs r1, #1
  2948. 800191a: 4618 mov r0, r3
  2949. 800191c: f001 f894 bl 8002a48 <HAL_RCC_ClockConfig>
  2950. 8001920: 4603 mov r3, r0
  2951. 8001922: 2b00 cmp r3, #0
  2952. 8001924: d001 beq.n 800192a <SystemClock_Config+0x8e>
  2953. {
  2954. Error_Handler();
  2955. 8001926: f000 f8cf bl 8001ac8 <Error_Handler>
  2956. }
  2957. }
  2958. 800192a: bf00 nop
  2959. 800192c: 3748 adds r7, #72 ; 0x48
  2960. 800192e: 46bd mov sp, r7
  2961. 8001930: bd80 pop {r7, pc}
  2962. 8001932: bf00 nop
  2963. 8001934: 40007000 .word 0x40007000
  2964. 08001938 <MX_SPI1_Init>:
  2965. * @brief SPI1 Initialization Function
  2966. * @param None
  2967. * @retval None
  2968. */
  2969. static void MX_SPI1_Init(void)
  2970. {
  2971. 8001938: b580 push {r7, lr}
  2972. 800193a: af00 add r7, sp, #0
  2973. /* USER CODE BEGIN SPI1_Init 1 */
  2974. /* USER CODE END SPI1_Init 1 */
  2975. /* SPI1 parameter configuration*/
  2976. hspi1.Instance = SPI1;
  2977. 800193c: 4b17 ldr r3, [pc, #92] ; (800199c <MX_SPI1_Init+0x64>)
  2978. 800193e: 4a18 ldr r2, [pc, #96] ; (80019a0 <MX_SPI1_Init+0x68>)
  2979. 8001940: 601a str r2, [r3, #0]
  2980. hspi1.Init.Mode = SPI_MODE_MASTER;
  2981. 8001942: 4b16 ldr r3, [pc, #88] ; (800199c <MX_SPI1_Init+0x64>)
  2982. 8001944: f44f 7282 mov.w r2, #260 ; 0x104
  2983. 8001948: 605a str r2, [r3, #4]
  2984. hspi1.Init.Direction = SPI_DIRECTION_2LINES;
  2985. 800194a: 4b14 ldr r3, [pc, #80] ; (800199c <MX_SPI1_Init+0x64>)
  2986. 800194c: 2200 movs r2, #0
  2987. 800194e: 609a str r2, [r3, #8]
  2988. hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
  2989. 8001950: 4b12 ldr r3, [pc, #72] ; (800199c <MX_SPI1_Init+0x64>)
  2990. 8001952: 2200 movs r2, #0
  2991. 8001954: 60da str r2, [r3, #12]
  2992. hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
  2993. 8001956: 4b11 ldr r3, [pc, #68] ; (800199c <MX_SPI1_Init+0x64>)
  2994. 8001958: 2200 movs r2, #0
  2995. 800195a: 611a str r2, [r3, #16]
  2996. hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
  2997. 800195c: 4b0f ldr r3, [pc, #60] ; (800199c <MX_SPI1_Init+0x64>)
  2998. 800195e: 2200 movs r2, #0
  2999. 8001960: 615a str r2, [r3, #20]
  3000. hspi1.Init.NSS = SPI_NSS_SOFT;
  3001. 8001962: 4b0e ldr r3, [pc, #56] ; (800199c <MX_SPI1_Init+0x64>)
  3002. 8001964: f44f 7200 mov.w r2, #512 ; 0x200
  3003. 8001968: 619a str r2, [r3, #24]
  3004. hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
  3005. 800196a: 4b0c ldr r3, [pc, #48] ; (800199c <MX_SPI1_Init+0x64>)
  3006. 800196c: 2208 movs r2, #8
  3007. 800196e: 61da str r2, [r3, #28]
  3008. hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
  3009. 8001970: 4b0a ldr r3, [pc, #40] ; (800199c <MX_SPI1_Init+0x64>)
  3010. 8001972: 2200 movs r2, #0
  3011. 8001974: 621a str r2, [r3, #32]
  3012. hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
  3013. 8001976: 4b09 ldr r3, [pc, #36] ; (800199c <MX_SPI1_Init+0x64>)
  3014. 8001978: 2200 movs r2, #0
  3015. 800197a: 625a str r2, [r3, #36] ; 0x24
  3016. hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
  3017. 800197c: 4b07 ldr r3, [pc, #28] ; (800199c <MX_SPI1_Init+0x64>)
  3018. 800197e: 2200 movs r2, #0
  3019. 8001980: 629a str r2, [r3, #40] ; 0x28
  3020. hspi1.Init.CRCPolynomial = 10;
  3021. 8001982: 4b06 ldr r3, [pc, #24] ; (800199c <MX_SPI1_Init+0x64>)
  3022. 8001984: 220a movs r2, #10
  3023. 8001986: 62da str r2, [r3, #44] ; 0x2c
  3024. if (HAL_SPI_Init(&hspi1) != HAL_OK)
  3025. 8001988: 4804 ldr r0, [pc, #16] ; (800199c <MX_SPI1_Init+0x64>)
  3026. 800198a: f001 faed bl 8002f68 <HAL_SPI_Init>
  3027. 800198e: 4603 mov r3, r0
  3028. 8001990: 2b00 cmp r3, #0
  3029. 8001992: d001 beq.n 8001998 <MX_SPI1_Init+0x60>
  3030. {
  3031. Error_Handler();
  3032. 8001994: f000 f898 bl 8001ac8 <Error_Handler>
  3033. }
  3034. /* USER CODE BEGIN SPI1_Init 2 */
  3035. /* USER CODE END SPI1_Init 2 */
  3036. }
  3037. 8001998: bf00 nop
  3038. 800199a: bd80 pop {r7, pc}
  3039. 800199c: 20001398 .word 0x20001398
  3040. 80019a0: 40013000 .word 0x40013000
  3041. 080019a4 <MX_USART2_UART_Init>:
  3042. * @brief USART2 Initialization Function
  3043. * @param None
  3044. * @retval None
  3045. */
  3046. static void MX_USART2_UART_Init(void)
  3047. {
  3048. 80019a4: b580 push {r7, lr}
  3049. 80019a6: af00 add r7, sp, #0
  3050. /* USER CODE END USART2_Init 0 */
  3051. /* USER CODE BEGIN USART2_Init 1 */
  3052. /* USER CODE END USART2_Init 1 */
  3053. huart2.Instance = USART2;
  3054. 80019a8: 4b11 ldr r3, [pc, #68] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3055. 80019aa: 4a12 ldr r2, [pc, #72] ; (80019f4 <MX_USART2_UART_Init+0x50>)
  3056. 80019ac: 601a str r2, [r3, #0]
  3057. huart2.Init.BaudRate = 115200;
  3058. 80019ae: 4b10 ldr r3, [pc, #64] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3059. 80019b0: f44f 32e1 mov.w r2, #115200 ; 0x1c200
  3060. 80019b4: 605a str r2, [r3, #4]
  3061. huart2.Init.WordLength = UART_WORDLENGTH_8B;
  3062. 80019b6: 4b0e ldr r3, [pc, #56] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3063. 80019b8: 2200 movs r2, #0
  3064. 80019ba: 609a str r2, [r3, #8]
  3065. huart2.Init.StopBits = UART_STOPBITS_1;
  3066. 80019bc: 4b0c ldr r3, [pc, #48] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3067. 80019be: 2200 movs r2, #0
  3068. 80019c0: 60da str r2, [r3, #12]
  3069. huart2.Init.Parity = UART_PARITY_NONE;
  3070. 80019c2: 4b0b ldr r3, [pc, #44] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3071. 80019c4: 2200 movs r2, #0
  3072. 80019c6: 611a str r2, [r3, #16]
  3073. huart2.Init.Mode = UART_MODE_TX_RX;
  3074. 80019c8: 4b09 ldr r3, [pc, #36] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3075. 80019ca: 220c movs r2, #12
  3076. 80019cc: 615a str r2, [r3, #20]
  3077. huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  3078. 80019ce: 4b08 ldr r3, [pc, #32] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3079. 80019d0: 2200 movs r2, #0
  3080. 80019d2: 619a str r2, [r3, #24]
  3081. huart2.Init.OverSampling = UART_OVERSAMPLING_16;
  3082. 80019d4: 4b06 ldr r3, [pc, #24] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3083. 80019d6: 2200 movs r2, #0
  3084. 80019d8: 61da str r2, [r3, #28]
  3085. if (HAL_UART_Init(&huart2) != HAL_OK)
  3086. 80019da: 4805 ldr r0, [pc, #20] ; (80019f0 <MX_USART2_UART_Init+0x4c>)
  3087. 80019dc: f001 fef6 bl 80037cc <HAL_UART_Init>
  3088. 80019e0: 4603 mov r3, r0
  3089. 80019e2: 2b00 cmp r3, #0
  3090. 80019e4: d001 beq.n 80019ea <MX_USART2_UART_Init+0x46>
  3091. {
  3092. Error_Handler();
  3093. 80019e6: f000 f86f bl 8001ac8 <Error_Handler>
  3094. }
  3095. /* USER CODE BEGIN USART2_Init 2 */
  3096. /* USER CODE END USART2_Init 2 */
  3097. }
  3098. 80019ea: bf00 nop
  3099. 80019ec: bd80 pop {r7, pc}
  3100. 80019ee: bf00 nop
  3101. 80019f0: 200013f0 .word 0x200013f0
  3102. 80019f4: 40004400 .word 0x40004400
  3103. 080019f8 <MX_GPIO_Init>:
  3104. * @brief GPIO Initialization Function
  3105. * @param None
  3106. * @retval None
  3107. */
  3108. static void MX_GPIO_Init(void)
  3109. {
  3110. 80019f8: b580 push {r7, lr}
  3111. 80019fa: b08a sub sp, #40 ; 0x28
  3112. 80019fc: af00 add r7, sp, #0
  3113. GPIO_InitTypeDef GPIO_InitStruct = {0};
  3114. 80019fe: f107 0314 add.w r3, r7, #20
  3115. 8001a02: 2200 movs r2, #0
  3116. 8001a04: 601a str r2, [r3, #0]
  3117. 8001a06: 605a str r2, [r3, #4]
  3118. 8001a08: 609a str r2, [r3, #8]
  3119. 8001a0a: 60da str r2, [r3, #12]
  3120. 8001a0c: 611a str r2, [r3, #16]
  3121. /* GPIO Ports Clock Enable */
  3122. __HAL_RCC_GPIOC_CLK_ENABLE();
  3123. 8001a0e: 4b2a ldr r3, [pc, #168] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3124. 8001a10: 69db ldr r3, [r3, #28]
  3125. 8001a12: 4a29 ldr r2, [pc, #164] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3126. 8001a14: f043 0304 orr.w r3, r3, #4
  3127. 8001a18: 61d3 str r3, [r2, #28]
  3128. 8001a1a: 4b27 ldr r3, [pc, #156] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3129. 8001a1c: 69db ldr r3, [r3, #28]
  3130. 8001a1e: f003 0304 and.w r3, r3, #4
  3131. 8001a22: 613b str r3, [r7, #16]
  3132. 8001a24: 693b ldr r3, [r7, #16]
  3133. __HAL_RCC_GPIOH_CLK_ENABLE();
  3134. 8001a26: 4b24 ldr r3, [pc, #144] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3135. 8001a28: 69db ldr r3, [r3, #28]
  3136. 8001a2a: 4a23 ldr r2, [pc, #140] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3137. 8001a2c: f043 0320 orr.w r3, r3, #32
  3138. 8001a30: 61d3 str r3, [r2, #28]
  3139. 8001a32: 4b21 ldr r3, [pc, #132] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3140. 8001a34: 69db ldr r3, [r3, #28]
  3141. 8001a36: f003 0320 and.w r3, r3, #32
  3142. 8001a3a: 60fb str r3, [r7, #12]
  3143. 8001a3c: 68fb ldr r3, [r7, #12]
  3144. __HAL_RCC_GPIOA_CLK_ENABLE();
  3145. 8001a3e: 4b1e ldr r3, [pc, #120] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3146. 8001a40: 69db ldr r3, [r3, #28]
  3147. 8001a42: 4a1d ldr r2, [pc, #116] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3148. 8001a44: f043 0301 orr.w r3, r3, #1
  3149. 8001a48: 61d3 str r3, [r2, #28]
  3150. 8001a4a: 4b1b ldr r3, [pc, #108] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3151. 8001a4c: 69db ldr r3, [r3, #28]
  3152. 8001a4e: f003 0301 and.w r3, r3, #1
  3153. 8001a52: 60bb str r3, [r7, #8]
  3154. 8001a54: 68bb ldr r3, [r7, #8]
  3155. __HAL_RCC_GPIOB_CLK_ENABLE();
  3156. 8001a56: 4b18 ldr r3, [pc, #96] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3157. 8001a58: 69db ldr r3, [r3, #28]
  3158. 8001a5a: 4a17 ldr r2, [pc, #92] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3159. 8001a5c: f043 0302 orr.w r3, r3, #2
  3160. 8001a60: 61d3 str r3, [r2, #28]
  3161. 8001a62: 4b15 ldr r3, [pc, #84] ; (8001ab8 <MX_GPIO_Init+0xc0>)
  3162. 8001a64: 69db ldr r3, [r3, #28]
  3163. 8001a66: f003 0302 and.w r3, r3, #2
  3164. 8001a6a: 607b str r3, [r7, #4]
  3165. 8001a6c: 687b ldr r3, [r7, #4]
  3166. /*Configure GPIO pin Output Level */
  3167. HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET);
  3168. 8001a6e: 2201 movs r2, #1
  3169. 8001a70: 2140 movs r1, #64 ; 0x40
  3170. 8001a72: 4812 ldr r0, [pc, #72] ; (8001abc <MX_GPIO_Init+0xc4>)
  3171. 8001a74: f000 fca0 bl 80023b8 <HAL_GPIO_WritePin>
  3172. /*Configure GPIO pin : B1_Pin */
  3173. GPIO_InitStruct.Pin = B1_Pin;
  3174. 8001a78: f44f 5300 mov.w r3, #8192 ; 0x2000
  3175. 8001a7c: 617b str r3, [r7, #20]
  3176. GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
  3177. 8001a7e: 4b10 ldr r3, [pc, #64] ; (8001ac0 <MX_GPIO_Init+0xc8>)
  3178. 8001a80: 61bb str r3, [r7, #24]
  3179. GPIO_InitStruct.Pull = GPIO_NOPULL;
  3180. 8001a82: 2300 movs r3, #0
  3181. 8001a84: 61fb str r3, [r7, #28]
  3182. HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
  3183. 8001a86: f107 0314 add.w r3, r7, #20
  3184. 8001a8a: 4619 mov r1, r3
  3185. 8001a8c: 480d ldr r0, [pc, #52] ; (8001ac4 <MX_GPIO_Init+0xcc>)
  3186. 8001a8e: f000 fb05 bl 800209c <HAL_GPIO_Init>
  3187. /*Configure GPIO pin : PB6 */
  3188. GPIO_InitStruct.Pin = GPIO_PIN_6;
  3189. 8001a92: 2340 movs r3, #64 ; 0x40
  3190. 8001a94: 617b str r3, [r7, #20]
  3191. GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  3192. 8001a96: 2301 movs r3, #1
  3193. 8001a98: 61bb str r3, [r7, #24]
  3194. GPIO_InitStruct.Pull = GPIO_NOPULL;
  3195. 8001a9a: 2300 movs r3, #0
  3196. 8001a9c: 61fb str r3, [r7, #28]
  3197. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
  3198. 8001a9e: 2302 movs r3, #2
  3199. 8001aa0: 623b str r3, [r7, #32]
  3200. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  3201. 8001aa2: f107 0314 add.w r3, r7, #20
  3202. 8001aa6: 4619 mov r1, r3
  3203. 8001aa8: 4804 ldr r0, [pc, #16] ; (8001abc <MX_GPIO_Init+0xc4>)
  3204. 8001aaa: f000 faf7 bl 800209c <HAL_GPIO_Init>
  3205. }
  3206. 8001aae: bf00 nop
  3207. 8001ab0: 3728 adds r7, #40 ; 0x28
  3208. 8001ab2: 46bd mov sp, r7
  3209. 8001ab4: bd80 pop {r7, pc}
  3210. 8001ab6: bf00 nop
  3211. 8001ab8: 40023800 .word 0x40023800
  3212. 8001abc: 40020400 .word 0x40020400
  3213. 8001ac0: 10110000 .word 0x10110000
  3214. 8001ac4: 40020800 .word 0x40020800
  3215. 08001ac8 <Error_Handler>:
  3216. /**
  3217. * @brief This function is executed in case of error occurrence.
  3218. * @retval None
  3219. */
  3220. void Error_Handler(void)
  3221. {
  3222. 8001ac8: b480 push {r7}
  3223. 8001aca: af00 add r7, sp, #0
  3224. /* USER CODE BEGIN Error_Handler_Debug */
  3225. /* User can add his own implementation to report the HAL error return state */
  3226. /* USER CODE END Error_Handler_Debug */
  3227. }
  3228. 8001acc: bf00 nop
  3229. 8001ace: 46bd mov sp, r7
  3230. 8001ad0: bc80 pop {r7}
  3231. 8001ad2: 4770 bx lr
  3232. 08001ad4 <HAL_MspInit>:
  3233. /* USER CODE END 0 */
  3234. /**
  3235. * Initializes the Global MSP.
  3236. */
  3237. void HAL_MspInit(void)
  3238. {
  3239. 8001ad4: b580 push {r7, lr}
  3240. 8001ad6: b084 sub sp, #16
  3241. 8001ad8: af00 add r7, sp, #0
  3242. /* USER CODE BEGIN MspInit 0 */
  3243. /* USER CODE END MspInit 0 */
  3244. __HAL_RCC_COMP_CLK_ENABLE();
  3245. 8001ada: 4b15 ldr r3, [pc, #84] ; (8001b30 <HAL_MspInit+0x5c>)
  3246. 8001adc: 6a5b ldr r3, [r3, #36] ; 0x24
  3247. 8001ade: 4a14 ldr r2, [pc, #80] ; (8001b30 <HAL_MspInit+0x5c>)
  3248. 8001ae0: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
  3249. 8001ae4: 6253 str r3, [r2, #36] ; 0x24
  3250. 8001ae6: 4b12 ldr r3, [pc, #72] ; (8001b30 <HAL_MspInit+0x5c>)
  3251. 8001ae8: 6a5b ldr r3, [r3, #36] ; 0x24
  3252. 8001aea: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
  3253. 8001aee: 60fb str r3, [r7, #12]
  3254. 8001af0: 68fb ldr r3, [r7, #12]
  3255. __HAL_RCC_SYSCFG_CLK_ENABLE();
  3256. 8001af2: 4b0f ldr r3, [pc, #60] ; (8001b30 <HAL_MspInit+0x5c>)
  3257. 8001af4: 6a1b ldr r3, [r3, #32]
  3258. 8001af6: 4a0e ldr r2, [pc, #56] ; (8001b30 <HAL_MspInit+0x5c>)
  3259. 8001af8: f043 0301 orr.w r3, r3, #1
  3260. 8001afc: 6213 str r3, [r2, #32]
  3261. 8001afe: 4b0c ldr r3, [pc, #48] ; (8001b30 <HAL_MspInit+0x5c>)
  3262. 8001b00: 6a1b ldr r3, [r3, #32]
  3263. 8001b02: f003 0301 and.w r3, r3, #1
  3264. 8001b06: 60bb str r3, [r7, #8]
  3265. 8001b08: 68bb ldr r3, [r7, #8]
  3266. __HAL_RCC_PWR_CLK_ENABLE();
  3267. 8001b0a: 4b09 ldr r3, [pc, #36] ; (8001b30 <HAL_MspInit+0x5c>)
  3268. 8001b0c: 6a5b ldr r3, [r3, #36] ; 0x24
  3269. 8001b0e: 4a08 ldr r2, [pc, #32] ; (8001b30 <HAL_MspInit+0x5c>)
  3270. 8001b10: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
  3271. 8001b14: 6253 str r3, [r2, #36] ; 0x24
  3272. 8001b16: 4b06 ldr r3, [pc, #24] ; (8001b30 <HAL_MspInit+0x5c>)
  3273. 8001b18: 6a5b ldr r3, [r3, #36] ; 0x24
  3274. 8001b1a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  3275. 8001b1e: 607b str r3, [r7, #4]
  3276. 8001b20: 687b ldr r3, [r7, #4]
  3277. HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
  3278. 8001b22: 2007 movs r0, #7
  3279. 8001b24: f000 fa7a bl 800201c <HAL_NVIC_SetPriorityGrouping>
  3280. /* System interrupt init*/
  3281. /* USER CODE BEGIN MspInit 1 */
  3282. /* USER CODE END MspInit 1 */
  3283. }
  3284. 8001b28: bf00 nop
  3285. 8001b2a: 3710 adds r7, #16
  3286. 8001b2c: 46bd mov sp, r7
  3287. 8001b2e: bd80 pop {r7, pc}
  3288. 8001b30: 40023800 .word 0x40023800
  3289. 08001b34 <HAL_SPI_MspInit>:
  3290. * This function configures the hardware resources used in this example
  3291. * @param hspi: SPI handle pointer
  3292. * @retval None
  3293. */
  3294. void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
  3295. {
  3296. 8001b34: b580 push {r7, lr}
  3297. 8001b36: b08a sub sp, #40 ; 0x28
  3298. 8001b38: af00 add r7, sp, #0
  3299. 8001b3a: 6078 str r0, [r7, #4]
  3300. GPIO_InitTypeDef GPIO_InitStruct = {0};
  3301. 8001b3c: f107 0314 add.w r3, r7, #20
  3302. 8001b40: 2200 movs r2, #0
  3303. 8001b42: 601a str r2, [r3, #0]
  3304. 8001b44: 605a str r2, [r3, #4]
  3305. 8001b46: 609a str r2, [r3, #8]
  3306. 8001b48: 60da str r2, [r3, #12]
  3307. 8001b4a: 611a str r2, [r3, #16]
  3308. if(hspi->Instance==SPI1)
  3309. 8001b4c: 687b ldr r3, [r7, #4]
  3310. 8001b4e: 681b ldr r3, [r3, #0]
  3311. 8001b50: 4a17 ldr r2, [pc, #92] ; (8001bb0 <HAL_SPI_MspInit+0x7c>)
  3312. 8001b52: 4293 cmp r3, r2
  3313. 8001b54: d127 bne.n 8001ba6 <HAL_SPI_MspInit+0x72>
  3314. {
  3315. /* USER CODE BEGIN SPI1_MspInit 0 */
  3316. /* USER CODE END SPI1_MspInit 0 */
  3317. /* Peripheral clock enable */
  3318. __HAL_RCC_SPI1_CLK_ENABLE();
  3319. 8001b56: 4b17 ldr r3, [pc, #92] ; (8001bb4 <HAL_SPI_MspInit+0x80>)
  3320. 8001b58: 6a1b ldr r3, [r3, #32]
  3321. 8001b5a: 4a16 ldr r2, [pc, #88] ; (8001bb4 <HAL_SPI_MspInit+0x80>)
  3322. 8001b5c: f443 5380 orr.w r3, r3, #4096 ; 0x1000
  3323. 8001b60: 6213 str r3, [r2, #32]
  3324. 8001b62: 4b14 ldr r3, [pc, #80] ; (8001bb4 <HAL_SPI_MspInit+0x80>)
  3325. 8001b64: 6a1b ldr r3, [r3, #32]
  3326. 8001b66: f403 5380 and.w r3, r3, #4096 ; 0x1000
  3327. 8001b6a: 613b str r3, [r7, #16]
  3328. 8001b6c: 693b ldr r3, [r7, #16]
  3329. __HAL_RCC_GPIOA_CLK_ENABLE();
  3330. 8001b6e: 4b11 ldr r3, [pc, #68] ; (8001bb4 <HAL_SPI_MspInit+0x80>)
  3331. 8001b70: 69db ldr r3, [r3, #28]
  3332. 8001b72: 4a10 ldr r2, [pc, #64] ; (8001bb4 <HAL_SPI_MspInit+0x80>)
  3333. 8001b74: f043 0301 orr.w r3, r3, #1
  3334. 8001b78: 61d3 str r3, [r2, #28]
  3335. 8001b7a: 4b0e ldr r3, [pc, #56] ; (8001bb4 <HAL_SPI_MspInit+0x80>)
  3336. 8001b7c: 69db ldr r3, [r3, #28]
  3337. 8001b7e: f003 0301 and.w r3, r3, #1
  3338. 8001b82: 60fb str r3, [r7, #12]
  3339. 8001b84: 68fb ldr r3, [r7, #12]
  3340. /**SPI1 GPIO Configuration
  3341. PA5 ------> SPI1_SCK
  3342. PA6 ------> SPI1_MISO
  3343. PA7 ------> SPI1_MOSI
  3344. */
  3345. GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
  3346. 8001b86: 23e0 movs r3, #224 ; 0xe0
  3347. 8001b88: 617b str r3, [r7, #20]
  3348. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  3349. 8001b8a: 2302 movs r3, #2
  3350. 8001b8c: 61bb str r3, [r7, #24]
  3351. GPIO_InitStruct.Pull = GPIO_NOPULL;
  3352. 8001b8e: 2300 movs r3, #0
  3353. 8001b90: 61fb str r3, [r7, #28]
  3354. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  3355. 8001b92: 2303 movs r3, #3
  3356. 8001b94: 623b str r3, [r7, #32]
  3357. GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
  3358. 8001b96: 2305 movs r3, #5
  3359. 8001b98: 627b str r3, [r7, #36] ; 0x24
  3360. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  3361. 8001b9a: f107 0314 add.w r3, r7, #20
  3362. 8001b9e: 4619 mov r1, r3
  3363. 8001ba0: 4805 ldr r0, [pc, #20] ; (8001bb8 <HAL_SPI_MspInit+0x84>)
  3364. 8001ba2: f000 fa7b bl 800209c <HAL_GPIO_Init>
  3365. /* USER CODE BEGIN SPI1_MspInit 1 */
  3366. /* USER CODE END SPI1_MspInit 1 */
  3367. }
  3368. }
  3369. 8001ba6: bf00 nop
  3370. 8001ba8: 3728 adds r7, #40 ; 0x28
  3371. 8001baa: 46bd mov sp, r7
  3372. 8001bac: bd80 pop {r7, pc}
  3373. 8001bae: bf00 nop
  3374. 8001bb0: 40013000 .word 0x40013000
  3375. 8001bb4: 40023800 .word 0x40023800
  3376. 8001bb8: 40020000 .word 0x40020000
  3377. 08001bbc <HAL_UART_MspInit>:
  3378. * This function configures the hardware resources used in this example
  3379. * @param huart: UART handle pointer
  3380. * @retval None
  3381. */
  3382. void HAL_UART_MspInit(UART_HandleTypeDef* huart)
  3383. {
  3384. 8001bbc: b580 push {r7, lr}
  3385. 8001bbe: b08a sub sp, #40 ; 0x28
  3386. 8001bc0: af00 add r7, sp, #0
  3387. 8001bc2: 6078 str r0, [r7, #4]
  3388. GPIO_InitTypeDef GPIO_InitStruct = {0};
  3389. 8001bc4: f107 0314 add.w r3, r7, #20
  3390. 8001bc8: 2200 movs r2, #0
  3391. 8001bca: 601a str r2, [r3, #0]
  3392. 8001bcc: 605a str r2, [r3, #4]
  3393. 8001bce: 609a str r2, [r3, #8]
  3394. 8001bd0: 60da str r2, [r3, #12]
  3395. 8001bd2: 611a str r2, [r3, #16]
  3396. if(huart->Instance==USART2)
  3397. 8001bd4: 687b ldr r3, [r7, #4]
  3398. 8001bd6: 681b ldr r3, [r3, #0]
  3399. 8001bd8: 4a17 ldr r2, [pc, #92] ; (8001c38 <HAL_UART_MspInit+0x7c>)
  3400. 8001bda: 4293 cmp r3, r2
  3401. 8001bdc: d127 bne.n 8001c2e <HAL_UART_MspInit+0x72>
  3402. {
  3403. /* USER CODE BEGIN USART2_MspInit 0 */
  3404. /* USER CODE END USART2_MspInit 0 */
  3405. /* Peripheral clock enable */
  3406. __HAL_RCC_USART2_CLK_ENABLE();
  3407. 8001bde: 4b17 ldr r3, [pc, #92] ; (8001c3c <HAL_UART_MspInit+0x80>)
  3408. 8001be0: 6a5b ldr r3, [r3, #36] ; 0x24
  3409. 8001be2: 4a16 ldr r2, [pc, #88] ; (8001c3c <HAL_UART_MspInit+0x80>)
  3410. 8001be4: f443 3300 orr.w r3, r3, #131072 ; 0x20000
  3411. 8001be8: 6253 str r3, [r2, #36] ; 0x24
  3412. 8001bea: 4b14 ldr r3, [pc, #80] ; (8001c3c <HAL_UART_MspInit+0x80>)
  3413. 8001bec: 6a5b ldr r3, [r3, #36] ; 0x24
  3414. 8001bee: f403 3300 and.w r3, r3, #131072 ; 0x20000
  3415. 8001bf2: 613b str r3, [r7, #16]
  3416. 8001bf4: 693b ldr r3, [r7, #16]
  3417. __HAL_RCC_GPIOA_CLK_ENABLE();
  3418. 8001bf6: 4b11 ldr r3, [pc, #68] ; (8001c3c <HAL_UART_MspInit+0x80>)
  3419. 8001bf8: 69db ldr r3, [r3, #28]
  3420. 8001bfa: 4a10 ldr r2, [pc, #64] ; (8001c3c <HAL_UART_MspInit+0x80>)
  3421. 8001bfc: f043 0301 orr.w r3, r3, #1
  3422. 8001c00: 61d3 str r3, [r2, #28]
  3423. 8001c02: 4b0e ldr r3, [pc, #56] ; (8001c3c <HAL_UART_MspInit+0x80>)
  3424. 8001c04: 69db ldr r3, [r3, #28]
  3425. 8001c06: f003 0301 and.w r3, r3, #1
  3426. 8001c0a: 60fb str r3, [r7, #12]
  3427. 8001c0c: 68fb ldr r3, [r7, #12]
  3428. /**USART2 GPIO Configuration
  3429. PA2 ------> USART2_TX
  3430. PA3 ------> USART2_RX
  3431. */
  3432. GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
  3433. 8001c0e: 230c movs r3, #12
  3434. 8001c10: 617b str r3, [r7, #20]
  3435. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  3436. 8001c12: 2302 movs r3, #2
  3437. 8001c14: 61bb str r3, [r7, #24]
  3438. GPIO_InitStruct.Pull = GPIO_NOPULL;
  3439. 8001c16: 2300 movs r3, #0
  3440. 8001c18: 61fb str r3, [r7, #28]
  3441. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
  3442. 8001c1a: 2303 movs r3, #3
  3443. 8001c1c: 623b str r3, [r7, #32]
  3444. GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
  3445. 8001c1e: 2307 movs r3, #7
  3446. 8001c20: 627b str r3, [r7, #36] ; 0x24
  3447. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  3448. 8001c22: f107 0314 add.w r3, r7, #20
  3449. 8001c26: 4619 mov r1, r3
  3450. 8001c28: 4805 ldr r0, [pc, #20] ; (8001c40 <HAL_UART_MspInit+0x84>)
  3451. 8001c2a: f000 fa37 bl 800209c <HAL_GPIO_Init>
  3452. /* USER CODE BEGIN USART2_MspInit 1 */
  3453. /* USER CODE END USART2_MspInit 1 */
  3454. }
  3455. }
  3456. 8001c2e: bf00 nop
  3457. 8001c30: 3728 adds r7, #40 ; 0x28
  3458. 8001c32: 46bd mov sp, r7
  3459. 8001c34: bd80 pop {r7, pc}
  3460. 8001c36: bf00 nop
  3461. 8001c38: 40004400 .word 0x40004400
  3462. 8001c3c: 40023800 .word 0x40023800
  3463. 8001c40: 40020000 .word 0x40020000
  3464. 08001c44 <NMI_Handler>:
  3465. /******************************************************************************/
  3466. /**
  3467. * @brief This function handles Non maskable interrupt.
  3468. */
  3469. void NMI_Handler(void)
  3470. {
  3471. 8001c44: b480 push {r7}
  3472. 8001c46: af00 add r7, sp, #0
  3473. /* USER CODE END NonMaskableInt_IRQn 0 */
  3474. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  3475. /* USER CODE END NonMaskableInt_IRQn 1 */
  3476. }
  3477. 8001c48: bf00 nop
  3478. 8001c4a: 46bd mov sp, r7
  3479. 8001c4c: bc80 pop {r7}
  3480. 8001c4e: 4770 bx lr
  3481. 08001c50 <HardFault_Handler>:
  3482. /**
  3483. * @brief This function handles Hard fault interrupt.
  3484. */
  3485. void HardFault_Handler(void)
  3486. {
  3487. 8001c50: b480 push {r7}
  3488. 8001c52: af00 add r7, sp, #0
  3489. /* USER CODE BEGIN HardFault_IRQn 0 */
  3490. /* USER CODE END HardFault_IRQn 0 */
  3491. while (1)
  3492. 8001c54: e7fe b.n 8001c54 <HardFault_Handler+0x4>
  3493. 08001c56 <MemManage_Handler>:
  3494. /**
  3495. * @brief This function handles Memory management fault.
  3496. */
  3497. void MemManage_Handler(void)
  3498. {
  3499. 8001c56: b480 push {r7}
  3500. 8001c58: af00 add r7, sp, #0
  3501. /* USER CODE BEGIN MemoryManagement_IRQn 0 */
  3502. /* USER CODE END MemoryManagement_IRQn 0 */
  3503. while (1)
  3504. 8001c5a: e7fe b.n 8001c5a <MemManage_Handler+0x4>
  3505. 08001c5c <BusFault_Handler>:
  3506. /**
  3507. * @brief This function handles Pre-fetch fault, memory access fault.
  3508. */
  3509. void BusFault_Handler(void)
  3510. {
  3511. 8001c5c: b480 push {r7}
  3512. 8001c5e: af00 add r7, sp, #0
  3513. /* USER CODE BEGIN BusFault_IRQn 0 */
  3514. /* USER CODE END BusFault_IRQn 0 */
  3515. while (1)
  3516. 8001c60: e7fe b.n 8001c60 <BusFault_Handler+0x4>
  3517. 08001c62 <UsageFault_Handler>:
  3518. /**
  3519. * @brief This function handles Undefined instruction or illegal state.
  3520. */
  3521. void UsageFault_Handler(void)
  3522. {
  3523. 8001c62: b480 push {r7}
  3524. 8001c64: af00 add r7, sp, #0
  3525. /* USER CODE BEGIN UsageFault_IRQn 0 */
  3526. /* USER CODE END UsageFault_IRQn 0 */
  3527. while (1)
  3528. 8001c66: e7fe b.n 8001c66 <UsageFault_Handler+0x4>
  3529. 08001c68 <SVC_Handler>:
  3530. /**
  3531. * @brief This function handles System service call via SWI instruction.
  3532. */
  3533. void SVC_Handler(void)
  3534. {
  3535. 8001c68: b480 push {r7}
  3536. 8001c6a: af00 add r7, sp, #0
  3537. /* USER CODE END SVC_IRQn 0 */
  3538. /* USER CODE BEGIN SVC_IRQn 1 */
  3539. /* USER CODE END SVC_IRQn 1 */
  3540. }
  3541. 8001c6c: bf00 nop
  3542. 8001c6e: 46bd mov sp, r7
  3543. 8001c70: bc80 pop {r7}
  3544. 8001c72: 4770 bx lr
  3545. 08001c74 <DebugMon_Handler>:
  3546. /**
  3547. * @brief This function handles Debug monitor.
  3548. */
  3549. void DebugMon_Handler(void)
  3550. {
  3551. 8001c74: b480 push {r7}
  3552. 8001c76: af00 add r7, sp, #0
  3553. /* USER CODE END DebugMonitor_IRQn 0 */
  3554. /* USER CODE BEGIN DebugMonitor_IRQn 1 */
  3555. /* USER CODE END DebugMonitor_IRQn 1 */
  3556. }
  3557. 8001c78: bf00 nop
  3558. 8001c7a: 46bd mov sp, r7
  3559. 8001c7c: bc80 pop {r7}
  3560. 8001c7e: 4770 bx lr
  3561. 08001c80 <PendSV_Handler>:
  3562. /**
  3563. * @brief This function handles Pendable request for system service.
  3564. */
  3565. void PendSV_Handler(void)
  3566. {
  3567. 8001c80: b480 push {r7}
  3568. 8001c82: af00 add r7, sp, #0
  3569. /* USER CODE END PendSV_IRQn 0 */
  3570. /* USER CODE BEGIN PendSV_IRQn 1 */
  3571. /* USER CODE END PendSV_IRQn 1 */
  3572. }
  3573. 8001c84: bf00 nop
  3574. 8001c86: 46bd mov sp, r7
  3575. 8001c88: bc80 pop {r7}
  3576. 8001c8a: 4770 bx lr
  3577. 08001c8c <SysTick_Handler>:
  3578. /**
  3579. * @brief This function handles System tick timer.
  3580. */
  3581. void SysTick_Handler(void)
  3582. {
  3583. 8001c8c: b580 push {r7, lr}
  3584. 8001c8e: af00 add r7, sp, #0
  3585. /* USER CODE BEGIN SysTick_IRQn 0 */
  3586. if (Timer1 > 0){
  3587. 8001c90: 4b0c ldr r3, [pc, #48] ; (8001cc4 <SysTick_Handler+0x38>)
  3588. 8001c92: 881b ldrh r3, [r3, #0]
  3589. 8001c94: 2b00 cmp r3, #0
  3590. 8001c96: d005 beq.n 8001ca4 <SysTick_Handler+0x18>
  3591. Timer1--;
  3592. 8001c98: 4b0a ldr r3, [pc, #40] ; (8001cc4 <SysTick_Handler+0x38>)
  3593. 8001c9a: 881b ldrh r3, [r3, #0]
  3594. 8001c9c: 3b01 subs r3, #1
  3595. 8001c9e: b29a uxth r2, r3
  3596. 8001ca0: 4b08 ldr r3, [pc, #32] ; (8001cc4 <SysTick_Handler+0x38>)
  3597. 8001ca2: 801a strh r2, [r3, #0]
  3598. }
  3599. if (Timer2 > 0){
  3600. 8001ca4: 4b08 ldr r3, [pc, #32] ; (8001cc8 <SysTick_Handler+0x3c>)
  3601. 8001ca6: 881b ldrh r3, [r3, #0]
  3602. 8001ca8: 2b00 cmp r3, #0
  3603. 8001caa: d005 beq.n 8001cb8 <SysTick_Handler+0x2c>
  3604. Timer2--;
  3605. 8001cac: 4b06 ldr r3, [pc, #24] ; (8001cc8 <SysTick_Handler+0x3c>)
  3606. 8001cae: 881b ldrh r3, [r3, #0]
  3607. 8001cb0: 3b01 subs r3, #1
  3608. 8001cb2: b29a uxth r2, r3
  3609. 8001cb4: 4b04 ldr r3, [pc, #16] ; (8001cc8 <SysTick_Handler+0x3c>)
  3610. 8001cb6: 801a strh r2, [r3, #0]
  3611. }
  3612. /* USER CODE END SysTick_IRQn 0 */
  3613. HAL_IncTick();
  3614. 8001cb8: f000 f8c2 bl 8001e40 <HAL_IncTick>
  3615. /* USER CODE BEGIN SysTick_IRQn 1 */
  3616. HAL_SYSTICK_IRQHandler();
  3617. 8001cbc: f000 f9e1 bl 8002082 <HAL_SYSTICK_IRQHandler>
  3618. /* USER CODE END SysTick_IRQn 1 */
  3619. }
  3620. 8001cc0: bf00 nop
  3621. 8001cc2: bd80 pop {r7, pc}
  3622. 8001cc4: 200002ea .word 0x200002ea
  3623. 8001cc8: 200002e8 .word 0x200002e8
  3624. 08001ccc <_sbrk>:
  3625. *
  3626. * @param incr Memory size
  3627. * @return Pointer to allocated memory
  3628. */
  3629. void *_sbrk(ptrdiff_t incr)
  3630. {
  3631. 8001ccc: b580 push {r7, lr}
  3632. 8001cce: b086 sub sp, #24
  3633. 8001cd0: af00 add r7, sp, #0
  3634. 8001cd2: 6078 str r0, [r7, #4]
  3635. extern uint8_t _end; /* Symbol defined in the linker script */
  3636. extern uint8_t _estack; /* Symbol defined in the linker script */
  3637. extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
  3638. const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
  3639. 8001cd4: 4a14 ldr r2, [pc, #80] ; (8001d28 <_sbrk+0x5c>)
  3640. 8001cd6: 4b15 ldr r3, [pc, #84] ; (8001d2c <_sbrk+0x60>)
  3641. 8001cd8: 1ad3 subs r3, r2, r3
  3642. 8001cda: 617b str r3, [r7, #20]
  3643. const uint8_t *max_heap = (uint8_t *)stack_limit;
  3644. 8001cdc: 697b ldr r3, [r7, #20]
  3645. 8001cde: 613b str r3, [r7, #16]
  3646. uint8_t *prev_heap_end;
  3647. /* Initalize heap end at first call */
  3648. if (NULL == __sbrk_heap_end)
  3649. 8001ce0: 4b13 ldr r3, [pc, #76] ; (8001d30 <_sbrk+0x64>)
  3650. 8001ce2: 681b ldr r3, [r3, #0]
  3651. 8001ce4: 2b00 cmp r3, #0
  3652. 8001ce6: d102 bne.n 8001cee <_sbrk+0x22>
  3653. {
  3654. __sbrk_heap_end = &_end;
  3655. 8001ce8: 4b11 ldr r3, [pc, #68] ; (8001d30 <_sbrk+0x64>)
  3656. 8001cea: 4a12 ldr r2, [pc, #72] ; (8001d34 <_sbrk+0x68>)
  3657. 8001cec: 601a str r2, [r3, #0]
  3658. }
  3659. /* Protect heap from growing into the reserved MSP stack */
  3660. if (__sbrk_heap_end + incr > max_heap)
  3661. 8001cee: 4b10 ldr r3, [pc, #64] ; (8001d30 <_sbrk+0x64>)
  3662. 8001cf0: 681a ldr r2, [r3, #0]
  3663. 8001cf2: 687b ldr r3, [r7, #4]
  3664. 8001cf4: 4413 add r3, r2
  3665. 8001cf6: 693a ldr r2, [r7, #16]
  3666. 8001cf8: 429a cmp r2, r3
  3667. 8001cfa: d207 bcs.n 8001d0c <_sbrk+0x40>
  3668. {
  3669. errno = ENOMEM;
  3670. 8001cfc: f005 f9fe bl 80070fc <__errno>
  3671. 8001d00: 4602 mov r2, r0
  3672. 8001d02: 230c movs r3, #12
  3673. 8001d04: 6013 str r3, [r2, #0]
  3674. return (void *)-1;
  3675. 8001d06: f04f 33ff mov.w r3, #4294967295
  3676. 8001d0a: e009 b.n 8001d20 <_sbrk+0x54>
  3677. }
  3678. prev_heap_end = __sbrk_heap_end;
  3679. 8001d0c: 4b08 ldr r3, [pc, #32] ; (8001d30 <_sbrk+0x64>)
  3680. 8001d0e: 681b ldr r3, [r3, #0]
  3681. 8001d10: 60fb str r3, [r7, #12]
  3682. __sbrk_heap_end += incr;
  3683. 8001d12: 4b07 ldr r3, [pc, #28] ; (8001d30 <_sbrk+0x64>)
  3684. 8001d14: 681a ldr r2, [r3, #0]
  3685. 8001d16: 687b ldr r3, [r7, #4]
  3686. 8001d18: 4413 add r3, r2
  3687. 8001d1a: 4a05 ldr r2, [pc, #20] ; (8001d30 <_sbrk+0x64>)
  3688. 8001d1c: 6013 str r3, [r2, #0]
  3689. return (void *)prev_heap_end;
  3690. 8001d1e: 68fb ldr r3, [r7, #12]
  3691. }
  3692. 8001d20: 4618 mov r0, r3
  3693. 8001d22: 3718 adds r7, #24
  3694. 8001d24: 46bd mov sp, r7
  3695. 8001d26: bd80 pop {r7, pc}
  3696. 8001d28: 20014000 .word 0x20014000
  3697. 8001d2c: 00000400 .word 0x00000400
  3698. 8001d30: 200000a8 .word 0x200000a8
  3699. 8001d34: 200044e0 .word 0x200044e0
  3700. 08001d38 <SystemInit>:
  3701. * SystemCoreClock variable.
  3702. * @param None
  3703. * @retval None
  3704. */
  3705. void SystemInit (void)
  3706. {
  3707. 8001d38: b480 push {r7}
  3708. 8001d3a: af00 add r7, sp, #0
  3709. #endif /* DATA_IN_ExtSRAM */
  3710. #ifdef VECT_TAB_SRAM
  3711. SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
  3712. #else
  3713. SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
  3714. 8001d3c: 4b03 ldr r3, [pc, #12] ; (8001d4c <SystemInit+0x14>)
  3715. 8001d3e: f04f 6200 mov.w r2, #134217728 ; 0x8000000
  3716. 8001d42: 609a str r2, [r3, #8]
  3717. #endif
  3718. }
  3719. 8001d44: bf00 nop
  3720. 8001d46: 46bd mov sp, r7
  3721. 8001d48: bc80 pop {r7}
  3722. 8001d4a: 4770 bx lr
  3723. 8001d4c: e000ed00 .word 0xe000ed00
  3724. 08001d50 <Reset_Handler>:
  3725. .weak Reset_Handler
  3726. .type Reset_Handler, %function
  3727. Reset_Handler:
  3728. /* Copy the data segment initializers from flash to SRAM */
  3729. movs r1, #0
  3730. 8001d50: 2100 movs r1, #0
  3731. b LoopCopyDataInit
  3732. 8001d52: e003 b.n 8001d5c <LoopCopyDataInit>
  3733. 08001d54 <CopyDataInit>:
  3734. CopyDataInit:
  3735. ldr r3, =_sidata
  3736. 8001d54: 4b0b ldr r3, [pc, #44] ; (8001d84 <LoopFillZerobss+0x14>)
  3737. ldr r3, [r3, r1]
  3738. 8001d56: 585b ldr r3, [r3, r1]
  3739. str r3, [r0, r1]
  3740. 8001d58: 5043 str r3, [r0, r1]
  3741. adds r1, r1, #4
  3742. 8001d5a: 3104 adds r1, #4
  3743. 08001d5c <LoopCopyDataInit>:
  3744. LoopCopyDataInit:
  3745. ldr r0, =_sdata
  3746. 8001d5c: 480a ldr r0, [pc, #40] ; (8001d88 <LoopFillZerobss+0x18>)
  3747. ldr r3, =_edata
  3748. 8001d5e: 4b0b ldr r3, [pc, #44] ; (8001d8c <LoopFillZerobss+0x1c>)
  3749. adds r2, r0, r1
  3750. 8001d60: 1842 adds r2, r0, r1
  3751. cmp r2, r3
  3752. 8001d62: 429a cmp r2, r3
  3753. bcc CopyDataInit
  3754. 8001d64: d3f6 bcc.n 8001d54 <CopyDataInit>
  3755. ldr r2, =_sbss
  3756. 8001d66: 4a0a ldr r2, [pc, #40] ; (8001d90 <LoopFillZerobss+0x20>)
  3757. b LoopFillZerobss
  3758. 8001d68: e002 b.n 8001d70 <LoopFillZerobss>
  3759. 08001d6a <FillZerobss>:
  3760. /* Zero fill the bss segment. */
  3761. FillZerobss:
  3762. movs r3, #0
  3763. 8001d6a: 2300 movs r3, #0
  3764. str r3, [r2], #4
  3765. 8001d6c: f842 3b04 str.w r3, [r2], #4
  3766. 08001d70 <LoopFillZerobss>:
  3767. LoopFillZerobss:
  3768. ldr r3, = _ebss
  3769. 8001d70: 4b08 ldr r3, [pc, #32] ; (8001d94 <LoopFillZerobss+0x24>)
  3770. cmp r2, r3
  3771. 8001d72: 429a cmp r2, r3
  3772. bcc FillZerobss
  3773. 8001d74: d3f9 bcc.n 8001d6a <FillZerobss>
  3774. /* Call the clock system intitialization function.*/
  3775. bl SystemInit
  3776. 8001d76: f7ff ffdf bl 8001d38 <SystemInit>
  3777. /* Call static constructors */
  3778. bl __libc_init_array
  3779. 8001d7a: f005 f9c5 bl 8007108 <__libc_init_array>
  3780. /* Call the application's entry point.*/
  3781. bl main
  3782. 8001d7e: f7ff fc4f bl 8001620 <main>
  3783. bx lr
  3784. 8001d82: 4770 bx lr
  3785. ldr r3, =_sidata
  3786. 8001d84: 08007fcc .word 0x08007fcc
  3787. ldr r0, =_sdata
  3788. 8001d88: 20000000 .word 0x20000000
  3789. ldr r3, =_edata
  3790. 8001d8c: 20000088 .word 0x20000088
  3791. ldr r2, =_sbss
  3792. 8001d90: 20000088 .word 0x20000088
  3793. ldr r3, = _ebss
  3794. 8001d94: 200044dc .word 0x200044dc
  3795. 08001d98 <ADC1_IRQHandler>:
  3796. * @retval : None
  3797. */
  3798. .section .text.Default_Handler,"ax",%progbits
  3799. Default_Handler:
  3800. Infinite_Loop:
  3801. b Infinite_Loop
  3802. 8001d98: e7fe b.n 8001d98 <ADC1_IRQHandler>
  3803. 08001d9a <HAL_Init>:
  3804. * In the default implementation,Systick is used as source of time base.
  3805. * the tick variable is incremented each 1ms in its ISR.
  3806. * @retval HAL status
  3807. */
  3808. HAL_StatusTypeDef HAL_Init(void)
  3809. {
  3810. 8001d9a: b580 push {r7, lr}
  3811. 8001d9c: b082 sub sp, #8
  3812. 8001d9e: af00 add r7, sp, #0
  3813. HAL_StatusTypeDef status = HAL_OK;
  3814. 8001da0: 2300 movs r3, #0
  3815. 8001da2: 71fb strb r3, [r7, #7]
  3816. #if (PREFETCH_ENABLE != 0)
  3817. __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
  3818. #endif /* PREFETCH_ENABLE */
  3819. /* Set Interrupt Group Priority */
  3820. HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
  3821. 8001da4: 2003 movs r0, #3
  3822. 8001da6: f000 f939 bl 800201c <HAL_NVIC_SetPriorityGrouping>
  3823. /* Use systick as time base source and configure 1ms tick (default clock after Reset is MSI) */
  3824. if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
  3825. 8001daa: 2000 movs r0, #0
  3826. 8001dac: f000 f80e bl 8001dcc <HAL_InitTick>
  3827. 8001db0: 4603 mov r3, r0
  3828. 8001db2: 2b00 cmp r3, #0
  3829. 8001db4: d002 beq.n 8001dbc <HAL_Init+0x22>
  3830. {
  3831. status = HAL_ERROR;
  3832. 8001db6: 2301 movs r3, #1
  3833. 8001db8: 71fb strb r3, [r7, #7]
  3834. 8001dba: e001 b.n 8001dc0 <HAL_Init+0x26>
  3835. }
  3836. else
  3837. {
  3838. /* Init the low level hardware */
  3839. HAL_MspInit();
  3840. 8001dbc: f7ff fe8a bl 8001ad4 <HAL_MspInit>
  3841. }
  3842. /* Return function status */
  3843. return status;
  3844. 8001dc0: 79fb ldrb r3, [r7, #7]
  3845. }
  3846. 8001dc2: 4618 mov r0, r3
  3847. 8001dc4: 3708 adds r7, #8
  3848. 8001dc6: 46bd mov sp, r7
  3849. 8001dc8: bd80 pop {r7, pc}
  3850. ...
  3851. 08001dcc <HAL_InitTick>:
  3852. * implementation in user file.
  3853. * @param TickPriority Tick interrupt priority.
  3854. * @retval HAL status
  3855. */
  3856. __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
  3857. {
  3858. 8001dcc: b580 push {r7, lr}
  3859. 8001dce: b084 sub sp, #16
  3860. 8001dd0: af00 add r7, sp, #0
  3861. 8001dd2: 6078 str r0, [r7, #4]
  3862. HAL_StatusTypeDef status = HAL_OK;
  3863. 8001dd4: 2300 movs r3, #0
  3864. 8001dd6: 73fb strb r3, [r7, #15]
  3865. if (uwTickFreq != 0U)
  3866. 8001dd8: 4b16 ldr r3, [pc, #88] ; (8001e34 <HAL_InitTick+0x68>)
  3867. 8001dda: 681b ldr r3, [r3, #0]
  3868. 8001ddc: 2b00 cmp r3, #0
  3869. 8001dde: d022 beq.n 8001e26 <HAL_InitTick+0x5a>
  3870. {
  3871. /*Configure the SysTick to have interrupt in 1ms time basis*/
  3872. if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U)
  3873. 8001de0: 4b15 ldr r3, [pc, #84] ; (8001e38 <HAL_InitTick+0x6c>)
  3874. 8001de2: 681a ldr r2, [r3, #0]
  3875. 8001de4: 4b13 ldr r3, [pc, #76] ; (8001e34 <HAL_InitTick+0x68>)
  3876. 8001de6: 681b ldr r3, [r3, #0]
  3877. 8001de8: f44f 717a mov.w r1, #1000 ; 0x3e8
  3878. 8001dec: fbb1 f3f3 udiv r3, r1, r3
  3879. 8001df0: fbb2 f3f3 udiv r3, r2, r3
  3880. 8001df4: 4618 mov r0, r3
  3881. 8001df6: f000 f938 bl 800206a <HAL_SYSTICK_Config>
  3882. 8001dfa: 4603 mov r3, r0
  3883. 8001dfc: 2b00 cmp r3, #0
  3884. 8001dfe: d10f bne.n 8001e20 <HAL_InitTick+0x54>
  3885. {
  3886. /* Configure the SysTick IRQ priority */
  3887. if (TickPriority < (1UL << __NVIC_PRIO_BITS))
  3888. 8001e00: 687b ldr r3, [r7, #4]
  3889. 8001e02: 2b0f cmp r3, #15
  3890. 8001e04: d809 bhi.n 8001e1a <HAL_InitTick+0x4e>
  3891. {
  3892. HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
  3893. 8001e06: 2200 movs r2, #0
  3894. 8001e08: 6879 ldr r1, [r7, #4]
  3895. 8001e0a: f04f 30ff mov.w r0, #4294967295
  3896. 8001e0e: f000 f910 bl 8002032 <HAL_NVIC_SetPriority>
  3897. uwTickPrio = TickPriority;
  3898. 8001e12: 4a0a ldr r2, [pc, #40] ; (8001e3c <HAL_InitTick+0x70>)
  3899. 8001e14: 687b ldr r3, [r7, #4]
  3900. 8001e16: 6013 str r3, [r2, #0]
  3901. 8001e18: e007 b.n 8001e2a <HAL_InitTick+0x5e>
  3902. }
  3903. else
  3904. {
  3905. status = HAL_ERROR;
  3906. 8001e1a: 2301 movs r3, #1
  3907. 8001e1c: 73fb strb r3, [r7, #15]
  3908. 8001e1e: e004 b.n 8001e2a <HAL_InitTick+0x5e>
  3909. }
  3910. }
  3911. else
  3912. {
  3913. status = HAL_ERROR;
  3914. 8001e20: 2301 movs r3, #1
  3915. 8001e22: 73fb strb r3, [r7, #15]
  3916. 8001e24: e001 b.n 8001e2a <HAL_InitTick+0x5e>
  3917. }
  3918. }
  3919. else
  3920. {
  3921. status = HAL_ERROR;
  3922. 8001e26: 2301 movs r3, #1
  3923. 8001e28: 73fb strb r3, [r7, #15]
  3924. }
  3925. /* Return function status */
  3926. return status;
  3927. 8001e2a: 7bfb ldrb r3, [r7, #15]
  3928. }
  3929. 8001e2c: 4618 mov r0, r3
  3930. 8001e2e: 3710 adds r7, #16
  3931. 8001e30: 46bd mov sp, r7
  3932. 8001e32: bd80 pop {r7, pc}
  3933. 8001e34: 2000000c .word 0x2000000c
  3934. 8001e38: 20000004 .word 0x20000004
  3935. 8001e3c: 20000008 .word 0x20000008
  3936. 08001e40 <HAL_IncTick>:
  3937. * @note This function is declared as __weak to be overwritten in case of other
  3938. * implementations in user file.
  3939. * @retval None
  3940. */
  3941. __weak void HAL_IncTick(void)
  3942. {
  3943. 8001e40: b480 push {r7}
  3944. 8001e42: af00 add r7, sp, #0
  3945. uwTick += uwTickFreq;
  3946. 8001e44: 4b05 ldr r3, [pc, #20] ; (8001e5c <HAL_IncTick+0x1c>)
  3947. 8001e46: 681a ldr r2, [r3, #0]
  3948. 8001e48: 4b05 ldr r3, [pc, #20] ; (8001e60 <HAL_IncTick+0x20>)
  3949. 8001e4a: 681b ldr r3, [r3, #0]
  3950. 8001e4c: 4413 add r3, r2
  3951. 8001e4e: 4a03 ldr r2, [pc, #12] ; (8001e5c <HAL_IncTick+0x1c>)
  3952. 8001e50: 6013 str r3, [r2, #0]
  3953. }
  3954. 8001e52: bf00 nop
  3955. 8001e54: 46bd mov sp, r7
  3956. 8001e56: bc80 pop {r7}
  3957. 8001e58: 4770 bx lr
  3958. 8001e5a: bf00 nop
  3959. 8001e5c: 20002464 .word 0x20002464
  3960. 8001e60: 2000000c .word 0x2000000c
  3961. 08001e64 <HAL_GetTick>:
  3962. * @note This function is declared as __weak to be overwritten in case of other
  3963. * implementations in user file.
  3964. * @retval tick value
  3965. */
  3966. __weak uint32_t HAL_GetTick(void)
  3967. {
  3968. 8001e64: b480 push {r7}
  3969. 8001e66: af00 add r7, sp, #0
  3970. return uwTick;
  3971. 8001e68: 4b02 ldr r3, [pc, #8] ; (8001e74 <HAL_GetTick+0x10>)
  3972. 8001e6a: 681b ldr r3, [r3, #0]
  3973. }
  3974. 8001e6c: 4618 mov r0, r3
  3975. 8001e6e: 46bd mov sp, r7
  3976. 8001e70: bc80 pop {r7}
  3977. 8001e72: 4770 bx lr
  3978. 8001e74: 20002464 .word 0x20002464
  3979. 08001e78 <HAL_Delay>:
  3980. * implementations in user file.
  3981. * @param Delay specifies the delay time length, in milliseconds.
  3982. * @retval None
  3983. */
  3984. __weak void HAL_Delay(uint32_t Delay)
  3985. {
  3986. 8001e78: b580 push {r7, lr}
  3987. 8001e7a: b084 sub sp, #16
  3988. 8001e7c: af00 add r7, sp, #0
  3989. 8001e7e: 6078 str r0, [r7, #4]
  3990. uint32_t tickstart = HAL_GetTick();
  3991. 8001e80: f7ff fff0 bl 8001e64 <HAL_GetTick>
  3992. 8001e84: 60b8 str r0, [r7, #8]
  3993. uint32_t wait = Delay;
  3994. 8001e86: 687b ldr r3, [r7, #4]
  3995. 8001e88: 60fb str r3, [r7, #12]
  3996. /* Add a period to guaranty minimum wait */
  3997. if (wait < HAL_MAX_DELAY)
  3998. 8001e8a: 68fb ldr r3, [r7, #12]
  3999. 8001e8c: f1b3 3fff cmp.w r3, #4294967295
  4000. 8001e90: d004 beq.n 8001e9c <HAL_Delay+0x24>
  4001. {
  4002. wait += (uint32_t)(uwTickFreq);
  4003. 8001e92: 4b09 ldr r3, [pc, #36] ; (8001eb8 <HAL_Delay+0x40>)
  4004. 8001e94: 681b ldr r3, [r3, #0]
  4005. 8001e96: 68fa ldr r2, [r7, #12]
  4006. 8001e98: 4413 add r3, r2
  4007. 8001e9a: 60fb str r3, [r7, #12]
  4008. }
  4009. while((HAL_GetTick() - tickstart) < wait)
  4010. 8001e9c: bf00 nop
  4011. 8001e9e: f7ff ffe1 bl 8001e64 <HAL_GetTick>
  4012. 8001ea2: 4602 mov r2, r0
  4013. 8001ea4: 68bb ldr r3, [r7, #8]
  4014. 8001ea6: 1ad3 subs r3, r2, r3
  4015. 8001ea8: 68fa ldr r2, [r7, #12]
  4016. 8001eaa: 429a cmp r2, r3
  4017. 8001eac: d8f7 bhi.n 8001e9e <HAL_Delay+0x26>
  4018. {
  4019. }
  4020. }
  4021. 8001eae: bf00 nop
  4022. 8001eb0: 3710 adds r7, #16
  4023. 8001eb2: 46bd mov sp, r7
  4024. 8001eb4: bd80 pop {r7, pc}
  4025. 8001eb6: bf00 nop
  4026. 8001eb8: 2000000c .word 0x2000000c
  4027. 08001ebc <__NVIC_SetPriorityGrouping>:
  4028. In case of a conflict between priority grouping and available
  4029. priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
  4030. \param [in] PriorityGroup Priority grouping field.
  4031. */
  4032. __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
  4033. {
  4034. 8001ebc: b480 push {r7}
  4035. 8001ebe: b085 sub sp, #20
  4036. 8001ec0: af00 add r7, sp, #0
  4037. 8001ec2: 6078 str r0, [r7, #4]
  4038. uint32_t reg_value;
  4039. uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
  4040. 8001ec4: 687b ldr r3, [r7, #4]
  4041. 8001ec6: f003 0307 and.w r3, r3, #7
  4042. 8001eca: 60fb str r3, [r7, #12]
  4043. reg_value = SCB->AIRCR; /* read old register configuration */
  4044. 8001ecc: 4b0c ldr r3, [pc, #48] ; (8001f00 <__NVIC_SetPriorityGrouping+0x44>)
  4045. 8001ece: 68db ldr r3, [r3, #12]
  4046. 8001ed0: 60bb str r3, [r7, #8]
  4047. reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
  4048. 8001ed2: 68ba ldr r2, [r7, #8]
  4049. 8001ed4: f64f 03ff movw r3, #63743 ; 0xf8ff
  4050. 8001ed8: 4013 ands r3, r2
  4051. 8001eda: 60bb str r3, [r7, #8]
  4052. reg_value = (reg_value |
  4053. ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
  4054. (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
  4055. 8001edc: 68fb ldr r3, [r7, #12]
  4056. 8001ede: 021a lsls r2, r3, #8
  4057. ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
  4058. 8001ee0: 68bb ldr r3, [r7, #8]
  4059. 8001ee2: 4313 orrs r3, r2
  4060. reg_value = (reg_value |
  4061. 8001ee4: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
  4062. 8001ee8: f443 3300 orr.w r3, r3, #131072 ; 0x20000
  4063. 8001eec: 60bb str r3, [r7, #8]
  4064. SCB->AIRCR = reg_value;
  4065. 8001eee: 4a04 ldr r2, [pc, #16] ; (8001f00 <__NVIC_SetPriorityGrouping+0x44>)
  4066. 8001ef0: 68bb ldr r3, [r7, #8]
  4067. 8001ef2: 60d3 str r3, [r2, #12]
  4068. }
  4069. 8001ef4: bf00 nop
  4070. 8001ef6: 3714 adds r7, #20
  4071. 8001ef8: 46bd mov sp, r7
  4072. 8001efa: bc80 pop {r7}
  4073. 8001efc: 4770 bx lr
  4074. 8001efe: bf00 nop
  4075. 8001f00: e000ed00 .word 0xe000ed00
  4076. 08001f04 <__NVIC_GetPriorityGrouping>:
  4077. \brief Get Priority Grouping
  4078. \details Reads the priority grouping field from the NVIC Interrupt Controller.
  4079. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  4080. */
  4081. __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
  4082. {
  4083. 8001f04: b480 push {r7}
  4084. 8001f06: af00 add r7, sp, #0
  4085. return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
  4086. 8001f08: 4b04 ldr r3, [pc, #16] ; (8001f1c <__NVIC_GetPriorityGrouping+0x18>)
  4087. 8001f0a: 68db ldr r3, [r3, #12]
  4088. 8001f0c: 0a1b lsrs r3, r3, #8
  4089. 8001f0e: f003 0307 and.w r3, r3, #7
  4090. }
  4091. 8001f12: 4618 mov r0, r3
  4092. 8001f14: 46bd mov sp, r7
  4093. 8001f16: bc80 pop {r7}
  4094. 8001f18: 4770 bx lr
  4095. 8001f1a: bf00 nop
  4096. 8001f1c: e000ed00 .word 0xe000ed00
  4097. 08001f20 <__NVIC_SetPriority>:
  4098. \param [in] IRQn Interrupt number.
  4099. \param [in] priority Priority to set.
  4100. \note The priority cannot be set for every processor exception.
  4101. */
  4102. __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
  4103. {
  4104. 8001f20: b480 push {r7}
  4105. 8001f22: b083 sub sp, #12
  4106. 8001f24: af00 add r7, sp, #0
  4107. 8001f26: 4603 mov r3, r0
  4108. 8001f28: 6039 str r1, [r7, #0]
  4109. 8001f2a: 71fb strb r3, [r7, #7]
  4110. if ((int32_t)(IRQn) >= 0)
  4111. 8001f2c: f997 3007 ldrsb.w r3, [r7, #7]
  4112. 8001f30: 2b00 cmp r3, #0
  4113. 8001f32: db0a blt.n 8001f4a <__NVIC_SetPriority+0x2a>
  4114. {
  4115. NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  4116. 8001f34: 683b ldr r3, [r7, #0]
  4117. 8001f36: b2da uxtb r2, r3
  4118. 8001f38: 490c ldr r1, [pc, #48] ; (8001f6c <__NVIC_SetPriority+0x4c>)
  4119. 8001f3a: f997 3007 ldrsb.w r3, [r7, #7]
  4120. 8001f3e: 0112 lsls r2, r2, #4
  4121. 8001f40: b2d2 uxtb r2, r2
  4122. 8001f42: 440b add r3, r1
  4123. 8001f44: f883 2300 strb.w r2, [r3, #768] ; 0x300
  4124. }
  4125. else
  4126. {
  4127. SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  4128. }
  4129. }
  4130. 8001f48: e00a b.n 8001f60 <__NVIC_SetPriority+0x40>
  4131. SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  4132. 8001f4a: 683b ldr r3, [r7, #0]
  4133. 8001f4c: b2da uxtb r2, r3
  4134. 8001f4e: 4908 ldr r1, [pc, #32] ; (8001f70 <__NVIC_SetPriority+0x50>)
  4135. 8001f50: 79fb ldrb r3, [r7, #7]
  4136. 8001f52: f003 030f and.w r3, r3, #15
  4137. 8001f56: 3b04 subs r3, #4
  4138. 8001f58: 0112 lsls r2, r2, #4
  4139. 8001f5a: b2d2 uxtb r2, r2
  4140. 8001f5c: 440b add r3, r1
  4141. 8001f5e: 761a strb r2, [r3, #24]
  4142. }
  4143. 8001f60: bf00 nop
  4144. 8001f62: 370c adds r7, #12
  4145. 8001f64: 46bd mov sp, r7
  4146. 8001f66: bc80 pop {r7}
  4147. 8001f68: 4770 bx lr
  4148. 8001f6a: bf00 nop
  4149. 8001f6c: e000e100 .word 0xe000e100
  4150. 8001f70: e000ed00 .word 0xe000ed00
  4151. 08001f74 <NVIC_EncodePriority>:
  4152. \param [in] PreemptPriority Preemptive priority value (starting from 0).
  4153. \param [in] SubPriority Subpriority value (starting from 0).
  4154. \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
  4155. */
  4156. __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
  4157. {
  4158. 8001f74: b480 push {r7}
  4159. 8001f76: b089 sub sp, #36 ; 0x24
  4160. 8001f78: af00 add r7, sp, #0
  4161. 8001f7a: 60f8 str r0, [r7, #12]
  4162. 8001f7c: 60b9 str r1, [r7, #8]
  4163. 8001f7e: 607a str r2, [r7, #4]
  4164. uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
  4165. 8001f80: 68fb ldr r3, [r7, #12]
  4166. 8001f82: f003 0307 and.w r3, r3, #7
  4167. 8001f86: 61fb str r3, [r7, #28]
  4168. uint32_t PreemptPriorityBits;
  4169. uint32_t SubPriorityBits;
  4170. PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
  4171. 8001f88: 69fb ldr r3, [r7, #28]
  4172. 8001f8a: f1c3 0307 rsb r3, r3, #7
  4173. 8001f8e: 2b04 cmp r3, #4
  4174. 8001f90: bf28 it cs
  4175. 8001f92: 2304 movcs r3, #4
  4176. 8001f94: 61bb str r3, [r7, #24]
  4177. SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
  4178. 8001f96: 69fb ldr r3, [r7, #28]
  4179. 8001f98: 3304 adds r3, #4
  4180. 8001f9a: 2b06 cmp r3, #6
  4181. 8001f9c: d902 bls.n 8001fa4 <NVIC_EncodePriority+0x30>
  4182. 8001f9e: 69fb ldr r3, [r7, #28]
  4183. 8001fa0: 3b03 subs r3, #3
  4184. 8001fa2: e000 b.n 8001fa6 <NVIC_EncodePriority+0x32>
  4185. 8001fa4: 2300 movs r3, #0
  4186. 8001fa6: 617b str r3, [r7, #20]
  4187. return (
  4188. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  4189. 8001fa8: f04f 32ff mov.w r2, #4294967295
  4190. 8001fac: 69bb ldr r3, [r7, #24]
  4191. 8001fae: fa02 f303 lsl.w r3, r2, r3
  4192. 8001fb2: 43da mvns r2, r3
  4193. 8001fb4: 68bb ldr r3, [r7, #8]
  4194. 8001fb6: 401a ands r2, r3
  4195. 8001fb8: 697b ldr r3, [r7, #20]
  4196. 8001fba: 409a lsls r2, r3
  4197. ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
  4198. 8001fbc: f04f 31ff mov.w r1, #4294967295
  4199. 8001fc0: 697b ldr r3, [r7, #20]
  4200. 8001fc2: fa01 f303 lsl.w r3, r1, r3
  4201. 8001fc6: 43d9 mvns r1, r3
  4202. 8001fc8: 687b ldr r3, [r7, #4]
  4203. 8001fca: 400b ands r3, r1
  4204. ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
  4205. 8001fcc: 4313 orrs r3, r2
  4206. );
  4207. }
  4208. 8001fce: 4618 mov r0, r3
  4209. 8001fd0: 3724 adds r7, #36 ; 0x24
  4210. 8001fd2: 46bd mov sp, r7
  4211. 8001fd4: bc80 pop {r7}
  4212. 8001fd6: 4770 bx lr
  4213. 08001fd8 <SysTick_Config>:
  4214. \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
  4215. function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
  4216. must contain a vendor-specific implementation of this function.
  4217. */
  4218. __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
  4219. {
  4220. 8001fd8: b580 push {r7, lr}
  4221. 8001fda: b082 sub sp, #8
  4222. 8001fdc: af00 add r7, sp, #0
  4223. 8001fde: 6078 str r0, [r7, #4]
  4224. if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
  4225. 8001fe0: 687b ldr r3, [r7, #4]
  4226. 8001fe2: 3b01 subs r3, #1
  4227. 8001fe4: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
  4228. 8001fe8: d301 bcc.n 8001fee <SysTick_Config+0x16>
  4229. {
  4230. return (1UL); /* Reload value impossible */
  4231. 8001fea: 2301 movs r3, #1
  4232. 8001fec: e00f b.n 800200e <SysTick_Config+0x36>
  4233. }
  4234. SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
  4235. 8001fee: 4a0a ldr r2, [pc, #40] ; (8002018 <SysTick_Config+0x40>)
  4236. 8001ff0: 687b ldr r3, [r7, #4]
  4237. 8001ff2: 3b01 subs r3, #1
  4238. 8001ff4: 6053 str r3, [r2, #4]
  4239. NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
  4240. 8001ff6: 210f movs r1, #15
  4241. 8001ff8: f04f 30ff mov.w r0, #4294967295
  4242. 8001ffc: f7ff ff90 bl 8001f20 <__NVIC_SetPriority>
  4243. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  4244. 8002000: 4b05 ldr r3, [pc, #20] ; (8002018 <SysTick_Config+0x40>)
  4245. 8002002: 2200 movs r2, #0
  4246. 8002004: 609a str r2, [r3, #8]
  4247. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  4248. 8002006: 4b04 ldr r3, [pc, #16] ; (8002018 <SysTick_Config+0x40>)
  4249. 8002008: 2207 movs r2, #7
  4250. 800200a: 601a str r2, [r3, #0]
  4251. SysTick_CTRL_TICKINT_Msk |
  4252. SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
  4253. return (0UL); /* Function successful */
  4254. 800200c: 2300 movs r3, #0
  4255. }
  4256. 800200e: 4618 mov r0, r3
  4257. 8002010: 3708 adds r7, #8
  4258. 8002012: 46bd mov sp, r7
  4259. 8002014: bd80 pop {r7, pc}
  4260. 8002016: bf00 nop
  4261. 8002018: e000e010 .word 0xe000e010
  4262. 0800201c <HAL_NVIC_SetPriorityGrouping>:
  4263. * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
  4264. * The pending IRQ priority will be managed only by the subpriority.
  4265. * @retval None
  4266. */
  4267. void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
  4268. {
  4269. 800201c: b580 push {r7, lr}
  4270. 800201e: b082 sub sp, #8
  4271. 8002020: af00 add r7, sp, #0
  4272. 8002022: 6078 str r0, [r7, #4]
  4273. /* Check the parameters */
  4274. assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
  4275. /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
  4276. NVIC_SetPriorityGrouping(PriorityGroup);
  4277. 8002024: 6878 ldr r0, [r7, #4]
  4278. 8002026: f7ff ff49 bl 8001ebc <__NVIC_SetPriorityGrouping>
  4279. }
  4280. 800202a: bf00 nop
  4281. 800202c: 3708 adds r7, #8
  4282. 800202e: 46bd mov sp, r7
  4283. 8002030: bd80 pop {r7, pc}
  4284. 08002032 <HAL_NVIC_SetPriority>:
  4285. * This parameter can be a value between 0 and 15
  4286. * A lower priority value indicates a higher priority.
  4287. * @retval None
  4288. */
  4289. void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
  4290. {
  4291. 8002032: b580 push {r7, lr}
  4292. 8002034: b086 sub sp, #24
  4293. 8002036: af00 add r7, sp, #0
  4294. 8002038: 4603 mov r3, r0
  4295. 800203a: 60b9 str r1, [r7, #8]
  4296. 800203c: 607a str r2, [r7, #4]
  4297. 800203e: 73fb strb r3, [r7, #15]
  4298. uint32_t prioritygroup = 0x00;
  4299. 8002040: 2300 movs r3, #0
  4300. 8002042: 617b str r3, [r7, #20]
  4301. /* Check the parameters */
  4302. assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
  4303. assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
  4304. prioritygroup = NVIC_GetPriorityGrouping();
  4305. 8002044: f7ff ff5e bl 8001f04 <__NVIC_GetPriorityGrouping>
  4306. 8002048: 6178 str r0, [r7, #20]
  4307. NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
  4308. 800204a: 687a ldr r2, [r7, #4]
  4309. 800204c: 68b9 ldr r1, [r7, #8]
  4310. 800204e: 6978 ldr r0, [r7, #20]
  4311. 8002050: f7ff ff90 bl 8001f74 <NVIC_EncodePriority>
  4312. 8002054: 4602 mov r2, r0
  4313. 8002056: f997 300f ldrsb.w r3, [r7, #15]
  4314. 800205a: 4611 mov r1, r2
  4315. 800205c: 4618 mov r0, r3
  4316. 800205e: f7ff ff5f bl 8001f20 <__NVIC_SetPriority>
  4317. }
  4318. 8002062: bf00 nop
  4319. 8002064: 3718 adds r7, #24
  4320. 8002066: 46bd mov sp, r7
  4321. 8002068: bd80 pop {r7, pc}
  4322. 0800206a <HAL_SYSTICK_Config>:
  4323. * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
  4324. * @retval status: - 0 Function succeeded.
  4325. * - 1 Function failed.
  4326. */
  4327. uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
  4328. {
  4329. 800206a: b580 push {r7, lr}
  4330. 800206c: b082 sub sp, #8
  4331. 800206e: af00 add r7, sp, #0
  4332. 8002070: 6078 str r0, [r7, #4]
  4333. return SysTick_Config(TicksNumb);
  4334. 8002072: 6878 ldr r0, [r7, #4]
  4335. 8002074: f7ff ffb0 bl 8001fd8 <SysTick_Config>
  4336. 8002078: 4603 mov r3, r0
  4337. }
  4338. 800207a: 4618 mov r0, r3
  4339. 800207c: 3708 adds r7, #8
  4340. 800207e: 46bd mov sp, r7
  4341. 8002080: bd80 pop {r7, pc}
  4342. 08002082 <HAL_SYSTICK_IRQHandler>:
  4343. /**
  4344. * @brief This function handles SYSTICK interrupt request.
  4345. * @retval None
  4346. */
  4347. void HAL_SYSTICK_IRQHandler(void)
  4348. {
  4349. 8002082: b580 push {r7, lr}
  4350. 8002084: af00 add r7, sp, #0
  4351. HAL_SYSTICK_Callback();
  4352. 8002086: f000 f802 bl 800208e <HAL_SYSTICK_Callback>
  4353. }
  4354. 800208a: bf00 nop
  4355. 800208c: bd80 pop {r7, pc}
  4356. 0800208e <HAL_SYSTICK_Callback>:
  4357. /**
  4358. * @brief SYSTICK callback.
  4359. * @retval None
  4360. */
  4361. __weak void HAL_SYSTICK_Callback(void)
  4362. {
  4363. 800208e: b480 push {r7}
  4364. 8002090: af00 add r7, sp, #0
  4365. /* NOTE : This function Should not be modified, when the callback is needed,
  4366. the HAL_SYSTICK_Callback could be implemented in the user file
  4367. */
  4368. }
  4369. 8002092: bf00 nop
  4370. 8002094: 46bd mov sp, r7
  4371. 8002096: bc80 pop {r7}
  4372. 8002098: 4770 bx lr
  4373. ...
  4374. 0800209c <HAL_GPIO_Init>:
  4375. * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
  4376. * the configuration information for the specified GPIO peripheral.
  4377. * @retval None
  4378. */
  4379. void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  4380. {
  4381. 800209c: b480 push {r7}
  4382. 800209e: b087 sub sp, #28
  4383. 80020a0: af00 add r7, sp, #0
  4384. 80020a2: 6078 str r0, [r7, #4]
  4385. 80020a4: 6039 str r1, [r7, #0]
  4386. uint32_t position = 0x00;
  4387. 80020a6: 2300 movs r3, #0
  4388. 80020a8: 617b str r3, [r7, #20]
  4389. uint32_t iocurrent = 0x00;
  4390. 80020aa: 2300 movs r3, #0
  4391. 80020ac: 60fb str r3, [r7, #12]
  4392. uint32_t temp = 0x00;
  4393. 80020ae: 2300 movs r3, #0
  4394. 80020b0: 613b str r3, [r7, #16]
  4395. assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  4396. assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
  4397. assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
  4398. /* Configure the port pins */
  4399. while (((GPIO_Init->Pin) >> position) != 0)
  4400. 80020b2: e160 b.n 8002376 <HAL_GPIO_Init+0x2da>
  4401. {
  4402. /* Get current io position */
  4403. iocurrent = (GPIO_Init->Pin) & (1U << position);
  4404. 80020b4: 683b ldr r3, [r7, #0]
  4405. 80020b6: 681a ldr r2, [r3, #0]
  4406. 80020b8: 2101 movs r1, #1
  4407. 80020ba: 697b ldr r3, [r7, #20]
  4408. 80020bc: fa01 f303 lsl.w r3, r1, r3
  4409. 80020c0: 4013 ands r3, r2
  4410. 80020c2: 60fb str r3, [r7, #12]
  4411. if (iocurrent)
  4412. 80020c4: 68fb ldr r3, [r7, #12]
  4413. 80020c6: 2b00 cmp r3, #0
  4414. 80020c8: f000 8152 beq.w 8002370 <HAL_GPIO_Init+0x2d4>
  4415. {
  4416. /*--------------------- GPIO Mode Configuration ------------------------*/
  4417. /* In case of Output or Alternate function mode selection */
  4418. if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
  4419. 80020cc: 683b ldr r3, [r7, #0]
  4420. 80020ce: 685b ldr r3, [r3, #4]
  4421. 80020d0: 2b01 cmp r3, #1
  4422. 80020d2: d00b beq.n 80020ec <HAL_GPIO_Init+0x50>
  4423. 80020d4: 683b ldr r3, [r7, #0]
  4424. 80020d6: 685b ldr r3, [r3, #4]
  4425. 80020d8: 2b02 cmp r3, #2
  4426. 80020da: d007 beq.n 80020ec <HAL_GPIO_Init+0x50>
  4427. (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
  4428. 80020dc: 683b ldr r3, [r7, #0]
  4429. 80020de: 685b ldr r3, [r3, #4]
  4430. if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
  4431. 80020e0: 2b11 cmp r3, #17
  4432. 80020e2: d003 beq.n 80020ec <HAL_GPIO_Init+0x50>
  4433. (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
  4434. 80020e4: 683b ldr r3, [r7, #0]
  4435. 80020e6: 685b ldr r3, [r3, #4]
  4436. 80020e8: 2b12 cmp r3, #18
  4437. 80020ea: d130 bne.n 800214e <HAL_GPIO_Init+0xb2>
  4438. {
  4439. /* Check the Speed parameter */
  4440. assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
  4441. /* Configure the IO Speed */
  4442. temp = GPIOx->OSPEEDR;
  4443. 80020ec: 687b ldr r3, [r7, #4]
  4444. 80020ee: 689b ldr r3, [r3, #8]
  4445. 80020f0: 613b str r3, [r7, #16]
  4446. CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
  4447. 80020f2: 697b ldr r3, [r7, #20]
  4448. 80020f4: 005b lsls r3, r3, #1
  4449. 80020f6: 2203 movs r2, #3
  4450. 80020f8: fa02 f303 lsl.w r3, r2, r3
  4451. 80020fc: 43db mvns r3, r3
  4452. 80020fe: 693a ldr r2, [r7, #16]
  4453. 8002100: 4013 ands r3, r2
  4454. 8002102: 613b str r3, [r7, #16]
  4455. SET_BIT(temp, GPIO_Init->Speed << (position * 2));
  4456. 8002104: 683b ldr r3, [r7, #0]
  4457. 8002106: 68da ldr r2, [r3, #12]
  4458. 8002108: 697b ldr r3, [r7, #20]
  4459. 800210a: 005b lsls r3, r3, #1
  4460. 800210c: fa02 f303 lsl.w r3, r2, r3
  4461. 8002110: 693a ldr r2, [r7, #16]
  4462. 8002112: 4313 orrs r3, r2
  4463. 8002114: 613b str r3, [r7, #16]
  4464. GPIOx->OSPEEDR = temp;
  4465. 8002116: 687b ldr r3, [r7, #4]
  4466. 8002118: 693a ldr r2, [r7, #16]
  4467. 800211a: 609a str r2, [r3, #8]
  4468. /* Configure the IO Output Type */
  4469. temp = GPIOx->OTYPER;
  4470. 800211c: 687b ldr r3, [r7, #4]
  4471. 800211e: 685b ldr r3, [r3, #4]
  4472. 8002120: 613b str r3, [r7, #16]
  4473. CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
  4474. 8002122: 2201 movs r2, #1
  4475. 8002124: 697b ldr r3, [r7, #20]
  4476. 8002126: fa02 f303 lsl.w r3, r2, r3
  4477. 800212a: 43db mvns r3, r3
  4478. 800212c: 693a ldr r2, [r7, #16]
  4479. 800212e: 4013 ands r3, r2
  4480. 8002130: 613b str r3, [r7, #16]
  4481. SET_BIT(temp, ((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
  4482. 8002132: 683b ldr r3, [r7, #0]
  4483. 8002134: 685b ldr r3, [r3, #4]
  4484. 8002136: 091b lsrs r3, r3, #4
  4485. 8002138: f003 0201 and.w r2, r3, #1
  4486. 800213c: 697b ldr r3, [r7, #20]
  4487. 800213e: fa02 f303 lsl.w r3, r2, r3
  4488. 8002142: 693a ldr r2, [r7, #16]
  4489. 8002144: 4313 orrs r3, r2
  4490. 8002146: 613b str r3, [r7, #16]
  4491. GPIOx->OTYPER = temp;
  4492. 8002148: 687b ldr r3, [r7, #4]
  4493. 800214a: 693a ldr r2, [r7, #16]
  4494. 800214c: 605a str r2, [r3, #4]
  4495. }
  4496. /* Activate the Pull-up or Pull down resistor for the current IO */
  4497. temp = GPIOx->PUPDR;
  4498. 800214e: 687b ldr r3, [r7, #4]
  4499. 8002150: 68db ldr r3, [r3, #12]
  4500. 8002152: 613b str r3, [r7, #16]
  4501. CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2));
  4502. 8002154: 697b ldr r3, [r7, #20]
  4503. 8002156: 005b lsls r3, r3, #1
  4504. 8002158: 2203 movs r2, #3
  4505. 800215a: fa02 f303 lsl.w r3, r2, r3
  4506. 800215e: 43db mvns r3, r3
  4507. 8002160: 693a ldr r2, [r7, #16]
  4508. 8002162: 4013 ands r3, r2
  4509. 8002164: 613b str r3, [r7, #16]
  4510. SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
  4511. 8002166: 683b ldr r3, [r7, #0]
  4512. 8002168: 689a ldr r2, [r3, #8]
  4513. 800216a: 697b ldr r3, [r7, #20]
  4514. 800216c: 005b lsls r3, r3, #1
  4515. 800216e: fa02 f303 lsl.w r3, r2, r3
  4516. 8002172: 693a ldr r2, [r7, #16]
  4517. 8002174: 4313 orrs r3, r2
  4518. 8002176: 613b str r3, [r7, #16]
  4519. GPIOx->PUPDR = temp;
  4520. 8002178: 687b ldr r3, [r7, #4]
  4521. 800217a: 693a ldr r2, [r7, #16]
  4522. 800217c: 60da str r2, [r3, #12]
  4523. /* In case of Alternate function mode selection */
  4524. if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
  4525. 800217e: 683b ldr r3, [r7, #0]
  4526. 8002180: 685b ldr r3, [r3, #4]
  4527. 8002182: 2b02 cmp r3, #2
  4528. 8002184: d003 beq.n 800218e <HAL_GPIO_Init+0xf2>
  4529. 8002186: 683b ldr r3, [r7, #0]
  4530. 8002188: 685b ldr r3, [r3, #4]
  4531. 800218a: 2b12 cmp r3, #18
  4532. 800218c: d123 bne.n 80021d6 <HAL_GPIO_Init+0x13a>
  4533. assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
  4534. assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
  4535. /* Configure Alternate function mapped with the current IO */
  4536. /* Identify AFRL or AFRH register based on IO position*/
  4537. temp = GPIOx->AFR[position >> 3];
  4538. 800218e: 697b ldr r3, [r7, #20]
  4539. 8002190: 08da lsrs r2, r3, #3
  4540. 8002192: 687b ldr r3, [r7, #4]
  4541. 8002194: 3208 adds r2, #8
  4542. 8002196: f853 3022 ldr.w r3, [r3, r2, lsl #2]
  4543. 800219a: 613b str r3, [r7, #16]
  4544. CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4));
  4545. 800219c: 697b ldr r3, [r7, #20]
  4546. 800219e: f003 0307 and.w r3, r3, #7
  4547. 80021a2: 009b lsls r3, r3, #2
  4548. 80021a4: 220f movs r2, #15
  4549. 80021a6: fa02 f303 lsl.w r3, r2, r3
  4550. 80021aa: 43db mvns r3, r3
  4551. 80021ac: 693a ldr r2, [r7, #16]
  4552. 80021ae: 4013 ands r3, r2
  4553. 80021b0: 613b str r3, [r7, #16]
  4554. SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));
  4555. 80021b2: 683b ldr r3, [r7, #0]
  4556. 80021b4: 691a ldr r2, [r3, #16]
  4557. 80021b6: 697b ldr r3, [r7, #20]
  4558. 80021b8: f003 0307 and.w r3, r3, #7
  4559. 80021bc: 009b lsls r3, r3, #2
  4560. 80021be: fa02 f303 lsl.w r3, r2, r3
  4561. 80021c2: 693a ldr r2, [r7, #16]
  4562. 80021c4: 4313 orrs r3, r2
  4563. 80021c6: 613b str r3, [r7, #16]
  4564. GPIOx->AFR[position >> 3] = temp;
  4565. 80021c8: 697b ldr r3, [r7, #20]
  4566. 80021ca: 08da lsrs r2, r3, #3
  4567. 80021cc: 687b ldr r3, [r7, #4]
  4568. 80021ce: 3208 adds r2, #8
  4569. 80021d0: 6939 ldr r1, [r7, #16]
  4570. 80021d2: f843 1022 str.w r1, [r3, r2, lsl #2]
  4571. }
  4572. /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
  4573. temp = GPIOx->MODER;
  4574. 80021d6: 687b ldr r3, [r7, #4]
  4575. 80021d8: 681b ldr r3, [r3, #0]
  4576. 80021da: 613b str r3, [r7, #16]
  4577. CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
  4578. 80021dc: 697b ldr r3, [r7, #20]
  4579. 80021de: 005b lsls r3, r3, #1
  4580. 80021e0: 2203 movs r2, #3
  4581. 80021e2: fa02 f303 lsl.w r3, r2, r3
  4582. 80021e6: 43db mvns r3, r3
  4583. 80021e8: 693a ldr r2, [r7, #16]
  4584. 80021ea: 4013 ands r3, r2
  4585. 80021ec: 613b str r3, [r7, #16]
  4586. SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
  4587. 80021ee: 683b ldr r3, [r7, #0]
  4588. 80021f0: 685b ldr r3, [r3, #4]
  4589. 80021f2: f003 0203 and.w r2, r3, #3
  4590. 80021f6: 697b ldr r3, [r7, #20]
  4591. 80021f8: 005b lsls r3, r3, #1
  4592. 80021fa: fa02 f303 lsl.w r3, r2, r3
  4593. 80021fe: 693a ldr r2, [r7, #16]
  4594. 8002200: 4313 orrs r3, r2
  4595. 8002202: 613b str r3, [r7, #16]
  4596. GPIOx->MODER = temp;
  4597. 8002204: 687b ldr r3, [r7, #4]
  4598. 8002206: 693a ldr r2, [r7, #16]
  4599. 8002208: 601a str r2, [r3, #0]
  4600. /*--------------------- EXTI Mode Configuration ------------------------*/
  4601. /* Configure the External Interrupt or event for the current IO */
  4602. if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
  4603. 800220a: 683b ldr r3, [r7, #0]
  4604. 800220c: 685b ldr r3, [r3, #4]
  4605. 800220e: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  4606. 8002212: 2b00 cmp r3, #0
  4607. 8002214: f000 80ac beq.w 8002370 <HAL_GPIO_Init+0x2d4>
  4608. {
  4609. /* Enable SYSCFG Clock */
  4610. __HAL_RCC_SYSCFG_CLK_ENABLE();
  4611. 8002218: 4b5d ldr r3, [pc, #372] ; (8002390 <HAL_GPIO_Init+0x2f4>)
  4612. 800221a: 6a1b ldr r3, [r3, #32]
  4613. 800221c: 4a5c ldr r2, [pc, #368] ; (8002390 <HAL_GPIO_Init+0x2f4>)
  4614. 800221e: f043 0301 orr.w r3, r3, #1
  4615. 8002222: 6213 str r3, [r2, #32]
  4616. 8002224: 4b5a ldr r3, [pc, #360] ; (8002390 <HAL_GPIO_Init+0x2f4>)
  4617. 8002226: 6a1b ldr r3, [r3, #32]
  4618. 8002228: f003 0301 and.w r3, r3, #1
  4619. 800222c: 60bb str r3, [r7, #8]
  4620. 800222e: 68bb ldr r3, [r7, #8]
  4621. temp = SYSCFG->EXTICR[position >> 2];
  4622. 8002230: 4a58 ldr r2, [pc, #352] ; (8002394 <HAL_GPIO_Init+0x2f8>)
  4623. 8002232: 697b ldr r3, [r7, #20]
  4624. 8002234: 089b lsrs r3, r3, #2
  4625. 8002236: 3302 adds r3, #2
  4626. 8002238: f852 3023 ldr.w r3, [r2, r3, lsl #2]
  4627. 800223c: 613b str r3, [r7, #16]
  4628. CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03)));
  4629. 800223e: 697b ldr r3, [r7, #20]
  4630. 8002240: f003 0303 and.w r3, r3, #3
  4631. 8002244: 009b lsls r3, r3, #2
  4632. 8002246: 220f movs r2, #15
  4633. 8002248: fa02 f303 lsl.w r3, r2, r3
  4634. 800224c: 43db mvns r3, r3
  4635. 800224e: 693a ldr r2, [r7, #16]
  4636. 8002250: 4013 ands r3, r2
  4637. 8002252: 613b str r3, [r7, #16]
  4638. SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
  4639. 8002254: 687b ldr r3, [r7, #4]
  4640. 8002256: 4a50 ldr r2, [pc, #320] ; (8002398 <HAL_GPIO_Init+0x2fc>)
  4641. 8002258: 4293 cmp r3, r2
  4642. 800225a: d025 beq.n 80022a8 <HAL_GPIO_Init+0x20c>
  4643. 800225c: 687b ldr r3, [r7, #4]
  4644. 800225e: 4a4f ldr r2, [pc, #316] ; (800239c <HAL_GPIO_Init+0x300>)
  4645. 8002260: 4293 cmp r3, r2
  4646. 8002262: d01f beq.n 80022a4 <HAL_GPIO_Init+0x208>
  4647. 8002264: 687b ldr r3, [r7, #4]
  4648. 8002266: 4a4e ldr r2, [pc, #312] ; (80023a0 <HAL_GPIO_Init+0x304>)
  4649. 8002268: 4293 cmp r3, r2
  4650. 800226a: d019 beq.n 80022a0 <HAL_GPIO_Init+0x204>
  4651. 800226c: 687b ldr r3, [r7, #4]
  4652. 800226e: 4a4d ldr r2, [pc, #308] ; (80023a4 <HAL_GPIO_Init+0x308>)
  4653. 8002270: 4293 cmp r3, r2
  4654. 8002272: d013 beq.n 800229c <HAL_GPIO_Init+0x200>
  4655. 8002274: 687b ldr r3, [r7, #4]
  4656. 8002276: 4a4c ldr r2, [pc, #304] ; (80023a8 <HAL_GPIO_Init+0x30c>)
  4657. 8002278: 4293 cmp r3, r2
  4658. 800227a: d00d beq.n 8002298 <HAL_GPIO_Init+0x1fc>
  4659. 800227c: 687b ldr r3, [r7, #4]
  4660. 800227e: 4a4b ldr r2, [pc, #300] ; (80023ac <HAL_GPIO_Init+0x310>)
  4661. 8002280: 4293 cmp r3, r2
  4662. 8002282: d007 beq.n 8002294 <HAL_GPIO_Init+0x1f8>
  4663. 8002284: 687b ldr r3, [r7, #4]
  4664. 8002286: 4a4a ldr r2, [pc, #296] ; (80023b0 <HAL_GPIO_Init+0x314>)
  4665. 8002288: 4293 cmp r3, r2
  4666. 800228a: d101 bne.n 8002290 <HAL_GPIO_Init+0x1f4>
  4667. 800228c: 2306 movs r3, #6
  4668. 800228e: e00c b.n 80022aa <HAL_GPIO_Init+0x20e>
  4669. 8002290: 2307 movs r3, #7
  4670. 8002292: e00a b.n 80022aa <HAL_GPIO_Init+0x20e>
  4671. 8002294: 2305 movs r3, #5
  4672. 8002296: e008 b.n 80022aa <HAL_GPIO_Init+0x20e>
  4673. 8002298: 2304 movs r3, #4
  4674. 800229a: e006 b.n 80022aa <HAL_GPIO_Init+0x20e>
  4675. 800229c: 2303 movs r3, #3
  4676. 800229e: e004 b.n 80022aa <HAL_GPIO_Init+0x20e>
  4677. 80022a0: 2302 movs r3, #2
  4678. 80022a2: e002 b.n 80022aa <HAL_GPIO_Init+0x20e>
  4679. 80022a4: 2301 movs r3, #1
  4680. 80022a6: e000 b.n 80022aa <HAL_GPIO_Init+0x20e>
  4681. 80022a8: 2300 movs r3, #0
  4682. 80022aa: 697a ldr r2, [r7, #20]
  4683. 80022ac: f002 0203 and.w r2, r2, #3
  4684. 80022b0: 0092 lsls r2, r2, #2
  4685. 80022b2: 4093 lsls r3, r2
  4686. 80022b4: 693a ldr r2, [r7, #16]
  4687. 80022b6: 4313 orrs r3, r2
  4688. 80022b8: 613b str r3, [r7, #16]
  4689. SYSCFG->EXTICR[position >> 2] = temp;
  4690. 80022ba: 4936 ldr r1, [pc, #216] ; (8002394 <HAL_GPIO_Init+0x2f8>)
  4691. 80022bc: 697b ldr r3, [r7, #20]
  4692. 80022be: 089b lsrs r3, r3, #2
  4693. 80022c0: 3302 adds r3, #2
  4694. 80022c2: 693a ldr r2, [r7, #16]
  4695. 80022c4: f841 2023 str.w r2, [r1, r3, lsl #2]
  4696. /* Clear EXTI line configuration */
  4697. temp = EXTI->IMR;
  4698. 80022c8: 4b3a ldr r3, [pc, #232] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4699. 80022ca: 681b ldr r3, [r3, #0]
  4700. 80022cc: 613b str r3, [r7, #16]
  4701. CLEAR_BIT(temp, (uint32_t)iocurrent);
  4702. 80022ce: 68fb ldr r3, [r7, #12]
  4703. 80022d0: 43db mvns r3, r3
  4704. 80022d2: 693a ldr r2, [r7, #16]
  4705. 80022d4: 4013 ands r3, r2
  4706. 80022d6: 613b str r3, [r7, #16]
  4707. if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
  4708. 80022d8: 683b ldr r3, [r7, #0]
  4709. 80022da: 685b ldr r3, [r3, #4]
  4710. 80022dc: f403 3380 and.w r3, r3, #65536 ; 0x10000
  4711. 80022e0: 2b00 cmp r3, #0
  4712. 80022e2: d003 beq.n 80022ec <HAL_GPIO_Init+0x250>
  4713. {
  4714. SET_BIT(temp, iocurrent);
  4715. 80022e4: 693a ldr r2, [r7, #16]
  4716. 80022e6: 68fb ldr r3, [r7, #12]
  4717. 80022e8: 4313 orrs r3, r2
  4718. 80022ea: 613b str r3, [r7, #16]
  4719. }
  4720. EXTI->IMR = temp;
  4721. 80022ec: 4a31 ldr r2, [pc, #196] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4722. 80022ee: 693b ldr r3, [r7, #16]
  4723. 80022f0: 6013 str r3, [r2, #0]
  4724. temp = EXTI->EMR;
  4725. 80022f2: 4b30 ldr r3, [pc, #192] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4726. 80022f4: 685b ldr r3, [r3, #4]
  4727. 80022f6: 613b str r3, [r7, #16]
  4728. CLEAR_BIT(temp, (uint32_t)iocurrent);
  4729. 80022f8: 68fb ldr r3, [r7, #12]
  4730. 80022fa: 43db mvns r3, r3
  4731. 80022fc: 693a ldr r2, [r7, #16]
  4732. 80022fe: 4013 ands r3, r2
  4733. 8002300: 613b str r3, [r7, #16]
  4734. if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
  4735. 8002302: 683b ldr r3, [r7, #0]
  4736. 8002304: 685b ldr r3, [r3, #4]
  4737. 8002306: f403 3300 and.w r3, r3, #131072 ; 0x20000
  4738. 800230a: 2b00 cmp r3, #0
  4739. 800230c: d003 beq.n 8002316 <HAL_GPIO_Init+0x27a>
  4740. {
  4741. SET_BIT(temp, iocurrent);
  4742. 800230e: 693a ldr r2, [r7, #16]
  4743. 8002310: 68fb ldr r3, [r7, #12]
  4744. 8002312: 4313 orrs r3, r2
  4745. 8002314: 613b str r3, [r7, #16]
  4746. }
  4747. EXTI->EMR = temp;
  4748. 8002316: 4a27 ldr r2, [pc, #156] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4749. 8002318: 693b ldr r3, [r7, #16]
  4750. 800231a: 6053 str r3, [r2, #4]
  4751. /* Clear Rising Falling edge configuration */
  4752. temp = EXTI->RTSR;
  4753. 800231c: 4b25 ldr r3, [pc, #148] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4754. 800231e: 689b ldr r3, [r3, #8]
  4755. 8002320: 613b str r3, [r7, #16]
  4756. CLEAR_BIT(temp, (uint32_t)iocurrent);
  4757. 8002322: 68fb ldr r3, [r7, #12]
  4758. 8002324: 43db mvns r3, r3
  4759. 8002326: 693a ldr r2, [r7, #16]
  4760. 8002328: 4013 ands r3, r2
  4761. 800232a: 613b str r3, [r7, #16]
  4762. if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
  4763. 800232c: 683b ldr r3, [r7, #0]
  4764. 800232e: 685b ldr r3, [r3, #4]
  4765. 8002330: f403 1380 and.w r3, r3, #1048576 ; 0x100000
  4766. 8002334: 2b00 cmp r3, #0
  4767. 8002336: d003 beq.n 8002340 <HAL_GPIO_Init+0x2a4>
  4768. {
  4769. SET_BIT(temp, iocurrent);
  4770. 8002338: 693a ldr r2, [r7, #16]
  4771. 800233a: 68fb ldr r3, [r7, #12]
  4772. 800233c: 4313 orrs r3, r2
  4773. 800233e: 613b str r3, [r7, #16]
  4774. }
  4775. EXTI->RTSR = temp;
  4776. 8002340: 4a1c ldr r2, [pc, #112] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4777. 8002342: 693b ldr r3, [r7, #16]
  4778. 8002344: 6093 str r3, [r2, #8]
  4779. temp = EXTI->FTSR;
  4780. 8002346: 4b1b ldr r3, [pc, #108] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4781. 8002348: 68db ldr r3, [r3, #12]
  4782. 800234a: 613b str r3, [r7, #16]
  4783. CLEAR_BIT(temp, (uint32_t)iocurrent);
  4784. 800234c: 68fb ldr r3, [r7, #12]
  4785. 800234e: 43db mvns r3, r3
  4786. 8002350: 693a ldr r2, [r7, #16]
  4787. 8002352: 4013 ands r3, r2
  4788. 8002354: 613b str r3, [r7, #16]
  4789. if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
  4790. 8002356: 683b ldr r3, [r7, #0]
  4791. 8002358: 685b ldr r3, [r3, #4]
  4792. 800235a: f403 1300 and.w r3, r3, #2097152 ; 0x200000
  4793. 800235e: 2b00 cmp r3, #0
  4794. 8002360: d003 beq.n 800236a <HAL_GPIO_Init+0x2ce>
  4795. {
  4796. SET_BIT(temp, iocurrent);
  4797. 8002362: 693a ldr r2, [r7, #16]
  4798. 8002364: 68fb ldr r3, [r7, #12]
  4799. 8002366: 4313 orrs r3, r2
  4800. 8002368: 613b str r3, [r7, #16]
  4801. }
  4802. EXTI->FTSR = temp;
  4803. 800236a: 4a12 ldr r2, [pc, #72] ; (80023b4 <HAL_GPIO_Init+0x318>)
  4804. 800236c: 693b ldr r3, [r7, #16]
  4805. 800236e: 60d3 str r3, [r2, #12]
  4806. }
  4807. }
  4808. position++;
  4809. 8002370: 697b ldr r3, [r7, #20]
  4810. 8002372: 3301 adds r3, #1
  4811. 8002374: 617b str r3, [r7, #20]
  4812. while (((GPIO_Init->Pin) >> position) != 0)
  4813. 8002376: 683b ldr r3, [r7, #0]
  4814. 8002378: 681a ldr r2, [r3, #0]
  4815. 800237a: 697b ldr r3, [r7, #20]
  4816. 800237c: fa22 f303 lsr.w r3, r2, r3
  4817. 8002380: 2b00 cmp r3, #0
  4818. 8002382: f47f ae97 bne.w 80020b4 <HAL_GPIO_Init+0x18>
  4819. }
  4820. }
  4821. 8002386: bf00 nop
  4822. 8002388: 371c adds r7, #28
  4823. 800238a: 46bd mov sp, r7
  4824. 800238c: bc80 pop {r7}
  4825. 800238e: 4770 bx lr
  4826. 8002390: 40023800 .word 0x40023800
  4827. 8002394: 40010000 .word 0x40010000
  4828. 8002398: 40020000 .word 0x40020000
  4829. 800239c: 40020400 .word 0x40020400
  4830. 80023a0: 40020800 .word 0x40020800
  4831. 80023a4: 40020c00 .word 0x40020c00
  4832. 80023a8: 40021000 .word 0x40021000
  4833. 80023ac: 40021400 .word 0x40021400
  4834. 80023b0: 40021800 .word 0x40021800
  4835. 80023b4: 40010400 .word 0x40010400
  4836. 080023b8 <HAL_GPIO_WritePin>:
  4837. * @arg GPIO_PIN_RESET: to clear the port pin
  4838. * @arg GPIO_PIN_SET: to set the port pin
  4839. * @retval None
  4840. */
  4841. void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
  4842. {
  4843. 80023b8: b480 push {r7}
  4844. 80023ba: b083 sub sp, #12
  4845. 80023bc: af00 add r7, sp, #0
  4846. 80023be: 6078 str r0, [r7, #4]
  4847. 80023c0: 460b mov r3, r1
  4848. 80023c2: 807b strh r3, [r7, #2]
  4849. 80023c4: 4613 mov r3, r2
  4850. 80023c6: 707b strb r3, [r7, #1]
  4851. /* Check the parameters */
  4852. assert_param(IS_GPIO_PIN(GPIO_Pin));
  4853. assert_param(IS_GPIO_PIN_ACTION(PinState));
  4854. if (PinState != GPIO_PIN_RESET)
  4855. 80023c8: 787b ldrb r3, [r7, #1]
  4856. 80023ca: 2b00 cmp r3, #0
  4857. 80023cc: d003 beq.n 80023d6 <HAL_GPIO_WritePin+0x1e>
  4858. {
  4859. GPIOx->BSRR = (uint32_t)GPIO_Pin;
  4860. 80023ce: 887a ldrh r2, [r7, #2]
  4861. 80023d0: 687b ldr r3, [r7, #4]
  4862. 80023d2: 619a str r2, [r3, #24]
  4863. }
  4864. else
  4865. {
  4866. GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
  4867. }
  4868. }
  4869. 80023d4: e003 b.n 80023de <HAL_GPIO_WritePin+0x26>
  4870. GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
  4871. 80023d6: 887b ldrh r3, [r7, #2]
  4872. 80023d8: 041a lsls r2, r3, #16
  4873. 80023da: 687b ldr r3, [r7, #4]
  4874. 80023dc: 619a str r2, [r3, #24]
  4875. }
  4876. 80023de: bf00 nop
  4877. 80023e0: 370c adds r7, #12
  4878. 80023e2: 46bd mov sp, r7
  4879. 80023e4: bc80 pop {r7}
  4880. 80023e6: 4770 bx lr
  4881. 080023e8 <HAL_RCC_OscConfig>:
  4882. * supported by this macro. User should request a transition to HSE Off
  4883. * first and then HSE On or HSE Bypass.
  4884. * @retval HAL status
  4885. */
  4886. HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
  4887. {
  4888. 80023e8: b580 push {r7, lr}
  4889. 80023ea: b088 sub sp, #32
  4890. 80023ec: af00 add r7, sp, #0
  4891. 80023ee: 6078 str r0, [r7, #4]
  4892. uint32_t tickstart;
  4893. HAL_StatusTypeDef status;
  4894. uint32_t sysclk_source, pll_config;
  4895. /* Check the parameters */
  4896. if(RCC_OscInitStruct == NULL)
  4897. 80023f0: 687b ldr r3, [r7, #4]
  4898. 80023f2: 2b00 cmp r3, #0
  4899. 80023f4: d101 bne.n 80023fa <HAL_RCC_OscConfig+0x12>
  4900. {
  4901. return HAL_ERROR;
  4902. 80023f6: 2301 movs r3, #1
  4903. 80023f8: e31d b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  4904. }
  4905. assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  4906. sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE();
  4907. 80023fa: 4b94 ldr r3, [pc, #592] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4908. 80023fc: 689b ldr r3, [r3, #8]
  4909. 80023fe: f003 030c and.w r3, r3, #12
  4910. 8002402: 61bb str r3, [r7, #24]
  4911. pll_config = __HAL_RCC_GET_PLL_OSCSOURCE();
  4912. 8002404: 4b91 ldr r3, [pc, #580] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4913. 8002406: 689b ldr r3, [r3, #8]
  4914. 8002408: f403 3380 and.w r3, r3, #65536 ; 0x10000
  4915. 800240c: 617b str r3, [r7, #20]
  4916. /*------------------------------- HSE Configuration ------------------------*/
  4917. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
  4918. 800240e: 687b ldr r3, [r7, #4]
  4919. 8002410: 681b ldr r3, [r3, #0]
  4920. 8002412: f003 0301 and.w r3, r3, #1
  4921. 8002416: 2b00 cmp r3, #0
  4922. 8002418: d07b beq.n 8002512 <HAL_RCC_OscConfig+0x12a>
  4923. {
  4924. /* Check the parameters */
  4925. assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
  4926. /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
  4927. if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE)
  4928. 800241a: 69bb ldr r3, [r7, #24]
  4929. 800241c: 2b08 cmp r3, #8
  4930. 800241e: d006 beq.n 800242e <HAL_RCC_OscConfig+0x46>
  4931. || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE)))
  4932. 8002420: 69bb ldr r3, [r7, #24]
  4933. 8002422: 2b0c cmp r3, #12
  4934. 8002424: d10f bne.n 8002446 <HAL_RCC_OscConfig+0x5e>
  4935. 8002426: 697b ldr r3, [r7, #20]
  4936. 8002428: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
  4937. 800242c: d10b bne.n 8002446 <HAL_RCC_OscConfig+0x5e>
  4938. {
  4939. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
  4940. 800242e: 4b87 ldr r3, [pc, #540] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4941. 8002430: 681b ldr r3, [r3, #0]
  4942. 8002432: f403 3300 and.w r3, r3, #131072 ; 0x20000
  4943. 8002436: 2b00 cmp r3, #0
  4944. 8002438: d06a beq.n 8002510 <HAL_RCC_OscConfig+0x128>
  4945. 800243a: 687b ldr r3, [r7, #4]
  4946. 800243c: 685b ldr r3, [r3, #4]
  4947. 800243e: 2b00 cmp r3, #0
  4948. 8002440: d166 bne.n 8002510 <HAL_RCC_OscConfig+0x128>
  4949. {
  4950. return HAL_ERROR;
  4951. 8002442: 2301 movs r3, #1
  4952. 8002444: e2f7 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  4953. }
  4954. }
  4955. else
  4956. {
  4957. /* Set the new HSE configuration ---------------------------------------*/
  4958. __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
  4959. 8002446: 687b ldr r3, [r7, #4]
  4960. 8002448: 685b ldr r3, [r3, #4]
  4961. 800244a: 2b01 cmp r3, #1
  4962. 800244c: d106 bne.n 800245c <HAL_RCC_OscConfig+0x74>
  4963. 800244e: 4b7f ldr r3, [pc, #508] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4964. 8002450: 681b ldr r3, [r3, #0]
  4965. 8002452: 4a7e ldr r2, [pc, #504] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4966. 8002454: f443 3380 orr.w r3, r3, #65536 ; 0x10000
  4967. 8002458: 6013 str r3, [r2, #0]
  4968. 800245a: e02d b.n 80024b8 <HAL_RCC_OscConfig+0xd0>
  4969. 800245c: 687b ldr r3, [r7, #4]
  4970. 800245e: 685b ldr r3, [r3, #4]
  4971. 8002460: 2b00 cmp r3, #0
  4972. 8002462: d10c bne.n 800247e <HAL_RCC_OscConfig+0x96>
  4973. 8002464: 4b79 ldr r3, [pc, #484] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4974. 8002466: 681b ldr r3, [r3, #0]
  4975. 8002468: 4a78 ldr r2, [pc, #480] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4976. 800246a: f423 3380 bic.w r3, r3, #65536 ; 0x10000
  4977. 800246e: 6013 str r3, [r2, #0]
  4978. 8002470: 4b76 ldr r3, [pc, #472] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4979. 8002472: 681b ldr r3, [r3, #0]
  4980. 8002474: 4a75 ldr r2, [pc, #468] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4981. 8002476: f423 2380 bic.w r3, r3, #262144 ; 0x40000
  4982. 800247a: 6013 str r3, [r2, #0]
  4983. 800247c: e01c b.n 80024b8 <HAL_RCC_OscConfig+0xd0>
  4984. 800247e: 687b ldr r3, [r7, #4]
  4985. 8002480: 685b ldr r3, [r3, #4]
  4986. 8002482: 2b05 cmp r3, #5
  4987. 8002484: d10c bne.n 80024a0 <HAL_RCC_OscConfig+0xb8>
  4988. 8002486: 4b71 ldr r3, [pc, #452] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4989. 8002488: 681b ldr r3, [r3, #0]
  4990. 800248a: 4a70 ldr r2, [pc, #448] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4991. 800248c: f443 2380 orr.w r3, r3, #262144 ; 0x40000
  4992. 8002490: 6013 str r3, [r2, #0]
  4993. 8002492: 4b6e ldr r3, [pc, #440] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4994. 8002494: 681b ldr r3, [r3, #0]
  4995. 8002496: 4a6d ldr r2, [pc, #436] ; (800264c <HAL_RCC_OscConfig+0x264>)
  4996. 8002498: f443 3380 orr.w r3, r3, #65536 ; 0x10000
  4997. 800249c: 6013 str r3, [r2, #0]
  4998. 800249e: e00b b.n 80024b8 <HAL_RCC_OscConfig+0xd0>
  4999. 80024a0: 4b6a ldr r3, [pc, #424] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5000. 80024a2: 681b ldr r3, [r3, #0]
  5001. 80024a4: 4a69 ldr r2, [pc, #420] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5002. 80024a6: f423 3380 bic.w r3, r3, #65536 ; 0x10000
  5003. 80024aa: 6013 str r3, [r2, #0]
  5004. 80024ac: 4b67 ldr r3, [pc, #412] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5005. 80024ae: 681b ldr r3, [r3, #0]
  5006. 80024b0: 4a66 ldr r2, [pc, #408] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5007. 80024b2: f423 2380 bic.w r3, r3, #262144 ; 0x40000
  5008. 80024b6: 6013 str r3, [r2, #0]
  5009. /* Check the HSE State */
  5010. if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
  5011. 80024b8: 687b ldr r3, [r7, #4]
  5012. 80024ba: 685b ldr r3, [r3, #4]
  5013. 80024bc: 2b00 cmp r3, #0
  5014. 80024be: d013 beq.n 80024e8 <HAL_RCC_OscConfig+0x100>
  5015. {
  5016. /* Get Start Tick */
  5017. tickstart = HAL_GetTick();
  5018. 80024c0: f7ff fcd0 bl 8001e64 <HAL_GetTick>
  5019. 80024c4: 6138 str r0, [r7, #16]
  5020. /* Wait till HSE is ready */
  5021. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
  5022. 80024c6: e008 b.n 80024da <HAL_RCC_OscConfig+0xf2>
  5023. {
  5024. if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  5025. 80024c8: f7ff fccc bl 8001e64 <HAL_GetTick>
  5026. 80024cc: 4602 mov r2, r0
  5027. 80024ce: 693b ldr r3, [r7, #16]
  5028. 80024d0: 1ad3 subs r3, r2, r3
  5029. 80024d2: 2b64 cmp r3, #100 ; 0x64
  5030. 80024d4: d901 bls.n 80024da <HAL_RCC_OscConfig+0xf2>
  5031. {
  5032. return HAL_TIMEOUT;
  5033. 80024d6: 2303 movs r3, #3
  5034. 80024d8: e2ad b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5035. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
  5036. 80024da: 4b5c ldr r3, [pc, #368] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5037. 80024dc: 681b ldr r3, [r3, #0]
  5038. 80024de: f403 3300 and.w r3, r3, #131072 ; 0x20000
  5039. 80024e2: 2b00 cmp r3, #0
  5040. 80024e4: d0f0 beq.n 80024c8 <HAL_RCC_OscConfig+0xe0>
  5041. 80024e6: e014 b.n 8002512 <HAL_RCC_OscConfig+0x12a>
  5042. }
  5043. }
  5044. else
  5045. {
  5046. /* Get Start Tick */
  5047. tickstart = HAL_GetTick();
  5048. 80024e8: f7ff fcbc bl 8001e64 <HAL_GetTick>
  5049. 80024ec: 6138 str r0, [r7, #16]
  5050. /* Wait till HSE is disabled */
  5051. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
  5052. 80024ee: e008 b.n 8002502 <HAL_RCC_OscConfig+0x11a>
  5053. {
  5054. if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
  5055. 80024f0: f7ff fcb8 bl 8001e64 <HAL_GetTick>
  5056. 80024f4: 4602 mov r2, r0
  5057. 80024f6: 693b ldr r3, [r7, #16]
  5058. 80024f8: 1ad3 subs r3, r2, r3
  5059. 80024fa: 2b64 cmp r3, #100 ; 0x64
  5060. 80024fc: d901 bls.n 8002502 <HAL_RCC_OscConfig+0x11a>
  5061. {
  5062. return HAL_TIMEOUT;
  5063. 80024fe: 2303 movs r3, #3
  5064. 8002500: e299 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5065. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
  5066. 8002502: 4b52 ldr r3, [pc, #328] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5067. 8002504: 681b ldr r3, [r3, #0]
  5068. 8002506: f403 3300 and.w r3, r3, #131072 ; 0x20000
  5069. 800250a: 2b00 cmp r3, #0
  5070. 800250c: d1f0 bne.n 80024f0 <HAL_RCC_OscConfig+0x108>
  5071. 800250e: e000 b.n 8002512 <HAL_RCC_OscConfig+0x12a>
  5072. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
  5073. 8002510: bf00 nop
  5074. }
  5075. }
  5076. }
  5077. }
  5078. /*----------------------------- HSI Configuration --------------------------*/
  5079. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
  5080. 8002512: 687b ldr r3, [r7, #4]
  5081. 8002514: 681b ldr r3, [r3, #0]
  5082. 8002516: f003 0302 and.w r3, r3, #2
  5083. 800251a: 2b00 cmp r3, #0
  5084. 800251c: d05a beq.n 80025d4 <HAL_RCC_OscConfig+0x1ec>
  5085. /* Check the parameters */
  5086. assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
  5087. assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
  5088. /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
  5089. if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI)
  5090. 800251e: 69bb ldr r3, [r7, #24]
  5091. 8002520: 2b04 cmp r3, #4
  5092. 8002522: d005 beq.n 8002530 <HAL_RCC_OscConfig+0x148>
  5093. || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI)))
  5094. 8002524: 69bb ldr r3, [r7, #24]
  5095. 8002526: 2b0c cmp r3, #12
  5096. 8002528: d119 bne.n 800255e <HAL_RCC_OscConfig+0x176>
  5097. 800252a: 697b ldr r3, [r7, #20]
  5098. 800252c: 2b00 cmp r3, #0
  5099. 800252e: d116 bne.n 800255e <HAL_RCC_OscConfig+0x176>
  5100. {
  5101. /* When HSI is used as system clock it will not disabled */
  5102. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
  5103. 8002530: 4b46 ldr r3, [pc, #280] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5104. 8002532: 681b ldr r3, [r3, #0]
  5105. 8002534: f003 0302 and.w r3, r3, #2
  5106. 8002538: 2b00 cmp r3, #0
  5107. 800253a: d005 beq.n 8002548 <HAL_RCC_OscConfig+0x160>
  5108. 800253c: 687b ldr r3, [r7, #4]
  5109. 800253e: 68db ldr r3, [r3, #12]
  5110. 8002540: 2b01 cmp r3, #1
  5111. 8002542: d001 beq.n 8002548 <HAL_RCC_OscConfig+0x160>
  5112. {
  5113. return HAL_ERROR;
  5114. 8002544: 2301 movs r3, #1
  5115. 8002546: e276 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5116. }
  5117. /* Otherwise, just the calibration is allowed */
  5118. else
  5119. {
  5120. /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
  5121. __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
  5122. 8002548: 4b40 ldr r3, [pc, #256] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5123. 800254a: 685b ldr r3, [r3, #4]
  5124. 800254c: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00
  5125. 8002550: 687b ldr r3, [r7, #4]
  5126. 8002552: 691b ldr r3, [r3, #16]
  5127. 8002554: 021b lsls r3, r3, #8
  5128. 8002556: 493d ldr r1, [pc, #244] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5129. 8002558: 4313 orrs r3, r2
  5130. 800255a: 604b str r3, [r1, #4]
  5131. if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
  5132. 800255c: e03a b.n 80025d4 <HAL_RCC_OscConfig+0x1ec>
  5133. }
  5134. }
  5135. else
  5136. {
  5137. /* Check the HSI State */
  5138. if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
  5139. 800255e: 687b ldr r3, [r7, #4]
  5140. 8002560: 68db ldr r3, [r3, #12]
  5141. 8002562: 2b00 cmp r3, #0
  5142. 8002564: d020 beq.n 80025a8 <HAL_RCC_OscConfig+0x1c0>
  5143. {
  5144. /* Enable the Internal High Speed oscillator (HSI). */
  5145. __HAL_RCC_HSI_ENABLE();
  5146. 8002566: 4b3a ldr r3, [pc, #232] ; (8002650 <HAL_RCC_OscConfig+0x268>)
  5147. 8002568: 2201 movs r2, #1
  5148. 800256a: 601a str r2, [r3, #0]
  5149. /* Get Start Tick */
  5150. tickstart = HAL_GetTick();
  5151. 800256c: f7ff fc7a bl 8001e64 <HAL_GetTick>
  5152. 8002570: 6138 str r0, [r7, #16]
  5153. /* Wait till HSI is ready */
  5154. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
  5155. 8002572: e008 b.n 8002586 <HAL_RCC_OscConfig+0x19e>
  5156. {
  5157. if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  5158. 8002574: f7ff fc76 bl 8001e64 <HAL_GetTick>
  5159. 8002578: 4602 mov r2, r0
  5160. 800257a: 693b ldr r3, [r7, #16]
  5161. 800257c: 1ad3 subs r3, r2, r3
  5162. 800257e: 2b02 cmp r3, #2
  5163. 8002580: d901 bls.n 8002586 <HAL_RCC_OscConfig+0x19e>
  5164. {
  5165. return HAL_TIMEOUT;
  5166. 8002582: 2303 movs r3, #3
  5167. 8002584: e257 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5168. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
  5169. 8002586: 4b31 ldr r3, [pc, #196] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5170. 8002588: 681b ldr r3, [r3, #0]
  5171. 800258a: f003 0302 and.w r3, r3, #2
  5172. 800258e: 2b00 cmp r3, #0
  5173. 8002590: d0f0 beq.n 8002574 <HAL_RCC_OscConfig+0x18c>
  5174. }
  5175. }
  5176. /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
  5177. __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
  5178. 8002592: 4b2e ldr r3, [pc, #184] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5179. 8002594: 685b ldr r3, [r3, #4]
  5180. 8002596: f423 52f8 bic.w r2, r3, #7936 ; 0x1f00
  5181. 800259a: 687b ldr r3, [r7, #4]
  5182. 800259c: 691b ldr r3, [r3, #16]
  5183. 800259e: 021b lsls r3, r3, #8
  5184. 80025a0: 492a ldr r1, [pc, #168] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5185. 80025a2: 4313 orrs r3, r2
  5186. 80025a4: 604b str r3, [r1, #4]
  5187. 80025a6: e015 b.n 80025d4 <HAL_RCC_OscConfig+0x1ec>
  5188. }
  5189. else
  5190. {
  5191. /* Disable the Internal High Speed oscillator (HSI). */
  5192. __HAL_RCC_HSI_DISABLE();
  5193. 80025a8: 4b29 ldr r3, [pc, #164] ; (8002650 <HAL_RCC_OscConfig+0x268>)
  5194. 80025aa: 2200 movs r2, #0
  5195. 80025ac: 601a str r2, [r3, #0]
  5196. /* Get Start Tick */
  5197. tickstart = HAL_GetTick();
  5198. 80025ae: f7ff fc59 bl 8001e64 <HAL_GetTick>
  5199. 80025b2: 6138 str r0, [r7, #16]
  5200. /* Wait till HSI is disabled */
  5201. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
  5202. 80025b4: e008 b.n 80025c8 <HAL_RCC_OscConfig+0x1e0>
  5203. {
  5204. if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
  5205. 80025b6: f7ff fc55 bl 8001e64 <HAL_GetTick>
  5206. 80025ba: 4602 mov r2, r0
  5207. 80025bc: 693b ldr r3, [r7, #16]
  5208. 80025be: 1ad3 subs r3, r2, r3
  5209. 80025c0: 2b02 cmp r3, #2
  5210. 80025c2: d901 bls.n 80025c8 <HAL_RCC_OscConfig+0x1e0>
  5211. {
  5212. return HAL_TIMEOUT;
  5213. 80025c4: 2303 movs r3, #3
  5214. 80025c6: e236 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5215. while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
  5216. 80025c8: 4b20 ldr r3, [pc, #128] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5217. 80025ca: 681b ldr r3, [r3, #0]
  5218. 80025cc: f003 0302 and.w r3, r3, #2
  5219. 80025d0: 2b00 cmp r3, #0
  5220. 80025d2: d1f0 bne.n 80025b6 <HAL_RCC_OscConfig+0x1ce>
  5221. }
  5222. }
  5223. }
  5224. }
  5225. /*----------------------------- MSI Configuration --------------------------*/
  5226. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
  5227. 80025d4: 687b ldr r3, [r7, #4]
  5228. 80025d6: 681b ldr r3, [r3, #0]
  5229. 80025d8: f003 0310 and.w r3, r3, #16
  5230. 80025dc: 2b00 cmp r3, #0
  5231. 80025de: f000 80b8 beq.w 8002752 <HAL_RCC_OscConfig+0x36a>
  5232. {
  5233. /* When the MSI is used as system clock it will not be disabled */
  5234. if(sysclk_source == RCC_CFGR_SWS_MSI)
  5235. 80025e2: 69bb ldr r3, [r7, #24]
  5236. 80025e4: 2b00 cmp r3, #0
  5237. 80025e6: d170 bne.n 80026ca <HAL_RCC_OscConfig+0x2e2>
  5238. {
  5239. if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
  5240. 80025e8: 4b18 ldr r3, [pc, #96] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5241. 80025ea: 681b ldr r3, [r3, #0]
  5242. 80025ec: f403 7300 and.w r3, r3, #512 ; 0x200
  5243. 80025f0: 2b00 cmp r3, #0
  5244. 80025f2: d005 beq.n 8002600 <HAL_RCC_OscConfig+0x218>
  5245. 80025f4: 687b ldr r3, [r7, #4]
  5246. 80025f6: 699b ldr r3, [r3, #24]
  5247. 80025f8: 2b00 cmp r3, #0
  5248. 80025fa: d101 bne.n 8002600 <HAL_RCC_OscConfig+0x218>
  5249. {
  5250. return HAL_ERROR;
  5251. 80025fc: 2301 movs r3, #1
  5252. 80025fe: e21a b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5253. assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
  5254. /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
  5255. must be correctly programmed according to the frequency of the CPU clock
  5256. (HCLK) and the supply voltage of the device. */
  5257. if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE())
  5258. 8002600: 687b ldr r3, [r7, #4]
  5259. 8002602: 6a1a ldr r2, [r3, #32]
  5260. 8002604: 4b11 ldr r3, [pc, #68] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5261. 8002606: 685b ldr r3, [r3, #4]
  5262. 8002608: f403 4360 and.w r3, r3, #57344 ; 0xe000
  5263. 800260c: 429a cmp r2, r3
  5264. 800260e: d921 bls.n 8002654 <HAL_RCC_OscConfig+0x26c>
  5265. {
  5266. /* First increase number of wait states update if necessary */
  5267. if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
  5268. 8002610: 687b ldr r3, [r7, #4]
  5269. 8002612: 6a1b ldr r3, [r3, #32]
  5270. 8002614: 4618 mov r0, r3
  5271. 8002616: f000 fc47 bl 8002ea8 <RCC_SetFlashLatencyFromMSIRange>
  5272. 800261a: 4603 mov r3, r0
  5273. 800261c: 2b00 cmp r3, #0
  5274. 800261e: d001 beq.n 8002624 <HAL_RCC_OscConfig+0x23c>
  5275. {
  5276. return HAL_ERROR;
  5277. 8002620: 2301 movs r3, #1
  5278. 8002622: e208 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5279. }
  5280. /* Selects the Multiple Speed oscillator (MSI) clock range .*/
  5281. __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
  5282. 8002624: 4b09 ldr r3, [pc, #36] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5283. 8002626: 685b ldr r3, [r3, #4]
  5284. 8002628: f423 4260 bic.w r2, r3, #57344 ; 0xe000
  5285. 800262c: 687b ldr r3, [r7, #4]
  5286. 800262e: 6a1b ldr r3, [r3, #32]
  5287. 8002630: 4906 ldr r1, [pc, #24] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5288. 8002632: 4313 orrs r3, r2
  5289. 8002634: 604b str r3, [r1, #4]
  5290. /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
  5291. __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
  5292. 8002636: 4b05 ldr r3, [pc, #20] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5293. 8002638: 685b ldr r3, [r3, #4]
  5294. 800263a: f023 427f bic.w r2, r3, #4278190080 ; 0xff000000
  5295. 800263e: 687b ldr r3, [r7, #4]
  5296. 8002640: 69db ldr r3, [r3, #28]
  5297. 8002642: 061b lsls r3, r3, #24
  5298. 8002644: 4901 ldr r1, [pc, #4] ; (800264c <HAL_RCC_OscConfig+0x264>)
  5299. 8002646: 4313 orrs r3, r2
  5300. 8002648: 604b str r3, [r1, #4]
  5301. 800264a: e020 b.n 800268e <HAL_RCC_OscConfig+0x2a6>
  5302. 800264c: 40023800 .word 0x40023800
  5303. 8002650: 42470000 .word 0x42470000
  5304. }
  5305. else
  5306. {
  5307. /* Else, keep current flash latency while decreasing applies */
  5308. /* Selects the Multiple Speed oscillator (MSI) clock range .*/
  5309. __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
  5310. 8002654: 4ba4 ldr r3, [pc, #656] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5311. 8002656: 685b ldr r3, [r3, #4]
  5312. 8002658: f423 4260 bic.w r2, r3, #57344 ; 0xe000
  5313. 800265c: 687b ldr r3, [r7, #4]
  5314. 800265e: 6a1b ldr r3, [r3, #32]
  5315. 8002660: 49a1 ldr r1, [pc, #644] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5316. 8002662: 4313 orrs r3, r2
  5317. 8002664: 604b str r3, [r1, #4]
  5318. /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
  5319. __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
  5320. 8002666: 4ba0 ldr r3, [pc, #640] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5321. 8002668: 685b ldr r3, [r3, #4]
  5322. 800266a: f023 427f bic.w r2, r3, #4278190080 ; 0xff000000
  5323. 800266e: 687b ldr r3, [r7, #4]
  5324. 8002670: 69db ldr r3, [r3, #28]
  5325. 8002672: 061b lsls r3, r3, #24
  5326. 8002674: 499c ldr r1, [pc, #624] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5327. 8002676: 4313 orrs r3, r2
  5328. 8002678: 604b str r3, [r1, #4]
  5329. /* Decrease number of wait states update if necessary */
  5330. if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK)
  5331. 800267a: 687b ldr r3, [r7, #4]
  5332. 800267c: 6a1b ldr r3, [r3, #32]
  5333. 800267e: 4618 mov r0, r3
  5334. 8002680: f000 fc12 bl 8002ea8 <RCC_SetFlashLatencyFromMSIRange>
  5335. 8002684: 4603 mov r3, r0
  5336. 8002686: 2b00 cmp r3, #0
  5337. 8002688: d001 beq.n 800268e <HAL_RCC_OscConfig+0x2a6>
  5338. {
  5339. return HAL_ERROR;
  5340. 800268a: 2301 movs r3, #1
  5341. 800268c: e1d3 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5342. }
  5343. }
  5344. /* Update the SystemCoreClock global variable */
  5345. SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
  5346. 800268e: 687b ldr r3, [r7, #4]
  5347. 8002690: 6a1b ldr r3, [r3, #32]
  5348. 8002692: 0b5b lsrs r3, r3, #13
  5349. 8002694: 3301 adds r3, #1
  5350. 8002696: f44f 4200 mov.w r2, #32768 ; 0x8000
  5351. 800269a: fa02 f303 lsl.w r3, r2, r3
  5352. >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
  5353. 800269e: 4a92 ldr r2, [pc, #584] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5354. 80026a0: 6892 ldr r2, [r2, #8]
  5355. 80026a2: 0912 lsrs r2, r2, #4
  5356. 80026a4: f002 020f and.w r2, r2, #15
  5357. 80026a8: 4990 ldr r1, [pc, #576] ; (80028ec <HAL_RCC_OscConfig+0x504>)
  5358. 80026aa: 5c8a ldrb r2, [r1, r2]
  5359. 80026ac: 40d3 lsrs r3, r2
  5360. SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
  5361. 80026ae: 4a90 ldr r2, [pc, #576] ; (80028f0 <HAL_RCC_OscConfig+0x508>)
  5362. 80026b0: 6013 str r3, [r2, #0]
  5363. /* Configure the source of time base considering new system clocks settings*/
  5364. status = HAL_InitTick(uwTickPrio);
  5365. 80026b2: 4b90 ldr r3, [pc, #576] ; (80028f4 <HAL_RCC_OscConfig+0x50c>)
  5366. 80026b4: 681b ldr r3, [r3, #0]
  5367. 80026b6: 4618 mov r0, r3
  5368. 80026b8: f7ff fb88 bl 8001dcc <HAL_InitTick>
  5369. 80026bc: 4603 mov r3, r0
  5370. 80026be: 73fb strb r3, [r7, #15]
  5371. if(status != HAL_OK)
  5372. 80026c0: 7bfb ldrb r3, [r7, #15]
  5373. 80026c2: 2b00 cmp r3, #0
  5374. 80026c4: d045 beq.n 8002752 <HAL_RCC_OscConfig+0x36a>
  5375. {
  5376. return status;
  5377. 80026c6: 7bfb ldrb r3, [r7, #15]
  5378. 80026c8: e1b5 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5379. {
  5380. /* Check MSI State */
  5381. assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
  5382. /* Check the MSI State */
  5383. if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF)
  5384. 80026ca: 687b ldr r3, [r7, #4]
  5385. 80026cc: 699b ldr r3, [r3, #24]
  5386. 80026ce: 2b00 cmp r3, #0
  5387. 80026d0: d029 beq.n 8002726 <HAL_RCC_OscConfig+0x33e>
  5388. {
  5389. /* Enable the Multi Speed oscillator (MSI). */
  5390. __HAL_RCC_MSI_ENABLE();
  5391. 80026d2: 4b89 ldr r3, [pc, #548] ; (80028f8 <HAL_RCC_OscConfig+0x510>)
  5392. 80026d4: 2201 movs r2, #1
  5393. 80026d6: 601a str r2, [r3, #0]
  5394. /* Get Start Tick */
  5395. tickstart = HAL_GetTick();
  5396. 80026d8: f7ff fbc4 bl 8001e64 <HAL_GetTick>
  5397. 80026dc: 6138 str r0, [r7, #16]
  5398. /* Wait till MSI is ready */
  5399. while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
  5400. 80026de: e008 b.n 80026f2 <HAL_RCC_OscConfig+0x30a>
  5401. {
  5402. if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
  5403. 80026e0: f7ff fbc0 bl 8001e64 <HAL_GetTick>
  5404. 80026e4: 4602 mov r2, r0
  5405. 80026e6: 693b ldr r3, [r7, #16]
  5406. 80026e8: 1ad3 subs r3, r2, r3
  5407. 80026ea: 2b02 cmp r3, #2
  5408. 80026ec: d901 bls.n 80026f2 <HAL_RCC_OscConfig+0x30a>
  5409. {
  5410. return HAL_TIMEOUT;
  5411. 80026ee: 2303 movs r3, #3
  5412. 80026f0: e1a1 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5413. while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
  5414. 80026f2: 4b7d ldr r3, [pc, #500] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5415. 80026f4: 681b ldr r3, [r3, #0]
  5416. 80026f6: f403 7300 and.w r3, r3, #512 ; 0x200
  5417. 80026fa: 2b00 cmp r3, #0
  5418. 80026fc: d0f0 beq.n 80026e0 <HAL_RCC_OscConfig+0x2f8>
  5419. /* Check MSICalibrationValue and MSIClockRange input parameters */
  5420. assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
  5421. assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
  5422. /* Selects the Multiple Speed oscillator (MSI) clock range .*/
  5423. __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
  5424. 80026fe: 4b7a ldr r3, [pc, #488] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5425. 8002700: 685b ldr r3, [r3, #4]
  5426. 8002702: f423 4260 bic.w r2, r3, #57344 ; 0xe000
  5427. 8002706: 687b ldr r3, [r7, #4]
  5428. 8002708: 6a1b ldr r3, [r3, #32]
  5429. 800270a: 4977 ldr r1, [pc, #476] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5430. 800270c: 4313 orrs r3, r2
  5431. 800270e: 604b str r3, [r1, #4]
  5432. /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
  5433. __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
  5434. 8002710: 4b75 ldr r3, [pc, #468] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5435. 8002712: 685b ldr r3, [r3, #4]
  5436. 8002714: f023 427f bic.w r2, r3, #4278190080 ; 0xff000000
  5437. 8002718: 687b ldr r3, [r7, #4]
  5438. 800271a: 69db ldr r3, [r3, #28]
  5439. 800271c: 061b lsls r3, r3, #24
  5440. 800271e: 4972 ldr r1, [pc, #456] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5441. 8002720: 4313 orrs r3, r2
  5442. 8002722: 604b str r3, [r1, #4]
  5443. 8002724: e015 b.n 8002752 <HAL_RCC_OscConfig+0x36a>
  5444. }
  5445. else
  5446. {
  5447. /* Disable the Multi Speed oscillator (MSI). */
  5448. __HAL_RCC_MSI_DISABLE();
  5449. 8002726: 4b74 ldr r3, [pc, #464] ; (80028f8 <HAL_RCC_OscConfig+0x510>)
  5450. 8002728: 2200 movs r2, #0
  5451. 800272a: 601a str r2, [r3, #0]
  5452. /* Get Start Tick */
  5453. tickstart = HAL_GetTick();
  5454. 800272c: f7ff fb9a bl 8001e64 <HAL_GetTick>
  5455. 8002730: 6138 str r0, [r7, #16]
  5456. /* Wait till MSI is ready */
  5457. while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
  5458. 8002732: e008 b.n 8002746 <HAL_RCC_OscConfig+0x35e>
  5459. {
  5460. if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
  5461. 8002734: f7ff fb96 bl 8001e64 <HAL_GetTick>
  5462. 8002738: 4602 mov r2, r0
  5463. 800273a: 693b ldr r3, [r7, #16]
  5464. 800273c: 1ad3 subs r3, r2, r3
  5465. 800273e: 2b02 cmp r3, #2
  5466. 8002740: d901 bls.n 8002746 <HAL_RCC_OscConfig+0x35e>
  5467. {
  5468. return HAL_TIMEOUT;
  5469. 8002742: 2303 movs r3, #3
  5470. 8002744: e177 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5471. while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
  5472. 8002746: 4b68 ldr r3, [pc, #416] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5473. 8002748: 681b ldr r3, [r3, #0]
  5474. 800274a: f403 7300 and.w r3, r3, #512 ; 0x200
  5475. 800274e: 2b00 cmp r3, #0
  5476. 8002750: d1f0 bne.n 8002734 <HAL_RCC_OscConfig+0x34c>
  5477. }
  5478. }
  5479. }
  5480. }
  5481. /*------------------------------ LSI Configuration -------------------------*/
  5482. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
  5483. 8002752: 687b ldr r3, [r7, #4]
  5484. 8002754: 681b ldr r3, [r3, #0]
  5485. 8002756: f003 0308 and.w r3, r3, #8
  5486. 800275a: 2b00 cmp r3, #0
  5487. 800275c: d030 beq.n 80027c0 <HAL_RCC_OscConfig+0x3d8>
  5488. {
  5489. /* Check the parameters */
  5490. assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
  5491. /* Check the LSI State */
  5492. if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
  5493. 800275e: 687b ldr r3, [r7, #4]
  5494. 8002760: 695b ldr r3, [r3, #20]
  5495. 8002762: 2b00 cmp r3, #0
  5496. 8002764: d016 beq.n 8002794 <HAL_RCC_OscConfig+0x3ac>
  5497. {
  5498. /* Enable the Internal Low Speed oscillator (LSI). */
  5499. __HAL_RCC_LSI_ENABLE();
  5500. 8002766: 4b65 ldr r3, [pc, #404] ; (80028fc <HAL_RCC_OscConfig+0x514>)
  5501. 8002768: 2201 movs r2, #1
  5502. 800276a: 601a str r2, [r3, #0]
  5503. /* Get Start Tick */
  5504. tickstart = HAL_GetTick();
  5505. 800276c: f7ff fb7a bl 8001e64 <HAL_GetTick>
  5506. 8002770: 6138 str r0, [r7, #16]
  5507. /* Wait till LSI is ready */
  5508. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
  5509. 8002772: e008 b.n 8002786 <HAL_RCC_OscConfig+0x39e>
  5510. {
  5511. if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  5512. 8002774: f7ff fb76 bl 8001e64 <HAL_GetTick>
  5513. 8002778: 4602 mov r2, r0
  5514. 800277a: 693b ldr r3, [r7, #16]
  5515. 800277c: 1ad3 subs r3, r2, r3
  5516. 800277e: 2b02 cmp r3, #2
  5517. 8002780: d901 bls.n 8002786 <HAL_RCC_OscConfig+0x39e>
  5518. {
  5519. return HAL_TIMEOUT;
  5520. 8002782: 2303 movs r3, #3
  5521. 8002784: e157 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5522. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
  5523. 8002786: 4b58 ldr r3, [pc, #352] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5524. 8002788: 6b5b ldr r3, [r3, #52] ; 0x34
  5525. 800278a: f003 0302 and.w r3, r3, #2
  5526. 800278e: 2b00 cmp r3, #0
  5527. 8002790: d0f0 beq.n 8002774 <HAL_RCC_OscConfig+0x38c>
  5528. 8002792: e015 b.n 80027c0 <HAL_RCC_OscConfig+0x3d8>
  5529. }
  5530. }
  5531. else
  5532. {
  5533. /* Disable the Internal Low Speed oscillator (LSI). */
  5534. __HAL_RCC_LSI_DISABLE();
  5535. 8002794: 4b59 ldr r3, [pc, #356] ; (80028fc <HAL_RCC_OscConfig+0x514>)
  5536. 8002796: 2200 movs r2, #0
  5537. 8002798: 601a str r2, [r3, #0]
  5538. /* Get Start Tick */
  5539. tickstart = HAL_GetTick();
  5540. 800279a: f7ff fb63 bl 8001e64 <HAL_GetTick>
  5541. 800279e: 6138 str r0, [r7, #16]
  5542. /* Wait till LSI is disabled */
  5543. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
  5544. 80027a0: e008 b.n 80027b4 <HAL_RCC_OscConfig+0x3cc>
  5545. {
  5546. if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
  5547. 80027a2: f7ff fb5f bl 8001e64 <HAL_GetTick>
  5548. 80027a6: 4602 mov r2, r0
  5549. 80027a8: 693b ldr r3, [r7, #16]
  5550. 80027aa: 1ad3 subs r3, r2, r3
  5551. 80027ac: 2b02 cmp r3, #2
  5552. 80027ae: d901 bls.n 80027b4 <HAL_RCC_OscConfig+0x3cc>
  5553. {
  5554. return HAL_TIMEOUT;
  5555. 80027b0: 2303 movs r3, #3
  5556. 80027b2: e140 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5557. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
  5558. 80027b4: 4b4c ldr r3, [pc, #304] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5559. 80027b6: 6b5b ldr r3, [r3, #52] ; 0x34
  5560. 80027b8: f003 0302 and.w r3, r3, #2
  5561. 80027bc: 2b00 cmp r3, #0
  5562. 80027be: d1f0 bne.n 80027a2 <HAL_RCC_OscConfig+0x3ba>
  5563. }
  5564. }
  5565. }
  5566. }
  5567. /*------------------------------ LSE Configuration -------------------------*/
  5568. if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
  5569. 80027c0: 687b ldr r3, [r7, #4]
  5570. 80027c2: 681b ldr r3, [r3, #0]
  5571. 80027c4: f003 0304 and.w r3, r3, #4
  5572. 80027c8: 2b00 cmp r3, #0
  5573. 80027ca: f000 80b5 beq.w 8002938 <HAL_RCC_OscConfig+0x550>
  5574. {
  5575. FlagStatus pwrclkchanged = RESET;
  5576. 80027ce: 2300 movs r3, #0
  5577. 80027d0: 77fb strb r3, [r7, #31]
  5578. /* Check the parameters */
  5579. assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
  5580. /* Update LSE configuration in Backup Domain control register */
  5581. /* Requires to enable write access to Backup Domain of necessary */
  5582. if(__HAL_RCC_PWR_IS_CLK_DISABLED())
  5583. 80027d2: 4b45 ldr r3, [pc, #276] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5584. 80027d4: 6a5b ldr r3, [r3, #36] ; 0x24
  5585. 80027d6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  5586. 80027da: 2b00 cmp r3, #0
  5587. 80027dc: d10d bne.n 80027fa <HAL_RCC_OscConfig+0x412>
  5588. {
  5589. __HAL_RCC_PWR_CLK_ENABLE();
  5590. 80027de: 4b42 ldr r3, [pc, #264] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5591. 80027e0: 6a5b ldr r3, [r3, #36] ; 0x24
  5592. 80027e2: 4a41 ldr r2, [pc, #260] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5593. 80027e4: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
  5594. 80027e8: 6253 str r3, [r2, #36] ; 0x24
  5595. 80027ea: 4b3f ldr r3, [pc, #252] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5596. 80027ec: 6a5b ldr r3, [r3, #36] ; 0x24
  5597. 80027ee: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  5598. 80027f2: 60bb str r3, [r7, #8]
  5599. 80027f4: 68bb ldr r3, [r7, #8]
  5600. pwrclkchanged = SET;
  5601. 80027f6: 2301 movs r3, #1
  5602. 80027f8: 77fb strb r3, [r7, #31]
  5603. }
  5604. if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  5605. 80027fa: 4b41 ldr r3, [pc, #260] ; (8002900 <HAL_RCC_OscConfig+0x518>)
  5606. 80027fc: 681b ldr r3, [r3, #0]
  5607. 80027fe: f403 7380 and.w r3, r3, #256 ; 0x100
  5608. 8002802: 2b00 cmp r3, #0
  5609. 8002804: d118 bne.n 8002838 <HAL_RCC_OscConfig+0x450>
  5610. {
  5611. /* Enable write access to Backup domain */
  5612. SET_BIT(PWR->CR, PWR_CR_DBP);
  5613. 8002806: 4b3e ldr r3, [pc, #248] ; (8002900 <HAL_RCC_OscConfig+0x518>)
  5614. 8002808: 681b ldr r3, [r3, #0]
  5615. 800280a: 4a3d ldr r2, [pc, #244] ; (8002900 <HAL_RCC_OscConfig+0x518>)
  5616. 800280c: f443 7380 orr.w r3, r3, #256 ; 0x100
  5617. 8002810: 6013 str r3, [r2, #0]
  5618. /* Wait for Backup domain Write protection disable */
  5619. tickstart = HAL_GetTick();
  5620. 8002812: f7ff fb27 bl 8001e64 <HAL_GetTick>
  5621. 8002816: 6138 str r0, [r7, #16]
  5622. while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  5623. 8002818: e008 b.n 800282c <HAL_RCC_OscConfig+0x444>
  5624. {
  5625. if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
  5626. 800281a: f7ff fb23 bl 8001e64 <HAL_GetTick>
  5627. 800281e: 4602 mov r2, r0
  5628. 8002820: 693b ldr r3, [r7, #16]
  5629. 8002822: 1ad3 subs r3, r2, r3
  5630. 8002824: 2b64 cmp r3, #100 ; 0x64
  5631. 8002826: d901 bls.n 800282c <HAL_RCC_OscConfig+0x444>
  5632. {
  5633. return HAL_TIMEOUT;
  5634. 8002828: 2303 movs r3, #3
  5635. 800282a: e104 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5636. while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
  5637. 800282c: 4b34 ldr r3, [pc, #208] ; (8002900 <HAL_RCC_OscConfig+0x518>)
  5638. 800282e: 681b ldr r3, [r3, #0]
  5639. 8002830: f403 7380 and.w r3, r3, #256 ; 0x100
  5640. 8002834: 2b00 cmp r3, #0
  5641. 8002836: d0f0 beq.n 800281a <HAL_RCC_OscConfig+0x432>
  5642. }
  5643. }
  5644. }
  5645. /* Set the new LSE configuration -----------------------------------------*/
  5646. __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
  5647. 8002838: 687b ldr r3, [r7, #4]
  5648. 800283a: 689b ldr r3, [r3, #8]
  5649. 800283c: 2b01 cmp r3, #1
  5650. 800283e: d106 bne.n 800284e <HAL_RCC_OscConfig+0x466>
  5651. 8002840: 4b29 ldr r3, [pc, #164] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5652. 8002842: 6b5b ldr r3, [r3, #52] ; 0x34
  5653. 8002844: 4a28 ldr r2, [pc, #160] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5654. 8002846: f443 7380 orr.w r3, r3, #256 ; 0x100
  5655. 800284a: 6353 str r3, [r2, #52] ; 0x34
  5656. 800284c: e02d b.n 80028aa <HAL_RCC_OscConfig+0x4c2>
  5657. 800284e: 687b ldr r3, [r7, #4]
  5658. 8002850: 689b ldr r3, [r3, #8]
  5659. 8002852: 2b00 cmp r3, #0
  5660. 8002854: d10c bne.n 8002870 <HAL_RCC_OscConfig+0x488>
  5661. 8002856: 4b24 ldr r3, [pc, #144] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5662. 8002858: 6b5b ldr r3, [r3, #52] ; 0x34
  5663. 800285a: 4a23 ldr r2, [pc, #140] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5664. 800285c: f423 7380 bic.w r3, r3, #256 ; 0x100
  5665. 8002860: 6353 str r3, [r2, #52] ; 0x34
  5666. 8002862: 4b21 ldr r3, [pc, #132] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5667. 8002864: 6b5b ldr r3, [r3, #52] ; 0x34
  5668. 8002866: 4a20 ldr r2, [pc, #128] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5669. 8002868: f423 6380 bic.w r3, r3, #1024 ; 0x400
  5670. 800286c: 6353 str r3, [r2, #52] ; 0x34
  5671. 800286e: e01c b.n 80028aa <HAL_RCC_OscConfig+0x4c2>
  5672. 8002870: 687b ldr r3, [r7, #4]
  5673. 8002872: 689b ldr r3, [r3, #8]
  5674. 8002874: 2b05 cmp r3, #5
  5675. 8002876: d10c bne.n 8002892 <HAL_RCC_OscConfig+0x4aa>
  5676. 8002878: 4b1b ldr r3, [pc, #108] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5677. 800287a: 6b5b ldr r3, [r3, #52] ; 0x34
  5678. 800287c: 4a1a ldr r2, [pc, #104] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5679. 800287e: f443 6380 orr.w r3, r3, #1024 ; 0x400
  5680. 8002882: 6353 str r3, [r2, #52] ; 0x34
  5681. 8002884: 4b18 ldr r3, [pc, #96] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5682. 8002886: 6b5b ldr r3, [r3, #52] ; 0x34
  5683. 8002888: 4a17 ldr r2, [pc, #92] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5684. 800288a: f443 7380 orr.w r3, r3, #256 ; 0x100
  5685. 800288e: 6353 str r3, [r2, #52] ; 0x34
  5686. 8002890: e00b b.n 80028aa <HAL_RCC_OscConfig+0x4c2>
  5687. 8002892: 4b15 ldr r3, [pc, #84] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5688. 8002894: 6b5b ldr r3, [r3, #52] ; 0x34
  5689. 8002896: 4a14 ldr r2, [pc, #80] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5690. 8002898: f423 7380 bic.w r3, r3, #256 ; 0x100
  5691. 800289c: 6353 str r3, [r2, #52] ; 0x34
  5692. 800289e: 4b12 ldr r3, [pc, #72] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5693. 80028a0: 6b5b ldr r3, [r3, #52] ; 0x34
  5694. 80028a2: 4a11 ldr r2, [pc, #68] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5695. 80028a4: f423 6380 bic.w r3, r3, #1024 ; 0x400
  5696. 80028a8: 6353 str r3, [r2, #52] ; 0x34
  5697. /* Check the LSE State */
  5698. if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
  5699. 80028aa: 687b ldr r3, [r7, #4]
  5700. 80028ac: 689b ldr r3, [r3, #8]
  5701. 80028ae: 2b00 cmp r3, #0
  5702. 80028b0: d015 beq.n 80028de <HAL_RCC_OscConfig+0x4f6>
  5703. {
  5704. /* Get Start Tick */
  5705. tickstart = HAL_GetTick();
  5706. 80028b2: f7ff fad7 bl 8001e64 <HAL_GetTick>
  5707. 80028b6: 6138 str r0, [r7, #16]
  5708. /* Wait till LSE is ready */
  5709. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
  5710. 80028b8: e00a b.n 80028d0 <HAL_RCC_OscConfig+0x4e8>
  5711. {
  5712. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  5713. 80028ba: f7ff fad3 bl 8001e64 <HAL_GetTick>
  5714. 80028be: 4602 mov r2, r0
  5715. 80028c0: 693b ldr r3, [r7, #16]
  5716. 80028c2: 1ad3 subs r3, r2, r3
  5717. 80028c4: f241 3288 movw r2, #5000 ; 0x1388
  5718. 80028c8: 4293 cmp r3, r2
  5719. 80028ca: d901 bls.n 80028d0 <HAL_RCC_OscConfig+0x4e8>
  5720. {
  5721. return HAL_TIMEOUT;
  5722. 80028cc: 2303 movs r3, #3
  5723. 80028ce: e0b2 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5724. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
  5725. 80028d0: 4b05 ldr r3, [pc, #20] ; (80028e8 <HAL_RCC_OscConfig+0x500>)
  5726. 80028d2: 6b5b ldr r3, [r3, #52] ; 0x34
  5727. 80028d4: f403 7300 and.w r3, r3, #512 ; 0x200
  5728. 80028d8: 2b00 cmp r3, #0
  5729. 80028da: d0ee beq.n 80028ba <HAL_RCC_OscConfig+0x4d2>
  5730. 80028dc: e023 b.n 8002926 <HAL_RCC_OscConfig+0x53e>
  5731. }
  5732. }
  5733. else
  5734. {
  5735. /* Get Start Tick */
  5736. tickstart = HAL_GetTick();
  5737. 80028de: f7ff fac1 bl 8001e64 <HAL_GetTick>
  5738. 80028e2: 6138 str r0, [r7, #16]
  5739. /* Wait till LSE is disabled */
  5740. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
  5741. 80028e4: e019 b.n 800291a <HAL_RCC_OscConfig+0x532>
  5742. 80028e6: bf00 nop
  5743. 80028e8: 40023800 .word 0x40023800
  5744. 80028ec: 08007b30 .word 0x08007b30
  5745. 80028f0: 20000004 .word 0x20000004
  5746. 80028f4: 20000008 .word 0x20000008
  5747. 80028f8: 42470020 .word 0x42470020
  5748. 80028fc: 42470680 .word 0x42470680
  5749. 8002900: 40007000 .word 0x40007000
  5750. {
  5751. if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
  5752. 8002904: f7ff faae bl 8001e64 <HAL_GetTick>
  5753. 8002908: 4602 mov r2, r0
  5754. 800290a: 693b ldr r3, [r7, #16]
  5755. 800290c: 1ad3 subs r3, r2, r3
  5756. 800290e: f241 3288 movw r2, #5000 ; 0x1388
  5757. 8002912: 4293 cmp r3, r2
  5758. 8002914: d901 bls.n 800291a <HAL_RCC_OscConfig+0x532>
  5759. {
  5760. return HAL_TIMEOUT;
  5761. 8002916: 2303 movs r3, #3
  5762. 8002918: e08d b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5763. while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
  5764. 800291a: 4b49 ldr r3, [pc, #292] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5765. 800291c: 6b5b ldr r3, [r3, #52] ; 0x34
  5766. 800291e: f403 7300 and.w r3, r3, #512 ; 0x200
  5767. 8002922: 2b00 cmp r3, #0
  5768. 8002924: d1ee bne.n 8002904 <HAL_RCC_OscConfig+0x51c>
  5769. }
  5770. }
  5771. }
  5772. /* Require to disable power clock if necessary */
  5773. if(pwrclkchanged == SET)
  5774. 8002926: 7ffb ldrb r3, [r7, #31]
  5775. 8002928: 2b01 cmp r3, #1
  5776. 800292a: d105 bne.n 8002938 <HAL_RCC_OscConfig+0x550>
  5777. {
  5778. __HAL_RCC_PWR_CLK_DISABLE();
  5779. 800292c: 4b44 ldr r3, [pc, #272] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5780. 800292e: 6a5b ldr r3, [r3, #36] ; 0x24
  5781. 8002930: 4a43 ldr r2, [pc, #268] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5782. 8002932: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
  5783. 8002936: 6253 str r3, [r2, #36] ; 0x24
  5784. }
  5785. /*-------------------------------- PLL Configuration -----------------------*/
  5786. /* Check the parameters */
  5787. assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  5788. if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
  5789. 8002938: 687b ldr r3, [r7, #4]
  5790. 800293a: 6a5b ldr r3, [r3, #36] ; 0x24
  5791. 800293c: 2b00 cmp r3, #0
  5792. 800293e: d079 beq.n 8002a34 <HAL_RCC_OscConfig+0x64c>
  5793. {
  5794. /* Check if the PLL is used as system clock or not */
  5795. if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
  5796. 8002940: 69bb ldr r3, [r7, #24]
  5797. 8002942: 2b0c cmp r3, #12
  5798. 8002944: d056 beq.n 80029f4 <HAL_RCC_OscConfig+0x60c>
  5799. {
  5800. if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
  5801. 8002946: 687b ldr r3, [r7, #4]
  5802. 8002948: 6a5b ldr r3, [r3, #36] ; 0x24
  5803. 800294a: 2b02 cmp r3, #2
  5804. 800294c: d13b bne.n 80029c6 <HAL_RCC_OscConfig+0x5de>
  5805. assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
  5806. assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
  5807. assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
  5808. /* Disable the main PLL. */
  5809. __HAL_RCC_PLL_DISABLE();
  5810. 800294e: 4b3d ldr r3, [pc, #244] ; (8002a44 <HAL_RCC_OscConfig+0x65c>)
  5811. 8002950: 2200 movs r2, #0
  5812. 8002952: 601a str r2, [r3, #0]
  5813. /* Get Start Tick */
  5814. tickstart = HAL_GetTick();
  5815. 8002954: f7ff fa86 bl 8001e64 <HAL_GetTick>
  5816. 8002958: 6138 str r0, [r7, #16]
  5817. /* Wait till PLL is disabled */
  5818. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
  5819. 800295a: e008 b.n 800296e <HAL_RCC_OscConfig+0x586>
  5820. {
  5821. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  5822. 800295c: f7ff fa82 bl 8001e64 <HAL_GetTick>
  5823. 8002960: 4602 mov r2, r0
  5824. 8002962: 693b ldr r3, [r7, #16]
  5825. 8002964: 1ad3 subs r3, r2, r3
  5826. 8002966: 2b02 cmp r3, #2
  5827. 8002968: d901 bls.n 800296e <HAL_RCC_OscConfig+0x586>
  5828. {
  5829. return HAL_TIMEOUT;
  5830. 800296a: 2303 movs r3, #3
  5831. 800296c: e063 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5832. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
  5833. 800296e: 4b34 ldr r3, [pc, #208] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5834. 8002970: 681b ldr r3, [r3, #0]
  5835. 8002972: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
  5836. 8002976: 2b00 cmp r3, #0
  5837. 8002978: d1f0 bne.n 800295c <HAL_RCC_OscConfig+0x574>
  5838. }
  5839. }
  5840. /* Configure the main PLL clock source, multiplication and division factors. */
  5841. __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
  5842. 800297a: 4b31 ldr r3, [pc, #196] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5843. 800297c: 689b ldr r3, [r3, #8]
  5844. 800297e: f423 027d bic.w r2, r3, #16580608 ; 0xfd0000
  5845. 8002982: 687b ldr r3, [r7, #4]
  5846. 8002984: 6a99 ldr r1, [r3, #40] ; 0x28
  5847. 8002986: 687b ldr r3, [r7, #4]
  5848. 8002988: 6adb ldr r3, [r3, #44] ; 0x2c
  5849. 800298a: 4319 orrs r1, r3
  5850. 800298c: 687b ldr r3, [r7, #4]
  5851. 800298e: 6b1b ldr r3, [r3, #48] ; 0x30
  5852. 8002990: 430b orrs r3, r1
  5853. 8002992: 492b ldr r1, [pc, #172] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5854. 8002994: 4313 orrs r3, r2
  5855. 8002996: 608b str r3, [r1, #8]
  5856. RCC_OscInitStruct->PLL.PLLMUL,
  5857. RCC_OscInitStruct->PLL.PLLDIV);
  5858. /* Enable the main PLL. */
  5859. __HAL_RCC_PLL_ENABLE();
  5860. 8002998: 4b2a ldr r3, [pc, #168] ; (8002a44 <HAL_RCC_OscConfig+0x65c>)
  5861. 800299a: 2201 movs r2, #1
  5862. 800299c: 601a str r2, [r3, #0]
  5863. /* Get Start Tick */
  5864. tickstart = HAL_GetTick();
  5865. 800299e: f7ff fa61 bl 8001e64 <HAL_GetTick>
  5866. 80029a2: 6138 str r0, [r7, #16]
  5867. /* Wait till PLL is ready */
  5868. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
  5869. 80029a4: e008 b.n 80029b8 <HAL_RCC_OscConfig+0x5d0>
  5870. {
  5871. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  5872. 80029a6: f7ff fa5d bl 8001e64 <HAL_GetTick>
  5873. 80029aa: 4602 mov r2, r0
  5874. 80029ac: 693b ldr r3, [r7, #16]
  5875. 80029ae: 1ad3 subs r3, r2, r3
  5876. 80029b0: 2b02 cmp r3, #2
  5877. 80029b2: d901 bls.n 80029b8 <HAL_RCC_OscConfig+0x5d0>
  5878. {
  5879. return HAL_TIMEOUT;
  5880. 80029b4: 2303 movs r3, #3
  5881. 80029b6: e03e b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5882. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
  5883. 80029b8: 4b21 ldr r3, [pc, #132] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5884. 80029ba: 681b ldr r3, [r3, #0]
  5885. 80029bc: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
  5886. 80029c0: 2b00 cmp r3, #0
  5887. 80029c2: d0f0 beq.n 80029a6 <HAL_RCC_OscConfig+0x5be>
  5888. 80029c4: e036 b.n 8002a34 <HAL_RCC_OscConfig+0x64c>
  5889. }
  5890. }
  5891. else
  5892. {
  5893. /* Disable the main PLL. */
  5894. __HAL_RCC_PLL_DISABLE();
  5895. 80029c6: 4b1f ldr r3, [pc, #124] ; (8002a44 <HAL_RCC_OscConfig+0x65c>)
  5896. 80029c8: 2200 movs r2, #0
  5897. 80029ca: 601a str r2, [r3, #0]
  5898. /* Get Start Tick */
  5899. tickstart = HAL_GetTick();
  5900. 80029cc: f7ff fa4a bl 8001e64 <HAL_GetTick>
  5901. 80029d0: 6138 str r0, [r7, #16]
  5902. /* Wait till PLL is disabled */
  5903. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
  5904. 80029d2: e008 b.n 80029e6 <HAL_RCC_OscConfig+0x5fe>
  5905. {
  5906. if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
  5907. 80029d4: f7ff fa46 bl 8001e64 <HAL_GetTick>
  5908. 80029d8: 4602 mov r2, r0
  5909. 80029da: 693b ldr r3, [r7, #16]
  5910. 80029dc: 1ad3 subs r3, r2, r3
  5911. 80029de: 2b02 cmp r3, #2
  5912. 80029e0: d901 bls.n 80029e6 <HAL_RCC_OscConfig+0x5fe>
  5913. {
  5914. return HAL_TIMEOUT;
  5915. 80029e2: 2303 movs r3, #3
  5916. 80029e4: e027 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5917. while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U)
  5918. 80029e6: 4b16 ldr r3, [pc, #88] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5919. 80029e8: 681b ldr r3, [r3, #0]
  5920. 80029ea: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
  5921. 80029ee: 2b00 cmp r3, #0
  5922. 80029f0: d1f0 bne.n 80029d4 <HAL_RCC_OscConfig+0x5ec>
  5923. 80029f2: e01f b.n 8002a34 <HAL_RCC_OscConfig+0x64c>
  5924. }
  5925. }
  5926. else
  5927. {
  5928. /* Check if there is a request to disable the PLL used as System clock source */
  5929. if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
  5930. 80029f4: 687b ldr r3, [r7, #4]
  5931. 80029f6: 6a5b ldr r3, [r3, #36] ; 0x24
  5932. 80029f8: 2b01 cmp r3, #1
  5933. 80029fa: d101 bne.n 8002a00 <HAL_RCC_OscConfig+0x618>
  5934. {
  5935. return HAL_ERROR;
  5936. 80029fc: 2301 movs r3, #1
  5937. 80029fe: e01a b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5938. }
  5939. else
  5940. {
  5941. /* Do not return HAL_ERROR if request repeats the current configuration */
  5942. pll_config = RCC->CFGR;
  5943. 8002a00: 4b0f ldr r3, [pc, #60] ; (8002a40 <HAL_RCC_OscConfig+0x658>)
  5944. 8002a02: 689b ldr r3, [r3, #8]
  5945. 8002a04: 617b str r3, [r7, #20]
  5946. if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
  5947. 8002a06: 697b ldr r3, [r7, #20]
  5948. 8002a08: f403 3280 and.w r2, r3, #65536 ; 0x10000
  5949. 8002a0c: 687b ldr r3, [r7, #4]
  5950. 8002a0e: 6a9b ldr r3, [r3, #40] ; 0x28
  5951. 8002a10: 429a cmp r2, r3
  5952. 8002a12: d10d bne.n 8002a30 <HAL_RCC_OscConfig+0x648>
  5953. (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
  5954. 8002a14: 697b ldr r3, [r7, #20]
  5955. 8002a16: f403 1270 and.w r2, r3, #3932160 ; 0x3c0000
  5956. 8002a1a: 687b ldr r3, [r7, #4]
  5957. 8002a1c: 6adb ldr r3, [r3, #44] ; 0x2c
  5958. if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
  5959. 8002a1e: 429a cmp r2, r3
  5960. 8002a20: d106 bne.n 8002a30 <HAL_RCC_OscConfig+0x648>
  5961. (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV))
  5962. 8002a22: 697b ldr r3, [r7, #20]
  5963. 8002a24: f403 0240 and.w r2, r3, #12582912 ; 0xc00000
  5964. 8002a28: 687b ldr r3, [r7, #4]
  5965. 8002a2a: 6b1b ldr r3, [r3, #48] ; 0x30
  5966. (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
  5967. 8002a2c: 429a cmp r2, r3
  5968. 8002a2e: d001 beq.n 8002a34 <HAL_RCC_OscConfig+0x64c>
  5969. {
  5970. return HAL_ERROR;
  5971. 8002a30: 2301 movs r3, #1
  5972. 8002a32: e000 b.n 8002a36 <HAL_RCC_OscConfig+0x64e>
  5973. }
  5974. }
  5975. }
  5976. }
  5977. return HAL_OK;
  5978. 8002a34: 2300 movs r3, #0
  5979. }
  5980. 8002a36: 4618 mov r0, r3
  5981. 8002a38: 3720 adds r7, #32
  5982. 8002a3a: 46bd mov sp, r7
  5983. 8002a3c: bd80 pop {r7, pc}
  5984. 8002a3e: bf00 nop
  5985. 8002a40: 40023800 .word 0x40023800
  5986. 8002a44: 42470060 .word 0x42470060
  5987. 08002a48 <HAL_RCC_ClockConfig>:
  5988. * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
  5989. * (for more details refer to section above "Initialization/de-initialization functions")
  5990. * @retval HAL status
  5991. */
  5992. HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
  5993. {
  5994. 8002a48: b580 push {r7, lr}
  5995. 8002a4a: b084 sub sp, #16
  5996. 8002a4c: af00 add r7, sp, #0
  5997. 8002a4e: 6078 str r0, [r7, #4]
  5998. 8002a50: 6039 str r1, [r7, #0]
  5999. uint32_t tickstart;
  6000. HAL_StatusTypeDef status;
  6001. /* Check the parameters */
  6002. if(RCC_ClkInitStruct == NULL)
  6003. 8002a52: 687b ldr r3, [r7, #4]
  6004. 8002a54: 2b00 cmp r3, #0
  6005. 8002a56: d101 bne.n 8002a5c <HAL_RCC_ClockConfig+0x14>
  6006. {
  6007. return HAL_ERROR;
  6008. 8002a58: 2301 movs r3, #1
  6009. 8002a5a: e11a b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6010. /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
  6011. must be correctly programmed according to the frequency of the CPU clock
  6012. (HCLK) and the supply voltage of the device. */
  6013. /* Increasing the number of wait states because of higher CPU frequency */
  6014. if(FLatency > __HAL_FLASH_GET_LATENCY())
  6015. 8002a5c: 4b8f ldr r3, [pc, #572] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6016. 8002a5e: 681b ldr r3, [r3, #0]
  6017. 8002a60: f003 0301 and.w r3, r3, #1
  6018. 8002a64: 683a ldr r2, [r7, #0]
  6019. 8002a66: 429a cmp r2, r3
  6020. 8002a68: d919 bls.n 8002a9e <HAL_RCC_ClockConfig+0x56>
  6021. {
  6022. /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
  6023. __HAL_FLASH_SET_LATENCY(FLatency);
  6024. 8002a6a: 683b ldr r3, [r7, #0]
  6025. 8002a6c: 2b01 cmp r3, #1
  6026. 8002a6e: d105 bne.n 8002a7c <HAL_RCC_ClockConfig+0x34>
  6027. 8002a70: 4b8a ldr r3, [pc, #552] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6028. 8002a72: 681b ldr r3, [r3, #0]
  6029. 8002a74: 4a89 ldr r2, [pc, #548] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6030. 8002a76: f043 0304 orr.w r3, r3, #4
  6031. 8002a7a: 6013 str r3, [r2, #0]
  6032. 8002a7c: 4b87 ldr r3, [pc, #540] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6033. 8002a7e: 681b ldr r3, [r3, #0]
  6034. 8002a80: f023 0201 bic.w r2, r3, #1
  6035. 8002a84: 4985 ldr r1, [pc, #532] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6036. 8002a86: 683b ldr r3, [r7, #0]
  6037. 8002a88: 4313 orrs r3, r2
  6038. 8002a8a: 600b str r3, [r1, #0]
  6039. /* Check that the new number of wait states is taken into account to access the Flash
  6040. memory by reading the FLASH_ACR register */
  6041. if(__HAL_FLASH_GET_LATENCY() != FLatency)
  6042. 8002a8c: 4b83 ldr r3, [pc, #524] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6043. 8002a8e: 681b ldr r3, [r3, #0]
  6044. 8002a90: f003 0301 and.w r3, r3, #1
  6045. 8002a94: 683a ldr r2, [r7, #0]
  6046. 8002a96: 429a cmp r2, r3
  6047. 8002a98: d001 beq.n 8002a9e <HAL_RCC_ClockConfig+0x56>
  6048. {
  6049. return HAL_ERROR;
  6050. 8002a9a: 2301 movs r3, #1
  6051. 8002a9c: e0f9 b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6052. }
  6053. }
  6054. /*-------------------------- HCLK Configuration --------------------------*/
  6055. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
  6056. 8002a9e: 687b ldr r3, [r7, #4]
  6057. 8002aa0: 681b ldr r3, [r3, #0]
  6058. 8002aa2: f003 0302 and.w r3, r3, #2
  6059. 8002aa6: 2b00 cmp r3, #0
  6060. 8002aa8: d008 beq.n 8002abc <HAL_RCC_ClockConfig+0x74>
  6061. {
  6062. assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
  6063. MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
  6064. 8002aaa: 4b7d ldr r3, [pc, #500] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6065. 8002aac: 689b ldr r3, [r3, #8]
  6066. 8002aae: f023 02f0 bic.w r2, r3, #240 ; 0xf0
  6067. 8002ab2: 687b ldr r3, [r7, #4]
  6068. 8002ab4: 689b ldr r3, [r3, #8]
  6069. 8002ab6: 497a ldr r1, [pc, #488] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6070. 8002ab8: 4313 orrs r3, r2
  6071. 8002aba: 608b str r3, [r1, #8]
  6072. }
  6073. /*------------------------- SYSCLK Configuration ---------------------------*/
  6074. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
  6075. 8002abc: 687b ldr r3, [r7, #4]
  6076. 8002abe: 681b ldr r3, [r3, #0]
  6077. 8002ac0: f003 0301 and.w r3, r3, #1
  6078. 8002ac4: 2b00 cmp r3, #0
  6079. 8002ac6: f000 808e beq.w 8002be6 <HAL_RCC_ClockConfig+0x19e>
  6080. {
  6081. assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
  6082. /* HSE is selected as System Clock Source */
  6083. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  6084. 8002aca: 687b ldr r3, [r7, #4]
  6085. 8002acc: 685b ldr r3, [r3, #4]
  6086. 8002ace: 2b02 cmp r3, #2
  6087. 8002ad0: d107 bne.n 8002ae2 <HAL_RCC_ClockConfig+0x9a>
  6088. {
  6089. /* Check the HSE ready flag */
  6090. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
  6091. 8002ad2: 4b73 ldr r3, [pc, #460] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6092. 8002ad4: 681b ldr r3, [r3, #0]
  6093. 8002ad6: f403 3300 and.w r3, r3, #131072 ; 0x20000
  6094. 8002ada: 2b00 cmp r3, #0
  6095. 8002adc: d121 bne.n 8002b22 <HAL_RCC_ClockConfig+0xda>
  6096. {
  6097. return HAL_ERROR;
  6098. 8002ade: 2301 movs r3, #1
  6099. 8002ae0: e0d7 b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6100. }
  6101. }
  6102. /* PLL is selected as System Clock Source */
  6103. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
  6104. 8002ae2: 687b ldr r3, [r7, #4]
  6105. 8002ae4: 685b ldr r3, [r3, #4]
  6106. 8002ae6: 2b03 cmp r3, #3
  6107. 8002ae8: d107 bne.n 8002afa <HAL_RCC_ClockConfig+0xb2>
  6108. {
  6109. /* Check the PLL ready flag */
  6110. if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
  6111. 8002aea: 4b6d ldr r3, [pc, #436] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6112. 8002aec: 681b ldr r3, [r3, #0]
  6113. 8002aee: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
  6114. 8002af2: 2b00 cmp r3, #0
  6115. 8002af4: d115 bne.n 8002b22 <HAL_RCC_ClockConfig+0xda>
  6116. {
  6117. return HAL_ERROR;
  6118. 8002af6: 2301 movs r3, #1
  6119. 8002af8: e0cb b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6120. }
  6121. }
  6122. /* HSI is selected as System Clock Source */
  6123. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
  6124. 8002afa: 687b ldr r3, [r7, #4]
  6125. 8002afc: 685b ldr r3, [r3, #4]
  6126. 8002afe: 2b01 cmp r3, #1
  6127. 8002b00: d107 bne.n 8002b12 <HAL_RCC_ClockConfig+0xca>
  6128. {
  6129. /* Check the HSI ready flag */
  6130. if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
  6131. 8002b02: 4b67 ldr r3, [pc, #412] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6132. 8002b04: 681b ldr r3, [r3, #0]
  6133. 8002b06: f003 0302 and.w r3, r3, #2
  6134. 8002b0a: 2b00 cmp r3, #0
  6135. 8002b0c: d109 bne.n 8002b22 <HAL_RCC_ClockConfig+0xda>
  6136. {
  6137. return HAL_ERROR;
  6138. 8002b0e: 2301 movs r3, #1
  6139. 8002b10: e0bf b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6140. }
  6141. /* MSI is selected as System Clock Source */
  6142. else
  6143. {
  6144. /* Check the MSI ready flag */
  6145. if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
  6146. 8002b12: 4b63 ldr r3, [pc, #396] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6147. 8002b14: 681b ldr r3, [r3, #0]
  6148. 8002b16: f403 7300 and.w r3, r3, #512 ; 0x200
  6149. 8002b1a: 2b00 cmp r3, #0
  6150. 8002b1c: d101 bne.n 8002b22 <HAL_RCC_ClockConfig+0xda>
  6151. {
  6152. return HAL_ERROR;
  6153. 8002b1e: 2301 movs r3, #1
  6154. 8002b20: e0b7 b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6155. }
  6156. }
  6157. __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
  6158. 8002b22: 4b5f ldr r3, [pc, #380] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6159. 8002b24: 689b ldr r3, [r3, #8]
  6160. 8002b26: f023 0203 bic.w r2, r3, #3
  6161. 8002b2a: 687b ldr r3, [r7, #4]
  6162. 8002b2c: 685b ldr r3, [r3, #4]
  6163. 8002b2e: 495c ldr r1, [pc, #368] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6164. 8002b30: 4313 orrs r3, r2
  6165. 8002b32: 608b str r3, [r1, #8]
  6166. /* Get Start Tick */
  6167. tickstart = HAL_GetTick();
  6168. 8002b34: f7ff f996 bl 8001e64 <HAL_GetTick>
  6169. 8002b38: 60f8 str r0, [r7, #12]
  6170. if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
  6171. 8002b3a: 687b ldr r3, [r7, #4]
  6172. 8002b3c: 685b ldr r3, [r3, #4]
  6173. 8002b3e: 2b02 cmp r3, #2
  6174. 8002b40: d112 bne.n 8002b68 <HAL_RCC_ClockConfig+0x120>
  6175. {
  6176. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
  6177. 8002b42: e00a b.n 8002b5a <HAL_RCC_ClockConfig+0x112>
  6178. {
  6179. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  6180. 8002b44: f7ff f98e bl 8001e64 <HAL_GetTick>
  6181. 8002b48: 4602 mov r2, r0
  6182. 8002b4a: 68fb ldr r3, [r7, #12]
  6183. 8002b4c: 1ad3 subs r3, r2, r3
  6184. 8002b4e: f241 3288 movw r2, #5000 ; 0x1388
  6185. 8002b52: 4293 cmp r3, r2
  6186. 8002b54: d901 bls.n 8002b5a <HAL_RCC_ClockConfig+0x112>
  6187. {
  6188. return HAL_TIMEOUT;
  6189. 8002b56: 2303 movs r3, #3
  6190. 8002b58: e09b b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6191. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
  6192. 8002b5a: 4b51 ldr r3, [pc, #324] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6193. 8002b5c: 689b ldr r3, [r3, #8]
  6194. 8002b5e: f003 030c and.w r3, r3, #12
  6195. 8002b62: 2b08 cmp r3, #8
  6196. 8002b64: d1ee bne.n 8002b44 <HAL_RCC_ClockConfig+0xfc>
  6197. 8002b66: e03e b.n 8002be6 <HAL_RCC_ClockConfig+0x19e>
  6198. }
  6199. }
  6200. }
  6201. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
  6202. 8002b68: 687b ldr r3, [r7, #4]
  6203. 8002b6a: 685b ldr r3, [r3, #4]
  6204. 8002b6c: 2b03 cmp r3, #3
  6205. 8002b6e: d112 bne.n 8002b96 <HAL_RCC_ClockConfig+0x14e>
  6206. {
  6207. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
  6208. 8002b70: e00a b.n 8002b88 <HAL_RCC_ClockConfig+0x140>
  6209. {
  6210. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  6211. 8002b72: f7ff f977 bl 8001e64 <HAL_GetTick>
  6212. 8002b76: 4602 mov r2, r0
  6213. 8002b78: 68fb ldr r3, [r7, #12]
  6214. 8002b7a: 1ad3 subs r3, r2, r3
  6215. 8002b7c: f241 3288 movw r2, #5000 ; 0x1388
  6216. 8002b80: 4293 cmp r3, r2
  6217. 8002b82: d901 bls.n 8002b88 <HAL_RCC_ClockConfig+0x140>
  6218. {
  6219. return HAL_TIMEOUT;
  6220. 8002b84: 2303 movs r3, #3
  6221. 8002b86: e084 b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6222. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
  6223. 8002b88: 4b45 ldr r3, [pc, #276] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6224. 8002b8a: 689b ldr r3, [r3, #8]
  6225. 8002b8c: f003 030c and.w r3, r3, #12
  6226. 8002b90: 2b0c cmp r3, #12
  6227. 8002b92: d1ee bne.n 8002b72 <HAL_RCC_ClockConfig+0x12a>
  6228. 8002b94: e027 b.n 8002be6 <HAL_RCC_ClockConfig+0x19e>
  6229. }
  6230. }
  6231. }
  6232. else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
  6233. 8002b96: 687b ldr r3, [r7, #4]
  6234. 8002b98: 685b ldr r3, [r3, #4]
  6235. 8002b9a: 2b01 cmp r3, #1
  6236. 8002b9c: d11d bne.n 8002bda <HAL_RCC_ClockConfig+0x192>
  6237. {
  6238. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
  6239. 8002b9e: e00a b.n 8002bb6 <HAL_RCC_ClockConfig+0x16e>
  6240. {
  6241. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  6242. 8002ba0: f7ff f960 bl 8001e64 <HAL_GetTick>
  6243. 8002ba4: 4602 mov r2, r0
  6244. 8002ba6: 68fb ldr r3, [r7, #12]
  6245. 8002ba8: 1ad3 subs r3, r2, r3
  6246. 8002baa: f241 3288 movw r2, #5000 ; 0x1388
  6247. 8002bae: 4293 cmp r3, r2
  6248. 8002bb0: d901 bls.n 8002bb6 <HAL_RCC_ClockConfig+0x16e>
  6249. {
  6250. return HAL_TIMEOUT;
  6251. 8002bb2: 2303 movs r3, #3
  6252. 8002bb4: e06d b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6253. while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
  6254. 8002bb6: 4b3a ldr r3, [pc, #232] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6255. 8002bb8: 689b ldr r3, [r3, #8]
  6256. 8002bba: f003 030c and.w r3, r3, #12
  6257. 8002bbe: 2b04 cmp r3, #4
  6258. 8002bc0: d1ee bne.n 8002ba0 <HAL_RCC_ClockConfig+0x158>
  6259. 8002bc2: e010 b.n 8002be6 <HAL_RCC_ClockConfig+0x19e>
  6260. }
  6261. else
  6262. {
  6263. while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
  6264. {
  6265. if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
  6266. 8002bc4: f7ff f94e bl 8001e64 <HAL_GetTick>
  6267. 8002bc8: 4602 mov r2, r0
  6268. 8002bca: 68fb ldr r3, [r7, #12]
  6269. 8002bcc: 1ad3 subs r3, r2, r3
  6270. 8002bce: f241 3288 movw r2, #5000 ; 0x1388
  6271. 8002bd2: 4293 cmp r3, r2
  6272. 8002bd4: d901 bls.n 8002bda <HAL_RCC_ClockConfig+0x192>
  6273. {
  6274. return HAL_TIMEOUT;
  6275. 8002bd6: 2303 movs r3, #3
  6276. 8002bd8: e05b b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6277. while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
  6278. 8002bda: 4b31 ldr r3, [pc, #196] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6279. 8002bdc: 689b ldr r3, [r3, #8]
  6280. 8002bde: f003 030c and.w r3, r3, #12
  6281. 8002be2: 2b00 cmp r3, #0
  6282. 8002be4: d1ee bne.n 8002bc4 <HAL_RCC_ClockConfig+0x17c>
  6283. }
  6284. }
  6285. }
  6286. }
  6287. /* Decreasing the number of wait states because of lower CPU frequency */
  6288. if(FLatency < __HAL_FLASH_GET_LATENCY())
  6289. 8002be6: 4b2d ldr r3, [pc, #180] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6290. 8002be8: 681b ldr r3, [r3, #0]
  6291. 8002bea: f003 0301 and.w r3, r3, #1
  6292. 8002bee: 683a ldr r2, [r7, #0]
  6293. 8002bf0: 429a cmp r2, r3
  6294. 8002bf2: d219 bcs.n 8002c28 <HAL_RCC_ClockConfig+0x1e0>
  6295. {
  6296. /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
  6297. __HAL_FLASH_SET_LATENCY(FLatency);
  6298. 8002bf4: 683b ldr r3, [r7, #0]
  6299. 8002bf6: 2b01 cmp r3, #1
  6300. 8002bf8: d105 bne.n 8002c06 <HAL_RCC_ClockConfig+0x1be>
  6301. 8002bfa: 4b28 ldr r3, [pc, #160] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6302. 8002bfc: 681b ldr r3, [r3, #0]
  6303. 8002bfe: 4a27 ldr r2, [pc, #156] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6304. 8002c00: f043 0304 orr.w r3, r3, #4
  6305. 8002c04: 6013 str r3, [r2, #0]
  6306. 8002c06: 4b25 ldr r3, [pc, #148] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6307. 8002c08: 681b ldr r3, [r3, #0]
  6308. 8002c0a: f023 0201 bic.w r2, r3, #1
  6309. 8002c0e: 4923 ldr r1, [pc, #140] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6310. 8002c10: 683b ldr r3, [r7, #0]
  6311. 8002c12: 4313 orrs r3, r2
  6312. 8002c14: 600b str r3, [r1, #0]
  6313. /* Check that the new number of wait states is taken into account to access the Flash
  6314. memory by reading the FLASH_ACR register */
  6315. if(__HAL_FLASH_GET_LATENCY() != FLatency)
  6316. 8002c16: 4b21 ldr r3, [pc, #132] ; (8002c9c <HAL_RCC_ClockConfig+0x254>)
  6317. 8002c18: 681b ldr r3, [r3, #0]
  6318. 8002c1a: f003 0301 and.w r3, r3, #1
  6319. 8002c1e: 683a ldr r2, [r7, #0]
  6320. 8002c20: 429a cmp r2, r3
  6321. 8002c22: d001 beq.n 8002c28 <HAL_RCC_ClockConfig+0x1e0>
  6322. {
  6323. return HAL_ERROR;
  6324. 8002c24: 2301 movs r3, #1
  6325. 8002c26: e034 b.n 8002c92 <HAL_RCC_ClockConfig+0x24a>
  6326. }
  6327. }
  6328. /*-------------------------- PCLK1 Configuration ---------------------------*/
  6329. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
  6330. 8002c28: 687b ldr r3, [r7, #4]
  6331. 8002c2a: 681b ldr r3, [r3, #0]
  6332. 8002c2c: f003 0304 and.w r3, r3, #4
  6333. 8002c30: 2b00 cmp r3, #0
  6334. 8002c32: d008 beq.n 8002c46 <HAL_RCC_ClockConfig+0x1fe>
  6335. {
  6336. assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
  6337. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
  6338. 8002c34: 4b1a ldr r3, [pc, #104] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6339. 8002c36: 689b ldr r3, [r3, #8]
  6340. 8002c38: f423 62e0 bic.w r2, r3, #1792 ; 0x700
  6341. 8002c3c: 687b ldr r3, [r7, #4]
  6342. 8002c3e: 68db ldr r3, [r3, #12]
  6343. 8002c40: 4917 ldr r1, [pc, #92] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6344. 8002c42: 4313 orrs r3, r2
  6345. 8002c44: 608b str r3, [r1, #8]
  6346. }
  6347. /*-------------------------- PCLK2 Configuration ---------------------------*/
  6348. if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
  6349. 8002c46: 687b ldr r3, [r7, #4]
  6350. 8002c48: 681b ldr r3, [r3, #0]
  6351. 8002c4a: f003 0308 and.w r3, r3, #8
  6352. 8002c4e: 2b00 cmp r3, #0
  6353. 8002c50: d009 beq.n 8002c66 <HAL_RCC_ClockConfig+0x21e>
  6354. {
  6355. assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
  6356. MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
  6357. 8002c52: 4b13 ldr r3, [pc, #76] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6358. 8002c54: 689b ldr r3, [r3, #8]
  6359. 8002c56: f423 5260 bic.w r2, r3, #14336 ; 0x3800
  6360. 8002c5a: 687b ldr r3, [r7, #4]
  6361. 8002c5c: 691b ldr r3, [r3, #16]
  6362. 8002c5e: 00db lsls r3, r3, #3
  6363. 8002c60: 490f ldr r1, [pc, #60] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6364. 8002c62: 4313 orrs r3, r2
  6365. 8002c64: 608b str r3, [r1, #8]
  6366. }
  6367. /* Update the SystemCoreClock global variable */
  6368. SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
  6369. 8002c66: f000 f823 bl 8002cb0 <HAL_RCC_GetSysClockFreq>
  6370. 8002c6a: 4601 mov r1, r0
  6371. 8002c6c: 4b0c ldr r3, [pc, #48] ; (8002ca0 <HAL_RCC_ClockConfig+0x258>)
  6372. 8002c6e: 689b ldr r3, [r3, #8]
  6373. 8002c70: 091b lsrs r3, r3, #4
  6374. 8002c72: f003 030f and.w r3, r3, #15
  6375. 8002c76: 4a0b ldr r2, [pc, #44] ; (8002ca4 <HAL_RCC_ClockConfig+0x25c>)
  6376. 8002c78: 5cd3 ldrb r3, [r2, r3]
  6377. 8002c7a: fa21 f303 lsr.w r3, r1, r3
  6378. 8002c7e: 4a0a ldr r2, [pc, #40] ; (8002ca8 <HAL_RCC_ClockConfig+0x260>)
  6379. 8002c80: 6013 str r3, [r2, #0]
  6380. /* Configure the source of time base considering new system clocks settings*/
  6381. status = HAL_InitTick(uwTickPrio);
  6382. 8002c82: 4b0a ldr r3, [pc, #40] ; (8002cac <HAL_RCC_ClockConfig+0x264>)
  6383. 8002c84: 681b ldr r3, [r3, #0]
  6384. 8002c86: 4618 mov r0, r3
  6385. 8002c88: f7ff f8a0 bl 8001dcc <HAL_InitTick>
  6386. 8002c8c: 4603 mov r3, r0
  6387. 8002c8e: 72fb strb r3, [r7, #11]
  6388. return status;
  6389. 8002c90: 7afb ldrb r3, [r7, #11]
  6390. }
  6391. 8002c92: 4618 mov r0, r3
  6392. 8002c94: 3710 adds r7, #16
  6393. 8002c96: 46bd mov sp, r7
  6394. 8002c98: bd80 pop {r7, pc}
  6395. 8002c9a: bf00 nop
  6396. 8002c9c: 40023c00 .word 0x40023c00
  6397. 8002ca0: 40023800 .word 0x40023800
  6398. 8002ca4: 08007b30 .word 0x08007b30
  6399. 8002ca8: 20000004 .word 0x20000004
  6400. 8002cac: 20000008 .word 0x20000008
  6401. 08002cb0 <HAL_RCC_GetSysClockFreq>:
  6402. * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
  6403. *
  6404. * @retval SYSCLK frequency
  6405. */
  6406. uint32_t HAL_RCC_GetSysClockFreq(void)
  6407. {
  6408. 8002cb0: b5f0 push {r4, r5, r6, r7, lr}
  6409. 8002cb2: b087 sub sp, #28
  6410. 8002cb4: af00 add r7, sp, #0
  6411. uint32_t tmpreg, pllm, plld, pllvco, msiclkrange, sysclockfreq;
  6412. tmpreg = RCC->CFGR;
  6413. 8002cb6: 4b5f ldr r3, [pc, #380] ; (8002e34 <HAL_RCC_GetSysClockFreq+0x184>)
  6414. 8002cb8: 689b ldr r3, [r3, #8]
  6415. 8002cba: 60fb str r3, [r7, #12]
  6416. /* Get SYSCLK source -------------------------------------------------------*/
  6417. switch (tmpreg & RCC_CFGR_SWS)
  6418. 8002cbc: 68fb ldr r3, [r7, #12]
  6419. 8002cbe: f003 030c and.w r3, r3, #12
  6420. 8002cc2: 2b08 cmp r3, #8
  6421. 8002cc4: d007 beq.n 8002cd6 <HAL_RCC_GetSysClockFreq+0x26>
  6422. 8002cc6: 2b0c cmp r3, #12
  6423. 8002cc8: d008 beq.n 8002cdc <HAL_RCC_GetSysClockFreq+0x2c>
  6424. 8002cca: 2b04 cmp r3, #4
  6425. 8002ccc: f040 809f bne.w 8002e0e <HAL_RCC_GetSysClockFreq+0x15e>
  6426. {
  6427. case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
  6428. {
  6429. sysclockfreq = HSI_VALUE;
  6430. 8002cd0: 4b59 ldr r3, [pc, #356] ; (8002e38 <HAL_RCC_GetSysClockFreq+0x188>)
  6431. 8002cd2: 613b str r3, [r7, #16]
  6432. break;
  6433. 8002cd4: e0a9 b.n 8002e2a <HAL_RCC_GetSysClockFreq+0x17a>
  6434. }
  6435. case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
  6436. {
  6437. sysclockfreq = HSE_VALUE;
  6438. 8002cd6: 4b59 ldr r3, [pc, #356] ; (8002e3c <HAL_RCC_GetSysClockFreq+0x18c>)
  6439. 8002cd8: 613b str r3, [r7, #16]
  6440. break;
  6441. 8002cda: e0a6 b.n 8002e2a <HAL_RCC_GetSysClockFreq+0x17a>
  6442. }
  6443. case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
  6444. {
  6445. pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos];
  6446. 8002cdc: 68fb ldr r3, [r7, #12]
  6447. 8002cde: 0c9b lsrs r3, r3, #18
  6448. 8002ce0: f003 030f and.w r3, r3, #15
  6449. 8002ce4: 4a56 ldr r2, [pc, #344] ; (8002e40 <HAL_RCC_GetSysClockFreq+0x190>)
  6450. 8002ce6: 5cd3 ldrb r3, [r2, r3]
  6451. 8002ce8: 60bb str r3, [r7, #8]
  6452. plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U;
  6453. 8002cea: 68fb ldr r3, [r7, #12]
  6454. 8002cec: 0d9b lsrs r3, r3, #22
  6455. 8002cee: f003 0303 and.w r3, r3, #3
  6456. 8002cf2: 3301 adds r3, #1
  6457. 8002cf4: 607b str r3, [r7, #4]
  6458. if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
  6459. 8002cf6: 4b4f ldr r3, [pc, #316] ; (8002e34 <HAL_RCC_GetSysClockFreq+0x184>)
  6460. 8002cf8: 689b ldr r3, [r3, #8]
  6461. 8002cfa: f403 3380 and.w r3, r3, #65536 ; 0x10000
  6462. 8002cfe: 2b00 cmp r3, #0
  6463. 8002d00: d041 beq.n 8002d86 <HAL_RCC_GetSysClockFreq+0xd6>
  6464. {
  6465. /* HSE used as PLL clock source */
  6466. pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld);
  6467. 8002d02: 68bb ldr r3, [r7, #8]
  6468. 8002d04: 461d mov r5, r3
  6469. 8002d06: f04f 0600 mov.w r6, #0
  6470. 8002d0a: 4629 mov r1, r5
  6471. 8002d0c: 4632 mov r2, r6
  6472. 8002d0e: f04f 0300 mov.w r3, #0
  6473. 8002d12: f04f 0400 mov.w r4, #0
  6474. 8002d16: 0154 lsls r4, r2, #5
  6475. 8002d18: ea44 64d1 orr.w r4, r4, r1, lsr #27
  6476. 8002d1c: 014b lsls r3, r1, #5
  6477. 8002d1e: 4619 mov r1, r3
  6478. 8002d20: 4622 mov r2, r4
  6479. 8002d22: 1b49 subs r1, r1, r5
  6480. 8002d24: eb62 0206 sbc.w r2, r2, r6
  6481. 8002d28: f04f 0300 mov.w r3, #0
  6482. 8002d2c: f04f 0400 mov.w r4, #0
  6483. 8002d30: 0194 lsls r4, r2, #6
  6484. 8002d32: ea44 6491 orr.w r4, r4, r1, lsr #26
  6485. 8002d36: 018b lsls r3, r1, #6
  6486. 8002d38: 1a5b subs r3, r3, r1
  6487. 8002d3a: eb64 0402 sbc.w r4, r4, r2
  6488. 8002d3e: f04f 0100 mov.w r1, #0
  6489. 8002d42: f04f 0200 mov.w r2, #0
  6490. 8002d46: 00e2 lsls r2, r4, #3
  6491. 8002d48: ea42 7253 orr.w r2, r2, r3, lsr #29
  6492. 8002d4c: 00d9 lsls r1, r3, #3
  6493. 8002d4e: 460b mov r3, r1
  6494. 8002d50: 4614 mov r4, r2
  6495. 8002d52: 195b adds r3, r3, r5
  6496. 8002d54: eb44 0406 adc.w r4, r4, r6
  6497. 8002d58: f04f 0100 mov.w r1, #0
  6498. 8002d5c: f04f 0200 mov.w r2, #0
  6499. 8002d60: 0262 lsls r2, r4, #9
  6500. 8002d62: ea42 52d3 orr.w r2, r2, r3, lsr #23
  6501. 8002d66: 0259 lsls r1, r3, #9
  6502. 8002d68: 460b mov r3, r1
  6503. 8002d6a: 4614 mov r4, r2
  6504. 8002d6c: 4618 mov r0, r3
  6505. 8002d6e: 4621 mov r1, r4
  6506. 8002d70: 687b ldr r3, [r7, #4]
  6507. 8002d72: f04f 0400 mov.w r4, #0
  6508. 8002d76: 461a mov r2, r3
  6509. 8002d78: 4623 mov r3, r4
  6510. 8002d7a: f7fd fdf5 bl 8000968 <__aeabi_uldivmod>
  6511. 8002d7e: 4603 mov r3, r0
  6512. 8002d80: 460c mov r4, r1
  6513. 8002d82: 617b str r3, [r7, #20]
  6514. 8002d84: e040 b.n 8002e08 <HAL_RCC_GetSysClockFreq+0x158>
  6515. }
  6516. else
  6517. {
  6518. /* HSI used as PLL clock source */
  6519. pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld);
  6520. 8002d86: 68bb ldr r3, [r7, #8]
  6521. 8002d88: 461d mov r5, r3
  6522. 8002d8a: f04f 0600 mov.w r6, #0
  6523. 8002d8e: 4629 mov r1, r5
  6524. 8002d90: 4632 mov r2, r6
  6525. 8002d92: f04f 0300 mov.w r3, #0
  6526. 8002d96: f04f 0400 mov.w r4, #0
  6527. 8002d9a: 0154 lsls r4, r2, #5
  6528. 8002d9c: ea44 64d1 orr.w r4, r4, r1, lsr #27
  6529. 8002da0: 014b lsls r3, r1, #5
  6530. 8002da2: 4619 mov r1, r3
  6531. 8002da4: 4622 mov r2, r4
  6532. 8002da6: 1b49 subs r1, r1, r5
  6533. 8002da8: eb62 0206 sbc.w r2, r2, r6
  6534. 8002dac: f04f 0300 mov.w r3, #0
  6535. 8002db0: f04f 0400 mov.w r4, #0
  6536. 8002db4: 0194 lsls r4, r2, #6
  6537. 8002db6: ea44 6491 orr.w r4, r4, r1, lsr #26
  6538. 8002dba: 018b lsls r3, r1, #6
  6539. 8002dbc: 1a5b subs r3, r3, r1
  6540. 8002dbe: eb64 0402 sbc.w r4, r4, r2
  6541. 8002dc2: f04f 0100 mov.w r1, #0
  6542. 8002dc6: f04f 0200 mov.w r2, #0
  6543. 8002dca: 00e2 lsls r2, r4, #3
  6544. 8002dcc: ea42 7253 orr.w r2, r2, r3, lsr #29
  6545. 8002dd0: 00d9 lsls r1, r3, #3
  6546. 8002dd2: 460b mov r3, r1
  6547. 8002dd4: 4614 mov r4, r2
  6548. 8002dd6: 195b adds r3, r3, r5
  6549. 8002dd8: eb44 0406 adc.w r4, r4, r6
  6550. 8002ddc: f04f 0100 mov.w r1, #0
  6551. 8002de0: f04f 0200 mov.w r2, #0
  6552. 8002de4: 02a2 lsls r2, r4, #10
  6553. 8002de6: ea42 5293 orr.w r2, r2, r3, lsr #22
  6554. 8002dea: 0299 lsls r1, r3, #10
  6555. 8002dec: 460b mov r3, r1
  6556. 8002dee: 4614 mov r4, r2
  6557. 8002df0: 4618 mov r0, r3
  6558. 8002df2: 4621 mov r1, r4
  6559. 8002df4: 687b ldr r3, [r7, #4]
  6560. 8002df6: f04f 0400 mov.w r4, #0
  6561. 8002dfa: 461a mov r2, r3
  6562. 8002dfc: 4623 mov r3, r4
  6563. 8002dfe: f7fd fdb3 bl 8000968 <__aeabi_uldivmod>
  6564. 8002e02: 4603 mov r3, r0
  6565. 8002e04: 460c mov r4, r1
  6566. 8002e06: 617b str r3, [r7, #20]
  6567. }
  6568. sysclockfreq = pllvco;
  6569. 8002e08: 697b ldr r3, [r7, #20]
  6570. 8002e0a: 613b str r3, [r7, #16]
  6571. break;
  6572. 8002e0c: e00d b.n 8002e2a <HAL_RCC_GetSysClockFreq+0x17a>
  6573. }
  6574. case RCC_SYSCLKSOURCE_STATUS_MSI: /* MSI used as system clock source */
  6575. default: /* MSI used as system clock */
  6576. {
  6577. msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos;
  6578. 8002e0e: 4b09 ldr r3, [pc, #36] ; (8002e34 <HAL_RCC_GetSysClockFreq+0x184>)
  6579. 8002e10: 685b ldr r3, [r3, #4]
  6580. 8002e12: 0b5b lsrs r3, r3, #13
  6581. 8002e14: f003 0307 and.w r3, r3, #7
  6582. 8002e18: 603b str r3, [r7, #0]
  6583. sysclockfreq = (32768U * (1UL << (msiclkrange + 1U)));
  6584. 8002e1a: 683b ldr r3, [r7, #0]
  6585. 8002e1c: 3301 adds r3, #1
  6586. 8002e1e: f44f 4200 mov.w r2, #32768 ; 0x8000
  6587. 8002e22: fa02 f303 lsl.w r3, r2, r3
  6588. 8002e26: 613b str r3, [r7, #16]
  6589. break;
  6590. 8002e28: bf00 nop
  6591. }
  6592. }
  6593. return sysclockfreq;
  6594. 8002e2a: 693b ldr r3, [r7, #16]
  6595. }
  6596. 8002e2c: 4618 mov r0, r3
  6597. 8002e2e: 371c adds r7, #28
  6598. 8002e30: 46bd mov sp, r7
  6599. 8002e32: bdf0 pop {r4, r5, r6, r7, pc}
  6600. 8002e34: 40023800 .word 0x40023800
  6601. 8002e38: 00f42400 .word 0x00f42400
  6602. 8002e3c: 007a1200 .word 0x007a1200
  6603. 8002e40: 08007b24 .word 0x08007b24
  6604. 08002e44 <HAL_RCC_GetHCLKFreq>:
  6605. * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
  6606. * and updated within this function
  6607. * @retval HCLK frequency
  6608. */
  6609. uint32_t HAL_RCC_GetHCLKFreq(void)
  6610. {
  6611. 8002e44: b480 push {r7}
  6612. 8002e46: af00 add r7, sp, #0
  6613. return SystemCoreClock;
  6614. 8002e48: 4b02 ldr r3, [pc, #8] ; (8002e54 <HAL_RCC_GetHCLKFreq+0x10>)
  6615. 8002e4a: 681b ldr r3, [r3, #0]
  6616. }
  6617. 8002e4c: 4618 mov r0, r3
  6618. 8002e4e: 46bd mov sp, r7
  6619. 8002e50: bc80 pop {r7}
  6620. 8002e52: 4770 bx lr
  6621. 8002e54: 20000004 .word 0x20000004
  6622. 08002e58 <HAL_RCC_GetPCLK1Freq>:
  6623. * @note Each time PCLK1 changes, this function must be called to update the
  6624. * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  6625. * @retval PCLK1 frequency
  6626. */
  6627. uint32_t HAL_RCC_GetPCLK1Freq(void)
  6628. {
  6629. 8002e58: b580 push {r7, lr}
  6630. 8002e5a: af00 add r7, sp, #0
  6631. /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  6632. return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
  6633. 8002e5c: f7ff fff2 bl 8002e44 <HAL_RCC_GetHCLKFreq>
  6634. 8002e60: 4601 mov r1, r0
  6635. 8002e62: 4b05 ldr r3, [pc, #20] ; (8002e78 <HAL_RCC_GetPCLK1Freq+0x20>)
  6636. 8002e64: 689b ldr r3, [r3, #8]
  6637. 8002e66: 0a1b lsrs r3, r3, #8
  6638. 8002e68: f003 0307 and.w r3, r3, #7
  6639. 8002e6c: 4a03 ldr r2, [pc, #12] ; (8002e7c <HAL_RCC_GetPCLK1Freq+0x24>)
  6640. 8002e6e: 5cd3 ldrb r3, [r2, r3]
  6641. 8002e70: fa21 f303 lsr.w r3, r1, r3
  6642. }
  6643. 8002e74: 4618 mov r0, r3
  6644. 8002e76: bd80 pop {r7, pc}
  6645. 8002e78: 40023800 .word 0x40023800
  6646. 8002e7c: 08007b40 .word 0x08007b40
  6647. 08002e80 <HAL_RCC_GetPCLK2Freq>:
  6648. * @note Each time PCLK2 changes, this function must be called to update the
  6649. * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
  6650. * @retval PCLK2 frequency
  6651. */
  6652. uint32_t HAL_RCC_GetPCLK2Freq(void)
  6653. {
  6654. 8002e80: b580 push {r7, lr}
  6655. 8002e82: af00 add r7, sp, #0
  6656. /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
  6657. return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
  6658. 8002e84: f7ff ffde bl 8002e44 <HAL_RCC_GetHCLKFreq>
  6659. 8002e88: 4601 mov r1, r0
  6660. 8002e8a: 4b05 ldr r3, [pc, #20] ; (8002ea0 <HAL_RCC_GetPCLK2Freq+0x20>)
  6661. 8002e8c: 689b ldr r3, [r3, #8]
  6662. 8002e8e: 0adb lsrs r3, r3, #11
  6663. 8002e90: f003 0307 and.w r3, r3, #7
  6664. 8002e94: 4a03 ldr r2, [pc, #12] ; (8002ea4 <HAL_RCC_GetPCLK2Freq+0x24>)
  6665. 8002e96: 5cd3 ldrb r3, [r2, r3]
  6666. 8002e98: fa21 f303 lsr.w r3, r1, r3
  6667. }
  6668. 8002e9c: 4618 mov r0, r3
  6669. 8002e9e: bd80 pop {r7, pc}
  6670. 8002ea0: 40023800 .word 0x40023800
  6671. 8002ea4: 08007b40 .word 0x08007b40
  6672. 08002ea8 <RCC_SetFlashLatencyFromMSIRange>:
  6673. voltage range
  6674. * @param MSIrange MSI range value from RCC_MSIRANGE_0 to RCC_MSIRANGE_6
  6675. * @retval HAL status
  6676. */
  6677. static HAL_StatusTypeDef RCC_SetFlashLatencyFromMSIRange(uint32_t MSIrange)
  6678. {
  6679. 8002ea8: b480 push {r7}
  6680. 8002eaa: b087 sub sp, #28
  6681. 8002eac: af00 add r7, sp, #0
  6682. 8002eae: 6078 str r0, [r7, #4]
  6683. uint32_t vos;
  6684. uint32_t latency = FLASH_LATENCY_0; /* default value 0WS */
  6685. 8002eb0: 2300 movs r3, #0
  6686. 8002eb2: 613b str r3, [r7, #16]
  6687. /* HCLK can reach 4 MHz only if AHB prescaler = 1 */
  6688. if (READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1)
  6689. 8002eb4: 4b29 ldr r3, [pc, #164] ; (8002f5c <RCC_SetFlashLatencyFromMSIRange+0xb4>)
  6690. 8002eb6: 689b ldr r3, [r3, #8]
  6691. 8002eb8: f003 03f0 and.w r3, r3, #240 ; 0xf0
  6692. 8002ebc: 2b00 cmp r3, #0
  6693. 8002ebe: d12c bne.n 8002f1a <RCC_SetFlashLatencyFromMSIRange+0x72>
  6694. {
  6695. if(__HAL_RCC_PWR_IS_CLK_ENABLED())
  6696. 8002ec0: 4b26 ldr r3, [pc, #152] ; (8002f5c <RCC_SetFlashLatencyFromMSIRange+0xb4>)
  6697. 8002ec2: 6a5b ldr r3, [r3, #36] ; 0x24
  6698. 8002ec4: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  6699. 8002ec8: 2b00 cmp r3, #0
  6700. 8002eca: d005 beq.n 8002ed8 <RCC_SetFlashLatencyFromMSIRange+0x30>
  6701. {
  6702. vos = READ_BIT(PWR->CR, PWR_CR_VOS);
  6703. 8002ecc: 4b24 ldr r3, [pc, #144] ; (8002f60 <RCC_SetFlashLatencyFromMSIRange+0xb8>)
  6704. 8002ece: 681b ldr r3, [r3, #0]
  6705. 8002ed0: f403 53c0 and.w r3, r3, #6144 ; 0x1800
  6706. 8002ed4: 617b str r3, [r7, #20]
  6707. 8002ed6: e016 b.n 8002f06 <RCC_SetFlashLatencyFromMSIRange+0x5e>
  6708. }
  6709. else
  6710. {
  6711. __HAL_RCC_PWR_CLK_ENABLE();
  6712. 8002ed8: 4b20 ldr r3, [pc, #128] ; (8002f5c <RCC_SetFlashLatencyFromMSIRange+0xb4>)
  6713. 8002eda: 6a5b ldr r3, [r3, #36] ; 0x24
  6714. 8002edc: 4a1f ldr r2, [pc, #124] ; (8002f5c <RCC_SetFlashLatencyFromMSIRange+0xb4>)
  6715. 8002ede: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
  6716. 8002ee2: 6253 str r3, [r2, #36] ; 0x24
  6717. 8002ee4: 4b1d ldr r3, [pc, #116] ; (8002f5c <RCC_SetFlashLatencyFromMSIRange+0xb4>)
  6718. 8002ee6: 6a5b ldr r3, [r3, #36] ; 0x24
  6719. 8002ee8: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
  6720. 8002eec: 60fb str r3, [r7, #12]
  6721. 8002eee: 68fb ldr r3, [r7, #12]
  6722. vos = READ_BIT(PWR->CR, PWR_CR_VOS);
  6723. 8002ef0: 4b1b ldr r3, [pc, #108] ; (8002f60 <RCC_SetFlashLatencyFromMSIRange+0xb8>)
  6724. 8002ef2: 681b ldr r3, [r3, #0]
  6725. 8002ef4: f403 53c0 and.w r3, r3, #6144 ; 0x1800
  6726. 8002ef8: 617b str r3, [r7, #20]
  6727. __HAL_RCC_PWR_CLK_DISABLE();
  6728. 8002efa: 4b18 ldr r3, [pc, #96] ; (8002f5c <RCC_SetFlashLatencyFromMSIRange+0xb4>)
  6729. 8002efc: 6a5b ldr r3, [r3, #36] ; 0x24
  6730. 8002efe: 4a17 ldr r2, [pc, #92] ; (8002f5c <RCC_SetFlashLatencyFromMSIRange+0xb4>)
  6731. 8002f00: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
  6732. 8002f04: 6253 str r3, [r2, #36] ; 0x24
  6733. }
  6734. /* Check if need to set latency 1 only for Range 3 & HCLK = 4MHz */
  6735. if((vos == PWR_REGULATOR_VOLTAGE_SCALE3) && (MSIrange == RCC_MSIRANGE_6))
  6736. 8002f06: 697b ldr r3, [r7, #20]
  6737. 8002f08: f5b3 5fc0 cmp.w r3, #6144 ; 0x1800
  6738. 8002f0c: d105 bne.n 8002f1a <RCC_SetFlashLatencyFromMSIRange+0x72>
  6739. 8002f0e: 687b ldr r3, [r7, #4]
  6740. 8002f10: f5b3 4f40 cmp.w r3, #49152 ; 0xc000
  6741. 8002f14: d101 bne.n 8002f1a <RCC_SetFlashLatencyFromMSIRange+0x72>
  6742. {
  6743. latency = FLASH_LATENCY_1; /* 1WS */
  6744. 8002f16: 2301 movs r3, #1
  6745. 8002f18: 613b str r3, [r7, #16]
  6746. }
  6747. }
  6748. __HAL_FLASH_SET_LATENCY(latency);
  6749. 8002f1a: 693b ldr r3, [r7, #16]
  6750. 8002f1c: 2b01 cmp r3, #1
  6751. 8002f1e: d105 bne.n 8002f2c <RCC_SetFlashLatencyFromMSIRange+0x84>
  6752. 8002f20: 4b10 ldr r3, [pc, #64] ; (8002f64 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
  6753. 8002f22: 681b ldr r3, [r3, #0]
  6754. 8002f24: 4a0f ldr r2, [pc, #60] ; (8002f64 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
  6755. 8002f26: f043 0304 orr.w r3, r3, #4
  6756. 8002f2a: 6013 str r3, [r2, #0]
  6757. 8002f2c: 4b0d ldr r3, [pc, #52] ; (8002f64 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
  6758. 8002f2e: 681b ldr r3, [r3, #0]
  6759. 8002f30: f023 0201 bic.w r2, r3, #1
  6760. 8002f34: 490b ldr r1, [pc, #44] ; (8002f64 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
  6761. 8002f36: 693b ldr r3, [r7, #16]
  6762. 8002f38: 4313 orrs r3, r2
  6763. 8002f3a: 600b str r3, [r1, #0]
  6764. /* Check that the new number of wait states is taken into account to access the Flash
  6765. memory by reading the FLASH_ACR register */
  6766. if(__HAL_FLASH_GET_LATENCY() != latency)
  6767. 8002f3c: 4b09 ldr r3, [pc, #36] ; (8002f64 <RCC_SetFlashLatencyFromMSIRange+0xbc>)
  6768. 8002f3e: 681b ldr r3, [r3, #0]
  6769. 8002f40: f003 0301 and.w r3, r3, #1
  6770. 8002f44: 693a ldr r2, [r7, #16]
  6771. 8002f46: 429a cmp r2, r3
  6772. 8002f48: d001 beq.n 8002f4e <RCC_SetFlashLatencyFromMSIRange+0xa6>
  6773. {
  6774. return HAL_ERROR;
  6775. 8002f4a: 2301 movs r3, #1
  6776. 8002f4c: e000 b.n 8002f50 <RCC_SetFlashLatencyFromMSIRange+0xa8>
  6777. }
  6778. return HAL_OK;
  6779. 8002f4e: 2300 movs r3, #0
  6780. }
  6781. 8002f50: 4618 mov r0, r3
  6782. 8002f52: 371c adds r7, #28
  6783. 8002f54: 46bd mov sp, r7
  6784. 8002f56: bc80 pop {r7}
  6785. 8002f58: 4770 bx lr
  6786. 8002f5a: bf00 nop
  6787. 8002f5c: 40023800 .word 0x40023800
  6788. 8002f60: 40007000 .word 0x40007000
  6789. 8002f64: 40023c00 .word 0x40023c00
  6790. 08002f68 <HAL_SPI_Init>:
  6791. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  6792. * the configuration information for SPI module.
  6793. * @retval HAL status
  6794. */
  6795. HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  6796. {
  6797. 8002f68: b580 push {r7, lr}
  6798. 8002f6a: b082 sub sp, #8
  6799. 8002f6c: af00 add r7, sp, #0
  6800. 8002f6e: 6078 str r0, [r7, #4]
  6801. /* Check the SPI handle allocation */
  6802. if (hspi == NULL)
  6803. 8002f70: 687b ldr r3, [r7, #4]
  6804. 8002f72: 2b00 cmp r3, #0
  6805. 8002f74: d101 bne.n 8002f7a <HAL_SPI_Init+0x12>
  6806. {
  6807. return HAL_ERROR;
  6808. 8002f76: 2301 movs r3, #1
  6809. 8002f78: e07b b.n 8003072 <HAL_SPI_Init+0x10a>
  6810. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  6811. assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
  6812. /* TI mode is not supported on all devices in stm32l1xx serie.
  6813. TIMode parameter is mandatory equal to SPI_TIMODE_DISABLE if TI mode is not supported */
  6814. assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
  6815. if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
  6816. 8002f7a: 687b ldr r3, [r7, #4]
  6817. 8002f7c: 6a5b ldr r3, [r3, #36] ; 0x24
  6818. 8002f7e: 2b00 cmp r3, #0
  6819. 8002f80: d108 bne.n 8002f94 <HAL_SPI_Init+0x2c>
  6820. {
  6821. assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
  6822. assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
  6823. if (hspi->Init.Mode == SPI_MODE_MASTER)
  6824. 8002f82: 687b ldr r3, [r7, #4]
  6825. 8002f84: 685b ldr r3, [r3, #4]
  6826. 8002f86: f5b3 7f82 cmp.w r3, #260 ; 0x104
  6827. 8002f8a: d009 beq.n 8002fa0 <HAL_SPI_Init+0x38>
  6828. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  6829. }
  6830. else
  6831. {
  6832. /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
  6833. hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
  6834. 8002f8c: 687b ldr r3, [r7, #4]
  6835. 8002f8e: 2200 movs r2, #0
  6836. 8002f90: 61da str r2, [r3, #28]
  6837. 8002f92: e005 b.n 8002fa0 <HAL_SPI_Init+0x38>
  6838. else
  6839. {
  6840. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  6841. /* Force polarity and phase to TI protocaol requirements */
  6842. hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
  6843. 8002f94: 687b ldr r3, [r7, #4]
  6844. 8002f96: 2200 movs r2, #0
  6845. 8002f98: 611a str r2, [r3, #16]
  6846. hspi->Init.CLKPhase = SPI_PHASE_1EDGE;
  6847. 8002f9a: 687b ldr r3, [r7, #4]
  6848. 8002f9c: 2200 movs r2, #0
  6849. 8002f9e: 615a str r2, [r3, #20]
  6850. if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  6851. {
  6852. assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  6853. }
  6854. #else
  6855. hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
  6856. 8002fa0: 687b ldr r3, [r7, #4]
  6857. 8002fa2: 2200 movs r2, #0
  6858. 8002fa4: 629a str r2, [r3, #40] ; 0x28
  6859. #endif /* USE_SPI_CRC */
  6860. if (hspi->State == HAL_SPI_STATE_RESET)
  6861. 8002fa6: 687b ldr r3, [r7, #4]
  6862. 8002fa8: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
  6863. 8002fac: b2db uxtb r3, r3
  6864. 8002fae: 2b00 cmp r3, #0
  6865. 8002fb0: d106 bne.n 8002fc0 <HAL_SPI_Init+0x58>
  6866. {
  6867. /* Allocate lock resource and initialize it */
  6868. hspi->Lock = HAL_UNLOCKED;
  6869. 8002fb2: 687b ldr r3, [r7, #4]
  6870. 8002fb4: 2200 movs r2, #0
  6871. 8002fb6: f883 2050 strb.w r2, [r3, #80] ; 0x50
  6872. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  6873. hspi->MspInitCallback(hspi);
  6874. #else
  6875. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  6876. HAL_SPI_MspInit(hspi);
  6877. 8002fba: 6878 ldr r0, [r7, #4]
  6878. 8002fbc: f7fe fdba bl 8001b34 <HAL_SPI_MspInit>
  6879. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  6880. }
  6881. hspi->State = HAL_SPI_STATE_BUSY;
  6882. 8002fc0: 687b ldr r3, [r7, #4]
  6883. 8002fc2: 2202 movs r2, #2
  6884. 8002fc4: f883 2051 strb.w r2, [r3, #81] ; 0x51
  6885. /* Disable the selected SPI peripheral */
  6886. __HAL_SPI_DISABLE(hspi);
  6887. 8002fc8: 687b ldr r3, [r7, #4]
  6888. 8002fca: 681b ldr r3, [r3, #0]
  6889. 8002fcc: 681a ldr r2, [r3, #0]
  6890. 8002fce: 687b ldr r3, [r7, #4]
  6891. 8002fd0: 681b ldr r3, [r3, #0]
  6892. 8002fd2: f022 0240 bic.w r2, r2, #64 ; 0x40
  6893. 8002fd6: 601a str r2, [r3, #0]
  6894. /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  6895. /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
  6896. Communication speed, First bit and CRC calculation state */
  6897. WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
  6898. 8002fd8: 687b ldr r3, [r7, #4]
  6899. 8002fda: 685b ldr r3, [r3, #4]
  6900. 8002fdc: f403 7282 and.w r2, r3, #260 ; 0x104
  6901. 8002fe0: 687b ldr r3, [r7, #4]
  6902. 8002fe2: 689b ldr r3, [r3, #8]
  6903. 8002fe4: f403 4304 and.w r3, r3, #33792 ; 0x8400
  6904. 8002fe8: 431a orrs r2, r3
  6905. 8002fea: 687b ldr r3, [r7, #4]
  6906. 8002fec: 68db ldr r3, [r3, #12]
  6907. 8002fee: f403 6300 and.w r3, r3, #2048 ; 0x800
  6908. 8002ff2: 431a orrs r2, r3
  6909. 8002ff4: 687b ldr r3, [r7, #4]
  6910. 8002ff6: 691b ldr r3, [r3, #16]
  6911. 8002ff8: f003 0302 and.w r3, r3, #2
  6912. 8002ffc: 431a orrs r2, r3
  6913. 8002ffe: 687b ldr r3, [r7, #4]
  6914. 8003000: 695b ldr r3, [r3, #20]
  6915. 8003002: f003 0301 and.w r3, r3, #1
  6916. 8003006: 431a orrs r2, r3
  6917. 8003008: 687b ldr r3, [r7, #4]
  6918. 800300a: 699b ldr r3, [r3, #24]
  6919. 800300c: f403 7300 and.w r3, r3, #512 ; 0x200
  6920. 8003010: 431a orrs r2, r3
  6921. 8003012: 687b ldr r3, [r7, #4]
  6922. 8003014: 69db ldr r3, [r3, #28]
  6923. 8003016: f003 0338 and.w r3, r3, #56 ; 0x38
  6924. 800301a: 431a orrs r2, r3
  6925. 800301c: 687b ldr r3, [r7, #4]
  6926. 800301e: 6a1b ldr r3, [r3, #32]
  6927. 8003020: f003 0380 and.w r3, r3, #128 ; 0x80
  6928. 8003024: ea42 0103 orr.w r1, r2, r3
  6929. 8003028: 687b ldr r3, [r7, #4]
  6930. 800302a: 6a9b ldr r3, [r3, #40] ; 0x28
  6931. 800302c: f403 5200 and.w r2, r3, #8192 ; 0x2000
  6932. 8003030: 687b ldr r3, [r7, #4]
  6933. 8003032: 681b ldr r3, [r3, #0]
  6934. 8003034: 430a orrs r2, r1
  6935. 8003036: 601a str r2, [r3, #0]
  6936. (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) |
  6937. (hspi->Init.CRCCalculation & SPI_CR1_CRCEN)));
  6938. #if defined(SPI_CR2_FRF)
  6939. /* Configure : NSS management, TI Mode */
  6940. WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF)));
  6941. 8003038: 687b ldr r3, [r7, #4]
  6942. 800303a: 699b ldr r3, [r3, #24]
  6943. 800303c: 0c1b lsrs r3, r3, #16
  6944. 800303e: f003 0104 and.w r1, r3, #4
  6945. 8003042: 687b ldr r3, [r7, #4]
  6946. 8003044: 6a5b ldr r3, [r3, #36] ; 0x24
  6947. 8003046: f003 0210 and.w r2, r3, #16
  6948. 800304a: 687b ldr r3, [r7, #4]
  6949. 800304c: 681b ldr r3, [r3, #0]
  6950. 800304e: 430a orrs r2, r1
  6951. 8003050: 605a str r2, [r3, #4]
  6952. }
  6953. #endif /* USE_SPI_CRC */
  6954. #if defined(SPI_I2SCFGR_I2SMOD)
  6955. /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
  6956. CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
  6957. 8003052: 687b ldr r3, [r7, #4]
  6958. 8003054: 681b ldr r3, [r3, #0]
  6959. 8003056: 69da ldr r2, [r3, #28]
  6960. 8003058: 687b ldr r3, [r7, #4]
  6961. 800305a: 681b ldr r3, [r3, #0]
  6962. 800305c: f422 6200 bic.w r2, r2, #2048 ; 0x800
  6963. 8003060: 61da str r2, [r3, #28]
  6964. #endif /* SPI_I2SCFGR_I2SMOD */
  6965. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  6966. 8003062: 687b ldr r3, [r7, #4]
  6967. 8003064: 2200 movs r2, #0
  6968. 8003066: 655a str r2, [r3, #84] ; 0x54
  6969. hspi->State = HAL_SPI_STATE_READY;
  6970. 8003068: 687b ldr r3, [r7, #4]
  6971. 800306a: 2201 movs r2, #1
  6972. 800306c: f883 2051 strb.w r2, [r3, #81] ; 0x51
  6973. return HAL_OK;
  6974. 8003070: 2300 movs r3, #0
  6975. }
  6976. 8003072: 4618 mov r0, r3
  6977. 8003074: 3708 adds r7, #8
  6978. 8003076: 46bd mov sp, r7
  6979. 8003078: bd80 pop {r7, pc}
  6980. 0800307a <HAL_SPI_Transmit>:
  6981. * @param Size amount of data to be sent
  6982. * @param Timeout Timeout duration
  6983. * @retval HAL status
  6984. */
  6985. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  6986. {
  6987. 800307a: b580 push {r7, lr}
  6988. 800307c: b088 sub sp, #32
  6989. 800307e: af00 add r7, sp, #0
  6990. 8003080: 60f8 str r0, [r7, #12]
  6991. 8003082: 60b9 str r1, [r7, #8]
  6992. 8003084: 603b str r3, [r7, #0]
  6993. 8003086: 4613 mov r3, r2
  6994. 8003088: 80fb strh r3, [r7, #6]
  6995. uint32_t tickstart;
  6996. HAL_StatusTypeDef errorcode = HAL_OK;
  6997. 800308a: 2300 movs r3, #0
  6998. 800308c: 77fb strb r3, [r7, #31]
  6999. /* Check Direction parameter */
  7000. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  7001. /* Process Locked */
  7002. __HAL_LOCK(hspi);
  7003. 800308e: 68fb ldr r3, [r7, #12]
  7004. 8003090: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
  7005. 8003094: 2b01 cmp r3, #1
  7006. 8003096: d101 bne.n 800309c <HAL_SPI_Transmit+0x22>
  7007. 8003098: 2302 movs r3, #2
  7008. 800309a: e126 b.n 80032ea <HAL_SPI_Transmit+0x270>
  7009. 800309c: 68fb ldr r3, [r7, #12]
  7010. 800309e: 2201 movs r2, #1
  7011. 80030a0: f883 2050 strb.w r2, [r3, #80] ; 0x50
  7012. /* Init tickstart for timeout management*/
  7013. tickstart = HAL_GetTick();
  7014. 80030a4: f7fe fede bl 8001e64 <HAL_GetTick>
  7015. 80030a8: 61b8 str r0, [r7, #24]
  7016. initial_TxXferCount = Size;
  7017. 80030aa: 88fb ldrh r3, [r7, #6]
  7018. 80030ac: 82fb strh r3, [r7, #22]
  7019. if (hspi->State != HAL_SPI_STATE_READY)
  7020. 80030ae: 68fb ldr r3, [r7, #12]
  7021. 80030b0: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
  7022. 80030b4: b2db uxtb r3, r3
  7023. 80030b6: 2b01 cmp r3, #1
  7024. 80030b8: d002 beq.n 80030c0 <HAL_SPI_Transmit+0x46>
  7025. {
  7026. errorcode = HAL_BUSY;
  7027. 80030ba: 2302 movs r3, #2
  7028. 80030bc: 77fb strb r3, [r7, #31]
  7029. goto error;
  7030. 80030be: e10b b.n 80032d8 <HAL_SPI_Transmit+0x25e>
  7031. }
  7032. if ((pData == NULL) || (Size == 0U))
  7033. 80030c0: 68bb ldr r3, [r7, #8]
  7034. 80030c2: 2b00 cmp r3, #0
  7035. 80030c4: d002 beq.n 80030cc <HAL_SPI_Transmit+0x52>
  7036. 80030c6: 88fb ldrh r3, [r7, #6]
  7037. 80030c8: 2b00 cmp r3, #0
  7038. 80030ca: d102 bne.n 80030d2 <HAL_SPI_Transmit+0x58>
  7039. {
  7040. errorcode = HAL_ERROR;
  7041. 80030cc: 2301 movs r3, #1
  7042. 80030ce: 77fb strb r3, [r7, #31]
  7043. goto error;
  7044. 80030d0: e102 b.n 80032d8 <HAL_SPI_Transmit+0x25e>
  7045. }
  7046. /* Set the transaction information */
  7047. hspi->State = HAL_SPI_STATE_BUSY_TX;
  7048. 80030d2: 68fb ldr r3, [r7, #12]
  7049. 80030d4: 2203 movs r2, #3
  7050. 80030d6: f883 2051 strb.w r2, [r3, #81] ; 0x51
  7051. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  7052. 80030da: 68fb ldr r3, [r7, #12]
  7053. 80030dc: 2200 movs r2, #0
  7054. 80030de: 655a str r2, [r3, #84] ; 0x54
  7055. hspi->pTxBuffPtr = (uint8_t *)pData;
  7056. 80030e0: 68fb ldr r3, [r7, #12]
  7057. 80030e2: 68ba ldr r2, [r7, #8]
  7058. 80030e4: 631a str r2, [r3, #48] ; 0x30
  7059. hspi->TxXferSize = Size;
  7060. 80030e6: 68fb ldr r3, [r7, #12]
  7061. 80030e8: 88fa ldrh r2, [r7, #6]
  7062. 80030ea: 869a strh r2, [r3, #52] ; 0x34
  7063. hspi->TxXferCount = Size;
  7064. 80030ec: 68fb ldr r3, [r7, #12]
  7065. 80030ee: 88fa ldrh r2, [r7, #6]
  7066. 80030f0: 86da strh r2, [r3, #54] ; 0x36
  7067. /*Init field not used in handle to zero */
  7068. hspi->pRxBuffPtr = (uint8_t *)NULL;
  7069. 80030f2: 68fb ldr r3, [r7, #12]
  7070. 80030f4: 2200 movs r2, #0
  7071. 80030f6: 639a str r2, [r3, #56] ; 0x38
  7072. hspi->RxXferSize = 0U;
  7073. 80030f8: 68fb ldr r3, [r7, #12]
  7074. 80030fa: 2200 movs r2, #0
  7075. 80030fc: 879a strh r2, [r3, #60] ; 0x3c
  7076. hspi->RxXferCount = 0U;
  7077. 80030fe: 68fb ldr r3, [r7, #12]
  7078. 8003100: 2200 movs r2, #0
  7079. 8003102: 87da strh r2, [r3, #62] ; 0x3e
  7080. hspi->TxISR = NULL;
  7081. 8003104: 68fb ldr r3, [r7, #12]
  7082. 8003106: 2200 movs r2, #0
  7083. 8003108: 645a str r2, [r3, #68] ; 0x44
  7084. hspi->RxISR = NULL;
  7085. 800310a: 68fb ldr r3, [r7, #12]
  7086. 800310c: 2200 movs r2, #0
  7087. 800310e: 641a str r2, [r3, #64] ; 0x40
  7088. /* Configure communication direction : 1Line */
  7089. if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  7090. 8003110: 68fb ldr r3, [r7, #12]
  7091. 8003112: 689b ldr r3, [r3, #8]
  7092. 8003114: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
  7093. 8003118: d10f bne.n 800313a <HAL_SPI_Transmit+0xc0>
  7094. {
  7095. /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  7096. __HAL_SPI_DISABLE(hspi);
  7097. 800311a: 68fb ldr r3, [r7, #12]
  7098. 800311c: 681b ldr r3, [r3, #0]
  7099. 800311e: 681a ldr r2, [r3, #0]
  7100. 8003120: 68fb ldr r3, [r7, #12]
  7101. 8003122: 681b ldr r3, [r3, #0]
  7102. 8003124: f022 0240 bic.w r2, r2, #64 ; 0x40
  7103. 8003128: 601a str r2, [r3, #0]
  7104. SPI_1LINE_TX(hspi);
  7105. 800312a: 68fb ldr r3, [r7, #12]
  7106. 800312c: 681b ldr r3, [r3, #0]
  7107. 800312e: 681a ldr r2, [r3, #0]
  7108. 8003130: 68fb ldr r3, [r7, #12]
  7109. 8003132: 681b ldr r3, [r3, #0]
  7110. 8003134: f442 4280 orr.w r2, r2, #16384 ; 0x4000
  7111. 8003138: 601a str r2, [r3, #0]
  7112. SPI_RESET_CRC(hspi);
  7113. }
  7114. #endif /* USE_SPI_CRC */
  7115. /* Check if the SPI is already enabled */
  7116. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  7117. 800313a: 68fb ldr r3, [r7, #12]
  7118. 800313c: 681b ldr r3, [r3, #0]
  7119. 800313e: 681b ldr r3, [r3, #0]
  7120. 8003140: f003 0340 and.w r3, r3, #64 ; 0x40
  7121. 8003144: 2b40 cmp r3, #64 ; 0x40
  7122. 8003146: d007 beq.n 8003158 <HAL_SPI_Transmit+0xde>
  7123. {
  7124. /* Enable SPI peripheral */
  7125. __HAL_SPI_ENABLE(hspi);
  7126. 8003148: 68fb ldr r3, [r7, #12]
  7127. 800314a: 681b ldr r3, [r3, #0]
  7128. 800314c: 681a ldr r2, [r3, #0]
  7129. 800314e: 68fb ldr r3, [r7, #12]
  7130. 8003150: 681b ldr r3, [r3, #0]
  7131. 8003152: f042 0240 orr.w r2, r2, #64 ; 0x40
  7132. 8003156: 601a str r2, [r3, #0]
  7133. }
  7134. /* Transmit data in 16 Bit mode */
  7135. if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  7136. 8003158: 68fb ldr r3, [r7, #12]
  7137. 800315a: 68db ldr r3, [r3, #12]
  7138. 800315c: f5b3 6f00 cmp.w r3, #2048 ; 0x800
  7139. 8003160: d14b bne.n 80031fa <HAL_SPI_Transmit+0x180>
  7140. {
  7141. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  7142. 8003162: 68fb ldr r3, [r7, #12]
  7143. 8003164: 685b ldr r3, [r3, #4]
  7144. 8003166: 2b00 cmp r3, #0
  7145. 8003168: d002 beq.n 8003170 <HAL_SPI_Transmit+0xf6>
  7146. 800316a: 8afb ldrh r3, [r7, #22]
  7147. 800316c: 2b01 cmp r3, #1
  7148. 800316e: d13e bne.n 80031ee <HAL_SPI_Transmit+0x174>
  7149. {
  7150. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  7151. 8003170: 68fb ldr r3, [r7, #12]
  7152. 8003172: 6b1b ldr r3, [r3, #48] ; 0x30
  7153. 8003174: 881a ldrh r2, [r3, #0]
  7154. 8003176: 68fb ldr r3, [r7, #12]
  7155. 8003178: 681b ldr r3, [r3, #0]
  7156. 800317a: 60da str r2, [r3, #12]
  7157. hspi->pTxBuffPtr += sizeof(uint16_t);
  7158. 800317c: 68fb ldr r3, [r7, #12]
  7159. 800317e: 6b1b ldr r3, [r3, #48] ; 0x30
  7160. 8003180: 1c9a adds r2, r3, #2
  7161. 8003182: 68fb ldr r3, [r7, #12]
  7162. 8003184: 631a str r2, [r3, #48] ; 0x30
  7163. hspi->TxXferCount--;
  7164. 8003186: 68fb ldr r3, [r7, #12]
  7165. 8003188: 8edb ldrh r3, [r3, #54] ; 0x36
  7166. 800318a: b29b uxth r3, r3
  7167. 800318c: 3b01 subs r3, #1
  7168. 800318e: b29a uxth r2, r3
  7169. 8003190: 68fb ldr r3, [r7, #12]
  7170. 8003192: 86da strh r2, [r3, #54] ; 0x36
  7171. }
  7172. /* Transmit data in 16 Bit mode */
  7173. while (hspi->TxXferCount > 0U)
  7174. 8003194: e02b b.n 80031ee <HAL_SPI_Transmit+0x174>
  7175. {
  7176. /* Wait until TXE flag is set to send data */
  7177. if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
  7178. 8003196: 68fb ldr r3, [r7, #12]
  7179. 8003198: 681b ldr r3, [r3, #0]
  7180. 800319a: 689b ldr r3, [r3, #8]
  7181. 800319c: f003 0302 and.w r3, r3, #2
  7182. 80031a0: 2b02 cmp r3, #2
  7183. 80031a2: d112 bne.n 80031ca <HAL_SPI_Transmit+0x150>
  7184. {
  7185. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  7186. 80031a4: 68fb ldr r3, [r7, #12]
  7187. 80031a6: 6b1b ldr r3, [r3, #48] ; 0x30
  7188. 80031a8: 881a ldrh r2, [r3, #0]
  7189. 80031aa: 68fb ldr r3, [r7, #12]
  7190. 80031ac: 681b ldr r3, [r3, #0]
  7191. 80031ae: 60da str r2, [r3, #12]
  7192. hspi->pTxBuffPtr += sizeof(uint16_t);
  7193. 80031b0: 68fb ldr r3, [r7, #12]
  7194. 80031b2: 6b1b ldr r3, [r3, #48] ; 0x30
  7195. 80031b4: 1c9a adds r2, r3, #2
  7196. 80031b6: 68fb ldr r3, [r7, #12]
  7197. 80031b8: 631a str r2, [r3, #48] ; 0x30
  7198. hspi->TxXferCount--;
  7199. 80031ba: 68fb ldr r3, [r7, #12]
  7200. 80031bc: 8edb ldrh r3, [r3, #54] ; 0x36
  7201. 80031be: b29b uxth r3, r3
  7202. 80031c0: 3b01 subs r3, #1
  7203. 80031c2: b29a uxth r2, r3
  7204. 80031c4: 68fb ldr r3, [r7, #12]
  7205. 80031c6: 86da strh r2, [r3, #54] ; 0x36
  7206. 80031c8: e011 b.n 80031ee <HAL_SPI_Transmit+0x174>
  7207. }
  7208. else
  7209. {
  7210. /* Timeout management */
  7211. if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  7212. 80031ca: f7fe fe4b bl 8001e64 <HAL_GetTick>
  7213. 80031ce: 4602 mov r2, r0
  7214. 80031d0: 69bb ldr r3, [r7, #24]
  7215. 80031d2: 1ad3 subs r3, r2, r3
  7216. 80031d4: 683a ldr r2, [r7, #0]
  7217. 80031d6: 429a cmp r2, r3
  7218. 80031d8: d803 bhi.n 80031e2 <HAL_SPI_Transmit+0x168>
  7219. 80031da: 683b ldr r3, [r7, #0]
  7220. 80031dc: f1b3 3fff cmp.w r3, #4294967295
  7221. 80031e0: d102 bne.n 80031e8 <HAL_SPI_Transmit+0x16e>
  7222. 80031e2: 683b ldr r3, [r7, #0]
  7223. 80031e4: 2b00 cmp r3, #0
  7224. 80031e6: d102 bne.n 80031ee <HAL_SPI_Transmit+0x174>
  7225. {
  7226. errorcode = HAL_TIMEOUT;
  7227. 80031e8: 2303 movs r3, #3
  7228. 80031ea: 77fb strb r3, [r7, #31]
  7229. goto error;
  7230. 80031ec: e074 b.n 80032d8 <HAL_SPI_Transmit+0x25e>
  7231. while (hspi->TxXferCount > 0U)
  7232. 80031ee: 68fb ldr r3, [r7, #12]
  7233. 80031f0: 8edb ldrh r3, [r3, #54] ; 0x36
  7234. 80031f2: b29b uxth r3, r3
  7235. 80031f4: 2b00 cmp r3, #0
  7236. 80031f6: d1ce bne.n 8003196 <HAL_SPI_Transmit+0x11c>
  7237. 80031f8: e04c b.n 8003294 <HAL_SPI_Transmit+0x21a>
  7238. }
  7239. }
  7240. /* Transmit data in 8 Bit mode */
  7241. else
  7242. {
  7243. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  7244. 80031fa: 68fb ldr r3, [r7, #12]
  7245. 80031fc: 685b ldr r3, [r3, #4]
  7246. 80031fe: 2b00 cmp r3, #0
  7247. 8003200: d002 beq.n 8003208 <HAL_SPI_Transmit+0x18e>
  7248. 8003202: 8afb ldrh r3, [r7, #22]
  7249. 8003204: 2b01 cmp r3, #1
  7250. 8003206: d140 bne.n 800328a <HAL_SPI_Transmit+0x210>
  7251. {
  7252. *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  7253. 8003208: 68fb ldr r3, [r7, #12]
  7254. 800320a: 6b1a ldr r2, [r3, #48] ; 0x30
  7255. 800320c: 68fb ldr r3, [r7, #12]
  7256. 800320e: 681b ldr r3, [r3, #0]
  7257. 8003210: 330c adds r3, #12
  7258. 8003212: 7812 ldrb r2, [r2, #0]
  7259. 8003214: 701a strb r2, [r3, #0]
  7260. hspi->pTxBuffPtr += sizeof(uint8_t);
  7261. 8003216: 68fb ldr r3, [r7, #12]
  7262. 8003218: 6b1b ldr r3, [r3, #48] ; 0x30
  7263. 800321a: 1c5a adds r2, r3, #1
  7264. 800321c: 68fb ldr r3, [r7, #12]
  7265. 800321e: 631a str r2, [r3, #48] ; 0x30
  7266. hspi->TxXferCount--;
  7267. 8003220: 68fb ldr r3, [r7, #12]
  7268. 8003222: 8edb ldrh r3, [r3, #54] ; 0x36
  7269. 8003224: b29b uxth r3, r3
  7270. 8003226: 3b01 subs r3, #1
  7271. 8003228: b29a uxth r2, r3
  7272. 800322a: 68fb ldr r3, [r7, #12]
  7273. 800322c: 86da strh r2, [r3, #54] ; 0x36
  7274. }
  7275. while (hspi->TxXferCount > 0U)
  7276. 800322e: e02c b.n 800328a <HAL_SPI_Transmit+0x210>
  7277. {
  7278. /* Wait until TXE flag is set to send data */
  7279. if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
  7280. 8003230: 68fb ldr r3, [r7, #12]
  7281. 8003232: 681b ldr r3, [r3, #0]
  7282. 8003234: 689b ldr r3, [r3, #8]
  7283. 8003236: f003 0302 and.w r3, r3, #2
  7284. 800323a: 2b02 cmp r3, #2
  7285. 800323c: d113 bne.n 8003266 <HAL_SPI_Transmit+0x1ec>
  7286. {
  7287. *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  7288. 800323e: 68fb ldr r3, [r7, #12]
  7289. 8003240: 6b1a ldr r2, [r3, #48] ; 0x30
  7290. 8003242: 68fb ldr r3, [r7, #12]
  7291. 8003244: 681b ldr r3, [r3, #0]
  7292. 8003246: 330c adds r3, #12
  7293. 8003248: 7812 ldrb r2, [r2, #0]
  7294. 800324a: 701a strb r2, [r3, #0]
  7295. hspi->pTxBuffPtr += sizeof(uint8_t);
  7296. 800324c: 68fb ldr r3, [r7, #12]
  7297. 800324e: 6b1b ldr r3, [r3, #48] ; 0x30
  7298. 8003250: 1c5a adds r2, r3, #1
  7299. 8003252: 68fb ldr r3, [r7, #12]
  7300. 8003254: 631a str r2, [r3, #48] ; 0x30
  7301. hspi->TxXferCount--;
  7302. 8003256: 68fb ldr r3, [r7, #12]
  7303. 8003258: 8edb ldrh r3, [r3, #54] ; 0x36
  7304. 800325a: b29b uxth r3, r3
  7305. 800325c: 3b01 subs r3, #1
  7306. 800325e: b29a uxth r2, r3
  7307. 8003260: 68fb ldr r3, [r7, #12]
  7308. 8003262: 86da strh r2, [r3, #54] ; 0x36
  7309. 8003264: e011 b.n 800328a <HAL_SPI_Transmit+0x210>
  7310. }
  7311. else
  7312. {
  7313. /* Timeout management */
  7314. if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  7315. 8003266: f7fe fdfd bl 8001e64 <HAL_GetTick>
  7316. 800326a: 4602 mov r2, r0
  7317. 800326c: 69bb ldr r3, [r7, #24]
  7318. 800326e: 1ad3 subs r3, r2, r3
  7319. 8003270: 683a ldr r2, [r7, #0]
  7320. 8003272: 429a cmp r2, r3
  7321. 8003274: d803 bhi.n 800327e <HAL_SPI_Transmit+0x204>
  7322. 8003276: 683b ldr r3, [r7, #0]
  7323. 8003278: f1b3 3fff cmp.w r3, #4294967295
  7324. 800327c: d102 bne.n 8003284 <HAL_SPI_Transmit+0x20a>
  7325. 800327e: 683b ldr r3, [r7, #0]
  7326. 8003280: 2b00 cmp r3, #0
  7327. 8003282: d102 bne.n 800328a <HAL_SPI_Transmit+0x210>
  7328. {
  7329. errorcode = HAL_TIMEOUT;
  7330. 8003284: 2303 movs r3, #3
  7331. 8003286: 77fb strb r3, [r7, #31]
  7332. goto error;
  7333. 8003288: e026 b.n 80032d8 <HAL_SPI_Transmit+0x25e>
  7334. while (hspi->TxXferCount > 0U)
  7335. 800328a: 68fb ldr r3, [r7, #12]
  7336. 800328c: 8edb ldrh r3, [r3, #54] ; 0x36
  7337. 800328e: b29b uxth r3, r3
  7338. 8003290: 2b00 cmp r3, #0
  7339. 8003292: d1cd bne.n 8003230 <HAL_SPI_Transmit+0x1b6>
  7340. SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  7341. }
  7342. #endif /* USE_SPI_CRC */
  7343. /* Check the end of the transaction */
  7344. if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  7345. 8003294: 69ba ldr r2, [r7, #24]
  7346. 8003296: 6839 ldr r1, [r7, #0]
  7347. 8003298: 68f8 ldr r0, [r7, #12]
  7348. 800329a: f000 fa55 bl 8003748 <SPI_EndRxTxTransaction>
  7349. 800329e: 4603 mov r3, r0
  7350. 80032a0: 2b00 cmp r3, #0
  7351. 80032a2: d002 beq.n 80032aa <HAL_SPI_Transmit+0x230>
  7352. {
  7353. hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  7354. 80032a4: 68fb ldr r3, [r7, #12]
  7355. 80032a6: 2220 movs r2, #32
  7356. 80032a8: 655a str r2, [r3, #84] ; 0x54
  7357. }
  7358. /* Clear overrun flag in 2 Lines communication mode because received is not read */
  7359. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  7360. 80032aa: 68fb ldr r3, [r7, #12]
  7361. 80032ac: 689b ldr r3, [r3, #8]
  7362. 80032ae: 2b00 cmp r3, #0
  7363. 80032b0: d10a bne.n 80032c8 <HAL_SPI_Transmit+0x24e>
  7364. {
  7365. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  7366. 80032b2: 2300 movs r3, #0
  7367. 80032b4: 613b str r3, [r7, #16]
  7368. 80032b6: 68fb ldr r3, [r7, #12]
  7369. 80032b8: 681b ldr r3, [r3, #0]
  7370. 80032ba: 68db ldr r3, [r3, #12]
  7371. 80032bc: 613b str r3, [r7, #16]
  7372. 80032be: 68fb ldr r3, [r7, #12]
  7373. 80032c0: 681b ldr r3, [r3, #0]
  7374. 80032c2: 689b ldr r3, [r3, #8]
  7375. 80032c4: 613b str r3, [r7, #16]
  7376. 80032c6: 693b ldr r3, [r7, #16]
  7377. }
  7378. if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  7379. 80032c8: 68fb ldr r3, [r7, #12]
  7380. 80032ca: 6d5b ldr r3, [r3, #84] ; 0x54
  7381. 80032cc: 2b00 cmp r3, #0
  7382. 80032ce: d002 beq.n 80032d6 <HAL_SPI_Transmit+0x25c>
  7383. {
  7384. errorcode = HAL_ERROR;
  7385. 80032d0: 2301 movs r3, #1
  7386. 80032d2: 77fb strb r3, [r7, #31]
  7387. 80032d4: e000 b.n 80032d8 <HAL_SPI_Transmit+0x25e>
  7388. }
  7389. error:
  7390. 80032d6: bf00 nop
  7391. hspi->State = HAL_SPI_STATE_READY;
  7392. 80032d8: 68fb ldr r3, [r7, #12]
  7393. 80032da: 2201 movs r2, #1
  7394. 80032dc: f883 2051 strb.w r2, [r3, #81] ; 0x51
  7395. /* Process Unlocked */
  7396. __HAL_UNLOCK(hspi);
  7397. 80032e0: 68fb ldr r3, [r7, #12]
  7398. 80032e2: 2200 movs r2, #0
  7399. 80032e4: f883 2050 strb.w r2, [r3, #80] ; 0x50
  7400. return errorcode;
  7401. 80032e8: 7ffb ldrb r3, [r7, #31]
  7402. }
  7403. 80032ea: 4618 mov r0, r3
  7404. 80032ec: 3720 adds r7, #32
  7405. 80032ee: 46bd mov sp, r7
  7406. 80032f0: bd80 pop {r7, pc}
  7407. 080032f2 <HAL_SPI_TransmitReceive>:
  7408. * @param Timeout Timeout duration
  7409. * @retval HAL status
  7410. */
  7411. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
  7412. uint32_t Timeout)
  7413. {
  7414. 80032f2: b580 push {r7, lr}
  7415. 80032f4: b08c sub sp, #48 ; 0x30
  7416. 80032f6: af00 add r7, sp, #0
  7417. 80032f8: 60f8 str r0, [r7, #12]
  7418. 80032fa: 60b9 str r1, [r7, #8]
  7419. 80032fc: 607a str r2, [r7, #4]
  7420. 80032fe: 807b strh r3, [r7, #2]
  7421. uint32_t tmp_mode;
  7422. HAL_SPI_StateTypeDef tmp_state;
  7423. uint32_t tickstart;
  7424. /* Variable used to alternate Rx and Tx during transfer */
  7425. uint32_t txallowed = 1U;
  7426. 8003300: 2301 movs r3, #1
  7427. 8003302: 62fb str r3, [r7, #44] ; 0x2c
  7428. HAL_StatusTypeDef errorcode = HAL_OK;
  7429. 8003304: 2300 movs r3, #0
  7430. 8003306: f887 302b strb.w r3, [r7, #43] ; 0x2b
  7431. /* Check Direction parameter */
  7432. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  7433. /* Process Locked */
  7434. __HAL_LOCK(hspi);
  7435. 800330a: 68fb ldr r3, [r7, #12]
  7436. 800330c: f893 3050 ldrb.w r3, [r3, #80] ; 0x50
  7437. 8003310: 2b01 cmp r3, #1
  7438. 8003312: d101 bne.n 8003318 <HAL_SPI_TransmitReceive+0x26>
  7439. 8003314: 2302 movs r3, #2
  7440. 8003316: e18a b.n 800362e <HAL_SPI_TransmitReceive+0x33c>
  7441. 8003318: 68fb ldr r3, [r7, #12]
  7442. 800331a: 2201 movs r2, #1
  7443. 800331c: f883 2050 strb.w r2, [r3, #80] ; 0x50
  7444. /* Init tickstart for timeout management*/
  7445. tickstart = HAL_GetTick();
  7446. 8003320: f7fe fda0 bl 8001e64 <HAL_GetTick>
  7447. 8003324: 6278 str r0, [r7, #36] ; 0x24
  7448. /* Init temporary variables */
  7449. tmp_state = hspi->State;
  7450. 8003326: 68fb ldr r3, [r7, #12]
  7451. 8003328: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
  7452. 800332c: f887 3023 strb.w r3, [r7, #35] ; 0x23
  7453. tmp_mode = hspi->Init.Mode;
  7454. 8003330: 68fb ldr r3, [r7, #12]
  7455. 8003332: 685b ldr r3, [r3, #4]
  7456. 8003334: 61fb str r3, [r7, #28]
  7457. initial_TxXferCount = Size;
  7458. 8003336: 887b ldrh r3, [r7, #2]
  7459. 8003338: 837b strh r3, [r7, #26]
  7460. if (!((tmp_state == HAL_SPI_STATE_READY) || \
  7461. 800333a: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
  7462. 800333e: 2b01 cmp r3, #1
  7463. 8003340: d00f beq.n 8003362 <HAL_SPI_TransmitReceive+0x70>
  7464. 8003342: 69fb ldr r3, [r7, #28]
  7465. 8003344: f5b3 7f82 cmp.w r3, #260 ; 0x104
  7466. 8003348: d107 bne.n 800335a <HAL_SPI_TransmitReceive+0x68>
  7467. ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
  7468. 800334a: 68fb ldr r3, [r7, #12]
  7469. 800334c: 689b ldr r3, [r3, #8]
  7470. 800334e: 2b00 cmp r3, #0
  7471. 8003350: d103 bne.n 800335a <HAL_SPI_TransmitReceive+0x68>
  7472. 8003352: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
  7473. 8003356: 2b04 cmp r3, #4
  7474. 8003358: d003 beq.n 8003362 <HAL_SPI_TransmitReceive+0x70>
  7475. {
  7476. errorcode = HAL_BUSY;
  7477. 800335a: 2302 movs r3, #2
  7478. 800335c: f887 302b strb.w r3, [r7, #43] ; 0x2b
  7479. goto error;
  7480. 8003360: e15b b.n 800361a <HAL_SPI_TransmitReceive+0x328>
  7481. }
  7482. if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
  7483. 8003362: 68bb ldr r3, [r7, #8]
  7484. 8003364: 2b00 cmp r3, #0
  7485. 8003366: d005 beq.n 8003374 <HAL_SPI_TransmitReceive+0x82>
  7486. 8003368: 687b ldr r3, [r7, #4]
  7487. 800336a: 2b00 cmp r3, #0
  7488. 800336c: d002 beq.n 8003374 <HAL_SPI_TransmitReceive+0x82>
  7489. 800336e: 887b ldrh r3, [r7, #2]
  7490. 8003370: 2b00 cmp r3, #0
  7491. 8003372: d103 bne.n 800337c <HAL_SPI_TransmitReceive+0x8a>
  7492. {
  7493. errorcode = HAL_ERROR;
  7494. 8003374: 2301 movs r3, #1
  7495. 8003376: f887 302b strb.w r3, [r7, #43] ; 0x2b
  7496. goto error;
  7497. 800337a: e14e b.n 800361a <HAL_SPI_TransmitReceive+0x328>
  7498. }
  7499. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  7500. if (hspi->State != HAL_SPI_STATE_BUSY_RX)
  7501. 800337c: 68fb ldr r3, [r7, #12]
  7502. 800337e: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
  7503. 8003382: b2db uxtb r3, r3
  7504. 8003384: 2b04 cmp r3, #4
  7505. 8003386: d003 beq.n 8003390 <HAL_SPI_TransmitReceive+0x9e>
  7506. {
  7507. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  7508. 8003388: 68fb ldr r3, [r7, #12]
  7509. 800338a: 2205 movs r2, #5
  7510. 800338c: f883 2051 strb.w r2, [r3, #81] ; 0x51
  7511. }
  7512. /* Set the transaction information */
  7513. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  7514. 8003390: 68fb ldr r3, [r7, #12]
  7515. 8003392: 2200 movs r2, #0
  7516. 8003394: 655a str r2, [r3, #84] ; 0x54
  7517. hspi->pRxBuffPtr = (uint8_t *)pRxData;
  7518. 8003396: 68fb ldr r3, [r7, #12]
  7519. 8003398: 687a ldr r2, [r7, #4]
  7520. 800339a: 639a str r2, [r3, #56] ; 0x38
  7521. hspi->RxXferCount = Size;
  7522. 800339c: 68fb ldr r3, [r7, #12]
  7523. 800339e: 887a ldrh r2, [r7, #2]
  7524. 80033a0: 87da strh r2, [r3, #62] ; 0x3e
  7525. hspi->RxXferSize = Size;
  7526. 80033a2: 68fb ldr r3, [r7, #12]
  7527. 80033a4: 887a ldrh r2, [r7, #2]
  7528. 80033a6: 879a strh r2, [r3, #60] ; 0x3c
  7529. hspi->pTxBuffPtr = (uint8_t *)pTxData;
  7530. 80033a8: 68fb ldr r3, [r7, #12]
  7531. 80033aa: 68ba ldr r2, [r7, #8]
  7532. 80033ac: 631a str r2, [r3, #48] ; 0x30
  7533. hspi->TxXferCount = Size;
  7534. 80033ae: 68fb ldr r3, [r7, #12]
  7535. 80033b0: 887a ldrh r2, [r7, #2]
  7536. 80033b2: 86da strh r2, [r3, #54] ; 0x36
  7537. hspi->TxXferSize = Size;
  7538. 80033b4: 68fb ldr r3, [r7, #12]
  7539. 80033b6: 887a ldrh r2, [r7, #2]
  7540. 80033b8: 869a strh r2, [r3, #52] ; 0x34
  7541. /*Init field not used in handle to zero */
  7542. hspi->RxISR = NULL;
  7543. 80033ba: 68fb ldr r3, [r7, #12]
  7544. 80033bc: 2200 movs r2, #0
  7545. 80033be: 641a str r2, [r3, #64] ; 0x40
  7546. hspi->TxISR = NULL;
  7547. 80033c0: 68fb ldr r3, [r7, #12]
  7548. 80033c2: 2200 movs r2, #0
  7549. 80033c4: 645a str r2, [r3, #68] ; 0x44
  7550. SPI_RESET_CRC(hspi);
  7551. }
  7552. #endif /* USE_SPI_CRC */
  7553. /* Check if the SPI is already enabled */
  7554. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  7555. 80033c6: 68fb ldr r3, [r7, #12]
  7556. 80033c8: 681b ldr r3, [r3, #0]
  7557. 80033ca: 681b ldr r3, [r3, #0]
  7558. 80033cc: f003 0340 and.w r3, r3, #64 ; 0x40
  7559. 80033d0: 2b40 cmp r3, #64 ; 0x40
  7560. 80033d2: d007 beq.n 80033e4 <HAL_SPI_TransmitReceive+0xf2>
  7561. {
  7562. /* Enable SPI peripheral */
  7563. __HAL_SPI_ENABLE(hspi);
  7564. 80033d4: 68fb ldr r3, [r7, #12]
  7565. 80033d6: 681b ldr r3, [r3, #0]
  7566. 80033d8: 681a ldr r2, [r3, #0]
  7567. 80033da: 68fb ldr r3, [r7, #12]
  7568. 80033dc: 681b ldr r3, [r3, #0]
  7569. 80033de: f042 0240 orr.w r2, r2, #64 ; 0x40
  7570. 80033e2: 601a str r2, [r3, #0]
  7571. }
  7572. /* Transmit and Receive data in 16 Bit mode */
  7573. if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
  7574. 80033e4: 68fb ldr r3, [r7, #12]
  7575. 80033e6: 68db ldr r3, [r3, #12]
  7576. 80033e8: f5b3 6f00 cmp.w r3, #2048 ; 0x800
  7577. 80033ec: d178 bne.n 80034e0 <HAL_SPI_TransmitReceive+0x1ee>
  7578. {
  7579. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  7580. 80033ee: 68fb ldr r3, [r7, #12]
  7581. 80033f0: 685b ldr r3, [r3, #4]
  7582. 80033f2: 2b00 cmp r3, #0
  7583. 80033f4: d002 beq.n 80033fc <HAL_SPI_TransmitReceive+0x10a>
  7584. 80033f6: 8b7b ldrh r3, [r7, #26]
  7585. 80033f8: 2b01 cmp r3, #1
  7586. 80033fa: d166 bne.n 80034ca <HAL_SPI_TransmitReceive+0x1d8>
  7587. {
  7588. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  7589. 80033fc: 68fb ldr r3, [r7, #12]
  7590. 80033fe: 6b1b ldr r3, [r3, #48] ; 0x30
  7591. 8003400: 881a ldrh r2, [r3, #0]
  7592. 8003402: 68fb ldr r3, [r7, #12]
  7593. 8003404: 681b ldr r3, [r3, #0]
  7594. 8003406: 60da str r2, [r3, #12]
  7595. hspi->pTxBuffPtr += sizeof(uint16_t);
  7596. 8003408: 68fb ldr r3, [r7, #12]
  7597. 800340a: 6b1b ldr r3, [r3, #48] ; 0x30
  7598. 800340c: 1c9a adds r2, r3, #2
  7599. 800340e: 68fb ldr r3, [r7, #12]
  7600. 8003410: 631a str r2, [r3, #48] ; 0x30
  7601. hspi->TxXferCount--;
  7602. 8003412: 68fb ldr r3, [r7, #12]
  7603. 8003414: 8edb ldrh r3, [r3, #54] ; 0x36
  7604. 8003416: b29b uxth r3, r3
  7605. 8003418: 3b01 subs r3, #1
  7606. 800341a: b29a uxth r2, r3
  7607. 800341c: 68fb ldr r3, [r7, #12]
  7608. 800341e: 86da strh r2, [r3, #54] ; 0x36
  7609. }
  7610. while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  7611. 8003420: e053 b.n 80034ca <HAL_SPI_TransmitReceive+0x1d8>
  7612. {
  7613. /* Check TXE flag */
  7614. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
  7615. 8003422: 68fb ldr r3, [r7, #12]
  7616. 8003424: 681b ldr r3, [r3, #0]
  7617. 8003426: 689b ldr r3, [r3, #8]
  7618. 8003428: f003 0302 and.w r3, r3, #2
  7619. 800342c: 2b02 cmp r3, #2
  7620. 800342e: d11b bne.n 8003468 <HAL_SPI_TransmitReceive+0x176>
  7621. 8003430: 68fb ldr r3, [r7, #12]
  7622. 8003432: 8edb ldrh r3, [r3, #54] ; 0x36
  7623. 8003434: b29b uxth r3, r3
  7624. 8003436: 2b00 cmp r3, #0
  7625. 8003438: d016 beq.n 8003468 <HAL_SPI_TransmitReceive+0x176>
  7626. 800343a: 6afb ldr r3, [r7, #44] ; 0x2c
  7627. 800343c: 2b01 cmp r3, #1
  7628. 800343e: d113 bne.n 8003468 <HAL_SPI_TransmitReceive+0x176>
  7629. {
  7630. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  7631. 8003440: 68fb ldr r3, [r7, #12]
  7632. 8003442: 6b1b ldr r3, [r3, #48] ; 0x30
  7633. 8003444: 881a ldrh r2, [r3, #0]
  7634. 8003446: 68fb ldr r3, [r7, #12]
  7635. 8003448: 681b ldr r3, [r3, #0]
  7636. 800344a: 60da str r2, [r3, #12]
  7637. hspi->pTxBuffPtr += sizeof(uint16_t);
  7638. 800344c: 68fb ldr r3, [r7, #12]
  7639. 800344e: 6b1b ldr r3, [r3, #48] ; 0x30
  7640. 8003450: 1c9a adds r2, r3, #2
  7641. 8003452: 68fb ldr r3, [r7, #12]
  7642. 8003454: 631a str r2, [r3, #48] ; 0x30
  7643. hspi->TxXferCount--;
  7644. 8003456: 68fb ldr r3, [r7, #12]
  7645. 8003458: 8edb ldrh r3, [r3, #54] ; 0x36
  7646. 800345a: b29b uxth r3, r3
  7647. 800345c: 3b01 subs r3, #1
  7648. 800345e: b29a uxth r2, r3
  7649. 8003460: 68fb ldr r3, [r7, #12]
  7650. 8003462: 86da strh r2, [r3, #54] ; 0x36
  7651. /* Next Data is a reception (Rx). Tx not allowed */
  7652. txallowed = 0U;
  7653. 8003464: 2300 movs r3, #0
  7654. 8003466: 62fb str r3, [r7, #44] ; 0x2c
  7655. }
  7656. #endif /* USE_SPI_CRC */
  7657. }
  7658. /* Check RXNE flag */
  7659. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
  7660. 8003468: 68fb ldr r3, [r7, #12]
  7661. 800346a: 681b ldr r3, [r3, #0]
  7662. 800346c: 689b ldr r3, [r3, #8]
  7663. 800346e: f003 0301 and.w r3, r3, #1
  7664. 8003472: 2b01 cmp r3, #1
  7665. 8003474: d119 bne.n 80034aa <HAL_SPI_TransmitReceive+0x1b8>
  7666. 8003476: 68fb ldr r3, [r7, #12]
  7667. 8003478: 8fdb ldrh r3, [r3, #62] ; 0x3e
  7668. 800347a: b29b uxth r3, r3
  7669. 800347c: 2b00 cmp r3, #0
  7670. 800347e: d014 beq.n 80034aa <HAL_SPI_TransmitReceive+0x1b8>
  7671. {
  7672. *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
  7673. 8003480: 68fb ldr r3, [r7, #12]
  7674. 8003482: 681b ldr r3, [r3, #0]
  7675. 8003484: 68da ldr r2, [r3, #12]
  7676. 8003486: 68fb ldr r3, [r7, #12]
  7677. 8003488: 6b9b ldr r3, [r3, #56] ; 0x38
  7678. 800348a: b292 uxth r2, r2
  7679. 800348c: 801a strh r2, [r3, #0]
  7680. hspi->pRxBuffPtr += sizeof(uint16_t);
  7681. 800348e: 68fb ldr r3, [r7, #12]
  7682. 8003490: 6b9b ldr r3, [r3, #56] ; 0x38
  7683. 8003492: 1c9a adds r2, r3, #2
  7684. 8003494: 68fb ldr r3, [r7, #12]
  7685. 8003496: 639a str r2, [r3, #56] ; 0x38
  7686. hspi->RxXferCount--;
  7687. 8003498: 68fb ldr r3, [r7, #12]
  7688. 800349a: 8fdb ldrh r3, [r3, #62] ; 0x3e
  7689. 800349c: b29b uxth r3, r3
  7690. 800349e: 3b01 subs r3, #1
  7691. 80034a0: b29a uxth r2, r3
  7692. 80034a2: 68fb ldr r3, [r7, #12]
  7693. 80034a4: 87da strh r2, [r3, #62] ; 0x3e
  7694. /* Next Data is a Transmission (Tx). Tx is allowed */
  7695. txallowed = 1U;
  7696. 80034a6: 2301 movs r3, #1
  7697. 80034a8: 62fb str r3, [r7, #44] ; 0x2c
  7698. }
  7699. if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY))
  7700. 80034aa: f7fe fcdb bl 8001e64 <HAL_GetTick>
  7701. 80034ae: 4602 mov r2, r0
  7702. 80034b0: 6a7b ldr r3, [r7, #36] ; 0x24
  7703. 80034b2: 1ad3 subs r3, r2, r3
  7704. 80034b4: 6bba ldr r2, [r7, #56] ; 0x38
  7705. 80034b6: 429a cmp r2, r3
  7706. 80034b8: d807 bhi.n 80034ca <HAL_SPI_TransmitReceive+0x1d8>
  7707. 80034ba: 6bbb ldr r3, [r7, #56] ; 0x38
  7708. 80034bc: f1b3 3fff cmp.w r3, #4294967295
  7709. 80034c0: d003 beq.n 80034ca <HAL_SPI_TransmitReceive+0x1d8>
  7710. {
  7711. errorcode = HAL_TIMEOUT;
  7712. 80034c2: 2303 movs r3, #3
  7713. 80034c4: f887 302b strb.w r3, [r7, #43] ; 0x2b
  7714. goto error;
  7715. 80034c8: e0a7 b.n 800361a <HAL_SPI_TransmitReceive+0x328>
  7716. while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  7717. 80034ca: 68fb ldr r3, [r7, #12]
  7718. 80034cc: 8edb ldrh r3, [r3, #54] ; 0x36
  7719. 80034ce: b29b uxth r3, r3
  7720. 80034d0: 2b00 cmp r3, #0
  7721. 80034d2: d1a6 bne.n 8003422 <HAL_SPI_TransmitReceive+0x130>
  7722. 80034d4: 68fb ldr r3, [r7, #12]
  7723. 80034d6: 8fdb ldrh r3, [r3, #62] ; 0x3e
  7724. 80034d8: b29b uxth r3, r3
  7725. 80034da: 2b00 cmp r3, #0
  7726. 80034dc: d1a1 bne.n 8003422 <HAL_SPI_TransmitReceive+0x130>
  7727. 80034de: e07c b.n 80035da <HAL_SPI_TransmitReceive+0x2e8>
  7728. }
  7729. }
  7730. /* Transmit and Receive data in 8 Bit mode */
  7731. else
  7732. {
  7733. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  7734. 80034e0: 68fb ldr r3, [r7, #12]
  7735. 80034e2: 685b ldr r3, [r3, #4]
  7736. 80034e4: 2b00 cmp r3, #0
  7737. 80034e6: d002 beq.n 80034ee <HAL_SPI_TransmitReceive+0x1fc>
  7738. 80034e8: 8b7b ldrh r3, [r7, #26]
  7739. 80034ea: 2b01 cmp r3, #1
  7740. 80034ec: d16b bne.n 80035c6 <HAL_SPI_TransmitReceive+0x2d4>
  7741. {
  7742. *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  7743. 80034ee: 68fb ldr r3, [r7, #12]
  7744. 80034f0: 6b1a ldr r2, [r3, #48] ; 0x30
  7745. 80034f2: 68fb ldr r3, [r7, #12]
  7746. 80034f4: 681b ldr r3, [r3, #0]
  7747. 80034f6: 330c adds r3, #12
  7748. 80034f8: 7812 ldrb r2, [r2, #0]
  7749. 80034fa: 701a strb r2, [r3, #0]
  7750. hspi->pTxBuffPtr += sizeof(uint8_t);
  7751. 80034fc: 68fb ldr r3, [r7, #12]
  7752. 80034fe: 6b1b ldr r3, [r3, #48] ; 0x30
  7753. 8003500: 1c5a adds r2, r3, #1
  7754. 8003502: 68fb ldr r3, [r7, #12]
  7755. 8003504: 631a str r2, [r3, #48] ; 0x30
  7756. hspi->TxXferCount--;
  7757. 8003506: 68fb ldr r3, [r7, #12]
  7758. 8003508: 8edb ldrh r3, [r3, #54] ; 0x36
  7759. 800350a: b29b uxth r3, r3
  7760. 800350c: 3b01 subs r3, #1
  7761. 800350e: b29a uxth r2, r3
  7762. 8003510: 68fb ldr r3, [r7, #12]
  7763. 8003512: 86da strh r2, [r3, #54] ; 0x36
  7764. }
  7765. while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  7766. 8003514: e057 b.n 80035c6 <HAL_SPI_TransmitReceive+0x2d4>
  7767. {
  7768. /* Check TXE flag */
  7769. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
  7770. 8003516: 68fb ldr r3, [r7, #12]
  7771. 8003518: 681b ldr r3, [r3, #0]
  7772. 800351a: 689b ldr r3, [r3, #8]
  7773. 800351c: f003 0302 and.w r3, r3, #2
  7774. 8003520: 2b02 cmp r3, #2
  7775. 8003522: d11c bne.n 800355e <HAL_SPI_TransmitReceive+0x26c>
  7776. 8003524: 68fb ldr r3, [r7, #12]
  7777. 8003526: 8edb ldrh r3, [r3, #54] ; 0x36
  7778. 8003528: b29b uxth r3, r3
  7779. 800352a: 2b00 cmp r3, #0
  7780. 800352c: d017 beq.n 800355e <HAL_SPI_TransmitReceive+0x26c>
  7781. 800352e: 6afb ldr r3, [r7, #44] ; 0x2c
  7782. 8003530: 2b01 cmp r3, #1
  7783. 8003532: d114 bne.n 800355e <HAL_SPI_TransmitReceive+0x26c>
  7784. {
  7785. *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
  7786. 8003534: 68fb ldr r3, [r7, #12]
  7787. 8003536: 6b1a ldr r2, [r3, #48] ; 0x30
  7788. 8003538: 68fb ldr r3, [r7, #12]
  7789. 800353a: 681b ldr r3, [r3, #0]
  7790. 800353c: 330c adds r3, #12
  7791. 800353e: 7812 ldrb r2, [r2, #0]
  7792. 8003540: 701a strb r2, [r3, #0]
  7793. hspi->pTxBuffPtr++;
  7794. 8003542: 68fb ldr r3, [r7, #12]
  7795. 8003544: 6b1b ldr r3, [r3, #48] ; 0x30
  7796. 8003546: 1c5a adds r2, r3, #1
  7797. 8003548: 68fb ldr r3, [r7, #12]
  7798. 800354a: 631a str r2, [r3, #48] ; 0x30
  7799. hspi->TxXferCount--;
  7800. 800354c: 68fb ldr r3, [r7, #12]
  7801. 800354e: 8edb ldrh r3, [r3, #54] ; 0x36
  7802. 8003550: b29b uxth r3, r3
  7803. 8003552: 3b01 subs r3, #1
  7804. 8003554: b29a uxth r2, r3
  7805. 8003556: 68fb ldr r3, [r7, #12]
  7806. 8003558: 86da strh r2, [r3, #54] ; 0x36
  7807. /* Next Data is a reception (Rx). Tx not allowed */
  7808. txallowed = 0U;
  7809. 800355a: 2300 movs r3, #0
  7810. 800355c: 62fb str r3, [r7, #44] ; 0x2c
  7811. }
  7812. #endif /* USE_SPI_CRC */
  7813. }
  7814. /* Wait until RXNE flag is reset */
  7815. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
  7816. 800355e: 68fb ldr r3, [r7, #12]
  7817. 8003560: 681b ldr r3, [r3, #0]
  7818. 8003562: 689b ldr r3, [r3, #8]
  7819. 8003564: f003 0301 and.w r3, r3, #1
  7820. 8003568: 2b01 cmp r3, #1
  7821. 800356a: d119 bne.n 80035a0 <HAL_SPI_TransmitReceive+0x2ae>
  7822. 800356c: 68fb ldr r3, [r7, #12]
  7823. 800356e: 8fdb ldrh r3, [r3, #62] ; 0x3e
  7824. 8003570: b29b uxth r3, r3
  7825. 8003572: 2b00 cmp r3, #0
  7826. 8003574: d014 beq.n 80035a0 <HAL_SPI_TransmitReceive+0x2ae>
  7827. {
  7828. (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
  7829. 8003576: 68fb ldr r3, [r7, #12]
  7830. 8003578: 681b ldr r3, [r3, #0]
  7831. 800357a: 68da ldr r2, [r3, #12]
  7832. 800357c: 68fb ldr r3, [r7, #12]
  7833. 800357e: 6b9b ldr r3, [r3, #56] ; 0x38
  7834. 8003580: b2d2 uxtb r2, r2
  7835. 8003582: 701a strb r2, [r3, #0]
  7836. hspi->pRxBuffPtr++;
  7837. 8003584: 68fb ldr r3, [r7, #12]
  7838. 8003586: 6b9b ldr r3, [r3, #56] ; 0x38
  7839. 8003588: 1c5a adds r2, r3, #1
  7840. 800358a: 68fb ldr r3, [r7, #12]
  7841. 800358c: 639a str r2, [r3, #56] ; 0x38
  7842. hspi->RxXferCount--;
  7843. 800358e: 68fb ldr r3, [r7, #12]
  7844. 8003590: 8fdb ldrh r3, [r3, #62] ; 0x3e
  7845. 8003592: b29b uxth r3, r3
  7846. 8003594: 3b01 subs r3, #1
  7847. 8003596: b29a uxth r2, r3
  7848. 8003598: 68fb ldr r3, [r7, #12]
  7849. 800359a: 87da strh r2, [r3, #62] ; 0x3e
  7850. /* Next Data is a Transmission (Tx). Tx is allowed */
  7851. txallowed = 1U;
  7852. 800359c: 2301 movs r3, #1
  7853. 800359e: 62fb str r3, [r7, #44] ; 0x2c
  7854. }
  7855. if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
  7856. 80035a0: f7fe fc60 bl 8001e64 <HAL_GetTick>
  7857. 80035a4: 4602 mov r2, r0
  7858. 80035a6: 6a7b ldr r3, [r7, #36] ; 0x24
  7859. 80035a8: 1ad3 subs r3, r2, r3
  7860. 80035aa: 6bba ldr r2, [r7, #56] ; 0x38
  7861. 80035ac: 429a cmp r2, r3
  7862. 80035ae: d803 bhi.n 80035b8 <HAL_SPI_TransmitReceive+0x2c6>
  7863. 80035b0: 6bbb ldr r3, [r7, #56] ; 0x38
  7864. 80035b2: f1b3 3fff cmp.w r3, #4294967295
  7865. 80035b6: d102 bne.n 80035be <HAL_SPI_TransmitReceive+0x2cc>
  7866. 80035b8: 6bbb ldr r3, [r7, #56] ; 0x38
  7867. 80035ba: 2b00 cmp r3, #0
  7868. 80035bc: d103 bne.n 80035c6 <HAL_SPI_TransmitReceive+0x2d4>
  7869. {
  7870. errorcode = HAL_TIMEOUT;
  7871. 80035be: 2303 movs r3, #3
  7872. 80035c0: f887 302b strb.w r3, [r7, #43] ; 0x2b
  7873. goto error;
  7874. 80035c4: e029 b.n 800361a <HAL_SPI_TransmitReceive+0x328>
  7875. while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  7876. 80035c6: 68fb ldr r3, [r7, #12]
  7877. 80035c8: 8edb ldrh r3, [r3, #54] ; 0x36
  7878. 80035ca: b29b uxth r3, r3
  7879. 80035cc: 2b00 cmp r3, #0
  7880. 80035ce: d1a2 bne.n 8003516 <HAL_SPI_TransmitReceive+0x224>
  7881. 80035d0: 68fb ldr r3, [r7, #12]
  7882. 80035d2: 8fdb ldrh r3, [r3, #62] ; 0x3e
  7883. 80035d4: b29b uxth r3, r3
  7884. 80035d6: 2b00 cmp r3, #0
  7885. 80035d8: d19d bne.n 8003516 <HAL_SPI_TransmitReceive+0x224>
  7886. errorcode = HAL_ERROR;
  7887. }
  7888. #endif /* USE_SPI_CRC */
  7889. /* Check the end of the transaction */
  7890. if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  7891. 80035da: 6a7a ldr r2, [r7, #36] ; 0x24
  7892. 80035dc: 6bb9 ldr r1, [r7, #56] ; 0x38
  7893. 80035de: 68f8 ldr r0, [r7, #12]
  7894. 80035e0: f000 f8b2 bl 8003748 <SPI_EndRxTxTransaction>
  7895. 80035e4: 4603 mov r3, r0
  7896. 80035e6: 2b00 cmp r3, #0
  7897. 80035e8: d006 beq.n 80035f8 <HAL_SPI_TransmitReceive+0x306>
  7898. {
  7899. errorcode = HAL_ERROR;
  7900. 80035ea: 2301 movs r3, #1
  7901. 80035ec: f887 302b strb.w r3, [r7, #43] ; 0x2b
  7902. hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  7903. 80035f0: 68fb ldr r3, [r7, #12]
  7904. 80035f2: 2220 movs r2, #32
  7905. 80035f4: 655a str r2, [r3, #84] ; 0x54
  7906. goto error;
  7907. 80035f6: e010 b.n 800361a <HAL_SPI_TransmitReceive+0x328>
  7908. }
  7909. /* Clear overrun flag in 2 Lines communication mode because received is not read */
  7910. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  7911. 80035f8: 68fb ldr r3, [r7, #12]
  7912. 80035fa: 689b ldr r3, [r3, #8]
  7913. 80035fc: 2b00 cmp r3, #0
  7914. 80035fe: d10b bne.n 8003618 <HAL_SPI_TransmitReceive+0x326>
  7915. {
  7916. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  7917. 8003600: 2300 movs r3, #0
  7918. 8003602: 617b str r3, [r7, #20]
  7919. 8003604: 68fb ldr r3, [r7, #12]
  7920. 8003606: 681b ldr r3, [r3, #0]
  7921. 8003608: 68db ldr r3, [r3, #12]
  7922. 800360a: 617b str r3, [r7, #20]
  7923. 800360c: 68fb ldr r3, [r7, #12]
  7924. 800360e: 681b ldr r3, [r3, #0]
  7925. 8003610: 689b ldr r3, [r3, #8]
  7926. 8003612: 617b str r3, [r7, #20]
  7927. 8003614: 697b ldr r3, [r7, #20]
  7928. 8003616: e000 b.n 800361a <HAL_SPI_TransmitReceive+0x328>
  7929. }
  7930. error :
  7931. 8003618: bf00 nop
  7932. hspi->State = HAL_SPI_STATE_READY;
  7933. 800361a: 68fb ldr r3, [r7, #12]
  7934. 800361c: 2201 movs r2, #1
  7935. 800361e: f883 2051 strb.w r2, [r3, #81] ; 0x51
  7936. __HAL_UNLOCK(hspi);
  7937. 8003622: 68fb ldr r3, [r7, #12]
  7938. 8003624: 2200 movs r2, #0
  7939. 8003626: f883 2050 strb.w r2, [r3, #80] ; 0x50
  7940. return errorcode;
  7941. 800362a: f897 302b ldrb.w r3, [r7, #43] ; 0x2b
  7942. }
  7943. 800362e: 4618 mov r0, r3
  7944. 8003630: 3730 adds r7, #48 ; 0x30
  7945. 8003632: 46bd mov sp, r7
  7946. 8003634: bd80 pop {r7, pc}
  7947. ...
  7948. 08003638 <SPI_WaitFlagStateUntilTimeout>:
  7949. * @param Tickstart tick start value
  7950. * @retval HAL status
  7951. */
  7952. static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
  7953. uint32_t Timeout, uint32_t Tickstart)
  7954. {
  7955. 8003638: b580 push {r7, lr}
  7956. 800363a: b088 sub sp, #32
  7957. 800363c: af00 add r7, sp, #0
  7958. 800363e: 60f8 str r0, [r7, #12]
  7959. 8003640: 60b9 str r1, [r7, #8]
  7960. 8003642: 603b str r3, [r7, #0]
  7961. 8003644: 4613 mov r3, r2
  7962. 8003646: 71fb strb r3, [r7, #7]
  7963. __IO uint32_t count;
  7964. uint32_t tmp_timeout;
  7965. uint32_t tmp_tickstart;
  7966. /* Adjust Timeout value in case of end of transfer */
  7967. tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
  7968. 8003648: f7fe fc0c bl 8001e64 <HAL_GetTick>
  7969. 800364c: 4602 mov r2, r0
  7970. 800364e: 6abb ldr r3, [r7, #40] ; 0x28
  7971. 8003650: 1a9b subs r3, r3, r2
  7972. 8003652: 683a ldr r2, [r7, #0]
  7973. 8003654: 4413 add r3, r2
  7974. 8003656: 61fb str r3, [r7, #28]
  7975. tmp_tickstart = HAL_GetTick();
  7976. 8003658: f7fe fc04 bl 8001e64 <HAL_GetTick>
  7977. 800365c: 61b8 str r0, [r7, #24]
  7978. /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
  7979. count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U);
  7980. 800365e: 4b39 ldr r3, [pc, #228] ; (8003744 <SPI_WaitFlagStateUntilTimeout+0x10c>)
  7981. 8003660: 681b ldr r3, [r3, #0]
  7982. 8003662: 015b lsls r3, r3, #5
  7983. 8003664: 0d1b lsrs r3, r3, #20
  7984. 8003666: 69fa ldr r2, [r7, #28]
  7985. 8003668: fb02 f303 mul.w r3, r2, r3
  7986. 800366c: 617b str r3, [r7, #20]
  7987. while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
  7988. 800366e: e054 b.n 800371a <SPI_WaitFlagStateUntilTimeout+0xe2>
  7989. {
  7990. if (Timeout != HAL_MAX_DELAY)
  7991. 8003670: 683b ldr r3, [r7, #0]
  7992. 8003672: f1b3 3fff cmp.w r3, #4294967295
  7993. 8003676: d050 beq.n 800371a <SPI_WaitFlagStateUntilTimeout+0xe2>
  7994. {
  7995. if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
  7996. 8003678: f7fe fbf4 bl 8001e64 <HAL_GetTick>
  7997. 800367c: 4602 mov r2, r0
  7998. 800367e: 69bb ldr r3, [r7, #24]
  7999. 8003680: 1ad3 subs r3, r2, r3
  8000. 8003682: 69fa ldr r2, [r7, #28]
  8001. 8003684: 429a cmp r2, r3
  8002. 8003686: d902 bls.n 800368e <SPI_WaitFlagStateUntilTimeout+0x56>
  8003. 8003688: 69fb ldr r3, [r7, #28]
  8004. 800368a: 2b00 cmp r3, #0
  8005. 800368c: d13d bne.n 800370a <SPI_WaitFlagStateUntilTimeout+0xd2>
  8006. /* Disable the SPI and reset the CRC: the CRC value should be cleared
  8007. on both master and slave sides in order to resynchronize the master
  8008. and slave for their respective CRC calculation */
  8009. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  8010. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  8011. 800368e: 68fb ldr r3, [r7, #12]
  8012. 8003690: 681b ldr r3, [r3, #0]
  8013. 8003692: 685a ldr r2, [r3, #4]
  8014. 8003694: 68fb ldr r3, [r7, #12]
  8015. 8003696: 681b ldr r3, [r3, #0]
  8016. 8003698: f022 02e0 bic.w r2, r2, #224 ; 0xe0
  8017. 800369c: 605a str r2, [r3, #4]
  8018. if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
  8019. 800369e: 68fb ldr r3, [r7, #12]
  8020. 80036a0: 685b ldr r3, [r3, #4]
  8021. 80036a2: f5b3 7f82 cmp.w r3, #260 ; 0x104
  8022. 80036a6: d111 bne.n 80036cc <SPI_WaitFlagStateUntilTimeout+0x94>
  8023. 80036a8: 68fb ldr r3, [r7, #12]
  8024. 80036aa: 689b ldr r3, [r3, #8]
  8025. 80036ac: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
  8026. 80036b0: d004 beq.n 80036bc <SPI_WaitFlagStateUntilTimeout+0x84>
  8027. || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  8028. 80036b2: 68fb ldr r3, [r7, #12]
  8029. 80036b4: 689b ldr r3, [r3, #8]
  8030. 80036b6: f5b3 6f80 cmp.w r3, #1024 ; 0x400
  8031. 80036ba: d107 bne.n 80036cc <SPI_WaitFlagStateUntilTimeout+0x94>
  8032. {
  8033. /* Disable SPI peripheral */
  8034. __HAL_SPI_DISABLE(hspi);
  8035. 80036bc: 68fb ldr r3, [r7, #12]
  8036. 80036be: 681b ldr r3, [r3, #0]
  8037. 80036c0: 681a ldr r2, [r3, #0]
  8038. 80036c2: 68fb ldr r3, [r7, #12]
  8039. 80036c4: 681b ldr r3, [r3, #0]
  8040. 80036c6: f022 0240 bic.w r2, r2, #64 ; 0x40
  8041. 80036ca: 601a str r2, [r3, #0]
  8042. }
  8043. /* Reset CRC Calculation */
  8044. if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  8045. 80036cc: 68fb ldr r3, [r7, #12]
  8046. 80036ce: 6a9b ldr r3, [r3, #40] ; 0x28
  8047. 80036d0: f5b3 5f00 cmp.w r3, #8192 ; 0x2000
  8048. 80036d4: d10f bne.n 80036f6 <SPI_WaitFlagStateUntilTimeout+0xbe>
  8049. {
  8050. SPI_RESET_CRC(hspi);
  8051. 80036d6: 68fb ldr r3, [r7, #12]
  8052. 80036d8: 681b ldr r3, [r3, #0]
  8053. 80036da: 681a ldr r2, [r3, #0]
  8054. 80036dc: 68fb ldr r3, [r7, #12]
  8055. 80036de: 681b ldr r3, [r3, #0]
  8056. 80036e0: f422 5200 bic.w r2, r2, #8192 ; 0x2000
  8057. 80036e4: 601a str r2, [r3, #0]
  8058. 80036e6: 68fb ldr r3, [r7, #12]
  8059. 80036e8: 681b ldr r3, [r3, #0]
  8060. 80036ea: 681a ldr r2, [r3, #0]
  8061. 80036ec: 68fb ldr r3, [r7, #12]
  8062. 80036ee: 681b ldr r3, [r3, #0]
  8063. 80036f0: f442 5200 orr.w r2, r2, #8192 ; 0x2000
  8064. 80036f4: 601a str r2, [r3, #0]
  8065. }
  8066. hspi->State = HAL_SPI_STATE_READY;
  8067. 80036f6: 68fb ldr r3, [r7, #12]
  8068. 80036f8: 2201 movs r2, #1
  8069. 80036fa: f883 2051 strb.w r2, [r3, #81] ; 0x51
  8070. /* Process Unlocked */
  8071. __HAL_UNLOCK(hspi);
  8072. 80036fe: 68fb ldr r3, [r7, #12]
  8073. 8003700: 2200 movs r2, #0
  8074. 8003702: f883 2050 strb.w r2, [r3, #80] ; 0x50
  8075. return HAL_TIMEOUT;
  8076. 8003706: 2303 movs r3, #3
  8077. 8003708: e017 b.n 800373a <SPI_WaitFlagStateUntilTimeout+0x102>
  8078. }
  8079. /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
  8080. if(count == 0U)
  8081. 800370a: 697b ldr r3, [r7, #20]
  8082. 800370c: 2b00 cmp r3, #0
  8083. 800370e: d101 bne.n 8003714 <SPI_WaitFlagStateUntilTimeout+0xdc>
  8084. {
  8085. tmp_timeout = 0U;
  8086. 8003710: 2300 movs r3, #0
  8087. 8003712: 61fb str r3, [r7, #28]
  8088. }
  8089. count--;
  8090. 8003714: 697b ldr r3, [r7, #20]
  8091. 8003716: 3b01 subs r3, #1
  8092. 8003718: 617b str r3, [r7, #20]
  8093. while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
  8094. 800371a: 68fb ldr r3, [r7, #12]
  8095. 800371c: 681b ldr r3, [r3, #0]
  8096. 800371e: 689a ldr r2, [r3, #8]
  8097. 8003720: 68bb ldr r3, [r7, #8]
  8098. 8003722: 4013 ands r3, r2
  8099. 8003724: 68ba ldr r2, [r7, #8]
  8100. 8003726: 429a cmp r2, r3
  8101. 8003728: bf0c ite eq
  8102. 800372a: 2301 moveq r3, #1
  8103. 800372c: 2300 movne r3, #0
  8104. 800372e: b2db uxtb r3, r3
  8105. 8003730: 461a mov r2, r3
  8106. 8003732: 79fb ldrb r3, [r7, #7]
  8107. 8003734: 429a cmp r2, r3
  8108. 8003736: d19b bne.n 8003670 <SPI_WaitFlagStateUntilTimeout+0x38>
  8109. }
  8110. }
  8111. return HAL_OK;
  8112. 8003738: 2300 movs r3, #0
  8113. }
  8114. 800373a: 4618 mov r0, r3
  8115. 800373c: 3720 adds r7, #32
  8116. 800373e: 46bd mov sp, r7
  8117. 8003740: bd80 pop {r7, pc}
  8118. 8003742: bf00 nop
  8119. 8003744: 20000004 .word 0x20000004
  8120. 08003748 <SPI_EndRxTxTransaction>:
  8121. * @param Timeout Timeout duration
  8122. * @param Tickstart tick start value
  8123. * @retval HAL status
  8124. */
  8125. static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
  8126. {
  8127. 8003748: b580 push {r7, lr}
  8128. 800374a: b088 sub sp, #32
  8129. 800374c: af02 add r7, sp, #8
  8130. 800374e: 60f8 str r0, [r7, #12]
  8131. 8003750: 60b9 str r1, [r7, #8]
  8132. 8003752: 607a str r2, [r7, #4]
  8133. /* Timeout in µs */
  8134. __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U);
  8135. 8003754: 4b1b ldr r3, [pc, #108] ; (80037c4 <SPI_EndRxTxTransaction+0x7c>)
  8136. 8003756: 681b ldr r3, [r3, #0]
  8137. 8003758: 4a1b ldr r2, [pc, #108] ; (80037c8 <SPI_EndRxTxTransaction+0x80>)
  8138. 800375a: fba2 2303 umull r2, r3, r2, r3
  8139. 800375e: 0d5b lsrs r3, r3, #21
  8140. 8003760: f44f 727a mov.w r2, #1000 ; 0x3e8
  8141. 8003764: fb02 f303 mul.w r3, r2, r3
  8142. 8003768: 617b str r3, [r7, #20]
  8143. /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
  8144. if (hspi->Init.Mode == SPI_MODE_MASTER)
  8145. 800376a: 68fb ldr r3, [r7, #12]
  8146. 800376c: 685b ldr r3, [r3, #4]
  8147. 800376e: f5b3 7f82 cmp.w r3, #260 ; 0x104
  8148. 8003772: d112 bne.n 800379a <SPI_EndRxTxTransaction+0x52>
  8149. {
  8150. /* Control the BSY flag */
  8151. if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
  8152. 8003774: 687b ldr r3, [r7, #4]
  8153. 8003776: 9300 str r3, [sp, #0]
  8154. 8003778: 68bb ldr r3, [r7, #8]
  8155. 800377a: 2200 movs r2, #0
  8156. 800377c: 2180 movs r1, #128 ; 0x80
  8157. 800377e: 68f8 ldr r0, [r7, #12]
  8158. 8003780: f7ff ff5a bl 8003638 <SPI_WaitFlagStateUntilTimeout>
  8159. 8003784: 4603 mov r3, r0
  8160. 8003786: 2b00 cmp r3, #0
  8161. 8003788: d016 beq.n 80037b8 <SPI_EndRxTxTransaction+0x70>
  8162. {
  8163. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  8164. 800378a: 68fb ldr r3, [r7, #12]
  8165. 800378c: 6d5b ldr r3, [r3, #84] ; 0x54
  8166. 800378e: f043 0220 orr.w r2, r3, #32
  8167. 8003792: 68fb ldr r3, [r7, #12]
  8168. 8003794: 655a str r2, [r3, #84] ; 0x54
  8169. return HAL_TIMEOUT;
  8170. 8003796: 2303 movs r3, #3
  8171. 8003798: e00f b.n 80037ba <SPI_EndRxTxTransaction+0x72>
  8172. * User have to calculate the timeout value to fit with the time of 1 byte transfer.
  8173. * This time is directly link with the SPI clock from Master device.
  8174. */
  8175. do
  8176. {
  8177. if (count == 0U)
  8178. 800379a: 697b ldr r3, [r7, #20]
  8179. 800379c: 2b00 cmp r3, #0
  8180. 800379e: d00a beq.n 80037b6 <SPI_EndRxTxTransaction+0x6e>
  8181. {
  8182. break;
  8183. }
  8184. count--;
  8185. 80037a0: 697b ldr r3, [r7, #20]
  8186. 80037a2: 3b01 subs r3, #1
  8187. 80037a4: 617b str r3, [r7, #20]
  8188. } while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);
  8189. 80037a6: 68fb ldr r3, [r7, #12]
  8190. 80037a8: 681b ldr r3, [r3, #0]
  8191. 80037aa: 689b ldr r3, [r3, #8]
  8192. 80037ac: f003 0380 and.w r3, r3, #128 ; 0x80
  8193. 80037b0: 2b80 cmp r3, #128 ; 0x80
  8194. 80037b2: d0f2 beq.n 800379a <SPI_EndRxTxTransaction+0x52>
  8195. 80037b4: e000 b.n 80037b8 <SPI_EndRxTxTransaction+0x70>
  8196. break;
  8197. 80037b6: bf00 nop
  8198. }
  8199. return HAL_OK;
  8200. 80037b8: 2300 movs r3, #0
  8201. }
  8202. 80037ba: 4618 mov r0, r3
  8203. 80037bc: 3718 adds r7, #24
  8204. 80037be: 46bd mov sp, r7
  8205. 80037c0: bd80 pop {r7, pc}
  8206. 80037c2: bf00 nop
  8207. 80037c4: 20000004 .word 0x20000004
  8208. 80037c8: 165e9f81 .word 0x165e9f81
  8209. 080037cc <HAL_UART_Init>:
  8210. * @param huart Pointer to a UART_HandleTypeDef structure that contains
  8211. * the configuration information for the specified UART module.
  8212. * @retval HAL status
  8213. */
  8214. HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
  8215. {
  8216. 80037cc: b580 push {r7, lr}
  8217. 80037ce: b082 sub sp, #8
  8218. 80037d0: af00 add r7, sp, #0
  8219. 80037d2: 6078 str r0, [r7, #4]
  8220. /* Check the UART handle allocation */
  8221. if (huart == NULL)
  8222. 80037d4: 687b ldr r3, [r7, #4]
  8223. 80037d6: 2b00 cmp r3, #0
  8224. 80037d8: d101 bne.n 80037de <HAL_UART_Init+0x12>
  8225. {
  8226. return HAL_ERROR;
  8227. 80037da: 2301 movs r3, #1
  8228. 80037dc: e03f b.n 800385e <HAL_UART_Init+0x92>
  8229. assert_param(IS_UART_INSTANCE(huart->Instance));
  8230. }
  8231. assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
  8232. assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
  8233. if (huart->gState == HAL_UART_STATE_RESET)
  8234. 80037de: 687b ldr r3, [r7, #4]
  8235. 80037e0: f893 3039 ldrb.w r3, [r3, #57] ; 0x39
  8236. 80037e4: b2db uxtb r3, r3
  8237. 80037e6: 2b00 cmp r3, #0
  8238. 80037e8: d106 bne.n 80037f8 <HAL_UART_Init+0x2c>
  8239. {
  8240. /* Allocate lock resource and initialize it */
  8241. huart->Lock = HAL_UNLOCKED;
  8242. 80037ea: 687b ldr r3, [r7, #4]
  8243. 80037ec: 2200 movs r2, #0
  8244. 80037ee: f883 2038 strb.w r2, [r3, #56] ; 0x38
  8245. /* Init the low level hardware */
  8246. huart->MspInitCallback(huart);
  8247. #else
  8248. /* Init the low level hardware : GPIO, CLOCK */
  8249. HAL_UART_MspInit(huart);
  8250. 80037f2: 6878 ldr r0, [r7, #4]
  8251. 80037f4: f7fe f9e2 bl 8001bbc <HAL_UART_MspInit>
  8252. #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
  8253. }
  8254. huart->gState = HAL_UART_STATE_BUSY;
  8255. 80037f8: 687b ldr r3, [r7, #4]
  8256. 80037fa: 2224 movs r2, #36 ; 0x24
  8257. 80037fc: f883 2039 strb.w r2, [r3, #57] ; 0x39
  8258. /* Disable the peripheral */
  8259. __HAL_UART_DISABLE(huart);
  8260. 8003800: 687b ldr r3, [r7, #4]
  8261. 8003802: 681b ldr r3, [r3, #0]
  8262. 8003804: 68da ldr r2, [r3, #12]
  8263. 8003806: 687b ldr r3, [r7, #4]
  8264. 8003808: 681b ldr r3, [r3, #0]
  8265. 800380a: f422 5200 bic.w r2, r2, #8192 ; 0x2000
  8266. 800380e: 60da str r2, [r3, #12]
  8267. /* Set the UART Communication parameters */
  8268. UART_SetConfig(huart);
  8269. 8003810: 6878 ldr r0, [r7, #4]
  8270. 8003812: f000 f90b bl 8003a2c <UART_SetConfig>
  8271. /* In asynchronous mode, the following bits must be kept cleared:
  8272. - LINEN and CLKEN bits in the USART_CR2 register,
  8273. - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
  8274. CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
  8275. 8003816: 687b ldr r3, [r7, #4]
  8276. 8003818: 681b ldr r3, [r3, #0]
  8277. 800381a: 691a ldr r2, [r3, #16]
  8278. 800381c: 687b ldr r3, [r7, #4]
  8279. 800381e: 681b ldr r3, [r3, #0]
  8280. 8003820: f422 4290 bic.w r2, r2, #18432 ; 0x4800
  8281. 8003824: 611a str r2, [r3, #16]
  8282. CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
  8283. 8003826: 687b ldr r3, [r7, #4]
  8284. 8003828: 681b ldr r3, [r3, #0]
  8285. 800382a: 695a ldr r2, [r3, #20]
  8286. 800382c: 687b ldr r3, [r7, #4]
  8287. 800382e: 681b ldr r3, [r3, #0]
  8288. 8003830: f022 022a bic.w r2, r2, #42 ; 0x2a
  8289. 8003834: 615a str r2, [r3, #20]
  8290. /* Enable the peripheral */
  8291. __HAL_UART_ENABLE(huart);
  8292. 8003836: 687b ldr r3, [r7, #4]
  8293. 8003838: 681b ldr r3, [r3, #0]
  8294. 800383a: 68da ldr r2, [r3, #12]
  8295. 800383c: 687b ldr r3, [r7, #4]
  8296. 800383e: 681b ldr r3, [r3, #0]
  8297. 8003840: f442 5200 orr.w r2, r2, #8192 ; 0x2000
  8298. 8003844: 60da str r2, [r3, #12]
  8299. /* Initialize the UART state */
  8300. huart->ErrorCode = HAL_UART_ERROR_NONE;
  8301. 8003846: 687b ldr r3, [r7, #4]
  8302. 8003848: 2200 movs r2, #0
  8303. 800384a: 63da str r2, [r3, #60] ; 0x3c
  8304. huart->gState = HAL_UART_STATE_READY;
  8305. 800384c: 687b ldr r3, [r7, #4]
  8306. 800384e: 2220 movs r2, #32
  8307. 8003850: f883 2039 strb.w r2, [r3, #57] ; 0x39
  8308. huart->RxState = HAL_UART_STATE_READY;
  8309. 8003854: 687b ldr r3, [r7, #4]
  8310. 8003856: 2220 movs r2, #32
  8311. 8003858: f883 203a strb.w r2, [r3, #58] ; 0x3a
  8312. return HAL_OK;
  8313. 800385c: 2300 movs r3, #0
  8314. }
  8315. 800385e: 4618 mov r0, r3
  8316. 8003860: 3708 adds r7, #8
  8317. 8003862: 46bd mov sp, r7
  8318. 8003864: bd80 pop {r7, pc}
  8319. 08003866 <HAL_UART_Transmit>:
  8320. * @param Size Amount of data elements (u8 or u16) to be sent
  8321. * @param Timeout Timeout duration
  8322. * @retval HAL status
  8323. */
  8324. HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  8325. {
  8326. 8003866: b580 push {r7, lr}
  8327. 8003868: b088 sub sp, #32
  8328. 800386a: af02 add r7, sp, #8
  8329. 800386c: 60f8 str r0, [r7, #12]
  8330. 800386e: 60b9 str r1, [r7, #8]
  8331. 8003870: 603b str r3, [r7, #0]
  8332. 8003872: 4613 mov r3, r2
  8333. 8003874: 80fb strh r3, [r7, #6]
  8334. uint16_t *tmp;
  8335. uint32_t tickstart = 0U;
  8336. 8003876: 2300 movs r3, #0
  8337. 8003878: 617b str r3, [r7, #20]
  8338. /* Check that a Tx process is not already ongoing */
  8339. if (huart->gState == HAL_UART_STATE_READY)
  8340. 800387a: 68fb ldr r3, [r7, #12]
  8341. 800387c: f893 3039 ldrb.w r3, [r3, #57] ; 0x39
  8342. 8003880: b2db uxtb r3, r3
  8343. 8003882: 2b20 cmp r3, #32
  8344. 8003884: f040 8083 bne.w 800398e <HAL_UART_Transmit+0x128>
  8345. {
  8346. if ((pData == NULL) || (Size == 0U))
  8347. 8003888: 68bb ldr r3, [r7, #8]
  8348. 800388a: 2b00 cmp r3, #0
  8349. 800388c: d002 beq.n 8003894 <HAL_UART_Transmit+0x2e>
  8350. 800388e: 88fb ldrh r3, [r7, #6]
  8351. 8003890: 2b00 cmp r3, #0
  8352. 8003892: d101 bne.n 8003898 <HAL_UART_Transmit+0x32>
  8353. {
  8354. return HAL_ERROR;
  8355. 8003894: 2301 movs r3, #1
  8356. 8003896: e07b b.n 8003990 <HAL_UART_Transmit+0x12a>
  8357. }
  8358. /* Process Locked */
  8359. __HAL_LOCK(huart);
  8360. 8003898: 68fb ldr r3, [r7, #12]
  8361. 800389a: f893 3038 ldrb.w r3, [r3, #56] ; 0x38
  8362. 800389e: 2b01 cmp r3, #1
  8363. 80038a0: d101 bne.n 80038a6 <HAL_UART_Transmit+0x40>
  8364. 80038a2: 2302 movs r3, #2
  8365. 80038a4: e074 b.n 8003990 <HAL_UART_Transmit+0x12a>
  8366. 80038a6: 68fb ldr r3, [r7, #12]
  8367. 80038a8: 2201 movs r2, #1
  8368. 80038aa: f883 2038 strb.w r2, [r3, #56] ; 0x38
  8369. huart->ErrorCode = HAL_UART_ERROR_NONE;
  8370. 80038ae: 68fb ldr r3, [r7, #12]
  8371. 80038b0: 2200 movs r2, #0
  8372. 80038b2: 63da str r2, [r3, #60] ; 0x3c
  8373. huart->gState = HAL_UART_STATE_BUSY_TX;
  8374. 80038b4: 68fb ldr r3, [r7, #12]
  8375. 80038b6: 2221 movs r2, #33 ; 0x21
  8376. 80038b8: f883 2039 strb.w r2, [r3, #57] ; 0x39
  8377. /* Init tickstart for timeout managment */
  8378. tickstart = HAL_GetTick();
  8379. 80038bc: f7fe fad2 bl 8001e64 <HAL_GetTick>
  8380. 80038c0: 6178 str r0, [r7, #20]
  8381. huart->TxXferSize = Size;
  8382. 80038c2: 68fb ldr r3, [r7, #12]
  8383. 80038c4: 88fa ldrh r2, [r7, #6]
  8384. 80038c6: 849a strh r2, [r3, #36] ; 0x24
  8385. huart->TxXferCount = Size;
  8386. 80038c8: 68fb ldr r3, [r7, #12]
  8387. 80038ca: 88fa ldrh r2, [r7, #6]
  8388. 80038cc: 84da strh r2, [r3, #38] ; 0x26
  8389. /* Process Unlocked */
  8390. __HAL_UNLOCK(huart);
  8391. 80038ce: 68fb ldr r3, [r7, #12]
  8392. 80038d0: 2200 movs r2, #0
  8393. 80038d2: f883 2038 strb.w r2, [r3, #56] ; 0x38
  8394. while (huart->TxXferCount > 0U)
  8395. 80038d6: e042 b.n 800395e <HAL_UART_Transmit+0xf8>
  8396. {
  8397. huart->TxXferCount--;
  8398. 80038d8: 68fb ldr r3, [r7, #12]
  8399. 80038da: 8cdb ldrh r3, [r3, #38] ; 0x26
  8400. 80038dc: b29b uxth r3, r3
  8401. 80038de: 3b01 subs r3, #1
  8402. 80038e0: b29a uxth r2, r3
  8403. 80038e2: 68fb ldr r3, [r7, #12]
  8404. 80038e4: 84da strh r2, [r3, #38] ; 0x26
  8405. if (huart->Init.WordLength == UART_WORDLENGTH_9B)
  8406. 80038e6: 68fb ldr r3, [r7, #12]
  8407. 80038e8: 689b ldr r3, [r3, #8]
  8408. 80038ea: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
  8409. 80038ee: d122 bne.n 8003936 <HAL_UART_Transmit+0xd0>
  8410. {
  8411. if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  8412. 80038f0: 683b ldr r3, [r7, #0]
  8413. 80038f2: 9300 str r3, [sp, #0]
  8414. 80038f4: 697b ldr r3, [r7, #20]
  8415. 80038f6: 2200 movs r2, #0
  8416. 80038f8: 2180 movs r1, #128 ; 0x80
  8417. 80038fa: 68f8 ldr r0, [r7, #12]
  8418. 80038fc: f000 f84c bl 8003998 <UART_WaitOnFlagUntilTimeout>
  8419. 8003900: 4603 mov r3, r0
  8420. 8003902: 2b00 cmp r3, #0
  8421. 8003904: d001 beq.n 800390a <HAL_UART_Transmit+0xa4>
  8422. {
  8423. return HAL_TIMEOUT;
  8424. 8003906: 2303 movs r3, #3
  8425. 8003908: e042 b.n 8003990 <HAL_UART_Transmit+0x12a>
  8426. }
  8427. tmp = (uint16_t *) pData;
  8428. 800390a: 68bb ldr r3, [r7, #8]
  8429. 800390c: 613b str r3, [r7, #16]
  8430. huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
  8431. 800390e: 693b ldr r3, [r7, #16]
  8432. 8003910: 881b ldrh r3, [r3, #0]
  8433. 8003912: 461a mov r2, r3
  8434. 8003914: 68fb ldr r3, [r7, #12]
  8435. 8003916: 681b ldr r3, [r3, #0]
  8436. 8003918: f3c2 0208 ubfx r2, r2, #0, #9
  8437. 800391c: 605a str r2, [r3, #4]
  8438. if (huart->Init.Parity == UART_PARITY_NONE)
  8439. 800391e: 68fb ldr r3, [r7, #12]
  8440. 8003920: 691b ldr r3, [r3, #16]
  8441. 8003922: 2b00 cmp r3, #0
  8442. 8003924: d103 bne.n 800392e <HAL_UART_Transmit+0xc8>
  8443. {
  8444. pData += 2U;
  8445. 8003926: 68bb ldr r3, [r7, #8]
  8446. 8003928: 3302 adds r3, #2
  8447. 800392a: 60bb str r3, [r7, #8]
  8448. 800392c: e017 b.n 800395e <HAL_UART_Transmit+0xf8>
  8449. }
  8450. else
  8451. {
  8452. pData += 1U;
  8453. 800392e: 68bb ldr r3, [r7, #8]
  8454. 8003930: 3301 adds r3, #1
  8455. 8003932: 60bb str r3, [r7, #8]
  8456. 8003934: e013 b.n 800395e <HAL_UART_Transmit+0xf8>
  8457. }
  8458. }
  8459. else
  8460. {
  8461. if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
  8462. 8003936: 683b ldr r3, [r7, #0]
  8463. 8003938: 9300 str r3, [sp, #0]
  8464. 800393a: 697b ldr r3, [r7, #20]
  8465. 800393c: 2200 movs r2, #0
  8466. 800393e: 2180 movs r1, #128 ; 0x80
  8467. 8003940: 68f8 ldr r0, [r7, #12]
  8468. 8003942: f000 f829 bl 8003998 <UART_WaitOnFlagUntilTimeout>
  8469. 8003946: 4603 mov r3, r0
  8470. 8003948: 2b00 cmp r3, #0
  8471. 800394a: d001 beq.n 8003950 <HAL_UART_Transmit+0xea>
  8472. {
  8473. return HAL_TIMEOUT;
  8474. 800394c: 2303 movs r3, #3
  8475. 800394e: e01f b.n 8003990 <HAL_UART_Transmit+0x12a>
  8476. }
  8477. huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
  8478. 8003950: 68bb ldr r3, [r7, #8]
  8479. 8003952: 1c5a adds r2, r3, #1
  8480. 8003954: 60ba str r2, [r7, #8]
  8481. 8003956: 781a ldrb r2, [r3, #0]
  8482. 8003958: 68fb ldr r3, [r7, #12]
  8483. 800395a: 681b ldr r3, [r3, #0]
  8484. 800395c: 605a str r2, [r3, #4]
  8485. while (huart->TxXferCount > 0U)
  8486. 800395e: 68fb ldr r3, [r7, #12]
  8487. 8003960: 8cdb ldrh r3, [r3, #38] ; 0x26
  8488. 8003962: b29b uxth r3, r3
  8489. 8003964: 2b00 cmp r3, #0
  8490. 8003966: d1b7 bne.n 80038d8 <HAL_UART_Transmit+0x72>
  8491. }
  8492. }
  8493. if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
  8494. 8003968: 683b ldr r3, [r7, #0]
  8495. 800396a: 9300 str r3, [sp, #0]
  8496. 800396c: 697b ldr r3, [r7, #20]
  8497. 800396e: 2200 movs r2, #0
  8498. 8003970: 2140 movs r1, #64 ; 0x40
  8499. 8003972: 68f8 ldr r0, [r7, #12]
  8500. 8003974: f000 f810 bl 8003998 <UART_WaitOnFlagUntilTimeout>
  8501. 8003978: 4603 mov r3, r0
  8502. 800397a: 2b00 cmp r3, #0
  8503. 800397c: d001 beq.n 8003982 <HAL_UART_Transmit+0x11c>
  8504. {
  8505. return HAL_TIMEOUT;
  8506. 800397e: 2303 movs r3, #3
  8507. 8003980: e006 b.n 8003990 <HAL_UART_Transmit+0x12a>
  8508. }
  8509. /* At end of Tx process, restore huart->gState to Ready */
  8510. huart->gState = HAL_UART_STATE_READY;
  8511. 8003982: 68fb ldr r3, [r7, #12]
  8512. 8003984: 2220 movs r2, #32
  8513. 8003986: f883 2039 strb.w r2, [r3, #57] ; 0x39
  8514. return HAL_OK;
  8515. 800398a: 2300 movs r3, #0
  8516. 800398c: e000 b.n 8003990 <HAL_UART_Transmit+0x12a>
  8517. }
  8518. else
  8519. {
  8520. return HAL_BUSY;
  8521. 800398e: 2302 movs r3, #2
  8522. }
  8523. }
  8524. 8003990: 4618 mov r0, r3
  8525. 8003992: 3718 adds r7, #24
  8526. 8003994: 46bd mov sp, r7
  8527. 8003996: bd80 pop {r7, pc}
  8528. 08003998 <UART_WaitOnFlagUntilTimeout>:
  8529. * @param Tickstart Tick start value
  8530. * @param Timeout Timeout duration
  8531. * @retval HAL status
  8532. */
  8533. static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
  8534. {
  8535. 8003998: b580 push {r7, lr}
  8536. 800399a: b084 sub sp, #16
  8537. 800399c: af00 add r7, sp, #0
  8538. 800399e: 60f8 str r0, [r7, #12]
  8539. 80039a0: 60b9 str r1, [r7, #8]
  8540. 80039a2: 603b str r3, [r7, #0]
  8541. 80039a4: 4613 mov r3, r2
  8542. 80039a6: 71fb strb r3, [r7, #7]
  8543. /* Wait until flag is set */
  8544. while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
  8545. 80039a8: e02c b.n 8003a04 <UART_WaitOnFlagUntilTimeout+0x6c>
  8546. {
  8547. /* Check for the Timeout */
  8548. if (Timeout != HAL_MAX_DELAY)
  8549. 80039aa: 69bb ldr r3, [r7, #24]
  8550. 80039ac: f1b3 3fff cmp.w r3, #4294967295
  8551. 80039b0: d028 beq.n 8003a04 <UART_WaitOnFlagUntilTimeout+0x6c>
  8552. {
  8553. if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
  8554. 80039b2: 69bb ldr r3, [r7, #24]
  8555. 80039b4: 2b00 cmp r3, #0
  8556. 80039b6: d007 beq.n 80039c8 <UART_WaitOnFlagUntilTimeout+0x30>
  8557. 80039b8: f7fe fa54 bl 8001e64 <HAL_GetTick>
  8558. 80039bc: 4602 mov r2, r0
  8559. 80039be: 683b ldr r3, [r7, #0]
  8560. 80039c0: 1ad3 subs r3, r2, r3
  8561. 80039c2: 69ba ldr r2, [r7, #24]
  8562. 80039c4: 429a cmp r2, r3
  8563. 80039c6: d21d bcs.n 8003a04 <UART_WaitOnFlagUntilTimeout+0x6c>
  8564. {
  8565. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  8566. CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
  8567. 80039c8: 68fb ldr r3, [r7, #12]
  8568. 80039ca: 681b ldr r3, [r3, #0]
  8569. 80039cc: 68da ldr r2, [r3, #12]
  8570. 80039ce: 68fb ldr r3, [r7, #12]
  8571. 80039d0: 681b ldr r3, [r3, #0]
  8572. 80039d2: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
  8573. 80039d6: 60da str r2, [r3, #12]
  8574. CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
  8575. 80039d8: 68fb ldr r3, [r7, #12]
  8576. 80039da: 681b ldr r3, [r3, #0]
  8577. 80039dc: 695a ldr r2, [r3, #20]
  8578. 80039de: 68fb ldr r3, [r7, #12]
  8579. 80039e0: 681b ldr r3, [r3, #0]
  8580. 80039e2: f022 0201 bic.w r2, r2, #1
  8581. 80039e6: 615a str r2, [r3, #20]
  8582. huart->gState = HAL_UART_STATE_READY;
  8583. 80039e8: 68fb ldr r3, [r7, #12]
  8584. 80039ea: 2220 movs r2, #32
  8585. 80039ec: f883 2039 strb.w r2, [r3, #57] ; 0x39
  8586. huart->RxState = HAL_UART_STATE_READY;
  8587. 80039f0: 68fb ldr r3, [r7, #12]
  8588. 80039f2: 2220 movs r2, #32
  8589. 80039f4: f883 203a strb.w r2, [r3, #58] ; 0x3a
  8590. /* Process Unlocked */
  8591. __HAL_UNLOCK(huart);
  8592. 80039f8: 68fb ldr r3, [r7, #12]
  8593. 80039fa: 2200 movs r2, #0
  8594. 80039fc: f883 2038 strb.w r2, [r3, #56] ; 0x38
  8595. return HAL_TIMEOUT;
  8596. 8003a00: 2303 movs r3, #3
  8597. 8003a02: e00f b.n 8003a24 <UART_WaitOnFlagUntilTimeout+0x8c>
  8598. while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
  8599. 8003a04: 68fb ldr r3, [r7, #12]
  8600. 8003a06: 681b ldr r3, [r3, #0]
  8601. 8003a08: 681a ldr r2, [r3, #0]
  8602. 8003a0a: 68bb ldr r3, [r7, #8]
  8603. 8003a0c: 4013 ands r3, r2
  8604. 8003a0e: 68ba ldr r2, [r7, #8]
  8605. 8003a10: 429a cmp r2, r3
  8606. 8003a12: bf0c ite eq
  8607. 8003a14: 2301 moveq r3, #1
  8608. 8003a16: 2300 movne r3, #0
  8609. 8003a18: b2db uxtb r3, r3
  8610. 8003a1a: 461a mov r2, r3
  8611. 8003a1c: 79fb ldrb r3, [r7, #7]
  8612. 8003a1e: 429a cmp r2, r3
  8613. 8003a20: d0c3 beq.n 80039aa <UART_WaitOnFlagUntilTimeout+0x12>
  8614. }
  8615. }
  8616. }
  8617. return HAL_OK;
  8618. 8003a22: 2300 movs r3, #0
  8619. }
  8620. 8003a24: 4618 mov r0, r3
  8621. 8003a26: 3710 adds r7, #16
  8622. 8003a28: 46bd mov sp, r7
  8623. 8003a2a: bd80 pop {r7, pc}
  8624. 08003a2c <UART_SetConfig>:
  8625. * @param huart Pointer to a UART_HandleTypeDef structure that contains
  8626. * the configuration information for the specified UART module.
  8627. * @retval None
  8628. */
  8629. static void UART_SetConfig(UART_HandleTypeDef *huart)
  8630. {
  8631. 8003a2c: b580 push {r7, lr}
  8632. 8003a2e: b084 sub sp, #16
  8633. 8003a30: af00 add r7, sp, #0
  8634. 8003a32: 6078 str r0, [r7, #4]
  8635. assert_param(IS_UART_MODE(huart->Init.Mode));
  8636. /*-------------------------- USART CR2 Configuration -----------------------*/
  8637. /* Configure the UART Stop Bits: Set STOP[13:12] bits
  8638. according to huart->Init.StopBits value */
  8639. MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
  8640. 8003a34: 687b ldr r3, [r7, #4]
  8641. 8003a36: 681b ldr r3, [r3, #0]
  8642. 8003a38: 691b ldr r3, [r3, #16]
  8643. 8003a3a: f423 5140 bic.w r1, r3, #12288 ; 0x3000
  8644. 8003a3e: 687b ldr r3, [r7, #4]
  8645. 8003a40: 68da ldr r2, [r3, #12]
  8646. 8003a42: 687b ldr r3, [r7, #4]
  8647. 8003a44: 681b ldr r3, [r3, #0]
  8648. 8003a46: 430a orrs r2, r1
  8649. 8003a48: 611a str r2, [r3, #16]
  8650. Set the M bits according to huart->Init.WordLength value
  8651. Set PCE and PS bits according to huart->Init.Parity value
  8652. Set TE and RE bits according to huart->Init.Mode value
  8653. Set OVER8 bit according to huart->Init.OverSampling value */
  8654. tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
  8655. 8003a4a: 687b ldr r3, [r7, #4]
  8656. 8003a4c: 689a ldr r2, [r3, #8]
  8657. 8003a4e: 687b ldr r3, [r7, #4]
  8658. 8003a50: 691b ldr r3, [r3, #16]
  8659. 8003a52: 431a orrs r2, r3
  8660. 8003a54: 687b ldr r3, [r7, #4]
  8661. 8003a56: 695b ldr r3, [r3, #20]
  8662. 8003a58: 431a orrs r2, r3
  8663. 8003a5a: 687b ldr r3, [r7, #4]
  8664. 8003a5c: 69db ldr r3, [r3, #28]
  8665. 8003a5e: 4313 orrs r3, r2
  8666. 8003a60: 60bb str r3, [r7, #8]
  8667. MODIFY_REG(huart->Instance->CR1,
  8668. 8003a62: 687b ldr r3, [r7, #4]
  8669. 8003a64: 681b ldr r3, [r3, #0]
  8670. 8003a66: 68db ldr r3, [r3, #12]
  8671. 8003a68: f423 4316 bic.w r3, r3, #38400 ; 0x9600
  8672. 8003a6c: f023 030c bic.w r3, r3, #12
  8673. 8003a70: 687a ldr r2, [r7, #4]
  8674. 8003a72: 6812 ldr r2, [r2, #0]
  8675. 8003a74: 68b9 ldr r1, [r7, #8]
  8676. 8003a76: 430b orrs r3, r1
  8677. 8003a78: 60d3 str r3, [r2, #12]
  8678. (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
  8679. tmpreg);
  8680. /*-------------------------- USART CR3 Configuration -----------------------*/
  8681. /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  8682. MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
  8683. 8003a7a: 687b ldr r3, [r7, #4]
  8684. 8003a7c: 681b ldr r3, [r3, #0]
  8685. 8003a7e: 695b ldr r3, [r3, #20]
  8686. 8003a80: f423 7140 bic.w r1, r3, #768 ; 0x300
  8687. 8003a84: 687b ldr r3, [r7, #4]
  8688. 8003a86: 699a ldr r2, [r3, #24]
  8689. 8003a88: 687b ldr r3, [r7, #4]
  8690. 8003a8a: 681b ldr r3, [r3, #0]
  8691. 8003a8c: 430a orrs r2, r1
  8692. 8003a8e: 615a str r2, [r3, #20]
  8693. if((huart->Instance == USART1))
  8694. 8003a90: 687b ldr r3, [r7, #4]
  8695. 8003a92: 681b ldr r3, [r3, #0]
  8696. 8003a94: 4a55 ldr r2, [pc, #340] ; (8003bec <UART_SetConfig+0x1c0>)
  8697. 8003a96: 4293 cmp r3, r2
  8698. 8003a98: d103 bne.n 8003aa2 <UART_SetConfig+0x76>
  8699. {
  8700. pclk = HAL_RCC_GetPCLK2Freq();
  8701. 8003a9a: f7ff f9f1 bl 8002e80 <HAL_RCC_GetPCLK2Freq>
  8702. 8003a9e: 60f8 str r0, [r7, #12]
  8703. 8003aa0: e002 b.n 8003aa8 <UART_SetConfig+0x7c>
  8704. }
  8705. else
  8706. {
  8707. pclk = HAL_RCC_GetPCLK1Freq();
  8708. 8003aa2: f7ff f9d9 bl 8002e58 <HAL_RCC_GetPCLK1Freq>
  8709. 8003aa6: 60f8 str r0, [r7, #12]
  8710. }
  8711. /*-------------------------- USART BRR Configuration ---------------------*/
  8712. if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
  8713. 8003aa8: 687b ldr r3, [r7, #4]
  8714. 8003aaa: 69db ldr r3, [r3, #28]
  8715. 8003aac: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
  8716. 8003ab0: d14c bne.n 8003b4c <UART_SetConfig+0x120>
  8717. {
  8718. huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
  8719. 8003ab2: 68fa ldr r2, [r7, #12]
  8720. 8003ab4: 4613 mov r3, r2
  8721. 8003ab6: 009b lsls r3, r3, #2
  8722. 8003ab8: 4413 add r3, r2
  8723. 8003aba: 009a lsls r2, r3, #2
  8724. 8003abc: 441a add r2, r3
  8725. 8003abe: 687b ldr r3, [r7, #4]
  8726. 8003ac0: 685b ldr r3, [r3, #4]
  8727. 8003ac2: 005b lsls r3, r3, #1
  8728. 8003ac4: fbb2 f3f3 udiv r3, r2, r3
  8729. 8003ac8: 4a49 ldr r2, [pc, #292] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8730. 8003aca: fba2 2303 umull r2, r3, r2, r3
  8731. 8003ace: 095b lsrs r3, r3, #5
  8732. 8003ad0: 0119 lsls r1, r3, #4
  8733. 8003ad2: 68fa ldr r2, [r7, #12]
  8734. 8003ad4: 4613 mov r3, r2
  8735. 8003ad6: 009b lsls r3, r3, #2
  8736. 8003ad8: 4413 add r3, r2
  8737. 8003ada: 009a lsls r2, r3, #2
  8738. 8003adc: 441a add r2, r3
  8739. 8003ade: 687b ldr r3, [r7, #4]
  8740. 8003ae0: 685b ldr r3, [r3, #4]
  8741. 8003ae2: 005b lsls r3, r3, #1
  8742. 8003ae4: fbb2 f2f3 udiv r2, r2, r3
  8743. 8003ae8: 4b41 ldr r3, [pc, #260] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8744. 8003aea: fba3 0302 umull r0, r3, r3, r2
  8745. 8003aee: 095b lsrs r3, r3, #5
  8746. 8003af0: 2064 movs r0, #100 ; 0x64
  8747. 8003af2: fb00 f303 mul.w r3, r0, r3
  8748. 8003af6: 1ad3 subs r3, r2, r3
  8749. 8003af8: 00db lsls r3, r3, #3
  8750. 8003afa: 3332 adds r3, #50 ; 0x32
  8751. 8003afc: 4a3c ldr r2, [pc, #240] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8752. 8003afe: fba2 2303 umull r2, r3, r2, r3
  8753. 8003b02: 095b lsrs r3, r3, #5
  8754. 8003b04: 005b lsls r3, r3, #1
  8755. 8003b06: f403 73f8 and.w r3, r3, #496 ; 0x1f0
  8756. 8003b0a: 4419 add r1, r3
  8757. 8003b0c: 68fa ldr r2, [r7, #12]
  8758. 8003b0e: 4613 mov r3, r2
  8759. 8003b10: 009b lsls r3, r3, #2
  8760. 8003b12: 4413 add r3, r2
  8761. 8003b14: 009a lsls r2, r3, #2
  8762. 8003b16: 441a add r2, r3
  8763. 8003b18: 687b ldr r3, [r7, #4]
  8764. 8003b1a: 685b ldr r3, [r3, #4]
  8765. 8003b1c: 005b lsls r3, r3, #1
  8766. 8003b1e: fbb2 f2f3 udiv r2, r2, r3
  8767. 8003b22: 4b33 ldr r3, [pc, #204] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8768. 8003b24: fba3 0302 umull r0, r3, r3, r2
  8769. 8003b28: 095b lsrs r3, r3, #5
  8770. 8003b2a: 2064 movs r0, #100 ; 0x64
  8771. 8003b2c: fb00 f303 mul.w r3, r0, r3
  8772. 8003b30: 1ad3 subs r3, r2, r3
  8773. 8003b32: 00db lsls r3, r3, #3
  8774. 8003b34: 3332 adds r3, #50 ; 0x32
  8775. 8003b36: 4a2e ldr r2, [pc, #184] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8776. 8003b38: fba2 2303 umull r2, r3, r2, r3
  8777. 8003b3c: 095b lsrs r3, r3, #5
  8778. 8003b3e: f003 0207 and.w r2, r3, #7
  8779. 8003b42: 687b ldr r3, [r7, #4]
  8780. 8003b44: 681b ldr r3, [r3, #0]
  8781. 8003b46: 440a add r2, r1
  8782. 8003b48: 609a str r2, [r3, #8]
  8783. }
  8784. else
  8785. {
  8786. huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
  8787. }
  8788. }
  8789. 8003b4a: e04a b.n 8003be2 <UART_SetConfig+0x1b6>
  8790. huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
  8791. 8003b4c: 68fa ldr r2, [r7, #12]
  8792. 8003b4e: 4613 mov r3, r2
  8793. 8003b50: 009b lsls r3, r3, #2
  8794. 8003b52: 4413 add r3, r2
  8795. 8003b54: 009a lsls r2, r3, #2
  8796. 8003b56: 441a add r2, r3
  8797. 8003b58: 687b ldr r3, [r7, #4]
  8798. 8003b5a: 685b ldr r3, [r3, #4]
  8799. 8003b5c: 009b lsls r3, r3, #2
  8800. 8003b5e: fbb2 f3f3 udiv r3, r2, r3
  8801. 8003b62: 4a23 ldr r2, [pc, #140] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8802. 8003b64: fba2 2303 umull r2, r3, r2, r3
  8803. 8003b68: 095b lsrs r3, r3, #5
  8804. 8003b6a: 0119 lsls r1, r3, #4
  8805. 8003b6c: 68fa ldr r2, [r7, #12]
  8806. 8003b6e: 4613 mov r3, r2
  8807. 8003b70: 009b lsls r3, r3, #2
  8808. 8003b72: 4413 add r3, r2
  8809. 8003b74: 009a lsls r2, r3, #2
  8810. 8003b76: 441a add r2, r3
  8811. 8003b78: 687b ldr r3, [r7, #4]
  8812. 8003b7a: 685b ldr r3, [r3, #4]
  8813. 8003b7c: 009b lsls r3, r3, #2
  8814. 8003b7e: fbb2 f2f3 udiv r2, r2, r3
  8815. 8003b82: 4b1b ldr r3, [pc, #108] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8816. 8003b84: fba3 0302 umull r0, r3, r3, r2
  8817. 8003b88: 095b lsrs r3, r3, #5
  8818. 8003b8a: 2064 movs r0, #100 ; 0x64
  8819. 8003b8c: fb00 f303 mul.w r3, r0, r3
  8820. 8003b90: 1ad3 subs r3, r2, r3
  8821. 8003b92: 011b lsls r3, r3, #4
  8822. 8003b94: 3332 adds r3, #50 ; 0x32
  8823. 8003b96: 4a16 ldr r2, [pc, #88] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8824. 8003b98: fba2 2303 umull r2, r3, r2, r3
  8825. 8003b9c: 095b lsrs r3, r3, #5
  8826. 8003b9e: f003 03f0 and.w r3, r3, #240 ; 0xf0
  8827. 8003ba2: 4419 add r1, r3
  8828. 8003ba4: 68fa ldr r2, [r7, #12]
  8829. 8003ba6: 4613 mov r3, r2
  8830. 8003ba8: 009b lsls r3, r3, #2
  8831. 8003baa: 4413 add r3, r2
  8832. 8003bac: 009a lsls r2, r3, #2
  8833. 8003bae: 441a add r2, r3
  8834. 8003bb0: 687b ldr r3, [r7, #4]
  8835. 8003bb2: 685b ldr r3, [r3, #4]
  8836. 8003bb4: 009b lsls r3, r3, #2
  8837. 8003bb6: fbb2 f2f3 udiv r2, r2, r3
  8838. 8003bba: 4b0d ldr r3, [pc, #52] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8839. 8003bbc: fba3 0302 umull r0, r3, r3, r2
  8840. 8003bc0: 095b lsrs r3, r3, #5
  8841. 8003bc2: 2064 movs r0, #100 ; 0x64
  8842. 8003bc4: fb00 f303 mul.w r3, r0, r3
  8843. 8003bc8: 1ad3 subs r3, r2, r3
  8844. 8003bca: 011b lsls r3, r3, #4
  8845. 8003bcc: 3332 adds r3, #50 ; 0x32
  8846. 8003bce: 4a08 ldr r2, [pc, #32] ; (8003bf0 <UART_SetConfig+0x1c4>)
  8847. 8003bd0: fba2 2303 umull r2, r3, r2, r3
  8848. 8003bd4: 095b lsrs r3, r3, #5
  8849. 8003bd6: f003 020f and.w r2, r3, #15
  8850. 8003bda: 687b ldr r3, [r7, #4]
  8851. 8003bdc: 681b ldr r3, [r3, #0]
  8852. 8003bde: 440a add r2, r1
  8853. 8003be0: 609a str r2, [r3, #8]
  8854. }
  8855. 8003be2: bf00 nop
  8856. 8003be4: 3710 adds r7, #16
  8857. 8003be6: 46bd mov sp, r7
  8858. 8003be8: bd80 pop {r7, pc}
  8859. 8003bea: bf00 nop
  8860. 8003bec: 40013800 .word 0x40013800
  8861. 8003bf0: 51eb851f .word 0x51eb851f
  8862. 08003bf4 <MX_FATFS_Init>:
  8863. /* USER CODE BEGIN Variables */
  8864. /* USER CODE END Variables */
  8865. void MX_FATFS_Init(void)
  8866. {
  8867. 8003bf4: b580 push {r7, lr}
  8868. 8003bf6: af00 add r7, sp, #0
  8869. /*## FatFS: Link the USER driver ###########################*/
  8870. retUSER = FATFS_LinkDriver(&USER_Driver, USERPath);
  8871. 8003bf8: 4904 ldr r1, [pc, #16] ; (8003c0c <MX_FATFS_Init+0x18>)
  8872. 8003bfa: 4805 ldr r0, [pc, #20] ; (8003c10 <MX_FATFS_Init+0x1c>)
  8873. 8003bfc: f003 f9ac bl 8006f58 <FATFS_LinkDriver>
  8874. 8003c00: 4603 mov r3, r0
  8875. 8003c02: 461a mov r2, r3
  8876. 8003c04: 4b03 ldr r3, [pc, #12] ; (8003c14 <MX_FATFS_Init+0x20>)
  8877. 8003c06: 701a strb r2, [r3, #0]
  8878. /* USER CODE BEGIN Init */
  8879. /* additional user code for init */
  8880. /* USER CODE END Init */
  8881. }
  8882. 8003c08: bf00 nop
  8883. 8003c0a: bd80 pop {r7, pc}
  8884. 8003c0c: 20002468 .word 0x20002468
  8885. 8003c10: 20000010 .word 0x20000010
  8886. 8003c14: 2000246c .word 0x2000246c
  8887. 08003c18 <get_fattime>:
  8888. * @brief Gets Time from RTC
  8889. * @param None
  8890. * @retval Time in DWORD
  8891. */
  8892. DWORD get_fattime(void)
  8893. {
  8894. 8003c18: b480 push {r7}
  8895. 8003c1a: af00 add r7, sp, #0
  8896. /* USER CODE BEGIN get_fattime */
  8897. return 0;
  8898. 8003c1c: 2300 movs r3, #0
  8899. /* USER CODE END get_fattime */
  8900. }
  8901. 8003c1e: 4618 mov r0, r3
  8902. 8003c20: 46bd mov sp, r7
  8903. 8003c22: bc80 pop {r7}
  8904. 8003c24: 4770 bx lr
  8905. 08003c26 <USER_initialize>:
  8906. * @retval DSTATUS: Operation status
  8907. */
  8908. DSTATUS USER_initialize (
  8909. BYTE pdrv /* Physical drive nmuber to identify the drive */
  8910. )
  8911. {
  8912. 8003c26: b580 push {r7, lr}
  8913. 8003c28: b082 sub sp, #8
  8914. 8003c2a: af00 add r7, sp, #0
  8915. 8003c2c: 4603 mov r3, r0
  8916. 8003c2e: 71fb strb r3, [r7, #7]
  8917. /* USER CODE BEGIN INIT */
  8918. //Stat = STA_NOINIT;
  8919. //return Stat;
  8920. SD_disk_initialize (pdrv);
  8921. 8003c30: 79fb ldrb r3, [r7, #7]
  8922. 8003c32: 4618 mov r0, r3
  8923. 8003c34: f7fd f9cc bl 8000fd0 <SD_disk_initialize>
  8924. /* USER CODE END INIT */
  8925. }
  8926. 8003c38: bf00 nop
  8927. 8003c3a: 4618 mov r0, r3
  8928. 8003c3c: 3708 adds r7, #8
  8929. 8003c3e: 46bd mov sp, r7
  8930. 8003c40: bd80 pop {r7, pc}
  8931. 08003c42 <USER_status>:
  8932. * @retval DSTATUS: Operation status
  8933. */
  8934. DSTATUS USER_status (
  8935. BYTE pdrv /* Physical drive number to identify the drive */
  8936. )
  8937. {
  8938. 8003c42: b580 push {r7, lr}
  8939. 8003c44: b082 sub sp, #8
  8940. 8003c46: af00 add r7, sp, #0
  8941. 8003c48: 4603 mov r3, r0
  8942. 8003c4a: 71fb strb r3, [r7, #7]
  8943. /* USER CODE BEGIN STATUS */
  8944. //Stat = STA_NOINIT;
  8945. //return Stat;
  8946. SD_disk_status (pdrv);
  8947. 8003c4c: 79fb ldrb r3, [r7, #7]
  8948. 8003c4e: 4618 mov r0, r3
  8949. 8003c50: f7fd faa4 bl 800119c <SD_disk_status>
  8950. /* USER CODE END STATUS */
  8951. }
  8952. 8003c54: bf00 nop
  8953. 8003c56: 4618 mov r0, r3
  8954. 8003c58: 3708 adds r7, #8
  8955. 8003c5a: 46bd mov sp, r7
  8956. 8003c5c: bd80 pop {r7, pc}
  8957. 08003c5e <USER_read>:
  8958. BYTE pdrv, /* Physical drive nmuber to identify the drive */
  8959. BYTE *buff, /* Data buffer to store read data */
  8960. DWORD sector, /* Sector address in LBA */
  8961. UINT count /* Number of sectors to read */
  8962. )
  8963. {
  8964. 8003c5e: b580 push {r7, lr}
  8965. 8003c60: b084 sub sp, #16
  8966. 8003c62: af00 add r7, sp, #0
  8967. 8003c64: 60b9 str r1, [r7, #8]
  8968. 8003c66: 607a str r2, [r7, #4]
  8969. 8003c68: 603b str r3, [r7, #0]
  8970. 8003c6a: 4603 mov r3, r0
  8971. 8003c6c: 73fb strb r3, [r7, #15]
  8972. /* USER CODE BEGIN READ */
  8973. //return RES_OK;
  8974. SD_disk_read (pdrv, buff, sector, count);
  8975. 8003c6e: 7bf8 ldrb r0, [r7, #15]
  8976. 8003c70: 683b ldr r3, [r7, #0]
  8977. 8003c72: 687a ldr r2, [r7, #4]
  8978. 8003c74: 68b9 ldr r1, [r7, #8]
  8979. 8003c76: f7fd faa5 bl 80011c4 <SD_disk_read>
  8980. /* USER CODE END READ */
  8981. }
  8982. 8003c7a: bf00 nop
  8983. 8003c7c: 4618 mov r0, r3
  8984. 8003c7e: 3710 adds r7, #16
  8985. 8003c80: 46bd mov sp, r7
  8986. 8003c82: bd80 pop {r7, pc}
  8987. 08003c84 <USER_write>:
  8988. BYTE pdrv, /* Physical drive nmuber to identify the drive */
  8989. const BYTE *buff, /* Data to be written */
  8990. DWORD sector, /* Sector address in LBA */
  8991. UINT count /* Number of sectors to write */
  8992. )
  8993. {
  8994. 8003c84: b580 push {r7, lr}
  8995. 8003c86: b084 sub sp, #16
  8996. 8003c88: af00 add r7, sp, #0
  8997. 8003c8a: 60b9 str r1, [r7, #8]
  8998. 8003c8c: 607a str r2, [r7, #4]
  8999. 8003c8e: 603b str r3, [r7, #0]
  9000. 8003c90: 4603 mov r3, r0
  9001. 8003c92: 73fb strb r3, [r7, #15]
  9002. /* USER CODE BEGIN WRITE */
  9003. /* USER CODE HERE */
  9004. //return RES_OK;
  9005. SD_disk_write (pdrv, buff, sector, count);
  9006. 8003c94: 7bf8 ldrb r0, [r7, #15]
  9007. 8003c96: 683b ldr r3, [r7, #0]
  9008. 8003c98: 687a ldr r2, [r7, #4]
  9009. 8003c9a: 68b9 ldr r1, [r7, #8]
  9010. 8003c9c: f7fd fafc bl 8001298 <SD_disk_write>
  9011. /* USER CODE END WRITE */
  9012. }
  9013. 8003ca0: bf00 nop
  9014. 8003ca2: 4618 mov r0, r3
  9015. 8003ca4: 3710 adds r7, #16
  9016. 8003ca6: 46bd mov sp, r7
  9017. 8003ca8: bd80 pop {r7, pc}
  9018. 08003caa <USER_ioctl>:
  9019. DRESULT USER_ioctl (
  9020. BYTE pdrv, /* Physical drive nmuber (0..) */
  9021. BYTE cmd, /* Control code */
  9022. void *buff /* Buffer to send/receive control data */
  9023. )
  9024. {
  9025. 8003caa: b580 push {r7, lr}
  9026. 8003cac: b082 sub sp, #8
  9027. 8003cae: af00 add r7, sp, #0
  9028. 8003cb0: 4603 mov r3, r0
  9029. 8003cb2: 603a str r2, [r7, #0]
  9030. 8003cb4: 71fb strb r3, [r7, #7]
  9031. 8003cb6: 460b mov r3, r1
  9032. 8003cb8: 71bb strb r3, [r7, #6]
  9033. /* USER CODE BEGIN IOCTL */
  9034. //DRESULT res = RES_ERROR;
  9035. //return res;
  9036. SD_disk_ioctl (pdrv, cmd, buff);
  9037. 8003cba: 79fb ldrb r3, [r7, #7]
  9038. 8003cbc: 79b9 ldrb r1, [r7, #6]
  9039. 8003cbe: 683a ldr r2, [r7, #0]
  9040. 8003cc0: 4618 mov r0, r3
  9041. 8003cc2: f7fd fb6d bl 80013a0 <SD_disk_ioctl>
  9042. /* USER CODE END IOCTL */
  9043. }
  9044. 8003cc6: bf00 nop
  9045. 8003cc8: 4618 mov r0, r3
  9046. 8003cca: 3708 adds r7, #8
  9047. 8003ccc: 46bd mov sp, r7
  9048. 8003cce: bd80 pop {r7, pc}
  9049. 08003cd0 <disk_status>:
  9050. * @retval DSTATUS: Operation status
  9051. */
  9052. DSTATUS disk_status (
  9053. BYTE pdrv /* Physical drive number to identify the drive */
  9054. )
  9055. {
  9056. 8003cd0: b580 push {r7, lr}
  9057. 8003cd2: b084 sub sp, #16
  9058. 8003cd4: af00 add r7, sp, #0
  9059. 8003cd6: 4603 mov r3, r0
  9060. 8003cd8: 71fb strb r3, [r7, #7]
  9061. DSTATUS stat;
  9062. stat = disk.drv[pdrv]->disk_status(disk.lun[pdrv]);
  9063. 8003cda: 79fb ldrb r3, [r7, #7]
  9064. 8003cdc: 4a08 ldr r2, [pc, #32] ; (8003d00 <disk_status+0x30>)
  9065. 8003cde: 009b lsls r3, r3, #2
  9066. 8003ce0: 4413 add r3, r2
  9067. 8003ce2: 685b ldr r3, [r3, #4]
  9068. 8003ce4: 685b ldr r3, [r3, #4]
  9069. 8003ce6: 79fa ldrb r2, [r7, #7]
  9070. 8003ce8: 4905 ldr r1, [pc, #20] ; (8003d00 <disk_status+0x30>)
  9071. 8003cea: 440a add r2, r1
  9072. 8003cec: 7a12 ldrb r2, [r2, #8]
  9073. 8003cee: 4610 mov r0, r2
  9074. 8003cf0: 4798 blx r3
  9075. 8003cf2: 4603 mov r3, r0
  9076. 8003cf4: 73fb strb r3, [r7, #15]
  9077. return stat;
  9078. 8003cf6: 7bfb ldrb r3, [r7, #15]
  9079. }
  9080. 8003cf8: 4618 mov r0, r3
  9081. 8003cfa: 3710 adds r7, #16
  9082. 8003cfc: 46bd mov sp, r7
  9083. 8003cfe: bd80 pop {r7, pc}
  9084. 8003d00: 200002d4 .word 0x200002d4
  9085. 08003d04 <disk_initialize>:
  9086. * @retval DSTATUS: Operation status
  9087. */
  9088. DSTATUS disk_initialize (
  9089. BYTE pdrv /* Physical drive nmuber to identify the drive */
  9090. )
  9091. {
  9092. 8003d04: b580 push {r7, lr}
  9093. 8003d06: b084 sub sp, #16
  9094. 8003d08: af00 add r7, sp, #0
  9095. 8003d0a: 4603 mov r3, r0
  9096. 8003d0c: 71fb strb r3, [r7, #7]
  9097. DSTATUS stat = RES_OK;
  9098. 8003d0e: 2300 movs r3, #0
  9099. 8003d10: 73fb strb r3, [r7, #15]
  9100. if(disk.is_initialized[pdrv] == 0)
  9101. 8003d12: 79fb ldrb r3, [r7, #7]
  9102. 8003d14: 4a0d ldr r2, [pc, #52] ; (8003d4c <disk_initialize+0x48>)
  9103. 8003d16: 5cd3 ldrb r3, [r2, r3]
  9104. 8003d18: 2b00 cmp r3, #0
  9105. 8003d1a: d111 bne.n 8003d40 <disk_initialize+0x3c>
  9106. {
  9107. disk.is_initialized[pdrv] = 1;
  9108. 8003d1c: 79fb ldrb r3, [r7, #7]
  9109. 8003d1e: 4a0b ldr r2, [pc, #44] ; (8003d4c <disk_initialize+0x48>)
  9110. 8003d20: 2101 movs r1, #1
  9111. 8003d22: 54d1 strb r1, [r2, r3]
  9112. stat = disk.drv[pdrv]->disk_initialize(disk.lun[pdrv]);
  9113. 8003d24: 79fb ldrb r3, [r7, #7]
  9114. 8003d26: 4a09 ldr r2, [pc, #36] ; (8003d4c <disk_initialize+0x48>)
  9115. 8003d28: 009b lsls r3, r3, #2
  9116. 8003d2a: 4413 add r3, r2
  9117. 8003d2c: 685b ldr r3, [r3, #4]
  9118. 8003d2e: 681b ldr r3, [r3, #0]
  9119. 8003d30: 79fa ldrb r2, [r7, #7]
  9120. 8003d32: 4906 ldr r1, [pc, #24] ; (8003d4c <disk_initialize+0x48>)
  9121. 8003d34: 440a add r2, r1
  9122. 8003d36: 7a12 ldrb r2, [r2, #8]
  9123. 8003d38: 4610 mov r0, r2
  9124. 8003d3a: 4798 blx r3
  9125. 8003d3c: 4603 mov r3, r0
  9126. 8003d3e: 73fb strb r3, [r7, #15]
  9127. }
  9128. return stat;
  9129. 8003d40: 7bfb ldrb r3, [r7, #15]
  9130. }
  9131. 8003d42: 4618 mov r0, r3
  9132. 8003d44: 3710 adds r7, #16
  9133. 8003d46: 46bd mov sp, r7
  9134. 8003d48: bd80 pop {r7, pc}
  9135. 8003d4a: bf00 nop
  9136. 8003d4c: 200002d4 .word 0x200002d4
  9137. 08003d50 <disk_read>:
  9138. BYTE pdrv, /* Physical drive nmuber to identify the drive */
  9139. BYTE *buff, /* Data buffer to store read data */
  9140. DWORD sector, /* Sector address in LBA */
  9141. UINT count /* Number of sectors to read */
  9142. )
  9143. {
  9144. 8003d50: b590 push {r4, r7, lr}
  9145. 8003d52: b087 sub sp, #28
  9146. 8003d54: af00 add r7, sp, #0
  9147. 8003d56: 60b9 str r1, [r7, #8]
  9148. 8003d58: 607a str r2, [r7, #4]
  9149. 8003d5a: 603b str r3, [r7, #0]
  9150. 8003d5c: 4603 mov r3, r0
  9151. 8003d5e: 73fb strb r3, [r7, #15]
  9152. DRESULT res;
  9153. res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
  9154. 8003d60: 7bfb ldrb r3, [r7, #15]
  9155. 8003d62: 4a0a ldr r2, [pc, #40] ; (8003d8c <disk_read+0x3c>)
  9156. 8003d64: 009b lsls r3, r3, #2
  9157. 8003d66: 4413 add r3, r2
  9158. 8003d68: 685b ldr r3, [r3, #4]
  9159. 8003d6a: 689c ldr r4, [r3, #8]
  9160. 8003d6c: 7bfb ldrb r3, [r7, #15]
  9161. 8003d6e: 4a07 ldr r2, [pc, #28] ; (8003d8c <disk_read+0x3c>)
  9162. 8003d70: 4413 add r3, r2
  9163. 8003d72: 7a18 ldrb r0, [r3, #8]
  9164. 8003d74: 683b ldr r3, [r7, #0]
  9165. 8003d76: 687a ldr r2, [r7, #4]
  9166. 8003d78: 68b9 ldr r1, [r7, #8]
  9167. 8003d7a: 47a0 blx r4
  9168. 8003d7c: 4603 mov r3, r0
  9169. 8003d7e: 75fb strb r3, [r7, #23]
  9170. return res;
  9171. 8003d80: 7dfb ldrb r3, [r7, #23]
  9172. }
  9173. 8003d82: 4618 mov r0, r3
  9174. 8003d84: 371c adds r7, #28
  9175. 8003d86: 46bd mov sp, r7
  9176. 8003d88: bd90 pop {r4, r7, pc}
  9177. 8003d8a: bf00 nop
  9178. 8003d8c: 200002d4 .word 0x200002d4
  9179. 08003d90 <disk_write>:
  9180. BYTE pdrv, /* Physical drive nmuber to identify the drive */
  9181. const BYTE *buff, /* Data to be written */
  9182. DWORD sector, /* Sector address in LBA */
  9183. UINT count /* Number of sectors to write */
  9184. )
  9185. {
  9186. 8003d90: b590 push {r4, r7, lr}
  9187. 8003d92: b087 sub sp, #28
  9188. 8003d94: af00 add r7, sp, #0
  9189. 8003d96: 60b9 str r1, [r7, #8]
  9190. 8003d98: 607a str r2, [r7, #4]
  9191. 8003d9a: 603b str r3, [r7, #0]
  9192. 8003d9c: 4603 mov r3, r0
  9193. 8003d9e: 73fb strb r3, [r7, #15]
  9194. DRESULT res;
  9195. res = disk.drv[pdrv]->disk_write(disk.lun[pdrv], buff, sector, count);
  9196. 8003da0: 7bfb ldrb r3, [r7, #15]
  9197. 8003da2: 4a0a ldr r2, [pc, #40] ; (8003dcc <disk_write+0x3c>)
  9198. 8003da4: 009b lsls r3, r3, #2
  9199. 8003da6: 4413 add r3, r2
  9200. 8003da8: 685b ldr r3, [r3, #4]
  9201. 8003daa: 68dc ldr r4, [r3, #12]
  9202. 8003dac: 7bfb ldrb r3, [r7, #15]
  9203. 8003dae: 4a07 ldr r2, [pc, #28] ; (8003dcc <disk_write+0x3c>)
  9204. 8003db0: 4413 add r3, r2
  9205. 8003db2: 7a18 ldrb r0, [r3, #8]
  9206. 8003db4: 683b ldr r3, [r7, #0]
  9207. 8003db6: 687a ldr r2, [r7, #4]
  9208. 8003db8: 68b9 ldr r1, [r7, #8]
  9209. 8003dba: 47a0 blx r4
  9210. 8003dbc: 4603 mov r3, r0
  9211. 8003dbe: 75fb strb r3, [r7, #23]
  9212. return res;
  9213. 8003dc0: 7dfb ldrb r3, [r7, #23]
  9214. }
  9215. 8003dc2: 4618 mov r0, r3
  9216. 8003dc4: 371c adds r7, #28
  9217. 8003dc6: 46bd mov sp, r7
  9218. 8003dc8: bd90 pop {r4, r7, pc}
  9219. 8003dca: bf00 nop
  9220. 8003dcc: 200002d4 .word 0x200002d4
  9221. 08003dd0 <disk_ioctl>:
  9222. DRESULT disk_ioctl (
  9223. BYTE pdrv, /* Physical drive nmuber (0..) */
  9224. BYTE cmd, /* Control code */
  9225. void *buff /* Buffer to send/receive control data */
  9226. )
  9227. {
  9228. 8003dd0: b580 push {r7, lr}
  9229. 8003dd2: b084 sub sp, #16
  9230. 8003dd4: af00 add r7, sp, #0
  9231. 8003dd6: 4603 mov r3, r0
  9232. 8003dd8: 603a str r2, [r7, #0]
  9233. 8003dda: 71fb strb r3, [r7, #7]
  9234. 8003ddc: 460b mov r3, r1
  9235. 8003dde: 71bb strb r3, [r7, #6]
  9236. DRESULT res;
  9237. res = disk.drv[pdrv]->disk_ioctl(disk.lun[pdrv], cmd, buff);
  9238. 8003de0: 79fb ldrb r3, [r7, #7]
  9239. 8003de2: 4a09 ldr r2, [pc, #36] ; (8003e08 <disk_ioctl+0x38>)
  9240. 8003de4: 009b lsls r3, r3, #2
  9241. 8003de6: 4413 add r3, r2
  9242. 8003de8: 685b ldr r3, [r3, #4]
  9243. 8003dea: 691b ldr r3, [r3, #16]
  9244. 8003dec: 79fa ldrb r2, [r7, #7]
  9245. 8003dee: 4906 ldr r1, [pc, #24] ; (8003e08 <disk_ioctl+0x38>)
  9246. 8003df0: 440a add r2, r1
  9247. 8003df2: 7a10 ldrb r0, [r2, #8]
  9248. 8003df4: 79b9 ldrb r1, [r7, #6]
  9249. 8003df6: 683a ldr r2, [r7, #0]
  9250. 8003df8: 4798 blx r3
  9251. 8003dfa: 4603 mov r3, r0
  9252. 8003dfc: 73fb strb r3, [r7, #15]
  9253. return res;
  9254. 8003dfe: 7bfb ldrb r3, [r7, #15]
  9255. }
  9256. 8003e00: 4618 mov r0, r3
  9257. 8003e02: 3710 adds r7, #16
  9258. 8003e04: 46bd mov sp, r7
  9259. 8003e06: bd80 pop {r7, pc}
  9260. 8003e08: 200002d4 .word 0x200002d4
  9261. 08003e0c <ld_word>:
  9262. /* Load/Store multi-byte word in the FAT structure */
  9263. /*-----------------------------------------------------------------------*/
  9264. static
  9265. WORD ld_word (const BYTE* ptr) /* Load a 2-byte little-endian word */
  9266. {
  9267. 8003e0c: b480 push {r7}
  9268. 8003e0e: b085 sub sp, #20
  9269. 8003e10: af00 add r7, sp, #0
  9270. 8003e12: 6078 str r0, [r7, #4]
  9271. WORD rv;
  9272. rv = ptr[1];
  9273. 8003e14: 687b ldr r3, [r7, #4]
  9274. 8003e16: 3301 adds r3, #1
  9275. 8003e18: 781b ldrb r3, [r3, #0]
  9276. 8003e1a: 81fb strh r3, [r7, #14]
  9277. rv = rv << 8 | ptr[0];
  9278. 8003e1c: 89fb ldrh r3, [r7, #14]
  9279. 8003e1e: 021b lsls r3, r3, #8
  9280. 8003e20: b21a sxth r2, r3
  9281. 8003e22: 687b ldr r3, [r7, #4]
  9282. 8003e24: 781b ldrb r3, [r3, #0]
  9283. 8003e26: b21b sxth r3, r3
  9284. 8003e28: 4313 orrs r3, r2
  9285. 8003e2a: b21b sxth r3, r3
  9286. 8003e2c: 81fb strh r3, [r7, #14]
  9287. return rv;
  9288. 8003e2e: 89fb ldrh r3, [r7, #14]
  9289. }
  9290. 8003e30: 4618 mov r0, r3
  9291. 8003e32: 3714 adds r7, #20
  9292. 8003e34: 46bd mov sp, r7
  9293. 8003e36: bc80 pop {r7}
  9294. 8003e38: 4770 bx lr
  9295. 08003e3a <ld_dword>:
  9296. static
  9297. DWORD ld_dword (const BYTE* ptr) /* Load a 4-byte little-endian word */
  9298. {
  9299. 8003e3a: b480 push {r7}
  9300. 8003e3c: b085 sub sp, #20
  9301. 8003e3e: af00 add r7, sp, #0
  9302. 8003e40: 6078 str r0, [r7, #4]
  9303. DWORD rv;
  9304. rv = ptr[3];
  9305. 8003e42: 687b ldr r3, [r7, #4]
  9306. 8003e44: 3303 adds r3, #3
  9307. 8003e46: 781b ldrb r3, [r3, #0]
  9308. 8003e48: 60fb str r3, [r7, #12]
  9309. rv = rv << 8 | ptr[2];
  9310. 8003e4a: 68fb ldr r3, [r7, #12]
  9311. 8003e4c: 021b lsls r3, r3, #8
  9312. 8003e4e: 687a ldr r2, [r7, #4]
  9313. 8003e50: 3202 adds r2, #2
  9314. 8003e52: 7812 ldrb r2, [r2, #0]
  9315. 8003e54: 4313 orrs r3, r2
  9316. 8003e56: 60fb str r3, [r7, #12]
  9317. rv = rv << 8 | ptr[1];
  9318. 8003e58: 68fb ldr r3, [r7, #12]
  9319. 8003e5a: 021b lsls r3, r3, #8
  9320. 8003e5c: 687a ldr r2, [r7, #4]
  9321. 8003e5e: 3201 adds r2, #1
  9322. 8003e60: 7812 ldrb r2, [r2, #0]
  9323. 8003e62: 4313 orrs r3, r2
  9324. 8003e64: 60fb str r3, [r7, #12]
  9325. rv = rv << 8 | ptr[0];
  9326. 8003e66: 68fb ldr r3, [r7, #12]
  9327. 8003e68: 021b lsls r3, r3, #8
  9328. 8003e6a: 687a ldr r2, [r7, #4]
  9329. 8003e6c: 7812 ldrb r2, [r2, #0]
  9330. 8003e6e: 4313 orrs r3, r2
  9331. 8003e70: 60fb str r3, [r7, #12]
  9332. return rv;
  9333. 8003e72: 68fb ldr r3, [r7, #12]
  9334. }
  9335. 8003e74: 4618 mov r0, r3
  9336. 8003e76: 3714 adds r7, #20
  9337. 8003e78: 46bd mov sp, r7
  9338. 8003e7a: bc80 pop {r7}
  9339. 8003e7c: 4770 bx lr
  9340. 08003e7e <st_word>:
  9341. #endif
  9342. #if !_FS_READONLY
  9343. static
  9344. void st_word (BYTE* ptr, WORD val) /* Store a 2-byte word in little-endian */
  9345. {
  9346. 8003e7e: b480 push {r7}
  9347. 8003e80: b083 sub sp, #12
  9348. 8003e82: af00 add r7, sp, #0
  9349. 8003e84: 6078 str r0, [r7, #4]
  9350. 8003e86: 460b mov r3, r1
  9351. 8003e88: 807b strh r3, [r7, #2]
  9352. *ptr++ = (BYTE)val; val >>= 8;
  9353. 8003e8a: 687b ldr r3, [r7, #4]
  9354. 8003e8c: 1c5a adds r2, r3, #1
  9355. 8003e8e: 607a str r2, [r7, #4]
  9356. 8003e90: 887a ldrh r2, [r7, #2]
  9357. 8003e92: b2d2 uxtb r2, r2
  9358. 8003e94: 701a strb r2, [r3, #0]
  9359. 8003e96: 887b ldrh r3, [r7, #2]
  9360. 8003e98: 0a1b lsrs r3, r3, #8
  9361. 8003e9a: 807b strh r3, [r7, #2]
  9362. *ptr++ = (BYTE)val;
  9363. 8003e9c: 687b ldr r3, [r7, #4]
  9364. 8003e9e: 1c5a adds r2, r3, #1
  9365. 8003ea0: 607a str r2, [r7, #4]
  9366. 8003ea2: 887a ldrh r2, [r7, #2]
  9367. 8003ea4: b2d2 uxtb r2, r2
  9368. 8003ea6: 701a strb r2, [r3, #0]
  9369. }
  9370. 8003ea8: bf00 nop
  9371. 8003eaa: 370c adds r7, #12
  9372. 8003eac: 46bd mov sp, r7
  9373. 8003eae: bc80 pop {r7}
  9374. 8003eb0: 4770 bx lr
  9375. 08003eb2 <st_dword>:
  9376. static
  9377. void st_dword (BYTE* ptr, DWORD val) /* Store a 4-byte word in little-endian */
  9378. {
  9379. 8003eb2: b480 push {r7}
  9380. 8003eb4: b083 sub sp, #12
  9381. 8003eb6: af00 add r7, sp, #0
  9382. 8003eb8: 6078 str r0, [r7, #4]
  9383. 8003eba: 6039 str r1, [r7, #0]
  9384. *ptr++ = (BYTE)val; val >>= 8;
  9385. 8003ebc: 687b ldr r3, [r7, #4]
  9386. 8003ebe: 1c5a adds r2, r3, #1
  9387. 8003ec0: 607a str r2, [r7, #4]
  9388. 8003ec2: 683a ldr r2, [r7, #0]
  9389. 8003ec4: b2d2 uxtb r2, r2
  9390. 8003ec6: 701a strb r2, [r3, #0]
  9391. 8003ec8: 683b ldr r3, [r7, #0]
  9392. 8003eca: 0a1b lsrs r3, r3, #8
  9393. 8003ecc: 603b str r3, [r7, #0]
  9394. *ptr++ = (BYTE)val; val >>= 8;
  9395. 8003ece: 687b ldr r3, [r7, #4]
  9396. 8003ed0: 1c5a adds r2, r3, #1
  9397. 8003ed2: 607a str r2, [r7, #4]
  9398. 8003ed4: 683a ldr r2, [r7, #0]
  9399. 8003ed6: b2d2 uxtb r2, r2
  9400. 8003ed8: 701a strb r2, [r3, #0]
  9401. 8003eda: 683b ldr r3, [r7, #0]
  9402. 8003edc: 0a1b lsrs r3, r3, #8
  9403. 8003ede: 603b str r3, [r7, #0]
  9404. *ptr++ = (BYTE)val; val >>= 8;
  9405. 8003ee0: 687b ldr r3, [r7, #4]
  9406. 8003ee2: 1c5a adds r2, r3, #1
  9407. 8003ee4: 607a str r2, [r7, #4]
  9408. 8003ee6: 683a ldr r2, [r7, #0]
  9409. 8003ee8: b2d2 uxtb r2, r2
  9410. 8003eea: 701a strb r2, [r3, #0]
  9411. 8003eec: 683b ldr r3, [r7, #0]
  9412. 8003eee: 0a1b lsrs r3, r3, #8
  9413. 8003ef0: 603b str r3, [r7, #0]
  9414. *ptr++ = (BYTE)val;
  9415. 8003ef2: 687b ldr r3, [r7, #4]
  9416. 8003ef4: 1c5a adds r2, r3, #1
  9417. 8003ef6: 607a str r2, [r7, #4]
  9418. 8003ef8: 683a ldr r2, [r7, #0]
  9419. 8003efa: b2d2 uxtb r2, r2
  9420. 8003efc: 701a strb r2, [r3, #0]
  9421. }
  9422. 8003efe: bf00 nop
  9423. 8003f00: 370c adds r7, #12
  9424. 8003f02: 46bd mov sp, r7
  9425. 8003f04: bc80 pop {r7}
  9426. 8003f06: 4770 bx lr
  9427. 08003f08 <mem_cpy>:
  9428. /* String functions */
  9429. /*-----------------------------------------------------------------------*/
  9430. /* Copy memory to memory */
  9431. static
  9432. void mem_cpy (void* dst, const void* src, UINT cnt) {
  9433. 8003f08: b480 push {r7}
  9434. 8003f0a: b087 sub sp, #28
  9435. 8003f0c: af00 add r7, sp, #0
  9436. 8003f0e: 60f8 str r0, [r7, #12]
  9437. 8003f10: 60b9 str r1, [r7, #8]
  9438. 8003f12: 607a str r2, [r7, #4]
  9439. BYTE *d = (BYTE*)dst;
  9440. 8003f14: 68fb ldr r3, [r7, #12]
  9441. 8003f16: 617b str r3, [r7, #20]
  9442. const BYTE *s = (const BYTE*)src;
  9443. 8003f18: 68bb ldr r3, [r7, #8]
  9444. 8003f1a: 613b str r3, [r7, #16]
  9445. if (cnt) {
  9446. 8003f1c: 687b ldr r3, [r7, #4]
  9447. 8003f1e: 2b00 cmp r3, #0
  9448. 8003f20: d00d beq.n 8003f3e <mem_cpy+0x36>
  9449. do {
  9450. *d++ = *s++;
  9451. 8003f22: 693a ldr r2, [r7, #16]
  9452. 8003f24: 1c53 adds r3, r2, #1
  9453. 8003f26: 613b str r3, [r7, #16]
  9454. 8003f28: 697b ldr r3, [r7, #20]
  9455. 8003f2a: 1c59 adds r1, r3, #1
  9456. 8003f2c: 6179 str r1, [r7, #20]
  9457. 8003f2e: 7812 ldrb r2, [r2, #0]
  9458. 8003f30: 701a strb r2, [r3, #0]
  9459. } while (--cnt);
  9460. 8003f32: 687b ldr r3, [r7, #4]
  9461. 8003f34: 3b01 subs r3, #1
  9462. 8003f36: 607b str r3, [r7, #4]
  9463. 8003f38: 687b ldr r3, [r7, #4]
  9464. 8003f3a: 2b00 cmp r3, #0
  9465. 8003f3c: d1f1 bne.n 8003f22 <mem_cpy+0x1a>
  9466. }
  9467. }
  9468. 8003f3e: bf00 nop
  9469. 8003f40: 371c adds r7, #28
  9470. 8003f42: 46bd mov sp, r7
  9471. 8003f44: bc80 pop {r7}
  9472. 8003f46: 4770 bx lr
  9473. 08003f48 <mem_set>:
  9474. /* Fill memory block */
  9475. static
  9476. void mem_set (void* dst, int val, UINT cnt) {
  9477. 8003f48: b480 push {r7}
  9478. 8003f4a: b087 sub sp, #28
  9479. 8003f4c: af00 add r7, sp, #0
  9480. 8003f4e: 60f8 str r0, [r7, #12]
  9481. 8003f50: 60b9 str r1, [r7, #8]
  9482. 8003f52: 607a str r2, [r7, #4]
  9483. BYTE *d = (BYTE*)dst;
  9484. 8003f54: 68fb ldr r3, [r7, #12]
  9485. 8003f56: 617b str r3, [r7, #20]
  9486. do {
  9487. *d++ = (BYTE)val;
  9488. 8003f58: 697b ldr r3, [r7, #20]
  9489. 8003f5a: 1c5a adds r2, r3, #1
  9490. 8003f5c: 617a str r2, [r7, #20]
  9491. 8003f5e: 68ba ldr r2, [r7, #8]
  9492. 8003f60: b2d2 uxtb r2, r2
  9493. 8003f62: 701a strb r2, [r3, #0]
  9494. } while (--cnt);
  9495. 8003f64: 687b ldr r3, [r7, #4]
  9496. 8003f66: 3b01 subs r3, #1
  9497. 8003f68: 607b str r3, [r7, #4]
  9498. 8003f6a: 687b ldr r3, [r7, #4]
  9499. 8003f6c: 2b00 cmp r3, #0
  9500. 8003f6e: d1f3 bne.n 8003f58 <mem_set+0x10>
  9501. }
  9502. 8003f70: bf00 nop
  9503. 8003f72: 371c adds r7, #28
  9504. 8003f74: 46bd mov sp, r7
  9505. 8003f76: bc80 pop {r7}
  9506. 8003f78: 4770 bx lr
  9507. 08003f7a <mem_cmp>:
  9508. /* Compare memory block */
  9509. static
  9510. int mem_cmp (const void* dst, const void* src, UINT cnt) { /* ZR:same, NZ:different */
  9511. 8003f7a: b480 push {r7}
  9512. 8003f7c: b089 sub sp, #36 ; 0x24
  9513. 8003f7e: af00 add r7, sp, #0
  9514. 8003f80: 60f8 str r0, [r7, #12]
  9515. 8003f82: 60b9 str r1, [r7, #8]
  9516. 8003f84: 607a str r2, [r7, #4]
  9517. const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src;
  9518. 8003f86: 68fb ldr r3, [r7, #12]
  9519. 8003f88: 61fb str r3, [r7, #28]
  9520. 8003f8a: 68bb ldr r3, [r7, #8]
  9521. 8003f8c: 61bb str r3, [r7, #24]
  9522. int r = 0;
  9523. 8003f8e: 2300 movs r3, #0
  9524. 8003f90: 617b str r3, [r7, #20]
  9525. do {
  9526. r = *d++ - *s++;
  9527. 8003f92: 69fb ldr r3, [r7, #28]
  9528. 8003f94: 1c5a adds r2, r3, #1
  9529. 8003f96: 61fa str r2, [r7, #28]
  9530. 8003f98: 781b ldrb r3, [r3, #0]
  9531. 8003f9a: 4619 mov r1, r3
  9532. 8003f9c: 69bb ldr r3, [r7, #24]
  9533. 8003f9e: 1c5a adds r2, r3, #1
  9534. 8003fa0: 61ba str r2, [r7, #24]
  9535. 8003fa2: 781b ldrb r3, [r3, #0]
  9536. 8003fa4: 1acb subs r3, r1, r3
  9537. 8003fa6: 617b str r3, [r7, #20]
  9538. } while (--cnt && r == 0);
  9539. 8003fa8: 687b ldr r3, [r7, #4]
  9540. 8003faa: 3b01 subs r3, #1
  9541. 8003fac: 607b str r3, [r7, #4]
  9542. 8003fae: 687b ldr r3, [r7, #4]
  9543. 8003fb0: 2b00 cmp r3, #0
  9544. 8003fb2: d002 beq.n 8003fba <mem_cmp+0x40>
  9545. 8003fb4: 697b ldr r3, [r7, #20]
  9546. 8003fb6: 2b00 cmp r3, #0
  9547. 8003fb8: d0eb beq.n 8003f92 <mem_cmp+0x18>
  9548. return r;
  9549. 8003fba: 697b ldr r3, [r7, #20]
  9550. }
  9551. 8003fbc: 4618 mov r0, r3
  9552. 8003fbe: 3724 adds r7, #36 ; 0x24
  9553. 8003fc0: 46bd mov sp, r7
  9554. 8003fc2: bc80 pop {r7}
  9555. 8003fc4: 4770 bx lr
  9556. 08003fc6 <chk_chr>:
  9557. /* Check if chr is contained in the string */
  9558. static
  9559. int chk_chr (const char* str, int chr) { /* NZ:contained, ZR:not contained */
  9560. 8003fc6: b480 push {r7}
  9561. 8003fc8: b083 sub sp, #12
  9562. 8003fca: af00 add r7, sp, #0
  9563. 8003fcc: 6078 str r0, [r7, #4]
  9564. 8003fce: 6039 str r1, [r7, #0]
  9565. while (*str && *str != chr) str++;
  9566. 8003fd0: e002 b.n 8003fd8 <chk_chr+0x12>
  9567. 8003fd2: 687b ldr r3, [r7, #4]
  9568. 8003fd4: 3301 adds r3, #1
  9569. 8003fd6: 607b str r3, [r7, #4]
  9570. 8003fd8: 687b ldr r3, [r7, #4]
  9571. 8003fda: 781b ldrb r3, [r3, #0]
  9572. 8003fdc: 2b00 cmp r3, #0
  9573. 8003fde: d005 beq.n 8003fec <chk_chr+0x26>
  9574. 8003fe0: 687b ldr r3, [r7, #4]
  9575. 8003fe2: 781b ldrb r3, [r3, #0]
  9576. 8003fe4: 461a mov r2, r3
  9577. 8003fe6: 683b ldr r3, [r7, #0]
  9578. 8003fe8: 4293 cmp r3, r2
  9579. 8003fea: d1f2 bne.n 8003fd2 <chk_chr+0xc>
  9580. return *str;
  9581. 8003fec: 687b ldr r3, [r7, #4]
  9582. 8003fee: 781b ldrb r3, [r3, #0]
  9583. }
  9584. 8003ff0: 4618 mov r0, r3
  9585. 8003ff2: 370c adds r7, #12
  9586. 8003ff4: 46bd mov sp, r7
  9587. 8003ff6: bc80 pop {r7}
  9588. 8003ff8: 4770 bx lr
  9589. ...
  9590. 08003ffc <chk_lock>:
  9591. static
  9592. FRESULT chk_lock ( /* Check if the file can be accessed */
  9593. DIR* dp, /* Directory object pointing the file to be checked */
  9594. int acc /* Desired access type (0:Read, 1:Write, 2:Delete/Rename) */
  9595. )
  9596. {
  9597. 8003ffc: b480 push {r7}
  9598. 8003ffe: b085 sub sp, #20
  9599. 8004000: af00 add r7, sp, #0
  9600. 8004002: 6078 str r0, [r7, #4]
  9601. 8004004: 6039 str r1, [r7, #0]
  9602. UINT i, be;
  9603. /* Search file semaphore table */
  9604. for (i = be = 0; i < _FS_LOCK; i++) {
  9605. 8004006: 2300 movs r3, #0
  9606. 8004008: 60bb str r3, [r7, #8]
  9607. 800400a: 68bb ldr r3, [r7, #8]
  9608. 800400c: 60fb str r3, [r7, #12]
  9609. 800400e: e029 b.n 8004064 <chk_lock+0x68>
  9610. if (Files[i].fs) { /* Existing entry */
  9611. 8004010: 4a26 ldr r2, [pc, #152] ; (80040ac <chk_lock+0xb0>)
  9612. 8004012: 68fb ldr r3, [r7, #12]
  9613. 8004014: 011b lsls r3, r3, #4
  9614. 8004016: 4413 add r3, r2
  9615. 8004018: 681b ldr r3, [r3, #0]
  9616. 800401a: 2b00 cmp r3, #0
  9617. 800401c: d01d beq.n 800405a <chk_lock+0x5e>
  9618. if (Files[i].fs == dp->obj.fs && /* Check if the object matched with an open object */
  9619. 800401e: 4a23 ldr r2, [pc, #140] ; (80040ac <chk_lock+0xb0>)
  9620. 8004020: 68fb ldr r3, [r7, #12]
  9621. 8004022: 011b lsls r3, r3, #4
  9622. 8004024: 4413 add r3, r2
  9623. 8004026: 681a ldr r2, [r3, #0]
  9624. 8004028: 687b ldr r3, [r7, #4]
  9625. 800402a: 681b ldr r3, [r3, #0]
  9626. 800402c: 429a cmp r2, r3
  9627. 800402e: d116 bne.n 800405e <chk_lock+0x62>
  9628. Files[i].clu == dp->obj.sclust &&
  9629. 8004030: 4a1e ldr r2, [pc, #120] ; (80040ac <chk_lock+0xb0>)
  9630. 8004032: 68fb ldr r3, [r7, #12]
  9631. 8004034: 011b lsls r3, r3, #4
  9632. 8004036: 4413 add r3, r2
  9633. 8004038: 3304 adds r3, #4
  9634. 800403a: 681a ldr r2, [r3, #0]
  9635. 800403c: 687b ldr r3, [r7, #4]
  9636. 800403e: 689b ldr r3, [r3, #8]
  9637. if (Files[i].fs == dp->obj.fs && /* Check if the object matched with an open object */
  9638. 8004040: 429a cmp r2, r3
  9639. 8004042: d10c bne.n 800405e <chk_lock+0x62>
  9640. Files[i].ofs == dp->dptr) break;
  9641. 8004044: 4a19 ldr r2, [pc, #100] ; (80040ac <chk_lock+0xb0>)
  9642. 8004046: 68fb ldr r3, [r7, #12]
  9643. 8004048: 011b lsls r3, r3, #4
  9644. 800404a: 4413 add r3, r2
  9645. 800404c: 3308 adds r3, #8
  9646. 800404e: 681a ldr r2, [r3, #0]
  9647. 8004050: 687b ldr r3, [r7, #4]
  9648. 8004052: 695b ldr r3, [r3, #20]
  9649. Files[i].clu == dp->obj.sclust &&
  9650. 8004054: 429a cmp r2, r3
  9651. 8004056: d102 bne.n 800405e <chk_lock+0x62>
  9652. Files[i].ofs == dp->dptr) break;
  9653. 8004058: e007 b.n 800406a <chk_lock+0x6e>
  9654. } else { /* Blank entry */
  9655. be = 1;
  9656. 800405a: 2301 movs r3, #1
  9657. 800405c: 60bb str r3, [r7, #8]
  9658. for (i = be = 0; i < _FS_LOCK; i++) {
  9659. 800405e: 68fb ldr r3, [r7, #12]
  9660. 8004060: 3301 adds r3, #1
  9661. 8004062: 60fb str r3, [r7, #12]
  9662. 8004064: 68fb ldr r3, [r7, #12]
  9663. 8004066: 2b01 cmp r3, #1
  9664. 8004068: d9d2 bls.n 8004010 <chk_lock+0x14>
  9665. }
  9666. }
  9667. if (i == _FS_LOCK) { /* The object is not opened */
  9668. 800406a: 68fb ldr r3, [r7, #12]
  9669. 800406c: 2b02 cmp r3, #2
  9670. 800406e: d109 bne.n 8004084 <chk_lock+0x88>
  9671. return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new object? */
  9672. 8004070: 68bb ldr r3, [r7, #8]
  9673. 8004072: 2b00 cmp r3, #0
  9674. 8004074: d102 bne.n 800407c <chk_lock+0x80>
  9675. 8004076: 683b ldr r3, [r7, #0]
  9676. 8004078: 2b02 cmp r3, #2
  9677. 800407a: d101 bne.n 8004080 <chk_lock+0x84>
  9678. 800407c: 2300 movs r3, #0
  9679. 800407e: e010 b.n 80040a2 <chk_lock+0xa6>
  9680. 8004080: 2312 movs r3, #18
  9681. 8004082: e00e b.n 80040a2 <chk_lock+0xa6>
  9682. }
  9683. /* The object has been opened. Reject any open against writing file and all write mode open */
  9684. return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;
  9685. 8004084: 683b ldr r3, [r7, #0]
  9686. 8004086: 2b00 cmp r3, #0
  9687. 8004088: d108 bne.n 800409c <chk_lock+0xa0>
  9688. 800408a: 4a08 ldr r2, [pc, #32] ; (80040ac <chk_lock+0xb0>)
  9689. 800408c: 68fb ldr r3, [r7, #12]
  9690. 800408e: 011b lsls r3, r3, #4
  9691. 8004090: 4413 add r3, r2
  9692. 8004092: 330c adds r3, #12
  9693. 8004094: 881b ldrh r3, [r3, #0]
  9694. 8004096: f5b3 7f80 cmp.w r3, #256 ; 0x100
  9695. 800409a: d101 bne.n 80040a0 <chk_lock+0xa4>
  9696. 800409c: 2310 movs r3, #16
  9697. 800409e: e000 b.n 80040a2 <chk_lock+0xa6>
  9698. 80040a0: 2300 movs r3, #0
  9699. }
  9700. 80040a2: 4618 mov r0, r3
  9701. 80040a4: 3714 adds r7, #20
  9702. 80040a6: 46bd mov sp, r7
  9703. 80040a8: bc80 pop {r7}
  9704. 80040aa: 4770 bx lr
  9705. 80040ac: 200000b4 .word 0x200000b4
  9706. 080040b0 <enq_lock>:
  9707. static
  9708. int enq_lock (void) /* Check if an entry is available for a new object */
  9709. {
  9710. 80040b0: b480 push {r7}
  9711. 80040b2: b083 sub sp, #12
  9712. 80040b4: af00 add r7, sp, #0
  9713. UINT i;
  9714. for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
  9715. 80040b6: 2300 movs r3, #0
  9716. 80040b8: 607b str r3, [r7, #4]
  9717. 80040ba: e002 b.n 80040c2 <enq_lock+0x12>
  9718. 80040bc: 687b ldr r3, [r7, #4]
  9719. 80040be: 3301 adds r3, #1
  9720. 80040c0: 607b str r3, [r7, #4]
  9721. 80040c2: 687b ldr r3, [r7, #4]
  9722. 80040c4: 2b01 cmp r3, #1
  9723. 80040c6: d806 bhi.n 80040d6 <enq_lock+0x26>
  9724. 80040c8: 4a08 ldr r2, [pc, #32] ; (80040ec <enq_lock+0x3c>)
  9725. 80040ca: 687b ldr r3, [r7, #4]
  9726. 80040cc: 011b lsls r3, r3, #4
  9727. 80040ce: 4413 add r3, r2
  9728. 80040d0: 681b ldr r3, [r3, #0]
  9729. 80040d2: 2b00 cmp r3, #0
  9730. 80040d4: d1f2 bne.n 80040bc <enq_lock+0xc>
  9731. return (i == _FS_LOCK) ? 0 : 1;
  9732. 80040d6: 687b ldr r3, [r7, #4]
  9733. 80040d8: 2b02 cmp r3, #2
  9734. 80040da: bf14 ite ne
  9735. 80040dc: 2301 movne r3, #1
  9736. 80040de: 2300 moveq r3, #0
  9737. 80040e0: b2db uxtb r3, r3
  9738. }
  9739. 80040e2: 4618 mov r0, r3
  9740. 80040e4: 370c adds r7, #12
  9741. 80040e6: 46bd mov sp, r7
  9742. 80040e8: bc80 pop {r7}
  9743. 80040ea: 4770 bx lr
  9744. 80040ec: 200000b4 .word 0x200000b4
  9745. 080040f0 <inc_lock>:
  9746. static
  9747. UINT inc_lock ( /* Increment object open counter and returns its index (0:Internal error) */
  9748. DIR* dp, /* Directory object pointing the file to register or increment */
  9749. int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */
  9750. )
  9751. {
  9752. 80040f0: b480 push {r7}
  9753. 80040f2: b085 sub sp, #20
  9754. 80040f4: af00 add r7, sp, #0
  9755. 80040f6: 6078 str r0, [r7, #4]
  9756. 80040f8: 6039 str r1, [r7, #0]
  9757. UINT i;
  9758. for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
  9759. 80040fa: 2300 movs r3, #0
  9760. 80040fc: 60fb str r3, [r7, #12]
  9761. 80040fe: e01f b.n 8004140 <inc_lock+0x50>
  9762. if (Files[i].fs == dp->obj.fs &&
  9763. 8004100: 4a41 ldr r2, [pc, #260] ; (8004208 <inc_lock+0x118>)
  9764. 8004102: 68fb ldr r3, [r7, #12]
  9765. 8004104: 011b lsls r3, r3, #4
  9766. 8004106: 4413 add r3, r2
  9767. 8004108: 681a ldr r2, [r3, #0]
  9768. 800410a: 687b ldr r3, [r7, #4]
  9769. 800410c: 681b ldr r3, [r3, #0]
  9770. 800410e: 429a cmp r2, r3
  9771. 8004110: d113 bne.n 800413a <inc_lock+0x4a>
  9772. Files[i].clu == dp->obj.sclust &&
  9773. 8004112: 4a3d ldr r2, [pc, #244] ; (8004208 <inc_lock+0x118>)
  9774. 8004114: 68fb ldr r3, [r7, #12]
  9775. 8004116: 011b lsls r3, r3, #4
  9776. 8004118: 4413 add r3, r2
  9777. 800411a: 3304 adds r3, #4
  9778. 800411c: 681a ldr r2, [r3, #0]
  9779. 800411e: 687b ldr r3, [r7, #4]
  9780. 8004120: 689b ldr r3, [r3, #8]
  9781. if (Files[i].fs == dp->obj.fs &&
  9782. 8004122: 429a cmp r2, r3
  9783. 8004124: d109 bne.n 800413a <inc_lock+0x4a>
  9784. Files[i].ofs == dp->dptr) break;
  9785. 8004126: 4a38 ldr r2, [pc, #224] ; (8004208 <inc_lock+0x118>)
  9786. 8004128: 68fb ldr r3, [r7, #12]
  9787. 800412a: 011b lsls r3, r3, #4
  9788. 800412c: 4413 add r3, r2
  9789. 800412e: 3308 adds r3, #8
  9790. 8004130: 681a ldr r2, [r3, #0]
  9791. 8004132: 687b ldr r3, [r7, #4]
  9792. 8004134: 695b ldr r3, [r3, #20]
  9793. Files[i].clu == dp->obj.sclust &&
  9794. 8004136: 429a cmp r2, r3
  9795. 8004138: d006 beq.n 8004148 <inc_lock+0x58>
  9796. for (i = 0; i < _FS_LOCK; i++) { /* Find the object */
  9797. 800413a: 68fb ldr r3, [r7, #12]
  9798. 800413c: 3301 adds r3, #1
  9799. 800413e: 60fb str r3, [r7, #12]
  9800. 8004140: 68fb ldr r3, [r7, #12]
  9801. 8004142: 2b01 cmp r3, #1
  9802. 8004144: d9dc bls.n 8004100 <inc_lock+0x10>
  9803. 8004146: e000 b.n 800414a <inc_lock+0x5a>
  9804. Files[i].ofs == dp->dptr) break;
  9805. 8004148: bf00 nop
  9806. }
  9807. if (i == _FS_LOCK) { /* Not opened. Register it as new. */
  9808. 800414a: 68fb ldr r3, [r7, #12]
  9809. 800414c: 2b02 cmp r3, #2
  9810. 800414e: d132 bne.n 80041b6 <inc_lock+0xc6>
  9811. for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
  9812. 8004150: 2300 movs r3, #0
  9813. 8004152: 60fb str r3, [r7, #12]
  9814. 8004154: e002 b.n 800415c <inc_lock+0x6c>
  9815. 8004156: 68fb ldr r3, [r7, #12]
  9816. 8004158: 3301 adds r3, #1
  9817. 800415a: 60fb str r3, [r7, #12]
  9818. 800415c: 68fb ldr r3, [r7, #12]
  9819. 800415e: 2b01 cmp r3, #1
  9820. 8004160: d806 bhi.n 8004170 <inc_lock+0x80>
  9821. 8004162: 4a29 ldr r2, [pc, #164] ; (8004208 <inc_lock+0x118>)
  9822. 8004164: 68fb ldr r3, [r7, #12]
  9823. 8004166: 011b lsls r3, r3, #4
  9824. 8004168: 4413 add r3, r2
  9825. 800416a: 681b ldr r3, [r3, #0]
  9826. 800416c: 2b00 cmp r3, #0
  9827. 800416e: d1f2 bne.n 8004156 <inc_lock+0x66>
  9828. if (i == _FS_LOCK) return 0; /* No free entry to register (int err) */
  9829. 8004170: 68fb ldr r3, [r7, #12]
  9830. 8004172: 2b02 cmp r3, #2
  9831. 8004174: d101 bne.n 800417a <inc_lock+0x8a>
  9832. 8004176: 2300 movs r3, #0
  9833. 8004178: e040 b.n 80041fc <inc_lock+0x10c>
  9834. Files[i].fs = dp->obj.fs;
  9835. 800417a: 687b ldr r3, [r7, #4]
  9836. 800417c: 681a ldr r2, [r3, #0]
  9837. 800417e: 4922 ldr r1, [pc, #136] ; (8004208 <inc_lock+0x118>)
  9838. 8004180: 68fb ldr r3, [r7, #12]
  9839. 8004182: 011b lsls r3, r3, #4
  9840. 8004184: 440b add r3, r1
  9841. 8004186: 601a str r2, [r3, #0]
  9842. Files[i].clu = dp->obj.sclust;
  9843. 8004188: 687b ldr r3, [r7, #4]
  9844. 800418a: 689a ldr r2, [r3, #8]
  9845. 800418c: 491e ldr r1, [pc, #120] ; (8004208 <inc_lock+0x118>)
  9846. 800418e: 68fb ldr r3, [r7, #12]
  9847. 8004190: 011b lsls r3, r3, #4
  9848. 8004192: 440b add r3, r1
  9849. 8004194: 3304 adds r3, #4
  9850. 8004196: 601a str r2, [r3, #0]
  9851. Files[i].ofs = dp->dptr;
  9852. 8004198: 687b ldr r3, [r7, #4]
  9853. 800419a: 695a ldr r2, [r3, #20]
  9854. 800419c: 491a ldr r1, [pc, #104] ; (8004208 <inc_lock+0x118>)
  9855. 800419e: 68fb ldr r3, [r7, #12]
  9856. 80041a0: 011b lsls r3, r3, #4
  9857. 80041a2: 440b add r3, r1
  9858. 80041a4: 3308 adds r3, #8
  9859. 80041a6: 601a str r2, [r3, #0]
  9860. Files[i].ctr = 0;
  9861. 80041a8: 4a17 ldr r2, [pc, #92] ; (8004208 <inc_lock+0x118>)
  9862. 80041aa: 68fb ldr r3, [r7, #12]
  9863. 80041ac: 011b lsls r3, r3, #4
  9864. 80041ae: 4413 add r3, r2
  9865. 80041b0: 330c adds r3, #12
  9866. 80041b2: 2200 movs r2, #0
  9867. 80041b4: 801a strh r2, [r3, #0]
  9868. }
  9869. if (acc && Files[i].ctr) return 0; /* Access violation (int err) */
  9870. 80041b6: 683b ldr r3, [r7, #0]
  9871. 80041b8: 2b00 cmp r3, #0
  9872. 80041ba: d009 beq.n 80041d0 <inc_lock+0xe0>
  9873. 80041bc: 4a12 ldr r2, [pc, #72] ; (8004208 <inc_lock+0x118>)
  9874. 80041be: 68fb ldr r3, [r7, #12]
  9875. 80041c0: 011b lsls r3, r3, #4
  9876. 80041c2: 4413 add r3, r2
  9877. 80041c4: 330c adds r3, #12
  9878. 80041c6: 881b ldrh r3, [r3, #0]
  9879. 80041c8: 2b00 cmp r3, #0
  9880. 80041ca: d001 beq.n 80041d0 <inc_lock+0xe0>
  9881. 80041cc: 2300 movs r3, #0
  9882. 80041ce: e015 b.n 80041fc <inc_lock+0x10c>
  9883. Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */
  9884. 80041d0: 683b ldr r3, [r7, #0]
  9885. 80041d2: 2b00 cmp r3, #0
  9886. 80041d4: d108 bne.n 80041e8 <inc_lock+0xf8>
  9887. 80041d6: 4a0c ldr r2, [pc, #48] ; (8004208 <inc_lock+0x118>)
  9888. 80041d8: 68fb ldr r3, [r7, #12]
  9889. 80041da: 011b lsls r3, r3, #4
  9890. 80041dc: 4413 add r3, r2
  9891. 80041de: 330c adds r3, #12
  9892. 80041e0: 881b ldrh r3, [r3, #0]
  9893. 80041e2: 3301 adds r3, #1
  9894. 80041e4: b29a uxth r2, r3
  9895. 80041e6: e001 b.n 80041ec <inc_lock+0xfc>
  9896. 80041e8: f44f 7280 mov.w r2, #256 ; 0x100
  9897. 80041ec: 4906 ldr r1, [pc, #24] ; (8004208 <inc_lock+0x118>)
  9898. 80041ee: 68fb ldr r3, [r7, #12]
  9899. 80041f0: 011b lsls r3, r3, #4
  9900. 80041f2: 440b add r3, r1
  9901. 80041f4: 330c adds r3, #12
  9902. 80041f6: 801a strh r2, [r3, #0]
  9903. return i + 1;
  9904. 80041f8: 68fb ldr r3, [r7, #12]
  9905. 80041fa: 3301 adds r3, #1
  9906. }
  9907. 80041fc: 4618 mov r0, r3
  9908. 80041fe: 3714 adds r7, #20
  9909. 8004200: 46bd mov sp, r7
  9910. 8004202: bc80 pop {r7}
  9911. 8004204: 4770 bx lr
  9912. 8004206: bf00 nop
  9913. 8004208: 200000b4 .word 0x200000b4
  9914. 0800420c <dec_lock>:
  9915. static
  9916. FRESULT dec_lock ( /* Decrement object open counter */
  9917. UINT i /* Semaphore index (1..) */
  9918. )
  9919. {
  9920. 800420c: b480 push {r7}
  9921. 800420e: b085 sub sp, #20
  9922. 8004210: af00 add r7, sp, #0
  9923. 8004212: 6078 str r0, [r7, #4]
  9924. WORD n;
  9925. FRESULT res;
  9926. if (--i < _FS_LOCK) { /* Shift index number origin from 0 */
  9927. 8004214: 687b ldr r3, [r7, #4]
  9928. 8004216: 3b01 subs r3, #1
  9929. 8004218: 607b str r3, [r7, #4]
  9930. 800421a: 687b ldr r3, [r7, #4]
  9931. 800421c: 2b01 cmp r3, #1
  9932. 800421e: d825 bhi.n 800426c <dec_lock+0x60>
  9933. n = Files[i].ctr;
  9934. 8004220: 4a16 ldr r2, [pc, #88] ; (800427c <dec_lock+0x70>)
  9935. 8004222: 687b ldr r3, [r7, #4]
  9936. 8004224: 011b lsls r3, r3, #4
  9937. 8004226: 4413 add r3, r2
  9938. 8004228: 330c adds r3, #12
  9939. 800422a: 881b ldrh r3, [r3, #0]
  9940. 800422c: 81fb strh r3, [r7, #14]
  9941. if (n == 0x100) n = 0; /* If write mode open, delete the entry */
  9942. 800422e: 89fb ldrh r3, [r7, #14]
  9943. 8004230: f5b3 7f80 cmp.w r3, #256 ; 0x100
  9944. 8004234: d101 bne.n 800423a <dec_lock+0x2e>
  9945. 8004236: 2300 movs r3, #0
  9946. 8004238: 81fb strh r3, [r7, #14]
  9947. if (n > 0) n--; /* Decrement read mode open count */
  9948. 800423a: 89fb ldrh r3, [r7, #14]
  9949. 800423c: 2b00 cmp r3, #0
  9950. 800423e: d002 beq.n 8004246 <dec_lock+0x3a>
  9951. 8004240: 89fb ldrh r3, [r7, #14]
  9952. 8004242: 3b01 subs r3, #1
  9953. 8004244: 81fb strh r3, [r7, #14]
  9954. Files[i].ctr = n;
  9955. 8004246: 4a0d ldr r2, [pc, #52] ; (800427c <dec_lock+0x70>)
  9956. 8004248: 687b ldr r3, [r7, #4]
  9957. 800424a: 011b lsls r3, r3, #4
  9958. 800424c: 4413 add r3, r2
  9959. 800424e: 330c adds r3, #12
  9960. 8004250: 89fa ldrh r2, [r7, #14]
  9961. 8004252: 801a strh r2, [r3, #0]
  9962. if (n == 0) Files[i].fs = 0; /* Delete the entry if open count gets zero */
  9963. 8004254: 89fb ldrh r3, [r7, #14]
  9964. 8004256: 2b00 cmp r3, #0
  9965. 8004258: d105 bne.n 8004266 <dec_lock+0x5a>
  9966. 800425a: 4a08 ldr r2, [pc, #32] ; (800427c <dec_lock+0x70>)
  9967. 800425c: 687b ldr r3, [r7, #4]
  9968. 800425e: 011b lsls r3, r3, #4
  9969. 8004260: 4413 add r3, r2
  9970. 8004262: 2200 movs r2, #0
  9971. 8004264: 601a str r2, [r3, #0]
  9972. res = FR_OK;
  9973. 8004266: 2300 movs r3, #0
  9974. 8004268: 737b strb r3, [r7, #13]
  9975. 800426a: e001 b.n 8004270 <dec_lock+0x64>
  9976. } else {
  9977. res = FR_INT_ERR; /* Invalid index nunber */
  9978. 800426c: 2302 movs r3, #2
  9979. 800426e: 737b strb r3, [r7, #13]
  9980. }
  9981. return res;
  9982. 8004270: 7b7b ldrb r3, [r7, #13]
  9983. }
  9984. 8004272: 4618 mov r0, r3
  9985. 8004274: 3714 adds r7, #20
  9986. 8004276: 46bd mov sp, r7
  9987. 8004278: bc80 pop {r7}
  9988. 800427a: 4770 bx lr
  9989. 800427c: 200000b4 .word 0x200000b4
  9990. 08004280 <clear_lock>:
  9991. static
  9992. void clear_lock ( /* Clear lock entries of the volume */
  9993. FATFS *fs
  9994. )
  9995. {
  9996. 8004280: b480 push {r7}
  9997. 8004282: b085 sub sp, #20
  9998. 8004284: af00 add r7, sp, #0
  9999. 8004286: 6078 str r0, [r7, #4]
  10000. UINT i;
  10001. for (i = 0; i < _FS_LOCK; i++) {
  10002. 8004288: 2300 movs r3, #0
  10003. 800428a: 60fb str r3, [r7, #12]
  10004. 800428c: e010 b.n 80042b0 <clear_lock+0x30>
  10005. if (Files[i].fs == fs) Files[i].fs = 0;
  10006. 800428e: 4a0c ldr r2, [pc, #48] ; (80042c0 <clear_lock+0x40>)
  10007. 8004290: 68fb ldr r3, [r7, #12]
  10008. 8004292: 011b lsls r3, r3, #4
  10009. 8004294: 4413 add r3, r2
  10010. 8004296: 681b ldr r3, [r3, #0]
  10011. 8004298: 687a ldr r2, [r7, #4]
  10012. 800429a: 429a cmp r2, r3
  10013. 800429c: d105 bne.n 80042aa <clear_lock+0x2a>
  10014. 800429e: 4a08 ldr r2, [pc, #32] ; (80042c0 <clear_lock+0x40>)
  10015. 80042a0: 68fb ldr r3, [r7, #12]
  10016. 80042a2: 011b lsls r3, r3, #4
  10017. 80042a4: 4413 add r3, r2
  10018. 80042a6: 2200 movs r2, #0
  10019. 80042a8: 601a str r2, [r3, #0]
  10020. for (i = 0; i < _FS_LOCK; i++) {
  10021. 80042aa: 68fb ldr r3, [r7, #12]
  10022. 80042ac: 3301 adds r3, #1
  10023. 80042ae: 60fb str r3, [r7, #12]
  10024. 80042b0: 68fb ldr r3, [r7, #12]
  10025. 80042b2: 2b01 cmp r3, #1
  10026. 80042b4: d9eb bls.n 800428e <clear_lock+0xe>
  10027. }
  10028. }
  10029. 80042b6: bf00 nop
  10030. 80042b8: 3714 adds r7, #20
  10031. 80042ba: 46bd mov sp, r7
  10032. 80042bc: bc80 pop {r7}
  10033. 80042be: 4770 bx lr
  10034. 80042c0: 200000b4 .word 0x200000b4
  10035. 080042c4 <sync_window>:
  10036. #if !_FS_READONLY
  10037. static
  10038. FRESULT sync_window ( /* Returns FR_OK or FR_DISK_ERROR */
  10039. FATFS* fs /* File system object */
  10040. )
  10041. {
  10042. 80042c4: b580 push {r7, lr}
  10043. 80042c6: b086 sub sp, #24
  10044. 80042c8: af00 add r7, sp, #0
  10045. 80042ca: 6078 str r0, [r7, #4]
  10046. DWORD wsect;
  10047. UINT nf;
  10048. FRESULT res = FR_OK;
  10049. 80042cc: 2300 movs r3, #0
  10050. 80042ce: 73fb strb r3, [r7, #15]
  10051. if (fs->wflag) { /* Write back the sector if it is dirty */
  10052. 80042d0: 687b ldr r3, [r7, #4]
  10053. 80042d2: 78db ldrb r3, [r3, #3]
  10054. 80042d4: 2b00 cmp r3, #0
  10055. 80042d6: d034 beq.n 8004342 <sync_window+0x7e>
  10056. wsect = fs->winsect; /* Current sector number */
  10057. 80042d8: 687b ldr r3, [r7, #4]
  10058. 80042da: 6b5b ldr r3, [r3, #52] ; 0x34
  10059. 80042dc: 617b str r3, [r7, #20]
  10060. if (disk_write(fs->drv, fs->win, wsect, 1) != RES_OK) {
  10061. 80042de: 687b ldr r3, [r7, #4]
  10062. 80042e0: 7858 ldrb r0, [r3, #1]
  10063. 80042e2: 687b ldr r3, [r7, #4]
  10064. 80042e4: f103 0138 add.w r1, r3, #56 ; 0x38
  10065. 80042e8: 2301 movs r3, #1
  10066. 80042ea: 697a ldr r2, [r7, #20]
  10067. 80042ec: f7ff fd50 bl 8003d90 <disk_write>
  10068. 80042f0: 4603 mov r3, r0
  10069. 80042f2: 2b00 cmp r3, #0
  10070. 80042f4: d002 beq.n 80042fc <sync_window+0x38>
  10071. res = FR_DISK_ERR;
  10072. 80042f6: 2301 movs r3, #1
  10073. 80042f8: 73fb strb r3, [r7, #15]
  10074. 80042fa: e022 b.n 8004342 <sync_window+0x7e>
  10075. } else {
  10076. fs->wflag = 0;
  10077. 80042fc: 687b ldr r3, [r7, #4]
  10078. 80042fe: 2200 movs r2, #0
  10079. 8004300: 70da strb r2, [r3, #3]
  10080. if (wsect - fs->fatbase < fs->fsize) { /* Is it in the FAT area? */
  10081. 8004302: 687b ldr r3, [r7, #4]
  10082. 8004304: 6a9b ldr r3, [r3, #40] ; 0x28
  10083. 8004306: 697a ldr r2, [r7, #20]
  10084. 8004308: 1ad2 subs r2, r2, r3
  10085. 800430a: 687b ldr r3, [r7, #4]
  10086. 800430c: 6a1b ldr r3, [r3, #32]
  10087. 800430e: 429a cmp r2, r3
  10088. 8004310: d217 bcs.n 8004342 <sync_window+0x7e>
  10089. for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
  10090. 8004312: 687b ldr r3, [r7, #4]
  10091. 8004314: 789b ldrb r3, [r3, #2]
  10092. 8004316: 613b str r3, [r7, #16]
  10093. 8004318: e010 b.n 800433c <sync_window+0x78>
  10094. wsect += fs->fsize;
  10095. 800431a: 687b ldr r3, [r7, #4]
  10096. 800431c: 6a1b ldr r3, [r3, #32]
  10097. 800431e: 697a ldr r2, [r7, #20]
  10098. 8004320: 4413 add r3, r2
  10099. 8004322: 617b str r3, [r7, #20]
  10100. disk_write(fs->drv, fs->win, wsect, 1);
  10101. 8004324: 687b ldr r3, [r7, #4]
  10102. 8004326: 7858 ldrb r0, [r3, #1]
  10103. 8004328: 687b ldr r3, [r7, #4]
  10104. 800432a: f103 0138 add.w r1, r3, #56 ; 0x38
  10105. 800432e: 2301 movs r3, #1
  10106. 8004330: 697a ldr r2, [r7, #20]
  10107. 8004332: f7ff fd2d bl 8003d90 <disk_write>
  10108. for (nf = fs->n_fats; nf >= 2; nf--) { /* Reflect the change to all FAT copies */
  10109. 8004336: 693b ldr r3, [r7, #16]
  10110. 8004338: 3b01 subs r3, #1
  10111. 800433a: 613b str r3, [r7, #16]
  10112. 800433c: 693b ldr r3, [r7, #16]
  10113. 800433e: 2b01 cmp r3, #1
  10114. 8004340: d8eb bhi.n 800431a <sync_window+0x56>
  10115. }
  10116. }
  10117. }
  10118. }
  10119. return res;
  10120. 8004342: 7bfb ldrb r3, [r7, #15]
  10121. }
  10122. 8004344: 4618 mov r0, r3
  10123. 8004346: 3718 adds r7, #24
  10124. 8004348: 46bd mov sp, r7
  10125. 800434a: bd80 pop {r7, pc}
  10126. 0800434c <move_window>:
  10127. static
  10128. FRESULT move_window ( /* Returns FR_OK or FR_DISK_ERROR */
  10129. FATFS* fs, /* File system object */
  10130. DWORD sector /* Sector number to make appearance in the fs->win[] */
  10131. )
  10132. {
  10133. 800434c: b580 push {r7, lr}
  10134. 800434e: b084 sub sp, #16
  10135. 8004350: af00 add r7, sp, #0
  10136. 8004352: 6078 str r0, [r7, #4]
  10137. 8004354: 6039 str r1, [r7, #0]
  10138. FRESULT res = FR_OK;
  10139. 8004356: 2300 movs r3, #0
  10140. 8004358: 73fb strb r3, [r7, #15]
  10141. if (sector != fs->winsect) { /* Window offset changed? */
  10142. 800435a: 687b ldr r3, [r7, #4]
  10143. 800435c: 6b5b ldr r3, [r3, #52] ; 0x34
  10144. 800435e: 683a ldr r2, [r7, #0]
  10145. 8004360: 429a cmp r2, r3
  10146. 8004362: d01b beq.n 800439c <move_window+0x50>
  10147. #if !_FS_READONLY
  10148. res = sync_window(fs); /* Write-back changes */
  10149. 8004364: 6878 ldr r0, [r7, #4]
  10150. 8004366: f7ff ffad bl 80042c4 <sync_window>
  10151. 800436a: 4603 mov r3, r0
  10152. 800436c: 73fb strb r3, [r7, #15]
  10153. #endif
  10154. if (res == FR_OK) { /* Fill sector window with new data */
  10155. 800436e: 7bfb ldrb r3, [r7, #15]
  10156. 8004370: 2b00 cmp r3, #0
  10157. 8004372: d113 bne.n 800439c <move_window+0x50>
  10158. if (disk_read(fs->drv, fs->win, sector, 1) != RES_OK) {
  10159. 8004374: 687b ldr r3, [r7, #4]
  10160. 8004376: 7858 ldrb r0, [r3, #1]
  10161. 8004378: 687b ldr r3, [r7, #4]
  10162. 800437a: f103 0138 add.w r1, r3, #56 ; 0x38
  10163. 800437e: 2301 movs r3, #1
  10164. 8004380: 683a ldr r2, [r7, #0]
  10165. 8004382: f7ff fce5 bl 8003d50 <disk_read>
  10166. 8004386: 4603 mov r3, r0
  10167. 8004388: 2b00 cmp r3, #0
  10168. 800438a: d004 beq.n 8004396 <move_window+0x4a>
  10169. sector = 0xFFFFFFFF; /* Invalidate window if data is not reliable */
  10170. 800438c: f04f 33ff mov.w r3, #4294967295
  10171. 8004390: 603b str r3, [r7, #0]
  10172. res = FR_DISK_ERR;
  10173. 8004392: 2301 movs r3, #1
  10174. 8004394: 73fb strb r3, [r7, #15]
  10175. }
  10176. fs->winsect = sector;
  10177. 8004396: 687b ldr r3, [r7, #4]
  10178. 8004398: 683a ldr r2, [r7, #0]
  10179. 800439a: 635a str r2, [r3, #52] ; 0x34
  10180. }
  10181. }
  10182. return res;
  10183. 800439c: 7bfb ldrb r3, [r7, #15]
  10184. }
  10185. 800439e: 4618 mov r0, r3
  10186. 80043a0: 3710 adds r7, #16
  10187. 80043a2: 46bd mov sp, r7
  10188. 80043a4: bd80 pop {r7, pc}
  10189. ...
  10190. 080043a8 <sync_fs>:
  10191. static
  10192. FRESULT sync_fs ( /* FR_OK:succeeded, !=0:error */
  10193. FATFS* fs /* File system object */
  10194. )
  10195. {
  10196. 80043a8: b580 push {r7, lr}
  10197. 80043aa: b084 sub sp, #16
  10198. 80043ac: af00 add r7, sp, #0
  10199. 80043ae: 6078 str r0, [r7, #4]
  10200. FRESULT res;
  10201. res = sync_window(fs);
  10202. 80043b0: 6878 ldr r0, [r7, #4]
  10203. 80043b2: f7ff ff87 bl 80042c4 <sync_window>
  10204. 80043b6: 4603 mov r3, r0
  10205. 80043b8: 73fb strb r3, [r7, #15]
  10206. if (res == FR_OK) {
  10207. 80043ba: 7bfb ldrb r3, [r7, #15]
  10208. 80043bc: 2b00 cmp r3, #0
  10209. 80043be: d159 bne.n 8004474 <sync_fs+0xcc>
  10210. /* Update FSInfo sector if needed */
  10211. if (fs->fs_type == FS_FAT32 && fs->fsi_flag == 1) {
  10212. 80043c0: 687b ldr r3, [r7, #4]
  10213. 80043c2: 781b ldrb r3, [r3, #0]
  10214. 80043c4: 2b03 cmp r3, #3
  10215. 80043c6: d149 bne.n 800445c <sync_fs+0xb4>
  10216. 80043c8: 687b ldr r3, [r7, #4]
  10217. 80043ca: 791b ldrb r3, [r3, #4]
  10218. 80043cc: 2b01 cmp r3, #1
  10219. 80043ce: d145 bne.n 800445c <sync_fs+0xb4>
  10220. /* Create FSInfo structure */
  10221. mem_set(fs->win, 0, SS(fs));
  10222. 80043d0: 687b ldr r3, [r7, #4]
  10223. 80043d2: f103 0038 add.w r0, r3, #56 ; 0x38
  10224. 80043d6: 687b ldr r3, [r7, #4]
  10225. 80043d8: 899b ldrh r3, [r3, #12]
  10226. 80043da: 461a mov r2, r3
  10227. 80043dc: 2100 movs r1, #0
  10228. 80043de: f7ff fdb3 bl 8003f48 <mem_set>
  10229. st_word(fs->win + BS_55AA, 0xAA55);
  10230. 80043e2: 687b ldr r3, [r7, #4]
  10231. 80043e4: 3338 adds r3, #56 ; 0x38
  10232. 80043e6: f503 73ff add.w r3, r3, #510 ; 0x1fe
  10233. 80043ea: f64a 2155 movw r1, #43605 ; 0xaa55
  10234. 80043ee: 4618 mov r0, r3
  10235. 80043f0: f7ff fd45 bl 8003e7e <st_word>
  10236. st_dword(fs->win + FSI_LeadSig, 0x41615252);
  10237. 80043f4: 687b ldr r3, [r7, #4]
  10238. 80043f6: 3338 adds r3, #56 ; 0x38
  10239. 80043f8: 4921 ldr r1, [pc, #132] ; (8004480 <sync_fs+0xd8>)
  10240. 80043fa: 4618 mov r0, r3
  10241. 80043fc: f7ff fd59 bl 8003eb2 <st_dword>
  10242. st_dword(fs->win + FSI_StrucSig, 0x61417272);
  10243. 8004400: 687b ldr r3, [r7, #4]
  10244. 8004402: 3338 adds r3, #56 ; 0x38
  10245. 8004404: f503 73f2 add.w r3, r3, #484 ; 0x1e4
  10246. 8004408: 491e ldr r1, [pc, #120] ; (8004484 <sync_fs+0xdc>)
  10247. 800440a: 4618 mov r0, r3
  10248. 800440c: f7ff fd51 bl 8003eb2 <st_dword>
  10249. st_dword(fs->win + FSI_Free_Count, fs->free_clst);
  10250. 8004410: 687b ldr r3, [r7, #4]
  10251. 8004412: 3338 adds r3, #56 ; 0x38
  10252. 8004414: f503 72f4 add.w r2, r3, #488 ; 0x1e8
  10253. 8004418: 687b ldr r3, [r7, #4]
  10254. 800441a: 699b ldr r3, [r3, #24]
  10255. 800441c: 4619 mov r1, r3
  10256. 800441e: 4610 mov r0, r2
  10257. 8004420: f7ff fd47 bl 8003eb2 <st_dword>
  10258. st_dword(fs->win + FSI_Nxt_Free, fs->last_clst);
  10259. 8004424: 687b ldr r3, [r7, #4]
  10260. 8004426: 3338 adds r3, #56 ; 0x38
  10261. 8004428: f503 72f6 add.w r2, r3, #492 ; 0x1ec
  10262. 800442c: 687b ldr r3, [r7, #4]
  10263. 800442e: 695b ldr r3, [r3, #20]
  10264. 8004430: 4619 mov r1, r3
  10265. 8004432: 4610 mov r0, r2
  10266. 8004434: f7ff fd3d bl 8003eb2 <st_dword>
  10267. /* Write it into the FSInfo sector */
  10268. fs->winsect = fs->volbase + 1;
  10269. 8004438: 687b ldr r3, [r7, #4]
  10270. 800443a: 6a5b ldr r3, [r3, #36] ; 0x24
  10271. 800443c: 1c5a adds r2, r3, #1
  10272. 800443e: 687b ldr r3, [r7, #4]
  10273. 8004440: 635a str r2, [r3, #52] ; 0x34
  10274. disk_write(fs->drv, fs->win, fs->winsect, 1);
  10275. 8004442: 687b ldr r3, [r7, #4]
  10276. 8004444: 7858 ldrb r0, [r3, #1]
  10277. 8004446: 687b ldr r3, [r7, #4]
  10278. 8004448: f103 0138 add.w r1, r3, #56 ; 0x38
  10279. 800444c: 687b ldr r3, [r7, #4]
  10280. 800444e: 6b5a ldr r2, [r3, #52] ; 0x34
  10281. 8004450: 2301 movs r3, #1
  10282. 8004452: f7ff fc9d bl 8003d90 <disk_write>
  10283. fs->fsi_flag = 0;
  10284. 8004456: 687b ldr r3, [r7, #4]
  10285. 8004458: 2200 movs r2, #0
  10286. 800445a: 711a strb r2, [r3, #4]
  10287. }
  10288. /* Make sure that no pending write process in the physical drive */
  10289. if (disk_ioctl(fs->drv, CTRL_SYNC, 0) != RES_OK) res = FR_DISK_ERR;
  10290. 800445c: 687b ldr r3, [r7, #4]
  10291. 800445e: 785b ldrb r3, [r3, #1]
  10292. 8004460: 2200 movs r2, #0
  10293. 8004462: 2100 movs r1, #0
  10294. 8004464: 4618 mov r0, r3
  10295. 8004466: f7ff fcb3 bl 8003dd0 <disk_ioctl>
  10296. 800446a: 4603 mov r3, r0
  10297. 800446c: 2b00 cmp r3, #0
  10298. 800446e: d001 beq.n 8004474 <sync_fs+0xcc>
  10299. 8004470: 2301 movs r3, #1
  10300. 8004472: 73fb strb r3, [r7, #15]
  10301. }
  10302. return res;
  10303. 8004474: 7bfb ldrb r3, [r7, #15]
  10304. }
  10305. 8004476: 4618 mov r0, r3
  10306. 8004478: 3710 adds r7, #16
  10307. 800447a: 46bd mov sp, r7
  10308. 800447c: bd80 pop {r7, pc}
  10309. 800447e: bf00 nop
  10310. 8004480: 41615252 .word 0x41615252
  10311. 8004484: 61417272 .word 0x61417272
  10312. 08004488 <clust2sect>:
  10313. static
  10314. DWORD clust2sect ( /* !=0:Sector number, 0:Failed (invalid cluster#) */
  10315. FATFS* fs, /* File system object */
  10316. DWORD clst /* Cluster# to be converted */
  10317. )
  10318. {
  10319. 8004488: b480 push {r7}
  10320. 800448a: b083 sub sp, #12
  10321. 800448c: af00 add r7, sp, #0
  10322. 800448e: 6078 str r0, [r7, #4]
  10323. 8004490: 6039 str r1, [r7, #0]
  10324. clst -= 2;
  10325. 8004492: 683b ldr r3, [r7, #0]
  10326. 8004494: 3b02 subs r3, #2
  10327. 8004496: 603b str r3, [r7, #0]
  10328. if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */
  10329. 8004498: 687b ldr r3, [r7, #4]
  10330. 800449a: 69db ldr r3, [r3, #28]
  10331. 800449c: 3b02 subs r3, #2
  10332. 800449e: 683a ldr r2, [r7, #0]
  10333. 80044a0: 429a cmp r2, r3
  10334. 80044a2: d301 bcc.n 80044a8 <clust2sect+0x20>
  10335. 80044a4: 2300 movs r3, #0
  10336. 80044a6: e008 b.n 80044ba <clust2sect+0x32>
  10337. return clst * fs->csize + fs->database;
  10338. 80044a8: 687b ldr r3, [r7, #4]
  10339. 80044aa: 895b ldrh r3, [r3, #10]
  10340. 80044ac: 461a mov r2, r3
  10341. 80044ae: 683b ldr r3, [r7, #0]
  10342. 80044b0: fb03 f202 mul.w r2, r3, r2
  10343. 80044b4: 687b ldr r3, [r7, #4]
  10344. 80044b6: 6b1b ldr r3, [r3, #48] ; 0x30
  10345. 80044b8: 4413 add r3, r2
  10346. }
  10347. 80044ba: 4618 mov r0, r3
  10348. 80044bc: 370c adds r7, #12
  10349. 80044be: 46bd mov sp, r7
  10350. 80044c0: bc80 pop {r7}
  10351. 80044c2: 4770 bx lr
  10352. 080044c4 <get_fat>:
  10353. static
  10354. DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x7FFFFFFF:Cluster status */
  10355. _FDID* obj, /* Corresponding object */
  10356. DWORD clst /* Cluster number to get the value */
  10357. )
  10358. {
  10359. 80044c4: b580 push {r7, lr}
  10360. 80044c6: b086 sub sp, #24
  10361. 80044c8: af00 add r7, sp, #0
  10362. 80044ca: 6078 str r0, [r7, #4]
  10363. 80044cc: 6039 str r1, [r7, #0]
  10364. UINT wc, bc;
  10365. DWORD val;
  10366. FATFS *fs = obj->fs;
  10367. 80044ce: 687b ldr r3, [r7, #4]
  10368. 80044d0: 681b ldr r3, [r3, #0]
  10369. 80044d2: 613b str r3, [r7, #16]
  10370. if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */
  10371. 80044d4: 683b ldr r3, [r7, #0]
  10372. 80044d6: 2b01 cmp r3, #1
  10373. 80044d8: d904 bls.n 80044e4 <get_fat+0x20>
  10374. 80044da: 693b ldr r3, [r7, #16]
  10375. 80044dc: 69db ldr r3, [r3, #28]
  10376. 80044de: 683a ldr r2, [r7, #0]
  10377. 80044e0: 429a cmp r2, r3
  10378. 80044e2: d302 bcc.n 80044ea <get_fat+0x26>
  10379. val = 1; /* Internal error */
  10380. 80044e4: 2301 movs r3, #1
  10381. 80044e6: 617b str r3, [r7, #20]
  10382. 80044e8: e0b7 b.n 800465a <get_fat+0x196>
  10383. } else {
  10384. val = 0xFFFFFFFF; /* Default value falls on disk error */
  10385. 80044ea: f04f 33ff mov.w r3, #4294967295
  10386. 80044ee: 617b str r3, [r7, #20]
  10387. switch (fs->fs_type) {
  10388. 80044f0: 693b ldr r3, [r7, #16]
  10389. 80044f2: 781b ldrb r3, [r3, #0]
  10390. 80044f4: 2b02 cmp r3, #2
  10391. 80044f6: d05a beq.n 80045ae <get_fat+0xea>
  10392. 80044f8: 2b03 cmp r3, #3
  10393. 80044fa: d07d beq.n 80045f8 <get_fat+0x134>
  10394. 80044fc: 2b01 cmp r3, #1
  10395. 80044fe: f040 80a2 bne.w 8004646 <get_fat+0x182>
  10396. case FS_FAT12 :
  10397. bc = (UINT)clst; bc += bc / 2;
  10398. 8004502: 683b ldr r3, [r7, #0]
  10399. 8004504: 60fb str r3, [r7, #12]
  10400. 8004506: 68fb ldr r3, [r7, #12]
  10401. 8004508: 085b lsrs r3, r3, #1
  10402. 800450a: 68fa ldr r2, [r7, #12]
  10403. 800450c: 4413 add r3, r2
  10404. 800450e: 60fb str r3, [r7, #12]
  10405. if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
  10406. 8004510: 693b ldr r3, [r7, #16]
  10407. 8004512: 6a9a ldr r2, [r3, #40] ; 0x28
  10408. 8004514: 693b ldr r3, [r7, #16]
  10409. 8004516: 899b ldrh r3, [r3, #12]
  10410. 8004518: 4619 mov r1, r3
  10411. 800451a: 68fb ldr r3, [r7, #12]
  10412. 800451c: fbb3 f3f1 udiv r3, r3, r1
  10413. 8004520: 4413 add r3, r2
  10414. 8004522: 4619 mov r1, r3
  10415. 8004524: 6938 ldr r0, [r7, #16]
  10416. 8004526: f7ff ff11 bl 800434c <move_window>
  10417. 800452a: 4603 mov r3, r0
  10418. 800452c: 2b00 cmp r3, #0
  10419. 800452e: f040 808d bne.w 800464c <get_fat+0x188>
  10420. wc = fs->win[bc++ % SS(fs)];
  10421. 8004532: 68fb ldr r3, [r7, #12]
  10422. 8004534: 1c5a adds r2, r3, #1
  10423. 8004536: 60fa str r2, [r7, #12]
  10424. 8004538: 693a ldr r2, [r7, #16]
  10425. 800453a: 8992 ldrh r2, [r2, #12]
  10426. 800453c: fbb3 f1f2 udiv r1, r3, r2
  10427. 8004540: fb02 f201 mul.w r2, r2, r1
  10428. 8004544: 1a9b subs r3, r3, r2
  10429. 8004546: 693a ldr r2, [r7, #16]
  10430. 8004548: 4413 add r3, r2
  10431. 800454a: f893 3038 ldrb.w r3, [r3, #56] ; 0x38
  10432. 800454e: 60bb str r3, [r7, #8]
  10433. if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
  10434. 8004550: 693b ldr r3, [r7, #16]
  10435. 8004552: 6a9a ldr r2, [r3, #40] ; 0x28
  10436. 8004554: 693b ldr r3, [r7, #16]
  10437. 8004556: 899b ldrh r3, [r3, #12]
  10438. 8004558: 4619 mov r1, r3
  10439. 800455a: 68fb ldr r3, [r7, #12]
  10440. 800455c: fbb3 f3f1 udiv r3, r3, r1
  10441. 8004560: 4413 add r3, r2
  10442. 8004562: 4619 mov r1, r3
  10443. 8004564: 6938 ldr r0, [r7, #16]
  10444. 8004566: f7ff fef1 bl 800434c <move_window>
  10445. 800456a: 4603 mov r3, r0
  10446. 800456c: 2b00 cmp r3, #0
  10447. 800456e: d16f bne.n 8004650 <get_fat+0x18c>
  10448. wc |= fs->win[bc % SS(fs)] << 8;
  10449. 8004570: 693b ldr r3, [r7, #16]
  10450. 8004572: 899b ldrh r3, [r3, #12]
  10451. 8004574: 461a mov r2, r3
  10452. 8004576: 68fb ldr r3, [r7, #12]
  10453. 8004578: fbb3 f1f2 udiv r1, r3, r2
  10454. 800457c: fb02 f201 mul.w r2, r2, r1
  10455. 8004580: 1a9b subs r3, r3, r2
  10456. 8004582: 693a ldr r2, [r7, #16]
  10457. 8004584: 4413 add r3, r2
  10458. 8004586: f893 3038 ldrb.w r3, [r3, #56] ; 0x38
  10459. 800458a: 021b lsls r3, r3, #8
  10460. 800458c: 461a mov r2, r3
  10461. 800458e: 68bb ldr r3, [r7, #8]
  10462. 8004590: 4313 orrs r3, r2
  10463. 8004592: 60bb str r3, [r7, #8]
  10464. val = (clst & 1) ? (wc >> 4) : (wc & 0xFFF);
  10465. 8004594: 683b ldr r3, [r7, #0]
  10466. 8004596: f003 0301 and.w r3, r3, #1
  10467. 800459a: 2b00 cmp r3, #0
  10468. 800459c: d002 beq.n 80045a4 <get_fat+0xe0>
  10469. 800459e: 68bb ldr r3, [r7, #8]
  10470. 80045a0: 091b lsrs r3, r3, #4
  10471. 80045a2: e002 b.n 80045aa <get_fat+0xe6>
  10472. 80045a4: 68bb ldr r3, [r7, #8]
  10473. 80045a6: f3c3 030b ubfx r3, r3, #0, #12
  10474. 80045aa: 617b str r3, [r7, #20]
  10475. break;
  10476. 80045ac: e055 b.n 800465a <get_fat+0x196>
  10477. case FS_FAT16 :
  10478. if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
  10479. 80045ae: 693b ldr r3, [r7, #16]
  10480. 80045b0: 6a9a ldr r2, [r3, #40] ; 0x28
  10481. 80045b2: 693b ldr r3, [r7, #16]
  10482. 80045b4: 899b ldrh r3, [r3, #12]
  10483. 80045b6: 085b lsrs r3, r3, #1
  10484. 80045b8: b29b uxth r3, r3
  10485. 80045ba: 4619 mov r1, r3
  10486. 80045bc: 683b ldr r3, [r7, #0]
  10487. 80045be: fbb3 f3f1 udiv r3, r3, r1
  10488. 80045c2: 4413 add r3, r2
  10489. 80045c4: 4619 mov r1, r3
  10490. 80045c6: 6938 ldr r0, [r7, #16]
  10491. 80045c8: f7ff fec0 bl 800434c <move_window>
  10492. 80045cc: 4603 mov r3, r0
  10493. 80045ce: 2b00 cmp r3, #0
  10494. 80045d0: d140 bne.n 8004654 <get_fat+0x190>
  10495. val = ld_word(fs->win + clst * 2 % SS(fs));
  10496. 80045d2: 693b ldr r3, [r7, #16]
  10497. 80045d4: f103 0138 add.w r1, r3, #56 ; 0x38
  10498. 80045d8: 683b ldr r3, [r7, #0]
  10499. 80045da: 005b lsls r3, r3, #1
  10500. 80045dc: 693a ldr r2, [r7, #16]
  10501. 80045de: 8992 ldrh r2, [r2, #12]
  10502. 80045e0: fbb3 f0f2 udiv r0, r3, r2
  10503. 80045e4: fb02 f200 mul.w r2, r2, r0
  10504. 80045e8: 1a9b subs r3, r3, r2
  10505. 80045ea: 440b add r3, r1
  10506. 80045ec: 4618 mov r0, r3
  10507. 80045ee: f7ff fc0d bl 8003e0c <ld_word>
  10508. 80045f2: 4603 mov r3, r0
  10509. 80045f4: 617b str r3, [r7, #20]
  10510. break;
  10511. 80045f6: e030 b.n 800465a <get_fat+0x196>
  10512. case FS_FAT32 :
  10513. if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
  10514. 80045f8: 693b ldr r3, [r7, #16]
  10515. 80045fa: 6a9a ldr r2, [r3, #40] ; 0x28
  10516. 80045fc: 693b ldr r3, [r7, #16]
  10517. 80045fe: 899b ldrh r3, [r3, #12]
  10518. 8004600: 089b lsrs r3, r3, #2
  10519. 8004602: b29b uxth r3, r3
  10520. 8004604: 4619 mov r1, r3
  10521. 8004606: 683b ldr r3, [r7, #0]
  10522. 8004608: fbb3 f3f1 udiv r3, r3, r1
  10523. 800460c: 4413 add r3, r2
  10524. 800460e: 4619 mov r1, r3
  10525. 8004610: 6938 ldr r0, [r7, #16]
  10526. 8004612: f7ff fe9b bl 800434c <move_window>
  10527. 8004616: 4603 mov r3, r0
  10528. 8004618: 2b00 cmp r3, #0
  10529. 800461a: d11d bne.n 8004658 <get_fat+0x194>
  10530. val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF;
  10531. 800461c: 693b ldr r3, [r7, #16]
  10532. 800461e: f103 0138 add.w r1, r3, #56 ; 0x38
  10533. 8004622: 683b ldr r3, [r7, #0]
  10534. 8004624: 009b lsls r3, r3, #2
  10535. 8004626: 693a ldr r2, [r7, #16]
  10536. 8004628: 8992 ldrh r2, [r2, #12]
  10537. 800462a: fbb3 f0f2 udiv r0, r3, r2
  10538. 800462e: fb02 f200 mul.w r2, r2, r0
  10539. 8004632: 1a9b subs r3, r3, r2
  10540. 8004634: 440b add r3, r1
  10541. 8004636: 4618 mov r0, r3
  10542. 8004638: f7ff fbff bl 8003e3a <ld_dword>
  10543. 800463c: 4603 mov r3, r0
  10544. 800463e: f023 4370 bic.w r3, r3, #4026531840 ; 0xf0000000
  10545. 8004642: 617b str r3, [r7, #20]
  10546. break;
  10547. 8004644: e009 b.n 800465a <get_fat+0x196>
  10548. }
  10549. }
  10550. /* go to default */
  10551. #endif
  10552. default:
  10553. val = 1; /* Internal error */
  10554. 8004646: 2301 movs r3, #1
  10555. 8004648: 617b str r3, [r7, #20]
  10556. 800464a: e006 b.n 800465a <get_fat+0x196>
  10557. if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
  10558. 800464c: bf00 nop
  10559. 800464e: e004 b.n 800465a <get_fat+0x196>
  10560. if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
  10561. 8004650: bf00 nop
  10562. 8004652: e002 b.n 800465a <get_fat+0x196>
  10563. if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
  10564. 8004654: bf00 nop
  10565. 8004656: e000 b.n 800465a <get_fat+0x196>
  10566. if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
  10567. 8004658: bf00 nop
  10568. }
  10569. }
  10570. return val;
  10571. 800465a: 697b ldr r3, [r7, #20]
  10572. }
  10573. 800465c: 4618 mov r0, r3
  10574. 800465e: 3718 adds r7, #24
  10575. 8004660: 46bd mov sp, r7
  10576. 8004662: bd80 pop {r7, pc}
  10577. 08004664 <put_fat>:
  10578. FRESULT put_fat ( /* FR_OK(0):succeeded, !=0:error */
  10579. FATFS* fs, /* Corresponding file system object */
  10580. DWORD clst, /* FAT index number (cluster number) to be changed */
  10581. DWORD val /* New value to be set to the entry */
  10582. )
  10583. {
  10584. 8004664: b590 push {r4, r7, lr}
  10585. 8004666: b089 sub sp, #36 ; 0x24
  10586. 8004668: af00 add r7, sp, #0
  10587. 800466a: 60f8 str r0, [r7, #12]
  10588. 800466c: 60b9 str r1, [r7, #8]
  10589. 800466e: 607a str r2, [r7, #4]
  10590. UINT bc;
  10591. BYTE *p;
  10592. FRESULT res = FR_INT_ERR;
  10593. 8004670: 2302 movs r3, #2
  10594. 8004672: 77fb strb r3, [r7, #31]
  10595. if (clst >= 2 && clst < fs->n_fatent) { /* Check if in valid range */
  10596. 8004674: 68bb ldr r3, [r7, #8]
  10597. 8004676: 2b01 cmp r3, #1
  10598. 8004678: f240 8106 bls.w 8004888 <put_fat+0x224>
  10599. 800467c: 68fb ldr r3, [r7, #12]
  10600. 800467e: 69db ldr r3, [r3, #28]
  10601. 8004680: 68ba ldr r2, [r7, #8]
  10602. 8004682: 429a cmp r2, r3
  10603. 8004684: f080 8100 bcs.w 8004888 <put_fat+0x224>
  10604. switch (fs->fs_type) {
  10605. 8004688: 68fb ldr r3, [r7, #12]
  10606. 800468a: 781b ldrb r3, [r3, #0]
  10607. 800468c: 2b02 cmp r3, #2
  10608. 800468e: f000 8088 beq.w 80047a2 <put_fat+0x13e>
  10609. 8004692: 2b03 cmp r3, #3
  10610. 8004694: f000 80b0 beq.w 80047f8 <put_fat+0x194>
  10611. 8004698: 2b01 cmp r3, #1
  10612. 800469a: f040 80f5 bne.w 8004888 <put_fat+0x224>
  10613. case FS_FAT12 : /* Bitfield items */
  10614. bc = (UINT)clst; bc += bc / 2;
  10615. 800469e: 68bb ldr r3, [r7, #8]
  10616. 80046a0: 61bb str r3, [r7, #24]
  10617. 80046a2: 69bb ldr r3, [r7, #24]
  10618. 80046a4: 085b lsrs r3, r3, #1
  10619. 80046a6: 69ba ldr r2, [r7, #24]
  10620. 80046a8: 4413 add r3, r2
  10621. 80046aa: 61bb str r3, [r7, #24]
  10622. res = move_window(fs, fs->fatbase + (bc / SS(fs)));
  10623. 80046ac: 68fb ldr r3, [r7, #12]
  10624. 80046ae: 6a9a ldr r2, [r3, #40] ; 0x28
  10625. 80046b0: 68fb ldr r3, [r7, #12]
  10626. 80046b2: 899b ldrh r3, [r3, #12]
  10627. 80046b4: 4619 mov r1, r3
  10628. 80046b6: 69bb ldr r3, [r7, #24]
  10629. 80046b8: fbb3 f3f1 udiv r3, r3, r1
  10630. 80046bc: 4413 add r3, r2
  10631. 80046be: 4619 mov r1, r3
  10632. 80046c0: 68f8 ldr r0, [r7, #12]
  10633. 80046c2: f7ff fe43 bl 800434c <move_window>
  10634. 80046c6: 4603 mov r3, r0
  10635. 80046c8: 77fb strb r3, [r7, #31]
  10636. if (res != FR_OK) break;
  10637. 80046ca: 7ffb ldrb r3, [r7, #31]
  10638. 80046cc: 2b00 cmp r3, #0
  10639. 80046ce: f040 80d4 bne.w 800487a <put_fat+0x216>
  10640. p = fs->win + bc++ % SS(fs);
  10641. 80046d2: 68fb ldr r3, [r7, #12]
  10642. 80046d4: f103 0138 add.w r1, r3, #56 ; 0x38
  10643. 80046d8: 69bb ldr r3, [r7, #24]
  10644. 80046da: 1c5a adds r2, r3, #1
  10645. 80046dc: 61ba str r2, [r7, #24]
  10646. 80046de: 68fa ldr r2, [r7, #12]
  10647. 80046e0: 8992 ldrh r2, [r2, #12]
  10648. 80046e2: fbb3 f0f2 udiv r0, r3, r2
  10649. 80046e6: fb02 f200 mul.w r2, r2, r0
  10650. 80046ea: 1a9b subs r3, r3, r2
  10651. 80046ec: 440b add r3, r1
  10652. 80046ee: 617b str r3, [r7, #20]
  10653. *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
  10654. 80046f0: 68bb ldr r3, [r7, #8]
  10655. 80046f2: f003 0301 and.w r3, r3, #1
  10656. 80046f6: 2b00 cmp r3, #0
  10657. 80046f8: d00d beq.n 8004716 <put_fat+0xb2>
  10658. 80046fa: 697b ldr r3, [r7, #20]
  10659. 80046fc: 781b ldrb r3, [r3, #0]
  10660. 80046fe: b25b sxtb r3, r3
  10661. 8004700: f003 030f and.w r3, r3, #15
  10662. 8004704: b25a sxtb r2, r3
  10663. 8004706: 687b ldr r3, [r7, #4]
  10664. 8004708: b2db uxtb r3, r3
  10665. 800470a: 011b lsls r3, r3, #4
  10666. 800470c: b25b sxtb r3, r3
  10667. 800470e: 4313 orrs r3, r2
  10668. 8004710: b25b sxtb r3, r3
  10669. 8004712: b2db uxtb r3, r3
  10670. 8004714: e001 b.n 800471a <put_fat+0xb6>
  10671. 8004716: 687b ldr r3, [r7, #4]
  10672. 8004718: b2db uxtb r3, r3
  10673. 800471a: 697a ldr r2, [r7, #20]
  10674. 800471c: 7013 strb r3, [r2, #0]
  10675. fs->wflag = 1;
  10676. 800471e: 68fb ldr r3, [r7, #12]
  10677. 8004720: 2201 movs r2, #1
  10678. 8004722: 70da strb r2, [r3, #3]
  10679. res = move_window(fs, fs->fatbase + (bc / SS(fs)));
  10680. 8004724: 68fb ldr r3, [r7, #12]
  10681. 8004726: 6a9a ldr r2, [r3, #40] ; 0x28
  10682. 8004728: 68fb ldr r3, [r7, #12]
  10683. 800472a: 899b ldrh r3, [r3, #12]
  10684. 800472c: 4619 mov r1, r3
  10685. 800472e: 69bb ldr r3, [r7, #24]
  10686. 8004730: fbb3 f3f1 udiv r3, r3, r1
  10687. 8004734: 4413 add r3, r2
  10688. 8004736: 4619 mov r1, r3
  10689. 8004738: 68f8 ldr r0, [r7, #12]
  10690. 800473a: f7ff fe07 bl 800434c <move_window>
  10691. 800473e: 4603 mov r3, r0
  10692. 8004740: 77fb strb r3, [r7, #31]
  10693. if (res != FR_OK) break;
  10694. 8004742: 7ffb ldrb r3, [r7, #31]
  10695. 8004744: 2b00 cmp r3, #0
  10696. 8004746: f040 809a bne.w 800487e <put_fat+0x21a>
  10697. p = fs->win + bc % SS(fs);
  10698. 800474a: 68fb ldr r3, [r7, #12]
  10699. 800474c: f103 0138 add.w r1, r3, #56 ; 0x38
  10700. 8004750: 68fb ldr r3, [r7, #12]
  10701. 8004752: 899b ldrh r3, [r3, #12]
  10702. 8004754: 461a mov r2, r3
  10703. 8004756: 69bb ldr r3, [r7, #24]
  10704. 8004758: fbb3 f0f2 udiv r0, r3, r2
  10705. 800475c: fb02 f200 mul.w r2, r2, r0
  10706. 8004760: 1a9b subs r3, r3, r2
  10707. 8004762: 440b add r3, r1
  10708. 8004764: 617b str r3, [r7, #20]
  10709. *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
  10710. 8004766: 68bb ldr r3, [r7, #8]
  10711. 8004768: f003 0301 and.w r3, r3, #1
  10712. 800476c: 2b00 cmp r3, #0
  10713. 800476e: d003 beq.n 8004778 <put_fat+0x114>
  10714. 8004770: 687b ldr r3, [r7, #4]
  10715. 8004772: 091b lsrs r3, r3, #4
  10716. 8004774: b2db uxtb r3, r3
  10717. 8004776: e00e b.n 8004796 <put_fat+0x132>
  10718. 8004778: 697b ldr r3, [r7, #20]
  10719. 800477a: 781b ldrb r3, [r3, #0]
  10720. 800477c: b25b sxtb r3, r3
  10721. 800477e: f023 030f bic.w r3, r3, #15
  10722. 8004782: b25a sxtb r2, r3
  10723. 8004784: 687b ldr r3, [r7, #4]
  10724. 8004786: 0a1b lsrs r3, r3, #8
  10725. 8004788: b25b sxtb r3, r3
  10726. 800478a: f003 030f and.w r3, r3, #15
  10727. 800478e: b25b sxtb r3, r3
  10728. 8004790: 4313 orrs r3, r2
  10729. 8004792: b25b sxtb r3, r3
  10730. 8004794: b2db uxtb r3, r3
  10731. 8004796: 697a ldr r2, [r7, #20]
  10732. 8004798: 7013 strb r3, [r2, #0]
  10733. fs->wflag = 1;
  10734. 800479a: 68fb ldr r3, [r7, #12]
  10735. 800479c: 2201 movs r2, #1
  10736. 800479e: 70da strb r2, [r3, #3]
  10737. break;
  10738. 80047a0: e072 b.n 8004888 <put_fat+0x224>
  10739. case FS_FAT16 : /* WORD aligned items */
  10740. res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));
  10741. 80047a2: 68fb ldr r3, [r7, #12]
  10742. 80047a4: 6a9a ldr r2, [r3, #40] ; 0x28
  10743. 80047a6: 68fb ldr r3, [r7, #12]
  10744. 80047a8: 899b ldrh r3, [r3, #12]
  10745. 80047aa: 085b lsrs r3, r3, #1
  10746. 80047ac: b29b uxth r3, r3
  10747. 80047ae: 4619 mov r1, r3
  10748. 80047b0: 68bb ldr r3, [r7, #8]
  10749. 80047b2: fbb3 f3f1 udiv r3, r3, r1
  10750. 80047b6: 4413 add r3, r2
  10751. 80047b8: 4619 mov r1, r3
  10752. 80047ba: 68f8 ldr r0, [r7, #12]
  10753. 80047bc: f7ff fdc6 bl 800434c <move_window>
  10754. 80047c0: 4603 mov r3, r0
  10755. 80047c2: 77fb strb r3, [r7, #31]
  10756. if (res != FR_OK) break;
  10757. 80047c4: 7ffb ldrb r3, [r7, #31]
  10758. 80047c6: 2b00 cmp r3, #0
  10759. 80047c8: d15b bne.n 8004882 <put_fat+0x21e>
  10760. st_word(fs->win + clst * 2 % SS(fs), (WORD)val);
  10761. 80047ca: 68fb ldr r3, [r7, #12]
  10762. 80047cc: f103 0138 add.w r1, r3, #56 ; 0x38
  10763. 80047d0: 68bb ldr r3, [r7, #8]
  10764. 80047d2: 005b lsls r3, r3, #1
  10765. 80047d4: 68fa ldr r2, [r7, #12]
  10766. 80047d6: 8992 ldrh r2, [r2, #12]
  10767. 80047d8: fbb3 f0f2 udiv r0, r3, r2
  10768. 80047dc: fb02 f200 mul.w r2, r2, r0
  10769. 80047e0: 1a9b subs r3, r3, r2
  10770. 80047e2: 440b add r3, r1
  10771. 80047e4: 687a ldr r2, [r7, #4]
  10772. 80047e6: b292 uxth r2, r2
  10773. 80047e8: 4611 mov r1, r2
  10774. 80047ea: 4618 mov r0, r3
  10775. 80047ec: f7ff fb47 bl 8003e7e <st_word>
  10776. fs->wflag = 1;
  10777. 80047f0: 68fb ldr r3, [r7, #12]
  10778. 80047f2: 2201 movs r2, #1
  10779. 80047f4: 70da strb r2, [r3, #3]
  10780. break;
  10781. 80047f6: e047 b.n 8004888 <put_fat+0x224>
  10782. case FS_FAT32 : /* DWORD aligned items */
  10783. #if _FS_EXFAT
  10784. case FS_EXFAT :
  10785. #endif
  10786. res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));
  10787. 80047f8: 68fb ldr r3, [r7, #12]
  10788. 80047fa: 6a9a ldr r2, [r3, #40] ; 0x28
  10789. 80047fc: 68fb ldr r3, [r7, #12]
  10790. 80047fe: 899b ldrh r3, [r3, #12]
  10791. 8004800: 089b lsrs r3, r3, #2
  10792. 8004802: b29b uxth r3, r3
  10793. 8004804: 4619 mov r1, r3
  10794. 8004806: 68bb ldr r3, [r7, #8]
  10795. 8004808: fbb3 f3f1 udiv r3, r3, r1
  10796. 800480c: 4413 add r3, r2
  10797. 800480e: 4619 mov r1, r3
  10798. 8004810: 68f8 ldr r0, [r7, #12]
  10799. 8004812: f7ff fd9b bl 800434c <move_window>
  10800. 8004816: 4603 mov r3, r0
  10801. 8004818: 77fb strb r3, [r7, #31]
  10802. if (res != FR_OK) break;
  10803. 800481a: 7ffb ldrb r3, [r7, #31]
  10804. 800481c: 2b00 cmp r3, #0
  10805. 800481e: d132 bne.n 8004886 <put_fat+0x222>
  10806. if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
  10807. val = (val & 0x0FFFFFFF) | (ld_dword(fs->win + clst * 4 % SS(fs)) & 0xF0000000);
  10808. 8004820: 687b ldr r3, [r7, #4]
  10809. 8004822: f023 4470 bic.w r4, r3, #4026531840 ; 0xf0000000
  10810. 8004826: 68fb ldr r3, [r7, #12]
  10811. 8004828: f103 0138 add.w r1, r3, #56 ; 0x38
  10812. 800482c: 68bb ldr r3, [r7, #8]
  10813. 800482e: 009b lsls r3, r3, #2
  10814. 8004830: 68fa ldr r2, [r7, #12]
  10815. 8004832: 8992 ldrh r2, [r2, #12]
  10816. 8004834: fbb3 f0f2 udiv r0, r3, r2
  10817. 8004838: fb02 f200 mul.w r2, r2, r0
  10818. 800483c: 1a9b subs r3, r3, r2
  10819. 800483e: 440b add r3, r1
  10820. 8004840: 4618 mov r0, r3
  10821. 8004842: f7ff fafa bl 8003e3a <ld_dword>
  10822. 8004846: 4603 mov r3, r0
  10823. 8004848: f003 4370 and.w r3, r3, #4026531840 ; 0xf0000000
  10824. 800484c: 4323 orrs r3, r4
  10825. 800484e: 607b str r3, [r7, #4]
  10826. }
  10827. st_dword(fs->win + clst * 4 % SS(fs), val);
  10828. 8004850: 68fb ldr r3, [r7, #12]
  10829. 8004852: f103 0138 add.w r1, r3, #56 ; 0x38
  10830. 8004856: 68bb ldr r3, [r7, #8]
  10831. 8004858: 009b lsls r3, r3, #2
  10832. 800485a: 68fa ldr r2, [r7, #12]
  10833. 800485c: 8992 ldrh r2, [r2, #12]
  10834. 800485e: fbb3 f0f2 udiv r0, r3, r2
  10835. 8004862: fb02 f200 mul.w r2, r2, r0
  10836. 8004866: 1a9b subs r3, r3, r2
  10837. 8004868: 440b add r3, r1
  10838. 800486a: 6879 ldr r1, [r7, #4]
  10839. 800486c: 4618 mov r0, r3
  10840. 800486e: f7ff fb20 bl 8003eb2 <st_dword>
  10841. fs->wflag = 1;
  10842. 8004872: 68fb ldr r3, [r7, #12]
  10843. 8004874: 2201 movs r2, #1
  10844. 8004876: 70da strb r2, [r3, #3]
  10845. break;
  10846. 8004878: e006 b.n 8004888 <put_fat+0x224>
  10847. if (res != FR_OK) break;
  10848. 800487a: bf00 nop
  10849. 800487c: e004 b.n 8004888 <put_fat+0x224>
  10850. if (res != FR_OK) break;
  10851. 800487e: bf00 nop
  10852. 8004880: e002 b.n 8004888 <put_fat+0x224>
  10853. if (res != FR_OK) break;
  10854. 8004882: bf00 nop
  10855. 8004884: e000 b.n 8004888 <put_fat+0x224>
  10856. if (res != FR_OK) break;
  10857. 8004886: bf00 nop
  10858. }
  10859. }
  10860. return res;
  10861. 8004888: 7ffb ldrb r3, [r7, #31]
  10862. }
  10863. 800488a: 4618 mov r0, r3
  10864. 800488c: 3724 adds r7, #36 ; 0x24
  10865. 800488e: 46bd mov sp, r7
  10866. 8004890: bd90 pop {r4, r7, pc}
  10867. 08004892 <remove_chain>:
  10868. FRESULT remove_chain ( /* FR_OK(0):succeeded, !=0:error */
  10869. _FDID* obj, /* Corresponding object */
  10870. DWORD clst, /* Cluster to remove a chain from */
  10871. DWORD pclst /* Previous cluster of clst (0:an entire chain) */
  10872. )
  10873. {
  10874. 8004892: b580 push {r7, lr}
  10875. 8004894: b088 sub sp, #32
  10876. 8004896: af00 add r7, sp, #0
  10877. 8004898: 60f8 str r0, [r7, #12]
  10878. 800489a: 60b9 str r1, [r7, #8]
  10879. 800489c: 607a str r2, [r7, #4]
  10880. FRESULT res = FR_OK;
  10881. 800489e: 2300 movs r3, #0
  10882. 80048a0: 77fb strb r3, [r7, #31]
  10883. DWORD nxt;
  10884. FATFS *fs = obj->fs;
  10885. 80048a2: 68fb ldr r3, [r7, #12]
  10886. 80048a4: 681b ldr r3, [r3, #0]
  10887. 80048a6: 61bb str r3, [r7, #24]
  10888. #endif
  10889. #if _USE_TRIM
  10890. DWORD rt[2];
  10891. #endif
  10892. if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Check if in valid range */
  10893. 80048a8: 68bb ldr r3, [r7, #8]
  10894. 80048aa: 2b01 cmp r3, #1
  10895. 80048ac: d904 bls.n 80048b8 <remove_chain+0x26>
  10896. 80048ae: 69bb ldr r3, [r7, #24]
  10897. 80048b0: 69db ldr r3, [r3, #28]
  10898. 80048b2: 68ba ldr r2, [r7, #8]
  10899. 80048b4: 429a cmp r2, r3
  10900. 80048b6: d301 bcc.n 80048bc <remove_chain+0x2a>
  10901. 80048b8: 2302 movs r3, #2
  10902. 80048ba: e04b b.n 8004954 <remove_chain+0xc2>
  10903. /* Mark the previous cluster 'EOC' on the FAT if it exists */
  10904. if (pclst && (!_FS_EXFAT || fs->fs_type != FS_EXFAT || obj->stat != 2)) {
  10905. 80048bc: 687b ldr r3, [r7, #4]
  10906. 80048be: 2b00 cmp r3, #0
  10907. 80048c0: d00c beq.n 80048dc <remove_chain+0x4a>
  10908. res = put_fat(fs, pclst, 0xFFFFFFFF);
  10909. 80048c2: f04f 32ff mov.w r2, #4294967295
  10910. 80048c6: 6879 ldr r1, [r7, #4]
  10911. 80048c8: 69b8 ldr r0, [r7, #24]
  10912. 80048ca: f7ff fecb bl 8004664 <put_fat>
  10913. 80048ce: 4603 mov r3, r0
  10914. 80048d0: 77fb strb r3, [r7, #31]
  10915. if (res != FR_OK) return res;
  10916. 80048d2: 7ffb ldrb r3, [r7, #31]
  10917. 80048d4: 2b00 cmp r3, #0
  10918. 80048d6: d001 beq.n 80048dc <remove_chain+0x4a>
  10919. 80048d8: 7ffb ldrb r3, [r7, #31]
  10920. 80048da: e03b b.n 8004954 <remove_chain+0xc2>
  10921. }
  10922. /* Remove the chain */
  10923. do {
  10924. nxt = get_fat(obj, clst); /* Get cluster status */
  10925. 80048dc: 68b9 ldr r1, [r7, #8]
  10926. 80048de: 68f8 ldr r0, [r7, #12]
  10927. 80048e0: f7ff fdf0 bl 80044c4 <get_fat>
  10928. 80048e4: 6178 str r0, [r7, #20]
  10929. if (nxt == 0) break; /* Empty cluster? */
  10930. 80048e6: 697b ldr r3, [r7, #20]
  10931. 80048e8: 2b00 cmp r3, #0
  10932. 80048ea: d031 beq.n 8004950 <remove_chain+0xbe>
  10933. if (nxt == 1) return FR_INT_ERR; /* Internal error? */
  10934. 80048ec: 697b ldr r3, [r7, #20]
  10935. 80048ee: 2b01 cmp r3, #1
  10936. 80048f0: d101 bne.n 80048f6 <remove_chain+0x64>
  10937. 80048f2: 2302 movs r3, #2
  10938. 80048f4: e02e b.n 8004954 <remove_chain+0xc2>
  10939. if (nxt == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error? */
  10940. 80048f6: 697b ldr r3, [r7, #20]
  10941. 80048f8: f1b3 3fff cmp.w r3, #4294967295
  10942. 80048fc: d101 bne.n 8004902 <remove_chain+0x70>
  10943. 80048fe: 2301 movs r3, #1
  10944. 8004900: e028 b.n 8004954 <remove_chain+0xc2>
  10945. if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
  10946. res = put_fat(fs, clst, 0); /* Mark the cluster 'free' on the FAT */
  10947. 8004902: 2200 movs r2, #0
  10948. 8004904: 68b9 ldr r1, [r7, #8]
  10949. 8004906: 69b8 ldr r0, [r7, #24]
  10950. 8004908: f7ff feac bl 8004664 <put_fat>
  10951. 800490c: 4603 mov r3, r0
  10952. 800490e: 77fb strb r3, [r7, #31]
  10953. if (res != FR_OK) return res;
  10954. 8004910: 7ffb ldrb r3, [r7, #31]
  10955. 8004912: 2b00 cmp r3, #0
  10956. 8004914: d001 beq.n 800491a <remove_chain+0x88>
  10957. 8004916: 7ffb ldrb r3, [r7, #31]
  10958. 8004918: e01c b.n 8004954 <remove_chain+0xc2>
  10959. }
  10960. if (fs->free_clst < fs->n_fatent - 2) { /* Update FSINFO */
  10961. 800491a: 69bb ldr r3, [r7, #24]
  10962. 800491c: 699a ldr r2, [r3, #24]
  10963. 800491e: 69bb ldr r3, [r7, #24]
  10964. 8004920: 69db ldr r3, [r3, #28]
  10965. 8004922: 3b02 subs r3, #2
  10966. 8004924: 429a cmp r2, r3
  10967. 8004926: d20b bcs.n 8004940 <remove_chain+0xae>
  10968. fs->free_clst++;
  10969. 8004928: 69bb ldr r3, [r7, #24]
  10970. 800492a: 699b ldr r3, [r3, #24]
  10971. 800492c: 1c5a adds r2, r3, #1
  10972. 800492e: 69bb ldr r3, [r7, #24]
  10973. 8004930: 619a str r2, [r3, #24]
  10974. fs->fsi_flag |= 1;
  10975. 8004932: 69bb ldr r3, [r7, #24]
  10976. 8004934: 791b ldrb r3, [r3, #4]
  10977. 8004936: f043 0301 orr.w r3, r3, #1
  10978. 800493a: b2da uxtb r2, r3
  10979. 800493c: 69bb ldr r3, [r7, #24]
  10980. 800493e: 711a strb r2, [r3, #4]
  10981. disk_ioctl(fs->drv, CTRL_TRIM, rt); /* Inform device the block can be erased */
  10982. #endif
  10983. scl = ecl = nxt;
  10984. }
  10985. #endif
  10986. clst = nxt; /* Next cluster */
  10987. 8004940: 697b ldr r3, [r7, #20]
  10988. 8004942: 60bb str r3, [r7, #8]
  10989. } while (clst < fs->n_fatent); /* Repeat while not the last link */
  10990. 8004944: 69bb ldr r3, [r7, #24]
  10991. 8004946: 69db ldr r3, [r3, #28]
  10992. 8004948: 68ba ldr r2, [r7, #8]
  10993. 800494a: 429a cmp r2, r3
  10994. 800494c: d3c6 bcc.n 80048dc <remove_chain+0x4a>
  10995. 800494e: e000 b.n 8004952 <remove_chain+0xc0>
  10996. if (nxt == 0) break; /* Empty cluster? */
  10997. 8004950: bf00 nop
  10998. obj->stat = 2; /* Change the object status 'contiguous' */
  10999. }
  11000. }
  11001. }
  11002. #endif
  11003. return FR_OK;
  11004. 8004952: 2300 movs r3, #0
  11005. }
  11006. 8004954: 4618 mov r0, r3
  11007. 8004956: 3720 adds r7, #32
  11008. 8004958: 46bd mov sp, r7
  11009. 800495a: bd80 pop {r7, pc}
  11010. 0800495c <create_chain>:
  11011. static
  11012. DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
  11013. _FDID* obj, /* Corresponding object */
  11014. DWORD clst /* Cluster# to stretch, 0:Create a new chain */
  11015. )
  11016. {
  11017. 800495c: b580 push {r7, lr}
  11018. 800495e: b088 sub sp, #32
  11019. 8004960: af00 add r7, sp, #0
  11020. 8004962: 6078 str r0, [r7, #4]
  11021. 8004964: 6039 str r1, [r7, #0]
  11022. DWORD cs, ncl, scl;
  11023. FRESULT res;
  11024. FATFS *fs = obj->fs;
  11025. 8004966: 687b ldr r3, [r7, #4]
  11026. 8004968: 681b ldr r3, [r3, #0]
  11027. 800496a: 613b str r3, [r7, #16]
  11028. if (clst == 0) { /* Create a new chain */
  11029. 800496c: 683b ldr r3, [r7, #0]
  11030. 800496e: 2b00 cmp r3, #0
  11031. 8004970: d10d bne.n 800498e <create_chain+0x32>
  11032. scl = fs->last_clst; /* Get suggested cluster to start from */
  11033. 8004972: 693b ldr r3, [r7, #16]
  11034. 8004974: 695b ldr r3, [r3, #20]
  11035. 8004976: 61bb str r3, [r7, #24]
  11036. if (scl == 0 || scl >= fs->n_fatent) scl = 1;
  11037. 8004978: 69bb ldr r3, [r7, #24]
  11038. 800497a: 2b00 cmp r3, #0
  11039. 800497c: d004 beq.n 8004988 <create_chain+0x2c>
  11040. 800497e: 693b ldr r3, [r7, #16]
  11041. 8004980: 69db ldr r3, [r3, #28]
  11042. 8004982: 69ba ldr r2, [r7, #24]
  11043. 8004984: 429a cmp r2, r3
  11044. 8004986: d31b bcc.n 80049c0 <create_chain+0x64>
  11045. 8004988: 2301 movs r3, #1
  11046. 800498a: 61bb str r3, [r7, #24]
  11047. 800498c: e018 b.n 80049c0 <create_chain+0x64>
  11048. }
  11049. else { /* Stretch current chain */
  11050. cs = get_fat(obj, clst); /* Check the cluster status */
  11051. 800498e: 6839 ldr r1, [r7, #0]
  11052. 8004990: 6878 ldr r0, [r7, #4]
  11053. 8004992: f7ff fd97 bl 80044c4 <get_fat>
  11054. 8004996: 60f8 str r0, [r7, #12]
  11055. if (cs < 2) return 1; /* Invalid FAT value */
  11056. 8004998: 68fb ldr r3, [r7, #12]
  11057. 800499a: 2b01 cmp r3, #1
  11058. 800499c: d801 bhi.n 80049a2 <create_chain+0x46>
  11059. 800499e: 2301 movs r3, #1
  11060. 80049a0: e070 b.n 8004a84 <create_chain+0x128>
  11061. if (cs == 0xFFFFFFFF) return cs; /* A disk error occurred */
  11062. 80049a2: 68fb ldr r3, [r7, #12]
  11063. 80049a4: f1b3 3fff cmp.w r3, #4294967295
  11064. 80049a8: d101 bne.n 80049ae <create_chain+0x52>
  11065. 80049aa: 68fb ldr r3, [r7, #12]
  11066. 80049ac: e06a b.n 8004a84 <create_chain+0x128>
  11067. if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */
  11068. 80049ae: 693b ldr r3, [r7, #16]
  11069. 80049b0: 69db ldr r3, [r3, #28]
  11070. 80049b2: 68fa ldr r2, [r7, #12]
  11071. 80049b4: 429a cmp r2, r3
  11072. 80049b6: d201 bcs.n 80049bc <create_chain+0x60>
  11073. 80049b8: 68fb ldr r3, [r7, #12]
  11074. 80049ba: e063 b.n 8004a84 <create_chain+0x128>
  11075. scl = clst;
  11076. 80049bc: 683b ldr r3, [r7, #0]
  11077. 80049be: 61bb str r3, [r7, #24]
  11078. }
  11079. }
  11080. } else
  11081. #endif
  11082. { /* On the FAT12/16/32 volume */
  11083. ncl = scl; /* Start cluster */
  11084. 80049c0: 69bb ldr r3, [r7, #24]
  11085. 80049c2: 61fb str r3, [r7, #28]
  11086. for (;;) {
  11087. ncl++; /* Next cluster */
  11088. 80049c4: 69fb ldr r3, [r7, #28]
  11089. 80049c6: 3301 adds r3, #1
  11090. 80049c8: 61fb str r3, [r7, #28]
  11091. if (ncl >= fs->n_fatent) { /* Check wrap-around */
  11092. 80049ca: 693b ldr r3, [r7, #16]
  11093. 80049cc: 69db ldr r3, [r3, #28]
  11094. 80049ce: 69fa ldr r2, [r7, #28]
  11095. 80049d0: 429a cmp r2, r3
  11096. 80049d2: d307 bcc.n 80049e4 <create_chain+0x88>
  11097. ncl = 2;
  11098. 80049d4: 2302 movs r3, #2
  11099. 80049d6: 61fb str r3, [r7, #28]
  11100. if (ncl > scl) return 0; /* No free cluster */
  11101. 80049d8: 69fa ldr r2, [r7, #28]
  11102. 80049da: 69bb ldr r3, [r7, #24]
  11103. 80049dc: 429a cmp r2, r3
  11104. 80049de: d901 bls.n 80049e4 <create_chain+0x88>
  11105. 80049e0: 2300 movs r3, #0
  11106. 80049e2: e04f b.n 8004a84 <create_chain+0x128>
  11107. }
  11108. cs = get_fat(obj, ncl); /* Get the cluster status */
  11109. 80049e4: 69f9 ldr r1, [r7, #28]
  11110. 80049e6: 6878 ldr r0, [r7, #4]
  11111. 80049e8: f7ff fd6c bl 80044c4 <get_fat>
  11112. 80049ec: 60f8 str r0, [r7, #12]
  11113. if (cs == 0) break; /* Found a free cluster */
  11114. 80049ee: 68fb ldr r3, [r7, #12]
  11115. 80049f0: 2b00 cmp r3, #0
  11116. 80049f2: d00e beq.n 8004a12 <create_chain+0xb6>
  11117. if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* An error occurred */
  11118. 80049f4: 68fb ldr r3, [r7, #12]
  11119. 80049f6: 2b01 cmp r3, #1
  11120. 80049f8: d003 beq.n 8004a02 <create_chain+0xa6>
  11121. 80049fa: 68fb ldr r3, [r7, #12]
  11122. 80049fc: f1b3 3fff cmp.w r3, #4294967295
  11123. 8004a00: d101 bne.n 8004a06 <create_chain+0xaa>
  11124. 8004a02: 68fb ldr r3, [r7, #12]
  11125. 8004a04: e03e b.n 8004a84 <create_chain+0x128>
  11126. if (ncl == scl) return 0; /* No free cluster */
  11127. 8004a06: 69fa ldr r2, [r7, #28]
  11128. 8004a08: 69bb ldr r3, [r7, #24]
  11129. 8004a0a: 429a cmp r2, r3
  11130. 8004a0c: d1da bne.n 80049c4 <create_chain+0x68>
  11131. 8004a0e: 2300 movs r3, #0
  11132. 8004a10: e038 b.n 8004a84 <create_chain+0x128>
  11133. if (cs == 0) break; /* Found a free cluster */
  11134. 8004a12: bf00 nop
  11135. }
  11136. res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */
  11137. 8004a14: f04f 32ff mov.w r2, #4294967295
  11138. 8004a18: 69f9 ldr r1, [r7, #28]
  11139. 8004a1a: 6938 ldr r0, [r7, #16]
  11140. 8004a1c: f7ff fe22 bl 8004664 <put_fat>
  11141. 8004a20: 4603 mov r3, r0
  11142. 8004a22: 75fb strb r3, [r7, #23]
  11143. if (res == FR_OK && clst != 0) {
  11144. 8004a24: 7dfb ldrb r3, [r7, #23]
  11145. 8004a26: 2b00 cmp r3, #0
  11146. 8004a28: d109 bne.n 8004a3e <create_chain+0xe2>
  11147. 8004a2a: 683b ldr r3, [r7, #0]
  11148. 8004a2c: 2b00 cmp r3, #0
  11149. 8004a2e: d006 beq.n 8004a3e <create_chain+0xe2>
  11150. res = put_fat(fs, clst, ncl); /* Link it from the previous one if needed */
  11151. 8004a30: 69fa ldr r2, [r7, #28]
  11152. 8004a32: 6839 ldr r1, [r7, #0]
  11153. 8004a34: 6938 ldr r0, [r7, #16]
  11154. 8004a36: f7ff fe15 bl 8004664 <put_fat>
  11155. 8004a3a: 4603 mov r3, r0
  11156. 8004a3c: 75fb strb r3, [r7, #23]
  11157. }
  11158. }
  11159. if (res == FR_OK) { /* Update FSINFO if function succeeded. */
  11160. 8004a3e: 7dfb ldrb r3, [r7, #23]
  11161. 8004a40: 2b00 cmp r3, #0
  11162. 8004a42: d116 bne.n 8004a72 <create_chain+0x116>
  11163. fs->last_clst = ncl;
  11164. 8004a44: 693b ldr r3, [r7, #16]
  11165. 8004a46: 69fa ldr r2, [r7, #28]
  11166. 8004a48: 615a str r2, [r3, #20]
  11167. if (fs->free_clst <= fs->n_fatent - 2) fs->free_clst--;
  11168. 8004a4a: 693b ldr r3, [r7, #16]
  11169. 8004a4c: 699a ldr r2, [r3, #24]
  11170. 8004a4e: 693b ldr r3, [r7, #16]
  11171. 8004a50: 69db ldr r3, [r3, #28]
  11172. 8004a52: 3b02 subs r3, #2
  11173. 8004a54: 429a cmp r2, r3
  11174. 8004a56: d804 bhi.n 8004a62 <create_chain+0x106>
  11175. 8004a58: 693b ldr r3, [r7, #16]
  11176. 8004a5a: 699b ldr r3, [r3, #24]
  11177. 8004a5c: 1e5a subs r2, r3, #1
  11178. 8004a5e: 693b ldr r3, [r7, #16]
  11179. 8004a60: 619a str r2, [r3, #24]
  11180. fs->fsi_flag |= 1;
  11181. 8004a62: 693b ldr r3, [r7, #16]
  11182. 8004a64: 791b ldrb r3, [r3, #4]
  11183. 8004a66: f043 0301 orr.w r3, r3, #1
  11184. 8004a6a: b2da uxtb r2, r3
  11185. 8004a6c: 693b ldr r3, [r7, #16]
  11186. 8004a6e: 711a strb r2, [r3, #4]
  11187. 8004a70: e007 b.n 8004a82 <create_chain+0x126>
  11188. } else {
  11189. ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1; /* Failed. Generate error status */
  11190. 8004a72: 7dfb ldrb r3, [r7, #23]
  11191. 8004a74: 2b01 cmp r3, #1
  11192. 8004a76: d102 bne.n 8004a7e <create_chain+0x122>
  11193. 8004a78: f04f 33ff mov.w r3, #4294967295
  11194. 8004a7c: e000 b.n 8004a80 <create_chain+0x124>
  11195. 8004a7e: 2301 movs r3, #1
  11196. 8004a80: 61fb str r3, [r7, #28]
  11197. }
  11198. return ncl; /* Return new cluster number or error status */
  11199. 8004a82: 69fb ldr r3, [r7, #28]
  11200. }
  11201. 8004a84: 4618 mov r0, r3
  11202. 8004a86: 3720 adds r7, #32
  11203. 8004a88: 46bd mov sp, r7
  11204. 8004a8a: bd80 pop {r7, pc}
  11205. 08004a8c <clmt_clust>:
  11206. static
  11207. DWORD clmt_clust ( /* <2:Error, >=2:Cluster number */
  11208. FIL* fp, /* Pointer to the file object */
  11209. FSIZE_t ofs /* File offset to be converted to cluster# */
  11210. )
  11211. {
  11212. 8004a8c: b480 push {r7}
  11213. 8004a8e: b087 sub sp, #28
  11214. 8004a90: af00 add r7, sp, #0
  11215. 8004a92: 6078 str r0, [r7, #4]
  11216. 8004a94: 6039 str r1, [r7, #0]
  11217. DWORD cl, ncl, *tbl;
  11218. FATFS *fs = fp->obj.fs;
  11219. 8004a96: 687b ldr r3, [r7, #4]
  11220. 8004a98: 681b ldr r3, [r3, #0]
  11221. 8004a9a: 60fb str r3, [r7, #12]
  11222. tbl = fp->cltbl + 1; /* Top of CLMT */
  11223. 8004a9c: 687b ldr r3, [r7, #4]
  11224. 8004a9e: 6adb ldr r3, [r3, #44] ; 0x2c
  11225. 8004aa0: 3304 adds r3, #4
  11226. 8004aa2: 613b str r3, [r7, #16]
  11227. cl = (DWORD)(ofs / SS(fs) / fs->csize); /* Cluster order from top of the file */
  11228. 8004aa4: 68fb ldr r3, [r7, #12]
  11229. 8004aa6: 899b ldrh r3, [r3, #12]
  11230. 8004aa8: 461a mov r2, r3
  11231. 8004aaa: 683b ldr r3, [r7, #0]
  11232. 8004aac: fbb3 f3f2 udiv r3, r3, r2
  11233. 8004ab0: 68fa ldr r2, [r7, #12]
  11234. 8004ab2: 8952 ldrh r2, [r2, #10]
  11235. 8004ab4: fbb3 f3f2 udiv r3, r3, r2
  11236. 8004ab8: 617b str r3, [r7, #20]
  11237. for (;;) {
  11238. ncl = *tbl++; /* Number of cluters in the fragment */
  11239. 8004aba: 693b ldr r3, [r7, #16]
  11240. 8004abc: 1d1a adds r2, r3, #4
  11241. 8004abe: 613a str r2, [r7, #16]
  11242. 8004ac0: 681b ldr r3, [r3, #0]
  11243. 8004ac2: 60bb str r3, [r7, #8]
  11244. if (ncl == 0) return 0; /* End of table? (error) */
  11245. 8004ac4: 68bb ldr r3, [r7, #8]
  11246. 8004ac6: 2b00 cmp r3, #0
  11247. 8004ac8: d101 bne.n 8004ace <clmt_clust+0x42>
  11248. 8004aca: 2300 movs r3, #0
  11249. 8004acc: e010 b.n 8004af0 <clmt_clust+0x64>
  11250. if (cl < ncl) break; /* In this fragment? */
  11251. 8004ace: 697a ldr r2, [r7, #20]
  11252. 8004ad0: 68bb ldr r3, [r7, #8]
  11253. 8004ad2: 429a cmp r2, r3
  11254. 8004ad4: d307 bcc.n 8004ae6 <clmt_clust+0x5a>
  11255. cl -= ncl; tbl++; /* Next fragment */
  11256. 8004ad6: 697a ldr r2, [r7, #20]
  11257. 8004ad8: 68bb ldr r3, [r7, #8]
  11258. 8004ada: 1ad3 subs r3, r2, r3
  11259. 8004adc: 617b str r3, [r7, #20]
  11260. 8004ade: 693b ldr r3, [r7, #16]
  11261. 8004ae0: 3304 adds r3, #4
  11262. 8004ae2: 613b str r3, [r7, #16]
  11263. ncl = *tbl++; /* Number of cluters in the fragment */
  11264. 8004ae4: e7e9 b.n 8004aba <clmt_clust+0x2e>
  11265. if (cl < ncl) break; /* In this fragment? */
  11266. 8004ae6: bf00 nop
  11267. }
  11268. return cl + *tbl; /* Return the cluster number */
  11269. 8004ae8: 693b ldr r3, [r7, #16]
  11270. 8004aea: 681a ldr r2, [r3, #0]
  11271. 8004aec: 697b ldr r3, [r7, #20]
  11272. 8004aee: 4413 add r3, r2
  11273. }
  11274. 8004af0: 4618 mov r0, r3
  11275. 8004af2: 371c adds r7, #28
  11276. 8004af4: 46bd mov sp, r7
  11277. 8004af6: bc80 pop {r7}
  11278. 8004af8: 4770 bx lr
  11279. 08004afa <dir_sdi>:
  11280. static
  11281. FRESULT dir_sdi ( /* FR_OK(0):succeeded, !=0:error */
  11282. DIR* dp, /* Pointer to directory object */
  11283. DWORD ofs /* Offset of directory table */
  11284. )
  11285. {
  11286. 8004afa: b580 push {r7, lr}
  11287. 8004afc: b086 sub sp, #24
  11288. 8004afe: af00 add r7, sp, #0
  11289. 8004b00: 6078 str r0, [r7, #4]
  11290. 8004b02: 6039 str r1, [r7, #0]
  11291. DWORD csz, clst;
  11292. FATFS *fs = dp->obj.fs;
  11293. 8004b04: 687b ldr r3, [r7, #4]
  11294. 8004b06: 681b ldr r3, [r3, #0]
  11295. 8004b08: 613b str r3, [r7, #16]
  11296. if (ofs >= (DWORD)((_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR) || ofs % SZDIRE) { /* Check range of offset and alignment */
  11297. 8004b0a: 683b ldr r3, [r7, #0]
  11298. 8004b0c: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000
  11299. 8004b10: d204 bcs.n 8004b1c <dir_sdi+0x22>
  11300. 8004b12: 683b ldr r3, [r7, #0]
  11301. 8004b14: f003 031f and.w r3, r3, #31
  11302. 8004b18: 2b00 cmp r3, #0
  11303. 8004b1a: d001 beq.n 8004b20 <dir_sdi+0x26>
  11304. return FR_INT_ERR;
  11305. 8004b1c: 2302 movs r3, #2
  11306. 8004b1e: e071 b.n 8004c04 <dir_sdi+0x10a>
  11307. }
  11308. dp->dptr = ofs; /* Set current offset */
  11309. 8004b20: 687b ldr r3, [r7, #4]
  11310. 8004b22: 683a ldr r2, [r7, #0]
  11311. 8004b24: 615a str r2, [r3, #20]
  11312. clst = dp->obj.sclust; /* Table start cluster (0:root) */
  11313. 8004b26: 687b ldr r3, [r7, #4]
  11314. 8004b28: 689b ldr r3, [r3, #8]
  11315. 8004b2a: 617b str r3, [r7, #20]
  11316. if (clst == 0 && fs->fs_type >= FS_FAT32) { /* Replace cluster# 0 with root cluster# */
  11317. 8004b2c: 697b ldr r3, [r7, #20]
  11318. 8004b2e: 2b00 cmp r3, #0
  11319. 8004b30: d106 bne.n 8004b40 <dir_sdi+0x46>
  11320. 8004b32: 693b ldr r3, [r7, #16]
  11321. 8004b34: 781b ldrb r3, [r3, #0]
  11322. 8004b36: 2b02 cmp r3, #2
  11323. 8004b38: d902 bls.n 8004b40 <dir_sdi+0x46>
  11324. clst = fs->dirbase;
  11325. 8004b3a: 693b ldr r3, [r7, #16]
  11326. 8004b3c: 6adb ldr r3, [r3, #44] ; 0x2c
  11327. 8004b3e: 617b str r3, [r7, #20]
  11328. if (_FS_EXFAT) dp->obj.stat = 0; /* exFAT: Root dir has an FAT chain */
  11329. }
  11330. if (clst == 0) { /* Static table (root-directory in FAT12/16) */
  11331. 8004b40: 697b ldr r3, [r7, #20]
  11332. 8004b42: 2b00 cmp r3, #0
  11333. 8004b44: d10c bne.n 8004b60 <dir_sdi+0x66>
  11334. if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */
  11335. 8004b46: 683b ldr r3, [r7, #0]
  11336. 8004b48: 095b lsrs r3, r3, #5
  11337. 8004b4a: 693a ldr r2, [r7, #16]
  11338. 8004b4c: 8912 ldrh r2, [r2, #8]
  11339. 8004b4e: 4293 cmp r3, r2
  11340. 8004b50: d301 bcc.n 8004b56 <dir_sdi+0x5c>
  11341. 8004b52: 2302 movs r3, #2
  11342. 8004b54: e056 b.n 8004c04 <dir_sdi+0x10a>
  11343. dp->sect = fs->dirbase;
  11344. 8004b56: 693b ldr r3, [r7, #16]
  11345. 8004b58: 6ada ldr r2, [r3, #44] ; 0x2c
  11346. 8004b5a: 687b ldr r3, [r7, #4]
  11347. 8004b5c: 61da str r2, [r3, #28]
  11348. 8004b5e: e02d b.n 8004bbc <dir_sdi+0xc2>
  11349. } else { /* Dynamic table (sub-directory or root-directory in FAT32+) */
  11350. csz = (DWORD)fs->csize * SS(fs); /* Bytes per cluster */
  11351. 8004b60: 693b ldr r3, [r7, #16]
  11352. 8004b62: 895b ldrh r3, [r3, #10]
  11353. 8004b64: 461a mov r2, r3
  11354. 8004b66: 693b ldr r3, [r7, #16]
  11355. 8004b68: 899b ldrh r3, [r3, #12]
  11356. 8004b6a: fb03 f302 mul.w r3, r3, r2
  11357. 8004b6e: 60fb str r3, [r7, #12]
  11358. while (ofs >= csz) { /* Follow cluster chain */
  11359. 8004b70: e019 b.n 8004ba6 <dir_sdi+0xac>
  11360. clst = get_fat(&dp->obj, clst); /* Get next cluster */
  11361. 8004b72: 687b ldr r3, [r7, #4]
  11362. 8004b74: 6979 ldr r1, [r7, #20]
  11363. 8004b76: 4618 mov r0, r3
  11364. 8004b78: f7ff fca4 bl 80044c4 <get_fat>
  11365. 8004b7c: 6178 str r0, [r7, #20]
  11366. if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
  11367. 8004b7e: 697b ldr r3, [r7, #20]
  11368. 8004b80: f1b3 3fff cmp.w r3, #4294967295
  11369. 8004b84: d101 bne.n 8004b8a <dir_sdi+0x90>
  11370. 8004b86: 2301 movs r3, #1
  11371. 8004b88: e03c b.n 8004c04 <dir_sdi+0x10a>
  11372. if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Reached to end of table or internal error */
  11373. 8004b8a: 697b ldr r3, [r7, #20]
  11374. 8004b8c: 2b01 cmp r3, #1
  11375. 8004b8e: d904 bls.n 8004b9a <dir_sdi+0xa0>
  11376. 8004b90: 693b ldr r3, [r7, #16]
  11377. 8004b92: 69db ldr r3, [r3, #28]
  11378. 8004b94: 697a ldr r2, [r7, #20]
  11379. 8004b96: 429a cmp r2, r3
  11380. 8004b98: d301 bcc.n 8004b9e <dir_sdi+0xa4>
  11381. 8004b9a: 2302 movs r3, #2
  11382. 8004b9c: e032 b.n 8004c04 <dir_sdi+0x10a>
  11383. ofs -= csz;
  11384. 8004b9e: 683a ldr r2, [r7, #0]
  11385. 8004ba0: 68fb ldr r3, [r7, #12]
  11386. 8004ba2: 1ad3 subs r3, r2, r3
  11387. 8004ba4: 603b str r3, [r7, #0]
  11388. while (ofs >= csz) { /* Follow cluster chain */
  11389. 8004ba6: 683a ldr r2, [r7, #0]
  11390. 8004ba8: 68fb ldr r3, [r7, #12]
  11391. 8004baa: 429a cmp r2, r3
  11392. 8004bac: d2e1 bcs.n 8004b72 <dir_sdi+0x78>
  11393. }
  11394. dp->sect = clust2sect(fs, clst);
  11395. 8004bae: 6979 ldr r1, [r7, #20]
  11396. 8004bb0: 6938 ldr r0, [r7, #16]
  11397. 8004bb2: f7ff fc69 bl 8004488 <clust2sect>
  11398. 8004bb6: 4602 mov r2, r0
  11399. 8004bb8: 687b ldr r3, [r7, #4]
  11400. 8004bba: 61da str r2, [r3, #28]
  11401. }
  11402. dp->clust = clst; /* Current cluster# */
  11403. 8004bbc: 687b ldr r3, [r7, #4]
  11404. 8004bbe: 697a ldr r2, [r7, #20]
  11405. 8004bc0: 619a str r2, [r3, #24]
  11406. if (!dp->sect) return FR_INT_ERR;
  11407. 8004bc2: 687b ldr r3, [r7, #4]
  11408. 8004bc4: 69db ldr r3, [r3, #28]
  11409. 8004bc6: 2b00 cmp r3, #0
  11410. 8004bc8: d101 bne.n 8004bce <dir_sdi+0xd4>
  11411. 8004bca: 2302 movs r3, #2
  11412. 8004bcc: e01a b.n 8004c04 <dir_sdi+0x10a>
  11413. dp->sect += ofs / SS(fs); /* Sector# of the directory entry */
  11414. 8004bce: 687b ldr r3, [r7, #4]
  11415. 8004bd0: 69da ldr r2, [r3, #28]
  11416. 8004bd2: 693b ldr r3, [r7, #16]
  11417. 8004bd4: 899b ldrh r3, [r3, #12]
  11418. 8004bd6: 4619 mov r1, r3
  11419. 8004bd8: 683b ldr r3, [r7, #0]
  11420. 8004bda: fbb3 f3f1 udiv r3, r3, r1
  11421. 8004bde: 441a add r2, r3
  11422. 8004be0: 687b ldr r3, [r7, #4]
  11423. 8004be2: 61da str r2, [r3, #28]
  11424. dp->dir = fs->win + (ofs % SS(fs)); /* Pointer to the entry in the win[] */
  11425. 8004be4: 693b ldr r3, [r7, #16]
  11426. 8004be6: f103 0138 add.w r1, r3, #56 ; 0x38
  11427. 8004bea: 693b ldr r3, [r7, #16]
  11428. 8004bec: 899b ldrh r3, [r3, #12]
  11429. 8004bee: 461a mov r2, r3
  11430. 8004bf0: 683b ldr r3, [r7, #0]
  11431. 8004bf2: fbb3 f0f2 udiv r0, r3, r2
  11432. 8004bf6: fb02 f200 mul.w r2, r2, r0
  11433. 8004bfa: 1a9b subs r3, r3, r2
  11434. 8004bfc: 18ca adds r2, r1, r3
  11435. 8004bfe: 687b ldr r3, [r7, #4]
  11436. 8004c00: 621a str r2, [r3, #32]
  11437. return FR_OK;
  11438. 8004c02: 2300 movs r3, #0
  11439. }
  11440. 8004c04: 4618 mov r0, r3
  11441. 8004c06: 3718 adds r7, #24
  11442. 8004c08: 46bd mov sp, r7
  11443. 8004c0a: bd80 pop {r7, pc}
  11444. 08004c0c <dir_next>:
  11445. static
  11446. FRESULT dir_next ( /* FR_OK(0):succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */
  11447. DIR* dp, /* Pointer to the directory object */
  11448. int stretch /* 0: Do not stretch table, 1: Stretch table if needed */
  11449. )
  11450. {
  11451. 8004c0c: b580 push {r7, lr}
  11452. 8004c0e: b086 sub sp, #24
  11453. 8004c10: af00 add r7, sp, #0
  11454. 8004c12: 6078 str r0, [r7, #4]
  11455. 8004c14: 6039 str r1, [r7, #0]
  11456. DWORD ofs, clst;
  11457. FATFS *fs = dp->obj.fs;
  11458. 8004c16: 687b ldr r3, [r7, #4]
  11459. 8004c18: 681b ldr r3, [r3, #0]
  11460. 8004c1a: 60fb str r3, [r7, #12]
  11461. #if !_FS_READONLY
  11462. UINT n;
  11463. #endif
  11464. ofs = dp->dptr + SZDIRE; /* Next entry */
  11465. 8004c1c: 687b ldr r3, [r7, #4]
  11466. 8004c1e: 695b ldr r3, [r3, #20]
  11467. 8004c20: 3320 adds r3, #32
  11468. 8004c22: 60bb str r3, [r7, #8]
  11469. if (!dp->sect || ofs >= (DWORD)((_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR)) return FR_NO_FILE; /* Report EOT when offset has reached max value */
  11470. 8004c24: 687b ldr r3, [r7, #4]
  11471. 8004c26: 69db ldr r3, [r3, #28]
  11472. 8004c28: 2b00 cmp r3, #0
  11473. 8004c2a: d003 beq.n 8004c34 <dir_next+0x28>
  11474. 8004c2c: 68bb ldr r3, [r7, #8]
  11475. 8004c2e: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000
  11476. 8004c32: d301 bcc.n 8004c38 <dir_next+0x2c>
  11477. 8004c34: 2304 movs r3, #4
  11478. 8004c36: e0bb b.n 8004db0 <dir_next+0x1a4>
  11479. if (ofs % SS(fs) == 0) { /* Sector changed? */
  11480. 8004c38: 68fb ldr r3, [r7, #12]
  11481. 8004c3a: 899b ldrh r3, [r3, #12]
  11482. 8004c3c: 461a mov r2, r3
  11483. 8004c3e: 68bb ldr r3, [r7, #8]
  11484. 8004c40: fbb3 f1f2 udiv r1, r3, r2
  11485. 8004c44: fb02 f201 mul.w r2, r2, r1
  11486. 8004c48: 1a9b subs r3, r3, r2
  11487. 8004c4a: 2b00 cmp r3, #0
  11488. 8004c4c: f040 809d bne.w 8004d8a <dir_next+0x17e>
  11489. dp->sect++; /* Next sector */
  11490. 8004c50: 687b ldr r3, [r7, #4]
  11491. 8004c52: 69db ldr r3, [r3, #28]
  11492. 8004c54: 1c5a adds r2, r3, #1
  11493. 8004c56: 687b ldr r3, [r7, #4]
  11494. 8004c58: 61da str r2, [r3, #28]
  11495. if (!dp->clust) { /* Static table */
  11496. 8004c5a: 687b ldr r3, [r7, #4]
  11497. 8004c5c: 699b ldr r3, [r3, #24]
  11498. 8004c5e: 2b00 cmp r3, #0
  11499. 8004c60: d10b bne.n 8004c7a <dir_next+0x6e>
  11500. if (ofs / SZDIRE >= fs->n_rootdir) { /* Report EOT if it reached end of static table */
  11501. 8004c62: 68bb ldr r3, [r7, #8]
  11502. 8004c64: 095b lsrs r3, r3, #5
  11503. 8004c66: 68fa ldr r2, [r7, #12]
  11504. 8004c68: 8912 ldrh r2, [r2, #8]
  11505. 8004c6a: 4293 cmp r3, r2
  11506. 8004c6c: f0c0 808d bcc.w 8004d8a <dir_next+0x17e>
  11507. dp->sect = 0; return FR_NO_FILE;
  11508. 8004c70: 687b ldr r3, [r7, #4]
  11509. 8004c72: 2200 movs r2, #0
  11510. 8004c74: 61da str r2, [r3, #28]
  11511. 8004c76: 2304 movs r3, #4
  11512. 8004c78: e09a b.n 8004db0 <dir_next+0x1a4>
  11513. }
  11514. }
  11515. else { /* Dynamic table */
  11516. if ((ofs / SS(fs) & (fs->csize - 1)) == 0) { /* Cluster changed? */
  11517. 8004c7a: 68fb ldr r3, [r7, #12]
  11518. 8004c7c: 899b ldrh r3, [r3, #12]
  11519. 8004c7e: 461a mov r2, r3
  11520. 8004c80: 68bb ldr r3, [r7, #8]
  11521. 8004c82: fbb3 f3f2 udiv r3, r3, r2
  11522. 8004c86: 68fa ldr r2, [r7, #12]
  11523. 8004c88: 8952 ldrh r2, [r2, #10]
  11524. 8004c8a: 3a01 subs r2, #1
  11525. 8004c8c: 4013 ands r3, r2
  11526. 8004c8e: 2b00 cmp r3, #0
  11527. 8004c90: d17b bne.n 8004d8a <dir_next+0x17e>
  11528. clst = get_fat(&dp->obj, dp->clust); /* Get next cluster */
  11529. 8004c92: 687a ldr r2, [r7, #4]
  11530. 8004c94: 687b ldr r3, [r7, #4]
  11531. 8004c96: 699b ldr r3, [r3, #24]
  11532. 8004c98: 4619 mov r1, r3
  11533. 8004c9a: 4610 mov r0, r2
  11534. 8004c9c: f7ff fc12 bl 80044c4 <get_fat>
  11535. 8004ca0: 6178 str r0, [r7, #20]
  11536. if (clst <= 1) return FR_INT_ERR; /* Internal error */
  11537. 8004ca2: 697b ldr r3, [r7, #20]
  11538. 8004ca4: 2b01 cmp r3, #1
  11539. 8004ca6: d801 bhi.n 8004cac <dir_next+0xa0>
  11540. 8004ca8: 2302 movs r3, #2
  11541. 8004caa: e081 b.n 8004db0 <dir_next+0x1a4>
  11542. if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
  11543. 8004cac: 697b ldr r3, [r7, #20]
  11544. 8004cae: f1b3 3fff cmp.w r3, #4294967295
  11545. 8004cb2: d101 bne.n 8004cb8 <dir_next+0xac>
  11546. 8004cb4: 2301 movs r3, #1
  11547. 8004cb6: e07b b.n 8004db0 <dir_next+0x1a4>
  11548. if (clst >= fs->n_fatent) { /* Reached end of dynamic table */
  11549. 8004cb8: 68fb ldr r3, [r7, #12]
  11550. 8004cba: 69db ldr r3, [r3, #28]
  11551. 8004cbc: 697a ldr r2, [r7, #20]
  11552. 8004cbe: 429a cmp r2, r3
  11553. 8004cc0: d359 bcc.n 8004d76 <dir_next+0x16a>
  11554. #if !_FS_READONLY
  11555. if (!stretch) { /* If no stretch, report EOT */
  11556. 8004cc2: 683b ldr r3, [r7, #0]
  11557. 8004cc4: 2b00 cmp r3, #0
  11558. 8004cc6: d104 bne.n 8004cd2 <dir_next+0xc6>
  11559. dp->sect = 0; return FR_NO_FILE;
  11560. 8004cc8: 687b ldr r3, [r7, #4]
  11561. 8004cca: 2200 movs r2, #0
  11562. 8004ccc: 61da str r2, [r3, #28]
  11563. 8004cce: 2304 movs r3, #4
  11564. 8004cd0: e06e b.n 8004db0 <dir_next+0x1a4>
  11565. }
  11566. clst = create_chain(&dp->obj, dp->clust); /* Allocate a cluster */
  11567. 8004cd2: 687a ldr r2, [r7, #4]
  11568. 8004cd4: 687b ldr r3, [r7, #4]
  11569. 8004cd6: 699b ldr r3, [r3, #24]
  11570. 8004cd8: 4619 mov r1, r3
  11571. 8004cda: 4610 mov r0, r2
  11572. 8004cdc: f7ff fe3e bl 800495c <create_chain>
  11573. 8004ce0: 6178 str r0, [r7, #20]
  11574. if (clst == 0) return FR_DENIED; /* No free cluster */
  11575. 8004ce2: 697b ldr r3, [r7, #20]
  11576. 8004ce4: 2b00 cmp r3, #0
  11577. 8004ce6: d101 bne.n 8004cec <dir_next+0xe0>
  11578. 8004ce8: 2307 movs r3, #7
  11579. 8004cea: e061 b.n 8004db0 <dir_next+0x1a4>
  11580. if (clst == 1) return FR_INT_ERR; /* Internal error */
  11581. 8004cec: 697b ldr r3, [r7, #20]
  11582. 8004cee: 2b01 cmp r3, #1
  11583. 8004cf0: d101 bne.n 8004cf6 <dir_next+0xea>
  11584. 8004cf2: 2302 movs r3, #2
  11585. 8004cf4: e05c b.n 8004db0 <dir_next+0x1a4>
  11586. if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */
  11587. 8004cf6: 697b ldr r3, [r7, #20]
  11588. 8004cf8: f1b3 3fff cmp.w r3, #4294967295
  11589. 8004cfc: d101 bne.n 8004d02 <dir_next+0xf6>
  11590. 8004cfe: 2301 movs r3, #1
  11591. 8004d00: e056 b.n 8004db0 <dir_next+0x1a4>
  11592. /* Clean-up the stretched table */
  11593. if (_FS_EXFAT) dp->obj.stat |= 4; /* The directory needs to be updated */
  11594. if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */
  11595. 8004d02: 68f8 ldr r0, [r7, #12]
  11596. 8004d04: f7ff fade bl 80042c4 <sync_window>
  11597. 8004d08: 4603 mov r3, r0
  11598. 8004d0a: 2b00 cmp r3, #0
  11599. 8004d0c: d001 beq.n 8004d12 <dir_next+0x106>
  11600. 8004d0e: 2301 movs r3, #1
  11601. 8004d10: e04e b.n 8004db0 <dir_next+0x1a4>
  11602. mem_set(fs->win, 0, SS(fs)); /* Clear window buffer */
  11603. 8004d12: 68fb ldr r3, [r7, #12]
  11604. 8004d14: f103 0038 add.w r0, r3, #56 ; 0x38
  11605. 8004d18: 68fb ldr r3, [r7, #12]
  11606. 8004d1a: 899b ldrh r3, [r3, #12]
  11607. 8004d1c: 461a mov r2, r3
  11608. 8004d1e: 2100 movs r1, #0
  11609. 8004d20: f7ff f912 bl 8003f48 <mem_set>
  11610. for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill the new cluster with 0 */
  11611. 8004d24: 2300 movs r3, #0
  11612. 8004d26: 613b str r3, [r7, #16]
  11613. 8004d28: 6979 ldr r1, [r7, #20]
  11614. 8004d2a: 68f8 ldr r0, [r7, #12]
  11615. 8004d2c: f7ff fbac bl 8004488 <clust2sect>
  11616. 8004d30: 4602 mov r2, r0
  11617. 8004d32: 68fb ldr r3, [r7, #12]
  11618. 8004d34: 635a str r2, [r3, #52] ; 0x34
  11619. 8004d36: e012 b.n 8004d5e <dir_next+0x152>
  11620. fs->wflag = 1;
  11621. 8004d38: 68fb ldr r3, [r7, #12]
  11622. 8004d3a: 2201 movs r2, #1
  11623. 8004d3c: 70da strb r2, [r3, #3]
  11624. if (sync_window(fs) != FR_OK) return FR_DISK_ERR;
  11625. 8004d3e: 68f8 ldr r0, [r7, #12]
  11626. 8004d40: f7ff fac0 bl 80042c4 <sync_window>
  11627. 8004d44: 4603 mov r3, r0
  11628. 8004d46: 2b00 cmp r3, #0
  11629. 8004d48: d001 beq.n 8004d4e <dir_next+0x142>
  11630. 8004d4a: 2301 movs r3, #1
  11631. 8004d4c: e030 b.n 8004db0 <dir_next+0x1a4>
  11632. for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill the new cluster with 0 */
  11633. 8004d4e: 693b ldr r3, [r7, #16]
  11634. 8004d50: 3301 adds r3, #1
  11635. 8004d52: 613b str r3, [r7, #16]
  11636. 8004d54: 68fb ldr r3, [r7, #12]
  11637. 8004d56: 6b5b ldr r3, [r3, #52] ; 0x34
  11638. 8004d58: 1c5a adds r2, r3, #1
  11639. 8004d5a: 68fb ldr r3, [r7, #12]
  11640. 8004d5c: 635a str r2, [r3, #52] ; 0x34
  11641. 8004d5e: 68fb ldr r3, [r7, #12]
  11642. 8004d60: 895b ldrh r3, [r3, #10]
  11643. 8004d62: 461a mov r2, r3
  11644. 8004d64: 693b ldr r3, [r7, #16]
  11645. 8004d66: 4293 cmp r3, r2
  11646. 8004d68: d3e6 bcc.n 8004d38 <dir_next+0x12c>
  11647. }
  11648. fs->winsect -= n; /* Restore window offset */
  11649. 8004d6a: 68fb ldr r3, [r7, #12]
  11650. 8004d6c: 6b5a ldr r2, [r3, #52] ; 0x34
  11651. 8004d6e: 693b ldr r3, [r7, #16]
  11652. 8004d70: 1ad2 subs r2, r2, r3
  11653. 8004d72: 68fb ldr r3, [r7, #12]
  11654. 8004d74: 635a str r2, [r3, #52] ; 0x34
  11655. #else
  11656. if (!stretch) dp->sect = 0; /* (this line is to suppress compiler warning) */
  11657. dp->sect = 0; return FR_NO_FILE; /* Report EOT */
  11658. #endif
  11659. }
  11660. dp->clust = clst; /* Initialize data for new cluster */
  11661. 8004d76: 687b ldr r3, [r7, #4]
  11662. 8004d78: 697a ldr r2, [r7, #20]
  11663. 8004d7a: 619a str r2, [r3, #24]
  11664. dp->sect = clust2sect(fs, clst);
  11665. 8004d7c: 6979 ldr r1, [r7, #20]
  11666. 8004d7e: 68f8 ldr r0, [r7, #12]
  11667. 8004d80: f7ff fb82 bl 8004488 <clust2sect>
  11668. 8004d84: 4602 mov r2, r0
  11669. 8004d86: 687b ldr r3, [r7, #4]
  11670. 8004d88: 61da str r2, [r3, #28]
  11671. }
  11672. }
  11673. }
  11674. dp->dptr = ofs; /* Current entry */
  11675. 8004d8a: 687b ldr r3, [r7, #4]
  11676. 8004d8c: 68ba ldr r2, [r7, #8]
  11677. 8004d8e: 615a str r2, [r3, #20]
  11678. dp->dir = fs->win + ofs % SS(fs); /* Pointer to the entry in the win[] */
  11679. 8004d90: 68fb ldr r3, [r7, #12]
  11680. 8004d92: f103 0138 add.w r1, r3, #56 ; 0x38
  11681. 8004d96: 68fb ldr r3, [r7, #12]
  11682. 8004d98: 899b ldrh r3, [r3, #12]
  11683. 8004d9a: 461a mov r2, r3
  11684. 8004d9c: 68bb ldr r3, [r7, #8]
  11685. 8004d9e: fbb3 f0f2 udiv r0, r3, r2
  11686. 8004da2: fb02 f200 mul.w r2, r2, r0
  11687. 8004da6: 1a9b subs r3, r3, r2
  11688. 8004da8: 18ca adds r2, r1, r3
  11689. 8004daa: 687b ldr r3, [r7, #4]
  11690. 8004dac: 621a str r2, [r3, #32]
  11691. return FR_OK;
  11692. 8004dae: 2300 movs r3, #0
  11693. }
  11694. 8004db0: 4618 mov r0, r3
  11695. 8004db2: 3718 adds r7, #24
  11696. 8004db4: 46bd mov sp, r7
  11697. 8004db6: bd80 pop {r7, pc}
  11698. 08004db8 <dir_alloc>:
  11699. static
  11700. FRESULT dir_alloc ( /* FR_OK(0):succeeded, !=0:error */
  11701. DIR* dp, /* Pointer to the directory object */
  11702. UINT nent /* Number of contiguous entries to allocate */
  11703. )
  11704. {
  11705. 8004db8: b580 push {r7, lr}
  11706. 8004dba: b086 sub sp, #24
  11707. 8004dbc: af00 add r7, sp, #0
  11708. 8004dbe: 6078 str r0, [r7, #4]
  11709. 8004dc0: 6039 str r1, [r7, #0]
  11710. FRESULT res;
  11711. UINT n;
  11712. FATFS *fs = dp->obj.fs;
  11713. 8004dc2: 687b ldr r3, [r7, #4]
  11714. 8004dc4: 681b ldr r3, [r3, #0]
  11715. 8004dc6: 60fb str r3, [r7, #12]
  11716. res = dir_sdi(dp, 0);
  11717. 8004dc8: 2100 movs r1, #0
  11718. 8004dca: 6878 ldr r0, [r7, #4]
  11719. 8004dcc: f7ff fe95 bl 8004afa <dir_sdi>
  11720. 8004dd0: 4603 mov r3, r0
  11721. 8004dd2: 75fb strb r3, [r7, #23]
  11722. if (res == FR_OK) {
  11723. 8004dd4: 7dfb ldrb r3, [r7, #23]
  11724. 8004dd6: 2b00 cmp r3, #0
  11725. 8004dd8: d12b bne.n 8004e32 <dir_alloc+0x7a>
  11726. n = 0;
  11727. 8004dda: 2300 movs r3, #0
  11728. 8004ddc: 613b str r3, [r7, #16]
  11729. do {
  11730. res = move_window(fs, dp->sect);
  11731. 8004dde: 687b ldr r3, [r7, #4]
  11732. 8004de0: 69db ldr r3, [r3, #28]
  11733. 8004de2: 4619 mov r1, r3
  11734. 8004de4: 68f8 ldr r0, [r7, #12]
  11735. 8004de6: f7ff fab1 bl 800434c <move_window>
  11736. 8004dea: 4603 mov r3, r0
  11737. 8004dec: 75fb strb r3, [r7, #23]
  11738. if (res != FR_OK) break;
  11739. 8004dee: 7dfb ldrb r3, [r7, #23]
  11740. 8004df0: 2b00 cmp r3, #0
  11741. 8004df2: d11d bne.n 8004e30 <dir_alloc+0x78>
  11742. #if _FS_EXFAT
  11743. if ((fs->fs_type == FS_EXFAT) ? (int)((dp->dir[XDIR_Type] & 0x80) == 0) : (int)(dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0)) {
  11744. #else
  11745. if (dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0) {
  11746. 8004df4: 687b ldr r3, [r7, #4]
  11747. 8004df6: 6a1b ldr r3, [r3, #32]
  11748. 8004df8: 781b ldrb r3, [r3, #0]
  11749. 8004dfa: 2be5 cmp r3, #229 ; 0xe5
  11750. 8004dfc: d004 beq.n 8004e08 <dir_alloc+0x50>
  11751. 8004dfe: 687b ldr r3, [r7, #4]
  11752. 8004e00: 6a1b ldr r3, [r3, #32]
  11753. 8004e02: 781b ldrb r3, [r3, #0]
  11754. 8004e04: 2b00 cmp r3, #0
  11755. 8004e06: d107 bne.n 8004e18 <dir_alloc+0x60>
  11756. #endif
  11757. if (++n == nent) break; /* A block of contiguous free entries is found */
  11758. 8004e08: 693b ldr r3, [r7, #16]
  11759. 8004e0a: 3301 adds r3, #1
  11760. 8004e0c: 613b str r3, [r7, #16]
  11761. 8004e0e: 693a ldr r2, [r7, #16]
  11762. 8004e10: 683b ldr r3, [r7, #0]
  11763. 8004e12: 429a cmp r2, r3
  11764. 8004e14: d102 bne.n 8004e1c <dir_alloc+0x64>
  11765. 8004e16: e00c b.n 8004e32 <dir_alloc+0x7a>
  11766. } else {
  11767. n = 0; /* Not a blank entry. Restart to search */
  11768. 8004e18: 2300 movs r3, #0
  11769. 8004e1a: 613b str r3, [r7, #16]
  11770. }
  11771. res = dir_next(dp, 1);
  11772. 8004e1c: 2101 movs r1, #1
  11773. 8004e1e: 6878 ldr r0, [r7, #4]
  11774. 8004e20: f7ff fef4 bl 8004c0c <dir_next>
  11775. 8004e24: 4603 mov r3, r0
  11776. 8004e26: 75fb strb r3, [r7, #23]
  11777. } while (res == FR_OK); /* Next entry with table stretch enabled */
  11778. 8004e28: 7dfb ldrb r3, [r7, #23]
  11779. 8004e2a: 2b00 cmp r3, #0
  11780. 8004e2c: d0d7 beq.n 8004dde <dir_alloc+0x26>
  11781. 8004e2e: e000 b.n 8004e32 <dir_alloc+0x7a>
  11782. if (res != FR_OK) break;
  11783. 8004e30: bf00 nop
  11784. }
  11785. if (res == FR_NO_FILE) res = FR_DENIED; /* No directory entry to allocate */
  11786. 8004e32: 7dfb ldrb r3, [r7, #23]
  11787. 8004e34: 2b04 cmp r3, #4
  11788. 8004e36: d101 bne.n 8004e3c <dir_alloc+0x84>
  11789. 8004e38: 2307 movs r3, #7
  11790. 8004e3a: 75fb strb r3, [r7, #23]
  11791. return res;
  11792. 8004e3c: 7dfb ldrb r3, [r7, #23]
  11793. }
  11794. 8004e3e: 4618 mov r0, r3
  11795. 8004e40: 3718 adds r7, #24
  11796. 8004e42: 46bd mov sp, r7
  11797. 8004e44: bd80 pop {r7, pc}
  11798. 08004e46 <ld_clust>:
  11799. static
  11800. DWORD ld_clust ( /* Returns the top cluster value of the SFN entry */
  11801. FATFS* fs, /* Pointer to the fs object */
  11802. const BYTE* dir /* Pointer to the key entry */
  11803. )
  11804. {
  11805. 8004e46: b580 push {r7, lr}
  11806. 8004e48: b084 sub sp, #16
  11807. 8004e4a: af00 add r7, sp, #0
  11808. 8004e4c: 6078 str r0, [r7, #4]
  11809. 8004e4e: 6039 str r1, [r7, #0]
  11810. DWORD cl;
  11811. cl = ld_word(dir + DIR_FstClusLO);
  11812. 8004e50: 683b ldr r3, [r7, #0]
  11813. 8004e52: 331a adds r3, #26
  11814. 8004e54: 4618 mov r0, r3
  11815. 8004e56: f7fe ffd9 bl 8003e0c <ld_word>
  11816. 8004e5a: 4603 mov r3, r0
  11817. 8004e5c: 60fb str r3, [r7, #12]
  11818. if (fs->fs_type == FS_FAT32) {
  11819. 8004e5e: 687b ldr r3, [r7, #4]
  11820. 8004e60: 781b ldrb r3, [r3, #0]
  11821. 8004e62: 2b03 cmp r3, #3
  11822. 8004e64: d109 bne.n 8004e7a <ld_clust+0x34>
  11823. cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16;
  11824. 8004e66: 683b ldr r3, [r7, #0]
  11825. 8004e68: 3314 adds r3, #20
  11826. 8004e6a: 4618 mov r0, r3
  11827. 8004e6c: f7fe ffce bl 8003e0c <ld_word>
  11828. 8004e70: 4603 mov r3, r0
  11829. 8004e72: 041b lsls r3, r3, #16
  11830. 8004e74: 68fa ldr r2, [r7, #12]
  11831. 8004e76: 4313 orrs r3, r2
  11832. 8004e78: 60fb str r3, [r7, #12]
  11833. }
  11834. return cl;
  11835. 8004e7a: 68fb ldr r3, [r7, #12]
  11836. }
  11837. 8004e7c: 4618 mov r0, r3
  11838. 8004e7e: 3710 adds r7, #16
  11839. 8004e80: 46bd mov sp, r7
  11840. 8004e82: bd80 pop {r7, pc}
  11841. 08004e84 <st_clust>:
  11842. void st_clust (
  11843. FATFS* fs, /* Pointer to the fs object */
  11844. BYTE* dir, /* Pointer to the key entry */
  11845. DWORD cl /* Value to be set */
  11846. )
  11847. {
  11848. 8004e84: b580 push {r7, lr}
  11849. 8004e86: b084 sub sp, #16
  11850. 8004e88: af00 add r7, sp, #0
  11851. 8004e8a: 60f8 str r0, [r7, #12]
  11852. 8004e8c: 60b9 str r1, [r7, #8]
  11853. 8004e8e: 607a str r2, [r7, #4]
  11854. st_word(dir + DIR_FstClusLO, (WORD)cl);
  11855. 8004e90: 68bb ldr r3, [r7, #8]
  11856. 8004e92: 331a adds r3, #26
  11857. 8004e94: 687a ldr r2, [r7, #4]
  11858. 8004e96: b292 uxth r2, r2
  11859. 8004e98: 4611 mov r1, r2
  11860. 8004e9a: 4618 mov r0, r3
  11861. 8004e9c: f7fe ffef bl 8003e7e <st_word>
  11862. if (fs->fs_type == FS_FAT32) {
  11863. 8004ea0: 68fb ldr r3, [r7, #12]
  11864. 8004ea2: 781b ldrb r3, [r3, #0]
  11865. 8004ea4: 2b03 cmp r3, #3
  11866. 8004ea6: d109 bne.n 8004ebc <st_clust+0x38>
  11867. st_word(dir + DIR_FstClusHI, (WORD)(cl >> 16));
  11868. 8004ea8: 68bb ldr r3, [r7, #8]
  11869. 8004eaa: f103 0214 add.w r2, r3, #20
  11870. 8004eae: 687b ldr r3, [r7, #4]
  11871. 8004eb0: 0c1b lsrs r3, r3, #16
  11872. 8004eb2: b29b uxth r3, r3
  11873. 8004eb4: 4619 mov r1, r3
  11874. 8004eb6: 4610 mov r0, r2
  11875. 8004eb8: f7fe ffe1 bl 8003e7e <st_word>
  11876. }
  11877. }
  11878. 8004ebc: bf00 nop
  11879. 8004ebe: 3710 adds r7, #16
  11880. 8004ec0: 46bd mov sp, r7
  11881. 8004ec2: bd80 pop {r7, pc}
  11882. 08004ec4 <cmp_lfn>:
  11883. static
  11884. int cmp_lfn ( /* 1:matched, 0:not matched */
  11885. const WCHAR* lfnbuf, /* Pointer to the LFN working buffer to be compared */
  11886. BYTE* dir /* Pointer to the directory entry containing the part of LFN */
  11887. )
  11888. {
  11889. 8004ec4: b590 push {r4, r7, lr}
  11890. 8004ec6: b087 sub sp, #28
  11891. 8004ec8: af00 add r7, sp, #0
  11892. 8004eca: 6078 str r0, [r7, #4]
  11893. 8004ecc: 6039 str r1, [r7, #0]
  11894. UINT i, s;
  11895. WCHAR wc, uc;
  11896. if (ld_word(dir + LDIR_FstClusLO) != 0) return 0; /* Check LDIR_FstClusLO */
  11897. 8004ece: 683b ldr r3, [r7, #0]
  11898. 8004ed0: 331a adds r3, #26
  11899. 8004ed2: 4618 mov r0, r3
  11900. 8004ed4: f7fe ff9a bl 8003e0c <ld_word>
  11901. 8004ed8: 4603 mov r3, r0
  11902. 8004eda: 2b00 cmp r3, #0
  11903. 8004edc: d001 beq.n 8004ee2 <cmp_lfn+0x1e>
  11904. 8004ede: 2300 movs r3, #0
  11905. 8004ee0: e059 b.n 8004f96 <cmp_lfn+0xd2>
  11906. i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13; /* Offset in the LFN buffer */
  11907. 8004ee2: 683b ldr r3, [r7, #0]
  11908. 8004ee4: 781b ldrb r3, [r3, #0]
  11909. 8004ee6: f003 033f and.w r3, r3, #63 ; 0x3f
  11910. 8004eea: 1e5a subs r2, r3, #1
  11911. 8004eec: 4613 mov r3, r2
  11912. 8004eee: 005b lsls r3, r3, #1
  11913. 8004ef0: 4413 add r3, r2
  11914. 8004ef2: 009b lsls r3, r3, #2
  11915. 8004ef4: 4413 add r3, r2
  11916. 8004ef6: 617b str r3, [r7, #20]
  11917. for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */
  11918. 8004ef8: 2301 movs r3, #1
  11919. 8004efa: 81fb strh r3, [r7, #14]
  11920. 8004efc: 2300 movs r3, #0
  11921. 8004efe: 613b str r3, [r7, #16]
  11922. 8004f00: e033 b.n 8004f6a <cmp_lfn+0xa6>
  11923. uc = ld_word(dir + LfnOfs[s]); /* Pick an LFN character */
  11924. 8004f02: 4a27 ldr r2, [pc, #156] ; (8004fa0 <cmp_lfn+0xdc>)
  11925. 8004f04: 693b ldr r3, [r7, #16]
  11926. 8004f06: 4413 add r3, r2
  11927. 8004f08: 781b ldrb r3, [r3, #0]
  11928. 8004f0a: 461a mov r2, r3
  11929. 8004f0c: 683b ldr r3, [r7, #0]
  11930. 8004f0e: 4413 add r3, r2
  11931. 8004f10: 4618 mov r0, r3
  11932. 8004f12: f7fe ff7b bl 8003e0c <ld_word>
  11933. 8004f16: 4603 mov r3, r0
  11934. 8004f18: 81bb strh r3, [r7, #12]
  11935. if (wc) {
  11936. 8004f1a: 89fb ldrh r3, [r7, #14]
  11937. 8004f1c: 2b00 cmp r3, #0
  11938. 8004f1e: d01a beq.n 8004f56 <cmp_lfn+0x92>
  11939. if (i >= _MAX_LFN || ff_wtoupper(uc) != ff_wtoupper(lfnbuf[i++])) { /* Compare it */
  11940. 8004f20: 697b ldr r3, [r7, #20]
  11941. 8004f22: 2bfe cmp r3, #254 ; 0xfe
  11942. 8004f24: d812 bhi.n 8004f4c <cmp_lfn+0x88>
  11943. 8004f26: 89bb ldrh r3, [r7, #12]
  11944. 8004f28: 4618 mov r0, r3
  11945. 8004f2a: f002 f85f bl 8006fec <ff_wtoupper>
  11946. 8004f2e: 4603 mov r3, r0
  11947. 8004f30: 461c mov r4, r3
  11948. 8004f32: 697b ldr r3, [r7, #20]
  11949. 8004f34: 1c5a adds r2, r3, #1
  11950. 8004f36: 617a str r2, [r7, #20]
  11951. 8004f38: 005b lsls r3, r3, #1
  11952. 8004f3a: 687a ldr r2, [r7, #4]
  11953. 8004f3c: 4413 add r3, r2
  11954. 8004f3e: 881b ldrh r3, [r3, #0]
  11955. 8004f40: 4618 mov r0, r3
  11956. 8004f42: f002 f853 bl 8006fec <ff_wtoupper>
  11957. 8004f46: 4603 mov r3, r0
  11958. 8004f48: 429c cmp r4, r3
  11959. 8004f4a: d001 beq.n 8004f50 <cmp_lfn+0x8c>
  11960. return 0; /* Not matched */
  11961. 8004f4c: 2300 movs r3, #0
  11962. 8004f4e: e022 b.n 8004f96 <cmp_lfn+0xd2>
  11963. }
  11964. wc = uc;
  11965. 8004f50: 89bb ldrh r3, [r7, #12]
  11966. 8004f52: 81fb strh r3, [r7, #14]
  11967. 8004f54: e006 b.n 8004f64 <cmp_lfn+0xa0>
  11968. } else {
  11969. if (uc != 0xFFFF) return 0; /* Check filler */
  11970. 8004f56: 89bb ldrh r3, [r7, #12]
  11971. 8004f58: f64f 72ff movw r2, #65535 ; 0xffff
  11972. 8004f5c: 4293 cmp r3, r2
  11973. 8004f5e: d001 beq.n 8004f64 <cmp_lfn+0xa0>
  11974. 8004f60: 2300 movs r3, #0
  11975. 8004f62: e018 b.n 8004f96 <cmp_lfn+0xd2>
  11976. for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */
  11977. 8004f64: 693b ldr r3, [r7, #16]
  11978. 8004f66: 3301 adds r3, #1
  11979. 8004f68: 613b str r3, [r7, #16]
  11980. 8004f6a: 693b ldr r3, [r7, #16]
  11981. 8004f6c: 2b0c cmp r3, #12
  11982. 8004f6e: d9c8 bls.n 8004f02 <cmp_lfn+0x3e>
  11983. }
  11984. }
  11985. if ((dir[LDIR_Ord] & LLEF) && wc && lfnbuf[i]) return 0; /* Last segment matched but different length */
  11986. 8004f70: 683b ldr r3, [r7, #0]
  11987. 8004f72: 781b ldrb r3, [r3, #0]
  11988. 8004f74: f003 0340 and.w r3, r3, #64 ; 0x40
  11989. 8004f78: 2b00 cmp r3, #0
  11990. 8004f7a: d00b beq.n 8004f94 <cmp_lfn+0xd0>
  11991. 8004f7c: 89fb ldrh r3, [r7, #14]
  11992. 8004f7e: 2b00 cmp r3, #0
  11993. 8004f80: d008 beq.n 8004f94 <cmp_lfn+0xd0>
  11994. 8004f82: 697b ldr r3, [r7, #20]
  11995. 8004f84: 005b lsls r3, r3, #1
  11996. 8004f86: 687a ldr r2, [r7, #4]
  11997. 8004f88: 4413 add r3, r2
  11998. 8004f8a: 881b ldrh r3, [r3, #0]
  11999. 8004f8c: 2b00 cmp r3, #0
  12000. 8004f8e: d001 beq.n 8004f94 <cmp_lfn+0xd0>
  12001. 8004f90: 2300 movs r3, #0
  12002. 8004f92: e000 b.n 8004f96 <cmp_lfn+0xd2>
  12003. return 1; /* The part of LFN matched */
  12004. 8004f94: 2301 movs r3, #1
  12005. }
  12006. 8004f96: 4618 mov r0, r3
  12007. 8004f98: 371c adds r7, #28
  12008. 8004f9a: 46bd mov sp, r7
  12009. 8004f9c: bd90 pop {r4, r7, pc}
  12010. 8004f9e: bf00 nop
  12011. 8004fa0: 08007bc8 .word 0x08007bc8
  12012. 08004fa4 <put_lfn>:
  12013. const WCHAR* lfn, /* Pointer to the LFN */
  12014. BYTE* dir, /* Pointer to the LFN entry to be created */
  12015. BYTE ord, /* LFN order (1-20) */
  12016. BYTE sum /* Checksum of the corresponding SFN */
  12017. )
  12018. {
  12019. 8004fa4: b580 push {r7, lr}
  12020. 8004fa6: b088 sub sp, #32
  12021. 8004fa8: af00 add r7, sp, #0
  12022. 8004faa: 60f8 str r0, [r7, #12]
  12023. 8004fac: 60b9 str r1, [r7, #8]
  12024. 8004fae: 4611 mov r1, r2
  12025. 8004fb0: 461a mov r2, r3
  12026. 8004fb2: 460b mov r3, r1
  12027. 8004fb4: 71fb strb r3, [r7, #7]
  12028. 8004fb6: 4613 mov r3, r2
  12029. 8004fb8: 71bb strb r3, [r7, #6]
  12030. UINT i, s;
  12031. WCHAR wc;
  12032. dir[LDIR_Chksum] = sum; /* Set checksum */
  12033. 8004fba: 68bb ldr r3, [r7, #8]
  12034. 8004fbc: 330d adds r3, #13
  12035. 8004fbe: 79ba ldrb r2, [r7, #6]
  12036. 8004fc0: 701a strb r2, [r3, #0]
  12037. dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */
  12038. 8004fc2: 68bb ldr r3, [r7, #8]
  12039. 8004fc4: 330b adds r3, #11
  12040. 8004fc6: 220f movs r2, #15
  12041. 8004fc8: 701a strb r2, [r3, #0]
  12042. dir[LDIR_Type] = 0;
  12043. 8004fca: 68bb ldr r3, [r7, #8]
  12044. 8004fcc: 330c adds r3, #12
  12045. 8004fce: 2200 movs r2, #0
  12046. 8004fd0: 701a strb r2, [r3, #0]
  12047. st_word(dir + LDIR_FstClusLO, 0);
  12048. 8004fd2: 68bb ldr r3, [r7, #8]
  12049. 8004fd4: 331a adds r3, #26
  12050. 8004fd6: 2100 movs r1, #0
  12051. 8004fd8: 4618 mov r0, r3
  12052. 8004fda: f7fe ff50 bl 8003e7e <st_word>
  12053. i = (ord - 1) * 13; /* Get offset in the LFN working buffer */
  12054. 8004fde: 79fb ldrb r3, [r7, #7]
  12055. 8004fe0: 1e5a subs r2, r3, #1
  12056. 8004fe2: 4613 mov r3, r2
  12057. 8004fe4: 005b lsls r3, r3, #1
  12058. 8004fe6: 4413 add r3, r2
  12059. 8004fe8: 009b lsls r3, r3, #2
  12060. 8004fea: 4413 add r3, r2
  12061. 8004fec: 61fb str r3, [r7, #28]
  12062. s = wc = 0;
  12063. 8004fee: 2300 movs r3, #0
  12064. 8004ff0: 82fb strh r3, [r7, #22]
  12065. 8004ff2: 2300 movs r3, #0
  12066. 8004ff4: 61bb str r3, [r7, #24]
  12067. do {
  12068. if (wc != 0xFFFF) wc = lfn[i++]; /* Get an effective character */
  12069. 8004ff6: 8afb ldrh r3, [r7, #22]
  12070. 8004ff8: f64f 72ff movw r2, #65535 ; 0xffff
  12071. 8004ffc: 4293 cmp r3, r2
  12072. 8004ffe: d007 beq.n 8005010 <put_lfn+0x6c>
  12073. 8005000: 69fb ldr r3, [r7, #28]
  12074. 8005002: 1c5a adds r2, r3, #1
  12075. 8005004: 61fa str r2, [r7, #28]
  12076. 8005006: 005b lsls r3, r3, #1
  12077. 8005008: 68fa ldr r2, [r7, #12]
  12078. 800500a: 4413 add r3, r2
  12079. 800500c: 881b ldrh r3, [r3, #0]
  12080. 800500e: 82fb strh r3, [r7, #22]
  12081. st_word(dir + LfnOfs[s], wc); /* Put it */
  12082. 8005010: 4a17 ldr r2, [pc, #92] ; (8005070 <put_lfn+0xcc>)
  12083. 8005012: 69bb ldr r3, [r7, #24]
  12084. 8005014: 4413 add r3, r2
  12085. 8005016: 781b ldrb r3, [r3, #0]
  12086. 8005018: 461a mov r2, r3
  12087. 800501a: 68bb ldr r3, [r7, #8]
  12088. 800501c: 4413 add r3, r2
  12089. 800501e: 8afa ldrh r2, [r7, #22]
  12090. 8005020: 4611 mov r1, r2
  12091. 8005022: 4618 mov r0, r3
  12092. 8005024: f7fe ff2b bl 8003e7e <st_word>
  12093. if (wc == 0) wc = 0xFFFF; /* Padding characters for left locations */
  12094. 8005028: 8afb ldrh r3, [r7, #22]
  12095. 800502a: 2b00 cmp r3, #0
  12096. 800502c: d102 bne.n 8005034 <put_lfn+0x90>
  12097. 800502e: f64f 73ff movw r3, #65535 ; 0xffff
  12098. 8005032: 82fb strh r3, [r7, #22]
  12099. } while (++s < 13);
  12100. 8005034: 69bb ldr r3, [r7, #24]
  12101. 8005036: 3301 adds r3, #1
  12102. 8005038: 61bb str r3, [r7, #24]
  12103. 800503a: 69bb ldr r3, [r7, #24]
  12104. 800503c: 2b0c cmp r3, #12
  12105. 800503e: d9da bls.n 8004ff6 <put_lfn+0x52>
  12106. if (wc == 0xFFFF || !lfn[i]) ord |= LLEF; /* Last LFN part is the start of LFN sequence */
  12107. 8005040: 8afb ldrh r3, [r7, #22]
  12108. 8005042: f64f 72ff movw r2, #65535 ; 0xffff
  12109. 8005046: 4293 cmp r3, r2
  12110. 8005048: d006 beq.n 8005058 <put_lfn+0xb4>
  12111. 800504a: 69fb ldr r3, [r7, #28]
  12112. 800504c: 005b lsls r3, r3, #1
  12113. 800504e: 68fa ldr r2, [r7, #12]
  12114. 8005050: 4413 add r3, r2
  12115. 8005052: 881b ldrh r3, [r3, #0]
  12116. 8005054: 2b00 cmp r3, #0
  12117. 8005056: d103 bne.n 8005060 <put_lfn+0xbc>
  12118. 8005058: 79fb ldrb r3, [r7, #7]
  12119. 800505a: f043 0340 orr.w r3, r3, #64 ; 0x40
  12120. 800505e: 71fb strb r3, [r7, #7]
  12121. dir[LDIR_Ord] = ord; /* Set the LFN order */
  12122. 8005060: 68bb ldr r3, [r7, #8]
  12123. 8005062: 79fa ldrb r2, [r7, #7]
  12124. 8005064: 701a strb r2, [r3, #0]
  12125. }
  12126. 8005066: bf00 nop
  12127. 8005068: 3720 adds r7, #32
  12128. 800506a: 46bd mov sp, r7
  12129. 800506c: bd80 pop {r7, pc}
  12130. 800506e: bf00 nop
  12131. 8005070: 08007bc8 .word 0x08007bc8
  12132. 08005074 <gen_numname>:
  12133. BYTE* dst, /* Pointer to the buffer to store numbered SFN */
  12134. const BYTE* src, /* Pointer to SFN */
  12135. const WCHAR* lfn, /* Pointer to LFN */
  12136. UINT seq /* Sequence number */
  12137. )
  12138. {
  12139. 8005074: b580 push {r7, lr}
  12140. 8005076: b08c sub sp, #48 ; 0x30
  12141. 8005078: af00 add r7, sp, #0
  12142. 800507a: 60f8 str r0, [r7, #12]
  12143. 800507c: 60b9 str r1, [r7, #8]
  12144. 800507e: 607a str r2, [r7, #4]
  12145. 8005080: 603b str r3, [r7, #0]
  12146. UINT i, j;
  12147. WCHAR wc;
  12148. DWORD sr;
  12149. mem_cpy(dst, src, 11);
  12150. 8005082: 220b movs r2, #11
  12151. 8005084: 68b9 ldr r1, [r7, #8]
  12152. 8005086: 68f8 ldr r0, [r7, #12]
  12153. 8005088: f7fe ff3e bl 8003f08 <mem_cpy>
  12154. if (seq > 5) { /* In case of many collisions, generate a hash number instead of sequential number */
  12155. 800508c: 683b ldr r3, [r7, #0]
  12156. 800508e: 2b05 cmp r3, #5
  12157. 8005090: d92b bls.n 80050ea <gen_numname+0x76>
  12158. sr = seq;
  12159. 8005092: 683b ldr r3, [r7, #0]
  12160. 8005094: 61fb str r3, [r7, #28]
  12161. while (*lfn) { /* Create a CRC */
  12162. 8005096: e022 b.n 80050de <gen_numname+0x6a>
  12163. wc = *lfn++;
  12164. 8005098: 687b ldr r3, [r7, #4]
  12165. 800509a: 1c9a adds r2, r3, #2
  12166. 800509c: 607a str r2, [r7, #4]
  12167. 800509e: 881b ldrh r3, [r3, #0]
  12168. 80050a0: 847b strh r3, [r7, #34] ; 0x22
  12169. for (i = 0; i < 16; i++) {
  12170. 80050a2: 2300 movs r3, #0
  12171. 80050a4: 62bb str r3, [r7, #40] ; 0x28
  12172. 80050a6: e017 b.n 80050d8 <gen_numname+0x64>
  12173. sr = (sr << 1) + (wc & 1);
  12174. 80050a8: 69fb ldr r3, [r7, #28]
  12175. 80050aa: 005a lsls r2, r3, #1
  12176. 80050ac: 8c7b ldrh r3, [r7, #34] ; 0x22
  12177. 80050ae: f003 0301 and.w r3, r3, #1
  12178. 80050b2: 4413 add r3, r2
  12179. 80050b4: 61fb str r3, [r7, #28]
  12180. wc >>= 1;
  12181. 80050b6: 8c7b ldrh r3, [r7, #34] ; 0x22
  12182. 80050b8: 085b lsrs r3, r3, #1
  12183. 80050ba: 847b strh r3, [r7, #34] ; 0x22
  12184. if (sr & 0x10000) sr ^= 0x11021;
  12185. 80050bc: 69fb ldr r3, [r7, #28]
  12186. 80050be: f403 3380 and.w r3, r3, #65536 ; 0x10000
  12187. 80050c2: 2b00 cmp r3, #0
  12188. 80050c4: d005 beq.n 80050d2 <gen_numname+0x5e>
  12189. 80050c6: 69fb ldr r3, [r7, #28]
  12190. 80050c8: f483 3388 eor.w r3, r3, #69632 ; 0x11000
  12191. 80050cc: f083 0321 eor.w r3, r3, #33 ; 0x21
  12192. 80050d0: 61fb str r3, [r7, #28]
  12193. for (i = 0; i < 16; i++) {
  12194. 80050d2: 6abb ldr r3, [r7, #40] ; 0x28
  12195. 80050d4: 3301 adds r3, #1
  12196. 80050d6: 62bb str r3, [r7, #40] ; 0x28
  12197. 80050d8: 6abb ldr r3, [r7, #40] ; 0x28
  12198. 80050da: 2b0f cmp r3, #15
  12199. 80050dc: d9e4 bls.n 80050a8 <gen_numname+0x34>
  12200. while (*lfn) { /* Create a CRC */
  12201. 80050de: 687b ldr r3, [r7, #4]
  12202. 80050e0: 881b ldrh r3, [r3, #0]
  12203. 80050e2: 2b00 cmp r3, #0
  12204. 80050e4: d1d8 bne.n 8005098 <gen_numname+0x24>
  12205. }
  12206. }
  12207. seq = (UINT)sr;
  12208. 80050e6: 69fb ldr r3, [r7, #28]
  12209. 80050e8: 603b str r3, [r7, #0]
  12210. }
  12211. /* itoa (hexdecimal) */
  12212. i = 7;
  12213. 80050ea: 2307 movs r3, #7
  12214. 80050ec: 62bb str r3, [r7, #40] ; 0x28
  12215. do {
  12216. c = (BYTE)((seq % 16) + '0');
  12217. 80050ee: 683b ldr r3, [r7, #0]
  12218. 80050f0: b2db uxtb r3, r3
  12219. 80050f2: f003 030f and.w r3, r3, #15
  12220. 80050f6: b2db uxtb r3, r3
  12221. 80050f8: 3330 adds r3, #48 ; 0x30
  12222. 80050fa: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12223. if (c > '9') c += 7;
  12224. 80050fe: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12225. 8005102: 2b39 cmp r3, #57 ; 0x39
  12226. 8005104: d904 bls.n 8005110 <gen_numname+0x9c>
  12227. 8005106: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12228. 800510a: 3307 adds r3, #7
  12229. 800510c: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12230. ns[i--] = c;
  12231. 8005110: 6abb ldr r3, [r7, #40] ; 0x28
  12232. 8005112: 1e5a subs r2, r3, #1
  12233. 8005114: 62ba str r2, [r7, #40] ; 0x28
  12234. 8005116: f107 0230 add.w r2, r7, #48 ; 0x30
  12235. 800511a: 4413 add r3, r2
  12236. 800511c: f897 202f ldrb.w r2, [r7, #47] ; 0x2f
  12237. 8005120: f803 2c1c strb.w r2, [r3, #-28]
  12238. seq /= 16;
  12239. 8005124: 683b ldr r3, [r7, #0]
  12240. 8005126: 091b lsrs r3, r3, #4
  12241. 8005128: 603b str r3, [r7, #0]
  12242. } while (seq);
  12243. 800512a: 683b ldr r3, [r7, #0]
  12244. 800512c: 2b00 cmp r3, #0
  12245. 800512e: d1de bne.n 80050ee <gen_numname+0x7a>
  12246. ns[i] = '~';
  12247. 8005130: f107 0214 add.w r2, r7, #20
  12248. 8005134: 6abb ldr r3, [r7, #40] ; 0x28
  12249. 8005136: 4413 add r3, r2
  12250. 8005138: 227e movs r2, #126 ; 0x7e
  12251. 800513a: 701a strb r2, [r3, #0]
  12252. /* Append the number */
  12253. for (j = 0; j < i && dst[j] != ' '; j++) {
  12254. 800513c: 2300 movs r3, #0
  12255. 800513e: 627b str r3, [r7, #36] ; 0x24
  12256. 8005140: e002 b.n 8005148 <gen_numname+0xd4>
  12257. 8005142: 6a7b ldr r3, [r7, #36] ; 0x24
  12258. 8005144: 3301 adds r3, #1
  12259. 8005146: 627b str r3, [r7, #36] ; 0x24
  12260. 8005148: 6a7a ldr r2, [r7, #36] ; 0x24
  12261. 800514a: 6abb ldr r3, [r7, #40] ; 0x28
  12262. 800514c: 429a cmp r2, r3
  12263. 800514e: d205 bcs.n 800515c <gen_numname+0xe8>
  12264. 8005150: 68fa ldr r2, [r7, #12]
  12265. 8005152: 6a7b ldr r3, [r7, #36] ; 0x24
  12266. 8005154: 4413 add r3, r2
  12267. 8005156: 781b ldrb r3, [r3, #0]
  12268. 8005158: 2b20 cmp r3, #32
  12269. 800515a: d1f2 bne.n 8005142 <gen_numname+0xce>
  12270. if (j == i - 1) break;
  12271. j++;
  12272. }
  12273. }
  12274. do {
  12275. dst[j++] = (i < 8) ? ns[i++] : ' ';
  12276. 800515c: 6abb ldr r3, [r7, #40] ; 0x28
  12277. 800515e: 2b07 cmp r3, #7
  12278. 8005160: d808 bhi.n 8005174 <gen_numname+0x100>
  12279. 8005162: 6abb ldr r3, [r7, #40] ; 0x28
  12280. 8005164: 1c5a adds r2, r3, #1
  12281. 8005166: 62ba str r2, [r7, #40] ; 0x28
  12282. 8005168: f107 0230 add.w r2, r7, #48 ; 0x30
  12283. 800516c: 4413 add r3, r2
  12284. 800516e: f813 1c1c ldrb.w r1, [r3, #-28]
  12285. 8005172: e000 b.n 8005176 <gen_numname+0x102>
  12286. 8005174: 2120 movs r1, #32
  12287. 8005176: 6a7b ldr r3, [r7, #36] ; 0x24
  12288. 8005178: 1c5a adds r2, r3, #1
  12289. 800517a: 627a str r2, [r7, #36] ; 0x24
  12290. 800517c: 68fa ldr r2, [r7, #12]
  12291. 800517e: 4413 add r3, r2
  12292. 8005180: 460a mov r2, r1
  12293. 8005182: 701a strb r2, [r3, #0]
  12294. } while (j < 8);
  12295. 8005184: 6a7b ldr r3, [r7, #36] ; 0x24
  12296. 8005186: 2b07 cmp r3, #7
  12297. 8005188: d9e8 bls.n 800515c <gen_numname+0xe8>
  12298. }
  12299. 800518a: bf00 nop
  12300. 800518c: 3730 adds r7, #48 ; 0x30
  12301. 800518e: 46bd mov sp, r7
  12302. 8005190: bd80 pop {r7, pc}
  12303. 08005192 <sum_sfn>:
  12304. static
  12305. BYTE sum_sfn (
  12306. const BYTE* dir /* Pointer to the SFN entry */
  12307. )
  12308. {
  12309. 8005192: b480 push {r7}
  12310. 8005194: b085 sub sp, #20
  12311. 8005196: af00 add r7, sp, #0
  12312. 8005198: 6078 str r0, [r7, #4]
  12313. BYTE sum = 0;
  12314. 800519a: 2300 movs r3, #0
  12315. 800519c: 73fb strb r3, [r7, #15]
  12316. UINT n = 11;
  12317. 800519e: 230b movs r3, #11
  12318. 80051a0: 60bb str r3, [r7, #8]
  12319. do {
  12320. sum = (sum >> 1) + (sum << 7) + *dir++;
  12321. 80051a2: 7bfb ldrb r3, [r7, #15]
  12322. 80051a4: b2da uxtb r2, r3
  12323. 80051a6: 0852 lsrs r2, r2, #1
  12324. 80051a8: 01db lsls r3, r3, #7
  12325. 80051aa: 4313 orrs r3, r2
  12326. 80051ac: b2da uxtb r2, r3
  12327. 80051ae: 687b ldr r3, [r7, #4]
  12328. 80051b0: 1c59 adds r1, r3, #1
  12329. 80051b2: 6079 str r1, [r7, #4]
  12330. 80051b4: 781b ldrb r3, [r3, #0]
  12331. 80051b6: 4413 add r3, r2
  12332. 80051b8: 73fb strb r3, [r7, #15]
  12333. } while (--n);
  12334. 80051ba: 68bb ldr r3, [r7, #8]
  12335. 80051bc: 3b01 subs r3, #1
  12336. 80051be: 60bb str r3, [r7, #8]
  12337. 80051c0: 68bb ldr r3, [r7, #8]
  12338. 80051c2: 2b00 cmp r3, #0
  12339. 80051c4: d1ed bne.n 80051a2 <sum_sfn+0x10>
  12340. return sum;
  12341. 80051c6: 7bfb ldrb r3, [r7, #15]
  12342. }
  12343. 80051c8: 4618 mov r0, r3
  12344. 80051ca: 3714 adds r7, #20
  12345. 80051cc: 46bd mov sp, r7
  12346. 80051ce: bc80 pop {r7}
  12347. 80051d0: 4770 bx lr
  12348. 080051d2 <dir_find>:
  12349. static
  12350. FRESULT dir_find ( /* FR_OK(0):succeeded, !=0:error */
  12351. DIR* dp /* Pointer to the directory object with the file name */
  12352. )
  12353. {
  12354. 80051d2: b580 push {r7, lr}
  12355. 80051d4: b086 sub sp, #24
  12356. 80051d6: af00 add r7, sp, #0
  12357. 80051d8: 6078 str r0, [r7, #4]
  12358. FRESULT res;
  12359. FATFS *fs = dp->obj.fs;
  12360. 80051da: 687b ldr r3, [r7, #4]
  12361. 80051dc: 681b ldr r3, [r3, #0]
  12362. 80051de: 613b str r3, [r7, #16]
  12363. BYTE c;
  12364. #if _USE_LFN != 0
  12365. BYTE a, ord, sum;
  12366. #endif
  12367. res = dir_sdi(dp, 0); /* Rewind directory object */
  12368. 80051e0: 2100 movs r1, #0
  12369. 80051e2: 6878 ldr r0, [r7, #4]
  12370. 80051e4: f7ff fc89 bl 8004afa <dir_sdi>
  12371. 80051e8: 4603 mov r3, r0
  12372. 80051ea: 75fb strb r3, [r7, #23]
  12373. if (res != FR_OK) return res;
  12374. 80051ec: 7dfb ldrb r3, [r7, #23]
  12375. 80051ee: 2b00 cmp r3, #0
  12376. 80051f0: d001 beq.n 80051f6 <dir_find+0x24>
  12377. 80051f2: 7dfb ldrb r3, [r7, #23]
  12378. 80051f4: e0a9 b.n 800534a <dir_find+0x178>
  12379. return res;
  12380. }
  12381. #endif
  12382. /* On the FAT12/16/32 volume */
  12383. #if _USE_LFN != 0
  12384. ord = sum = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
  12385. 80051f6: 23ff movs r3, #255 ; 0xff
  12386. 80051f8: 753b strb r3, [r7, #20]
  12387. 80051fa: 7d3b ldrb r3, [r7, #20]
  12388. 80051fc: 757b strb r3, [r7, #21]
  12389. 80051fe: 687b ldr r3, [r7, #4]
  12390. 8005200: f04f 32ff mov.w r2, #4294967295
  12391. 8005204: 631a str r2, [r3, #48] ; 0x30
  12392. #endif
  12393. do {
  12394. res = move_window(fs, dp->sect);
  12395. 8005206: 687b ldr r3, [r7, #4]
  12396. 8005208: 69db ldr r3, [r3, #28]
  12397. 800520a: 4619 mov r1, r3
  12398. 800520c: 6938 ldr r0, [r7, #16]
  12399. 800520e: f7ff f89d bl 800434c <move_window>
  12400. 8005212: 4603 mov r3, r0
  12401. 8005214: 75fb strb r3, [r7, #23]
  12402. if (res != FR_OK) break;
  12403. 8005216: 7dfb ldrb r3, [r7, #23]
  12404. 8005218: 2b00 cmp r3, #0
  12405. 800521a: f040 8090 bne.w 800533e <dir_find+0x16c>
  12406. c = dp->dir[DIR_Name];
  12407. 800521e: 687b ldr r3, [r7, #4]
  12408. 8005220: 6a1b ldr r3, [r3, #32]
  12409. 8005222: 781b ldrb r3, [r3, #0]
  12410. 8005224: 75bb strb r3, [r7, #22]
  12411. if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */
  12412. 8005226: 7dbb ldrb r3, [r7, #22]
  12413. 8005228: 2b00 cmp r3, #0
  12414. 800522a: d102 bne.n 8005232 <dir_find+0x60>
  12415. 800522c: 2304 movs r3, #4
  12416. 800522e: 75fb strb r3, [r7, #23]
  12417. 8005230: e08a b.n 8005348 <dir_find+0x176>
  12418. #if _USE_LFN != 0 /* LFN configuration */
  12419. dp->obj.attr = a = dp->dir[DIR_Attr] & AM_MASK;
  12420. 8005232: 687b ldr r3, [r7, #4]
  12421. 8005234: 6a1b ldr r3, [r3, #32]
  12422. 8005236: 330b adds r3, #11
  12423. 8005238: 781b ldrb r3, [r3, #0]
  12424. 800523a: f003 033f and.w r3, r3, #63 ; 0x3f
  12425. 800523e: 73fb strb r3, [r7, #15]
  12426. 8005240: 687b ldr r3, [r7, #4]
  12427. 8005242: 7bfa ldrb r2, [r7, #15]
  12428. 8005244: 719a strb r2, [r3, #6]
  12429. if (c == DDEM || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */
  12430. 8005246: 7dbb ldrb r3, [r7, #22]
  12431. 8005248: 2be5 cmp r3, #229 ; 0xe5
  12432. 800524a: d007 beq.n 800525c <dir_find+0x8a>
  12433. 800524c: 7bfb ldrb r3, [r7, #15]
  12434. 800524e: f003 0308 and.w r3, r3, #8
  12435. 8005252: 2b00 cmp r3, #0
  12436. 8005254: d009 beq.n 800526a <dir_find+0x98>
  12437. 8005256: 7bfb ldrb r3, [r7, #15]
  12438. 8005258: 2b0f cmp r3, #15
  12439. 800525a: d006 beq.n 800526a <dir_find+0x98>
  12440. ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
  12441. 800525c: 23ff movs r3, #255 ; 0xff
  12442. 800525e: 757b strb r3, [r7, #21]
  12443. 8005260: 687b ldr r3, [r7, #4]
  12444. 8005262: f04f 32ff mov.w r2, #4294967295
  12445. 8005266: 631a str r2, [r3, #48] ; 0x30
  12446. 8005268: e05e b.n 8005328 <dir_find+0x156>
  12447. } else {
  12448. if (a == AM_LFN) { /* An LFN entry is found */
  12449. 800526a: 7bfb ldrb r3, [r7, #15]
  12450. 800526c: 2b0f cmp r3, #15
  12451. 800526e: d136 bne.n 80052de <dir_find+0x10c>
  12452. if (!(dp->fn[NSFLAG] & NS_NOLFN)) {
  12453. 8005270: 687b ldr r3, [r7, #4]
  12454. 8005272: f893 302f ldrb.w r3, [r3, #47] ; 0x2f
  12455. 8005276: f003 0340 and.w r3, r3, #64 ; 0x40
  12456. 800527a: 2b00 cmp r3, #0
  12457. 800527c: d154 bne.n 8005328 <dir_find+0x156>
  12458. if (c & LLEF) { /* Is it start of LFN sequence? */
  12459. 800527e: 7dbb ldrb r3, [r7, #22]
  12460. 8005280: f003 0340 and.w r3, r3, #64 ; 0x40
  12461. 8005284: 2b00 cmp r3, #0
  12462. 8005286: d00d beq.n 80052a4 <dir_find+0xd2>
  12463. sum = dp->dir[LDIR_Chksum];
  12464. 8005288: 687b ldr r3, [r7, #4]
  12465. 800528a: 6a1b ldr r3, [r3, #32]
  12466. 800528c: 7b5b ldrb r3, [r3, #13]
  12467. 800528e: 753b strb r3, [r7, #20]
  12468. c &= (BYTE)~LLEF; ord = c; /* LFN start order */
  12469. 8005290: 7dbb ldrb r3, [r7, #22]
  12470. 8005292: f023 0340 bic.w r3, r3, #64 ; 0x40
  12471. 8005296: 75bb strb r3, [r7, #22]
  12472. 8005298: 7dbb ldrb r3, [r7, #22]
  12473. 800529a: 757b strb r3, [r7, #21]
  12474. dp->blk_ofs = dp->dptr; /* Start offset of LFN */
  12475. 800529c: 687b ldr r3, [r7, #4]
  12476. 800529e: 695a ldr r2, [r3, #20]
  12477. 80052a0: 687b ldr r3, [r7, #4]
  12478. 80052a2: 631a str r2, [r3, #48] ; 0x30
  12479. }
  12480. /* Check validity of the LFN entry and compare it with given name */
  12481. ord = (c == ord && sum == dp->dir[LDIR_Chksum] && cmp_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF;
  12482. 80052a4: 7dba ldrb r2, [r7, #22]
  12483. 80052a6: 7d7b ldrb r3, [r7, #21]
  12484. 80052a8: 429a cmp r2, r3
  12485. 80052aa: d115 bne.n 80052d8 <dir_find+0x106>
  12486. 80052ac: 687b ldr r3, [r7, #4]
  12487. 80052ae: 6a1b ldr r3, [r3, #32]
  12488. 80052b0: 330d adds r3, #13
  12489. 80052b2: 781b ldrb r3, [r3, #0]
  12490. 80052b4: 7d3a ldrb r2, [r7, #20]
  12491. 80052b6: 429a cmp r2, r3
  12492. 80052b8: d10e bne.n 80052d8 <dir_find+0x106>
  12493. 80052ba: 693b ldr r3, [r7, #16]
  12494. 80052bc: 691a ldr r2, [r3, #16]
  12495. 80052be: 687b ldr r3, [r7, #4]
  12496. 80052c0: 6a1b ldr r3, [r3, #32]
  12497. 80052c2: 4619 mov r1, r3
  12498. 80052c4: 4610 mov r0, r2
  12499. 80052c6: f7ff fdfd bl 8004ec4 <cmp_lfn>
  12500. 80052ca: 4603 mov r3, r0
  12501. 80052cc: 2b00 cmp r3, #0
  12502. 80052ce: d003 beq.n 80052d8 <dir_find+0x106>
  12503. 80052d0: 7d7b ldrb r3, [r7, #21]
  12504. 80052d2: 3b01 subs r3, #1
  12505. 80052d4: b2db uxtb r3, r3
  12506. 80052d6: e000 b.n 80052da <dir_find+0x108>
  12507. 80052d8: 23ff movs r3, #255 ; 0xff
  12508. 80052da: 757b strb r3, [r7, #21]
  12509. 80052dc: e024 b.n 8005328 <dir_find+0x156>
  12510. }
  12511. } else { /* An SFN entry is found */
  12512. if (!ord && sum == sum_sfn(dp->dir)) break; /* LFN matched? */
  12513. 80052de: 7d7b ldrb r3, [r7, #21]
  12514. 80052e0: 2b00 cmp r3, #0
  12515. 80052e2: d109 bne.n 80052f8 <dir_find+0x126>
  12516. 80052e4: 687b ldr r3, [r7, #4]
  12517. 80052e6: 6a1b ldr r3, [r3, #32]
  12518. 80052e8: 4618 mov r0, r3
  12519. 80052ea: f7ff ff52 bl 8005192 <sum_sfn>
  12520. 80052ee: 4603 mov r3, r0
  12521. 80052f0: 461a mov r2, r3
  12522. 80052f2: 7d3b ldrb r3, [r7, #20]
  12523. 80052f4: 4293 cmp r3, r2
  12524. 80052f6: d024 beq.n 8005342 <dir_find+0x170>
  12525. if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* SFN matched? */
  12526. 80052f8: 687b ldr r3, [r7, #4]
  12527. 80052fa: f893 302f ldrb.w r3, [r3, #47] ; 0x2f
  12528. 80052fe: f003 0301 and.w r3, r3, #1
  12529. 8005302: 2b00 cmp r3, #0
  12530. 8005304: d10a bne.n 800531c <dir_find+0x14a>
  12531. 8005306: 687b ldr r3, [r7, #4]
  12532. 8005308: 6a18 ldr r0, [r3, #32]
  12533. 800530a: 687b ldr r3, [r7, #4]
  12534. 800530c: 3324 adds r3, #36 ; 0x24
  12535. 800530e: 220b movs r2, #11
  12536. 8005310: 4619 mov r1, r3
  12537. 8005312: f7fe fe32 bl 8003f7a <mem_cmp>
  12538. 8005316: 4603 mov r3, r0
  12539. 8005318: 2b00 cmp r3, #0
  12540. 800531a: d014 beq.n 8005346 <dir_find+0x174>
  12541. ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */
  12542. 800531c: 23ff movs r3, #255 ; 0xff
  12543. 800531e: 757b strb r3, [r7, #21]
  12544. 8005320: 687b ldr r3, [r7, #4]
  12545. 8005322: f04f 32ff mov.w r2, #4294967295
  12546. 8005326: 631a str r2, [r3, #48] ; 0x30
  12547. }
  12548. #else /* Non LFN configuration */
  12549. dp->obj.attr = dp->dir[DIR_Attr] & AM_MASK;
  12550. if (!(dp->dir[DIR_Attr] & AM_VOL) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* Is it a valid entry? */
  12551. #endif
  12552. res = dir_next(dp, 0); /* Next entry */
  12553. 8005328: 2100 movs r1, #0
  12554. 800532a: 6878 ldr r0, [r7, #4]
  12555. 800532c: f7ff fc6e bl 8004c0c <dir_next>
  12556. 8005330: 4603 mov r3, r0
  12557. 8005332: 75fb strb r3, [r7, #23]
  12558. } while (res == FR_OK);
  12559. 8005334: 7dfb ldrb r3, [r7, #23]
  12560. 8005336: 2b00 cmp r3, #0
  12561. 8005338: f43f af65 beq.w 8005206 <dir_find+0x34>
  12562. 800533c: e004 b.n 8005348 <dir_find+0x176>
  12563. if (res != FR_OK) break;
  12564. 800533e: bf00 nop
  12565. 8005340: e002 b.n 8005348 <dir_find+0x176>
  12566. if (!ord && sum == sum_sfn(dp->dir)) break; /* LFN matched? */
  12567. 8005342: bf00 nop
  12568. 8005344: e000 b.n 8005348 <dir_find+0x176>
  12569. if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* SFN matched? */
  12570. 8005346: bf00 nop
  12571. return res;
  12572. 8005348: 7dfb ldrb r3, [r7, #23]
  12573. }
  12574. 800534a: 4618 mov r0, r3
  12575. 800534c: 3718 adds r7, #24
  12576. 800534e: 46bd mov sp, r7
  12577. 8005350: bd80 pop {r7, pc}
  12578. ...
  12579. 08005354 <dir_register>:
  12580. static
  12581. FRESULT dir_register ( /* FR_OK:succeeded, FR_DENIED:no free entry or too many SFN collision, FR_DISK_ERR:disk error */
  12582. DIR* dp /* Target directory with object name to be created */
  12583. )
  12584. {
  12585. 8005354: b580 push {r7, lr}
  12586. 8005356: b08c sub sp, #48 ; 0x30
  12587. 8005358: af00 add r7, sp, #0
  12588. 800535a: 6078 str r0, [r7, #4]
  12589. FRESULT res;
  12590. FATFS *fs = dp->obj.fs;
  12591. 800535c: 687b ldr r3, [r7, #4]
  12592. 800535e: 681b ldr r3, [r3, #0]
  12593. 8005360: 61fb str r3, [r7, #28]
  12594. #if _USE_LFN != 0 /* LFN configuration */
  12595. UINT n, nlen, nent;
  12596. BYTE sn[12], sum;
  12597. if (dp->fn[NSFLAG] & (NS_DOT | NS_NONAME)) return FR_INVALID_NAME; /* Check name validity */
  12598. 8005362: 687b ldr r3, [r7, #4]
  12599. 8005364: f893 302f ldrb.w r3, [r3, #47] ; 0x2f
  12600. 8005368: f003 03a0 and.w r3, r3, #160 ; 0xa0
  12601. 800536c: 2b00 cmp r3, #0
  12602. 800536e: d001 beq.n 8005374 <dir_register+0x20>
  12603. 8005370: 2306 movs r3, #6
  12604. 8005372: e0e0 b.n 8005536 <dir_register+0x1e2>
  12605. for (nlen = 0; fs->lfnbuf[nlen]; nlen++) ; /* Get lfn length */
  12606. 8005374: 2300 movs r3, #0
  12607. 8005376: 627b str r3, [r7, #36] ; 0x24
  12608. 8005378: e002 b.n 8005380 <dir_register+0x2c>
  12609. 800537a: 6a7b ldr r3, [r7, #36] ; 0x24
  12610. 800537c: 3301 adds r3, #1
  12611. 800537e: 627b str r3, [r7, #36] ; 0x24
  12612. 8005380: 69fb ldr r3, [r7, #28]
  12613. 8005382: 691a ldr r2, [r3, #16]
  12614. 8005384: 6a7b ldr r3, [r7, #36] ; 0x24
  12615. 8005386: 005b lsls r3, r3, #1
  12616. 8005388: 4413 add r3, r2
  12617. 800538a: 881b ldrh r3, [r3, #0]
  12618. 800538c: 2b00 cmp r3, #0
  12619. 800538e: d1f4 bne.n 800537a <dir_register+0x26>
  12620. create_xdir(fs->dirbuf, fs->lfnbuf); /* Create on-memory directory block to be written later */
  12621. return FR_OK;
  12622. }
  12623. #endif
  12624. /* On the FAT12/16/32 volume */
  12625. mem_cpy(sn, dp->fn, 12);
  12626. 8005390: 687b ldr r3, [r7, #4]
  12627. 8005392: f103 0124 add.w r1, r3, #36 ; 0x24
  12628. 8005396: f107 030c add.w r3, r7, #12
  12629. 800539a: 220c movs r2, #12
  12630. 800539c: 4618 mov r0, r3
  12631. 800539e: f7fe fdb3 bl 8003f08 <mem_cpy>
  12632. if (sn[NSFLAG] & NS_LOSS) { /* When LFN is out of 8.3 format, generate a numbered name */
  12633. 80053a2: 7dfb ldrb r3, [r7, #23]
  12634. 80053a4: f003 0301 and.w r3, r3, #1
  12635. 80053a8: 2b00 cmp r3, #0
  12636. 80053aa: d032 beq.n 8005412 <dir_register+0xbe>
  12637. dp->fn[NSFLAG] = NS_NOLFN; /* Find only SFN */
  12638. 80053ac: 687b ldr r3, [r7, #4]
  12639. 80053ae: 2240 movs r2, #64 ; 0x40
  12640. 80053b0: f883 202f strb.w r2, [r3, #47] ; 0x2f
  12641. for (n = 1; n < 100; n++) {
  12642. 80053b4: 2301 movs r3, #1
  12643. 80053b6: 62bb str r3, [r7, #40] ; 0x28
  12644. 80053b8: e016 b.n 80053e8 <dir_register+0x94>
  12645. gen_numname(dp->fn, sn, fs->lfnbuf, n); /* Generate a numbered name */
  12646. 80053ba: 687b ldr r3, [r7, #4]
  12647. 80053bc: f103 0024 add.w r0, r3, #36 ; 0x24
  12648. 80053c0: 69fb ldr r3, [r7, #28]
  12649. 80053c2: 691a ldr r2, [r3, #16]
  12650. 80053c4: f107 010c add.w r1, r7, #12
  12651. 80053c8: 6abb ldr r3, [r7, #40] ; 0x28
  12652. 80053ca: f7ff fe53 bl 8005074 <gen_numname>
  12653. res = dir_find(dp); /* Check if the name collides with existing SFN */
  12654. 80053ce: 6878 ldr r0, [r7, #4]
  12655. 80053d0: f7ff feff bl 80051d2 <dir_find>
  12656. 80053d4: 4603 mov r3, r0
  12657. 80053d6: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12658. if (res != FR_OK) break;
  12659. 80053da: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12660. 80053de: 2b00 cmp r3, #0
  12661. 80053e0: d106 bne.n 80053f0 <dir_register+0x9c>
  12662. for (n = 1; n < 100; n++) {
  12663. 80053e2: 6abb ldr r3, [r7, #40] ; 0x28
  12664. 80053e4: 3301 adds r3, #1
  12665. 80053e6: 62bb str r3, [r7, #40] ; 0x28
  12666. 80053e8: 6abb ldr r3, [r7, #40] ; 0x28
  12667. 80053ea: 2b63 cmp r3, #99 ; 0x63
  12668. 80053ec: d9e5 bls.n 80053ba <dir_register+0x66>
  12669. 80053ee: e000 b.n 80053f2 <dir_register+0x9e>
  12670. if (res != FR_OK) break;
  12671. 80053f0: bf00 nop
  12672. }
  12673. if (n == 100) return FR_DENIED; /* Abort if too many collisions */
  12674. 80053f2: 6abb ldr r3, [r7, #40] ; 0x28
  12675. 80053f4: 2b64 cmp r3, #100 ; 0x64
  12676. 80053f6: d101 bne.n 80053fc <dir_register+0xa8>
  12677. 80053f8: 2307 movs r3, #7
  12678. 80053fa: e09c b.n 8005536 <dir_register+0x1e2>
  12679. if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */
  12680. 80053fc: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12681. 8005400: 2b04 cmp r3, #4
  12682. 8005402: d002 beq.n 800540a <dir_register+0xb6>
  12683. 8005404: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12684. 8005408: e095 b.n 8005536 <dir_register+0x1e2>
  12685. dp->fn[NSFLAG] = sn[NSFLAG];
  12686. 800540a: 7dfa ldrb r2, [r7, #23]
  12687. 800540c: 687b ldr r3, [r7, #4]
  12688. 800540e: f883 202f strb.w r2, [r3, #47] ; 0x2f
  12689. }
  12690. /* Create an SFN with/without LFNs. */
  12691. nent = (sn[NSFLAG] & NS_LFN) ? (nlen + 12) / 13 + 1 : 1; /* Number of entries to allocate */
  12692. 8005412: 7dfb ldrb r3, [r7, #23]
  12693. 8005414: f003 0302 and.w r3, r3, #2
  12694. 8005418: 2b00 cmp r3, #0
  12695. 800541a: d007 beq.n 800542c <dir_register+0xd8>
  12696. 800541c: 6a7b ldr r3, [r7, #36] ; 0x24
  12697. 800541e: 330c adds r3, #12
  12698. 8005420: 4a47 ldr r2, [pc, #284] ; (8005540 <dir_register+0x1ec>)
  12699. 8005422: fba2 2303 umull r2, r3, r2, r3
  12700. 8005426: 089b lsrs r3, r3, #2
  12701. 8005428: 3301 adds r3, #1
  12702. 800542a: e000 b.n 800542e <dir_register+0xda>
  12703. 800542c: 2301 movs r3, #1
  12704. 800542e: 623b str r3, [r7, #32]
  12705. res = dir_alloc(dp, nent); /* Allocate entries */
  12706. 8005430: 6a39 ldr r1, [r7, #32]
  12707. 8005432: 6878 ldr r0, [r7, #4]
  12708. 8005434: f7ff fcc0 bl 8004db8 <dir_alloc>
  12709. 8005438: 4603 mov r3, r0
  12710. 800543a: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12711. if (res == FR_OK && --nent) { /* Set LFN entry if needed */
  12712. 800543e: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12713. 8005442: 2b00 cmp r3, #0
  12714. 8005444: d148 bne.n 80054d8 <dir_register+0x184>
  12715. 8005446: 6a3b ldr r3, [r7, #32]
  12716. 8005448: 3b01 subs r3, #1
  12717. 800544a: 623b str r3, [r7, #32]
  12718. 800544c: 6a3b ldr r3, [r7, #32]
  12719. 800544e: 2b00 cmp r3, #0
  12720. 8005450: d042 beq.n 80054d8 <dir_register+0x184>
  12721. res = dir_sdi(dp, dp->dptr - nent * SZDIRE);
  12722. 8005452: 687b ldr r3, [r7, #4]
  12723. 8005454: 695a ldr r2, [r3, #20]
  12724. 8005456: 6a3b ldr r3, [r7, #32]
  12725. 8005458: 015b lsls r3, r3, #5
  12726. 800545a: 1ad3 subs r3, r2, r3
  12727. 800545c: 4619 mov r1, r3
  12728. 800545e: 6878 ldr r0, [r7, #4]
  12729. 8005460: f7ff fb4b bl 8004afa <dir_sdi>
  12730. 8005464: 4603 mov r3, r0
  12731. 8005466: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12732. if (res == FR_OK) {
  12733. 800546a: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12734. 800546e: 2b00 cmp r3, #0
  12735. 8005470: d132 bne.n 80054d8 <dir_register+0x184>
  12736. sum = sum_sfn(dp->fn); /* Checksum value of the SFN tied to the LFN */
  12737. 8005472: 687b ldr r3, [r7, #4]
  12738. 8005474: 3324 adds r3, #36 ; 0x24
  12739. 8005476: 4618 mov r0, r3
  12740. 8005478: f7ff fe8b bl 8005192 <sum_sfn>
  12741. 800547c: 4603 mov r3, r0
  12742. 800547e: 76fb strb r3, [r7, #27]
  12743. do { /* Store LFN entries in bottom first */
  12744. res = move_window(fs, dp->sect);
  12745. 8005480: 687b ldr r3, [r7, #4]
  12746. 8005482: 69db ldr r3, [r3, #28]
  12747. 8005484: 4619 mov r1, r3
  12748. 8005486: 69f8 ldr r0, [r7, #28]
  12749. 8005488: f7fe ff60 bl 800434c <move_window>
  12750. 800548c: 4603 mov r3, r0
  12751. 800548e: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12752. if (res != FR_OK) break;
  12753. 8005492: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12754. 8005496: 2b00 cmp r3, #0
  12755. 8005498: d11d bne.n 80054d6 <dir_register+0x182>
  12756. put_lfn(fs->lfnbuf, dp->dir, (BYTE)nent, sum);
  12757. 800549a: 69fb ldr r3, [r7, #28]
  12758. 800549c: 6918 ldr r0, [r3, #16]
  12759. 800549e: 687b ldr r3, [r7, #4]
  12760. 80054a0: 6a19 ldr r1, [r3, #32]
  12761. 80054a2: 6a3b ldr r3, [r7, #32]
  12762. 80054a4: b2da uxtb r2, r3
  12763. 80054a6: 7efb ldrb r3, [r7, #27]
  12764. 80054a8: f7ff fd7c bl 8004fa4 <put_lfn>
  12765. fs->wflag = 1;
  12766. 80054ac: 69fb ldr r3, [r7, #28]
  12767. 80054ae: 2201 movs r2, #1
  12768. 80054b0: 70da strb r2, [r3, #3]
  12769. res = dir_next(dp, 0); /* Next entry */
  12770. 80054b2: 2100 movs r1, #0
  12771. 80054b4: 6878 ldr r0, [r7, #4]
  12772. 80054b6: f7ff fba9 bl 8004c0c <dir_next>
  12773. 80054ba: 4603 mov r3, r0
  12774. 80054bc: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12775. } while (res == FR_OK && --nent);
  12776. 80054c0: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12777. 80054c4: 2b00 cmp r3, #0
  12778. 80054c6: d107 bne.n 80054d8 <dir_register+0x184>
  12779. 80054c8: 6a3b ldr r3, [r7, #32]
  12780. 80054ca: 3b01 subs r3, #1
  12781. 80054cc: 623b str r3, [r7, #32]
  12782. 80054ce: 6a3b ldr r3, [r7, #32]
  12783. 80054d0: 2b00 cmp r3, #0
  12784. 80054d2: d1d5 bne.n 8005480 <dir_register+0x12c>
  12785. 80054d4: e000 b.n 80054d8 <dir_register+0x184>
  12786. if (res != FR_OK) break;
  12787. 80054d6: bf00 nop
  12788. res = dir_alloc(dp, 1); /* Allocate an entry for SFN */
  12789. #endif
  12790. /* Set SFN entry */
  12791. if (res == FR_OK) {
  12792. 80054d8: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12793. 80054dc: 2b00 cmp r3, #0
  12794. 80054de: d128 bne.n 8005532 <dir_register+0x1de>
  12795. res = move_window(fs, dp->sect);
  12796. 80054e0: 687b ldr r3, [r7, #4]
  12797. 80054e2: 69db ldr r3, [r3, #28]
  12798. 80054e4: 4619 mov r1, r3
  12799. 80054e6: 69f8 ldr r0, [r7, #28]
  12800. 80054e8: f7fe ff30 bl 800434c <move_window>
  12801. 80054ec: 4603 mov r3, r0
  12802. 80054ee: f887 302f strb.w r3, [r7, #47] ; 0x2f
  12803. if (res == FR_OK) {
  12804. 80054f2: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12805. 80054f6: 2b00 cmp r3, #0
  12806. 80054f8: d11b bne.n 8005532 <dir_register+0x1de>
  12807. mem_set(dp->dir, 0, SZDIRE); /* Clean the entry */
  12808. 80054fa: 687b ldr r3, [r7, #4]
  12809. 80054fc: 6a1b ldr r3, [r3, #32]
  12810. 80054fe: 2220 movs r2, #32
  12811. 8005500: 2100 movs r1, #0
  12812. 8005502: 4618 mov r0, r3
  12813. 8005504: f7fe fd20 bl 8003f48 <mem_set>
  12814. mem_cpy(dp->dir + DIR_Name, dp->fn, 11); /* Put SFN */
  12815. 8005508: 687b ldr r3, [r7, #4]
  12816. 800550a: 6a18 ldr r0, [r3, #32]
  12817. 800550c: 687b ldr r3, [r7, #4]
  12818. 800550e: 3324 adds r3, #36 ; 0x24
  12819. 8005510: 220b movs r2, #11
  12820. 8005512: 4619 mov r1, r3
  12821. 8005514: f7fe fcf8 bl 8003f08 <mem_cpy>
  12822. #if _USE_LFN != 0
  12823. dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT); /* Put NT flag */
  12824. 8005518: 687b ldr r3, [r7, #4]
  12825. 800551a: f893 202f ldrb.w r2, [r3, #47] ; 0x2f
  12826. 800551e: 687b ldr r3, [r7, #4]
  12827. 8005520: 6a1b ldr r3, [r3, #32]
  12828. 8005522: 330c adds r3, #12
  12829. 8005524: f002 0218 and.w r2, r2, #24
  12830. 8005528: b2d2 uxtb r2, r2
  12831. 800552a: 701a strb r2, [r3, #0]
  12832. #endif
  12833. fs->wflag = 1;
  12834. 800552c: 69fb ldr r3, [r7, #28]
  12835. 800552e: 2201 movs r2, #1
  12836. 8005530: 70da strb r2, [r3, #3]
  12837. }
  12838. }
  12839. return res;
  12840. 8005532: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  12841. }
  12842. 8005536: 4618 mov r0, r3
  12843. 8005538: 3730 adds r7, #48 ; 0x30
  12844. 800553a: 46bd mov sp, r7
  12845. 800553c: bd80 pop {r7, pc}
  12846. 800553e: bf00 nop
  12847. 8005540: 4ec4ec4f .word 0x4ec4ec4f
  12848. 08005544 <create_name>:
  12849. static
  12850. FRESULT create_name ( /* FR_OK: successful, FR_INVALID_NAME: could not create */
  12851. DIR* dp, /* Pointer to the directory object */
  12852. const TCHAR** path /* Pointer to pointer to the segment in the path string */
  12853. )
  12854. {
  12855. 8005544: b580 push {r7, lr}
  12856. 8005546: b08a sub sp, #40 ; 0x28
  12857. 8005548: af00 add r7, sp, #0
  12858. 800554a: 6078 str r0, [r7, #4]
  12859. 800554c: 6039 str r1, [r7, #0]
  12860. WCHAR w, *lfn;
  12861. UINT i, ni, si, di;
  12862. const TCHAR *p;
  12863. /* Create LFN in Unicode */
  12864. p = *path; lfn = dp->obj.fs->lfnbuf; si = di = 0;
  12865. 800554e: 683b ldr r3, [r7, #0]
  12866. 8005550: 681b ldr r3, [r3, #0]
  12867. 8005552: 613b str r3, [r7, #16]
  12868. 8005554: 687b ldr r3, [r7, #4]
  12869. 8005556: 681b ldr r3, [r3, #0]
  12870. 8005558: 691b ldr r3, [r3, #16]
  12871. 800555a: 60fb str r3, [r7, #12]
  12872. 800555c: 2300 movs r3, #0
  12873. 800555e: 617b str r3, [r7, #20]
  12874. 8005560: 697b ldr r3, [r7, #20]
  12875. 8005562: 61bb str r3, [r7, #24]
  12876. for (;;) {
  12877. w = p[si++]; /* Get a character */
  12878. 8005564: 69bb ldr r3, [r7, #24]
  12879. 8005566: 1c5a adds r2, r3, #1
  12880. 8005568: 61ba str r2, [r7, #24]
  12881. 800556a: 693a ldr r2, [r7, #16]
  12882. 800556c: 4413 add r3, r2
  12883. 800556e: 781b ldrb r3, [r3, #0]
  12884. 8005570: 84bb strh r3, [r7, #36] ; 0x24
  12885. if (w < ' ') break; /* Break if end of the path name */
  12886. 8005572: 8cbb ldrh r3, [r7, #36] ; 0x24
  12887. 8005574: 2b1f cmp r3, #31
  12888. 8005576: d940 bls.n 80055fa <create_name+0xb6>
  12889. if (w == '/' || w == '\\') { /* Break if a separator is found */
  12890. 8005578: 8cbb ldrh r3, [r7, #36] ; 0x24
  12891. 800557a: 2b2f cmp r3, #47 ; 0x2f
  12892. 800557c: d006 beq.n 800558c <create_name+0x48>
  12893. 800557e: 8cbb ldrh r3, [r7, #36] ; 0x24
  12894. 8005580: 2b5c cmp r3, #92 ; 0x5c
  12895. 8005582: d110 bne.n 80055a6 <create_name+0x62>
  12896. while (p[si] == '/' || p[si] == '\\') si++; /* Skip duplicated separator if exist */
  12897. 8005584: e002 b.n 800558c <create_name+0x48>
  12898. 8005586: 69bb ldr r3, [r7, #24]
  12899. 8005588: 3301 adds r3, #1
  12900. 800558a: 61bb str r3, [r7, #24]
  12901. 800558c: 693a ldr r2, [r7, #16]
  12902. 800558e: 69bb ldr r3, [r7, #24]
  12903. 8005590: 4413 add r3, r2
  12904. 8005592: 781b ldrb r3, [r3, #0]
  12905. 8005594: 2b2f cmp r3, #47 ; 0x2f
  12906. 8005596: d0f6 beq.n 8005586 <create_name+0x42>
  12907. 8005598: 693a ldr r2, [r7, #16]
  12908. 800559a: 69bb ldr r3, [r7, #24]
  12909. 800559c: 4413 add r3, r2
  12910. 800559e: 781b ldrb r3, [r3, #0]
  12911. 80055a0: 2b5c cmp r3, #92 ; 0x5c
  12912. 80055a2: d0f0 beq.n 8005586 <create_name+0x42>
  12913. break;
  12914. 80055a4: e02a b.n 80055fc <create_name+0xb8>
  12915. }
  12916. if (di >= _MAX_LFN) return FR_INVALID_NAME; /* Reject too long name */
  12917. 80055a6: 697b ldr r3, [r7, #20]
  12918. 80055a8: 2bfe cmp r3, #254 ; 0xfe
  12919. 80055aa: d901 bls.n 80055b0 <create_name+0x6c>
  12920. 80055ac: 2306 movs r3, #6
  12921. 80055ae: e177 b.n 80058a0 <create_name+0x35c>
  12922. #if !_LFN_UNICODE
  12923. w &= 0xFF;
  12924. 80055b0: 8cbb ldrh r3, [r7, #36] ; 0x24
  12925. 80055b2: b2db uxtb r3, r3
  12926. 80055b4: 84bb strh r3, [r7, #36] ; 0x24
  12927. if (IsDBCS1(w)) { /* Check if it is a DBC 1st byte (always false on SBCS cfg) */
  12928. b = (BYTE)p[si++]; /* Get 2nd byte */
  12929. w = (w << 8) + b; /* Create a DBC */
  12930. if (!IsDBCS2(b)) return FR_INVALID_NAME; /* Reject invalid sequence */
  12931. }
  12932. w = ff_convert(w, 1); /* Convert ANSI/OEM to Unicode */
  12933. 80055b6: 8cbb ldrh r3, [r7, #36] ; 0x24
  12934. 80055b8: 2101 movs r1, #1
  12935. 80055ba: 4618 mov r0, r3
  12936. 80055bc: f001 fcdc bl 8006f78 <ff_convert>
  12937. 80055c0: 4603 mov r3, r0
  12938. 80055c2: 84bb strh r3, [r7, #36] ; 0x24
  12939. if (!w) return FR_INVALID_NAME; /* Reject invalid code */
  12940. 80055c4: 8cbb ldrh r3, [r7, #36] ; 0x24
  12941. 80055c6: 2b00 cmp r3, #0
  12942. 80055c8: d101 bne.n 80055ce <create_name+0x8a>
  12943. 80055ca: 2306 movs r3, #6
  12944. 80055cc: e168 b.n 80058a0 <create_name+0x35c>
  12945. #endif
  12946. if (w < 0x80 && chk_chr("\"*:<>\?|\x7F", w)) return FR_INVALID_NAME; /* Reject illegal characters for LFN */
  12947. 80055ce: 8cbb ldrh r3, [r7, #36] ; 0x24
  12948. 80055d0: 2b7f cmp r3, #127 ; 0x7f
  12949. 80055d2: d809 bhi.n 80055e8 <create_name+0xa4>
  12950. 80055d4: 8cbb ldrh r3, [r7, #36] ; 0x24
  12951. 80055d6: 4619 mov r1, r3
  12952. 80055d8: 48b3 ldr r0, [pc, #716] ; (80058a8 <create_name+0x364>)
  12953. 80055da: f7fe fcf4 bl 8003fc6 <chk_chr>
  12954. 80055de: 4603 mov r3, r0
  12955. 80055e0: 2b00 cmp r3, #0
  12956. 80055e2: d001 beq.n 80055e8 <create_name+0xa4>
  12957. 80055e4: 2306 movs r3, #6
  12958. 80055e6: e15b b.n 80058a0 <create_name+0x35c>
  12959. lfn[di++] = w; /* Store the Unicode character */
  12960. 80055e8: 697b ldr r3, [r7, #20]
  12961. 80055ea: 1c5a adds r2, r3, #1
  12962. 80055ec: 617a str r2, [r7, #20]
  12963. 80055ee: 005b lsls r3, r3, #1
  12964. 80055f0: 68fa ldr r2, [r7, #12]
  12965. 80055f2: 4413 add r3, r2
  12966. 80055f4: 8cba ldrh r2, [r7, #36] ; 0x24
  12967. 80055f6: 801a strh r2, [r3, #0]
  12968. w = p[si++]; /* Get a character */
  12969. 80055f8: e7b4 b.n 8005564 <create_name+0x20>
  12970. if (w < ' ') break; /* Break if end of the path name */
  12971. 80055fa: bf00 nop
  12972. }
  12973. *path = &p[si]; /* Return pointer to the next segment */
  12974. 80055fc: 693a ldr r2, [r7, #16]
  12975. 80055fe: 69bb ldr r3, [r7, #24]
  12976. 8005600: 441a add r2, r3
  12977. 8005602: 683b ldr r3, [r7, #0]
  12978. 8005604: 601a str r2, [r3, #0]
  12979. cf = (w < ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */
  12980. 8005606: 8cbb ldrh r3, [r7, #36] ; 0x24
  12981. 8005608: 2b1f cmp r3, #31
  12982. 800560a: d801 bhi.n 8005610 <create_name+0xcc>
  12983. 800560c: 2304 movs r3, #4
  12984. 800560e: e000 b.n 8005612 <create_name+0xce>
  12985. 8005610: 2300 movs r3, #0
  12986. 8005612: f887 3027 strb.w r3, [r7, #39] ; 0x27
  12987. dp->fn[i] = (i < di) ? '.' : ' ';
  12988. dp->fn[i] = cf | NS_DOT; /* This is a dot entry */
  12989. return FR_OK;
  12990. }
  12991. #endif
  12992. while (di) { /* Snip off trailing spaces and dots if exist */
  12993. 8005616: e011 b.n 800563c <create_name+0xf8>
  12994. w = lfn[di - 1];
  12995. 8005618: 697b ldr r3, [r7, #20]
  12996. 800561a: f103 4300 add.w r3, r3, #2147483648 ; 0x80000000
  12997. 800561e: 3b01 subs r3, #1
  12998. 8005620: 005b lsls r3, r3, #1
  12999. 8005622: 68fa ldr r2, [r7, #12]
  13000. 8005624: 4413 add r3, r2
  13001. 8005626: 881b ldrh r3, [r3, #0]
  13002. 8005628: 84bb strh r3, [r7, #36] ; 0x24
  13003. if (w != ' ' && w != '.') break;
  13004. 800562a: 8cbb ldrh r3, [r7, #36] ; 0x24
  13005. 800562c: 2b20 cmp r3, #32
  13006. 800562e: d002 beq.n 8005636 <create_name+0xf2>
  13007. 8005630: 8cbb ldrh r3, [r7, #36] ; 0x24
  13008. 8005632: 2b2e cmp r3, #46 ; 0x2e
  13009. 8005634: d106 bne.n 8005644 <create_name+0x100>
  13010. di--;
  13011. 8005636: 697b ldr r3, [r7, #20]
  13012. 8005638: 3b01 subs r3, #1
  13013. 800563a: 617b str r3, [r7, #20]
  13014. while (di) { /* Snip off trailing spaces and dots if exist */
  13015. 800563c: 697b ldr r3, [r7, #20]
  13016. 800563e: 2b00 cmp r3, #0
  13017. 8005640: d1ea bne.n 8005618 <create_name+0xd4>
  13018. 8005642: e000 b.n 8005646 <create_name+0x102>
  13019. if (w != ' ' && w != '.') break;
  13020. 8005644: bf00 nop
  13021. }
  13022. lfn[di] = 0; /* LFN is created */
  13023. 8005646: 697b ldr r3, [r7, #20]
  13024. 8005648: 005b lsls r3, r3, #1
  13025. 800564a: 68fa ldr r2, [r7, #12]
  13026. 800564c: 4413 add r3, r2
  13027. 800564e: 2200 movs r2, #0
  13028. 8005650: 801a strh r2, [r3, #0]
  13029. if (di == 0) return FR_INVALID_NAME; /* Reject nul name */
  13030. 8005652: 697b ldr r3, [r7, #20]
  13031. 8005654: 2b00 cmp r3, #0
  13032. 8005656: d101 bne.n 800565c <create_name+0x118>
  13033. 8005658: 2306 movs r3, #6
  13034. 800565a: e121 b.n 80058a0 <create_name+0x35c>
  13035. /* Create SFN in directory form */
  13036. mem_set(dp->fn, ' ', 11);
  13037. 800565c: 687b ldr r3, [r7, #4]
  13038. 800565e: 3324 adds r3, #36 ; 0x24
  13039. 8005660: 220b movs r2, #11
  13040. 8005662: 2120 movs r1, #32
  13041. 8005664: 4618 mov r0, r3
  13042. 8005666: f7fe fc6f bl 8003f48 <mem_set>
  13043. for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ; /* Strip leading spaces and dots */
  13044. 800566a: 2300 movs r3, #0
  13045. 800566c: 61bb str r3, [r7, #24]
  13046. 800566e: e002 b.n 8005676 <create_name+0x132>
  13047. 8005670: 69bb ldr r3, [r7, #24]
  13048. 8005672: 3301 adds r3, #1
  13049. 8005674: 61bb str r3, [r7, #24]
  13050. 8005676: 69bb ldr r3, [r7, #24]
  13051. 8005678: 005b lsls r3, r3, #1
  13052. 800567a: 68fa ldr r2, [r7, #12]
  13053. 800567c: 4413 add r3, r2
  13054. 800567e: 881b ldrh r3, [r3, #0]
  13055. 8005680: 2b20 cmp r3, #32
  13056. 8005682: d0f5 beq.n 8005670 <create_name+0x12c>
  13057. 8005684: 69bb ldr r3, [r7, #24]
  13058. 8005686: 005b lsls r3, r3, #1
  13059. 8005688: 68fa ldr r2, [r7, #12]
  13060. 800568a: 4413 add r3, r2
  13061. 800568c: 881b ldrh r3, [r3, #0]
  13062. 800568e: 2b2e cmp r3, #46 ; 0x2e
  13063. 8005690: d0ee beq.n 8005670 <create_name+0x12c>
  13064. if (si) cf |= NS_LOSS | NS_LFN;
  13065. 8005692: 69bb ldr r3, [r7, #24]
  13066. 8005694: 2b00 cmp r3, #0
  13067. 8005696: d009 beq.n 80056ac <create_name+0x168>
  13068. 8005698: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13069. 800569c: f043 0303 orr.w r3, r3, #3
  13070. 80056a0: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13071. while (di && lfn[di - 1] != '.') di--; /* Find extension (di<=si: no extension) */
  13072. 80056a4: e002 b.n 80056ac <create_name+0x168>
  13073. 80056a6: 697b ldr r3, [r7, #20]
  13074. 80056a8: 3b01 subs r3, #1
  13075. 80056aa: 617b str r3, [r7, #20]
  13076. 80056ac: 697b ldr r3, [r7, #20]
  13077. 80056ae: 2b00 cmp r3, #0
  13078. 80056b0: d009 beq.n 80056c6 <create_name+0x182>
  13079. 80056b2: 697b ldr r3, [r7, #20]
  13080. 80056b4: f103 4300 add.w r3, r3, #2147483648 ; 0x80000000
  13081. 80056b8: 3b01 subs r3, #1
  13082. 80056ba: 005b lsls r3, r3, #1
  13083. 80056bc: 68fa ldr r2, [r7, #12]
  13084. 80056be: 4413 add r3, r2
  13085. 80056c0: 881b ldrh r3, [r3, #0]
  13086. 80056c2: 2b2e cmp r3, #46 ; 0x2e
  13087. 80056c4: d1ef bne.n 80056a6 <create_name+0x162>
  13088. i = b = 0; ni = 8;
  13089. 80056c6: 2300 movs r3, #0
  13090. 80056c8: f887 3026 strb.w r3, [r7, #38] ; 0x26
  13091. 80056cc: 2300 movs r3, #0
  13092. 80056ce: 623b str r3, [r7, #32]
  13093. 80056d0: 2308 movs r3, #8
  13094. 80056d2: 61fb str r3, [r7, #28]
  13095. for (;;) {
  13096. w = lfn[si++]; /* Get an LFN character */
  13097. 80056d4: 69bb ldr r3, [r7, #24]
  13098. 80056d6: 1c5a adds r2, r3, #1
  13099. 80056d8: 61ba str r2, [r7, #24]
  13100. 80056da: 005b lsls r3, r3, #1
  13101. 80056dc: 68fa ldr r2, [r7, #12]
  13102. 80056de: 4413 add r3, r2
  13103. 80056e0: 881b ldrh r3, [r3, #0]
  13104. 80056e2: 84bb strh r3, [r7, #36] ; 0x24
  13105. if (!w) break; /* Break on end of the LFN */
  13106. 80056e4: 8cbb ldrh r3, [r7, #36] ; 0x24
  13107. 80056e6: 2b00 cmp r3, #0
  13108. 80056e8: f000 8090 beq.w 800580c <create_name+0x2c8>
  13109. if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */
  13110. 80056ec: 8cbb ldrh r3, [r7, #36] ; 0x24
  13111. 80056ee: 2b20 cmp r3, #32
  13112. 80056f0: d006 beq.n 8005700 <create_name+0x1bc>
  13113. 80056f2: 8cbb ldrh r3, [r7, #36] ; 0x24
  13114. 80056f4: 2b2e cmp r3, #46 ; 0x2e
  13115. 80056f6: d10a bne.n 800570e <create_name+0x1ca>
  13116. 80056f8: 69ba ldr r2, [r7, #24]
  13117. 80056fa: 697b ldr r3, [r7, #20]
  13118. 80056fc: 429a cmp r2, r3
  13119. 80056fe: d006 beq.n 800570e <create_name+0x1ca>
  13120. cf |= NS_LOSS | NS_LFN; continue;
  13121. 8005700: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13122. 8005704: f043 0303 orr.w r3, r3, #3
  13123. 8005708: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13124. 800570c: e07d b.n 800580a <create_name+0x2c6>
  13125. }
  13126. if (i >= ni || si == di) { /* Extension or end of SFN */
  13127. 800570e: 6a3a ldr r2, [r7, #32]
  13128. 8005710: 69fb ldr r3, [r7, #28]
  13129. 8005712: 429a cmp r2, r3
  13130. 8005714: d203 bcs.n 800571e <create_name+0x1da>
  13131. 8005716: 69ba ldr r2, [r7, #24]
  13132. 8005718: 697b ldr r3, [r7, #20]
  13133. 800571a: 429a cmp r2, r3
  13134. 800571c: d123 bne.n 8005766 <create_name+0x222>
  13135. if (ni == 11) { /* Long extension */
  13136. 800571e: 69fb ldr r3, [r7, #28]
  13137. 8005720: 2b0b cmp r3, #11
  13138. 8005722: d106 bne.n 8005732 <create_name+0x1ee>
  13139. cf |= NS_LOSS | NS_LFN; break;
  13140. 8005724: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13141. 8005728: f043 0303 orr.w r3, r3, #3
  13142. 800572c: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13143. 8005730: e06f b.n 8005812 <create_name+0x2ce>
  13144. }
  13145. if (si != di) cf |= NS_LOSS | NS_LFN; /* Out of 8.3 format */
  13146. 8005732: 69ba ldr r2, [r7, #24]
  13147. 8005734: 697b ldr r3, [r7, #20]
  13148. 8005736: 429a cmp r2, r3
  13149. 8005738: d005 beq.n 8005746 <create_name+0x202>
  13150. 800573a: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13151. 800573e: f043 0303 orr.w r3, r3, #3
  13152. 8005742: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13153. if (si > di) break; /* No extension */
  13154. 8005746: 69ba ldr r2, [r7, #24]
  13155. 8005748: 697b ldr r3, [r7, #20]
  13156. 800574a: 429a cmp r2, r3
  13157. 800574c: d860 bhi.n 8005810 <create_name+0x2cc>
  13158. si = di; i = 8; ni = 11; /* Enter extension section */
  13159. 800574e: 697b ldr r3, [r7, #20]
  13160. 8005750: 61bb str r3, [r7, #24]
  13161. 8005752: 2308 movs r3, #8
  13162. 8005754: 623b str r3, [r7, #32]
  13163. 8005756: 230b movs r3, #11
  13164. 8005758: 61fb str r3, [r7, #28]
  13165. b <<= 2; continue;
  13166. 800575a: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13167. 800575e: 009b lsls r3, r3, #2
  13168. 8005760: f887 3026 strb.w r3, [r7, #38] ; 0x26
  13169. 8005764: e051 b.n 800580a <create_name+0x2c6>
  13170. }
  13171. if (w >= 0x80) { /* Non ASCII character */
  13172. 8005766: 8cbb ldrh r3, [r7, #36] ; 0x24
  13173. 8005768: 2b7f cmp r3, #127 ; 0x7f
  13174. 800576a: d914 bls.n 8005796 <create_name+0x252>
  13175. #ifdef _EXCVT
  13176. w = ff_convert(w, 0); /* Unicode -> OEM code */
  13177. 800576c: 8cbb ldrh r3, [r7, #36] ; 0x24
  13178. 800576e: 2100 movs r1, #0
  13179. 8005770: 4618 mov r0, r3
  13180. 8005772: f001 fc01 bl 8006f78 <ff_convert>
  13181. 8005776: 4603 mov r3, r0
  13182. 8005778: 84bb strh r3, [r7, #36] ; 0x24
  13183. if (w) w = ExCvt[w - 0x80]; /* Convert extended character to upper (SBCS) */
  13184. 800577a: 8cbb ldrh r3, [r7, #36] ; 0x24
  13185. 800577c: 2b00 cmp r3, #0
  13186. 800577e: d004 beq.n 800578a <create_name+0x246>
  13187. 8005780: 8cbb ldrh r3, [r7, #36] ; 0x24
  13188. 8005782: 3b80 subs r3, #128 ; 0x80
  13189. 8005784: 4a49 ldr r2, [pc, #292] ; (80058ac <create_name+0x368>)
  13190. 8005786: 5cd3 ldrb r3, [r2, r3]
  13191. 8005788: 84bb strh r3, [r7, #36] ; 0x24
  13192. #else
  13193. w = ff_convert(ff_wtoupper(w), 0); /* Upper converted Unicode -> OEM code */
  13194. #endif
  13195. cf |= NS_LFN; /* Force create LFN entry */
  13196. 800578a: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13197. 800578e: f043 0302 orr.w r3, r3, #2
  13198. 8005792: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13199. if (i >= ni - 1) {
  13200. cf |= NS_LOSS | NS_LFN; i = ni; continue;
  13201. }
  13202. dp->fn[i++] = (BYTE)(w >> 8);
  13203. } else { /* SBC */
  13204. if (!w || chk_chr("+,;=[]", w)) { /* Replace illegal characters for SFN */
  13205. 8005796: 8cbb ldrh r3, [r7, #36] ; 0x24
  13206. 8005798: 2b00 cmp r3, #0
  13207. 800579a: d007 beq.n 80057ac <create_name+0x268>
  13208. 800579c: 8cbb ldrh r3, [r7, #36] ; 0x24
  13209. 800579e: 4619 mov r1, r3
  13210. 80057a0: 4843 ldr r0, [pc, #268] ; (80058b0 <create_name+0x36c>)
  13211. 80057a2: f7fe fc10 bl 8003fc6 <chk_chr>
  13212. 80057a6: 4603 mov r3, r0
  13213. 80057a8: 2b00 cmp r3, #0
  13214. 80057aa: d008 beq.n 80057be <create_name+0x27a>
  13215. w = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */
  13216. 80057ac: 235f movs r3, #95 ; 0x5f
  13217. 80057ae: 84bb strh r3, [r7, #36] ; 0x24
  13218. 80057b0: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13219. 80057b4: f043 0303 orr.w r3, r3, #3
  13220. 80057b8: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13221. 80057bc: e01b b.n 80057f6 <create_name+0x2b2>
  13222. } else {
  13223. if (IsUpper(w)) { /* ASCII large capital */
  13224. 80057be: 8cbb ldrh r3, [r7, #36] ; 0x24
  13225. 80057c0: 2b40 cmp r3, #64 ; 0x40
  13226. 80057c2: d909 bls.n 80057d8 <create_name+0x294>
  13227. 80057c4: 8cbb ldrh r3, [r7, #36] ; 0x24
  13228. 80057c6: 2b5a cmp r3, #90 ; 0x5a
  13229. 80057c8: d806 bhi.n 80057d8 <create_name+0x294>
  13230. b |= 2;
  13231. 80057ca: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13232. 80057ce: f043 0302 orr.w r3, r3, #2
  13233. 80057d2: f887 3026 strb.w r3, [r7, #38] ; 0x26
  13234. 80057d6: e00e b.n 80057f6 <create_name+0x2b2>
  13235. } else {
  13236. if (IsLower(w)) { /* ASCII small capital */
  13237. 80057d8: 8cbb ldrh r3, [r7, #36] ; 0x24
  13238. 80057da: 2b60 cmp r3, #96 ; 0x60
  13239. 80057dc: d90b bls.n 80057f6 <create_name+0x2b2>
  13240. 80057de: 8cbb ldrh r3, [r7, #36] ; 0x24
  13241. 80057e0: 2b7a cmp r3, #122 ; 0x7a
  13242. 80057e2: d808 bhi.n 80057f6 <create_name+0x2b2>
  13243. b |= 1; w -= 0x20;
  13244. 80057e4: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13245. 80057e8: f043 0301 orr.w r3, r3, #1
  13246. 80057ec: f887 3026 strb.w r3, [r7, #38] ; 0x26
  13247. 80057f0: 8cbb ldrh r3, [r7, #36] ; 0x24
  13248. 80057f2: 3b20 subs r3, #32
  13249. 80057f4: 84bb strh r3, [r7, #36] ; 0x24
  13250. }
  13251. }
  13252. }
  13253. }
  13254. dp->fn[i++] = (BYTE)w;
  13255. 80057f6: 6a3b ldr r3, [r7, #32]
  13256. 80057f8: 1c5a adds r2, r3, #1
  13257. 80057fa: 623a str r2, [r7, #32]
  13258. 80057fc: 8cba ldrh r2, [r7, #36] ; 0x24
  13259. 80057fe: b2d1 uxtb r1, r2
  13260. 8005800: 687a ldr r2, [r7, #4]
  13261. 8005802: 4413 add r3, r2
  13262. 8005804: 460a mov r2, r1
  13263. 8005806: f883 2024 strb.w r2, [r3, #36] ; 0x24
  13264. w = lfn[si++]; /* Get an LFN character */
  13265. 800580a: e763 b.n 80056d4 <create_name+0x190>
  13266. if (!w) break; /* Break on end of the LFN */
  13267. 800580c: bf00 nop
  13268. 800580e: e000 b.n 8005812 <create_name+0x2ce>
  13269. if (si > di) break; /* No extension */
  13270. 8005810: bf00 nop
  13271. }
  13272. if (dp->fn[0] == DDEM) dp->fn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */
  13273. 8005812: 687b ldr r3, [r7, #4]
  13274. 8005814: f893 3024 ldrb.w r3, [r3, #36] ; 0x24
  13275. 8005818: 2be5 cmp r3, #229 ; 0xe5
  13276. 800581a: d103 bne.n 8005824 <create_name+0x2e0>
  13277. 800581c: 687b ldr r3, [r7, #4]
  13278. 800581e: 2205 movs r2, #5
  13279. 8005820: f883 2024 strb.w r2, [r3, #36] ; 0x24
  13280. if (ni == 8) b <<= 2;
  13281. 8005824: 69fb ldr r3, [r7, #28]
  13282. 8005826: 2b08 cmp r3, #8
  13283. 8005828: d104 bne.n 8005834 <create_name+0x2f0>
  13284. 800582a: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13285. 800582e: 009b lsls r3, r3, #2
  13286. 8005830: f887 3026 strb.w r3, [r7, #38] ; 0x26
  13287. if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) cf |= NS_LFN; /* Create LFN entry when there are composite capitals */
  13288. 8005834: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13289. 8005838: f003 030c and.w r3, r3, #12
  13290. 800583c: 2b0c cmp r3, #12
  13291. 800583e: d005 beq.n 800584c <create_name+0x308>
  13292. 8005840: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13293. 8005844: f003 0303 and.w r3, r3, #3
  13294. 8005848: 2b03 cmp r3, #3
  13295. 800584a: d105 bne.n 8005858 <create_name+0x314>
  13296. 800584c: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13297. 8005850: f043 0302 orr.w r3, r3, #2
  13298. 8005854: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13299. if (!(cf & NS_LFN)) { /* When LFN is in 8.3 format without extended character, NT flags are created */
  13300. 8005858: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13301. 800585c: f003 0302 and.w r3, r3, #2
  13302. 8005860: 2b00 cmp r3, #0
  13303. 8005862: d117 bne.n 8005894 <create_name+0x350>
  13304. if ((b & 0x03) == 0x01) cf |= NS_EXT; /* NT flag (Extension has only small capital) */
  13305. 8005864: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13306. 8005868: f003 0303 and.w r3, r3, #3
  13307. 800586c: 2b01 cmp r3, #1
  13308. 800586e: d105 bne.n 800587c <create_name+0x338>
  13309. 8005870: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13310. 8005874: f043 0310 orr.w r3, r3, #16
  13311. 8005878: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13312. if ((b & 0x0C) == 0x04) cf |= NS_BODY; /* NT flag (Filename has only small capital) */
  13313. 800587c: f897 3026 ldrb.w r3, [r7, #38] ; 0x26
  13314. 8005880: f003 030c and.w r3, r3, #12
  13315. 8005884: 2b04 cmp r3, #4
  13316. 8005886: d105 bne.n 8005894 <create_name+0x350>
  13317. 8005888: f897 3027 ldrb.w r3, [r7, #39] ; 0x27
  13318. 800588c: f043 0308 orr.w r3, r3, #8
  13319. 8005890: f887 3027 strb.w r3, [r7, #39] ; 0x27
  13320. }
  13321. dp->fn[NSFLAG] = cf; /* SFN is created */
  13322. 8005894: 687b ldr r3, [r7, #4]
  13323. 8005896: f897 2027 ldrb.w r2, [r7, #39] ; 0x27
  13324. 800589a: f883 202f strb.w r2, [r3, #47] ; 0x2f
  13325. return FR_OK;
  13326. 800589e: 2300 movs r3, #0
  13327. if (sfn[0] == DDEM) sfn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */
  13328. sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */
  13329. return FR_OK;
  13330. #endif /* _USE_LFN != 0 */
  13331. }
  13332. 80058a0: 4618 mov r0, r3
  13333. 80058a2: 3728 adds r7, #40 ; 0x28
  13334. 80058a4: 46bd mov sp, r7
  13335. 80058a6: bd80 pop {r7, pc}
  13336. 80058a8: 08007adc .word 0x08007adc
  13337. 80058ac: 08007b48 .word 0x08007b48
  13338. 80058b0: 08007ae8 .word 0x08007ae8
  13339. 080058b4 <follow_path>:
  13340. static
  13341. FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */
  13342. DIR* dp, /* Directory object to return last directory and found object */
  13343. const TCHAR* path /* Full-path string to find a file or directory */
  13344. )
  13345. {
  13346. 80058b4: b580 push {r7, lr}
  13347. 80058b6: b086 sub sp, #24
  13348. 80058b8: af00 add r7, sp, #0
  13349. 80058ba: 6078 str r0, [r7, #4]
  13350. 80058bc: 6039 str r1, [r7, #0]
  13351. FRESULT res;
  13352. BYTE ns;
  13353. _FDID *obj = &dp->obj;
  13354. 80058be: 687b ldr r3, [r7, #4]
  13355. 80058c0: 613b str r3, [r7, #16]
  13356. FATFS *fs = obj->fs;
  13357. 80058c2: 693b ldr r3, [r7, #16]
  13358. 80058c4: 681b ldr r3, [r3, #0]
  13359. 80058c6: 60fb str r3, [r7, #12]
  13360. if (*path != '/' && *path != '\\') { /* Without heading separator */
  13361. obj->sclust = fs->cdir; /* Start from current directory */
  13362. } else
  13363. #endif
  13364. { /* With heading separator */
  13365. while (*path == '/' || *path == '\\') path++; /* Strip heading separator */
  13366. 80058c8: e002 b.n 80058d0 <follow_path+0x1c>
  13367. 80058ca: 683b ldr r3, [r7, #0]
  13368. 80058cc: 3301 adds r3, #1
  13369. 80058ce: 603b str r3, [r7, #0]
  13370. 80058d0: 683b ldr r3, [r7, #0]
  13371. 80058d2: 781b ldrb r3, [r3, #0]
  13372. 80058d4: 2b2f cmp r3, #47 ; 0x2f
  13373. 80058d6: d0f8 beq.n 80058ca <follow_path+0x16>
  13374. 80058d8: 683b ldr r3, [r7, #0]
  13375. 80058da: 781b ldrb r3, [r3, #0]
  13376. 80058dc: 2b5c cmp r3, #92 ; 0x5c
  13377. 80058de: d0f4 beq.n 80058ca <follow_path+0x16>
  13378. obj->sclust = 0; /* Start from root directory */
  13379. 80058e0: 693b ldr r3, [r7, #16]
  13380. 80058e2: 2200 movs r2, #0
  13381. 80058e4: 609a str r2, [r3, #8]
  13382. obj->stat = fs->dirbuf[XDIR_GenFlags] & 2;
  13383. }
  13384. #endif
  13385. #endif
  13386. if ((UINT)*path < ' ') { /* Null path name is the origin directory itself */
  13387. 80058e6: 683b ldr r3, [r7, #0]
  13388. 80058e8: 781b ldrb r3, [r3, #0]
  13389. 80058ea: 2b1f cmp r3, #31
  13390. 80058ec: d80a bhi.n 8005904 <follow_path+0x50>
  13391. dp->fn[NSFLAG] = NS_NONAME;
  13392. 80058ee: 687b ldr r3, [r7, #4]
  13393. 80058f0: 2280 movs r2, #128 ; 0x80
  13394. 80058f2: f883 202f strb.w r2, [r3, #47] ; 0x2f
  13395. res = dir_sdi(dp, 0);
  13396. 80058f6: 2100 movs r1, #0
  13397. 80058f8: 6878 ldr r0, [r7, #4]
  13398. 80058fa: f7ff f8fe bl 8004afa <dir_sdi>
  13399. 80058fe: 4603 mov r3, r0
  13400. 8005900: 75fb strb r3, [r7, #23]
  13401. 8005902: e048 b.n 8005996 <follow_path+0xe2>
  13402. } else { /* Follow path */
  13403. for (;;) {
  13404. res = create_name(dp, &path); /* Get a segment name of the path */
  13405. 8005904: 463b mov r3, r7
  13406. 8005906: 4619 mov r1, r3
  13407. 8005908: 6878 ldr r0, [r7, #4]
  13408. 800590a: f7ff fe1b bl 8005544 <create_name>
  13409. 800590e: 4603 mov r3, r0
  13410. 8005910: 75fb strb r3, [r7, #23]
  13411. if (res != FR_OK) break;
  13412. 8005912: 7dfb ldrb r3, [r7, #23]
  13413. 8005914: 2b00 cmp r3, #0
  13414. 8005916: d139 bne.n 800598c <follow_path+0xd8>
  13415. res = dir_find(dp); /* Find an object with the segment name */
  13416. 8005918: 6878 ldr r0, [r7, #4]
  13417. 800591a: f7ff fc5a bl 80051d2 <dir_find>
  13418. 800591e: 4603 mov r3, r0
  13419. 8005920: 75fb strb r3, [r7, #23]
  13420. ns = dp->fn[NSFLAG];
  13421. 8005922: 687b ldr r3, [r7, #4]
  13422. 8005924: f893 302f ldrb.w r3, [r3, #47] ; 0x2f
  13423. 8005928: 72fb strb r3, [r7, #11]
  13424. if (res != FR_OK) { /* Failed to find the object */
  13425. 800592a: 7dfb ldrb r3, [r7, #23]
  13426. 800592c: 2b00 cmp r3, #0
  13427. 800592e: d00a beq.n 8005946 <follow_path+0x92>
  13428. if (res == FR_NO_FILE) { /* Object is not found */
  13429. 8005930: 7dfb ldrb r3, [r7, #23]
  13430. 8005932: 2b04 cmp r3, #4
  13431. 8005934: d12c bne.n 8005990 <follow_path+0xdc>
  13432. if (_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exist, stay there */
  13433. if (!(ns & NS_LAST)) continue; /* Continue to follow if not last segment */
  13434. dp->fn[NSFLAG] = NS_NONAME;
  13435. res = FR_OK;
  13436. } else { /* Could not find the object */
  13437. if (!(ns & NS_LAST)) res = FR_NO_PATH; /* Adjust error code if not last segment */
  13438. 8005936: 7afb ldrb r3, [r7, #11]
  13439. 8005938: f003 0304 and.w r3, r3, #4
  13440. 800593c: 2b00 cmp r3, #0
  13441. 800593e: d127 bne.n 8005990 <follow_path+0xdc>
  13442. 8005940: 2305 movs r3, #5
  13443. 8005942: 75fb strb r3, [r7, #23]
  13444. }
  13445. }
  13446. break;
  13447. 8005944: e024 b.n 8005990 <follow_path+0xdc>
  13448. }
  13449. if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
  13450. 8005946: 7afb ldrb r3, [r7, #11]
  13451. 8005948: f003 0304 and.w r3, r3, #4
  13452. 800594c: 2b00 cmp r3, #0
  13453. 800594e: d121 bne.n 8005994 <follow_path+0xe0>
  13454. /* Get into the sub-directory */
  13455. if (!(obj->attr & AM_DIR)) { /* It is not a sub-directory and cannot follow */
  13456. 8005950: 693b ldr r3, [r7, #16]
  13457. 8005952: 799b ldrb r3, [r3, #6]
  13458. 8005954: f003 0310 and.w r3, r3, #16
  13459. 8005958: 2b00 cmp r3, #0
  13460. 800595a: d102 bne.n 8005962 <follow_path+0xae>
  13461. res = FR_NO_PATH; break;
  13462. 800595c: 2305 movs r3, #5
  13463. 800595e: 75fb strb r3, [r7, #23]
  13464. 8005960: e019 b.n 8005996 <follow_path+0xe2>
  13465. obj->stat = fs->dirbuf[XDIR_GenFlags] & 2;
  13466. obj->objsize = ld_qword(fs->dirbuf + XDIR_FileSize);
  13467. } else
  13468. #endif
  13469. {
  13470. obj->sclust = ld_clust(fs, fs->win + dp->dptr % SS(fs)); /* Open next directory */
  13471. 8005962: 68fb ldr r3, [r7, #12]
  13472. 8005964: f103 0138 add.w r1, r3, #56 ; 0x38
  13473. 8005968: 687b ldr r3, [r7, #4]
  13474. 800596a: 695b ldr r3, [r3, #20]
  13475. 800596c: 68fa ldr r2, [r7, #12]
  13476. 800596e: 8992 ldrh r2, [r2, #12]
  13477. 8005970: fbb3 f0f2 udiv r0, r3, r2
  13478. 8005974: fb02 f200 mul.w r2, r2, r0
  13479. 8005978: 1a9b subs r3, r3, r2
  13480. 800597a: 440b add r3, r1
  13481. 800597c: 4619 mov r1, r3
  13482. 800597e: 68f8 ldr r0, [r7, #12]
  13483. 8005980: f7ff fa61 bl 8004e46 <ld_clust>
  13484. 8005984: 4602 mov r2, r0
  13485. 8005986: 693b ldr r3, [r7, #16]
  13486. 8005988: 609a str r2, [r3, #8]
  13487. res = create_name(dp, &path); /* Get a segment name of the path */
  13488. 800598a: e7bb b.n 8005904 <follow_path+0x50>
  13489. if (res != FR_OK) break;
  13490. 800598c: bf00 nop
  13491. 800598e: e002 b.n 8005996 <follow_path+0xe2>
  13492. break;
  13493. 8005990: bf00 nop
  13494. 8005992: e000 b.n 8005996 <follow_path+0xe2>
  13495. if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
  13496. 8005994: bf00 nop
  13497. }
  13498. }
  13499. }
  13500. return res;
  13501. 8005996: 7dfb ldrb r3, [r7, #23]
  13502. }
  13503. 8005998: 4618 mov r0, r3
  13504. 800599a: 3718 adds r7, #24
  13505. 800599c: 46bd mov sp, r7
  13506. 800599e: bd80 pop {r7, pc}
  13507. 080059a0 <get_ldnumber>:
  13508. static
  13509. int get_ldnumber ( /* Returns logical drive number (-1:invalid drive) */
  13510. const TCHAR** path /* Pointer to pointer to the path name */
  13511. )
  13512. {
  13513. 80059a0: b480 push {r7}
  13514. 80059a2: b087 sub sp, #28
  13515. 80059a4: af00 add r7, sp, #0
  13516. 80059a6: 6078 str r0, [r7, #4]
  13517. const TCHAR *tp, *tt;
  13518. UINT i;
  13519. int vol = -1;
  13520. 80059a8: f04f 33ff mov.w r3, #4294967295
  13521. 80059ac: 613b str r3, [r7, #16]
  13522. char c;
  13523. TCHAR tc;
  13524. #endif
  13525. if (*path) { /* If the pointer is not a null */
  13526. 80059ae: 687b ldr r3, [r7, #4]
  13527. 80059b0: 681b ldr r3, [r3, #0]
  13528. 80059b2: 2b00 cmp r3, #0
  13529. 80059b4: d031 beq.n 8005a1a <get_ldnumber+0x7a>
  13530. for (tt = *path; (UINT)*tt >= (_USE_LFN ? ' ' : '!') && *tt != ':'; tt++) ; /* Find ':' in the path */
  13531. 80059b6: 687b ldr r3, [r7, #4]
  13532. 80059b8: 681b ldr r3, [r3, #0]
  13533. 80059ba: 617b str r3, [r7, #20]
  13534. 80059bc: e002 b.n 80059c4 <get_ldnumber+0x24>
  13535. 80059be: 697b ldr r3, [r7, #20]
  13536. 80059c0: 3301 adds r3, #1
  13537. 80059c2: 617b str r3, [r7, #20]
  13538. 80059c4: 697b ldr r3, [r7, #20]
  13539. 80059c6: 781b ldrb r3, [r3, #0]
  13540. 80059c8: 2b1f cmp r3, #31
  13541. 80059ca: d903 bls.n 80059d4 <get_ldnumber+0x34>
  13542. 80059cc: 697b ldr r3, [r7, #20]
  13543. 80059ce: 781b ldrb r3, [r3, #0]
  13544. 80059d0: 2b3a cmp r3, #58 ; 0x3a
  13545. 80059d2: d1f4 bne.n 80059be <get_ldnumber+0x1e>
  13546. if (*tt == ':') { /* If a ':' is exist in the path name */
  13547. 80059d4: 697b ldr r3, [r7, #20]
  13548. 80059d6: 781b ldrb r3, [r3, #0]
  13549. 80059d8: 2b3a cmp r3, #58 ; 0x3a
  13550. 80059da: d11c bne.n 8005a16 <get_ldnumber+0x76>
  13551. tp = *path;
  13552. 80059dc: 687b ldr r3, [r7, #4]
  13553. 80059de: 681b ldr r3, [r3, #0]
  13554. 80059e0: 60fb str r3, [r7, #12]
  13555. i = *tp++ - '0';
  13556. 80059e2: 68fb ldr r3, [r7, #12]
  13557. 80059e4: 1c5a adds r2, r3, #1
  13558. 80059e6: 60fa str r2, [r7, #12]
  13559. 80059e8: 781b ldrb r3, [r3, #0]
  13560. 80059ea: 3b30 subs r3, #48 ; 0x30
  13561. 80059ec: 60bb str r3, [r7, #8]
  13562. if (i < 10 && tp == tt) { /* Is there a numeric drive id? */
  13563. 80059ee: 68bb ldr r3, [r7, #8]
  13564. 80059f0: 2b09 cmp r3, #9
  13565. 80059f2: d80e bhi.n 8005a12 <get_ldnumber+0x72>
  13566. 80059f4: 68fa ldr r2, [r7, #12]
  13567. 80059f6: 697b ldr r3, [r7, #20]
  13568. 80059f8: 429a cmp r2, r3
  13569. 80059fa: d10a bne.n 8005a12 <get_ldnumber+0x72>
  13570. if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */
  13571. 80059fc: 68bb ldr r3, [r7, #8]
  13572. 80059fe: 2b00 cmp r3, #0
  13573. 8005a00: d107 bne.n 8005a12 <get_ldnumber+0x72>
  13574. vol = (int)i;
  13575. 8005a02: 68bb ldr r3, [r7, #8]
  13576. 8005a04: 613b str r3, [r7, #16]
  13577. *path = ++tt;
  13578. 8005a06: 697b ldr r3, [r7, #20]
  13579. 8005a08: 3301 adds r3, #1
  13580. 8005a0a: 617b str r3, [r7, #20]
  13581. 8005a0c: 687b ldr r3, [r7, #4]
  13582. 8005a0e: 697a ldr r2, [r7, #20]
  13583. 8005a10: 601a str r2, [r3, #0]
  13584. vol = (int)i;
  13585. *path = tt;
  13586. }
  13587. }
  13588. #endif
  13589. return vol;
  13590. 8005a12: 693b ldr r3, [r7, #16]
  13591. 8005a14: e002 b.n 8005a1c <get_ldnumber+0x7c>
  13592. }
  13593. #if _FS_RPATH != 0 && _VOLUMES >= 2
  13594. vol = CurrVol; /* Current drive */
  13595. #else
  13596. vol = 0; /* Drive 0 */
  13597. 8005a16: 2300 movs r3, #0
  13598. 8005a18: 613b str r3, [r7, #16]
  13599. #endif
  13600. }
  13601. return vol;
  13602. 8005a1a: 693b ldr r3, [r7, #16]
  13603. }
  13604. 8005a1c: 4618 mov r0, r3
  13605. 8005a1e: 371c adds r7, #28
  13606. 8005a20: 46bd mov sp, r7
  13607. 8005a22: bc80 pop {r7}
  13608. 8005a24: 4770 bx lr
  13609. ...
  13610. 08005a28 <check_fs>:
  13611. static
  13612. BYTE check_fs ( /* 0:FAT, 1:exFAT, 2:Valid BS but not FAT, 3:Not a BS, 4:Disk error */
  13613. FATFS* fs, /* File system object */
  13614. DWORD sect /* Sector# (lba) to load and check if it is an FAT-VBR or not */
  13615. )
  13616. {
  13617. 8005a28: b580 push {r7, lr}
  13618. 8005a2a: b082 sub sp, #8
  13619. 8005a2c: af00 add r7, sp, #0
  13620. 8005a2e: 6078 str r0, [r7, #4]
  13621. 8005a30: 6039 str r1, [r7, #0]
  13622. fs->wflag = 0; fs->winsect = 0xFFFFFFFF; /* Invaidate window */
  13623. 8005a32: 687b ldr r3, [r7, #4]
  13624. 8005a34: 2200 movs r2, #0
  13625. 8005a36: 70da strb r2, [r3, #3]
  13626. 8005a38: 687b ldr r3, [r7, #4]
  13627. 8005a3a: f04f 32ff mov.w r2, #4294967295
  13628. 8005a3e: 635a str r2, [r3, #52] ; 0x34
  13629. if (move_window(fs, sect) != FR_OK) return 4; /* Load boot record */
  13630. 8005a40: 6839 ldr r1, [r7, #0]
  13631. 8005a42: 6878 ldr r0, [r7, #4]
  13632. 8005a44: f7fe fc82 bl 800434c <move_window>
  13633. 8005a48: 4603 mov r3, r0
  13634. 8005a4a: 2b00 cmp r3, #0
  13635. 8005a4c: d001 beq.n 8005a52 <check_fs+0x2a>
  13636. 8005a4e: 2304 movs r3, #4
  13637. 8005a50: e038 b.n 8005ac4 <check_fs+0x9c>
  13638. if (ld_word(fs->win + BS_55AA) != 0xAA55) return 3; /* Check boot record signature (always placed here even if the sector size is >512) */
  13639. 8005a52: 687b ldr r3, [r7, #4]
  13640. 8005a54: 3338 adds r3, #56 ; 0x38
  13641. 8005a56: f503 73ff add.w r3, r3, #510 ; 0x1fe
  13642. 8005a5a: 4618 mov r0, r3
  13643. 8005a5c: f7fe f9d6 bl 8003e0c <ld_word>
  13644. 8005a60: 4603 mov r3, r0
  13645. 8005a62: 461a mov r2, r3
  13646. 8005a64: f64a 2355 movw r3, #43605 ; 0xaa55
  13647. 8005a68: 429a cmp r2, r3
  13648. 8005a6a: d001 beq.n 8005a70 <check_fs+0x48>
  13649. 8005a6c: 2303 movs r3, #3
  13650. 8005a6e: e029 b.n 8005ac4 <check_fs+0x9c>
  13651. if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90)) {
  13652. 8005a70: 687b ldr r3, [r7, #4]
  13653. 8005a72: f893 3038 ldrb.w r3, [r3, #56] ; 0x38
  13654. 8005a76: 2be9 cmp r3, #233 ; 0xe9
  13655. 8005a78: d009 beq.n 8005a8e <check_fs+0x66>
  13656. 8005a7a: 687b ldr r3, [r7, #4]
  13657. 8005a7c: f893 3038 ldrb.w r3, [r3, #56] ; 0x38
  13658. 8005a80: 2beb cmp r3, #235 ; 0xeb
  13659. 8005a82: d11e bne.n 8005ac2 <check_fs+0x9a>
  13660. 8005a84: 687b ldr r3, [r7, #4]
  13661. 8005a86: f893 303a ldrb.w r3, [r3, #58] ; 0x3a
  13662. 8005a8a: 2b90 cmp r3, #144 ; 0x90
  13663. 8005a8c: d119 bne.n 8005ac2 <check_fs+0x9a>
  13664. if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0; /* Check "FAT" string */
  13665. 8005a8e: 687b ldr r3, [r7, #4]
  13666. 8005a90: 3338 adds r3, #56 ; 0x38
  13667. 8005a92: 3336 adds r3, #54 ; 0x36
  13668. 8005a94: 4618 mov r0, r3
  13669. 8005a96: f7fe f9d0 bl 8003e3a <ld_dword>
  13670. 8005a9a: 4603 mov r3, r0
  13671. 8005a9c: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000
  13672. 8005aa0: 4a0a ldr r2, [pc, #40] ; (8005acc <check_fs+0xa4>)
  13673. 8005aa2: 4293 cmp r3, r2
  13674. 8005aa4: d101 bne.n 8005aaa <check_fs+0x82>
  13675. 8005aa6: 2300 movs r3, #0
  13676. 8005aa8: e00c b.n 8005ac4 <check_fs+0x9c>
  13677. if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0; /* Check "FAT3" string */
  13678. 8005aaa: 687b ldr r3, [r7, #4]
  13679. 8005aac: 3338 adds r3, #56 ; 0x38
  13680. 8005aae: 3352 adds r3, #82 ; 0x52
  13681. 8005ab0: 4618 mov r0, r3
  13682. 8005ab2: f7fe f9c2 bl 8003e3a <ld_dword>
  13683. 8005ab6: 4602 mov r2, r0
  13684. 8005ab8: 4b05 ldr r3, [pc, #20] ; (8005ad0 <check_fs+0xa8>)
  13685. 8005aba: 429a cmp r2, r3
  13686. 8005abc: d101 bne.n 8005ac2 <check_fs+0x9a>
  13687. 8005abe: 2300 movs r3, #0
  13688. 8005ac0: e000 b.n 8005ac4 <check_fs+0x9c>
  13689. }
  13690. #if _FS_EXFAT
  13691. if (!mem_cmp(fs->win + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11)) return 1;
  13692. #endif
  13693. return 2;
  13694. 8005ac2: 2302 movs r3, #2
  13695. }
  13696. 8005ac4: 4618 mov r0, r3
  13697. 8005ac6: 3708 adds r7, #8
  13698. 8005ac8: 46bd mov sp, r7
  13699. 8005aca: bd80 pop {r7, pc}
  13700. 8005acc: 00544146 .word 0x00544146
  13701. 8005ad0: 33544146 .word 0x33544146
  13702. 08005ad4 <find_volume>:
  13703. FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */
  13704. const TCHAR** path, /* Pointer to pointer to the path name (drive number) */
  13705. FATFS** rfs, /* Pointer to pointer to the found file system object */
  13706. BYTE mode /* !=0: Check write protection for write access */
  13707. )
  13708. {
  13709. 8005ad4: b580 push {r7, lr}
  13710. 8005ad6: b096 sub sp, #88 ; 0x58
  13711. 8005ad8: af00 add r7, sp, #0
  13712. 8005ada: 60f8 str r0, [r7, #12]
  13713. 8005adc: 60b9 str r1, [r7, #8]
  13714. 8005ade: 4613 mov r3, r2
  13715. 8005ae0: 71fb strb r3, [r7, #7]
  13716. FATFS *fs;
  13717. UINT i;
  13718. /* Get logical drive number */
  13719. *rfs = 0;
  13720. 8005ae2: 68bb ldr r3, [r7, #8]
  13721. 8005ae4: 2200 movs r2, #0
  13722. 8005ae6: 601a str r2, [r3, #0]
  13723. vol = get_ldnumber(path);
  13724. 8005ae8: 68f8 ldr r0, [r7, #12]
  13725. 8005aea: f7ff ff59 bl 80059a0 <get_ldnumber>
  13726. 8005aee: 63f8 str r0, [r7, #60] ; 0x3c
  13727. if (vol < 0) return FR_INVALID_DRIVE;
  13728. 8005af0: 6bfb ldr r3, [r7, #60] ; 0x3c
  13729. 8005af2: 2b00 cmp r3, #0
  13730. 8005af4: da01 bge.n 8005afa <find_volume+0x26>
  13731. 8005af6: 230b movs r3, #11
  13732. 8005af8: e268 b.n 8005fcc <find_volume+0x4f8>
  13733. /* Check if the file system object is valid or not */
  13734. fs = FatFs[vol]; /* Get pointer to the file system object */
  13735. 8005afa: 4ab0 ldr r2, [pc, #704] ; (8005dbc <find_volume+0x2e8>)
  13736. 8005afc: 6bfb ldr r3, [r7, #60] ; 0x3c
  13737. 8005afe: f852 3023 ldr.w r3, [r2, r3, lsl #2]
  13738. 8005b02: 63bb str r3, [r7, #56] ; 0x38
  13739. if (!fs) return FR_NOT_ENABLED; /* Is the file system object available? */
  13740. 8005b04: 6bbb ldr r3, [r7, #56] ; 0x38
  13741. 8005b06: 2b00 cmp r3, #0
  13742. 8005b08: d101 bne.n 8005b0e <find_volume+0x3a>
  13743. 8005b0a: 230c movs r3, #12
  13744. 8005b0c: e25e b.n 8005fcc <find_volume+0x4f8>
  13745. ENTER_FF(fs); /* Lock the volume */
  13746. *rfs = fs; /* Return pointer to the file system object */
  13747. 8005b0e: 68bb ldr r3, [r7, #8]
  13748. 8005b10: 6bba ldr r2, [r7, #56] ; 0x38
  13749. 8005b12: 601a str r2, [r3, #0]
  13750. mode &= (BYTE)~FA_READ; /* Desired access mode, write access or not */
  13751. 8005b14: 79fb ldrb r3, [r7, #7]
  13752. 8005b16: f023 0301 bic.w r3, r3, #1
  13753. 8005b1a: 71fb strb r3, [r7, #7]
  13754. if (fs->fs_type) { /* If the volume has been mounted */
  13755. 8005b1c: 6bbb ldr r3, [r7, #56] ; 0x38
  13756. 8005b1e: 781b ldrb r3, [r3, #0]
  13757. 8005b20: 2b00 cmp r3, #0
  13758. 8005b22: d01a beq.n 8005b5a <find_volume+0x86>
  13759. stat = disk_status(fs->drv);
  13760. 8005b24: 6bbb ldr r3, [r7, #56] ; 0x38
  13761. 8005b26: 785b ldrb r3, [r3, #1]
  13762. 8005b28: 4618 mov r0, r3
  13763. 8005b2a: f7fe f8d1 bl 8003cd0 <disk_status>
  13764. 8005b2e: 4603 mov r3, r0
  13765. 8005b30: f887 3037 strb.w r3, [r7, #55] ; 0x37
  13766. if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */
  13767. 8005b34: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
  13768. 8005b38: f003 0301 and.w r3, r3, #1
  13769. 8005b3c: 2b00 cmp r3, #0
  13770. 8005b3e: d10c bne.n 8005b5a <find_volume+0x86>
  13771. if (!_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check write protection if needed */
  13772. 8005b40: 79fb ldrb r3, [r7, #7]
  13773. 8005b42: 2b00 cmp r3, #0
  13774. 8005b44: d007 beq.n 8005b56 <find_volume+0x82>
  13775. 8005b46: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
  13776. 8005b4a: f003 0304 and.w r3, r3, #4
  13777. 8005b4e: 2b00 cmp r3, #0
  13778. 8005b50: d001 beq.n 8005b56 <find_volume+0x82>
  13779. return FR_WRITE_PROTECTED;
  13780. 8005b52: 230a movs r3, #10
  13781. 8005b54: e23a b.n 8005fcc <find_volume+0x4f8>
  13782. }
  13783. return FR_OK; /* The file system object is valid */
  13784. 8005b56: 2300 movs r3, #0
  13785. 8005b58: e238 b.n 8005fcc <find_volume+0x4f8>
  13786. }
  13787. /* The file system object is not valid. */
  13788. /* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */
  13789. fs->fs_type = 0; /* Clear the file system object */
  13790. 8005b5a: 6bbb ldr r3, [r7, #56] ; 0x38
  13791. 8005b5c: 2200 movs r2, #0
  13792. 8005b5e: 701a strb r2, [r3, #0]
  13793. fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */
  13794. 8005b60: 6bfb ldr r3, [r7, #60] ; 0x3c
  13795. 8005b62: b2da uxtb r2, r3
  13796. 8005b64: 6bbb ldr r3, [r7, #56] ; 0x38
  13797. 8005b66: 705a strb r2, [r3, #1]
  13798. stat = disk_initialize(fs->drv); /* Initialize the physical drive */
  13799. 8005b68: 6bbb ldr r3, [r7, #56] ; 0x38
  13800. 8005b6a: 785b ldrb r3, [r3, #1]
  13801. 8005b6c: 4618 mov r0, r3
  13802. 8005b6e: f7fe f8c9 bl 8003d04 <disk_initialize>
  13803. 8005b72: 4603 mov r3, r0
  13804. 8005b74: f887 3037 strb.w r3, [r7, #55] ; 0x37
  13805. if (stat & STA_NOINIT) { /* Check if the initialization succeeded */
  13806. 8005b78: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
  13807. 8005b7c: f003 0301 and.w r3, r3, #1
  13808. 8005b80: 2b00 cmp r3, #0
  13809. 8005b82: d001 beq.n 8005b88 <find_volume+0xb4>
  13810. return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */
  13811. 8005b84: 2303 movs r3, #3
  13812. 8005b86: e221 b.n 8005fcc <find_volume+0x4f8>
  13813. }
  13814. if (!_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */
  13815. 8005b88: 79fb ldrb r3, [r7, #7]
  13816. 8005b8a: 2b00 cmp r3, #0
  13817. 8005b8c: d007 beq.n 8005b9e <find_volume+0xca>
  13818. 8005b8e: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
  13819. 8005b92: f003 0304 and.w r3, r3, #4
  13820. 8005b96: 2b00 cmp r3, #0
  13821. 8005b98: d001 beq.n 8005b9e <find_volume+0xca>
  13822. return FR_WRITE_PROTECTED;
  13823. 8005b9a: 230a movs r3, #10
  13824. 8005b9c: e216 b.n 8005fcc <find_volume+0x4f8>
  13825. }
  13826. #if _MAX_SS != _MIN_SS /* Get sector size (multiple sector size cfg only) */
  13827. if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK) return FR_DISK_ERR;
  13828. 8005b9e: 6bbb ldr r3, [r7, #56] ; 0x38
  13829. 8005ba0: 7858 ldrb r0, [r3, #1]
  13830. 8005ba2: 6bbb ldr r3, [r7, #56] ; 0x38
  13831. 8005ba4: 330c adds r3, #12
  13832. 8005ba6: 461a mov r2, r3
  13833. 8005ba8: 2102 movs r1, #2
  13834. 8005baa: f7fe f911 bl 8003dd0 <disk_ioctl>
  13835. 8005bae: 4603 mov r3, r0
  13836. 8005bb0: 2b00 cmp r3, #0
  13837. 8005bb2: d001 beq.n 8005bb8 <find_volume+0xe4>
  13838. 8005bb4: 2301 movs r3, #1
  13839. 8005bb6: e209 b.n 8005fcc <find_volume+0x4f8>
  13840. if (SS(fs) > _MAX_SS || SS(fs) < _MIN_SS || (SS(fs) & (SS(fs) - 1))) return FR_DISK_ERR;
  13841. 8005bb8: 6bbb ldr r3, [r7, #56] ; 0x38
  13842. 8005bba: 899b ldrh r3, [r3, #12]
  13843. 8005bbc: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
  13844. 8005bc0: d80d bhi.n 8005bde <find_volume+0x10a>
  13845. 8005bc2: 6bbb ldr r3, [r7, #56] ; 0x38
  13846. 8005bc4: 899b ldrh r3, [r3, #12]
  13847. 8005bc6: f5b3 7f00 cmp.w r3, #512 ; 0x200
  13848. 8005bca: d308 bcc.n 8005bde <find_volume+0x10a>
  13849. 8005bcc: 6bbb ldr r3, [r7, #56] ; 0x38
  13850. 8005bce: 899b ldrh r3, [r3, #12]
  13851. 8005bd0: 461a mov r2, r3
  13852. 8005bd2: 6bbb ldr r3, [r7, #56] ; 0x38
  13853. 8005bd4: 899b ldrh r3, [r3, #12]
  13854. 8005bd6: 3b01 subs r3, #1
  13855. 8005bd8: 4013 ands r3, r2
  13856. 8005bda: 2b00 cmp r3, #0
  13857. 8005bdc: d001 beq.n 8005be2 <find_volume+0x10e>
  13858. 8005bde: 2301 movs r3, #1
  13859. 8005be0: e1f4 b.n 8005fcc <find_volume+0x4f8>
  13860. #endif
  13861. /* Find an FAT partition on the drive. Supports only generic partitioning rules, FDISK and SFD. */
  13862. bsect = 0;
  13863. 8005be2: 2300 movs r3, #0
  13864. 8005be4: 653b str r3, [r7, #80] ; 0x50
  13865. fmt = check_fs(fs, bsect); /* Load sector 0 and check if it is an FAT-VBR as SFD */
  13866. 8005be6: 6d39 ldr r1, [r7, #80] ; 0x50
  13867. 8005be8: 6bb8 ldr r0, [r7, #56] ; 0x38
  13868. 8005bea: f7ff ff1d bl 8005a28 <check_fs>
  13869. 8005bee: 4603 mov r3, r0
  13870. 8005bf0: f887 3057 strb.w r3, [r7, #87] ; 0x57
  13871. if (fmt == 2 || (fmt < 2 && LD2PT(vol) != 0)) { /* Not an FAT-VBR or forced partition number */
  13872. 8005bf4: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
  13873. 8005bf8: 2b02 cmp r3, #2
  13874. 8005bfa: d14b bne.n 8005c94 <find_volume+0x1c0>
  13875. for (i = 0; i < 4; i++) { /* Get partition offset */
  13876. 8005bfc: 2300 movs r3, #0
  13877. 8005bfe: 643b str r3, [r7, #64] ; 0x40
  13878. 8005c00: e01f b.n 8005c42 <find_volume+0x16e>
  13879. pt = fs->win + (MBR_Table + i * SZ_PTE);
  13880. 8005c02: 6bbb ldr r3, [r7, #56] ; 0x38
  13881. 8005c04: f103 0238 add.w r2, r3, #56 ; 0x38
  13882. 8005c08: 6c3b ldr r3, [r7, #64] ; 0x40
  13883. 8005c0a: 011b lsls r3, r3, #4
  13884. 8005c0c: f503 73df add.w r3, r3, #446 ; 0x1be
  13885. 8005c10: 4413 add r3, r2
  13886. 8005c12: 633b str r3, [r7, #48] ; 0x30
  13887. br[i] = pt[PTE_System] ? ld_dword(pt + PTE_StLba) : 0;
  13888. 8005c14: 6b3b ldr r3, [r7, #48] ; 0x30
  13889. 8005c16: 3304 adds r3, #4
  13890. 8005c18: 781b ldrb r3, [r3, #0]
  13891. 8005c1a: 2b00 cmp r3, #0
  13892. 8005c1c: d006 beq.n 8005c2c <find_volume+0x158>
  13893. 8005c1e: 6b3b ldr r3, [r7, #48] ; 0x30
  13894. 8005c20: 3308 adds r3, #8
  13895. 8005c22: 4618 mov r0, r3
  13896. 8005c24: f7fe f909 bl 8003e3a <ld_dword>
  13897. 8005c28: 4602 mov r2, r0
  13898. 8005c2a: e000 b.n 8005c2e <find_volume+0x15a>
  13899. 8005c2c: 2200 movs r2, #0
  13900. 8005c2e: 6c3b ldr r3, [r7, #64] ; 0x40
  13901. 8005c30: 009b lsls r3, r3, #2
  13902. 8005c32: f107 0158 add.w r1, r7, #88 ; 0x58
  13903. 8005c36: 440b add r3, r1
  13904. 8005c38: f843 2c44 str.w r2, [r3, #-68]
  13905. for (i = 0; i < 4; i++) { /* Get partition offset */
  13906. 8005c3c: 6c3b ldr r3, [r7, #64] ; 0x40
  13907. 8005c3e: 3301 adds r3, #1
  13908. 8005c40: 643b str r3, [r7, #64] ; 0x40
  13909. 8005c42: 6c3b ldr r3, [r7, #64] ; 0x40
  13910. 8005c44: 2b03 cmp r3, #3
  13911. 8005c46: d9dc bls.n 8005c02 <find_volume+0x12e>
  13912. }
  13913. i = LD2PT(vol); /* Partition number: 0:auto, 1-4:forced */
  13914. 8005c48: 2300 movs r3, #0
  13915. 8005c4a: 643b str r3, [r7, #64] ; 0x40
  13916. if (i) i--;
  13917. 8005c4c: 6c3b ldr r3, [r7, #64] ; 0x40
  13918. 8005c4e: 2b00 cmp r3, #0
  13919. 8005c50: d002 beq.n 8005c58 <find_volume+0x184>
  13920. 8005c52: 6c3b ldr r3, [r7, #64] ; 0x40
  13921. 8005c54: 3b01 subs r3, #1
  13922. 8005c56: 643b str r3, [r7, #64] ; 0x40
  13923. do { /* Find an FAT volume */
  13924. bsect = br[i];
  13925. 8005c58: 6c3b ldr r3, [r7, #64] ; 0x40
  13926. 8005c5a: 009b lsls r3, r3, #2
  13927. 8005c5c: f107 0258 add.w r2, r7, #88 ; 0x58
  13928. 8005c60: 4413 add r3, r2
  13929. 8005c62: f853 3c44 ldr.w r3, [r3, #-68]
  13930. 8005c66: 653b str r3, [r7, #80] ; 0x50
  13931. fmt = bsect ? check_fs(fs, bsect) : 3; /* Check the partition */
  13932. 8005c68: 6d3b ldr r3, [r7, #80] ; 0x50
  13933. 8005c6a: 2b00 cmp r3, #0
  13934. 8005c6c: d005 beq.n 8005c7a <find_volume+0x1a6>
  13935. 8005c6e: 6d39 ldr r1, [r7, #80] ; 0x50
  13936. 8005c70: 6bb8 ldr r0, [r7, #56] ; 0x38
  13937. 8005c72: f7ff fed9 bl 8005a28 <check_fs>
  13938. 8005c76: 4603 mov r3, r0
  13939. 8005c78: e000 b.n 8005c7c <find_volume+0x1a8>
  13940. 8005c7a: 2303 movs r3, #3
  13941. 8005c7c: f887 3057 strb.w r3, [r7, #87] ; 0x57
  13942. } while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4);
  13943. 8005c80: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
  13944. 8005c84: 2b01 cmp r3, #1
  13945. 8005c86: d905 bls.n 8005c94 <find_volume+0x1c0>
  13946. 8005c88: 6c3b ldr r3, [r7, #64] ; 0x40
  13947. 8005c8a: 3301 adds r3, #1
  13948. 8005c8c: 643b str r3, [r7, #64] ; 0x40
  13949. 8005c8e: 6c3b ldr r3, [r7, #64] ; 0x40
  13950. 8005c90: 2b03 cmp r3, #3
  13951. 8005c92: d9e1 bls.n 8005c58 <find_volume+0x184>
  13952. }
  13953. if (fmt == 4) return FR_DISK_ERR; /* An error occured in the disk I/O layer */
  13954. 8005c94: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
  13955. 8005c98: 2b04 cmp r3, #4
  13956. 8005c9a: d101 bne.n 8005ca0 <find_volume+0x1cc>
  13957. 8005c9c: 2301 movs r3, #1
  13958. 8005c9e: e195 b.n 8005fcc <find_volume+0x4f8>
  13959. if (fmt >= 2) return FR_NO_FILESYSTEM; /* No FAT volume is found */
  13960. 8005ca0: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
  13961. 8005ca4: 2b01 cmp r3, #1
  13962. 8005ca6: d901 bls.n 8005cac <find_volume+0x1d8>
  13963. 8005ca8: 230d movs r3, #13
  13964. 8005caa: e18f b.n 8005fcc <find_volume+0x4f8>
  13965. #endif
  13966. fmt = FS_EXFAT; /* FAT sub-type */
  13967. } else
  13968. #endif /* _FS_EXFAT */
  13969. {
  13970. if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_BytsPerSec must be equal to the physical sector size) */
  13971. 8005cac: 6bbb ldr r3, [r7, #56] ; 0x38
  13972. 8005cae: 3338 adds r3, #56 ; 0x38
  13973. 8005cb0: 330b adds r3, #11
  13974. 8005cb2: 4618 mov r0, r3
  13975. 8005cb4: f7fe f8aa bl 8003e0c <ld_word>
  13976. 8005cb8: 4603 mov r3, r0
  13977. 8005cba: 461a mov r2, r3
  13978. 8005cbc: 6bbb ldr r3, [r7, #56] ; 0x38
  13979. 8005cbe: 899b ldrh r3, [r3, #12]
  13980. 8005cc0: 429a cmp r2, r3
  13981. 8005cc2: d001 beq.n 8005cc8 <find_volume+0x1f4>
  13982. 8005cc4: 230d movs r3, #13
  13983. 8005cc6: e181 b.n 8005fcc <find_volume+0x4f8>
  13984. fasize = ld_word(fs->win + BPB_FATSz16); /* Number of sectors per FAT */
  13985. 8005cc8: 6bbb ldr r3, [r7, #56] ; 0x38
  13986. 8005cca: 3338 adds r3, #56 ; 0x38
  13987. 8005ccc: 3316 adds r3, #22
  13988. 8005cce: 4618 mov r0, r3
  13989. 8005cd0: f7fe f89c bl 8003e0c <ld_word>
  13990. 8005cd4: 4603 mov r3, r0
  13991. 8005cd6: 64fb str r3, [r7, #76] ; 0x4c
  13992. if (fasize == 0) fasize = ld_dword(fs->win + BPB_FATSz32);
  13993. 8005cd8: 6cfb ldr r3, [r7, #76] ; 0x4c
  13994. 8005cda: 2b00 cmp r3, #0
  13995. 8005cdc: d106 bne.n 8005cec <find_volume+0x218>
  13996. 8005cde: 6bbb ldr r3, [r7, #56] ; 0x38
  13997. 8005ce0: 3338 adds r3, #56 ; 0x38
  13998. 8005ce2: 3324 adds r3, #36 ; 0x24
  13999. 8005ce4: 4618 mov r0, r3
  14000. 8005ce6: f7fe f8a8 bl 8003e3a <ld_dword>
  14001. 8005cea: 64f8 str r0, [r7, #76] ; 0x4c
  14002. fs->fsize = fasize;
  14003. 8005cec: 6bbb ldr r3, [r7, #56] ; 0x38
  14004. 8005cee: 6cfa ldr r2, [r7, #76] ; 0x4c
  14005. 8005cf0: 621a str r2, [r3, #32]
  14006. fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FATs */
  14007. 8005cf2: 6bbb ldr r3, [r7, #56] ; 0x38
  14008. 8005cf4: f893 2048 ldrb.w r2, [r3, #72] ; 0x48
  14009. 8005cf8: 6bbb ldr r3, [r7, #56] ; 0x38
  14010. 8005cfa: 709a strb r2, [r3, #2]
  14011. if (fs->n_fats != 1 && fs->n_fats != 2) return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */
  14012. 8005cfc: 6bbb ldr r3, [r7, #56] ; 0x38
  14013. 8005cfe: 789b ldrb r3, [r3, #2]
  14014. 8005d00: 2b01 cmp r3, #1
  14015. 8005d02: d005 beq.n 8005d10 <find_volume+0x23c>
  14016. 8005d04: 6bbb ldr r3, [r7, #56] ; 0x38
  14017. 8005d06: 789b ldrb r3, [r3, #2]
  14018. 8005d08: 2b02 cmp r3, #2
  14019. 8005d0a: d001 beq.n 8005d10 <find_volume+0x23c>
  14020. 8005d0c: 230d movs r3, #13
  14021. 8005d0e: e15d b.n 8005fcc <find_volume+0x4f8>
  14022. fasize *= fs->n_fats; /* Number of sectors for FAT area */
  14023. 8005d10: 6bbb ldr r3, [r7, #56] ; 0x38
  14024. 8005d12: 789b ldrb r3, [r3, #2]
  14025. 8005d14: 461a mov r2, r3
  14026. 8005d16: 6cfb ldr r3, [r7, #76] ; 0x4c
  14027. 8005d18: fb02 f303 mul.w r3, r2, r3
  14028. 8005d1c: 64fb str r3, [r7, #76] ; 0x4c
  14029. fs->csize = fs->win[BPB_SecPerClus]; /* Cluster size */
  14030. 8005d1e: 6bbb ldr r3, [r7, #56] ; 0x38
  14031. 8005d20: f893 3045 ldrb.w r3, [r3, #69] ; 0x45
  14032. 8005d24: b29a uxth r2, r3
  14033. 8005d26: 6bbb ldr r3, [r7, #56] ; 0x38
  14034. 8005d28: 815a strh r2, [r3, #10]
  14035. if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) return FR_NO_FILESYSTEM; /* (Must be power of 2) */
  14036. 8005d2a: 6bbb ldr r3, [r7, #56] ; 0x38
  14037. 8005d2c: 895b ldrh r3, [r3, #10]
  14038. 8005d2e: 2b00 cmp r3, #0
  14039. 8005d30: d008 beq.n 8005d44 <find_volume+0x270>
  14040. 8005d32: 6bbb ldr r3, [r7, #56] ; 0x38
  14041. 8005d34: 895b ldrh r3, [r3, #10]
  14042. 8005d36: 461a mov r2, r3
  14043. 8005d38: 6bbb ldr r3, [r7, #56] ; 0x38
  14044. 8005d3a: 895b ldrh r3, [r3, #10]
  14045. 8005d3c: 3b01 subs r3, #1
  14046. 8005d3e: 4013 ands r3, r2
  14047. 8005d40: 2b00 cmp r3, #0
  14048. 8005d42: d001 beq.n 8005d48 <find_volume+0x274>
  14049. 8005d44: 230d movs r3, #13
  14050. 8005d46: e141 b.n 8005fcc <find_volume+0x4f8>
  14051. fs->n_rootdir = ld_word(fs->win + BPB_RootEntCnt); /* Number of root directory entries */
  14052. 8005d48: 6bbb ldr r3, [r7, #56] ; 0x38
  14053. 8005d4a: 3338 adds r3, #56 ; 0x38
  14054. 8005d4c: 3311 adds r3, #17
  14055. 8005d4e: 4618 mov r0, r3
  14056. 8005d50: f7fe f85c bl 8003e0c <ld_word>
  14057. 8005d54: 4603 mov r3, r0
  14058. 8005d56: 461a mov r2, r3
  14059. 8005d58: 6bbb ldr r3, [r7, #56] ; 0x38
  14060. 8005d5a: 811a strh r2, [r3, #8]
  14061. if (fs->n_rootdir % (SS(fs) / SZDIRE)) return FR_NO_FILESYSTEM; /* (Must be sector aligned) */
  14062. 8005d5c: 6bbb ldr r3, [r7, #56] ; 0x38
  14063. 8005d5e: 891b ldrh r3, [r3, #8]
  14064. 8005d60: 6bba ldr r2, [r7, #56] ; 0x38
  14065. 8005d62: 8992 ldrh r2, [r2, #12]
  14066. 8005d64: 0952 lsrs r2, r2, #5
  14067. 8005d66: b292 uxth r2, r2
  14068. 8005d68: fbb3 f1f2 udiv r1, r3, r2
  14069. 8005d6c: fb02 f201 mul.w r2, r2, r1
  14070. 8005d70: 1a9b subs r3, r3, r2
  14071. 8005d72: b29b uxth r3, r3
  14072. 8005d74: 2b00 cmp r3, #0
  14073. 8005d76: d001 beq.n 8005d7c <find_volume+0x2a8>
  14074. 8005d78: 230d movs r3, #13
  14075. 8005d7a: e127 b.n 8005fcc <find_volume+0x4f8>
  14076. tsect = ld_word(fs->win + BPB_TotSec16); /* Number of sectors on the volume */
  14077. 8005d7c: 6bbb ldr r3, [r7, #56] ; 0x38
  14078. 8005d7e: 3338 adds r3, #56 ; 0x38
  14079. 8005d80: 3313 adds r3, #19
  14080. 8005d82: 4618 mov r0, r3
  14081. 8005d84: f7fe f842 bl 8003e0c <ld_word>
  14082. 8005d88: 4603 mov r3, r0
  14083. 8005d8a: 64bb str r3, [r7, #72] ; 0x48
  14084. if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32);
  14085. 8005d8c: 6cbb ldr r3, [r7, #72] ; 0x48
  14086. 8005d8e: 2b00 cmp r3, #0
  14087. 8005d90: d106 bne.n 8005da0 <find_volume+0x2cc>
  14088. 8005d92: 6bbb ldr r3, [r7, #56] ; 0x38
  14089. 8005d94: 3338 adds r3, #56 ; 0x38
  14090. 8005d96: 3320 adds r3, #32
  14091. 8005d98: 4618 mov r0, r3
  14092. 8005d9a: f7fe f84e bl 8003e3a <ld_dword>
  14093. 8005d9e: 64b8 str r0, [r7, #72] ; 0x48
  14094. nrsv = ld_word(fs->win + BPB_RsvdSecCnt); /* Number of reserved sectors */
  14095. 8005da0: 6bbb ldr r3, [r7, #56] ; 0x38
  14096. 8005da2: 3338 adds r3, #56 ; 0x38
  14097. 8005da4: 330e adds r3, #14
  14098. 8005da6: 4618 mov r0, r3
  14099. 8005da8: f7fe f830 bl 8003e0c <ld_word>
  14100. 8005dac: 4603 mov r3, r0
  14101. 8005dae: 85fb strh r3, [r7, #46] ; 0x2e
  14102. if (nrsv == 0) return FR_NO_FILESYSTEM; /* (Must not be 0) */
  14103. 8005db0: 8dfb ldrh r3, [r7, #46] ; 0x2e
  14104. 8005db2: 2b00 cmp r3, #0
  14105. 8005db4: d104 bne.n 8005dc0 <find_volume+0x2ec>
  14106. 8005db6: 230d movs r3, #13
  14107. 8005db8: e108 b.n 8005fcc <find_volume+0x4f8>
  14108. 8005dba: bf00 nop
  14109. 8005dbc: 200000ac .word 0x200000ac
  14110. /* Determine the FAT sub type */
  14111. sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZDIRE); /* RSV + FAT + DIR */
  14112. 8005dc0: 8dfa ldrh r2, [r7, #46] ; 0x2e
  14113. 8005dc2: 6cfb ldr r3, [r7, #76] ; 0x4c
  14114. 8005dc4: 4413 add r3, r2
  14115. 8005dc6: 6bba ldr r2, [r7, #56] ; 0x38
  14116. 8005dc8: 8911 ldrh r1, [r2, #8]
  14117. 8005dca: 6bba ldr r2, [r7, #56] ; 0x38
  14118. 8005dcc: 8992 ldrh r2, [r2, #12]
  14119. 8005dce: 0952 lsrs r2, r2, #5
  14120. 8005dd0: b292 uxth r2, r2
  14121. 8005dd2: fbb1 f2f2 udiv r2, r1, r2
  14122. 8005dd6: b292 uxth r2, r2
  14123. 8005dd8: 4413 add r3, r2
  14124. 8005dda: 62bb str r3, [r7, #40] ; 0x28
  14125. if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
  14126. 8005ddc: 6cba ldr r2, [r7, #72] ; 0x48
  14127. 8005dde: 6abb ldr r3, [r7, #40] ; 0x28
  14128. 8005de0: 429a cmp r2, r3
  14129. 8005de2: d201 bcs.n 8005de8 <find_volume+0x314>
  14130. 8005de4: 230d movs r3, #13
  14131. 8005de6: e0f1 b.n 8005fcc <find_volume+0x4f8>
  14132. nclst = (tsect - sysect) / fs->csize; /* Number of clusters */
  14133. 8005de8: 6cba ldr r2, [r7, #72] ; 0x48
  14134. 8005dea: 6abb ldr r3, [r7, #40] ; 0x28
  14135. 8005dec: 1ad3 subs r3, r2, r3
  14136. 8005dee: 6bba ldr r2, [r7, #56] ; 0x38
  14137. 8005df0: 8952 ldrh r2, [r2, #10]
  14138. 8005df2: fbb3 f3f2 udiv r3, r3, r2
  14139. 8005df6: 627b str r3, [r7, #36] ; 0x24
  14140. if (nclst == 0) return FR_NO_FILESYSTEM; /* (Invalid volume size) */
  14141. 8005df8: 6a7b ldr r3, [r7, #36] ; 0x24
  14142. 8005dfa: 2b00 cmp r3, #0
  14143. 8005dfc: d101 bne.n 8005e02 <find_volume+0x32e>
  14144. 8005dfe: 230d movs r3, #13
  14145. 8005e00: e0e4 b.n 8005fcc <find_volume+0x4f8>
  14146. fmt = FS_FAT32;
  14147. 8005e02: 2303 movs r3, #3
  14148. 8005e04: f887 3057 strb.w r3, [r7, #87] ; 0x57
  14149. if (nclst <= MAX_FAT16) fmt = FS_FAT16;
  14150. 8005e08: 6a7b ldr r3, [r7, #36] ; 0x24
  14151. 8005e0a: f64f 72f5 movw r2, #65525 ; 0xfff5
  14152. 8005e0e: 4293 cmp r3, r2
  14153. 8005e10: d802 bhi.n 8005e18 <find_volume+0x344>
  14154. 8005e12: 2302 movs r3, #2
  14155. 8005e14: f887 3057 strb.w r3, [r7, #87] ; 0x57
  14156. if (nclst <= MAX_FAT12) fmt = FS_FAT12;
  14157. 8005e18: 6a7b ldr r3, [r7, #36] ; 0x24
  14158. 8005e1a: f640 72f5 movw r2, #4085 ; 0xff5
  14159. 8005e1e: 4293 cmp r3, r2
  14160. 8005e20: d802 bhi.n 8005e28 <find_volume+0x354>
  14161. 8005e22: 2301 movs r3, #1
  14162. 8005e24: f887 3057 strb.w r3, [r7, #87] ; 0x57
  14163. /* Boundaries and Limits */
  14164. fs->n_fatent = nclst + 2; /* Number of FAT entries */
  14165. 8005e28: 6a7b ldr r3, [r7, #36] ; 0x24
  14166. 8005e2a: 1c9a adds r2, r3, #2
  14167. 8005e2c: 6bbb ldr r3, [r7, #56] ; 0x38
  14168. 8005e2e: 61da str r2, [r3, #28]
  14169. fs->volbase = bsect; /* Volume start sector */
  14170. 8005e30: 6bbb ldr r3, [r7, #56] ; 0x38
  14171. 8005e32: 6d3a ldr r2, [r7, #80] ; 0x50
  14172. 8005e34: 625a str r2, [r3, #36] ; 0x24
  14173. fs->fatbase = bsect + nrsv; /* FAT start sector */
  14174. 8005e36: 8dfa ldrh r2, [r7, #46] ; 0x2e
  14175. 8005e38: 6d3b ldr r3, [r7, #80] ; 0x50
  14176. 8005e3a: 441a add r2, r3
  14177. 8005e3c: 6bbb ldr r3, [r7, #56] ; 0x38
  14178. 8005e3e: 629a str r2, [r3, #40] ; 0x28
  14179. fs->database = bsect + sysect; /* Data start sector */
  14180. 8005e40: 6d3a ldr r2, [r7, #80] ; 0x50
  14181. 8005e42: 6abb ldr r3, [r7, #40] ; 0x28
  14182. 8005e44: 441a add r2, r3
  14183. 8005e46: 6bbb ldr r3, [r7, #56] ; 0x38
  14184. 8005e48: 631a str r2, [r3, #48] ; 0x30
  14185. if (fmt == FS_FAT32) {
  14186. 8005e4a: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
  14187. 8005e4e: 2b03 cmp r3, #3
  14188. 8005e50: d11e bne.n 8005e90 <find_volume+0x3bc>
  14189. if (ld_word(fs->win + BPB_FSVer32) != 0) return FR_NO_FILESYSTEM; /* (Must be FAT32 revision 0.0) */
  14190. 8005e52: 6bbb ldr r3, [r7, #56] ; 0x38
  14191. 8005e54: 3338 adds r3, #56 ; 0x38
  14192. 8005e56: 332a adds r3, #42 ; 0x2a
  14193. 8005e58: 4618 mov r0, r3
  14194. 8005e5a: f7fd ffd7 bl 8003e0c <ld_word>
  14195. 8005e5e: 4603 mov r3, r0
  14196. 8005e60: 2b00 cmp r3, #0
  14197. 8005e62: d001 beq.n 8005e68 <find_volume+0x394>
  14198. 8005e64: 230d movs r3, #13
  14199. 8005e66: e0b1 b.n 8005fcc <find_volume+0x4f8>
  14200. if (fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */
  14201. 8005e68: 6bbb ldr r3, [r7, #56] ; 0x38
  14202. 8005e6a: 891b ldrh r3, [r3, #8]
  14203. 8005e6c: 2b00 cmp r3, #0
  14204. 8005e6e: d001 beq.n 8005e74 <find_volume+0x3a0>
  14205. 8005e70: 230d movs r3, #13
  14206. 8005e72: e0ab b.n 8005fcc <find_volume+0x4f8>
  14207. fs->dirbase = ld_dword(fs->win + BPB_RootClus32); /* Root directory start cluster */
  14208. 8005e74: 6bbb ldr r3, [r7, #56] ; 0x38
  14209. 8005e76: 3338 adds r3, #56 ; 0x38
  14210. 8005e78: 332c adds r3, #44 ; 0x2c
  14211. 8005e7a: 4618 mov r0, r3
  14212. 8005e7c: f7fd ffdd bl 8003e3a <ld_dword>
  14213. 8005e80: 4602 mov r2, r0
  14214. 8005e82: 6bbb ldr r3, [r7, #56] ; 0x38
  14215. 8005e84: 62da str r2, [r3, #44] ; 0x2c
  14216. szbfat = fs->n_fatent * 4; /* (Needed FAT size) */
  14217. 8005e86: 6bbb ldr r3, [r7, #56] ; 0x38
  14218. 8005e88: 69db ldr r3, [r3, #28]
  14219. 8005e8a: 009b lsls r3, r3, #2
  14220. 8005e8c: 647b str r3, [r7, #68] ; 0x44
  14221. 8005e8e: e01f b.n 8005ed0 <find_volume+0x3fc>
  14222. } else {
  14223. if (fs->n_rootdir == 0) return FR_NO_FILESYSTEM;/* (BPB_RootEntCnt must not be 0) */
  14224. 8005e90: 6bbb ldr r3, [r7, #56] ; 0x38
  14225. 8005e92: 891b ldrh r3, [r3, #8]
  14226. 8005e94: 2b00 cmp r3, #0
  14227. 8005e96: d101 bne.n 8005e9c <find_volume+0x3c8>
  14228. 8005e98: 230d movs r3, #13
  14229. 8005e9a: e097 b.n 8005fcc <find_volume+0x4f8>
  14230. fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */
  14231. 8005e9c: 6bbb ldr r3, [r7, #56] ; 0x38
  14232. 8005e9e: 6a9a ldr r2, [r3, #40] ; 0x28
  14233. 8005ea0: 6cfb ldr r3, [r7, #76] ; 0x4c
  14234. 8005ea2: 441a add r2, r3
  14235. 8005ea4: 6bbb ldr r3, [r7, #56] ; 0x38
  14236. 8005ea6: 62da str r2, [r3, #44] ; 0x2c
  14237. szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
  14238. fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);
  14239. 8005ea8: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
  14240. 8005eac: 2b02 cmp r3, #2
  14241. 8005eae: d103 bne.n 8005eb8 <find_volume+0x3e4>
  14242. 8005eb0: 6bbb ldr r3, [r7, #56] ; 0x38
  14243. 8005eb2: 69db ldr r3, [r3, #28]
  14244. 8005eb4: 005b lsls r3, r3, #1
  14245. 8005eb6: e00a b.n 8005ece <find_volume+0x3fa>
  14246. 8005eb8: 6bbb ldr r3, [r7, #56] ; 0x38
  14247. 8005eba: 69da ldr r2, [r3, #28]
  14248. 8005ebc: 4613 mov r3, r2
  14249. 8005ebe: 005b lsls r3, r3, #1
  14250. 8005ec0: 4413 add r3, r2
  14251. 8005ec2: 085a lsrs r2, r3, #1
  14252. 8005ec4: 6bbb ldr r3, [r7, #56] ; 0x38
  14253. 8005ec6: 69db ldr r3, [r3, #28]
  14254. 8005ec8: f003 0301 and.w r3, r3, #1
  14255. 8005ecc: 4413 add r3, r2
  14256. szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */
  14257. 8005ece: 647b str r3, [r7, #68] ; 0x44
  14258. }
  14259. if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_FATSz must not be less than the size needed) */
  14260. 8005ed0: 6bbb ldr r3, [r7, #56] ; 0x38
  14261. 8005ed2: 6a1a ldr r2, [r3, #32]
  14262. 8005ed4: 6bbb ldr r3, [r7, #56] ; 0x38
  14263. 8005ed6: 899b ldrh r3, [r3, #12]
  14264. 8005ed8: 4619 mov r1, r3
  14265. 8005eda: 6c7b ldr r3, [r7, #68] ; 0x44
  14266. 8005edc: 440b add r3, r1
  14267. 8005ede: 3b01 subs r3, #1
  14268. 8005ee0: 6bb9 ldr r1, [r7, #56] ; 0x38
  14269. 8005ee2: 8989 ldrh r1, [r1, #12]
  14270. 8005ee4: fbb3 f3f1 udiv r3, r3, r1
  14271. 8005ee8: 429a cmp r2, r3
  14272. 8005eea: d201 bcs.n 8005ef0 <find_volume+0x41c>
  14273. 8005eec: 230d movs r3, #13
  14274. 8005eee: e06d b.n 8005fcc <find_volume+0x4f8>
  14275. #if !_FS_READONLY
  14276. /* Get FSINFO if available */
  14277. fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */
  14278. 8005ef0: 6bbb ldr r3, [r7, #56] ; 0x38
  14279. 8005ef2: f04f 32ff mov.w r2, #4294967295
  14280. 8005ef6: 619a str r2, [r3, #24]
  14281. 8005ef8: 6bbb ldr r3, [r7, #56] ; 0x38
  14282. 8005efa: 699a ldr r2, [r3, #24]
  14283. 8005efc: 6bbb ldr r3, [r7, #56] ; 0x38
  14284. 8005efe: 615a str r2, [r3, #20]
  14285. fs->fsi_flag = 0x80;
  14286. 8005f00: 6bbb ldr r3, [r7, #56] ; 0x38
  14287. 8005f02: 2280 movs r2, #128 ; 0x80
  14288. 8005f04: 711a strb r2, [r3, #4]
  14289. #if (_FS_NOFSINFO & 3) != 3
  14290. if (fmt == FS_FAT32 /* Enable FSINFO only if FAT32 and BPB_FSInfo32 == 1 */
  14291. 8005f06: f897 3057 ldrb.w r3, [r7, #87] ; 0x57
  14292. 8005f0a: 2b03 cmp r3, #3
  14293. 8005f0c: d149 bne.n 8005fa2 <find_volume+0x4ce>
  14294. && ld_word(fs->win + BPB_FSInfo32) == 1
  14295. 8005f0e: 6bbb ldr r3, [r7, #56] ; 0x38
  14296. 8005f10: 3338 adds r3, #56 ; 0x38
  14297. 8005f12: 3330 adds r3, #48 ; 0x30
  14298. 8005f14: 4618 mov r0, r3
  14299. 8005f16: f7fd ff79 bl 8003e0c <ld_word>
  14300. 8005f1a: 4603 mov r3, r0
  14301. 8005f1c: 2b01 cmp r3, #1
  14302. 8005f1e: d140 bne.n 8005fa2 <find_volume+0x4ce>
  14303. && move_window(fs, bsect + 1) == FR_OK)
  14304. 8005f20: 6d3b ldr r3, [r7, #80] ; 0x50
  14305. 8005f22: 3301 adds r3, #1
  14306. 8005f24: 4619 mov r1, r3
  14307. 8005f26: 6bb8 ldr r0, [r7, #56] ; 0x38
  14308. 8005f28: f7fe fa10 bl 800434c <move_window>
  14309. 8005f2c: 4603 mov r3, r0
  14310. 8005f2e: 2b00 cmp r3, #0
  14311. 8005f30: d137 bne.n 8005fa2 <find_volume+0x4ce>
  14312. {
  14313. fs->fsi_flag = 0;
  14314. 8005f32: 6bbb ldr r3, [r7, #56] ; 0x38
  14315. 8005f34: 2200 movs r2, #0
  14316. 8005f36: 711a strb r2, [r3, #4]
  14317. if (ld_word(fs->win + BS_55AA) == 0xAA55 /* Load FSINFO data if available */
  14318. 8005f38: 6bbb ldr r3, [r7, #56] ; 0x38
  14319. 8005f3a: 3338 adds r3, #56 ; 0x38
  14320. 8005f3c: f503 73ff add.w r3, r3, #510 ; 0x1fe
  14321. 8005f40: 4618 mov r0, r3
  14322. 8005f42: f7fd ff63 bl 8003e0c <ld_word>
  14323. 8005f46: 4603 mov r3, r0
  14324. 8005f48: 461a mov r2, r3
  14325. 8005f4a: f64a 2355 movw r3, #43605 ; 0xaa55
  14326. 8005f4e: 429a cmp r2, r3
  14327. 8005f50: d127 bne.n 8005fa2 <find_volume+0x4ce>
  14328. && ld_dword(fs->win + FSI_LeadSig) == 0x41615252
  14329. 8005f52: 6bbb ldr r3, [r7, #56] ; 0x38
  14330. 8005f54: 3338 adds r3, #56 ; 0x38
  14331. 8005f56: 4618 mov r0, r3
  14332. 8005f58: f7fd ff6f bl 8003e3a <ld_dword>
  14333. 8005f5c: 4602 mov r2, r0
  14334. 8005f5e: 4b1d ldr r3, [pc, #116] ; (8005fd4 <find_volume+0x500>)
  14335. 8005f60: 429a cmp r2, r3
  14336. 8005f62: d11e bne.n 8005fa2 <find_volume+0x4ce>
  14337. && ld_dword(fs->win + FSI_StrucSig) == 0x61417272)
  14338. 8005f64: 6bbb ldr r3, [r7, #56] ; 0x38
  14339. 8005f66: 3338 adds r3, #56 ; 0x38
  14340. 8005f68: f503 73f2 add.w r3, r3, #484 ; 0x1e4
  14341. 8005f6c: 4618 mov r0, r3
  14342. 8005f6e: f7fd ff64 bl 8003e3a <ld_dword>
  14343. 8005f72: 4602 mov r2, r0
  14344. 8005f74: 4b18 ldr r3, [pc, #96] ; (8005fd8 <find_volume+0x504>)
  14345. 8005f76: 429a cmp r2, r3
  14346. 8005f78: d113 bne.n 8005fa2 <find_volume+0x4ce>
  14347. {
  14348. #if (_FS_NOFSINFO & 1) == 0
  14349. fs->free_clst = ld_dword(fs->win + FSI_Free_Count);
  14350. 8005f7a: 6bbb ldr r3, [r7, #56] ; 0x38
  14351. 8005f7c: 3338 adds r3, #56 ; 0x38
  14352. 8005f7e: f503 73f4 add.w r3, r3, #488 ; 0x1e8
  14353. 8005f82: 4618 mov r0, r3
  14354. 8005f84: f7fd ff59 bl 8003e3a <ld_dword>
  14355. 8005f88: 4602 mov r2, r0
  14356. 8005f8a: 6bbb ldr r3, [r7, #56] ; 0x38
  14357. 8005f8c: 619a str r2, [r3, #24]
  14358. #endif
  14359. #if (_FS_NOFSINFO & 2) == 0
  14360. fs->last_clst = ld_dword(fs->win + FSI_Nxt_Free);
  14361. 8005f8e: 6bbb ldr r3, [r7, #56] ; 0x38
  14362. 8005f90: 3338 adds r3, #56 ; 0x38
  14363. 8005f92: f503 73f6 add.w r3, r3, #492 ; 0x1ec
  14364. 8005f96: 4618 mov r0, r3
  14365. 8005f98: f7fd ff4f bl 8003e3a <ld_dword>
  14366. 8005f9c: 4602 mov r2, r0
  14367. 8005f9e: 6bbb ldr r3, [r7, #56] ; 0x38
  14368. 8005fa0: 615a str r2, [r3, #20]
  14369. }
  14370. #endif /* (_FS_NOFSINFO & 3) != 3 */
  14371. #endif /* !_FS_READONLY */
  14372. }
  14373. fs->fs_type = fmt; /* FAT sub-type */
  14374. 8005fa2: 6bbb ldr r3, [r7, #56] ; 0x38
  14375. 8005fa4: f897 2057 ldrb.w r2, [r7, #87] ; 0x57
  14376. 8005fa8: 701a strb r2, [r3, #0]
  14377. fs->id = ++Fsid; /* File system mount ID */
  14378. 8005faa: 4b0c ldr r3, [pc, #48] ; (8005fdc <find_volume+0x508>)
  14379. 8005fac: 881b ldrh r3, [r3, #0]
  14380. 8005fae: 3301 adds r3, #1
  14381. 8005fb0: b29a uxth r2, r3
  14382. 8005fb2: 4b0a ldr r3, [pc, #40] ; (8005fdc <find_volume+0x508>)
  14383. 8005fb4: 801a strh r2, [r3, #0]
  14384. 8005fb6: 4b09 ldr r3, [pc, #36] ; (8005fdc <find_volume+0x508>)
  14385. 8005fb8: 881a ldrh r2, [r3, #0]
  14386. 8005fba: 6bbb ldr r3, [r7, #56] ; 0x38
  14387. 8005fbc: 80da strh r2, [r3, #6]
  14388. #if _USE_LFN == 1
  14389. fs->lfnbuf = LfnBuf; /* Static LFN working buffer */
  14390. 8005fbe: 6bbb ldr r3, [r7, #56] ; 0x38
  14391. 8005fc0: 4a07 ldr r2, [pc, #28] ; (8005fe0 <find_volume+0x50c>)
  14392. 8005fc2: 611a str r2, [r3, #16]
  14393. #endif
  14394. #if _FS_RPATH != 0
  14395. fs->cdir = 0; /* Initialize current directory */
  14396. #endif
  14397. #if _FS_LOCK != 0 /* Clear file lock semaphores */
  14398. clear_lock(fs);
  14399. 8005fc4: 6bb8 ldr r0, [r7, #56] ; 0x38
  14400. 8005fc6: f7fe f95b bl 8004280 <clear_lock>
  14401. #endif
  14402. return FR_OK;
  14403. 8005fca: 2300 movs r3, #0
  14404. }
  14405. 8005fcc: 4618 mov r0, r3
  14406. 8005fce: 3758 adds r7, #88 ; 0x58
  14407. 8005fd0: 46bd mov sp, r7
  14408. 8005fd2: bd80 pop {r7, pc}
  14409. 8005fd4: 41615252 .word 0x41615252
  14410. 8005fd8: 61417272 .word 0x61417272
  14411. 8005fdc: 200000b0 .word 0x200000b0
  14412. 8005fe0: 200000d4 .word 0x200000d4
  14413. 08005fe4 <validate>:
  14414. static
  14415. FRESULT validate ( /* Returns FR_OK or FR_INVALID_OBJECT */
  14416. _FDID* obj, /* Pointer to the _OBJ, the 1st member in the FIL/DIR object, to check validity */
  14417. FATFS** fs /* Pointer to pointer to the owner file system object to return */
  14418. )
  14419. {
  14420. 8005fe4: b580 push {r7, lr}
  14421. 8005fe6: b084 sub sp, #16
  14422. 8005fe8: af00 add r7, sp, #0
  14423. 8005fea: 6078 str r0, [r7, #4]
  14424. 8005fec: 6039 str r1, [r7, #0]
  14425. FRESULT res = FR_INVALID_OBJECT;
  14426. 8005fee: 2309 movs r3, #9
  14427. 8005ff0: 73fb strb r3, [r7, #15]
  14428. if (obj && obj->fs && obj->fs->fs_type && obj->id == obj->fs->id) { /* Test if the object is valid */
  14429. 8005ff2: 687b ldr r3, [r7, #4]
  14430. 8005ff4: 2b00 cmp r3, #0
  14431. 8005ff6: d01c beq.n 8006032 <validate+0x4e>
  14432. 8005ff8: 687b ldr r3, [r7, #4]
  14433. 8005ffa: 681b ldr r3, [r3, #0]
  14434. 8005ffc: 2b00 cmp r3, #0
  14435. 8005ffe: d018 beq.n 8006032 <validate+0x4e>
  14436. 8006000: 687b ldr r3, [r7, #4]
  14437. 8006002: 681b ldr r3, [r3, #0]
  14438. 8006004: 781b ldrb r3, [r3, #0]
  14439. 8006006: 2b00 cmp r3, #0
  14440. 8006008: d013 beq.n 8006032 <validate+0x4e>
  14441. 800600a: 687b ldr r3, [r7, #4]
  14442. 800600c: 889a ldrh r2, [r3, #4]
  14443. 800600e: 687b ldr r3, [r7, #4]
  14444. 8006010: 681b ldr r3, [r3, #0]
  14445. 8006012: 88db ldrh r3, [r3, #6]
  14446. 8006014: 429a cmp r2, r3
  14447. 8006016: d10c bne.n 8006032 <validate+0x4e>
  14448. }
  14449. } else {
  14450. res = FR_TIMEOUT;
  14451. }
  14452. #else
  14453. if (!(disk_status(obj->fs->drv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */
  14454. 8006018: 687b ldr r3, [r7, #4]
  14455. 800601a: 681b ldr r3, [r3, #0]
  14456. 800601c: 785b ldrb r3, [r3, #1]
  14457. 800601e: 4618 mov r0, r3
  14458. 8006020: f7fd fe56 bl 8003cd0 <disk_status>
  14459. 8006024: 4603 mov r3, r0
  14460. 8006026: f003 0301 and.w r3, r3, #1
  14461. 800602a: 2b00 cmp r3, #0
  14462. 800602c: d101 bne.n 8006032 <validate+0x4e>
  14463. res = FR_OK;
  14464. 800602e: 2300 movs r3, #0
  14465. 8006030: 73fb strb r3, [r7, #15]
  14466. }
  14467. #endif
  14468. }
  14469. *fs = (res == FR_OK) ? obj->fs : 0; /* Corresponding filesystem object */
  14470. 8006032: 7bfb ldrb r3, [r7, #15]
  14471. 8006034: 2b00 cmp r3, #0
  14472. 8006036: d102 bne.n 800603e <validate+0x5a>
  14473. 8006038: 687b ldr r3, [r7, #4]
  14474. 800603a: 681b ldr r3, [r3, #0]
  14475. 800603c: e000 b.n 8006040 <validate+0x5c>
  14476. 800603e: 2300 movs r3, #0
  14477. 8006040: 683a ldr r2, [r7, #0]
  14478. 8006042: 6013 str r3, [r2, #0]
  14479. return res;
  14480. 8006044: 7bfb ldrb r3, [r7, #15]
  14481. }
  14482. 8006046: 4618 mov r0, r3
  14483. 8006048: 3710 adds r7, #16
  14484. 800604a: 46bd mov sp, r7
  14485. 800604c: bd80 pop {r7, pc}
  14486. ...
  14487. 08006050 <f_mount>:
  14488. FRESULT f_mount (
  14489. FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/
  14490. const TCHAR* path, /* Logical drive number to be mounted/unmounted */
  14491. BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */
  14492. )
  14493. {
  14494. 8006050: b580 push {r7, lr}
  14495. 8006052: b088 sub sp, #32
  14496. 8006054: af00 add r7, sp, #0
  14497. 8006056: 60f8 str r0, [r7, #12]
  14498. 8006058: 60b9 str r1, [r7, #8]
  14499. 800605a: 4613 mov r3, r2
  14500. 800605c: 71fb strb r3, [r7, #7]
  14501. FATFS *cfs;
  14502. int vol;
  14503. FRESULT res;
  14504. const TCHAR *rp = path;
  14505. 800605e: 68bb ldr r3, [r7, #8]
  14506. 8006060: 613b str r3, [r7, #16]
  14507. /* Get logical drive number */
  14508. vol = get_ldnumber(&rp);
  14509. 8006062: f107 0310 add.w r3, r7, #16
  14510. 8006066: 4618 mov r0, r3
  14511. 8006068: f7ff fc9a bl 80059a0 <get_ldnumber>
  14512. 800606c: 61f8 str r0, [r7, #28]
  14513. if (vol < 0) return FR_INVALID_DRIVE;
  14514. 800606e: 69fb ldr r3, [r7, #28]
  14515. 8006070: 2b00 cmp r3, #0
  14516. 8006072: da01 bge.n 8006078 <f_mount+0x28>
  14517. 8006074: 230b movs r3, #11
  14518. 8006076: e02b b.n 80060d0 <f_mount+0x80>
  14519. cfs = FatFs[vol]; /* Pointer to fs object */
  14520. 8006078: 4a17 ldr r2, [pc, #92] ; (80060d8 <f_mount+0x88>)
  14521. 800607a: 69fb ldr r3, [r7, #28]
  14522. 800607c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
  14523. 8006080: 61bb str r3, [r7, #24]
  14524. if (cfs) {
  14525. 8006082: 69bb ldr r3, [r7, #24]
  14526. 8006084: 2b00 cmp r3, #0
  14527. 8006086: d005 beq.n 8006094 <f_mount+0x44>
  14528. #if _FS_LOCK != 0
  14529. clear_lock(cfs);
  14530. 8006088: 69b8 ldr r0, [r7, #24]
  14531. 800608a: f7fe f8f9 bl 8004280 <clear_lock>
  14532. #endif
  14533. #if _FS_REENTRANT /* Discard sync object of the current volume */
  14534. if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR;
  14535. #endif
  14536. cfs->fs_type = 0; /* Clear old fs object */
  14537. 800608e: 69bb ldr r3, [r7, #24]
  14538. 8006090: 2200 movs r2, #0
  14539. 8006092: 701a strb r2, [r3, #0]
  14540. }
  14541. if (fs) {
  14542. 8006094: 68fb ldr r3, [r7, #12]
  14543. 8006096: 2b00 cmp r3, #0
  14544. 8006098: d002 beq.n 80060a0 <f_mount+0x50>
  14545. fs->fs_type = 0; /* Clear new fs object */
  14546. 800609a: 68fb ldr r3, [r7, #12]
  14547. 800609c: 2200 movs r2, #0
  14548. 800609e: 701a strb r2, [r3, #0]
  14549. #if _FS_REENTRANT /* Create sync object for the new volume */
  14550. if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR;
  14551. #endif
  14552. }
  14553. FatFs[vol] = fs; /* Register new fs object */
  14554. 80060a0: 68fa ldr r2, [r7, #12]
  14555. 80060a2: 490d ldr r1, [pc, #52] ; (80060d8 <f_mount+0x88>)
  14556. 80060a4: 69fb ldr r3, [r7, #28]
  14557. 80060a6: f841 2023 str.w r2, [r1, r3, lsl #2]
  14558. if (!fs || opt != 1) return FR_OK; /* Do not mount now, it will be mounted later */
  14559. 80060aa: 68fb ldr r3, [r7, #12]
  14560. 80060ac: 2b00 cmp r3, #0
  14561. 80060ae: d002 beq.n 80060b6 <f_mount+0x66>
  14562. 80060b0: 79fb ldrb r3, [r7, #7]
  14563. 80060b2: 2b01 cmp r3, #1
  14564. 80060b4: d001 beq.n 80060ba <f_mount+0x6a>
  14565. 80060b6: 2300 movs r3, #0
  14566. 80060b8: e00a b.n 80060d0 <f_mount+0x80>
  14567. res = find_volume(&path, &fs, 0); /* Force mounted the volume */
  14568. 80060ba: f107 010c add.w r1, r7, #12
  14569. 80060be: f107 0308 add.w r3, r7, #8
  14570. 80060c2: 2200 movs r2, #0
  14571. 80060c4: 4618 mov r0, r3
  14572. 80060c6: f7ff fd05 bl 8005ad4 <find_volume>
  14573. 80060ca: 4603 mov r3, r0
  14574. 80060cc: 75fb strb r3, [r7, #23]
  14575. LEAVE_FF(fs, res);
  14576. 80060ce: 7dfb ldrb r3, [r7, #23]
  14577. }
  14578. 80060d0: 4618 mov r0, r3
  14579. 80060d2: 3720 adds r7, #32
  14580. 80060d4: 46bd mov sp, r7
  14581. 80060d6: bd80 pop {r7, pc}
  14582. 80060d8: 200000ac .word 0x200000ac
  14583. 080060dc <f_open>:
  14584. FRESULT f_open (
  14585. FIL* fp, /* Pointer to the blank file object */
  14586. const TCHAR* path, /* Pointer to the file name */
  14587. BYTE mode /* Access mode and file open mode flags */
  14588. )
  14589. {
  14590. 80060dc: b580 push {r7, lr}
  14591. 80060de: b09a sub sp, #104 ; 0x68
  14592. 80060e0: af00 add r7, sp, #0
  14593. 80060e2: 60f8 str r0, [r7, #12]
  14594. 80060e4: 60b9 str r1, [r7, #8]
  14595. 80060e6: 4613 mov r3, r2
  14596. 80060e8: 71fb strb r3, [r7, #7]
  14597. FSIZE_t ofs;
  14598. #endif
  14599. DEF_NAMBUF
  14600. if (!fp) return FR_INVALID_OBJECT;
  14601. 80060ea: 68fb ldr r3, [r7, #12]
  14602. 80060ec: 2b00 cmp r3, #0
  14603. 80060ee: d101 bne.n 80060f4 <f_open+0x18>
  14604. 80060f0: 2309 movs r3, #9
  14605. 80060f2: e1bb b.n 800646c <f_open+0x390>
  14606. /* Get logical drive */
  14607. mode &= _FS_READONLY ? FA_READ : FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_CREATE_NEW | FA_OPEN_ALWAYS | FA_OPEN_APPEND | FA_SEEKEND;
  14608. 80060f4: 79fb ldrb r3, [r7, #7]
  14609. 80060f6: f003 033f and.w r3, r3, #63 ; 0x3f
  14610. 80060fa: 71fb strb r3, [r7, #7]
  14611. res = find_volume(&path, &fs, mode);
  14612. 80060fc: 79fa ldrb r2, [r7, #7]
  14613. 80060fe: f107 0114 add.w r1, r7, #20
  14614. 8006102: f107 0308 add.w r3, r7, #8
  14615. 8006106: 4618 mov r0, r3
  14616. 8006108: f7ff fce4 bl 8005ad4 <find_volume>
  14617. 800610c: 4603 mov r3, r0
  14618. 800610e: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14619. if (res == FR_OK) {
  14620. 8006112: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14621. 8006116: 2b00 cmp r3, #0
  14622. 8006118: f040 819f bne.w 800645a <f_open+0x37e>
  14623. dj.obj.fs = fs;
  14624. 800611c: 697b ldr r3, [r7, #20]
  14625. 800611e: 61bb str r3, [r7, #24]
  14626. INIT_NAMBUF(fs);
  14627. res = follow_path(&dj, path); /* Follow the file path */
  14628. 8006120: 68ba ldr r2, [r7, #8]
  14629. 8006122: f107 0318 add.w r3, r7, #24
  14630. 8006126: 4611 mov r1, r2
  14631. 8006128: 4618 mov r0, r3
  14632. 800612a: f7ff fbc3 bl 80058b4 <follow_path>
  14633. 800612e: 4603 mov r3, r0
  14634. 8006130: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14635. #if !_FS_READONLY /* R/W configuration */
  14636. if (res == FR_OK) {
  14637. 8006134: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14638. 8006138: 2b00 cmp r3, #0
  14639. 800613a: d11a bne.n 8006172 <f_open+0x96>
  14640. if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */
  14641. 800613c: f897 3047 ldrb.w r3, [r7, #71] ; 0x47
  14642. 8006140: b25b sxtb r3, r3
  14643. 8006142: 2b00 cmp r3, #0
  14644. 8006144: da03 bge.n 800614e <f_open+0x72>
  14645. res = FR_INVALID_NAME;
  14646. 8006146: 2306 movs r3, #6
  14647. 8006148: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14648. 800614c: e011 b.n 8006172 <f_open+0x96>
  14649. }
  14650. #if _FS_LOCK != 0
  14651. else {
  14652. res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
  14653. 800614e: 79fb ldrb r3, [r7, #7]
  14654. 8006150: f023 0301 bic.w r3, r3, #1
  14655. 8006154: 2b00 cmp r3, #0
  14656. 8006156: bf14 ite ne
  14657. 8006158: 2301 movne r3, #1
  14658. 800615a: 2300 moveq r3, #0
  14659. 800615c: b2db uxtb r3, r3
  14660. 800615e: 461a mov r2, r3
  14661. 8006160: f107 0318 add.w r3, r7, #24
  14662. 8006164: 4611 mov r1, r2
  14663. 8006166: 4618 mov r0, r3
  14664. 8006168: f7fd ff48 bl 8003ffc <chk_lock>
  14665. 800616c: 4603 mov r3, r0
  14666. 800616e: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14667. }
  14668. #endif
  14669. }
  14670. /* Create or Open a file */
  14671. if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
  14672. 8006172: 79fb ldrb r3, [r7, #7]
  14673. 8006174: f003 031c and.w r3, r3, #28
  14674. 8006178: 2b00 cmp r3, #0
  14675. 800617a: d07f beq.n 800627c <f_open+0x1a0>
  14676. if (res != FR_OK) { /* No file, create new */
  14677. 800617c: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14678. 8006180: 2b00 cmp r3, #0
  14679. 8006182: d017 beq.n 80061b4 <f_open+0xd8>
  14680. if (res == FR_NO_FILE) { /* There is no file to open, create a new entry */
  14681. 8006184: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14682. 8006188: 2b04 cmp r3, #4
  14683. 800618a: d10e bne.n 80061aa <f_open+0xce>
  14684. #if _FS_LOCK != 0
  14685. res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;
  14686. 800618c: f7fd ff90 bl 80040b0 <enq_lock>
  14687. 8006190: 4603 mov r3, r0
  14688. 8006192: 2b00 cmp r3, #0
  14689. 8006194: d006 beq.n 80061a4 <f_open+0xc8>
  14690. 8006196: f107 0318 add.w r3, r7, #24
  14691. 800619a: 4618 mov r0, r3
  14692. 800619c: f7ff f8da bl 8005354 <dir_register>
  14693. 80061a0: 4603 mov r3, r0
  14694. 80061a2: e000 b.n 80061a6 <f_open+0xca>
  14695. 80061a4: 2312 movs r3, #18
  14696. 80061a6: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14697. #else
  14698. res = dir_register(&dj);
  14699. #endif
  14700. }
  14701. mode |= FA_CREATE_ALWAYS; /* File is created */
  14702. 80061aa: 79fb ldrb r3, [r7, #7]
  14703. 80061ac: f043 0308 orr.w r3, r3, #8
  14704. 80061b0: 71fb strb r3, [r7, #7]
  14705. 80061b2: e010 b.n 80061d6 <f_open+0xfa>
  14706. }
  14707. else { /* Any object is already existing */
  14708. if (dj.obj.attr & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */
  14709. 80061b4: 7fbb ldrb r3, [r7, #30]
  14710. 80061b6: f003 0311 and.w r3, r3, #17
  14711. 80061ba: 2b00 cmp r3, #0
  14712. 80061bc: d003 beq.n 80061c6 <f_open+0xea>
  14713. res = FR_DENIED;
  14714. 80061be: 2307 movs r3, #7
  14715. 80061c0: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14716. 80061c4: e007 b.n 80061d6 <f_open+0xfa>
  14717. } else {
  14718. if (mode & FA_CREATE_NEW) res = FR_EXIST; /* Cannot create as new file */
  14719. 80061c6: 79fb ldrb r3, [r7, #7]
  14720. 80061c8: f003 0304 and.w r3, r3, #4
  14721. 80061cc: 2b00 cmp r3, #0
  14722. 80061ce: d002 beq.n 80061d6 <f_open+0xfa>
  14723. 80061d0: 2308 movs r3, #8
  14724. 80061d2: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14725. }
  14726. }
  14727. if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate it if overwrite mode */
  14728. 80061d6: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14729. 80061da: 2b00 cmp r3, #0
  14730. 80061dc: d168 bne.n 80062b0 <f_open+0x1d4>
  14731. 80061de: 79fb ldrb r3, [r7, #7]
  14732. 80061e0: f003 0308 and.w r3, r3, #8
  14733. 80061e4: 2b00 cmp r3, #0
  14734. 80061e6: d063 beq.n 80062b0 <f_open+0x1d4>
  14735. dw = GET_FATTIME();
  14736. 80061e8: f7fd fd16 bl 8003c18 <get_fattime>
  14737. 80061ec: 65b8 str r0, [r7, #88] ; 0x58
  14738. }
  14739. } else
  14740. #endif
  14741. {
  14742. /* Clean directory info */
  14743. st_dword(dj.dir + DIR_CrtTime, dw); /* Set created time */
  14744. 80061ee: 6bbb ldr r3, [r7, #56] ; 0x38
  14745. 80061f0: 330e adds r3, #14
  14746. 80061f2: 6db9 ldr r1, [r7, #88] ; 0x58
  14747. 80061f4: 4618 mov r0, r3
  14748. 80061f6: f7fd fe5c bl 8003eb2 <st_dword>
  14749. st_dword(dj.dir + DIR_ModTime, dw); /* Set modified time */
  14750. 80061fa: 6bbb ldr r3, [r7, #56] ; 0x38
  14751. 80061fc: 3316 adds r3, #22
  14752. 80061fe: 6db9 ldr r1, [r7, #88] ; 0x58
  14753. 8006200: 4618 mov r0, r3
  14754. 8006202: f7fd fe56 bl 8003eb2 <st_dword>
  14755. dj.dir[DIR_Attr] = AM_ARC; /* Reset attribute */
  14756. 8006206: 6bbb ldr r3, [r7, #56] ; 0x38
  14757. 8006208: 330b adds r3, #11
  14758. 800620a: 2220 movs r2, #32
  14759. 800620c: 701a strb r2, [r3, #0]
  14760. cl = ld_clust(fs, dj.dir); /* Get cluster chain */
  14761. 800620e: 697b ldr r3, [r7, #20]
  14762. 8006210: 6bba ldr r2, [r7, #56] ; 0x38
  14763. 8006212: 4611 mov r1, r2
  14764. 8006214: 4618 mov r0, r3
  14765. 8006216: f7fe fe16 bl 8004e46 <ld_clust>
  14766. 800621a: 6578 str r0, [r7, #84] ; 0x54
  14767. st_clust(fs, dj.dir, 0); /* Reset file allocation info */
  14768. 800621c: 697b ldr r3, [r7, #20]
  14769. 800621e: 6bb9 ldr r1, [r7, #56] ; 0x38
  14770. 8006220: 2200 movs r2, #0
  14771. 8006222: 4618 mov r0, r3
  14772. 8006224: f7fe fe2e bl 8004e84 <st_clust>
  14773. st_dword(dj.dir + DIR_FileSize, 0);
  14774. 8006228: 6bbb ldr r3, [r7, #56] ; 0x38
  14775. 800622a: 331c adds r3, #28
  14776. 800622c: 2100 movs r1, #0
  14777. 800622e: 4618 mov r0, r3
  14778. 8006230: f7fd fe3f bl 8003eb2 <st_dword>
  14779. fs->wflag = 1;
  14780. 8006234: 697b ldr r3, [r7, #20]
  14781. 8006236: 2201 movs r2, #1
  14782. 8006238: 70da strb r2, [r3, #3]
  14783. if (cl) { /* Remove the cluster chain if exist */
  14784. 800623a: 6d7b ldr r3, [r7, #84] ; 0x54
  14785. 800623c: 2b00 cmp r3, #0
  14786. 800623e: d037 beq.n 80062b0 <f_open+0x1d4>
  14787. dw = fs->winsect;
  14788. 8006240: 697b ldr r3, [r7, #20]
  14789. 8006242: 6b5b ldr r3, [r3, #52] ; 0x34
  14790. 8006244: 65bb str r3, [r7, #88] ; 0x58
  14791. res = remove_chain(&dj.obj, cl, 0);
  14792. 8006246: f107 0318 add.w r3, r7, #24
  14793. 800624a: 2200 movs r2, #0
  14794. 800624c: 6d79 ldr r1, [r7, #84] ; 0x54
  14795. 800624e: 4618 mov r0, r3
  14796. 8006250: f7fe fb1f bl 8004892 <remove_chain>
  14797. 8006254: 4603 mov r3, r0
  14798. 8006256: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14799. if (res == FR_OK) {
  14800. 800625a: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14801. 800625e: 2b00 cmp r3, #0
  14802. 8006260: d126 bne.n 80062b0 <f_open+0x1d4>
  14803. res = move_window(fs, dw);
  14804. 8006262: 697b ldr r3, [r7, #20]
  14805. 8006264: 6db9 ldr r1, [r7, #88] ; 0x58
  14806. 8006266: 4618 mov r0, r3
  14807. 8006268: f7fe f870 bl 800434c <move_window>
  14808. 800626c: 4603 mov r3, r0
  14809. 800626e: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14810. fs->last_clst = cl - 1; /* Reuse the cluster hole */
  14811. 8006272: 697b ldr r3, [r7, #20]
  14812. 8006274: 6d7a ldr r2, [r7, #84] ; 0x54
  14813. 8006276: 3a01 subs r2, #1
  14814. 8006278: 615a str r2, [r3, #20]
  14815. 800627a: e019 b.n 80062b0 <f_open+0x1d4>
  14816. }
  14817. }
  14818. }
  14819. }
  14820. else { /* Open an existing file */
  14821. if (res == FR_OK) { /* Following succeeded */
  14822. 800627c: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14823. 8006280: 2b00 cmp r3, #0
  14824. 8006282: d115 bne.n 80062b0 <f_open+0x1d4>
  14825. if (dj.obj.attr & AM_DIR) { /* It is a directory */
  14826. 8006284: 7fbb ldrb r3, [r7, #30]
  14827. 8006286: f003 0310 and.w r3, r3, #16
  14828. 800628a: 2b00 cmp r3, #0
  14829. 800628c: d003 beq.n 8006296 <f_open+0x1ba>
  14830. res = FR_NO_FILE;
  14831. 800628e: 2304 movs r3, #4
  14832. 8006290: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14833. 8006294: e00c b.n 80062b0 <f_open+0x1d4>
  14834. } else {
  14835. if ((mode & FA_WRITE) && (dj.obj.attr & AM_RDO)) { /* R/O violation */
  14836. 8006296: 79fb ldrb r3, [r7, #7]
  14837. 8006298: f003 0302 and.w r3, r3, #2
  14838. 800629c: 2b00 cmp r3, #0
  14839. 800629e: d007 beq.n 80062b0 <f_open+0x1d4>
  14840. 80062a0: 7fbb ldrb r3, [r7, #30]
  14841. 80062a2: f003 0301 and.w r3, r3, #1
  14842. 80062a6: 2b00 cmp r3, #0
  14843. 80062a8: d002 beq.n 80062b0 <f_open+0x1d4>
  14844. res = FR_DENIED;
  14845. 80062aa: 2307 movs r3, #7
  14846. 80062ac: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14847. }
  14848. }
  14849. }
  14850. }
  14851. if (res == FR_OK) {
  14852. 80062b0: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14853. 80062b4: 2b00 cmp r3, #0
  14854. 80062b6: d128 bne.n 800630a <f_open+0x22e>
  14855. if (mode & FA_CREATE_ALWAYS) /* Set file change flag if created or overwritten */
  14856. 80062b8: 79fb ldrb r3, [r7, #7]
  14857. 80062ba: f003 0308 and.w r3, r3, #8
  14858. 80062be: 2b00 cmp r3, #0
  14859. 80062c0: d003 beq.n 80062ca <f_open+0x1ee>
  14860. mode |= FA_MODIFIED;
  14861. 80062c2: 79fb ldrb r3, [r7, #7]
  14862. 80062c4: f043 0340 orr.w r3, r3, #64 ; 0x40
  14863. 80062c8: 71fb strb r3, [r7, #7]
  14864. fp->dir_sect = fs->winsect; /* Pointer to the directory entry */
  14865. 80062ca: 697b ldr r3, [r7, #20]
  14866. 80062cc: 6b5a ldr r2, [r3, #52] ; 0x34
  14867. 80062ce: 68fb ldr r3, [r7, #12]
  14868. 80062d0: 625a str r2, [r3, #36] ; 0x24
  14869. fp->dir_ptr = dj.dir;
  14870. 80062d2: 6bba ldr r2, [r7, #56] ; 0x38
  14871. 80062d4: 68fb ldr r3, [r7, #12]
  14872. 80062d6: 629a str r2, [r3, #40] ; 0x28
  14873. #if _FS_LOCK != 0
  14874. fp->obj.lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
  14875. 80062d8: 79fb ldrb r3, [r7, #7]
  14876. 80062da: f023 0301 bic.w r3, r3, #1
  14877. 80062de: 2b00 cmp r3, #0
  14878. 80062e0: bf14 ite ne
  14879. 80062e2: 2301 movne r3, #1
  14880. 80062e4: 2300 moveq r3, #0
  14881. 80062e6: b2db uxtb r3, r3
  14882. 80062e8: 461a mov r2, r3
  14883. 80062ea: f107 0318 add.w r3, r7, #24
  14884. 80062ee: 4611 mov r1, r2
  14885. 80062f0: 4618 mov r0, r3
  14886. 80062f2: f7fd fefd bl 80040f0 <inc_lock>
  14887. 80062f6: 4602 mov r2, r0
  14888. 80062f8: 68fb ldr r3, [r7, #12]
  14889. 80062fa: 611a str r2, [r3, #16]
  14890. if (!fp->obj.lockid) res = FR_INT_ERR;
  14891. 80062fc: 68fb ldr r3, [r7, #12]
  14892. 80062fe: 691b ldr r3, [r3, #16]
  14893. 8006300: 2b00 cmp r3, #0
  14894. 8006302: d102 bne.n 800630a <f_open+0x22e>
  14895. 8006304: 2302 movs r3, #2
  14896. 8006306: f887 3067 strb.w r3, [r7, #103] ; 0x67
  14897. }
  14898. }
  14899. }
  14900. #endif
  14901. if (res == FR_OK) {
  14902. 800630a: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  14903. 800630e: 2b00 cmp r3, #0
  14904. 8006310: f040 80a3 bne.w 800645a <f_open+0x37e>
  14905. fp->obj.objsize = ld_qword(fs->dirbuf + XDIR_FileSize);
  14906. fp->obj.stat = fs->dirbuf[XDIR_GenFlags] & 2;
  14907. } else
  14908. #endif
  14909. {
  14910. fp->obj.sclust = ld_clust(fs, dj.dir); /* Get object allocation info */
  14911. 8006314: 697b ldr r3, [r7, #20]
  14912. 8006316: 6bba ldr r2, [r7, #56] ; 0x38
  14913. 8006318: 4611 mov r1, r2
  14914. 800631a: 4618 mov r0, r3
  14915. 800631c: f7fe fd93 bl 8004e46 <ld_clust>
  14916. 8006320: 4602 mov r2, r0
  14917. 8006322: 68fb ldr r3, [r7, #12]
  14918. 8006324: 609a str r2, [r3, #8]
  14919. fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
  14920. 8006326: 6bbb ldr r3, [r7, #56] ; 0x38
  14921. 8006328: 331c adds r3, #28
  14922. 800632a: 4618 mov r0, r3
  14923. 800632c: f7fd fd85 bl 8003e3a <ld_dword>
  14924. 8006330: 4602 mov r2, r0
  14925. 8006332: 68fb ldr r3, [r7, #12]
  14926. 8006334: 60da str r2, [r3, #12]
  14927. }
  14928. #if _USE_FASTSEEK
  14929. fp->cltbl = 0; /* Disable fast seek mode */
  14930. 8006336: 68fb ldr r3, [r7, #12]
  14931. 8006338: 2200 movs r2, #0
  14932. 800633a: 62da str r2, [r3, #44] ; 0x2c
  14933. #endif
  14934. fp->obj.fs = fs; /* Validate the file object */
  14935. 800633c: 697a ldr r2, [r7, #20]
  14936. 800633e: 68fb ldr r3, [r7, #12]
  14937. 8006340: 601a str r2, [r3, #0]
  14938. fp->obj.id = fs->id;
  14939. 8006342: 697b ldr r3, [r7, #20]
  14940. 8006344: 88da ldrh r2, [r3, #6]
  14941. 8006346: 68fb ldr r3, [r7, #12]
  14942. 8006348: 809a strh r2, [r3, #4]
  14943. fp->flag = mode; /* Set file access mode */
  14944. 800634a: 68fb ldr r3, [r7, #12]
  14945. 800634c: 79fa ldrb r2, [r7, #7]
  14946. 800634e: 751a strb r2, [r3, #20]
  14947. fp->err = 0; /* Clear error flag */
  14948. 8006350: 68fb ldr r3, [r7, #12]
  14949. 8006352: 2200 movs r2, #0
  14950. 8006354: 755a strb r2, [r3, #21]
  14951. fp->sect = 0; /* Invalidate current data sector */
  14952. 8006356: 68fb ldr r3, [r7, #12]
  14953. 8006358: 2200 movs r2, #0
  14954. 800635a: 621a str r2, [r3, #32]
  14955. fp->fptr = 0; /* Set file pointer top of the file */
  14956. 800635c: 68fb ldr r3, [r7, #12]
  14957. 800635e: 2200 movs r2, #0
  14958. 8006360: 619a str r2, [r3, #24]
  14959. #if !_FS_READONLY
  14960. #if !_FS_TINY
  14961. mem_set(fp->buf, 0, _MAX_SS); /* Clear sector buffer */
  14962. 8006362: 68fb ldr r3, [r7, #12]
  14963. 8006364: 3330 adds r3, #48 ; 0x30
  14964. 8006366: f44f 5280 mov.w r2, #4096 ; 0x1000
  14965. 800636a: 2100 movs r1, #0
  14966. 800636c: 4618 mov r0, r3
  14967. 800636e: f7fd fdeb bl 8003f48 <mem_set>
  14968. #endif
  14969. if ((mode & FA_SEEKEND) && fp->obj.objsize > 0) { /* Seek to end of file if FA_OPEN_APPEND is specified */
  14970. 8006372: 79fb ldrb r3, [r7, #7]
  14971. 8006374: f003 0320 and.w r3, r3, #32
  14972. 8006378: 2b00 cmp r3, #0
  14973. 800637a: d06e beq.n 800645a <f_open+0x37e>
  14974. 800637c: 68fb ldr r3, [r7, #12]
  14975. 800637e: 68db ldr r3, [r3, #12]
  14976. 8006380: 2b00 cmp r3, #0
  14977. 8006382: d06a beq.n 800645a <f_open+0x37e>
  14978. fp->fptr = fp->obj.objsize; /* Offset to seek */
  14979. 8006384: 68fb ldr r3, [r7, #12]
  14980. 8006386: 68da ldr r2, [r3, #12]
  14981. 8006388: 68fb ldr r3, [r7, #12]
  14982. 800638a: 619a str r2, [r3, #24]
  14983. bcs = (DWORD)fs->csize * SS(fs); /* Cluster size in byte */
  14984. 800638c: 697b ldr r3, [r7, #20]
  14985. 800638e: 895b ldrh r3, [r3, #10]
  14986. 8006390: 461a mov r2, r3
  14987. 8006392: 697b ldr r3, [r7, #20]
  14988. 8006394: 899b ldrh r3, [r3, #12]
  14989. 8006396: fb03 f302 mul.w r3, r3, r2
  14990. 800639a: 653b str r3, [r7, #80] ; 0x50
  14991. clst = fp->obj.sclust; /* Follow the cluster chain */
  14992. 800639c: 68fb ldr r3, [r7, #12]
  14993. 800639e: 689b ldr r3, [r3, #8]
  14994. 80063a0: 663b str r3, [r7, #96] ; 0x60
  14995. for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) {
  14996. 80063a2: 68fb ldr r3, [r7, #12]
  14997. 80063a4: 68db ldr r3, [r3, #12]
  14998. 80063a6: 65fb str r3, [r7, #92] ; 0x5c
  14999. 80063a8: e016 b.n 80063d8 <f_open+0x2fc>
  15000. clst = get_fat(&fp->obj, clst);
  15001. 80063aa: 68fb ldr r3, [r7, #12]
  15002. 80063ac: 6e39 ldr r1, [r7, #96] ; 0x60
  15003. 80063ae: 4618 mov r0, r3
  15004. 80063b0: f7fe f888 bl 80044c4 <get_fat>
  15005. 80063b4: 6638 str r0, [r7, #96] ; 0x60
  15006. if (clst <= 1) res = FR_INT_ERR;
  15007. 80063b6: 6e3b ldr r3, [r7, #96] ; 0x60
  15008. 80063b8: 2b01 cmp r3, #1
  15009. 80063ba: d802 bhi.n 80063c2 <f_open+0x2e6>
  15010. 80063bc: 2302 movs r3, #2
  15011. 80063be: f887 3067 strb.w r3, [r7, #103] ; 0x67
  15012. if (clst == 0xFFFFFFFF) res = FR_DISK_ERR;
  15013. 80063c2: 6e3b ldr r3, [r7, #96] ; 0x60
  15014. 80063c4: f1b3 3fff cmp.w r3, #4294967295
  15015. 80063c8: d102 bne.n 80063d0 <f_open+0x2f4>
  15016. 80063ca: 2301 movs r3, #1
  15017. 80063cc: f887 3067 strb.w r3, [r7, #103] ; 0x67
  15018. for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) {
  15019. 80063d0: 6dfa ldr r2, [r7, #92] ; 0x5c
  15020. 80063d2: 6d3b ldr r3, [r7, #80] ; 0x50
  15021. 80063d4: 1ad3 subs r3, r2, r3
  15022. 80063d6: 65fb str r3, [r7, #92] ; 0x5c
  15023. 80063d8: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  15024. 80063dc: 2b00 cmp r3, #0
  15025. 80063de: d103 bne.n 80063e8 <f_open+0x30c>
  15026. 80063e0: 6dfa ldr r2, [r7, #92] ; 0x5c
  15027. 80063e2: 6d3b ldr r3, [r7, #80] ; 0x50
  15028. 80063e4: 429a cmp r2, r3
  15029. 80063e6: d8e0 bhi.n 80063aa <f_open+0x2ce>
  15030. }
  15031. fp->clust = clst;
  15032. 80063e8: 68fb ldr r3, [r7, #12]
  15033. 80063ea: 6e3a ldr r2, [r7, #96] ; 0x60
  15034. 80063ec: 61da str r2, [r3, #28]
  15035. if (res == FR_OK && ofs % SS(fs)) { /* Fill sector buffer if not on the sector boundary */
  15036. 80063ee: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  15037. 80063f2: 2b00 cmp r3, #0
  15038. 80063f4: d131 bne.n 800645a <f_open+0x37e>
  15039. 80063f6: 697b ldr r3, [r7, #20]
  15040. 80063f8: 899b ldrh r3, [r3, #12]
  15041. 80063fa: 461a mov r2, r3
  15042. 80063fc: 6dfb ldr r3, [r7, #92] ; 0x5c
  15043. 80063fe: fbb3 f1f2 udiv r1, r3, r2
  15044. 8006402: fb02 f201 mul.w r2, r2, r1
  15045. 8006406: 1a9b subs r3, r3, r2
  15046. 8006408: 2b00 cmp r3, #0
  15047. 800640a: d026 beq.n 800645a <f_open+0x37e>
  15048. if ((sc = clust2sect(fs, clst)) == 0) {
  15049. 800640c: 697b ldr r3, [r7, #20]
  15050. 800640e: 6e39 ldr r1, [r7, #96] ; 0x60
  15051. 8006410: 4618 mov r0, r3
  15052. 8006412: f7fe f839 bl 8004488 <clust2sect>
  15053. 8006416: 64f8 str r0, [r7, #76] ; 0x4c
  15054. 8006418: 6cfb ldr r3, [r7, #76] ; 0x4c
  15055. 800641a: 2b00 cmp r3, #0
  15056. 800641c: d103 bne.n 8006426 <f_open+0x34a>
  15057. res = FR_INT_ERR;
  15058. 800641e: 2302 movs r3, #2
  15059. 8006420: f887 3067 strb.w r3, [r7, #103] ; 0x67
  15060. 8006424: e019 b.n 800645a <f_open+0x37e>
  15061. } else {
  15062. fp->sect = sc + (DWORD)(ofs / SS(fs));
  15063. 8006426: 697b ldr r3, [r7, #20]
  15064. 8006428: 899b ldrh r3, [r3, #12]
  15065. 800642a: 461a mov r2, r3
  15066. 800642c: 6dfb ldr r3, [r7, #92] ; 0x5c
  15067. 800642e: fbb3 f2f2 udiv r2, r3, r2
  15068. 8006432: 6cfb ldr r3, [r7, #76] ; 0x4c
  15069. 8006434: 441a add r2, r3
  15070. 8006436: 68fb ldr r3, [r7, #12]
  15071. 8006438: 621a str r2, [r3, #32]
  15072. #if !_FS_TINY
  15073. if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR;
  15074. 800643a: 697b ldr r3, [r7, #20]
  15075. 800643c: 7858 ldrb r0, [r3, #1]
  15076. 800643e: 68fb ldr r3, [r7, #12]
  15077. 8006440: f103 0130 add.w r1, r3, #48 ; 0x30
  15078. 8006444: 68fb ldr r3, [r7, #12]
  15079. 8006446: 6a1a ldr r2, [r3, #32]
  15080. 8006448: 2301 movs r3, #1
  15081. 800644a: f7fd fc81 bl 8003d50 <disk_read>
  15082. 800644e: 4603 mov r3, r0
  15083. 8006450: 2b00 cmp r3, #0
  15084. 8006452: d002 beq.n 800645a <f_open+0x37e>
  15085. 8006454: 2301 movs r3, #1
  15086. 8006456: f887 3067 strb.w r3, [r7, #103] ; 0x67
  15087. }
  15088. FREE_NAMBUF();
  15089. }
  15090. if (res != FR_OK) fp->obj.fs = 0; /* Invalidate file object on error */
  15091. 800645a: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  15092. 800645e: 2b00 cmp r3, #0
  15093. 8006460: d002 beq.n 8006468 <f_open+0x38c>
  15094. 8006462: 68fb ldr r3, [r7, #12]
  15095. 8006464: 2200 movs r2, #0
  15096. 8006466: 601a str r2, [r3, #0]
  15097. LEAVE_FF(fs, res);
  15098. 8006468: f897 3067 ldrb.w r3, [r7, #103] ; 0x67
  15099. }
  15100. 800646c: 4618 mov r0, r3
  15101. 800646e: 3768 adds r7, #104 ; 0x68
  15102. 8006470: 46bd mov sp, r7
  15103. 8006472: bd80 pop {r7, pc}
  15104. 08006474 <f_read>:
  15105. FIL* fp, /* Pointer to the file object */
  15106. void* buff, /* Pointer to data buffer */
  15107. UINT btr, /* Number of bytes to read */
  15108. UINT* br /* Pointer to number of bytes read */
  15109. )
  15110. {
  15111. 8006474: b580 push {r7, lr}
  15112. 8006476: b08e sub sp, #56 ; 0x38
  15113. 8006478: af00 add r7, sp, #0
  15114. 800647a: 60f8 str r0, [r7, #12]
  15115. 800647c: 60b9 str r1, [r7, #8]
  15116. 800647e: 607a str r2, [r7, #4]
  15117. 8006480: 603b str r3, [r7, #0]
  15118. FRESULT res;
  15119. FATFS *fs;
  15120. DWORD clst, sect;
  15121. FSIZE_t remain;
  15122. UINT rcnt, cc, csect;
  15123. BYTE *rbuff = (BYTE*)buff;
  15124. 8006482: 68bb ldr r3, [r7, #8]
  15125. 8006484: 627b str r3, [r7, #36] ; 0x24
  15126. *br = 0; /* Clear read byte counter */
  15127. 8006486: 683b ldr r3, [r7, #0]
  15128. 8006488: 2200 movs r2, #0
  15129. 800648a: 601a str r2, [r3, #0]
  15130. res = validate(&fp->obj, &fs); /* Check validity of the file object */
  15131. 800648c: 68fb ldr r3, [r7, #12]
  15132. 800648e: f107 0214 add.w r2, r7, #20
  15133. 8006492: 4611 mov r1, r2
  15134. 8006494: 4618 mov r0, r3
  15135. 8006496: f7ff fda5 bl 8005fe4 <validate>
  15136. 800649a: 4603 mov r3, r0
  15137. 800649c: f887 3037 strb.w r3, [r7, #55] ; 0x37
  15138. if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */
  15139. 80064a0: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
  15140. 80064a4: 2b00 cmp r3, #0
  15141. 80064a6: d107 bne.n 80064b8 <f_read+0x44>
  15142. 80064a8: 68fb ldr r3, [r7, #12]
  15143. 80064aa: 7d5b ldrb r3, [r3, #21]
  15144. 80064ac: f887 3037 strb.w r3, [r7, #55] ; 0x37
  15145. 80064b0: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
  15146. 80064b4: 2b00 cmp r3, #0
  15147. 80064b6: d002 beq.n 80064be <f_read+0x4a>
  15148. 80064b8: f897 3037 ldrb.w r3, [r7, #55] ; 0x37
  15149. 80064bc: e135 b.n 800672a <f_read+0x2b6>
  15150. if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
  15151. 80064be: 68fb ldr r3, [r7, #12]
  15152. 80064c0: 7d1b ldrb r3, [r3, #20]
  15153. 80064c2: f003 0301 and.w r3, r3, #1
  15154. 80064c6: 2b00 cmp r3, #0
  15155. 80064c8: d101 bne.n 80064ce <f_read+0x5a>
  15156. 80064ca: 2307 movs r3, #7
  15157. 80064cc: e12d b.n 800672a <f_read+0x2b6>
  15158. remain = fp->obj.objsize - fp->fptr;
  15159. 80064ce: 68fb ldr r3, [r7, #12]
  15160. 80064d0: 68da ldr r2, [r3, #12]
  15161. 80064d2: 68fb ldr r3, [r7, #12]
  15162. 80064d4: 699b ldr r3, [r3, #24]
  15163. 80064d6: 1ad3 subs r3, r2, r3
  15164. 80064d8: 623b str r3, [r7, #32]
  15165. if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */
  15166. 80064da: 687a ldr r2, [r7, #4]
  15167. 80064dc: 6a3b ldr r3, [r7, #32]
  15168. 80064de: 429a cmp r2, r3
  15169. 80064e0: f240 811e bls.w 8006720 <f_read+0x2ac>
  15170. 80064e4: 6a3b ldr r3, [r7, #32]
  15171. 80064e6: 607b str r3, [r7, #4]
  15172. for ( ; btr; /* Repeat until all data read */
  15173. 80064e8: e11a b.n 8006720 <f_read+0x2ac>
  15174. rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
  15175. if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
  15176. 80064ea: 68fb ldr r3, [r7, #12]
  15177. 80064ec: 699b ldr r3, [r3, #24]
  15178. 80064ee: 697a ldr r2, [r7, #20]
  15179. 80064f0: 8992 ldrh r2, [r2, #12]
  15180. 80064f2: fbb3 f1f2 udiv r1, r3, r2
  15181. 80064f6: fb02 f201 mul.w r2, r2, r1
  15182. 80064fa: 1a9b subs r3, r3, r2
  15183. 80064fc: 2b00 cmp r3, #0
  15184. 80064fe: f040 80d5 bne.w 80066ac <f_read+0x238>
  15185. csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */
  15186. 8006502: 68fb ldr r3, [r7, #12]
  15187. 8006504: 699b ldr r3, [r3, #24]
  15188. 8006506: 697a ldr r2, [r7, #20]
  15189. 8006508: 8992 ldrh r2, [r2, #12]
  15190. 800650a: fbb3 f3f2 udiv r3, r3, r2
  15191. 800650e: 697a ldr r2, [r7, #20]
  15192. 8006510: 8952 ldrh r2, [r2, #10]
  15193. 8006512: 3a01 subs r2, #1
  15194. 8006514: 4013 ands r3, r2
  15195. 8006516: 61fb str r3, [r7, #28]
  15196. if (csect == 0) { /* On the cluster boundary? */
  15197. 8006518: 69fb ldr r3, [r7, #28]
  15198. 800651a: 2b00 cmp r3, #0
  15199. 800651c: d12f bne.n 800657e <f_read+0x10a>
  15200. if (fp->fptr == 0) { /* On the top of the file? */
  15201. 800651e: 68fb ldr r3, [r7, #12]
  15202. 8006520: 699b ldr r3, [r3, #24]
  15203. 8006522: 2b00 cmp r3, #0
  15204. 8006524: d103 bne.n 800652e <f_read+0xba>
  15205. clst = fp->obj.sclust; /* Follow cluster chain from the origin */
  15206. 8006526: 68fb ldr r3, [r7, #12]
  15207. 8006528: 689b ldr r3, [r3, #8]
  15208. 800652a: 633b str r3, [r7, #48] ; 0x30
  15209. 800652c: e013 b.n 8006556 <f_read+0xe2>
  15210. } else { /* Middle or end of the file */
  15211. #if _USE_FASTSEEK
  15212. if (fp->cltbl) {
  15213. 800652e: 68fb ldr r3, [r7, #12]
  15214. 8006530: 6adb ldr r3, [r3, #44] ; 0x2c
  15215. 8006532: 2b00 cmp r3, #0
  15216. 8006534: d007 beq.n 8006546 <f_read+0xd2>
  15217. clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
  15218. 8006536: 68fb ldr r3, [r7, #12]
  15219. 8006538: 699b ldr r3, [r3, #24]
  15220. 800653a: 4619 mov r1, r3
  15221. 800653c: 68f8 ldr r0, [r7, #12]
  15222. 800653e: f7fe faa5 bl 8004a8c <clmt_clust>
  15223. 8006542: 6338 str r0, [r7, #48] ; 0x30
  15224. 8006544: e007 b.n 8006556 <f_read+0xe2>
  15225. } else
  15226. #endif
  15227. {
  15228. clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */
  15229. 8006546: 68fa ldr r2, [r7, #12]
  15230. 8006548: 68fb ldr r3, [r7, #12]
  15231. 800654a: 69db ldr r3, [r3, #28]
  15232. 800654c: 4619 mov r1, r3
  15233. 800654e: 4610 mov r0, r2
  15234. 8006550: f7fd ffb8 bl 80044c4 <get_fat>
  15235. 8006554: 6338 str r0, [r7, #48] ; 0x30
  15236. }
  15237. }
  15238. if (clst < 2) ABORT(fs, FR_INT_ERR);
  15239. 8006556: 6b3b ldr r3, [r7, #48] ; 0x30
  15240. 8006558: 2b01 cmp r3, #1
  15241. 800655a: d804 bhi.n 8006566 <f_read+0xf2>
  15242. 800655c: 68fb ldr r3, [r7, #12]
  15243. 800655e: 2202 movs r2, #2
  15244. 8006560: 755a strb r2, [r3, #21]
  15245. 8006562: 2302 movs r3, #2
  15246. 8006564: e0e1 b.n 800672a <f_read+0x2b6>
  15247. if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
  15248. 8006566: 6b3b ldr r3, [r7, #48] ; 0x30
  15249. 8006568: f1b3 3fff cmp.w r3, #4294967295
  15250. 800656c: d104 bne.n 8006578 <f_read+0x104>
  15251. 800656e: 68fb ldr r3, [r7, #12]
  15252. 8006570: 2201 movs r2, #1
  15253. 8006572: 755a strb r2, [r3, #21]
  15254. 8006574: 2301 movs r3, #1
  15255. 8006576: e0d8 b.n 800672a <f_read+0x2b6>
  15256. fp->clust = clst; /* Update current cluster */
  15257. 8006578: 68fb ldr r3, [r7, #12]
  15258. 800657a: 6b3a ldr r2, [r7, #48] ; 0x30
  15259. 800657c: 61da str r2, [r3, #28]
  15260. }
  15261. sect = clust2sect(fs, fp->clust); /* Get current sector */
  15262. 800657e: 697a ldr r2, [r7, #20]
  15263. 8006580: 68fb ldr r3, [r7, #12]
  15264. 8006582: 69db ldr r3, [r3, #28]
  15265. 8006584: 4619 mov r1, r3
  15266. 8006586: 4610 mov r0, r2
  15267. 8006588: f7fd ff7e bl 8004488 <clust2sect>
  15268. 800658c: 61b8 str r0, [r7, #24]
  15269. if (!sect) ABORT(fs, FR_INT_ERR);
  15270. 800658e: 69bb ldr r3, [r7, #24]
  15271. 8006590: 2b00 cmp r3, #0
  15272. 8006592: d104 bne.n 800659e <f_read+0x12a>
  15273. 8006594: 68fb ldr r3, [r7, #12]
  15274. 8006596: 2202 movs r2, #2
  15275. 8006598: 755a strb r2, [r3, #21]
  15276. 800659a: 2302 movs r3, #2
  15277. 800659c: e0c5 b.n 800672a <f_read+0x2b6>
  15278. sect += csect;
  15279. 800659e: 69ba ldr r2, [r7, #24]
  15280. 80065a0: 69fb ldr r3, [r7, #28]
  15281. 80065a2: 4413 add r3, r2
  15282. 80065a4: 61bb str r3, [r7, #24]
  15283. cc = btr / SS(fs); /* When remaining bytes >= sector size, */
  15284. 80065a6: 697b ldr r3, [r7, #20]
  15285. 80065a8: 899b ldrh r3, [r3, #12]
  15286. 80065aa: 461a mov r2, r3
  15287. 80065ac: 687b ldr r3, [r7, #4]
  15288. 80065ae: fbb3 f3f2 udiv r3, r3, r2
  15289. 80065b2: 62bb str r3, [r7, #40] ; 0x28
  15290. if (cc) { /* Read maximum contiguous sectors directly */
  15291. 80065b4: 6abb ldr r3, [r7, #40] ; 0x28
  15292. 80065b6: 2b00 cmp r3, #0
  15293. 80065b8: d041 beq.n 800663e <f_read+0x1ca>
  15294. if (csect + cc > fs->csize) { /* Clip at cluster boundary */
  15295. 80065ba: 69fa ldr r2, [r7, #28]
  15296. 80065bc: 6abb ldr r3, [r7, #40] ; 0x28
  15297. 80065be: 4413 add r3, r2
  15298. 80065c0: 697a ldr r2, [r7, #20]
  15299. 80065c2: 8952 ldrh r2, [r2, #10]
  15300. 80065c4: 4293 cmp r3, r2
  15301. 80065c6: d905 bls.n 80065d4 <f_read+0x160>
  15302. cc = fs->csize - csect;
  15303. 80065c8: 697b ldr r3, [r7, #20]
  15304. 80065ca: 895b ldrh r3, [r3, #10]
  15305. 80065cc: 461a mov r2, r3
  15306. 80065ce: 69fb ldr r3, [r7, #28]
  15307. 80065d0: 1ad3 subs r3, r2, r3
  15308. 80065d2: 62bb str r3, [r7, #40] ; 0x28
  15309. }
  15310. if (disk_read(fs->drv, rbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR);
  15311. 80065d4: 697b ldr r3, [r7, #20]
  15312. 80065d6: 7858 ldrb r0, [r3, #1]
  15313. 80065d8: 6abb ldr r3, [r7, #40] ; 0x28
  15314. 80065da: 69ba ldr r2, [r7, #24]
  15315. 80065dc: 6a79 ldr r1, [r7, #36] ; 0x24
  15316. 80065de: f7fd fbb7 bl 8003d50 <disk_read>
  15317. 80065e2: 4603 mov r3, r0
  15318. 80065e4: 2b00 cmp r3, #0
  15319. 80065e6: d004 beq.n 80065f2 <f_read+0x17e>
  15320. 80065e8: 68fb ldr r3, [r7, #12]
  15321. 80065ea: 2201 movs r2, #1
  15322. 80065ec: 755a strb r2, [r3, #21]
  15323. 80065ee: 2301 movs r3, #1
  15324. 80065f0: e09b b.n 800672a <f_read+0x2b6>
  15325. #if _FS_TINY
  15326. if (fs->wflag && fs->winsect - sect < cc) {
  15327. mem_cpy(rbuff + ((fs->winsect - sect) * SS(fs)), fs->win, SS(fs));
  15328. }
  15329. #else
  15330. if ((fp->flag & FA_DIRTY) && fp->sect - sect < cc) {
  15331. 80065f2: 68fb ldr r3, [r7, #12]
  15332. 80065f4: 7d1b ldrb r3, [r3, #20]
  15333. 80065f6: b25b sxtb r3, r3
  15334. 80065f8: 2b00 cmp r3, #0
  15335. 80065fa: da18 bge.n 800662e <f_read+0x1ba>
  15336. 80065fc: 68fb ldr r3, [r7, #12]
  15337. 80065fe: 6a1a ldr r2, [r3, #32]
  15338. 8006600: 69bb ldr r3, [r7, #24]
  15339. 8006602: 1ad3 subs r3, r2, r3
  15340. 8006604: 6aba ldr r2, [r7, #40] ; 0x28
  15341. 8006606: 429a cmp r2, r3
  15342. 8006608: d911 bls.n 800662e <f_read+0x1ba>
  15343. mem_cpy(rbuff + ((fp->sect - sect) * SS(fs)), fp->buf, SS(fs));
  15344. 800660a: 68fb ldr r3, [r7, #12]
  15345. 800660c: 6a1a ldr r2, [r3, #32]
  15346. 800660e: 69bb ldr r3, [r7, #24]
  15347. 8006610: 1ad3 subs r3, r2, r3
  15348. 8006612: 697a ldr r2, [r7, #20]
  15349. 8006614: 8992 ldrh r2, [r2, #12]
  15350. 8006616: fb02 f303 mul.w r3, r2, r3
  15351. 800661a: 6a7a ldr r2, [r7, #36] ; 0x24
  15352. 800661c: 18d0 adds r0, r2, r3
  15353. 800661e: 68fb ldr r3, [r7, #12]
  15354. 8006620: f103 0130 add.w r1, r3, #48 ; 0x30
  15355. 8006624: 697b ldr r3, [r7, #20]
  15356. 8006626: 899b ldrh r3, [r3, #12]
  15357. 8006628: 461a mov r2, r3
  15358. 800662a: f7fd fc6d bl 8003f08 <mem_cpy>
  15359. }
  15360. #endif
  15361. #endif
  15362. rcnt = SS(fs) * cc; /* Number of bytes transferred */
  15363. 800662e: 697b ldr r3, [r7, #20]
  15364. 8006630: 899b ldrh r3, [r3, #12]
  15365. 8006632: 461a mov r2, r3
  15366. 8006634: 6abb ldr r3, [r7, #40] ; 0x28
  15367. 8006636: fb02 f303 mul.w r3, r2, r3
  15368. 800663a: 62fb str r3, [r7, #44] ; 0x2c
  15369. continue;
  15370. 800663c: e05c b.n 80066f8 <f_read+0x284>
  15371. }
  15372. #if !_FS_TINY
  15373. if (fp->sect != sect) { /* Load data sector if not in cache */
  15374. 800663e: 68fb ldr r3, [r7, #12]
  15375. 8006640: 6a1b ldr r3, [r3, #32]
  15376. 8006642: 69ba ldr r2, [r7, #24]
  15377. 8006644: 429a cmp r2, r3
  15378. 8006646: d02e beq.n 80066a6 <f_read+0x232>
  15379. #if !_FS_READONLY
  15380. if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
  15381. 8006648: 68fb ldr r3, [r7, #12]
  15382. 800664a: 7d1b ldrb r3, [r3, #20]
  15383. 800664c: b25b sxtb r3, r3
  15384. 800664e: 2b00 cmp r3, #0
  15385. 8006650: da18 bge.n 8006684 <f_read+0x210>
  15386. if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
  15387. 8006652: 697b ldr r3, [r7, #20]
  15388. 8006654: 7858 ldrb r0, [r3, #1]
  15389. 8006656: 68fb ldr r3, [r7, #12]
  15390. 8006658: f103 0130 add.w r1, r3, #48 ; 0x30
  15391. 800665c: 68fb ldr r3, [r7, #12]
  15392. 800665e: 6a1a ldr r2, [r3, #32]
  15393. 8006660: 2301 movs r3, #1
  15394. 8006662: f7fd fb95 bl 8003d90 <disk_write>
  15395. 8006666: 4603 mov r3, r0
  15396. 8006668: 2b00 cmp r3, #0
  15397. 800666a: d004 beq.n 8006676 <f_read+0x202>
  15398. 800666c: 68fb ldr r3, [r7, #12]
  15399. 800666e: 2201 movs r2, #1
  15400. 8006670: 755a strb r2, [r3, #21]
  15401. 8006672: 2301 movs r3, #1
  15402. 8006674: e059 b.n 800672a <f_read+0x2b6>
  15403. fp->flag &= (BYTE)~FA_DIRTY;
  15404. 8006676: 68fb ldr r3, [r7, #12]
  15405. 8006678: 7d1b ldrb r3, [r3, #20]
  15406. 800667a: f003 037f and.w r3, r3, #127 ; 0x7f
  15407. 800667e: b2da uxtb r2, r3
  15408. 8006680: 68fb ldr r3, [r7, #12]
  15409. 8006682: 751a strb r2, [r3, #20]
  15410. }
  15411. #endif
  15412. if (disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */
  15413. 8006684: 697b ldr r3, [r7, #20]
  15414. 8006686: 7858 ldrb r0, [r3, #1]
  15415. 8006688: 68fb ldr r3, [r7, #12]
  15416. 800668a: f103 0130 add.w r1, r3, #48 ; 0x30
  15417. 800668e: 2301 movs r3, #1
  15418. 8006690: 69ba ldr r2, [r7, #24]
  15419. 8006692: f7fd fb5d bl 8003d50 <disk_read>
  15420. 8006696: 4603 mov r3, r0
  15421. 8006698: 2b00 cmp r3, #0
  15422. 800669a: d004 beq.n 80066a6 <f_read+0x232>
  15423. 800669c: 68fb ldr r3, [r7, #12]
  15424. 800669e: 2201 movs r2, #1
  15425. 80066a0: 755a strb r2, [r3, #21]
  15426. 80066a2: 2301 movs r3, #1
  15427. 80066a4: e041 b.n 800672a <f_read+0x2b6>
  15428. }
  15429. #endif
  15430. fp->sect = sect;
  15431. 80066a6: 68fb ldr r3, [r7, #12]
  15432. 80066a8: 69ba ldr r2, [r7, #24]
  15433. 80066aa: 621a str r2, [r3, #32]
  15434. }
  15435. rcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes left in the sector */
  15436. 80066ac: 697b ldr r3, [r7, #20]
  15437. 80066ae: 899b ldrh r3, [r3, #12]
  15438. 80066b0: 4618 mov r0, r3
  15439. 80066b2: 68fb ldr r3, [r7, #12]
  15440. 80066b4: 699b ldr r3, [r3, #24]
  15441. 80066b6: 697a ldr r2, [r7, #20]
  15442. 80066b8: 8992 ldrh r2, [r2, #12]
  15443. 80066ba: fbb3 f1f2 udiv r1, r3, r2
  15444. 80066be: fb02 f201 mul.w r2, r2, r1
  15445. 80066c2: 1a9b subs r3, r3, r2
  15446. 80066c4: 1ac3 subs r3, r0, r3
  15447. 80066c6: 62fb str r3, [r7, #44] ; 0x2c
  15448. if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */
  15449. 80066c8: 6afa ldr r2, [r7, #44] ; 0x2c
  15450. 80066ca: 687b ldr r3, [r7, #4]
  15451. 80066cc: 429a cmp r2, r3
  15452. 80066ce: d901 bls.n 80066d4 <f_read+0x260>
  15453. 80066d0: 687b ldr r3, [r7, #4]
  15454. 80066d2: 62fb str r3, [r7, #44] ; 0x2c
  15455. #if _FS_TINY
  15456. if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */
  15457. mem_cpy(rbuff, fs->win + fp->fptr % SS(fs), rcnt); /* Extract partial sector */
  15458. #else
  15459. mem_cpy(rbuff, fp->buf + fp->fptr % SS(fs), rcnt); /* Extract partial sector */
  15460. 80066d4: 68fb ldr r3, [r7, #12]
  15461. 80066d6: f103 0130 add.w r1, r3, #48 ; 0x30
  15462. 80066da: 68fb ldr r3, [r7, #12]
  15463. 80066dc: 699b ldr r3, [r3, #24]
  15464. 80066de: 697a ldr r2, [r7, #20]
  15465. 80066e0: 8992 ldrh r2, [r2, #12]
  15466. 80066e2: fbb3 f0f2 udiv r0, r3, r2
  15467. 80066e6: fb02 f200 mul.w r2, r2, r0
  15468. 80066ea: 1a9b subs r3, r3, r2
  15469. 80066ec: 440b add r3, r1
  15470. 80066ee: 6afa ldr r2, [r7, #44] ; 0x2c
  15471. 80066f0: 4619 mov r1, r3
  15472. 80066f2: 6a78 ldr r0, [r7, #36] ; 0x24
  15473. 80066f4: f7fd fc08 bl 8003f08 <mem_cpy>
  15474. rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) {
  15475. 80066f8: 6a7a ldr r2, [r7, #36] ; 0x24
  15476. 80066fa: 6afb ldr r3, [r7, #44] ; 0x2c
  15477. 80066fc: 4413 add r3, r2
  15478. 80066fe: 627b str r3, [r7, #36] ; 0x24
  15479. 8006700: 68fb ldr r3, [r7, #12]
  15480. 8006702: 699a ldr r2, [r3, #24]
  15481. 8006704: 6afb ldr r3, [r7, #44] ; 0x2c
  15482. 8006706: 441a add r2, r3
  15483. 8006708: 68fb ldr r3, [r7, #12]
  15484. 800670a: 619a str r2, [r3, #24]
  15485. 800670c: 683b ldr r3, [r7, #0]
  15486. 800670e: 681a ldr r2, [r3, #0]
  15487. 8006710: 6afb ldr r3, [r7, #44] ; 0x2c
  15488. 8006712: 441a add r2, r3
  15489. 8006714: 683b ldr r3, [r7, #0]
  15490. 8006716: 601a str r2, [r3, #0]
  15491. 8006718: 687a ldr r2, [r7, #4]
  15492. 800671a: 6afb ldr r3, [r7, #44] ; 0x2c
  15493. 800671c: 1ad3 subs r3, r2, r3
  15494. 800671e: 607b str r3, [r7, #4]
  15495. for ( ; btr; /* Repeat until all data read */
  15496. 8006720: 687b ldr r3, [r7, #4]
  15497. 8006722: 2b00 cmp r3, #0
  15498. 8006724: f47f aee1 bne.w 80064ea <f_read+0x76>
  15499. #endif
  15500. }
  15501. LEAVE_FF(fs, FR_OK);
  15502. 8006728: 2300 movs r3, #0
  15503. }
  15504. 800672a: 4618 mov r0, r3
  15505. 800672c: 3738 adds r7, #56 ; 0x38
  15506. 800672e: 46bd mov sp, r7
  15507. 8006730: bd80 pop {r7, pc}
  15508. 08006732 <f_write>:
  15509. FIL* fp, /* Pointer to the file object */
  15510. const void* buff, /* Pointer to the data to be written */
  15511. UINT btw, /* Number of bytes to write */
  15512. UINT* bw /* Pointer to number of bytes written */
  15513. )
  15514. {
  15515. 8006732: b580 push {r7, lr}
  15516. 8006734: b08c sub sp, #48 ; 0x30
  15517. 8006736: af00 add r7, sp, #0
  15518. 8006738: 60f8 str r0, [r7, #12]
  15519. 800673a: 60b9 str r1, [r7, #8]
  15520. 800673c: 607a str r2, [r7, #4]
  15521. 800673e: 603b str r3, [r7, #0]
  15522. FRESULT res;
  15523. FATFS *fs;
  15524. DWORD clst, sect;
  15525. UINT wcnt, cc, csect;
  15526. const BYTE *wbuff = (const BYTE*)buff;
  15527. 8006740: 68bb ldr r3, [r7, #8]
  15528. 8006742: 61fb str r3, [r7, #28]
  15529. *bw = 0; /* Clear write byte counter */
  15530. 8006744: 683b ldr r3, [r7, #0]
  15531. 8006746: 2200 movs r2, #0
  15532. 8006748: 601a str r2, [r3, #0]
  15533. res = validate(&fp->obj, &fs); /* Check validity of the file object */
  15534. 800674a: 68fb ldr r3, [r7, #12]
  15535. 800674c: f107 0210 add.w r2, r7, #16
  15536. 8006750: 4611 mov r1, r2
  15537. 8006752: 4618 mov r0, r3
  15538. 8006754: f7ff fc46 bl 8005fe4 <validate>
  15539. 8006758: 4603 mov r3, r0
  15540. 800675a: f887 302f strb.w r3, [r7, #47] ; 0x2f
  15541. if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */
  15542. 800675e: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  15543. 8006762: 2b00 cmp r3, #0
  15544. 8006764: d107 bne.n 8006776 <f_write+0x44>
  15545. 8006766: 68fb ldr r3, [r7, #12]
  15546. 8006768: 7d5b ldrb r3, [r3, #21]
  15547. 800676a: f887 302f strb.w r3, [r7, #47] ; 0x2f
  15548. 800676e: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  15549. 8006772: 2b00 cmp r3, #0
  15550. 8006774: d002 beq.n 800677c <f_write+0x4a>
  15551. 8006776: f897 302f ldrb.w r3, [r7, #47] ; 0x2f
  15552. 800677a: e16a b.n 8006a52 <f_write+0x320>
  15553. if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
  15554. 800677c: 68fb ldr r3, [r7, #12]
  15555. 800677e: 7d1b ldrb r3, [r3, #20]
  15556. 8006780: f003 0302 and.w r3, r3, #2
  15557. 8006784: 2b00 cmp r3, #0
  15558. 8006786: d101 bne.n 800678c <f_write+0x5a>
  15559. 8006788: 2307 movs r3, #7
  15560. 800678a: e162 b.n 8006a52 <f_write+0x320>
  15561. /* Check fptr wrap-around (file size cannot reach 4GiB on FATxx) */
  15562. if ((!_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) {
  15563. 800678c: 68fb ldr r3, [r7, #12]
  15564. 800678e: 699a ldr r2, [r3, #24]
  15565. 8006790: 687b ldr r3, [r7, #4]
  15566. 8006792: 441a add r2, r3
  15567. 8006794: 68fb ldr r3, [r7, #12]
  15568. 8006796: 699b ldr r3, [r3, #24]
  15569. 8006798: 429a cmp r2, r3
  15570. 800679a: f080 814c bcs.w 8006a36 <f_write+0x304>
  15571. btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
  15572. 800679e: 68fb ldr r3, [r7, #12]
  15573. 80067a0: 699b ldr r3, [r3, #24]
  15574. 80067a2: 43db mvns r3, r3
  15575. 80067a4: 607b str r3, [r7, #4]
  15576. }
  15577. for ( ; btw; /* Repeat until all data written */
  15578. 80067a6: e146 b.n 8006a36 <f_write+0x304>
  15579. wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize, *bw += wcnt, btw -= wcnt) {
  15580. if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
  15581. 80067a8: 68fb ldr r3, [r7, #12]
  15582. 80067aa: 699b ldr r3, [r3, #24]
  15583. 80067ac: 693a ldr r2, [r7, #16]
  15584. 80067ae: 8992 ldrh r2, [r2, #12]
  15585. 80067b0: fbb3 f1f2 udiv r1, r3, r2
  15586. 80067b4: fb02 f201 mul.w r2, r2, r1
  15587. 80067b8: 1a9b subs r3, r3, r2
  15588. 80067ba: 2b00 cmp r3, #0
  15589. 80067bc: f040 80f1 bne.w 80069a2 <f_write+0x270>
  15590. csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */
  15591. 80067c0: 68fb ldr r3, [r7, #12]
  15592. 80067c2: 699b ldr r3, [r3, #24]
  15593. 80067c4: 693a ldr r2, [r7, #16]
  15594. 80067c6: 8992 ldrh r2, [r2, #12]
  15595. 80067c8: fbb3 f3f2 udiv r3, r3, r2
  15596. 80067cc: 693a ldr r2, [r7, #16]
  15597. 80067ce: 8952 ldrh r2, [r2, #10]
  15598. 80067d0: 3a01 subs r2, #1
  15599. 80067d2: 4013 ands r3, r2
  15600. 80067d4: 61bb str r3, [r7, #24]
  15601. if (csect == 0) { /* On the cluster boundary? */
  15602. 80067d6: 69bb ldr r3, [r7, #24]
  15603. 80067d8: 2b00 cmp r3, #0
  15604. 80067da: d143 bne.n 8006864 <f_write+0x132>
  15605. if (fp->fptr == 0) { /* On the top of the file? */
  15606. 80067dc: 68fb ldr r3, [r7, #12]
  15607. 80067de: 699b ldr r3, [r3, #24]
  15608. 80067e0: 2b00 cmp r3, #0
  15609. 80067e2: d10c bne.n 80067fe <f_write+0xcc>
  15610. clst = fp->obj.sclust; /* Follow from the origin */
  15611. 80067e4: 68fb ldr r3, [r7, #12]
  15612. 80067e6: 689b ldr r3, [r3, #8]
  15613. 80067e8: 62bb str r3, [r7, #40] ; 0x28
  15614. if (clst == 0) { /* If no cluster is allocated, */
  15615. 80067ea: 6abb ldr r3, [r7, #40] ; 0x28
  15616. 80067ec: 2b00 cmp r3, #0
  15617. 80067ee: d11a bne.n 8006826 <f_write+0xf4>
  15618. clst = create_chain(&fp->obj, 0); /* create a new cluster chain */
  15619. 80067f0: 68fb ldr r3, [r7, #12]
  15620. 80067f2: 2100 movs r1, #0
  15621. 80067f4: 4618 mov r0, r3
  15622. 80067f6: f7fe f8b1 bl 800495c <create_chain>
  15623. 80067fa: 62b8 str r0, [r7, #40] ; 0x28
  15624. 80067fc: e013 b.n 8006826 <f_write+0xf4>
  15625. }
  15626. } else { /* On the middle or end of the file */
  15627. #if _USE_FASTSEEK
  15628. if (fp->cltbl) {
  15629. 80067fe: 68fb ldr r3, [r7, #12]
  15630. 8006800: 6adb ldr r3, [r3, #44] ; 0x2c
  15631. 8006802: 2b00 cmp r3, #0
  15632. 8006804: d007 beq.n 8006816 <f_write+0xe4>
  15633. clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */
  15634. 8006806: 68fb ldr r3, [r7, #12]
  15635. 8006808: 699b ldr r3, [r3, #24]
  15636. 800680a: 4619 mov r1, r3
  15637. 800680c: 68f8 ldr r0, [r7, #12]
  15638. 800680e: f7fe f93d bl 8004a8c <clmt_clust>
  15639. 8006812: 62b8 str r0, [r7, #40] ; 0x28
  15640. 8006814: e007 b.n 8006826 <f_write+0xf4>
  15641. } else
  15642. #endif
  15643. {
  15644. clst = create_chain(&fp->obj, fp->clust); /* Follow or stretch cluster chain on the FAT */
  15645. 8006816: 68fa ldr r2, [r7, #12]
  15646. 8006818: 68fb ldr r3, [r7, #12]
  15647. 800681a: 69db ldr r3, [r3, #28]
  15648. 800681c: 4619 mov r1, r3
  15649. 800681e: 4610 mov r0, r2
  15650. 8006820: f7fe f89c bl 800495c <create_chain>
  15651. 8006824: 62b8 str r0, [r7, #40] ; 0x28
  15652. }
  15653. }
  15654. if (clst == 0) break; /* Could not allocate a new cluster (disk full) */
  15655. 8006826: 6abb ldr r3, [r7, #40] ; 0x28
  15656. 8006828: 2b00 cmp r3, #0
  15657. 800682a: f000 8109 beq.w 8006a40 <f_write+0x30e>
  15658. if (clst == 1) ABORT(fs, FR_INT_ERR);
  15659. 800682e: 6abb ldr r3, [r7, #40] ; 0x28
  15660. 8006830: 2b01 cmp r3, #1
  15661. 8006832: d104 bne.n 800683e <f_write+0x10c>
  15662. 8006834: 68fb ldr r3, [r7, #12]
  15663. 8006836: 2202 movs r2, #2
  15664. 8006838: 755a strb r2, [r3, #21]
  15665. 800683a: 2302 movs r3, #2
  15666. 800683c: e109 b.n 8006a52 <f_write+0x320>
  15667. if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
  15668. 800683e: 6abb ldr r3, [r7, #40] ; 0x28
  15669. 8006840: f1b3 3fff cmp.w r3, #4294967295
  15670. 8006844: d104 bne.n 8006850 <f_write+0x11e>
  15671. 8006846: 68fb ldr r3, [r7, #12]
  15672. 8006848: 2201 movs r2, #1
  15673. 800684a: 755a strb r2, [r3, #21]
  15674. 800684c: 2301 movs r3, #1
  15675. 800684e: e100 b.n 8006a52 <f_write+0x320>
  15676. fp->clust = clst; /* Update current cluster */
  15677. 8006850: 68fb ldr r3, [r7, #12]
  15678. 8006852: 6aba ldr r2, [r7, #40] ; 0x28
  15679. 8006854: 61da str r2, [r3, #28]
  15680. if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */
  15681. 8006856: 68fb ldr r3, [r7, #12]
  15682. 8006858: 689b ldr r3, [r3, #8]
  15683. 800685a: 2b00 cmp r3, #0
  15684. 800685c: d102 bne.n 8006864 <f_write+0x132>
  15685. 800685e: 68fb ldr r3, [r7, #12]
  15686. 8006860: 6aba ldr r2, [r7, #40] ; 0x28
  15687. 8006862: 609a str r2, [r3, #8]
  15688. }
  15689. #if _FS_TINY
  15690. if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back sector cache */
  15691. #else
  15692. if (fp->flag & FA_DIRTY) { /* Write-back sector cache */
  15693. 8006864: 68fb ldr r3, [r7, #12]
  15694. 8006866: 7d1b ldrb r3, [r3, #20]
  15695. 8006868: b25b sxtb r3, r3
  15696. 800686a: 2b00 cmp r3, #0
  15697. 800686c: da18 bge.n 80068a0 <f_write+0x16e>
  15698. if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
  15699. 800686e: 693b ldr r3, [r7, #16]
  15700. 8006870: 7858 ldrb r0, [r3, #1]
  15701. 8006872: 68fb ldr r3, [r7, #12]
  15702. 8006874: f103 0130 add.w r1, r3, #48 ; 0x30
  15703. 8006878: 68fb ldr r3, [r7, #12]
  15704. 800687a: 6a1a ldr r2, [r3, #32]
  15705. 800687c: 2301 movs r3, #1
  15706. 800687e: f7fd fa87 bl 8003d90 <disk_write>
  15707. 8006882: 4603 mov r3, r0
  15708. 8006884: 2b00 cmp r3, #0
  15709. 8006886: d004 beq.n 8006892 <f_write+0x160>
  15710. 8006888: 68fb ldr r3, [r7, #12]
  15711. 800688a: 2201 movs r2, #1
  15712. 800688c: 755a strb r2, [r3, #21]
  15713. 800688e: 2301 movs r3, #1
  15714. 8006890: e0df b.n 8006a52 <f_write+0x320>
  15715. fp->flag &= (BYTE)~FA_DIRTY;
  15716. 8006892: 68fb ldr r3, [r7, #12]
  15717. 8006894: 7d1b ldrb r3, [r3, #20]
  15718. 8006896: f003 037f and.w r3, r3, #127 ; 0x7f
  15719. 800689a: b2da uxtb r2, r3
  15720. 800689c: 68fb ldr r3, [r7, #12]
  15721. 800689e: 751a strb r2, [r3, #20]
  15722. }
  15723. #endif
  15724. sect = clust2sect(fs, fp->clust); /* Get current sector */
  15725. 80068a0: 693a ldr r2, [r7, #16]
  15726. 80068a2: 68fb ldr r3, [r7, #12]
  15727. 80068a4: 69db ldr r3, [r3, #28]
  15728. 80068a6: 4619 mov r1, r3
  15729. 80068a8: 4610 mov r0, r2
  15730. 80068aa: f7fd fded bl 8004488 <clust2sect>
  15731. 80068ae: 6178 str r0, [r7, #20]
  15732. if (!sect) ABORT(fs, FR_INT_ERR);
  15733. 80068b0: 697b ldr r3, [r7, #20]
  15734. 80068b2: 2b00 cmp r3, #0
  15735. 80068b4: d104 bne.n 80068c0 <f_write+0x18e>
  15736. 80068b6: 68fb ldr r3, [r7, #12]
  15737. 80068b8: 2202 movs r2, #2
  15738. 80068ba: 755a strb r2, [r3, #21]
  15739. 80068bc: 2302 movs r3, #2
  15740. 80068be: e0c8 b.n 8006a52 <f_write+0x320>
  15741. sect += csect;
  15742. 80068c0: 697a ldr r2, [r7, #20]
  15743. 80068c2: 69bb ldr r3, [r7, #24]
  15744. 80068c4: 4413 add r3, r2
  15745. 80068c6: 617b str r3, [r7, #20]
  15746. cc = btw / SS(fs); /* When remaining bytes >= sector size, */
  15747. 80068c8: 693b ldr r3, [r7, #16]
  15748. 80068ca: 899b ldrh r3, [r3, #12]
  15749. 80068cc: 461a mov r2, r3
  15750. 80068ce: 687b ldr r3, [r7, #4]
  15751. 80068d0: fbb3 f3f2 udiv r3, r3, r2
  15752. 80068d4: 623b str r3, [r7, #32]
  15753. if (cc) { /* Write maximum contiguous sectors directly */
  15754. 80068d6: 6a3b ldr r3, [r7, #32]
  15755. 80068d8: 2b00 cmp r3, #0
  15756. 80068da: d043 beq.n 8006964 <f_write+0x232>
  15757. if (csect + cc > fs->csize) { /* Clip at cluster boundary */
  15758. 80068dc: 69ba ldr r2, [r7, #24]
  15759. 80068de: 6a3b ldr r3, [r7, #32]
  15760. 80068e0: 4413 add r3, r2
  15761. 80068e2: 693a ldr r2, [r7, #16]
  15762. 80068e4: 8952 ldrh r2, [r2, #10]
  15763. 80068e6: 4293 cmp r3, r2
  15764. 80068e8: d905 bls.n 80068f6 <f_write+0x1c4>
  15765. cc = fs->csize - csect;
  15766. 80068ea: 693b ldr r3, [r7, #16]
  15767. 80068ec: 895b ldrh r3, [r3, #10]
  15768. 80068ee: 461a mov r2, r3
  15769. 80068f0: 69bb ldr r3, [r7, #24]
  15770. 80068f2: 1ad3 subs r3, r2, r3
  15771. 80068f4: 623b str r3, [r7, #32]
  15772. }
  15773. if (disk_write(fs->drv, wbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR);
  15774. 80068f6: 693b ldr r3, [r7, #16]
  15775. 80068f8: 7858 ldrb r0, [r3, #1]
  15776. 80068fa: 6a3b ldr r3, [r7, #32]
  15777. 80068fc: 697a ldr r2, [r7, #20]
  15778. 80068fe: 69f9 ldr r1, [r7, #28]
  15779. 8006900: f7fd fa46 bl 8003d90 <disk_write>
  15780. 8006904: 4603 mov r3, r0
  15781. 8006906: 2b00 cmp r3, #0
  15782. 8006908: d004 beq.n 8006914 <f_write+0x1e2>
  15783. 800690a: 68fb ldr r3, [r7, #12]
  15784. 800690c: 2201 movs r2, #1
  15785. 800690e: 755a strb r2, [r3, #21]
  15786. 8006910: 2301 movs r3, #1
  15787. 8006912: e09e b.n 8006a52 <f_write+0x320>
  15788. if (fs->winsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
  15789. mem_cpy(fs->win, wbuff + ((fs->winsect - sect) * SS(fs)), SS(fs));
  15790. fs->wflag = 0;
  15791. }
  15792. #else
  15793. if (fp->sect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
  15794. 8006914: 68fb ldr r3, [r7, #12]
  15795. 8006916: 6a1a ldr r2, [r3, #32]
  15796. 8006918: 697b ldr r3, [r7, #20]
  15797. 800691a: 1ad3 subs r3, r2, r3
  15798. 800691c: 6a3a ldr r2, [r7, #32]
  15799. 800691e: 429a cmp r2, r3
  15800. 8006920: d918 bls.n 8006954 <f_write+0x222>
  15801. mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
  15802. 8006922: 68fb ldr r3, [r7, #12]
  15803. 8006924: f103 0030 add.w r0, r3, #48 ; 0x30
  15804. 8006928: 68fb ldr r3, [r7, #12]
  15805. 800692a: 6a1a ldr r2, [r3, #32]
  15806. 800692c: 697b ldr r3, [r7, #20]
  15807. 800692e: 1ad3 subs r3, r2, r3
  15808. 8006930: 693a ldr r2, [r7, #16]
  15809. 8006932: 8992 ldrh r2, [r2, #12]
  15810. 8006934: fb02 f303 mul.w r3, r2, r3
  15811. 8006938: 69fa ldr r2, [r7, #28]
  15812. 800693a: 18d1 adds r1, r2, r3
  15813. 800693c: 693b ldr r3, [r7, #16]
  15814. 800693e: 899b ldrh r3, [r3, #12]
  15815. 8006940: 461a mov r2, r3
  15816. 8006942: f7fd fae1 bl 8003f08 <mem_cpy>
  15817. fp->flag &= (BYTE)~FA_DIRTY;
  15818. 8006946: 68fb ldr r3, [r7, #12]
  15819. 8006948: 7d1b ldrb r3, [r3, #20]
  15820. 800694a: f003 037f and.w r3, r3, #127 ; 0x7f
  15821. 800694e: b2da uxtb r2, r3
  15822. 8006950: 68fb ldr r3, [r7, #12]
  15823. 8006952: 751a strb r2, [r3, #20]
  15824. }
  15825. #endif
  15826. #endif
  15827. wcnt = SS(fs) * cc; /* Number of bytes transferred */
  15828. 8006954: 693b ldr r3, [r7, #16]
  15829. 8006956: 899b ldrh r3, [r3, #12]
  15830. 8006958: 461a mov r2, r3
  15831. 800695a: 6a3b ldr r3, [r7, #32]
  15832. 800695c: fb02 f303 mul.w r3, r2, r3
  15833. 8006960: 627b str r3, [r7, #36] ; 0x24
  15834. continue;
  15835. 8006962: e04b b.n 80069fc <f_write+0x2ca>
  15836. if (fp->fptr >= fp->obj.objsize) { /* Avoid silly cache filling on the growing edge */
  15837. if (sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR);
  15838. fs->winsect = sect;
  15839. }
  15840. #else
  15841. if (fp->sect != sect && /* Fill sector cache with file data */
  15842. 8006964: 68fb ldr r3, [r7, #12]
  15843. 8006966: 6a1b ldr r3, [r3, #32]
  15844. 8006968: 697a ldr r2, [r7, #20]
  15845. 800696a: 429a cmp r2, r3
  15846. 800696c: d016 beq.n 800699c <f_write+0x26a>
  15847. fp->fptr < fp->obj.objsize &&
  15848. 800696e: 68fb ldr r3, [r7, #12]
  15849. 8006970: 699a ldr r2, [r3, #24]
  15850. 8006972: 68fb ldr r3, [r7, #12]
  15851. 8006974: 68db ldr r3, [r3, #12]
  15852. if (fp->sect != sect && /* Fill sector cache with file data */
  15853. 8006976: 429a cmp r2, r3
  15854. 8006978: d210 bcs.n 800699c <f_write+0x26a>
  15855. disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) {
  15856. 800697a: 693b ldr r3, [r7, #16]
  15857. 800697c: 7858 ldrb r0, [r3, #1]
  15858. 800697e: 68fb ldr r3, [r7, #12]
  15859. 8006980: f103 0130 add.w r1, r3, #48 ; 0x30
  15860. 8006984: 2301 movs r3, #1
  15861. 8006986: 697a ldr r2, [r7, #20]
  15862. 8006988: f7fd f9e2 bl 8003d50 <disk_read>
  15863. 800698c: 4603 mov r3, r0
  15864. fp->fptr < fp->obj.objsize &&
  15865. 800698e: 2b00 cmp r3, #0
  15866. 8006990: d004 beq.n 800699c <f_write+0x26a>
  15867. ABORT(fs, FR_DISK_ERR);
  15868. 8006992: 68fb ldr r3, [r7, #12]
  15869. 8006994: 2201 movs r2, #1
  15870. 8006996: 755a strb r2, [r3, #21]
  15871. 8006998: 2301 movs r3, #1
  15872. 800699a: e05a b.n 8006a52 <f_write+0x320>
  15873. }
  15874. #endif
  15875. fp->sect = sect;
  15876. 800699c: 68fb ldr r3, [r7, #12]
  15877. 800699e: 697a ldr r2, [r7, #20]
  15878. 80069a0: 621a str r2, [r3, #32]
  15879. }
  15880. wcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes left in the sector */
  15881. 80069a2: 693b ldr r3, [r7, #16]
  15882. 80069a4: 899b ldrh r3, [r3, #12]
  15883. 80069a6: 4618 mov r0, r3
  15884. 80069a8: 68fb ldr r3, [r7, #12]
  15885. 80069aa: 699b ldr r3, [r3, #24]
  15886. 80069ac: 693a ldr r2, [r7, #16]
  15887. 80069ae: 8992 ldrh r2, [r2, #12]
  15888. 80069b0: fbb3 f1f2 udiv r1, r3, r2
  15889. 80069b4: fb02 f201 mul.w r2, r2, r1
  15890. 80069b8: 1a9b subs r3, r3, r2
  15891. 80069ba: 1ac3 subs r3, r0, r3
  15892. 80069bc: 627b str r3, [r7, #36] ; 0x24
  15893. if (wcnt > btw) wcnt = btw; /* Clip it by btw if needed */
  15894. 80069be: 6a7a ldr r2, [r7, #36] ; 0x24
  15895. 80069c0: 687b ldr r3, [r7, #4]
  15896. 80069c2: 429a cmp r2, r3
  15897. 80069c4: d901 bls.n 80069ca <f_write+0x298>
  15898. 80069c6: 687b ldr r3, [r7, #4]
  15899. 80069c8: 627b str r3, [r7, #36] ; 0x24
  15900. #if _FS_TINY
  15901. if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */
  15902. mem_cpy(fs->win + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */
  15903. fs->wflag = 1;
  15904. #else
  15905. mem_cpy(fp->buf + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */
  15906. 80069ca: 68fb ldr r3, [r7, #12]
  15907. 80069cc: f103 0130 add.w r1, r3, #48 ; 0x30
  15908. 80069d0: 68fb ldr r3, [r7, #12]
  15909. 80069d2: 699b ldr r3, [r3, #24]
  15910. 80069d4: 693a ldr r2, [r7, #16]
  15911. 80069d6: 8992 ldrh r2, [r2, #12]
  15912. 80069d8: fbb3 f0f2 udiv r0, r3, r2
  15913. 80069dc: fb02 f200 mul.w r2, r2, r0
  15914. 80069e0: 1a9b subs r3, r3, r2
  15915. 80069e2: 440b add r3, r1
  15916. 80069e4: 6a7a ldr r2, [r7, #36] ; 0x24
  15917. 80069e6: 69f9 ldr r1, [r7, #28]
  15918. 80069e8: 4618 mov r0, r3
  15919. 80069ea: f7fd fa8d bl 8003f08 <mem_cpy>
  15920. fp->flag |= FA_DIRTY;
  15921. 80069ee: 68fb ldr r3, [r7, #12]
  15922. 80069f0: 7d1b ldrb r3, [r3, #20]
  15923. 80069f2: f063 037f orn r3, r3, #127 ; 0x7f
  15924. 80069f6: b2da uxtb r2, r3
  15925. 80069f8: 68fb ldr r3, [r7, #12]
  15926. 80069fa: 751a strb r2, [r3, #20]
  15927. wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize, *bw += wcnt, btw -= wcnt) {
  15928. 80069fc: 69fa ldr r2, [r7, #28]
  15929. 80069fe: 6a7b ldr r3, [r7, #36] ; 0x24
  15930. 8006a00: 4413 add r3, r2
  15931. 8006a02: 61fb str r3, [r7, #28]
  15932. 8006a04: 68fb ldr r3, [r7, #12]
  15933. 8006a06: 699a ldr r2, [r3, #24]
  15934. 8006a08: 6a7b ldr r3, [r7, #36] ; 0x24
  15935. 8006a0a: 441a add r2, r3
  15936. 8006a0c: 68fb ldr r3, [r7, #12]
  15937. 8006a0e: 619a str r2, [r3, #24]
  15938. 8006a10: 68fb ldr r3, [r7, #12]
  15939. 8006a12: 68da ldr r2, [r3, #12]
  15940. 8006a14: 68fb ldr r3, [r7, #12]
  15941. 8006a16: 699b ldr r3, [r3, #24]
  15942. 8006a18: 429a cmp r2, r3
  15943. 8006a1a: bf38 it cc
  15944. 8006a1c: 461a movcc r2, r3
  15945. 8006a1e: 68fb ldr r3, [r7, #12]
  15946. 8006a20: 60da str r2, [r3, #12]
  15947. 8006a22: 683b ldr r3, [r7, #0]
  15948. 8006a24: 681a ldr r2, [r3, #0]
  15949. 8006a26: 6a7b ldr r3, [r7, #36] ; 0x24
  15950. 8006a28: 441a add r2, r3
  15951. 8006a2a: 683b ldr r3, [r7, #0]
  15952. 8006a2c: 601a str r2, [r3, #0]
  15953. 8006a2e: 687a ldr r2, [r7, #4]
  15954. 8006a30: 6a7b ldr r3, [r7, #36] ; 0x24
  15955. 8006a32: 1ad3 subs r3, r2, r3
  15956. 8006a34: 607b str r3, [r7, #4]
  15957. for ( ; btw; /* Repeat until all data written */
  15958. 8006a36: 687b ldr r3, [r7, #4]
  15959. 8006a38: 2b00 cmp r3, #0
  15960. 8006a3a: f47f aeb5 bne.w 80067a8 <f_write+0x76>
  15961. 8006a3e: e000 b.n 8006a42 <f_write+0x310>
  15962. if (clst == 0) break; /* Could not allocate a new cluster (disk full) */
  15963. 8006a40: bf00 nop
  15964. #endif
  15965. }
  15966. fp->flag |= FA_MODIFIED; /* Set file change flag */
  15967. 8006a42: 68fb ldr r3, [r7, #12]
  15968. 8006a44: 7d1b ldrb r3, [r3, #20]
  15969. 8006a46: f043 0340 orr.w r3, r3, #64 ; 0x40
  15970. 8006a4a: b2da uxtb r2, r3
  15971. 8006a4c: 68fb ldr r3, [r7, #12]
  15972. 8006a4e: 751a strb r2, [r3, #20]
  15973. LEAVE_FF(fs, FR_OK);
  15974. 8006a50: 2300 movs r3, #0
  15975. }
  15976. 8006a52: 4618 mov r0, r3
  15977. 8006a54: 3730 adds r7, #48 ; 0x30
  15978. 8006a56: 46bd mov sp, r7
  15979. 8006a58: bd80 pop {r7, pc}
  15980. 08006a5a <f_sync>:
  15981. /*-----------------------------------------------------------------------*/
  15982. FRESULT f_sync (
  15983. FIL* fp /* Pointer to the file object */
  15984. )
  15985. {
  15986. 8006a5a: b580 push {r7, lr}
  15987. 8006a5c: b086 sub sp, #24
  15988. 8006a5e: af00 add r7, sp, #0
  15989. 8006a60: 6078 str r0, [r7, #4]
  15990. #if _FS_EXFAT
  15991. DIR dj;
  15992. DEF_NAMBUF
  15993. #endif
  15994. res = validate(&fp->obj, &fs); /* Check validity of the file object */
  15995. 8006a62: 687b ldr r3, [r7, #4]
  15996. 8006a64: f107 0208 add.w r2, r7, #8
  15997. 8006a68: 4611 mov r1, r2
  15998. 8006a6a: 4618 mov r0, r3
  15999. 8006a6c: f7ff faba bl 8005fe4 <validate>
  16000. 8006a70: 4603 mov r3, r0
  16001. 8006a72: 75fb strb r3, [r7, #23]
  16002. if (res == FR_OK) {
  16003. 8006a74: 7dfb ldrb r3, [r7, #23]
  16004. 8006a76: 2b00 cmp r3, #0
  16005. 8006a78: d168 bne.n 8006b4c <f_sync+0xf2>
  16006. if (fp->flag & FA_MODIFIED) { /* Is there any change to the file? */
  16007. 8006a7a: 687b ldr r3, [r7, #4]
  16008. 8006a7c: 7d1b ldrb r3, [r3, #20]
  16009. 8006a7e: f003 0340 and.w r3, r3, #64 ; 0x40
  16010. 8006a82: 2b00 cmp r3, #0
  16011. 8006a84: d062 beq.n 8006b4c <f_sync+0xf2>
  16012. #if !_FS_TINY
  16013. if (fp->flag & FA_DIRTY) { /* Write-back cached data if needed */
  16014. 8006a86: 687b ldr r3, [r7, #4]
  16015. 8006a88: 7d1b ldrb r3, [r3, #20]
  16016. 8006a8a: b25b sxtb r3, r3
  16017. 8006a8c: 2b00 cmp r3, #0
  16018. 8006a8e: da15 bge.n 8006abc <f_sync+0x62>
  16019. if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) LEAVE_FF(fs, FR_DISK_ERR);
  16020. 8006a90: 68bb ldr r3, [r7, #8]
  16021. 8006a92: 7858 ldrb r0, [r3, #1]
  16022. 8006a94: 687b ldr r3, [r7, #4]
  16023. 8006a96: f103 0130 add.w r1, r3, #48 ; 0x30
  16024. 8006a9a: 687b ldr r3, [r7, #4]
  16025. 8006a9c: 6a1a ldr r2, [r3, #32]
  16026. 8006a9e: 2301 movs r3, #1
  16027. 8006aa0: f7fd f976 bl 8003d90 <disk_write>
  16028. 8006aa4: 4603 mov r3, r0
  16029. 8006aa6: 2b00 cmp r3, #0
  16030. 8006aa8: d001 beq.n 8006aae <f_sync+0x54>
  16031. 8006aaa: 2301 movs r3, #1
  16032. 8006aac: e04f b.n 8006b4e <f_sync+0xf4>
  16033. fp->flag &= (BYTE)~FA_DIRTY;
  16034. 8006aae: 687b ldr r3, [r7, #4]
  16035. 8006ab0: 7d1b ldrb r3, [r3, #20]
  16036. 8006ab2: f003 037f and.w r3, r3, #127 ; 0x7f
  16037. 8006ab6: b2da uxtb r2, r3
  16038. 8006ab8: 687b ldr r3, [r7, #4]
  16039. 8006aba: 751a strb r2, [r3, #20]
  16040. }
  16041. #endif
  16042. /* Update the directory entry */
  16043. tm = GET_FATTIME(); /* Modified time */
  16044. 8006abc: f7fd f8ac bl 8003c18 <get_fattime>
  16045. 8006ac0: 6138 str r0, [r7, #16]
  16046. FREE_NAMBUF();
  16047. }
  16048. } else
  16049. #endif
  16050. {
  16051. res = move_window(fs, fp->dir_sect);
  16052. 8006ac2: 68ba ldr r2, [r7, #8]
  16053. 8006ac4: 687b ldr r3, [r7, #4]
  16054. 8006ac6: 6a5b ldr r3, [r3, #36] ; 0x24
  16055. 8006ac8: 4619 mov r1, r3
  16056. 8006aca: 4610 mov r0, r2
  16057. 8006acc: f7fd fc3e bl 800434c <move_window>
  16058. 8006ad0: 4603 mov r3, r0
  16059. 8006ad2: 75fb strb r3, [r7, #23]
  16060. if (res == FR_OK) {
  16061. 8006ad4: 7dfb ldrb r3, [r7, #23]
  16062. 8006ad6: 2b00 cmp r3, #0
  16063. 8006ad8: d138 bne.n 8006b4c <f_sync+0xf2>
  16064. dir = fp->dir_ptr;
  16065. 8006ada: 687b ldr r3, [r7, #4]
  16066. 8006adc: 6a9b ldr r3, [r3, #40] ; 0x28
  16067. 8006ade: 60fb str r3, [r7, #12]
  16068. dir[DIR_Attr] |= AM_ARC; /* Set archive bit */
  16069. 8006ae0: 68fb ldr r3, [r7, #12]
  16070. 8006ae2: 330b adds r3, #11
  16071. 8006ae4: 781a ldrb r2, [r3, #0]
  16072. 8006ae6: 68fb ldr r3, [r7, #12]
  16073. 8006ae8: 330b adds r3, #11
  16074. 8006aea: f042 0220 orr.w r2, r2, #32
  16075. 8006aee: b2d2 uxtb r2, r2
  16076. 8006af0: 701a strb r2, [r3, #0]
  16077. st_clust(fp->obj.fs, dir, fp->obj.sclust); /* Update file allocation info */
  16078. 8006af2: 687b ldr r3, [r7, #4]
  16079. 8006af4: 6818 ldr r0, [r3, #0]
  16080. 8006af6: 687b ldr r3, [r7, #4]
  16081. 8006af8: 689b ldr r3, [r3, #8]
  16082. 8006afa: 461a mov r2, r3
  16083. 8006afc: 68f9 ldr r1, [r7, #12]
  16084. 8006afe: f7fe f9c1 bl 8004e84 <st_clust>
  16085. st_dword(dir + DIR_FileSize, (DWORD)fp->obj.objsize); /* Update file size */
  16086. 8006b02: 68fb ldr r3, [r7, #12]
  16087. 8006b04: f103 021c add.w r2, r3, #28
  16088. 8006b08: 687b ldr r3, [r7, #4]
  16089. 8006b0a: 68db ldr r3, [r3, #12]
  16090. 8006b0c: 4619 mov r1, r3
  16091. 8006b0e: 4610 mov r0, r2
  16092. 8006b10: f7fd f9cf bl 8003eb2 <st_dword>
  16093. st_dword(dir + DIR_ModTime, tm); /* Update modified time */
  16094. 8006b14: 68fb ldr r3, [r7, #12]
  16095. 8006b16: 3316 adds r3, #22
  16096. 8006b18: 6939 ldr r1, [r7, #16]
  16097. 8006b1a: 4618 mov r0, r3
  16098. 8006b1c: f7fd f9c9 bl 8003eb2 <st_dword>
  16099. st_word(dir + DIR_LstAccDate, 0);
  16100. 8006b20: 68fb ldr r3, [r7, #12]
  16101. 8006b22: 3312 adds r3, #18
  16102. 8006b24: 2100 movs r1, #0
  16103. 8006b26: 4618 mov r0, r3
  16104. 8006b28: f7fd f9a9 bl 8003e7e <st_word>
  16105. fs->wflag = 1;
  16106. 8006b2c: 68bb ldr r3, [r7, #8]
  16107. 8006b2e: 2201 movs r2, #1
  16108. 8006b30: 70da strb r2, [r3, #3]
  16109. res = sync_fs(fs); /* Restore it to the directory */
  16110. 8006b32: 68bb ldr r3, [r7, #8]
  16111. 8006b34: 4618 mov r0, r3
  16112. 8006b36: f7fd fc37 bl 80043a8 <sync_fs>
  16113. 8006b3a: 4603 mov r3, r0
  16114. 8006b3c: 75fb strb r3, [r7, #23]
  16115. fp->flag &= (BYTE)~FA_MODIFIED;
  16116. 8006b3e: 687b ldr r3, [r7, #4]
  16117. 8006b40: 7d1b ldrb r3, [r3, #20]
  16118. 8006b42: f023 0340 bic.w r3, r3, #64 ; 0x40
  16119. 8006b46: b2da uxtb r2, r3
  16120. 8006b48: 687b ldr r3, [r7, #4]
  16121. 8006b4a: 751a strb r2, [r3, #20]
  16122. }
  16123. }
  16124. }
  16125. }
  16126. LEAVE_FF(fs, res);
  16127. 8006b4c: 7dfb ldrb r3, [r7, #23]
  16128. }
  16129. 8006b4e: 4618 mov r0, r3
  16130. 8006b50: 3718 adds r7, #24
  16131. 8006b52: 46bd mov sp, r7
  16132. 8006b54: bd80 pop {r7, pc}
  16133. 08006b56 <f_close>:
  16134. /*-----------------------------------------------------------------------*/
  16135. FRESULT f_close (
  16136. FIL* fp /* Pointer to the file object to be closed */
  16137. )
  16138. {
  16139. 8006b56: b580 push {r7, lr}
  16140. 8006b58: b084 sub sp, #16
  16141. 8006b5a: af00 add r7, sp, #0
  16142. 8006b5c: 6078 str r0, [r7, #4]
  16143. FRESULT res;
  16144. FATFS *fs;
  16145. #if !_FS_READONLY
  16146. res = f_sync(fp); /* Flush cached data */
  16147. 8006b5e: 6878 ldr r0, [r7, #4]
  16148. 8006b60: f7ff ff7b bl 8006a5a <f_sync>
  16149. 8006b64: 4603 mov r3, r0
  16150. 8006b66: 73fb strb r3, [r7, #15]
  16151. if (res == FR_OK)
  16152. 8006b68: 7bfb ldrb r3, [r7, #15]
  16153. 8006b6a: 2b00 cmp r3, #0
  16154. 8006b6c: d118 bne.n 8006ba0 <f_close+0x4a>
  16155. #endif
  16156. {
  16157. res = validate(&fp->obj, &fs); /* Lock volume */
  16158. 8006b6e: 687b ldr r3, [r7, #4]
  16159. 8006b70: f107 0208 add.w r2, r7, #8
  16160. 8006b74: 4611 mov r1, r2
  16161. 8006b76: 4618 mov r0, r3
  16162. 8006b78: f7ff fa34 bl 8005fe4 <validate>
  16163. 8006b7c: 4603 mov r3, r0
  16164. 8006b7e: 73fb strb r3, [r7, #15]
  16165. if (res == FR_OK) {
  16166. 8006b80: 7bfb ldrb r3, [r7, #15]
  16167. 8006b82: 2b00 cmp r3, #0
  16168. 8006b84: d10c bne.n 8006ba0 <f_close+0x4a>
  16169. #if _FS_LOCK != 0
  16170. res = dec_lock(fp->obj.lockid); /* Decrement file open counter */
  16171. 8006b86: 687b ldr r3, [r7, #4]
  16172. 8006b88: 691b ldr r3, [r3, #16]
  16173. 8006b8a: 4618 mov r0, r3
  16174. 8006b8c: f7fd fb3e bl 800420c <dec_lock>
  16175. 8006b90: 4603 mov r3, r0
  16176. 8006b92: 73fb strb r3, [r7, #15]
  16177. if (res == FR_OK)
  16178. 8006b94: 7bfb ldrb r3, [r7, #15]
  16179. 8006b96: 2b00 cmp r3, #0
  16180. 8006b98: d102 bne.n 8006ba0 <f_close+0x4a>
  16181. #endif
  16182. {
  16183. fp->obj.fs = 0; /* Invalidate file object */
  16184. 8006b9a: 687b ldr r3, [r7, #4]
  16185. 8006b9c: 2200 movs r2, #0
  16186. 8006b9e: 601a str r2, [r3, #0]
  16187. #if _FS_REENTRANT
  16188. unlock_fs(fs, FR_OK); /* Unlock volume */
  16189. #endif
  16190. }
  16191. }
  16192. return res;
  16193. 8006ba0: 7bfb ldrb r3, [r7, #15]
  16194. }
  16195. 8006ba2: 4618 mov r0, r3
  16196. 8006ba4: 3710 adds r7, #16
  16197. 8006ba6: 46bd mov sp, r7
  16198. 8006ba8: bd80 pop {r7, pc}
  16199. 08006baa <f_getfree>:
  16200. FRESULT f_getfree (
  16201. const TCHAR* path, /* Path name of the logical drive number */
  16202. DWORD* nclst, /* Pointer to a variable to return number of free clusters */
  16203. FATFS** fatfs /* Pointer to return pointer to corresponding file system object */
  16204. )
  16205. {
  16206. 8006baa: b580 push {r7, lr}
  16207. 8006bac: b092 sub sp, #72 ; 0x48
  16208. 8006bae: af00 add r7, sp, #0
  16209. 8006bb0: 60f8 str r0, [r7, #12]
  16210. 8006bb2: 60b9 str r1, [r7, #8]
  16211. 8006bb4: 607a str r2, [r7, #4]
  16212. BYTE *p;
  16213. _FDID obj;
  16214. /* Get logical drive */
  16215. res = find_volume(&path, &fs, 0);
  16216. 8006bb6: f107 0128 add.w r1, r7, #40 ; 0x28
  16217. 8006bba: f107 030c add.w r3, r7, #12
  16218. 8006bbe: 2200 movs r2, #0
  16219. 8006bc0: 4618 mov r0, r3
  16220. 8006bc2: f7fe ff87 bl 8005ad4 <find_volume>
  16221. 8006bc6: 4603 mov r3, r0
  16222. 8006bc8: f887 3047 strb.w r3, [r7, #71] ; 0x47
  16223. if (res == FR_OK) {
  16224. 8006bcc: f897 3047 ldrb.w r3, [r7, #71] ; 0x47
  16225. 8006bd0: 2b00 cmp r3, #0
  16226. 8006bd2: f040 8099 bne.w 8006d08 <f_getfree+0x15e>
  16227. *fatfs = fs; /* Return ptr to the fs object */
  16228. 8006bd6: 6aba ldr r2, [r7, #40] ; 0x28
  16229. 8006bd8: 687b ldr r3, [r7, #4]
  16230. 8006bda: 601a str r2, [r3, #0]
  16231. /* If free_clst is valid, return it without full cluster scan */
  16232. if (fs->free_clst <= fs->n_fatent - 2) {
  16233. 8006bdc: 6abb ldr r3, [r7, #40] ; 0x28
  16234. 8006bde: 699a ldr r2, [r3, #24]
  16235. 8006be0: 6abb ldr r3, [r7, #40] ; 0x28
  16236. 8006be2: 69db ldr r3, [r3, #28]
  16237. 8006be4: 3b02 subs r3, #2
  16238. 8006be6: 429a cmp r2, r3
  16239. 8006be8: d804 bhi.n 8006bf4 <f_getfree+0x4a>
  16240. *nclst = fs->free_clst;
  16241. 8006bea: 6abb ldr r3, [r7, #40] ; 0x28
  16242. 8006bec: 699a ldr r2, [r3, #24]
  16243. 8006bee: 68bb ldr r3, [r7, #8]
  16244. 8006bf0: 601a str r2, [r3, #0]
  16245. 8006bf2: e089 b.n 8006d08 <f_getfree+0x15e>
  16246. } else {
  16247. /* Get number of free clusters */
  16248. nfree = 0;
  16249. 8006bf4: 2300 movs r3, #0
  16250. 8006bf6: 643b str r3, [r7, #64] ; 0x40
  16251. if (fs->fs_type == FS_FAT12) { /* FAT12: Sector unalighed FAT entries */
  16252. 8006bf8: 6abb ldr r3, [r7, #40] ; 0x28
  16253. 8006bfa: 781b ldrb r3, [r3, #0]
  16254. 8006bfc: 2b01 cmp r3, #1
  16255. 8006bfe: d128 bne.n 8006c52 <f_getfree+0xa8>
  16256. clst = 2; obj.fs = fs;
  16257. 8006c00: 2302 movs r3, #2
  16258. 8006c02: 63fb str r3, [r7, #60] ; 0x3c
  16259. 8006c04: 6abb ldr r3, [r7, #40] ; 0x28
  16260. 8006c06: 617b str r3, [r7, #20]
  16261. do {
  16262. stat = get_fat(&obj, clst);
  16263. 8006c08: f107 0314 add.w r3, r7, #20
  16264. 8006c0c: 6bf9 ldr r1, [r7, #60] ; 0x3c
  16265. 8006c0e: 4618 mov r0, r3
  16266. 8006c10: f7fd fc58 bl 80044c4 <get_fat>
  16267. 8006c14: 62f8 str r0, [r7, #44] ; 0x2c
  16268. if (stat == 0xFFFFFFFF) { res = FR_DISK_ERR; break; }
  16269. 8006c16: 6afb ldr r3, [r7, #44] ; 0x2c
  16270. 8006c18: f1b3 3fff cmp.w r3, #4294967295
  16271. 8006c1c: d103 bne.n 8006c26 <f_getfree+0x7c>
  16272. 8006c1e: 2301 movs r3, #1
  16273. 8006c20: f887 3047 strb.w r3, [r7, #71] ; 0x47
  16274. 8006c24: e063 b.n 8006cee <f_getfree+0x144>
  16275. if (stat == 1) { res = FR_INT_ERR; break; }
  16276. 8006c26: 6afb ldr r3, [r7, #44] ; 0x2c
  16277. 8006c28: 2b01 cmp r3, #1
  16278. 8006c2a: d103 bne.n 8006c34 <f_getfree+0x8a>
  16279. 8006c2c: 2302 movs r3, #2
  16280. 8006c2e: f887 3047 strb.w r3, [r7, #71] ; 0x47
  16281. 8006c32: e05c b.n 8006cee <f_getfree+0x144>
  16282. if (stat == 0) nfree++;
  16283. 8006c34: 6afb ldr r3, [r7, #44] ; 0x2c
  16284. 8006c36: 2b00 cmp r3, #0
  16285. 8006c38: d102 bne.n 8006c40 <f_getfree+0x96>
  16286. 8006c3a: 6c3b ldr r3, [r7, #64] ; 0x40
  16287. 8006c3c: 3301 adds r3, #1
  16288. 8006c3e: 643b str r3, [r7, #64] ; 0x40
  16289. } while (++clst < fs->n_fatent);
  16290. 8006c40: 6bfb ldr r3, [r7, #60] ; 0x3c
  16291. 8006c42: 3301 adds r3, #1
  16292. 8006c44: 63fb str r3, [r7, #60] ; 0x3c
  16293. 8006c46: 6abb ldr r3, [r7, #40] ; 0x28
  16294. 8006c48: 69db ldr r3, [r3, #28]
  16295. 8006c4a: 6bfa ldr r2, [r7, #60] ; 0x3c
  16296. 8006c4c: 429a cmp r2, r3
  16297. 8006c4e: d3db bcc.n 8006c08 <f_getfree+0x5e>
  16298. 8006c50: e04d b.n 8006cee <f_getfree+0x144>
  16299. i = (i + 1) % SS(fs);
  16300. } while (clst);
  16301. } else
  16302. #endif
  16303. { /* FAT16/32: Sector alighed FAT entries */
  16304. clst = fs->n_fatent; sect = fs->fatbase;
  16305. 8006c52: 6abb ldr r3, [r7, #40] ; 0x28
  16306. 8006c54: 69db ldr r3, [r3, #28]
  16307. 8006c56: 63fb str r3, [r7, #60] ; 0x3c
  16308. 8006c58: 6abb ldr r3, [r7, #40] ; 0x28
  16309. 8006c5a: 6a9b ldr r3, [r3, #40] ; 0x28
  16310. 8006c5c: 63bb str r3, [r7, #56] ; 0x38
  16311. i = 0; p = 0;
  16312. 8006c5e: 2300 movs r3, #0
  16313. 8006c60: 637b str r3, [r7, #52] ; 0x34
  16314. 8006c62: 2300 movs r3, #0
  16315. 8006c64: 633b str r3, [r7, #48] ; 0x30
  16316. do {
  16317. if (i == 0) {
  16318. 8006c66: 6b7b ldr r3, [r7, #52] ; 0x34
  16319. 8006c68: 2b00 cmp r3, #0
  16320. 8006c6a: d113 bne.n 8006c94 <f_getfree+0xea>
  16321. res = move_window(fs, sect++);
  16322. 8006c6c: 6ab8 ldr r0, [r7, #40] ; 0x28
  16323. 8006c6e: 6bbb ldr r3, [r7, #56] ; 0x38
  16324. 8006c70: 1c5a adds r2, r3, #1
  16325. 8006c72: 63ba str r2, [r7, #56] ; 0x38
  16326. 8006c74: 4619 mov r1, r3
  16327. 8006c76: f7fd fb69 bl 800434c <move_window>
  16328. 8006c7a: 4603 mov r3, r0
  16329. 8006c7c: f887 3047 strb.w r3, [r7, #71] ; 0x47
  16330. if (res != FR_OK) break;
  16331. 8006c80: f897 3047 ldrb.w r3, [r7, #71] ; 0x47
  16332. 8006c84: 2b00 cmp r3, #0
  16333. 8006c86: d131 bne.n 8006cec <f_getfree+0x142>
  16334. p = fs->win;
  16335. 8006c88: 6abb ldr r3, [r7, #40] ; 0x28
  16336. 8006c8a: 3338 adds r3, #56 ; 0x38
  16337. 8006c8c: 633b str r3, [r7, #48] ; 0x30
  16338. i = SS(fs);
  16339. 8006c8e: 6abb ldr r3, [r7, #40] ; 0x28
  16340. 8006c90: 899b ldrh r3, [r3, #12]
  16341. 8006c92: 637b str r3, [r7, #52] ; 0x34
  16342. }
  16343. if (fs->fs_type == FS_FAT16) {
  16344. 8006c94: 6abb ldr r3, [r7, #40] ; 0x28
  16345. 8006c96: 781b ldrb r3, [r3, #0]
  16346. 8006c98: 2b02 cmp r3, #2
  16347. 8006c9a: d10f bne.n 8006cbc <f_getfree+0x112>
  16348. if (ld_word(p) == 0) nfree++;
  16349. 8006c9c: 6b38 ldr r0, [r7, #48] ; 0x30
  16350. 8006c9e: f7fd f8b5 bl 8003e0c <ld_word>
  16351. 8006ca2: 4603 mov r3, r0
  16352. 8006ca4: 2b00 cmp r3, #0
  16353. 8006ca6: d102 bne.n 8006cae <f_getfree+0x104>
  16354. 8006ca8: 6c3b ldr r3, [r7, #64] ; 0x40
  16355. 8006caa: 3301 adds r3, #1
  16356. 8006cac: 643b str r3, [r7, #64] ; 0x40
  16357. p += 2; i -= 2;
  16358. 8006cae: 6b3b ldr r3, [r7, #48] ; 0x30
  16359. 8006cb0: 3302 adds r3, #2
  16360. 8006cb2: 633b str r3, [r7, #48] ; 0x30
  16361. 8006cb4: 6b7b ldr r3, [r7, #52] ; 0x34
  16362. 8006cb6: 3b02 subs r3, #2
  16363. 8006cb8: 637b str r3, [r7, #52] ; 0x34
  16364. 8006cba: e010 b.n 8006cde <f_getfree+0x134>
  16365. } else {
  16366. if ((ld_dword(p) & 0x0FFFFFFF) == 0) nfree++;
  16367. 8006cbc: 6b38 ldr r0, [r7, #48] ; 0x30
  16368. 8006cbe: f7fd f8bc bl 8003e3a <ld_dword>
  16369. 8006cc2: 4603 mov r3, r0
  16370. 8006cc4: f023 4370 bic.w r3, r3, #4026531840 ; 0xf0000000
  16371. 8006cc8: 2b00 cmp r3, #0
  16372. 8006cca: d102 bne.n 8006cd2 <f_getfree+0x128>
  16373. 8006ccc: 6c3b ldr r3, [r7, #64] ; 0x40
  16374. 8006cce: 3301 adds r3, #1
  16375. 8006cd0: 643b str r3, [r7, #64] ; 0x40
  16376. p += 4; i -= 4;
  16377. 8006cd2: 6b3b ldr r3, [r7, #48] ; 0x30
  16378. 8006cd4: 3304 adds r3, #4
  16379. 8006cd6: 633b str r3, [r7, #48] ; 0x30
  16380. 8006cd8: 6b7b ldr r3, [r7, #52] ; 0x34
  16381. 8006cda: 3b04 subs r3, #4
  16382. 8006cdc: 637b str r3, [r7, #52] ; 0x34
  16383. }
  16384. } while (--clst);
  16385. 8006cde: 6bfb ldr r3, [r7, #60] ; 0x3c
  16386. 8006ce0: 3b01 subs r3, #1
  16387. 8006ce2: 63fb str r3, [r7, #60] ; 0x3c
  16388. 8006ce4: 6bfb ldr r3, [r7, #60] ; 0x3c
  16389. 8006ce6: 2b00 cmp r3, #0
  16390. 8006ce8: d1bd bne.n 8006c66 <f_getfree+0xbc>
  16391. 8006cea: e000 b.n 8006cee <f_getfree+0x144>
  16392. if (res != FR_OK) break;
  16393. 8006cec: bf00 nop
  16394. }
  16395. }
  16396. *nclst = nfree; /* Return the free clusters */
  16397. 8006cee: 68bb ldr r3, [r7, #8]
  16398. 8006cf0: 6c3a ldr r2, [r7, #64] ; 0x40
  16399. 8006cf2: 601a str r2, [r3, #0]
  16400. fs->free_clst = nfree; /* Now free_clst is valid */
  16401. 8006cf4: 6abb ldr r3, [r7, #40] ; 0x28
  16402. 8006cf6: 6c3a ldr r2, [r7, #64] ; 0x40
  16403. 8006cf8: 619a str r2, [r3, #24]
  16404. fs->fsi_flag |= 1; /* FSInfo is to be updated */
  16405. 8006cfa: 6abb ldr r3, [r7, #40] ; 0x28
  16406. 8006cfc: 791a ldrb r2, [r3, #4]
  16407. 8006cfe: 6abb ldr r3, [r7, #40] ; 0x28
  16408. 8006d00: f042 0201 orr.w r2, r2, #1
  16409. 8006d04: b2d2 uxtb r2, r2
  16410. 8006d06: 711a strb r2, [r3, #4]
  16411. }
  16412. }
  16413. LEAVE_FF(fs, res);
  16414. 8006d08: f897 3047 ldrb.w r3, [r7, #71] ; 0x47
  16415. }
  16416. 8006d0c: 4618 mov r0, r3
  16417. 8006d0e: 3748 adds r7, #72 ; 0x48
  16418. 8006d10: 46bd mov sp, r7
  16419. 8006d12: bd80 pop {r7, pc}
  16420. 08006d14 <f_gets>:
  16421. TCHAR* f_gets (
  16422. TCHAR* buff, /* Pointer to the string buffer to read */
  16423. int len, /* Size of string buffer (characters) */
  16424. FIL* fp /* Pointer to the file object */
  16425. )
  16426. {
  16427. 8006d14: b580 push {r7, lr}
  16428. 8006d16: b088 sub sp, #32
  16429. 8006d18: af00 add r7, sp, #0
  16430. 8006d1a: 60f8 str r0, [r7, #12]
  16431. 8006d1c: 60b9 str r1, [r7, #8]
  16432. 8006d1e: 607a str r2, [r7, #4]
  16433. int n = 0;
  16434. 8006d20: 2300 movs r3, #0
  16435. 8006d22: 61fb str r3, [r7, #28]
  16436. TCHAR c, *p = buff;
  16437. 8006d24: 68fb ldr r3, [r7, #12]
  16438. 8006d26: 61bb str r3, [r7, #24]
  16439. BYTE s[2];
  16440. UINT rc;
  16441. while (n < len - 1) { /* Read characters until buffer gets filled */
  16442. 8006d28: e01b b.n 8006d62 <f_gets+0x4e>
  16443. }
  16444. c = ff_convert(c, 1); /* OEM -> Unicode */
  16445. if (!c) c = '?';
  16446. #endif
  16447. #else /* Read a character without conversion */
  16448. f_read(fp, s, 1, &rc);
  16449. 8006d2a: f107 0310 add.w r3, r7, #16
  16450. 8006d2e: f107 0114 add.w r1, r7, #20
  16451. 8006d32: 2201 movs r2, #1
  16452. 8006d34: 6878 ldr r0, [r7, #4]
  16453. 8006d36: f7ff fb9d bl 8006474 <f_read>
  16454. if (rc != 1) break;
  16455. 8006d3a: 693b ldr r3, [r7, #16]
  16456. 8006d3c: 2b01 cmp r3, #1
  16457. 8006d3e: d116 bne.n 8006d6e <f_gets+0x5a>
  16458. c = s[0];
  16459. 8006d40: 7d3b ldrb r3, [r7, #20]
  16460. 8006d42: 75fb strb r3, [r7, #23]
  16461. #endif
  16462. if (_USE_STRFUNC == 2 && c == '\r') continue; /* Strip '\r' */
  16463. 8006d44: 7dfb ldrb r3, [r7, #23]
  16464. 8006d46: 2b0d cmp r3, #13
  16465. 8006d48: d100 bne.n 8006d4c <f_gets+0x38>
  16466. 8006d4a: e00a b.n 8006d62 <f_gets+0x4e>
  16467. *p++ = c;
  16468. 8006d4c: 69bb ldr r3, [r7, #24]
  16469. 8006d4e: 1c5a adds r2, r3, #1
  16470. 8006d50: 61ba str r2, [r7, #24]
  16471. 8006d52: 7dfa ldrb r2, [r7, #23]
  16472. 8006d54: 701a strb r2, [r3, #0]
  16473. n++;
  16474. 8006d56: 69fb ldr r3, [r7, #28]
  16475. 8006d58: 3301 adds r3, #1
  16476. 8006d5a: 61fb str r3, [r7, #28]
  16477. if (c == '\n') break; /* Break on EOL */
  16478. 8006d5c: 7dfb ldrb r3, [r7, #23]
  16479. 8006d5e: 2b0a cmp r3, #10
  16480. 8006d60: d007 beq.n 8006d72 <f_gets+0x5e>
  16481. while (n < len - 1) { /* Read characters until buffer gets filled */
  16482. 8006d62: 68bb ldr r3, [r7, #8]
  16483. 8006d64: 3b01 subs r3, #1
  16484. 8006d66: 69fa ldr r2, [r7, #28]
  16485. 8006d68: 429a cmp r2, r3
  16486. 8006d6a: dbde blt.n 8006d2a <f_gets+0x16>
  16487. 8006d6c: e002 b.n 8006d74 <f_gets+0x60>
  16488. if (rc != 1) break;
  16489. 8006d6e: bf00 nop
  16490. 8006d70: e000 b.n 8006d74 <f_gets+0x60>
  16491. if (c == '\n') break; /* Break on EOL */
  16492. 8006d72: bf00 nop
  16493. }
  16494. *p = 0;
  16495. 8006d74: 69bb ldr r3, [r7, #24]
  16496. 8006d76: 2200 movs r2, #0
  16497. 8006d78: 701a strb r2, [r3, #0]
  16498. return n ? buff : 0; /* When no data read (eof or error), return with error. */
  16499. 8006d7a: 69fb ldr r3, [r7, #28]
  16500. 8006d7c: 2b00 cmp r3, #0
  16501. 8006d7e: d001 beq.n 8006d84 <f_gets+0x70>
  16502. 8006d80: 68fb ldr r3, [r7, #12]
  16503. 8006d82: e000 b.n 8006d86 <f_gets+0x72>
  16504. 8006d84: 2300 movs r3, #0
  16505. }
  16506. 8006d86: 4618 mov r0, r3
  16507. 8006d88: 3720 adds r7, #32
  16508. 8006d8a: 46bd mov sp, r7
  16509. 8006d8c: bd80 pop {r7, pc}
  16510. 08006d8e <putc_bfd>:
  16511. static
  16512. void putc_bfd ( /* Buffered write with code conversion */
  16513. putbuff* pb,
  16514. TCHAR c
  16515. )
  16516. {
  16517. 8006d8e: b580 push {r7, lr}
  16518. 8006d90: b084 sub sp, #16
  16519. 8006d92: af00 add r7, sp, #0
  16520. 8006d94: 6078 str r0, [r7, #4]
  16521. 8006d96: 460b mov r3, r1
  16522. 8006d98: 70fb strb r3, [r7, #3]
  16523. UINT bw;
  16524. int i;
  16525. if (_USE_STRFUNC == 2 && c == '\n') { /* LF -> CRLF conversion */
  16526. 8006d9a: 78fb ldrb r3, [r7, #3]
  16527. 8006d9c: 2b0a cmp r3, #10
  16528. 8006d9e: d103 bne.n 8006da8 <putc_bfd+0x1a>
  16529. putc_bfd(pb, '\r');
  16530. 8006da0: 210d movs r1, #13
  16531. 8006da2: 6878 ldr r0, [r7, #4]
  16532. 8006da4: f7ff fff3 bl 8006d8e <putc_bfd>
  16533. }
  16534. i = pb->idx; /* Write index of pb->buf[] */
  16535. 8006da8: 687b ldr r3, [r7, #4]
  16536. 8006daa: 685b ldr r3, [r3, #4]
  16537. 8006dac: 60fb str r3, [r7, #12]
  16538. if (i < 0) return;
  16539. 8006dae: 68fb ldr r3, [r7, #12]
  16540. 8006db0: 2b00 cmp r3, #0
  16541. 8006db2: db25 blt.n 8006e00 <putc_bfd+0x72>
  16542. if (c >= 0x100)
  16543. pb->buf[i++] = (BYTE)(c >> 8);
  16544. pb->buf[i++] = (BYTE)c;
  16545. #endif
  16546. #else /* Write a character without conversion */
  16547. pb->buf[i++] = (BYTE)c;
  16548. 8006db4: 68fb ldr r3, [r7, #12]
  16549. 8006db6: 1c5a adds r2, r3, #1
  16550. 8006db8: 60fa str r2, [r7, #12]
  16551. 8006dba: 687a ldr r2, [r7, #4]
  16552. 8006dbc: 4413 add r3, r2
  16553. 8006dbe: 78fa ldrb r2, [r7, #3]
  16554. 8006dc0: 731a strb r2, [r3, #12]
  16555. #endif
  16556. if (i >= (int)(sizeof pb->buf) - 3) { /* Write buffered characters to the file */
  16557. 8006dc2: 68fb ldr r3, [r7, #12]
  16558. 8006dc4: 2b3c cmp r3, #60 ; 0x3c
  16559. 8006dc6: dd12 ble.n 8006dee <putc_bfd+0x60>
  16560. f_write(pb->fp, pb->buf, (UINT)i, &bw);
  16561. 8006dc8: 687b ldr r3, [r7, #4]
  16562. 8006dca: 6818 ldr r0, [r3, #0]
  16563. 8006dcc: 687b ldr r3, [r7, #4]
  16564. 8006dce: f103 010c add.w r1, r3, #12
  16565. 8006dd2: 68fa ldr r2, [r7, #12]
  16566. 8006dd4: f107 0308 add.w r3, r7, #8
  16567. 8006dd8: f7ff fcab bl 8006732 <f_write>
  16568. i = (bw == (UINT)i) ? 0 : -1;
  16569. 8006ddc: 68ba ldr r2, [r7, #8]
  16570. 8006dde: 68fb ldr r3, [r7, #12]
  16571. 8006de0: 429a cmp r2, r3
  16572. 8006de2: d101 bne.n 8006de8 <putc_bfd+0x5a>
  16573. 8006de4: 2300 movs r3, #0
  16574. 8006de6: e001 b.n 8006dec <putc_bfd+0x5e>
  16575. 8006de8: f04f 33ff mov.w r3, #4294967295
  16576. 8006dec: 60fb str r3, [r7, #12]
  16577. }
  16578. pb->idx = i;
  16579. 8006dee: 687b ldr r3, [r7, #4]
  16580. 8006df0: 68fa ldr r2, [r7, #12]
  16581. 8006df2: 605a str r2, [r3, #4]
  16582. pb->nchr++;
  16583. 8006df4: 687b ldr r3, [r7, #4]
  16584. 8006df6: 689b ldr r3, [r3, #8]
  16585. 8006df8: 1c5a adds r2, r3, #1
  16586. 8006dfa: 687b ldr r3, [r7, #4]
  16587. 8006dfc: 609a str r2, [r3, #8]
  16588. 8006dfe: e000 b.n 8006e02 <putc_bfd+0x74>
  16589. if (i < 0) return;
  16590. 8006e00: bf00 nop
  16591. }
  16592. 8006e02: 3710 adds r7, #16
  16593. 8006e04: 46bd mov sp, r7
  16594. 8006e06: bd80 pop {r7, pc}
  16595. 08006e08 <putc_flush>:
  16596. static
  16597. int putc_flush ( /* Flush left characters in the buffer */
  16598. putbuff* pb
  16599. )
  16600. {
  16601. 8006e08: b580 push {r7, lr}
  16602. 8006e0a: b084 sub sp, #16
  16603. 8006e0c: af00 add r7, sp, #0
  16604. 8006e0e: 6078 str r0, [r7, #4]
  16605. UINT nw;
  16606. if ( pb->idx >= 0 /* Flush buffered characters to the file */
  16607. 8006e10: 687b ldr r3, [r7, #4]
  16608. 8006e12: 685b ldr r3, [r3, #4]
  16609. 8006e14: 2b00 cmp r3, #0
  16610. 8006e16: db17 blt.n 8006e48 <putc_flush+0x40>
  16611. && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK
  16612. 8006e18: 687b ldr r3, [r7, #4]
  16613. 8006e1a: 6818 ldr r0, [r3, #0]
  16614. 8006e1c: 687b ldr r3, [r7, #4]
  16615. 8006e1e: f103 010c add.w r1, r3, #12
  16616. 8006e22: 687b ldr r3, [r7, #4]
  16617. 8006e24: 685b ldr r3, [r3, #4]
  16618. 8006e26: 461a mov r2, r3
  16619. 8006e28: f107 030c add.w r3, r7, #12
  16620. 8006e2c: f7ff fc81 bl 8006732 <f_write>
  16621. 8006e30: 4603 mov r3, r0
  16622. 8006e32: 2b00 cmp r3, #0
  16623. 8006e34: d108 bne.n 8006e48 <putc_flush+0x40>
  16624. && (UINT)pb->idx == nw) return pb->nchr;
  16625. 8006e36: 687b ldr r3, [r7, #4]
  16626. 8006e38: 685b ldr r3, [r3, #4]
  16627. 8006e3a: 461a mov r2, r3
  16628. 8006e3c: 68fb ldr r3, [r7, #12]
  16629. 8006e3e: 429a cmp r2, r3
  16630. 8006e40: d102 bne.n 8006e48 <putc_flush+0x40>
  16631. 8006e42: 687b ldr r3, [r7, #4]
  16632. 8006e44: 689b ldr r3, [r3, #8]
  16633. 8006e46: e001 b.n 8006e4c <putc_flush+0x44>
  16634. return EOF;
  16635. 8006e48: f04f 33ff mov.w r3, #4294967295
  16636. }
  16637. 8006e4c: 4618 mov r0, r3
  16638. 8006e4e: 3710 adds r7, #16
  16639. 8006e50: 46bd mov sp, r7
  16640. 8006e52: bd80 pop {r7, pc}
  16641. 08006e54 <putc_init>:
  16642. static
  16643. void putc_init ( /* Initialize write buffer */
  16644. putbuff* pb,
  16645. FIL* fp
  16646. )
  16647. {
  16648. 8006e54: b480 push {r7}
  16649. 8006e56: b083 sub sp, #12
  16650. 8006e58: af00 add r7, sp, #0
  16651. 8006e5a: 6078 str r0, [r7, #4]
  16652. 8006e5c: 6039 str r1, [r7, #0]
  16653. pb->fp = fp;
  16654. 8006e5e: 687b ldr r3, [r7, #4]
  16655. 8006e60: 683a ldr r2, [r7, #0]
  16656. 8006e62: 601a str r2, [r3, #0]
  16657. pb->nchr = pb->idx = 0;
  16658. 8006e64: 687b ldr r3, [r7, #4]
  16659. 8006e66: 2200 movs r2, #0
  16660. 8006e68: 605a str r2, [r3, #4]
  16661. 8006e6a: 687b ldr r3, [r7, #4]
  16662. 8006e6c: 685a ldr r2, [r3, #4]
  16663. 8006e6e: 687b ldr r3, [r7, #4]
  16664. 8006e70: 609a str r2, [r3, #8]
  16665. }
  16666. 8006e72: bf00 nop
  16667. 8006e74: 370c adds r7, #12
  16668. 8006e76: 46bd mov sp, r7
  16669. 8006e78: bc80 pop {r7}
  16670. 8006e7a: 4770 bx lr
  16671. 08006e7c <f_puts>:
  16672. int f_puts (
  16673. const TCHAR* str, /* Pointer to the string to be output */
  16674. FIL* fp /* Pointer to the file object */
  16675. )
  16676. {
  16677. 8006e7c: b580 push {r7, lr}
  16678. 8006e7e: b096 sub sp, #88 ; 0x58
  16679. 8006e80: af00 add r7, sp, #0
  16680. 8006e82: 6078 str r0, [r7, #4]
  16681. 8006e84: 6039 str r1, [r7, #0]
  16682. putbuff pb;
  16683. putc_init(&pb, fp);
  16684. 8006e86: f107 030c add.w r3, r7, #12
  16685. 8006e8a: 6839 ldr r1, [r7, #0]
  16686. 8006e8c: 4618 mov r0, r3
  16687. 8006e8e: f7ff ffe1 bl 8006e54 <putc_init>
  16688. while (*str) putc_bfd(&pb, *str++); /* Put the string */
  16689. 8006e92: e009 b.n 8006ea8 <f_puts+0x2c>
  16690. 8006e94: 687b ldr r3, [r7, #4]
  16691. 8006e96: 1c5a adds r2, r3, #1
  16692. 8006e98: 607a str r2, [r7, #4]
  16693. 8006e9a: 781a ldrb r2, [r3, #0]
  16694. 8006e9c: f107 030c add.w r3, r7, #12
  16695. 8006ea0: 4611 mov r1, r2
  16696. 8006ea2: 4618 mov r0, r3
  16697. 8006ea4: f7ff ff73 bl 8006d8e <putc_bfd>
  16698. 8006ea8: 687b ldr r3, [r7, #4]
  16699. 8006eaa: 781b ldrb r3, [r3, #0]
  16700. 8006eac: 2b00 cmp r3, #0
  16701. 8006eae: d1f1 bne.n 8006e94 <f_puts+0x18>
  16702. return putc_flush(&pb);
  16703. 8006eb0: f107 030c add.w r3, r7, #12
  16704. 8006eb4: 4618 mov r0, r3
  16705. 8006eb6: f7ff ffa7 bl 8006e08 <putc_flush>
  16706. 8006eba: 4603 mov r3, r0
  16707. }
  16708. 8006ebc: 4618 mov r0, r3
  16709. 8006ebe: 3758 adds r7, #88 ; 0x58
  16710. 8006ec0: 46bd mov sp, r7
  16711. 8006ec2: bd80 pop {r7, pc}
  16712. 08006ec4 <FATFS_LinkDriverEx>:
  16713. * @param lun : only used for USB Key Disk to add multi-lun management
  16714. else the parameter must be equal to 0
  16715. * @retval Returns 0 in case of success, otherwise 1.
  16716. */
  16717. uint8_t FATFS_LinkDriverEx(const Diskio_drvTypeDef *drv, char *path, uint8_t lun)
  16718. {
  16719. 8006ec4: b480 push {r7}
  16720. 8006ec6: b087 sub sp, #28
  16721. 8006ec8: af00 add r7, sp, #0
  16722. 8006eca: 60f8 str r0, [r7, #12]
  16723. 8006ecc: 60b9 str r1, [r7, #8]
  16724. 8006ece: 4613 mov r3, r2
  16725. 8006ed0: 71fb strb r3, [r7, #7]
  16726. uint8_t ret = 1;
  16727. 8006ed2: 2301 movs r3, #1
  16728. 8006ed4: 75fb strb r3, [r7, #23]
  16729. uint8_t DiskNum = 0;
  16730. 8006ed6: 2300 movs r3, #0
  16731. 8006ed8: 75bb strb r3, [r7, #22]
  16732. if(disk.nbr < _VOLUMES)
  16733. 8006eda: 4b1e ldr r3, [pc, #120] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16734. 8006edc: 7a5b ldrb r3, [r3, #9]
  16735. 8006ede: b2db uxtb r3, r3
  16736. 8006ee0: 2b00 cmp r3, #0
  16737. 8006ee2: d131 bne.n 8006f48 <FATFS_LinkDriverEx+0x84>
  16738. {
  16739. disk.is_initialized[disk.nbr] = 0;
  16740. 8006ee4: 4b1b ldr r3, [pc, #108] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16741. 8006ee6: 7a5b ldrb r3, [r3, #9]
  16742. 8006ee8: b2db uxtb r3, r3
  16743. 8006eea: 461a mov r2, r3
  16744. 8006eec: 4b19 ldr r3, [pc, #100] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16745. 8006eee: 2100 movs r1, #0
  16746. 8006ef0: 5499 strb r1, [r3, r2]
  16747. disk.drv[disk.nbr] = drv;
  16748. 8006ef2: 4b18 ldr r3, [pc, #96] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16749. 8006ef4: 7a5b ldrb r3, [r3, #9]
  16750. 8006ef6: b2db uxtb r3, r3
  16751. 8006ef8: 4a16 ldr r2, [pc, #88] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16752. 8006efa: 009b lsls r3, r3, #2
  16753. 8006efc: 4413 add r3, r2
  16754. 8006efe: 68fa ldr r2, [r7, #12]
  16755. 8006f00: 605a str r2, [r3, #4]
  16756. disk.lun[disk.nbr] = lun;
  16757. 8006f02: 4b14 ldr r3, [pc, #80] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16758. 8006f04: 7a5b ldrb r3, [r3, #9]
  16759. 8006f06: b2db uxtb r3, r3
  16760. 8006f08: 461a mov r2, r3
  16761. 8006f0a: 4b12 ldr r3, [pc, #72] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16762. 8006f0c: 4413 add r3, r2
  16763. 8006f0e: 79fa ldrb r2, [r7, #7]
  16764. 8006f10: 721a strb r2, [r3, #8]
  16765. DiskNum = disk.nbr++;
  16766. 8006f12: 4b10 ldr r3, [pc, #64] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16767. 8006f14: 7a5b ldrb r3, [r3, #9]
  16768. 8006f16: b2db uxtb r3, r3
  16769. 8006f18: 1c5a adds r2, r3, #1
  16770. 8006f1a: b2d1 uxtb r1, r2
  16771. 8006f1c: 4a0d ldr r2, [pc, #52] ; (8006f54 <FATFS_LinkDriverEx+0x90>)
  16772. 8006f1e: 7251 strb r1, [r2, #9]
  16773. 8006f20: 75bb strb r3, [r7, #22]
  16774. path[0] = DiskNum + '0';
  16775. 8006f22: 7dbb ldrb r3, [r7, #22]
  16776. 8006f24: 3330 adds r3, #48 ; 0x30
  16777. 8006f26: b2da uxtb r2, r3
  16778. 8006f28: 68bb ldr r3, [r7, #8]
  16779. 8006f2a: 701a strb r2, [r3, #0]
  16780. path[1] = ':';
  16781. 8006f2c: 68bb ldr r3, [r7, #8]
  16782. 8006f2e: 3301 adds r3, #1
  16783. 8006f30: 223a movs r2, #58 ; 0x3a
  16784. 8006f32: 701a strb r2, [r3, #0]
  16785. path[2] = '/';
  16786. 8006f34: 68bb ldr r3, [r7, #8]
  16787. 8006f36: 3302 adds r3, #2
  16788. 8006f38: 222f movs r2, #47 ; 0x2f
  16789. 8006f3a: 701a strb r2, [r3, #0]
  16790. path[3] = 0;
  16791. 8006f3c: 68bb ldr r3, [r7, #8]
  16792. 8006f3e: 3303 adds r3, #3
  16793. 8006f40: 2200 movs r2, #0
  16794. 8006f42: 701a strb r2, [r3, #0]
  16795. ret = 0;
  16796. 8006f44: 2300 movs r3, #0
  16797. 8006f46: 75fb strb r3, [r7, #23]
  16798. }
  16799. return ret;
  16800. 8006f48: 7dfb ldrb r3, [r7, #23]
  16801. }
  16802. 8006f4a: 4618 mov r0, r3
  16803. 8006f4c: 371c adds r7, #28
  16804. 8006f4e: 46bd mov sp, r7
  16805. 8006f50: bc80 pop {r7}
  16806. 8006f52: 4770 bx lr
  16807. 8006f54: 200002d4 .word 0x200002d4
  16808. 08006f58 <FATFS_LinkDriver>:
  16809. * @param drv: pointer to the disk IO Driver structure
  16810. * @param path: pointer to the logical drive path
  16811. * @retval Returns 0 in case of success, otherwise 1.
  16812. */
  16813. uint8_t FATFS_LinkDriver(const Diskio_drvTypeDef *drv, char *path)
  16814. {
  16815. 8006f58: b580 push {r7, lr}
  16816. 8006f5a: b082 sub sp, #8
  16817. 8006f5c: af00 add r7, sp, #0
  16818. 8006f5e: 6078 str r0, [r7, #4]
  16819. 8006f60: 6039 str r1, [r7, #0]
  16820. return FATFS_LinkDriverEx(drv, path, 0);
  16821. 8006f62: 2200 movs r2, #0
  16822. 8006f64: 6839 ldr r1, [r7, #0]
  16823. 8006f66: 6878 ldr r0, [r7, #4]
  16824. 8006f68: f7ff ffac bl 8006ec4 <FATFS_LinkDriverEx>
  16825. 8006f6c: 4603 mov r3, r0
  16826. }
  16827. 8006f6e: 4618 mov r0, r3
  16828. 8006f70: 3708 adds r7, #8
  16829. 8006f72: 46bd mov sp, r7
  16830. 8006f74: bd80 pop {r7, pc}
  16831. ...
  16832. 08006f78 <ff_convert>:
  16833. WCHAR ff_convert ( /* Converted character, Returns zero on error */
  16834. WCHAR chr, /* Character code to be converted */
  16835. UINT dir /* 0: Unicode to OEM code, 1: OEM code to Unicode */
  16836. )
  16837. {
  16838. 8006f78: b480 push {r7}
  16839. 8006f7a: b085 sub sp, #20
  16840. 8006f7c: af00 add r7, sp, #0
  16841. 8006f7e: 4603 mov r3, r0
  16842. 8006f80: 6039 str r1, [r7, #0]
  16843. 8006f82: 80fb strh r3, [r7, #6]
  16844. WCHAR c;
  16845. if (chr < 0x80) { /* ASCII */
  16846. 8006f84: 88fb ldrh r3, [r7, #6]
  16847. 8006f86: 2b7f cmp r3, #127 ; 0x7f
  16848. 8006f88: d802 bhi.n 8006f90 <ff_convert+0x18>
  16849. c = chr;
  16850. 8006f8a: 88fb ldrh r3, [r7, #6]
  16851. 8006f8c: 81fb strh r3, [r7, #14]
  16852. 8006f8e: e025 b.n 8006fdc <ff_convert+0x64>
  16853. } else {
  16854. if (dir) { /* OEM code to Unicode */
  16855. 8006f90: 683b ldr r3, [r7, #0]
  16856. 8006f92: 2b00 cmp r3, #0
  16857. 8006f94: d00b beq.n 8006fae <ff_convert+0x36>
  16858. c = (chr >= 0x100) ? 0 : Tbl[chr - 0x80];
  16859. 8006f96: 88fb ldrh r3, [r7, #6]
  16860. 8006f98: 2bff cmp r3, #255 ; 0xff
  16861. 8006f9a: d805 bhi.n 8006fa8 <ff_convert+0x30>
  16862. 8006f9c: 88fb ldrh r3, [r7, #6]
  16863. 8006f9e: 3b80 subs r3, #128 ; 0x80
  16864. 8006fa0: 4a11 ldr r2, [pc, #68] ; (8006fe8 <ff_convert+0x70>)
  16865. 8006fa2: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
  16866. 8006fa6: e000 b.n 8006faa <ff_convert+0x32>
  16867. 8006fa8: 2300 movs r3, #0
  16868. 8006faa: 81fb strh r3, [r7, #14]
  16869. 8006fac: e016 b.n 8006fdc <ff_convert+0x64>
  16870. } else { /* Unicode to OEM code */
  16871. for (c = 0; c < 0x80; c++) {
  16872. 8006fae: 2300 movs r3, #0
  16873. 8006fb0: 81fb strh r3, [r7, #14]
  16874. 8006fb2: e009 b.n 8006fc8 <ff_convert+0x50>
  16875. if (chr == Tbl[c]) break;
  16876. 8006fb4: 89fb ldrh r3, [r7, #14]
  16877. 8006fb6: 4a0c ldr r2, [pc, #48] ; (8006fe8 <ff_convert+0x70>)
  16878. 8006fb8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
  16879. 8006fbc: 88fa ldrh r2, [r7, #6]
  16880. 8006fbe: 429a cmp r2, r3
  16881. 8006fc0: d006 beq.n 8006fd0 <ff_convert+0x58>
  16882. for (c = 0; c < 0x80; c++) {
  16883. 8006fc2: 89fb ldrh r3, [r7, #14]
  16884. 8006fc4: 3301 adds r3, #1
  16885. 8006fc6: 81fb strh r3, [r7, #14]
  16886. 8006fc8: 89fb ldrh r3, [r7, #14]
  16887. 8006fca: 2b7f cmp r3, #127 ; 0x7f
  16888. 8006fcc: d9f2 bls.n 8006fb4 <ff_convert+0x3c>
  16889. 8006fce: e000 b.n 8006fd2 <ff_convert+0x5a>
  16890. if (chr == Tbl[c]) break;
  16891. 8006fd0: bf00 nop
  16892. }
  16893. c = (c + 0x80) & 0xFF;
  16894. 8006fd2: 89fb ldrh r3, [r7, #14]
  16895. 8006fd4: 3380 adds r3, #128 ; 0x80
  16896. 8006fd6: b29b uxth r3, r3
  16897. 8006fd8: b2db uxtb r3, r3
  16898. 8006fda: 81fb strh r3, [r7, #14]
  16899. }
  16900. }
  16901. return c;
  16902. 8006fdc: 89fb ldrh r3, [r7, #14]
  16903. }
  16904. 8006fde: 4618 mov r0, r3
  16905. 8006fe0: 3714 adds r7, #20
  16906. 8006fe2: 46bd mov sp, r7
  16907. 8006fe4: bc80 pop {r7}
  16908. 8006fe6: 4770 bx lr
  16909. 8006fe8: 08007bd8 .word 0x08007bd8
  16910. 08006fec <ff_wtoupper>:
  16911. WCHAR ff_wtoupper ( /* Returns upper converted character */
  16912. WCHAR chr /* Unicode character to be upper converted (BMP only) */
  16913. )
  16914. {
  16915. 8006fec: b480 push {r7}
  16916. 8006fee: b087 sub sp, #28
  16917. 8006ff0: af00 add r7, sp, #0
  16918. 8006ff2: 4603 mov r3, r0
  16919. 8006ff4: 80fb strh r3, [r7, #6]
  16920. };
  16921. const WCHAR *p;
  16922. WCHAR bc, nc, cmd;
  16923. p = chr < 0x1000 ? cvt1 : cvt2;
  16924. 8006ff6: 88fb ldrh r3, [r7, #6]
  16925. 8006ff8: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
  16926. 8006ffc: d201 bcs.n 8007002 <ff_wtoupper+0x16>
  16927. 8006ffe: 4b3d ldr r3, [pc, #244] ; (80070f4 <ff_wtoupper+0x108>)
  16928. 8007000: e000 b.n 8007004 <ff_wtoupper+0x18>
  16929. 8007002: 4b3d ldr r3, [pc, #244] ; (80070f8 <ff_wtoupper+0x10c>)
  16930. 8007004: 617b str r3, [r7, #20]
  16931. for (;;) {
  16932. bc = *p++; /* Get block base */
  16933. 8007006: 697b ldr r3, [r7, #20]
  16934. 8007008: 1c9a adds r2, r3, #2
  16935. 800700a: 617a str r2, [r7, #20]
  16936. 800700c: 881b ldrh r3, [r3, #0]
  16937. 800700e: 827b strh r3, [r7, #18]
  16938. if (!bc || chr < bc) break;
  16939. 8007010: 8a7b ldrh r3, [r7, #18]
  16940. 8007012: 2b00 cmp r3, #0
  16941. 8007014: d068 beq.n 80070e8 <ff_wtoupper+0xfc>
  16942. 8007016: 88fa ldrh r2, [r7, #6]
  16943. 8007018: 8a7b ldrh r3, [r7, #18]
  16944. 800701a: 429a cmp r2, r3
  16945. 800701c: d364 bcc.n 80070e8 <ff_wtoupper+0xfc>
  16946. nc = *p++; cmd = nc >> 8; nc &= 0xFF; /* Get processing command and block size */
  16947. 800701e: 697b ldr r3, [r7, #20]
  16948. 8007020: 1c9a adds r2, r3, #2
  16949. 8007022: 617a str r2, [r7, #20]
  16950. 8007024: 881b ldrh r3, [r3, #0]
  16951. 8007026: 823b strh r3, [r7, #16]
  16952. 8007028: 8a3b ldrh r3, [r7, #16]
  16953. 800702a: 0a1b lsrs r3, r3, #8
  16954. 800702c: 81fb strh r3, [r7, #14]
  16955. 800702e: 8a3b ldrh r3, [r7, #16]
  16956. 8007030: b2db uxtb r3, r3
  16957. 8007032: 823b strh r3, [r7, #16]
  16958. if (chr < bc + nc) { /* In the block? */
  16959. 8007034: 88fa ldrh r2, [r7, #6]
  16960. 8007036: 8a79 ldrh r1, [r7, #18]
  16961. 8007038: 8a3b ldrh r3, [r7, #16]
  16962. 800703a: 440b add r3, r1
  16963. 800703c: 429a cmp r2, r3
  16964. 800703e: da49 bge.n 80070d4 <ff_wtoupper+0xe8>
  16965. switch (cmd) {
  16966. 8007040: 89fb ldrh r3, [r7, #14]
  16967. 8007042: 2b08 cmp r3, #8
  16968. 8007044: d84f bhi.n 80070e6 <ff_wtoupper+0xfa>
  16969. 8007046: a201 add r2, pc, #4 ; (adr r2, 800704c <ff_wtoupper+0x60>)
  16970. 8007048: f852 f023 ldr.w pc, [r2, r3, lsl #2]
  16971. 800704c: 08007071 .word 0x08007071
  16972. 8007050: 08007083 .word 0x08007083
  16973. 8007054: 08007099 .word 0x08007099
  16974. 8007058: 080070a1 .word 0x080070a1
  16975. 800705c: 080070a9 .word 0x080070a9
  16976. 8007060: 080070b1 .word 0x080070b1
  16977. 8007064: 080070b9 .word 0x080070b9
  16978. 8007068: 080070c1 .word 0x080070c1
  16979. 800706c: 080070c9 .word 0x080070c9
  16980. case 0: chr = p[chr - bc]; break; /* Table conversion */
  16981. 8007070: 88fa ldrh r2, [r7, #6]
  16982. 8007072: 8a7b ldrh r3, [r7, #18]
  16983. 8007074: 1ad3 subs r3, r2, r3
  16984. 8007076: 005b lsls r3, r3, #1
  16985. 8007078: 697a ldr r2, [r7, #20]
  16986. 800707a: 4413 add r3, r2
  16987. 800707c: 881b ldrh r3, [r3, #0]
  16988. 800707e: 80fb strh r3, [r7, #6]
  16989. 8007080: e027 b.n 80070d2 <ff_wtoupper+0xe6>
  16990. case 1: chr -= (chr - bc) & 1; break; /* Case pairs */
  16991. 8007082: 88fa ldrh r2, [r7, #6]
  16992. 8007084: 8a7b ldrh r3, [r7, #18]
  16993. 8007086: 1ad3 subs r3, r2, r3
  16994. 8007088: b29b uxth r3, r3
  16995. 800708a: f003 0301 and.w r3, r3, #1
  16996. 800708e: b29b uxth r3, r3
  16997. 8007090: 88fa ldrh r2, [r7, #6]
  16998. 8007092: 1ad3 subs r3, r2, r3
  16999. 8007094: 80fb strh r3, [r7, #6]
  17000. 8007096: e01c b.n 80070d2 <ff_wtoupper+0xe6>
  17001. case 2: chr -= 16; break; /* Shift -16 */
  17002. 8007098: 88fb ldrh r3, [r7, #6]
  17003. 800709a: 3b10 subs r3, #16
  17004. 800709c: 80fb strh r3, [r7, #6]
  17005. 800709e: e018 b.n 80070d2 <ff_wtoupper+0xe6>
  17006. case 3: chr -= 32; break; /* Shift -32 */
  17007. 80070a0: 88fb ldrh r3, [r7, #6]
  17008. 80070a2: 3b20 subs r3, #32
  17009. 80070a4: 80fb strh r3, [r7, #6]
  17010. 80070a6: e014 b.n 80070d2 <ff_wtoupper+0xe6>
  17011. case 4: chr -= 48; break; /* Shift -48 */
  17012. 80070a8: 88fb ldrh r3, [r7, #6]
  17013. 80070aa: 3b30 subs r3, #48 ; 0x30
  17014. 80070ac: 80fb strh r3, [r7, #6]
  17015. 80070ae: e010 b.n 80070d2 <ff_wtoupper+0xe6>
  17016. case 5: chr -= 26; break; /* Shift -26 */
  17017. 80070b0: 88fb ldrh r3, [r7, #6]
  17018. 80070b2: 3b1a subs r3, #26
  17019. 80070b4: 80fb strh r3, [r7, #6]
  17020. 80070b6: e00c b.n 80070d2 <ff_wtoupper+0xe6>
  17021. case 6: chr += 8; break; /* Shift +8 */
  17022. 80070b8: 88fb ldrh r3, [r7, #6]
  17023. 80070ba: 3308 adds r3, #8
  17024. 80070bc: 80fb strh r3, [r7, #6]
  17025. 80070be: e008 b.n 80070d2 <ff_wtoupper+0xe6>
  17026. case 7: chr -= 80; break; /* Shift -80 */
  17027. 80070c0: 88fb ldrh r3, [r7, #6]
  17028. 80070c2: 3b50 subs r3, #80 ; 0x50
  17029. 80070c4: 80fb strh r3, [r7, #6]
  17030. 80070c6: e004 b.n 80070d2 <ff_wtoupper+0xe6>
  17031. case 8: chr -= 0x1C60; break; /* Shift -0x1C60 */
  17032. 80070c8: 88fb ldrh r3, [r7, #6]
  17033. 80070ca: f5a3 53e3 sub.w r3, r3, #7264 ; 0x1c60
  17034. 80070ce: 80fb strh r3, [r7, #6]
  17035. 80070d0: bf00 nop
  17036. }
  17037. break;
  17038. 80070d2: e008 b.n 80070e6 <ff_wtoupper+0xfa>
  17039. }
  17040. if (!cmd) p += nc;
  17041. 80070d4: 89fb ldrh r3, [r7, #14]
  17042. 80070d6: 2b00 cmp r3, #0
  17043. 80070d8: d195 bne.n 8007006 <ff_wtoupper+0x1a>
  17044. 80070da: 8a3b ldrh r3, [r7, #16]
  17045. 80070dc: 005b lsls r3, r3, #1
  17046. 80070de: 697a ldr r2, [r7, #20]
  17047. 80070e0: 4413 add r3, r2
  17048. 80070e2: 617b str r3, [r7, #20]
  17049. bc = *p++; /* Get block base */
  17050. 80070e4: e78f b.n 8007006 <ff_wtoupper+0x1a>
  17051. break;
  17052. 80070e6: bf00 nop
  17053. }
  17054. return chr;
  17055. 80070e8: 88fb ldrh r3, [r7, #6]
  17056. }
  17057. 80070ea: 4618 mov r0, r3
  17058. 80070ec: 371c adds r7, #28
  17059. 80070ee: 46bd mov sp, r7
  17060. 80070f0: bc80 pop {r7}
  17061. 80070f2: 4770 bx lr
  17062. 80070f4: 08007cd8 .word 0x08007cd8
  17063. 80070f8: 08007ecc .word 0x08007ecc
  17064. 080070fc <__errno>:
  17065. 80070fc: 4b01 ldr r3, [pc, #4] ; (8007104 <__errno+0x8>)
  17066. 80070fe: 6818 ldr r0, [r3, #0]
  17067. 8007100: 4770 bx lr
  17068. 8007102: bf00 nop
  17069. 8007104: 20000024 .word 0x20000024
  17070. 08007108 <__libc_init_array>:
  17071. 8007108: b570 push {r4, r5, r6, lr}
  17072. 800710a: 2500 movs r5, #0
  17073. 800710c: 4e0c ldr r6, [pc, #48] ; (8007140 <__libc_init_array+0x38>)
  17074. 800710e: 4c0d ldr r4, [pc, #52] ; (8007144 <__libc_init_array+0x3c>)
  17075. 8007110: 1ba4 subs r4, r4, r6
  17076. 8007112: 10a4 asrs r4, r4, #2
  17077. 8007114: 42a5 cmp r5, r4
  17078. 8007116: d109 bne.n 800712c <__libc_init_array+0x24>
  17079. 8007118: f000 fc3c bl 8007994 <_init>
  17080. 800711c: 2500 movs r5, #0
  17081. 800711e: 4e0a ldr r6, [pc, #40] ; (8007148 <__libc_init_array+0x40>)
  17082. 8007120: 4c0a ldr r4, [pc, #40] ; (800714c <__libc_init_array+0x44>)
  17083. 8007122: 1ba4 subs r4, r4, r6
  17084. 8007124: 10a4 asrs r4, r4, #2
  17085. 8007126: 42a5 cmp r5, r4
  17086. 8007128: d105 bne.n 8007136 <__libc_init_array+0x2e>
  17087. 800712a: bd70 pop {r4, r5, r6, pc}
  17088. 800712c: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  17089. 8007130: 4798 blx r3
  17090. 8007132: 3501 adds r5, #1
  17091. 8007134: e7ee b.n 8007114 <__libc_init_array+0xc>
  17092. 8007136: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  17093. 800713a: 4798 blx r3
  17094. 800713c: 3501 adds r5, #1
  17095. 800713e: e7f2 b.n 8007126 <__libc_init_array+0x1e>
  17096. 8007140: 08007fc4 .word 0x08007fc4
  17097. 8007144: 08007fc4 .word 0x08007fc4
  17098. 8007148: 08007fc4 .word 0x08007fc4
  17099. 800714c: 08007fc8 .word 0x08007fc8
  17100. 08007150 <memset>:
  17101. 8007150: 4603 mov r3, r0
  17102. 8007152: 4402 add r2, r0
  17103. 8007154: 4293 cmp r3, r2
  17104. 8007156: d100 bne.n 800715a <memset+0xa>
  17105. 8007158: 4770 bx lr
  17106. 800715a: f803 1b01 strb.w r1, [r3], #1
  17107. 800715e: e7f9 b.n 8007154 <memset+0x4>
  17108. 08007160 <siprintf>:
  17109. 8007160: b40e push {r1, r2, r3}
  17110. 8007162: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
  17111. 8007166: b500 push {lr}
  17112. 8007168: b09c sub sp, #112 ; 0x70
  17113. 800716a: ab1d add r3, sp, #116 ; 0x74
  17114. 800716c: 9002 str r0, [sp, #8]
  17115. 800716e: 9006 str r0, [sp, #24]
  17116. 8007170: 9107 str r1, [sp, #28]
  17117. 8007172: 9104 str r1, [sp, #16]
  17118. 8007174: 4808 ldr r0, [pc, #32] ; (8007198 <siprintf+0x38>)
  17119. 8007176: 4909 ldr r1, [pc, #36] ; (800719c <siprintf+0x3c>)
  17120. 8007178: f853 2b04 ldr.w r2, [r3], #4
  17121. 800717c: 9105 str r1, [sp, #20]
  17122. 800717e: 6800 ldr r0, [r0, #0]
  17123. 8007180: a902 add r1, sp, #8
  17124. 8007182: 9301 str r3, [sp, #4]
  17125. 8007184: f000 f86e bl 8007264 <_svfiprintf_r>
  17126. 8007188: 2200 movs r2, #0
  17127. 800718a: 9b02 ldr r3, [sp, #8]
  17128. 800718c: 701a strb r2, [r3, #0]
  17129. 800718e: b01c add sp, #112 ; 0x70
  17130. 8007190: f85d eb04 ldr.w lr, [sp], #4
  17131. 8007194: b003 add sp, #12
  17132. 8007196: 4770 bx lr
  17133. 8007198: 20000024 .word 0x20000024
  17134. 800719c: ffff0208 .word 0xffff0208
  17135. 080071a0 <strcpy>:
  17136. 80071a0: 4603 mov r3, r0
  17137. 80071a2: f811 2b01 ldrb.w r2, [r1], #1
  17138. 80071a6: f803 2b01 strb.w r2, [r3], #1
  17139. 80071aa: 2a00 cmp r2, #0
  17140. 80071ac: d1f9 bne.n 80071a2 <strcpy+0x2>
  17141. 80071ae: 4770 bx lr
  17142. 080071b0 <__ssputs_r>:
  17143. 80071b0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  17144. 80071b4: 688e ldr r6, [r1, #8]
  17145. 80071b6: 4682 mov sl, r0
  17146. 80071b8: 429e cmp r6, r3
  17147. 80071ba: 460c mov r4, r1
  17148. 80071bc: 4690 mov r8, r2
  17149. 80071be: 4699 mov r9, r3
  17150. 80071c0: d837 bhi.n 8007232 <__ssputs_r+0x82>
  17151. 80071c2: 898a ldrh r2, [r1, #12]
  17152. 80071c4: f412 6f90 tst.w r2, #1152 ; 0x480
  17153. 80071c8: d031 beq.n 800722e <__ssputs_r+0x7e>
  17154. 80071ca: 2302 movs r3, #2
  17155. 80071cc: 6825 ldr r5, [r4, #0]
  17156. 80071ce: 6909 ldr r1, [r1, #16]
  17157. 80071d0: 1a6f subs r7, r5, r1
  17158. 80071d2: 6965 ldr r5, [r4, #20]
  17159. 80071d4: eb05 0545 add.w r5, r5, r5, lsl #1
  17160. 80071d8: fb95 f5f3 sdiv r5, r5, r3
  17161. 80071dc: f109 0301 add.w r3, r9, #1
  17162. 80071e0: 443b add r3, r7
  17163. 80071e2: 429d cmp r5, r3
  17164. 80071e4: bf38 it cc
  17165. 80071e6: 461d movcc r5, r3
  17166. 80071e8: 0553 lsls r3, r2, #21
  17167. 80071ea: d530 bpl.n 800724e <__ssputs_r+0x9e>
  17168. 80071ec: 4629 mov r1, r5
  17169. 80071ee: f000 fb37 bl 8007860 <_malloc_r>
  17170. 80071f2: 4606 mov r6, r0
  17171. 80071f4: b950 cbnz r0, 800720c <__ssputs_r+0x5c>
  17172. 80071f6: 230c movs r3, #12
  17173. 80071f8: f04f 30ff mov.w r0, #4294967295
  17174. 80071fc: f8ca 3000 str.w r3, [sl]
  17175. 8007200: 89a3 ldrh r3, [r4, #12]
  17176. 8007202: f043 0340 orr.w r3, r3, #64 ; 0x40
  17177. 8007206: 81a3 strh r3, [r4, #12]
  17178. 8007208: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  17179. 800720c: 463a mov r2, r7
  17180. 800720e: 6921 ldr r1, [r4, #16]
  17181. 8007210: f000 fab6 bl 8007780 <memcpy>
  17182. 8007214: 89a3 ldrh r3, [r4, #12]
  17183. 8007216: f423 6390 bic.w r3, r3, #1152 ; 0x480
  17184. 800721a: f043 0380 orr.w r3, r3, #128 ; 0x80
  17185. 800721e: 81a3 strh r3, [r4, #12]
  17186. 8007220: 6126 str r6, [r4, #16]
  17187. 8007222: 443e add r6, r7
  17188. 8007224: 6026 str r6, [r4, #0]
  17189. 8007226: 464e mov r6, r9
  17190. 8007228: 6165 str r5, [r4, #20]
  17191. 800722a: 1bed subs r5, r5, r7
  17192. 800722c: 60a5 str r5, [r4, #8]
  17193. 800722e: 454e cmp r6, r9
  17194. 8007230: d900 bls.n 8007234 <__ssputs_r+0x84>
  17195. 8007232: 464e mov r6, r9
  17196. 8007234: 4632 mov r2, r6
  17197. 8007236: 4641 mov r1, r8
  17198. 8007238: 6820 ldr r0, [r4, #0]
  17199. 800723a: f000 faac bl 8007796 <memmove>
  17200. 800723e: 68a3 ldr r3, [r4, #8]
  17201. 8007240: 2000 movs r0, #0
  17202. 8007242: 1b9b subs r3, r3, r6
  17203. 8007244: 60a3 str r3, [r4, #8]
  17204. 8007246: 6823 ldr r3, [r4, #0]
  17205. 8007248: 441e add r6, r3
  17206. 800724a: 6026 str r6, [r4, #0]
  17207. 800724c: e7dc b.n 8007208 <__ssputs_r+0x58>
  17208. 800724e: 462a mov r2, r5
  17209. 8007250: f000 fb60 bl 8007914 <_realloc_r>
  17210. 8007254: 4606 mov r6, r0
  17211. 8007256: 2800 cmp r0, #0
  17212. 8007258: d1e2 bne.n 8007220 <__ssputs_r+0x70>
  17213. 800725a: 6921 ldr r1, [r4, #16]
  17214. 800725c: 4650 mov r0, sl
  17215. 800725e: f000 fab3 bl 80077c8 <_free_r>
  17216. 8007262: e7c8 b.n 80071f6 <__ssputs_r+0x46>
  17217. 08007264 <_svfiprintf_r>:
  17218. 8007264: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
  17219. 8007268: 461d mov r5, r3
  17220. 800726a: 898b ldrh r3, [r1, #12]
  17221. 800726c: b09d sub sp, #116 ; 0x74
  17222. 800726e: 061f lsls r7, r3, #24
  17223. 8007270: 4680 mov r8, r0
  17224. 8007272: 460c mov r4, r1
  17225. 8007274: 4616 mov r6, r2
  17226. 8007276: d50f bpl.n 8007298 <_svfiprintf_r+0x34>
  17227. 8007278: 690b ldr r3, [r1, #16]
  17228. 800727a: b96b cbnz r3, 8007298 <_svfiprintf_r+0x34>
  17229. 800727c: 2140 movs r1, #64 ; 0x40
  17230. 800727e: f000 faef bl 8007860 <_malloc_r>
  17231. 8007282: 6020 str r0, [r4, #0]
  17232. 8007284: 6120 str r0, [r4, #16]
  17233. 8007286: b928 cbnz r0, 8007294 <_svfiprintf_r+0x30>
  17234. 8007288: 230c movs r3, #12
  17235. 800728a: f8c8 3000 str.w r3, [r8]
  17236. 800728e: f04f 30ff mov.w r0, #4294967295
  17237. 8007292: e0c8 b.n 8007426 <_svfiprintf_r+0x1c2>
  17238. 8007294: 2340 movs r3, #64 ; 0x40
  17239. 8007296: 6163 str r3, [r4, #20]
  17240. 8007298: 2300 movs r3, #0
  17241. 800729a: 9309 str r3, [sp, #36] ; 0x24
  17242. 800729c: 2320 movs r3, #32
  17243. 800729e: f88d 3029 strb.w r3, [sp, #41] ; 0x29
  17244. 80072a2: 2330 movs r3, #48 ; 0x30
  17245. 80072a4: f04f 0b01 mov.w fp, #1
  17246. 80072a8: f88d 302a strb.w r3, [sp, #42] ; 0x2a
  17247. 80072ac: 9503 str r5, [sp, #12]
  17248. 80072ae: 4637 mov r7, r6
  17249. 80072b0: 463d mov r5, r7
  17250. 80072b2: f815 3b01 ldrb.w r3, [r5], #1
  17251. 80072b6: b10b cbz r3, 80072bc <_svfiprintf_r+0x58>
  17252. 80072b8: 2b25 cmp r3, #37 ; 0x25
  17253. 80072ba: d13e bne.n 800733a <_svfiprintf_r+0xd6>
  17254. 80072bc: ebb7 0a06 subs.w sl, r7, r6
  17255. 80072c0: d00b beq.n 80072da <_svfiprintf_r+0x76>
  17256. 80072c2: 4653 mov r3, sl
  17257. 80072c4: 4632 mov r2, r6
  17258. 80072c6: 4621 mov r1, r4
  17259. 80072c8: 4640 mov r0, r8
  17260. 80072ca: f7ff ff71 bl 80071b0 <__ssputs_r>
  17261. 80072ce: 3001 adds r0, #1
  17262. 80072d0: f000 80a4 beq.w 800741c <_svfiprintf_r+0x1b8>
  17263. 80072d4: 9b09 ldr r3, [sp, #36] ; 0x24
  17264. 80072d6: 4453 add r3, sl
  17265. 80072d8: 9309 str r3, [sp, #36] ; 0x24
  17266. 80072da: 783b ldrb r3, [r7, #0]
  17267. 80072dc: 2b00 cmp r3, #0
  17268. 80072de: f000 809d beq.w 800741c <_svfiprintf_r+0x1b8>
  17269. 80072e2: 2300 movs r3, #0
  17270. 80072e4: f04f 32ff mov.w r2, #4294967295
  17271. 80072e8: e9cd 2305 strd r2, r3, [sp, #20]
  17272. 80072ec: 9304 str r3, [sp, #16]
  17273. 80072ee: 9307 str r3, [sp, #28]
  17274. 80072f0: f88d 3053 strb.w r3, [sp, #83] ; 0x53
  17275. 80072f4: 931a str r3, [sp, #104] ; 0x68
  17276. 80072f6: 462f mov r7, r5
  17277. 80072f8: 2205 movs r2, #5
  17278. 80072fa: f817 1b01 ldrb.w r1, [r7], #1
  17279. 80072fe: 4850 ldr r0, [pc, #320] ; (8007440 <_svfiprintf_r+0x1dc>)
  17280. 8007300: f000 fa30 bl 8007764 <memchr>
  17281. 8007304: 9b04 ldr r3, [sp, #16]
  17282. 8007306: b9d0 cbnz r0, 800733e <_svfiprintf_r+0xda>
  17283. 8007308: 06d9 lsls r1, r3, #27
  17284. 800730a: bf44 itt mi
  17285. 800730c: 2220 movmi r2, #32
  17286. 800730e: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
  17287. 8007312: 071a lsls r2, r3, #28
  17288. 8007314: bf44 itt mi
  17289. 8007316: 222b movmi r2, #43 ; 0x2b
  17290. 8007318: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
  17291. 800731c: 782a ldrb r2, [r5, #0]
  17292. 800731e: 2a2a cmp r2, #42 ; 0x2a
  17293. 8007320: d015 beq.n 800734e <_svfiprintf_r+0xea>
  17294. 8007322: 462f mov r7, r5
  17295. 8007324: 2000 movs r0, #0
  17296. 8007326: 250a movs r5, #10
  17297. 8007328: 9a07 ldr r2, [sp, #28]
  17298. 800732a: 4639 mov r1, r7
  17299. 800732c: f811 3b01 ldrb.w r3, [r1], #1
  17300. 8007330: 3b30 subs r3, #48 ; 0x30
  17301. 8007332: 2b09 cmp r3, #9
  17302. 8007334: d94d bls.n 80073d2 <_svfiprintf_r+0x16e>
  17303. 8007336: b1b8 cbz r0, 8007368 <_svfiprintf_r+0x104>
  17304. 8007338: e00f b.n 800735a <_svfiprintf_r+0xf6>
  17305. 800733a: 462f mov r7, r5
  17306. 800733c: e7b8 b.n 80072b0 <_svfiprintf_r+0x4c>
  17307. 800733e: 4a40 ldr r2, [pc, #256] ; (8007440 <_svfiprintf_r+0x1dc>)
  17308. 8007340: 463d mov r5, r7
  17309. 8007342: 1a80 subs r0, r0, r2
  17310. 8007344: fa0b f000 lsl.w r0, fp, r0
  17311. 8007348: 4318 orrs r0, r3
  17312. 800734a: 9004 str r0, [sp, #16]
  17313. 800734c: e7d3 b.n 80072f6 <_svfiprintf_r+0x92>
  17314. 800734e: 9a03 ldr r2, [sp, #12]
  17315. 8007350: 1d11 adds r1, r2, #4
  17316. 8007352: 6812 ldr r2, [r2, #0]
  17317. 8007354: 9103 str r1, [sp, #12]
  17318. 8007356: 2a00 cmp r2, #0
  17319. 8007358: db01 blt.n 800735e <_svfiprintf_r+0xfa>
  17320. 800735a: 9207 str r2, [sp, #28]
  17321. 800735c: e004 b.n 8007368 <_svfiprintf_r+0x104>
  17322. 800735e: 4252 negs r2, r2
  17323. 8007360: f043 0302 orr.w r3, r3, #2
  17324. 8007364: 9207 str r2, [sp, #28]
  17325. 8007366: 9304 str r3, [sp, #16]
  17326. 8007368: 783b ldrb r3, [r7, #0]
  17327. 800736a: 2b2e cmp r3, #46 ; 0x2e
  17328. 800736c: d10c bne.n 8007388 <_svfiprintf_r+0x124>
  17329. 800736e: 787b ldrb r3, [r7, #1]
  17330. 8007370: 2b2a cmp r3, #42 ; 0x2a
  17331. 8007372: d133 bne.n 80073dc <_svfiprintf_r+0x178>
  17332. 8007374: 9b03 ldr r3, [sp, #12]
  17333. 8007376: 3702 adds r7, #2
  17334. 8007378: 1d1a adds r2, r3, #4
  17335. 800737a: 681b ldr r3, [r3, #0]
  17336. 800737c: 9203 str r2, [sp, #12]
  17337. 800737e: 2b00 cmp r3, #0
  17338. 8007380: bfb8 it lt
  17339. 8007382: f04f 33ff movlt.w r3, #4294967295
  17340. 8007386: 9305 str r3, [sp, #20]
  17341. 8007388: 4d2e ldr r5, [pc, #184] ; (8007444 <_svfiprintf_r+0x1e0>)
  17342. 800738a: 2203 movs r2, #3
  17343. 800738c: 7839 ldrb r1, [r7, #0]
  17344. 800738e: 4628 mov r0, r5
  17345. 8007390: f000 f9e8 bl 8007764 <memchr>
  17346. 8007394: b138 cbz r0, 80073a6 <_svfiprintf_r+0x142>
  17347. 8007396: 2340 movs r3, #64 ; 0x40
  17348. 8007398: 1b40 subs r0, r0, r5
  17349. 800739a: fa03 f000 lsl.w r0, r3, r0
  17350. 800739e: 9b04 ldr r3, [sp, #16]
  17351. 80073a0: 3701 adds r7, #1
  17352. 80073a2: 4303 orrs r3, r0
  17353. 80073a4: 9304 str r3, [sp, #16]
  17354. 80073a6: 7839 ldrb r1, [r7, #0]
  17355. 80073a8: 2206 movs r2, #6
  17356. 80073aa: 4827 ldr r0, [pc, #156] ; (8007448 <_svfiprintf_r+0x1e4>)
  17357. 80073ac: 1c7e adds r6, r7, #1
  17358. 80073ae: f88d 1028 strb.w r1, [sp, #40] ; 0x28
  17359. 80073b2: f000 f9d7 bl 8007764 <memchr>
  17360. 80073b6: 2800 cmp r0, #0
  17361. 80073b8: d038 beq.n 800742c <_svfiprintf_r+0x1c8>
  17362. 80073ba: 4b24 ldr r3, [pc, #144] ; (800744c <_svfiprintf_r+0x1e8>)
  17363. 80073bc: bb13 cbnz r3, 8007404 <_svfiprintf_r+0x1a0>
  17364. 80073be: 9b03 ldr r3, [sp, #12]
  17365. 80073c0: 3307 adds r3, #7
  17366. 80073c2: f023 0307 bic.w r3, r3, #7
  17367. 80073c6: 3308 adds r3, #8
  17368. 80073c8: 9303 str r3, [sp, #12]
  17369. 80073ca: 9b09 ldr r3, [sp, #36] ; 0x24
  17370. 80073cc: 444b add r3, r9
  17371. 80073ce: 9309 str r3, [sp, #36] ; 0x24
  17372. 80073d0: e76d b.n 80072ae <_svfiprintf_r+0x4a>
  17373. 80073d2: fb05 3202 mla r2, r5, r2, r3
  17374. 80073d6: 2001 movs r0, #1
  17375. 80073d8: 460f mov r7, r1
  17376. 80073da: e7a6 b.n 800732a <_svfiprintf_r+0xc6>
  17377. 80073dc: 2300 movs r3, #0
  17378. 80073de: 250a movs r5, #10
  17379. 80073e0: 4619 mov r1, r3
  17380. 80073e2: 3701 adds r7, #1
  17381. 80073e4: 9305 str r3, [sp, #20]
  17382. 80073e6: 4638 mov r0, r7
  17383. 80073e8: f810 2b01 ldrb.w r2, [r0], #1
  17384. 80073ec: 3a30 subs r2, #48 ; 0x30
  17385. 80073ee: 2a09 cmp r2, #9
  17386. 80073f0: d903 bls.n 80073fa <_svfiprintf_r+0x196>
  17387. 80073f2: 2b00 cmp r3, #0
  17388. 80073f4: d0c8 beq.n 8007388 <_svfiprintf_r+0x124>
  17389. 80073f6: 9105 str r1, [sp, #20]
  17390. 80073f8: e7c6 b.n 8007388 <_svfiprintf_r+0x124>
  17391. 80073fa: fb05 2101 mla r1, r5, r1, r2
  17392. 80073fe: 2301 movs r3, #1
  17393. 8007400: 4607 mov r7, r0
  17394. 8007402: e7f0 b.n 80073e6 <_svfiprintf_r+0x182>
  17395. 8007404: ab03 add r3, sp, #12
  17396. 8007406: 9300 str r3, [sp, #0]
  17397. 8007408: 4622 mov r2, r4
  17398. 800740a: 4b11 ldr r3, [pc, #68] ; (8007450 <_svfiprintf_r+0x1ec>)
  17399. 800740c: a904 add r1, sp, #16
  17400. 800740e: 4640 mov r0, r8
  17401. 8007410: f3af 8000 nop.w
  17402. 8007414: f1b0 3fff cmp.w r0, #4294967295
  17403. 8007418: 4681 mov r9, r0
  17404. 800741a: d1d6 bne.n 80073ca <_svfiprintf_r+0x166>
  17405. 800741c: 89a3 ldrh r3, [r4, #12]
  17406. 800741e: 065b lsls r3, r3, #25
  17407. 8007420: f53f af35 bmi.w 800728e <_svfiprintf_r+0x2a>
  17408. 8007424: 9809 ldr r0, [sp, #36] ; 0x24
  17409. 8007426: b01d add sp, #116 ; 0x74
  17410. 8007428: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
  17411. 800742c: ab03 add r3, sp, #12
  17412. 800742e: 9300 str r3, [sp, #0]
  17413. 8007430: 4622 mov r2, r4
  17414. 8007432: 4b07 ldr r3, [pc, #28] ; (8007450 <_svfiprintf_r+0x1ec>)
  17415. 8007434: a904 add r1, sp, #16
  17416. 8007436: 4640 mov r0, r8
  17417. 8007438: f000 f882 bl 8007540 <_printf_i>
  17418. 800743c: e7ea b.n 8007414 <_svfiprintf_r+0x1b0>
  17419. 800743e: bf00 nop
  17420. 8007440: 08007f88 .word 0x08007f88
  17421. 8007444: 08007f8e .word 0x08007f8e
  17422. 8007448: 08007f92 .word 0x08007f92
  17423. 800744c: 00000000 .word 0x00000000
  17424. 8007450: 080071b1 .word 0x080071b1
  17425. 08007454 <_printf_common>:
  17426. 8007454: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  17427. 8007458: 4691 mov r9, r2
  17428. 800745a: 461f mov r7, r3
  17429. 800745c: 688a ldr r2, [r1, #8]
  17430. 800745e: 690b ldr r3, [r1, #16]
  17431. 8007460: 4606 mov r6, r0
  17432. 8007462: 4293 cmp r3, r2
  17433. 8007464: bfb8 it lt
  17434. 8007466: 4613 movlt r3, r2
  17435. 8007468: f8c9 3000 str.w r3, [r9]
  17436. 800746c: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
  17437. 8007470: 460c mov r4, r1
  17438. 8007472: f8dd 8020 ldr.w r8, [sp, #32]
  17439. 8007476: b112 cbz r2, 800747e <_printf_common+0x2a>
  17440. 8007478: 3301 adds r3, #1
  17441. 800747a: f8c9 3000 str.w r3, [r9]
  17442. 800747e: 6823 ldr r3, [r4, #0]
  17443. 8007480: 0699 lsls r1, r3, #26
  17444. 8007482: bf42 ittt mi
  17445. 8007484: f8d9 3000 ldrmi.w r3, [r9]
  17446. 8007488: 3302 addmi r3, #2
  17447. 800748a: f8c9 3000 strmi.w r3, [r9]
  17448. 800748e: 6825 ldr r5, [r4, #0]
  17449. 8007490: f015 0506 ands.w r5, r5, #6
  17450. 8007494: d107 bne.n 80074a6 <_printf_common+0x52>
  17451. 8007496: f104 0a19 add.w sl, r4, #25
  17452. 800749a: 68e3 ldr r3, [r4, #12]
  17453. 800749c: f8d9 2000 ldr.w r2, [r9]
  17454. 80074a0: 1a9b subs r3, r3, r2
  17455. 80074a2: 42ab cmp r3, r5
  17456. 80074a4: dc29 bgt.n 80074fa <_printf_common+0xa6>
  17457. 80074a6: f894 3043 ldrb.w r3, [r4, #67] ; 0x43
  17458. 80074aa: 6822 ldr r2, [r4, #0]
  17459. 80074ac: 3300 adds r3, #0
  17460. 80074ae: bf18 it ne
  17461. 80074b0: 2301 movne r3, #1
  17462. 80074b2: 0692 lsls r2, r2, #26
  17463. 80074b4: d42e bmi.n 8007514 <_printf_common+0xc0>
  17464. 80074b6: f104 0243 add.w r2, r4, #67 ; 0x43
  17465. 80074ba: 4639 mov r1, r7
  17466. 80074bc: 4630 mov r0, r6
  17467. 80074be: 47c0 blx r8
  17468. 80074c0: 3001 adds r0, #1
  17469. 80074c2: d021 beq.n 8007508 <_printf_common+0xb4>
  17470. 80074c4: 6823 ldr r3, [r4, #0]
  17471. 80074c6: 68e5 ldr r5, [r4, #12]
  17472. 80074c8: f003 0306 and.w r3, r3, #6
  17473. 80074cc: 2b04 cmp r3, #4
  17474. 80074ce: bf18 it ne
  17475. 80074d0: 2500 movne r5, #0
  17476. 80074d2: f8d9 2000 ldr.w r2, [r9]
  17477. 80074d6: f04f 0900 mov.w r9, #0
  17478. 80074da: bf08 it eq
  17479. 80074dc: 1aad subeq r5, r5, r2
  17480. 80074de: 68a3 ldr r3, [r4, #8]
  17481. 80074e0: 6922 ldr r2, [r4, #16]
  17482. 80074e2: bf08 it eq
  17483. 80074e4: ea25 75e5 biceq.w r5, r5, r5, asr #31
  17484. 80074e8: 4293 cmp r3, r2
  17485. 80074ea: bfc4 itt gt
  17486. 80074ec: 1a9b subgt r3, r3, r2
  17487. 80074ee: 18ed addgt r5, r5, r3
  17488. 80074f0: 341a adds r4, #26
  17489. 80074f2: 454d cmp r5, r9
  17490. 80074f4: d11a bne.n 800752c <_printf_common+0xd8>
  17491. 80074f6: 2000 movs r0, #0
  17492. 80074f8: e008 b.n 800750c <_printf_common+0xb8>
  17493. 80074fa: 2301 movs r3, #1
  17494. 80074fc: 4652 mov r2, sl
  17495. 80074fe: 4639 mov r1, r7
  17496. 8007500: 4630 mov r0, r6
  17497. 8007502: 47c0 blx r8
  17498. 8007504: 3001 adds r0, #1
  17499. 8007506: d103 bne.n 8007510 <_printf_common+0xbc>
  17500. 8007508: f04f 30ff mov.w r0, #4294967295
  17501. 800750c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  17502. 8007510: 3501 adds r5, #1
  17503. 8007512: e7c2 b.n 800749a <_printf_common+0x46>
  17504. 8007514: 2030 movs r0, #48 ; 0x30
  17505. 8007516: 18e1 adds r1, r4, r3
  17506. 8007518: f881 0043 strb.w r0, [r1, #67] ; 0x43
  17507. 800751c: 1c5a adds r2, r3, #1
  17508. 800751e: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
  17509. 8007522: 4422 add r2, r4
  17510. 8007524: 3302 adds r3, #2
  17511. 8007526: f882 1043 strb.w r1, [r2, #67] ; 0x43
  17512. 800752a: e7c4 b.n 80074b6 <_printf_common+0x62>
  17513. 800752c: 2301 movs r3, #1
  17514. 800752e: 4622 mov r2, r4
  17515. 8007530: 4639 mov r1, r7
  17516. 8007532: 4630 mov r0, r6
  17517. 8007534: 47c0 blx r8
  17518. 8007536: 3001 adds r0, #1
  17519. 8007538: d0e6 beq.n 8007508 <_printf_common+0xb4>
  17520. 800753a: f109 0901 add.w r9, r9, #1
  17521. 800753e: e7d8 b.n 80074f2 <_printf_common+0x9e>
  17522. 08007540 <_printf_i>:
  17523. 8007540: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
  17524. 8007544: f101 0c43 add.w ip, r1, #67 ; 0x43
  17525. 8007548: 460c mov r4, r1
  17526. 800754a: 7e09 ldrb r1, [r1, #24]
  17527. 800754c: b085 sub sp, #20
  17528. 800754e: 296e cmp r1, #110 ; 0x6e
  17529. 8007550: 4617 mov r7, r2
  17530. 8007552: 4606 mov r6, r0
  17531. 8007554: 4698 mov r8, r3
  17532. 8007556: 9a0c ldr r2, [sp, #48] ; 0x30
  17533. 8007558: f000 80b3 beq.w 80076c2 <_printf_i+0x182>
  17534. 800755c: d822 bhi.n 80075a4 <_printf_i+0x64>
  17535. 800755e: 2963 cmp r1, #99 ; 0x63
  17536. 8007560: d036 beq.n 80075d0 <_printf_i+0x90>
  17537. 8007562: d80a bhi.n 800757a <_printf_i+0x3a>
  17538. 8007564: 2900 cmp r1, #0
  17539. 8007566: f000 80b9 beq.w 80076dc <_printf_i+0x19c>
  17540. 800756a: 2958 cmp r1, #88 ; 0x58
  17541. 800756c: f000 8083 beq.w 8007676 <_printf_i+0x136>
  17542. 8007570: f104 0542 add.w r5, r4, #66 ; 0x42
  17543. 8007574: f884 1042 strb.w r1, [r4, #66] ; 0x42
  17544. 8007578: e032 b.n 80075e0 <_printf_i+0xa0>
  17545. 800757a: 2964 cmp r1, #100 ; 0x64
  17546. 800757c: d001 beq.n 8007582 <_printf_i+0x42>
  17547. 800757e: 2969 cmp r1, #105 ; 0x69
  17548. 8007580: d1f6 bne.n 8007570 <_printf_i+0x30>
  17549. 8007582: 6820 ldr r0, [r4, #0]
  17550. 8007584: 6813 ldr r3, [r2, #0]
  17551. 8007586: 0605 lsls r5, r0, #24
  17552. 8007588: f103 0104 add.w r1, r3, #4
  17553. 800758c: d52a bpl.n 80075e4 <_printf_i+0xa4>
  17554. 800758e: 681b ldr r3, [r3, #0]
  17555. 8007590: 6011 str r1, [r2, #0]
  17556. 8007592: 2b00 cmp r3, #0
  17557. 8007594: da03 bge.n 800759e <_printf_i+0x5e>
  17558. 8007596: 222d movs r2, #45 ; 0x2d
  17559. 8007598: 425b negs r3, r3
  17560. 800759a: f884 2043 strb.w r2, [r4, #67] ; 0x43
  17561. 800759e: 486f ldr r0, [pc, #444] ; (800775c <_printf_i+0x21c>)
  17562. 80075a0: 220a movs r2, #10
  17563. 80075a2: e039 b.n 8007618 <_printf_i+0xd8>
  17564. 80075a4: 2973 cmp r1, #115 ; 0x73
  17565. 80075a6: f000 809d beq.w 80076e4 <_printf_i+0x1a4>
  17566. 80075aa: d808 bhi.n 80075be <_printf_i+0x7e>
  17567. 80075ac: 296f cmp r1, #111 ; 0x6f
  17568. 80075ae: d020 beq.n 80075f2 <_printf_i+0xb2>
  17569. 80075b0: 2970 cmp r1, #112 ; 0x70
  17570. 80075b2: d1dd bne.n 8007570 <_printf_i+0x30>
  17571. 80075b4: 6823 ldr r3, [r4, #0]
  17572. 80075b6: f043 0320 orr.w r3, r3, #32
  17573. 80075ba: 6023 str r3, [r4, #0]
  17574. 80075bc: e003 b.n 80075c6 <_printf_i+0x86>
  17575. 80075be: 2975 cmp r1, #117 ; 0x75
  17576. 80075c0: d017 beq.n 80075f2 <_printf_i+0xb2>
  17577. 80075c2: 2978 cmp r1, #120 ; 0x78
  17578. 80075c4: d1d4 bne.n 8007570 <_printf_i+0x30>
  17579. 80075c6: 2378 movs r3, #120 ; 0x78
  17580. 80075c8: 4865 ldr r0, [pc, #404] ; (8007760 <_printf_i+0x220>)
  17581. 80075ca: f884 3045 strb.w r3, [r4, #69] ; 0x45
  17582. 80075ce: e055 b.n 800767c <_printf_i+0x13c>
  17583. 80075d0: 6813 ldr r3, [r2, #0]
  17584. 80075d2: f104 0542 add.w r5, r4, #66 ; 0x42
  17585. 80075d6: 1d19 adds r1, r3, #4
  17586. 80075d8: 681b ldr r3, [r3, #0]
  17587. 80075da: 6011 str r1, [r2, #0]
  17588. 80075dc: f884 3042 strb.w r3, [r4, #66] ; 0x42
  17589. 80075e0: 2301 movs r3, #1
  17590. 80075e2: e08c b.n 80076fe <_printf_i+0x1be>
  17591. 80075e4: 681b ldr r3, [r3, #0]
  17592. 80075e6: f010 0f40 tst.w r0, #64 ; 0x40
  17593. 80075ea: 6011 str r1, [r2, #0]
  17594. 80075ec: bf18 it ne
  17595. 80075ee: b21b sxthne r3, r3
  17596. 80075f0: e7cf b.n 8007592 <_printf_i+0x52>
  17597. 80075f2: 6813 ldr r3, [r2, #0]
  17598. 80075f4: 6825 ldr r5, [r4, #0]
  17599. 80075f6: 1d18 adds r0, r3, #4
  17600. 80075f8: 6010 str r0, [r2, #0]
  17601. 80075fa: 0628 lsls r0, r5, #24
  17602. 80075fc: d501 bpl.n 8007602 <_printf_i+0xc2>
  17603. 80075fe: 681b ldr r3, [r3, #0]
  17604. 8007600: e002 b.n 8007608 <_printf_i+0xc8>
  17605. 8007602: 0668 lsls r0, r5, #25
  17606. 8007604: d5fb bpl.n 80075fe <_printf_i+0xbe>
  17607. 8007606: 881b ldrh r3, [r3, #0]
  17608. 8007608: 296f cmp r1, #111 ; 0x6f
  17609. 800760a: bf14 ite ne
  17610. 800760c: 220a movne r2, #10
  17611. 800760e: 2208 moveq r2, #8
  17612. 8007610: 4852 ldr r0, [pc, #328] ; (800775c <_printf_i+0x21c>)
  17613. 8007612: 2100 movs r1, #0
  17614. 8007614: f884 1043 strb.w r1, [r4, #67] ; 0x43
  17615. 8007618: 6865 ldr r5, [r4, #4]
  17616. 800761a: 2d00 cmp r5, #0
  17617. 800761c: 60a5 str r5, [r4, #8]
  17618. 800761e: f2c0 8095 blt.w 800774c <_printf_i+0x20c>
  17619. 8007622: 6821 ldr r1, [r4, #0]
  17620. 8007624: f021 0104 bic.w r1, r1, #4
  17621. 8007628: 6021 str r1, [r4, #0]
  17622. 800762a: 2b00 cmp r3, #0
  17623. 800762c: d13d bne.n 80076aa <_printf_i+0x16a>
  17624. 800762e: 2d00 cmp r5, #0
  17625. 8007630: f040 808e bne.w 8007750 <_printf_i+0x210>
  17626. 8007634: 4665 mov r5, ip
  17627. 8007636: 2a08 cmp r2, #8
  17628. 8007638: d10b bne.n 8007652 <_printf_i+0x112>
  17629. 800763a: 6823 ldr r3, [r4, #0]
  17630. 800763c: 07db lsls r3, r3, #31
  17631. 800763e: d508 bpl.n 8007652 <_printf_i+0x112>
  17632. 8007640: 6923 ldr r3, [r4, #16]
  17633. 8007642: 6862 ldr r2, [r4, #4]
  17634. 8007644: 429a cmp r2, r3
  17635. 8007646: bfde ittt le
  17636. 8007648: 2330 movle r3, #48 ; 0x30
  17637. 800764a: f805 3c01 strble.w r3, [r5, #-1]
  17638. 800764e: f105 35ff addle.w r5, r5, #4294967295
  17639. 8007652: ebac 0305 sub.w r3, ip, r5
  17640. 8007656: 6123 str r3, [r4, #16]
  17641. 8007658: f8cd 8000 str.w r8, [sp]
  17642. 800765c: 463b mov r3, r7
  17643. 800765e: aa03 add r2, sp, #12
  17644. 8007660: 4621 mov r1, r4
  17645. 8007662: 4630 mov r0, r6
  17646. 8007664: f7ff fef6 bl 8007454 <_printf_common>
  17647. 8007668: 3001 adds r0, #1
  17648. 800766a: d14d bne.n 8007708 <_printf_i+0x1c8>
  17649. 800766c: f04f 30ff mov.w r0, #4294967295
  17650. 8007670: b005 add sp, #20
  17651. 8007672: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
  17652. 8007676: 4839 ldr r0, [pc, #228] ; (800775c <_printf_i+0x21c>)
  17653. 8007678: f884 1045 strb.w r1, [r4, #69] ; 0x45
  17654. 800767c: 6813 ldr r3, [r2, #0]
  17655. 800767e: 6821 ldr r1, [r4, #0]
  17656. 8007680: 1d1d adds r5, r3, #4
  17657. 8007682: 681b ldr r3, [r3, #0]
  17658. 8007684: 6015 str r5, [r2, #0]
  17659. 8007686: 060a lsls r2, r1, #24
  17660. 8007688: d50b bpl.n 80076a2 <_printf_i+0x162>
  17661. 800768a: 07ca lsls r2, r1, #31
  17662. 800768c: bf44 itt mi
  17663. 800768e: f041 0120 orrmi.w r1, r1, #32
  17664. 8007692: 6021 strmi r1, [r4, #0]
  17665. 8007694: b91b cbnz r3, 800769e <_printf_i+0x15e>
  17666. 8007696: 6822 ldr r2, [r4, #0]
  17667. 8007698: f022 0220 bic.w r2, r2, #32
  17668. 800769c: 6022 str r2, [r4, #0]
  17669. 800769e: 2210 movs r2, #16
  17670. 80076a0: e7b7 b.n 8007612 <_printf_i+0xd2>
  17671. 80076a2: 064d lsls r5, r1, #25
  17672. 80076a4: bf48 it mi
  17673. 80076a6: b29b uxthmi r3, r3
  17674. 80076a8: e7ef b.n 800768a <_printf_i+0x14a>
  17675. 80076aa: 4665 mov r5, ip
  17676. 80076ac: fbb3 f1f2 udiv r1, r3, r2
  17677. 80076b0: fb02 3311 mls r3, r2, r1, r3
  17678. 80076b4: 5cc3 ldrb r3, [r0, r3]
  17679. 80076b6: f805 3d01 strb.w r3, [r5, #-1]!
  17680. 80076ba: 460b mov r3, r1
  17681. 80076bc: 2900 cmp r1, #0
  17682. 80076be: d1f5 bne.n 80076ac <_printf_i+0x16c>
  17683. 80076c0: e7b9 b.n 8007636 <_printf_i+0xf6>
  17684. 80076c2: 6813 ldr r3, [r2, #0]
  17685. 80076c4: 6825 ldr r5, [r4, #0]
  17686. 80076c6: 1d18 adds r0, r3, #4
  17687. 80076c8: 6961 ldr r1, [r4, #20]
  17688. 80076ca: 6010 str r0, [r2, #0]
  17689. 80076cc: 0628 lsls r0, r5, #24
  17690. 80076ce: 681b ldr r3, [r3, #0]
  17691. 80076d0: d501 bpl.n 80076d6 <_printf_i+0x196>
  17692. 80076d2: 6019 str r1, [r3, #0]
  17693. 80076d4: e002 b.n 80076dc <_printf_i+0x19c>
  17694. 80076d6: 066a lsls r2, r5, #25
  17695. 80076d8: d5fb bpl.n 80076d2 <_printf_i+0x192>
  17696. 80076da: 8019 strh r1, [r3, #0]
  17697. 80076dc: 2300 movs r3, #0
  17698. 80076de: 4665 mov r5, ip
  17699. 80076e0: 6123 str r3, [r4, #16]
  17700. 80076e2: e7b9 b.n 8007658 <_printf_i+0x118>
  17701. 80076e4: 6813 ldr r3, [r2, #0]
  17702. 80076e6: 1d19 adds r1, r3, #4
  17703. 80076e8: 6011 str r1, [r2, #0]
  17704. 80076ea: 681d ldr r5, [r3, #0]
  17705. 80076ec: 6862 ldr r2, [r4, #4]
  17706. 80076ee: 2100 movs r1, #0
  17707. 80076f0: 4628 mov r0, r5
  17708. 80076f2: f000 f837 bl 8007764 <memchr>
  17709. 80076f6: b108 cbz r0, 80076fc <_printf_i+0x1bc>
  17710. 80076f8: 1b40 subs r0, r0, r5
  17711. 80076fa: 6060 str r0, [r4, #4]
  17712. 80076fc: 6863 ldr r3, [r4, #4]
  17713. 80076fe: 6123 str r3, [r4, #16]
  17714. 8007700: 2300 movs r3, #0
  17715. 8007702: f884 3043 strb.w r3, [r4, #67] ; 0x43
  17716. 8007706: e7a7 b.n 8007658 <_printf_i+0x118>
  17717. 8007708: 6923 ldr r3, [r4, #16]
  17718. 800770a: 462a mov r2, r5
  17719. 800770c: 4639 mov r1, r7
  17720. 800770e: 4630 mov r0, r6
  17721. 8007710: 47c0 blx r8
  17722. 8007712: 3001 adds r0, #1
  17723. 8007714: d0aa beq.n 800766c <_printf_i+0x12c>
  17724. 8007716: 6823 ldr r3, [r4, #0]
  17725. 8007718: 079b lsls r3, r3, #30
  17726. 800771a: d413 bmi.n 8007744 <_printf_i+0x204>
  17727. 800771c: 68e0 ldr r0, [r4, #12]
  17728. 800771e: 9b03 ldr r3, [sp, #12]
  17729. 8007720: 4298 cmp r0, r3
  17730. 8007722: bfb8 it lt
  17731. 8007724: 4618 movlt r0, r3
  17732. 8007726: e7a3 b.n 8007670 <_printf_i+0x130>
  17733. 8007728: 2301 movs r3, #1
  17734. 800772a: 464a mov r2, r9
  17735. 800772c: 4639 mov r1, r7
  17736. 800772e: 4630 mov r0, r6
  17737. 8007730: 47c0 blx r8
  17738. 8007732: 3001 adds r0, #1
  17739. 8007734: d09a beq.n 800766c <_printf_i+0x12c>
  17740. 8007736: 3501 adds r5, #1
  17741. 8007738: 68e3 ldr r3, [r4, #12]
  17742. 800773a: 9a03 ldr r2, [sp, #12]
  17743. 800773c: 1a9b subs r3, r3, r2
  17744. 800773e: 42ab cmp r3, r5
  17745. 8007740: dcf2 bgt.n 8007728 <_printf_i+0x1e8>
  17746. 8007742: e7eb b.n 800771c <_printf_i+0x1dc>
  17747. 8007744: 2500 movs r5, #0
  17748. 8007746: f104 0919 add.w r9, r4, #25
  17749. 800774a: e7f5 b.n 8007738 <_printf_i+0x1f8>
  17750. 800774c: 2b00 cmp r3, #0
  17751. 800774e: d1ac bne.n 80076aa <_printf_i+0x16a>
  17752. 8007750: 7803 ldrb r3, [r0, #0]
  17753. 8007752: f104 0542 add.w r5, r4, #66 ; 0x42
  17754. 8007756: f884 3042 strb.w r3, [r4, #66] ; 0x42
  17755. 800775a: e76c b.n 8007636 <_printf_i+0xf6>
  17756. 800775c: 08007f99 .word 0x08007f99
  17757. 8007760: 08007faa .word 0x08007faa
  17758. 08007764 <memchr>:
  17759. 8007764: b510 push {r4, lr}
  17760. 8007766: b2c9 uxtb r1, r1
  17761. 8007768: 4402 add r2, r0
  17762. 800776a: 4290 cmp r0, r2
  17763. 800776c: 4603 mov r3, r0
  17764. 800776e: d101 bne.n 8007774 <memchr+0x10>
  17765. 8007770: 2300 movs r3, #0
  17766. 8007772: e003 b.n 800777c <memchr+0x18>
  17767. 8007774: 781c ldrb r4, [r3, #0]
  17768. 8007776: 3001 adds r0, #1
  17769. 8007778: 428c cmp r4, r1
  17770. 800777a: d1f6 bne.n 800776a <memchr+0x6>
  17771. 800777c: 4618 mov r0, r3
  17772. 800777e: bd10 pop {r4, pc}
  17773. 08007780 <memcpy>:
  17774. 8007780: b510 push {r4, lr}
  17775. 8007782: 1e43 subs r3, r0, #1
  17776. 8007784: 440a add r2, r1
  17777. 8007786: 4291 cmp r1, r2
  17778. 8007788: d100 bne.n 800778c <memcpy+0xc>
  17779. 800778a: bd10 pop {r4, pc}
  17780. 800778c: f811 4b01 ldrb.w r4, [r1], #1
  17781. 8007790: f803 4f01 strb.w r4, [r3, #1]!
  17782. 8007794: e7f7 b.n 8007786 <memcpy+0x6>
  17783. 08007796 <memmove>:
  17784. 8007796: 4288 cmp r0, r1
  17785. 8007798: b510 push {r4, lr}
  17786. 800779a: eb01 0302 add.w r3, r1, r2
  17787. 800779e: d807 bhi.n 80077b0 <memmove+0x1a>
  17788. 80077a0: 1e42 subs r2, r0, #1
  17789. 80077a2: 4299 cmp r1, r3
  17790. 80077a4: d00a beq.n 80077bc <memmove+0x26>
  17791. 80077a6: f811 4b01 ldrb.w r4, [r1], #1
  17792. 80077aa: f802 4f01 strb.w r4, [r2, #1]!
  17793. 80077ae: e7f8 b.n 80077a2 <memmove+0xc>
  17794. 80077b0: 4283 cmp r3, r0
  17795. 80077b2: d9f5 bls.n 80077a0 <memmove+0xa>
  17796. 80077b4: 1881 adds r1, r0, r2
  17797. 80077b6: 1ad2 subs r2, r2, r3
  17798. 80077b8: 42d3 cmn r3, r2
  17799. 80077ba: d100 bne.n 80077be <memmove+0x28>
  17800. 80077bc: bd10 pop {r4, pc}
  17801. 80077be: f813 4d01 ldrb.w r4, [r3, #-1]!
  17802. 80077c2: f801 4d01 strb.w r4, [r1, #-1]!
  17803. 80077c6: e7f7 b.n 80077b8 <memmove+0x22>
  17804. 080077c8 <_free_r>:
  17805. 80077c8: b538 push {r3, r4, r5, lr}
  17806. 80077ca: 4605 mov r5, r0
  17807. 80077cc: 2900 cmp r1, #0
  17808. 80077ce: d043 beq.n 8007858 <_free_r+0x90>
  17809. 80077d0: f851 3c04 ldr.w r3, [r1, #-4]
  17810. 80077d4: 1f0c subs r4, r1, #4
  17811. 80077d6: 2b00 cmp r3, #0
  17812. 80077d8: bfb8 it lt
  17813. 80077da: 18e4 addlt r4, r4, r3
  17814. 80077dc: f000 f8d0 bl 8007980 <__malloc_lock>
  17815. 80077e0: 4a1e ldr r2, [pc, #120] ; (800785c <_free_r+0x94>)
  17816. 80077e2: 6813 ldr r3, [r2, #0]
  17817. 80077e4: 4610 mov r0, r2
  17818. 80077e6: b933 cbnz r3, 80077f6 <_free_r+0x2e>
  17819. 80077e8: 6063 str r3, [r4, #4]
  17820. 80077ea: 6014 str r4, [r2, #0]
  17821. 80077ec: 4628 mov r0, r5
  17822. 80077ee: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
  17823. 80077f2: f000 b8c6 b.w 8007982 <__malloc_unlock>
  17824. 80077f6: 42a3 cmp r3, r4
  17825. 80077f8: d90b bls.n 8007812 <_free_r+0x4a>
  17826. 80077fa: 6821 ldr r1, [r4, #0]
  17827. 80077fc: 1862 adds r2, r4, r1
  17828. 80077fe: 4293 cmp r3, r2
  17829. 8007800: bf01 itttt eq
  17830. 8007802: 681a ldreq r2, [r3, #0]
  17831. 8007804: 685b ldreq r3, [r3, #4]
  17832. 8007806: 1852 addeq r2, r2, r1
  17833. 8007808: 6022 streq r2, [r4, #0]
  17834. 800780a: 6063 str r3, [r4, #4]
  17835. 800780c: 6004 str r4, [r0, #0]
  17836. 800780e: e7ed b.n 80077ec <_free_r+0x24>
  17837. 8007810: 4613 mov r3, r2
  17838. 8007812: 685a ldr r2, [r3, #4]
  17839. 8007814: b10a cbz r2, 800781a <_free_r+0x52>
  17840. 8007816: 42a2 cmp r2, r4
  17841. 8007818: d9fa bls.n 8007810 <_free_r+0x48>
  17842. 800781a: 6819 ldr r1, [r3, #0]
  17843. 800781c: 1858 adds r0, r3, r1
  17844. 800781e: 42a0 cmp r0, r4
  17845. 8007820: d10b bne.n 800783a <_free_r+0x72>
  17846. 8007822: 6820 ldr r0, [r4, #0]
  17847. 8007824: 4401 add r1, r0
  17848. 8007826: 1858 adds r0, r3, r1
  17849. 8007828: 4282 cmp r2, r0
  17850. 800782a: 6019 str r1, [r3, #0]
  17851. 800782c: d1de bne.n 80077ec <_free_r+0x24>
  17852. 800782e: 6810 ldr r0, [r2, #0]
  17853. 8007830: 6852 ldr r2, [r2, #4]
  17854. 8007832: 4401 add r1, r0
  17855. 8007834: 6019 str r1, [r3, #0]
  17856. 8007836: 605a str r2, [r3, #4]
  17857. 8007838: e7d8 b.n 80077ec <_free_r+0x24>
  17858. 800783a: d902 bls.n 8007842 <_free_r+0x7a>
  17859. 800783c: 230c movs r3, #12
  17860. 800783e: 602b str r3, [r5, #0]
  17861. 8007840: e7d4 b.n 80077ec <_free_r+0x24>
  17862. 8007842: 6820 ldr r0, [r4, #0]
  17863. 8007844: 1821 adds r1, r4, r0
  17864. 8007846: 428a cmp r2, r1
  17865. 8007848: bf01 itttt eq
  17866. 800784a: 6811 ldreq r1, [r2, #0]
  17867. 800784c: 6852 ldreq r2, [r2, #4]
  17868. 800784e: 1809 addeq r1, r1, r0
  17869. 8007850: 6021 streq r1, [r4, #0]
  17870. 8007852: 6062 str r2, [r4, #4]
  17871. 8007854: 605c str r4, [r3, #4]
  17872. 8007856: e7c9 b.n 80077ec <_free_r+0x24>
  17873. 8007858: bd38 pop {r3, r4, r5, pc}
  17874. 800785a: bf00 nop
  17875. 800785c: 200002e0 .word 0x200002e0
  17876. 08007860 <_malloc_r>:
  17877. 8007860: b570 push {r4, r5, r6, lr}
  17878. 8007862: 1ccd adds r5, r1, #3
  17879. 8007864: f025 0503 bic.w r5, r5, #3
  17880. 8007868: 3508 adds r5, #8
  17881. 800786a: 2d0c cmp r5, #12
  17882. 800786c: bf38 it cc
  17883. 800786e: 250c movcc r5, #12
  17884. 8007870: 2d00 cmp r5, #0
  17885. 8007872: 4606 mov r6, r0
  17886. 8007874: db01 blt.n 800787a <_malloc_r+0x1a>
  17887. 8007876: 42a9 cmp r1, r5
  17888. 8007878: d903 bls.n 8007882 <_malloc_r+0x22>
  17889. 800787a: 230c movs r3, #12
  17890. 800787c: 6033 str r3, [r6, #0]
  17891. 800787e: 2000 movs r0, #0
  17892. 8007880: bd70 pop {r4, r5, r6, pc}
  17893. 8007882: f000 f87d bl 8007980 <__malloc_lock>
  17894. 8007886: 4a21 ldr r2, [pc, #132] ; (800790c <_malloc_r+0xac>)
  17895. 8007888: 6814 ldr r4, [r2, #0]
  17896. 800788a: 4621 mov r1, r4
  17897. 800788c: b991 cbnz r1, 80078b4 <_malloc_r+0x54>
  17898. 800788e: 4c20 ldr r4, [pc, #128] ; (8007910 <_malloc_r+0xb0>)
  17899. 8007890: 6823 ldr r3, [r4, #0]
  17900. 8007892: b91b cbnz r3, 800789c <_malloc_r+0x3c>
  17901. 8007894: 4630 mov r0, r6
  17902. 8007896: f000 f863 bl 8007960 <_sbrk_r>
  17903. 800789a: 6020 str r0, [r4, #0]
  17904. 800789c: 4629 mov r1, r5
  17905. 800789e: 4630 mov r0, r6
  17906. 80078a0: f000 f85e bl 8007960 <_sbrk_r>
  17907. 80078a4: 1c43 adds r3, r0, #1
  17908. 80078a6: d124 bne.n 80078f2 <_malloc_r+0x92>
  17909. 80078a8: 230c movs r3, #12
  17910. 80078aa: 4630 mov r0, r6
  17911. 80078ac: 6033 str r3, [r6, #0]
  17912. 80078ae: f000 f868 bl 8007982 <__malloc_unlock>
  17913. 80078b2: e7e4 b.n 800787e <_malloc_r+0x1e>
  17914. 80078b4: 680b ldr r3, [r1, #0]
  17915. 80078b6: 1b5b subs r3, r3, r5
  17916. 80078b8: d418 bmi.n 80078ec <_malloc_r+0x8c>
  17917. 80078ba: 2b0b cmp r3, #11
  17918. 80078bc: d90f bls.n 80078de <_malloc_r+0x7e>
  17919. 80078be: 600b str r3, [r1, #0]
  17920. 80078c0: 18cc adds r4, r1, r3
  17921. 80078c2: 50cd str r5, [r1, r3]
  17922. 80078c4: 4630 mov r0, r6
  17923. 80078c6: f000 f85c bl 8007982 <__malloc_unlock>
  17924. 80078ca: f104 000b add.w r0, r4, #11
  17925. 80078ce: 1d23 adds r3, r4, #4
  17926. 80078d0: f020 0007 bic.w r0, r0, #7
  17927. 80078d4: 1ac3 subs r3, r0, r3
  17928. 80078d6: d0d3 beq.n 8007880 <_malloc_r+0x20>
  17929. 80078d8: 425a negs r2, r3
  17930. 80078da: 50e2 str r2, [r4, r3]
  17931. 80078dc: e7d0 b.n 8007880 <_malloc_r+0x20>
  17932. 80078de: 684b ldr r3, [r1, #4]
  17933. 80078e0: 428c cmp r4, r1
  17934. 80078e2: bf16 itet ne
  17935. 80078e4: 6063 strne r3, [r4, #4]
  17936. 80078e6: 6013 streq r3, [r2, #0]
  17937. 80078e8: 460c movne r4, r1
  17938. 80078ea: e7eb b.n 80078c4 <_malloc_r+0x64>
  17939. 80078ec: 460c mov r4, r1
  17940. 80078ee: 6849 ldr r1, [r1, #4]
  17941. 80078f0: e7cc b.n 800788c <_malloc_r+0x2c>
  17942. 80078f2: 1cc4 adds r4, r0, #3
  17943. 80078f4: f024 0403 bic.w r4, r4, #3
  17944. 80078f8: 42a0 cmp r0, r4
  17945. 80078fa: d005 beq.n 8007908 <_malloc_r+0xa8>
  17946. 80078fc: 1a21 subs r1, r4, r0
  17947. 80078fe: 4630 mov r0, r6
  17948. 8007900: f000 f82e bl 8007960 <_sbrk_r>
  17949. 8007904: 3001 adds r0, #1
  17950. 8007906: d0cf beq.n 80078a8 <_malloc_r+0x48>
  17951. 8007908: 6025 str r5, [r4, #0]
  17952. 800790a: e7db b.n 80078c4 <_malloc_r+0x64>
  17953. 800790c: 200002e0 .word 0x200002e0
  17954. 8007910: 200002e4 .word 0x200002e4
  17955. 08007914 <_realloc_r>:
  17956. 8007914: b5f8 push {r3, r4, r5, r6, r7, lr}
  17957. 8007916: 4607 mov r7, r0
  17958. 8007918: 4614 mov r4, r2
  17959. 800791a: 460e mov r6, r1
  17960. 800791c: b921 cbnz r1, 8007928 <_realloc_r+0x14>
  17961. 800791e: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
  17962. 8007922: 4611 mov r1, r2
  17963. 8007924: f7ff bf9c b.w 8007860 <_malloc_r>
  17964. 8007928: b922 cbnz r2, 8007934 <_realloc_r+0x20>
  17965. 800792a: f7ff ff4d bl 80077c8 <_free_r>
  17966. 800792e: 4625 mov r5, r4
  17967. 8007930: 4628 mov r0, r5
  17968. 8007932: bdf8 pop {r3, r4, r5, r6, r7, pc}
  17969. 8007934: f000 f826 bl 8007984 <_malloc_usable_size_r>
  17970. 8007938: 42a0 cmp r0, r4
  17971. 800793a: d20f bcs.n 800795c <_realloc_r+0x48>
  17972. 800793c: 4621 mov r1, r4
  17973. 800793e: 4638 mov r0, r7
  17974. 8007940: f7ff ff8e bl 8007860 <_malloc_r>
  17975. 8007944: 4605 mov r5, r0
  17976. 8007946: 2800 cmp r0, #0
  17977. 8007948: d0f2 beq.n 8007930 <_realloc_r+0x1c>
  17978. 800794a: 4631 mov r1, r6
  17979. 800794c: 4622 mov r2, r4
  17980. 800794e: f7ff ff17 bl 8007780 <memcpy>
  17981. 8007952: 4631 mov r1, r6
  17982. 8007954: 4638 mov r0, r7
  17983. 8007956: f7ff ff37 bl 80077c8 <_free_r>
  17984. 800795a: e7e9 b.n 8007930 <_realloc_r+0x1c>
  17985. 800795c: 4635 mov r5, r6
  17986. 800795e: e7e7 b.n 8007930 <_realloc_r+0x1c>
  17987. 08007960 <_sbrk_r>:
  17988. 8007960: b538 push {r3, r4, r5, lr}
  17989. 8007962: 2300 movs r3, #0
  17990. 8007964: 4c05 ldr r4, [pc, #20] ; (800797c <_sbrk_r+0x1c>)
  17991. 8007966: 4605 mov r5, r0
  17992. 8007968: 4608 mov r0, r1
  17993. 800796a: 6023 str r3, [r4, #0]
  17994. 800796c: f7fa f9ae bl 8001ccc <_sbrk>
  17995. 8007970: 1c43 adds r3, r0, #1
  17996. 8007972: d102 bne.n 800797a <_sbrk_r+0x1a>
  17997. 8007974: 6823 ldr r3, [r4, #0]
  17998. 8007976: b103 cbz r3, 800797a <_sbrk_r+0x1a>
  17999. 8007978: 602b str r3, [r5, #0]
  18000. 800797a: bd38 pop {r3, r4, r5, pc}
  18001. 800797c: 200044d8 .word 0x200044d8
  18002. 08007980 <__malloc_lock>:
  18003. 8007980: 4770 bx lr
  18004. 08007982 <__malloc_unlock>:
  18005. 8007982: 4770 bx lr
  18006. 08007984 <_malloc_usable_size_r>:
  18007. 8007984: f851 3c04 ldr.w r3, [r1, #-4]
  18008. 8007988: 1f18 subs r0, r3, #4
  18009. 800798a: 2b00 cmp r3, #0
  18010. 800798c: bfbc itt lt
  18011. 800798e: 580b ldrlt r3, [r1, r0]
  18012. 8007990: 18c0 addlt r0, r0, r3
  18013. 8007992: 4770 bx lr
  18014. 08007994 <_init>:
  18015. 8007994: b5f8 push {r3, r4, r5, r6, r7, lr}
  18016. 8007996: bf00 nop
  18017. 8007998: bcf8 pop {r3, r4, r5, r6, r7}
  18018. 800799a: bc08 pop {r3}
  18019. 800799c: 469e mov lr, r3
  18020. 800799e: 4770 bx lr
  18021. 080079a0 <_fini>:
  18022. 80079a0: b5f8 push {r3, r4, r5, r6, r7, lr}
  18023. 80079a2: bf00 nop
  18024. 80079a4: bcf8 pop {r3, r4, r5, r6, r7}
  18025. 80079a6: bc08 pop {r3}
  18026. 80079a8: 469e mov lr, r3
  18027. 80079aa: 4770 bx lr