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stm32f4xx_hal_adc_ex.h 25KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_adc_ex.h
  4. * @author MCD Application Team
  5. * @brief Header file of ADC HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __STM32F4xx_ADC_EX_H
  21. #define __STM32F4xx_ADC_EX_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32f4xx_hal_def.h"
  27. /** @addtogroup STM32F4xx_HAL_Driver
  28. * @{
  29. */
  30. /** @addtogroup ADCEx
  31. * @{
  32. */
  33. /* Exported types ------------------------------------------------------------*/
  34. /** @defgroup ADCEx_Exported_Types ADC Exported Types
  35. * @{
  36. */
  37. /**
  38. * @brief ADC Configuration injected Channel structure definition
  39. * @note Parameters of this structure are shared within 2 scopes:
  40. * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
  41. * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
  42. * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
  43. * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
  44. * ADC state can be either:
  45. * - For all parameters: ADC disabled
  46. * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group.
  47. * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group.
  48. */
  49. typedef struct
  50. {
  51. uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
  52. This parameter can be a value of @ref ADC_channels
  53. Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
  54. uint32_t InjectedRank; /*!< Rank in the injected group sequencer
  55. This parameter must be a value of @ref ADCEx_injected_rank
  56. Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
  57. uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
  58. Unit: ADC clock cycles
  59. Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
  60. This parameter can be a value of @ref ADC_sampling_times
  61. Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
  62. If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
  63. Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
  64. sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
  65. Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
  66. uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
  67. Offset value must be a positive number.
  68. Depending of ADC resolution selected (12, 10, 8 or 6 bits),
  69. this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
  70. uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
  71. To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
  72. This parameter must be a number between Min_Data = 1 and Max_Data = 4.
  73. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  74. configure a channel on injected group can impact the configuration of other channels previously set. */
  75. FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
  76. Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
  77. Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
  78. This parameter can be set to ENABLE or DISABLE.
  79. Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
  80. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  81. configure a channel on injected group can impact the configuration of other channels previously set. */
  82. FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
  83. This parameter can be set to ENABLE or DISABLE.
  84. Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
  85. Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
  86. Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
  87. To maintain JAUTO always enabled, DMA must be configured in circular mode.
  88. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  89. configure a channel on injected group can impact the configuration of other channels previously set. */
  90. uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
  91. If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
  92. If set to external trigger source, triggering is on event rising edge.
  93. This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected
  94. Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
  95. If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
  96. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  97. configure a channel on injected group can impact the configuration of other channels previously set. */
  98. uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
  99. This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected.
  100. If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
  101. Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
  102. configure a channel on injected group can impact the configuration of other channels previously set. */
  103. }ADC_InjectionConfTypeDef;
  104. /**
  105. * @brief ADC Configuration multi-mode structure definition
  106. */
  107. typedef struct
  108. {
  109. uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
  110. This parameter can be a value of @ref ADCEx_Common_mode */
  111. uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
  112. This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
  113. uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
  114. This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
  115. }ADC_MultiModeTypeDef;
  116. /**
  117. * @}
  118. */
  119. /* Exported constants --------------------------------------------------------*/
  120. /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
  121. * @{
  122. */
  123. /** @defgroup ADCEx_Common_mode ADC Common Mode
  124. * @{
  125. */
  126. #define ADC_MODE_INDEPENDENT 0x00000000U
  127. #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
  128. #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
  129. #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
  130. #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
  131. #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
  132. #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
  133. #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
  134. #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
  135. #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
  136. #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
  137. #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
  138. #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
  139. /**
  140. * @}
  141. */
  142. /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
  143. * @{
  144. */
  145. #define ADC_DMAACCESSMODE_DISABLED 0x00000000U /*!< DMA mode disabled */
  146. #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
  147. #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
  148. #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
  149. /**
  150. * @}
  151. */
  152. /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
  153. * @{
  154. */
  155. #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE 0x00000000U
  156. #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
  157. #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
  158. #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
  159. /**
  160. * @}
  161. */
  162. /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
  163. * @{
  164. */
  165. #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 0x00000000U
  166. #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
  167. #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
  168. #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  169. #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
  170. #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
  171. #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
  172. #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  173. #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
  174. #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
  175. #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
  176. #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
  177. #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
  178. #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
  179. #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
  180. #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
  181. #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U)
  182. /**
  183. * @}
  184. */
  185. /** @defgroup ADCEx_injected_rank ADC Injected Rank
  186. * @{
  187. */
  188. #define ADC_INJECTED_RANK_1 0x00000001U
  189. #define ADC_INJECTED_RANK_2 0x00000002U
  190. #define ADC_INJECTED_RANK_3 0x00000003U
  191. #define ADC_INJECTED_RANK_4 0x00000004U
  192. /**
  193. * @}
  194. */
  195. /** @defgroup ADCEx_channels ADC Specific Channels
  196. * @{
  197. */
  198. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
  199. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
  200. defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \
  201. defined(STM32F412Cx)
  202. #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
  203. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx ||
  204. STM32F412Vx || STM32F412Rx || STM32F412Cx */
  205. #if defined(STM32F411xE) || defined(STM32F413xx) || defined(STM32F423xx) || defined(STM32F427xx) || defined(STM32F437xx) ||\
  206. defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
  207. #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT 0x10000000U /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
  208. #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
  209. #endif /* STM32F411xE || STM32F413xx || STM32F423xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
  210. /**
  211. * @}
  212. */
  213. /**
  214. * @}
  215. */
  216. /* Exported macro ------------------------------------------------------------*/
  217. /** @defgroup ADC_Exported_Macros ADC Exported Macros
  218. * @{
  219. */
  220. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
  221. /**
  222. * @brief Disable internal path of ADC channel Vbat
  223. * @note Use case of this macro:
  224. * On devices STM32F42x and STM32F43x, ADC internal channels
  225. * Vbat and VrefInt share the same internal path, only
  226. * one of them can be enabled.This macro is to be used when ADC
  227. * channels Vbat and VrefInt are selected, and must be called
  228. * before starting conversion of ADC channel VrefInt in order
  229. * to disable ADC channel Vbat.
  230. * @retval None
  231. */
  232. #define __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() (ADC->CCR &= ~(ADC_CCR_VBATE))
  233. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
  234. /**
  235. * @}
  236. */
  237. /* Exported functions --------------------------------------------------------*/
  238. /** @addtogroup ADCEx_Exported_Functions
  239. * @{
  240. */
  241. /** @addtogroup ADCEx_Exported_Functions_Group1
  242. * @{
  243. */
  244. /* I/O operation functions ******************************************************/
  245. HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
  246. HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
  247. HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
  248. HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
  249. HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
  250. uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
  251. HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
  252. HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
  253. uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
  254. void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
  255. /* Peripheral Control functions *************************************************/
  256. HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
  257. HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
  258. /**
  259. * @}
  260. */
  261. /**
  262. * @}
  263. */
  264. /* Private types -------------------------------------------------------------*/
  265. /* Private variables ---------------------------------------------------------*/
  266. /* Private constants ---------------------------------------------------------*/
  267. /** @defgroup ADCEx_Private_Constants ADC Private Constants
  268. * @{
  269. */
  270. /**
  271. * @}
  272. */
  273. /* Private macros ------------------------------------------------------------*/
  274. /** @defgroup ADCEx_Private_Macros ADC Private Macros
  275. * @{
  276. */
  277. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
  278. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
  279. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
  280. defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  281. #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
  282. #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE ||
  283. STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
  284. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
  285. defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
  286. #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
  287. ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
  288. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
  289. #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
  290. ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
  291. ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
  292. ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
  293. ((MODE) == ADC_DUALMODE_REGSIMULT) || \
  294. ((MODE) == ADC_DUALMODE_INTERL) || \
  295. ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
  296. ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
  297. ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
  298. ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
  299. ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
  300. ((MODE) == ADC_TRIPLEMODE_INTERL) || \
  301. ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
  302. #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
  303. ((MODE) == ADC_DMAACCESSMODE_1) || \
  304. ((MODE) == ADC_DMAACCESSMODE_2) || \
  305. ((MODE) == ADC_DMAACCESSMODE_3))
  306. #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
  307. ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
  308. ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
  309. ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
  310. #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
  311. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
  312. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
  313. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
  314. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
  315. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
  316. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
  317. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
  318. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
  319. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
  320. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
  321. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
  322. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
  323. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
  324. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
  325. ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
  326. ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
  327. #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U))
  328. #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= 4U))
  329. /**
  330. * @brief Set the selected injected Channel rank.
  331. * @param _CHANNELNB_ Channel number.
  332. * @param _RANKNB_ Rank number.
  333. * @param _JSQR_JL_ Sequence length.
  334. * @retval None
  335. */
  336. #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_))))
  337. /**
  338. * @brief Defines if the selected ADC is within ADC common register ADC123 or ADC1
  339. * if available (ADC2, ADC3 availability depends on STM32 product)
  340. * @param __HANDLE__ ADC handle
  341. * @retval Common control register ADC123 or ADC1
  342. */
  343. #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
  344. #define ADC_COMMON_REGISTER(__HANDLE__) ADC123_COMMON
  345. #else
  346. #define ADC_COMMON_REGISTER(__HANDLE__) ADC1_COMMON
  347. #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx || STM32F427xx || STM32F429xx || STM32F437xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
  348. /**
  349. * @}
  350. */
  351. /* Private functions ---------------------------------------------------------*/
  352. /** @defgroup ADCEx_Private_Functions ADC Private Functions
  353. * @{
  354. */
  355. /**
  356. * @}
  357. */
  358. /**
  359. * @}
  360. */
  361. /**
  362. * @}
  363. */
  364. #ifdef __cplusplus
  365. }
  366. #endif
  367. #endif /*__STM32F4xx_ADC_EX_H */
  368. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/