projekt_wuest_steiner/SD_Card_F401RE/Debug/SD_Card_F401RE.list

SD_Card_F401RE.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .isr_vector   00000194  08000000  08000000  00010000  2**0
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  1 .text         00006ec4  08000194  08000194  00010194  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .rodata       0000055c  08007058  08007058  00017058  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  3 .ARM.extab    00000000  080075b4  080075b4  00020024  2**0
                  CONTENTS
  4 .ARM          00000008  080075b4  080075b4  000175b4  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, DATA
  5 .preinit_array 00000000  080075bc  080075bc  00020024  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  6 .init_array   00000004  080075bc  080075bc  000175bc  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  7 .fini_array   00000004  080075c0  080075c0  000175c0  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  8 .data         00000024  20000000  080075c4  00020000  2**2
                  CONTENTS, ALLOC, LOAD, DATA
  9 .bss          00004490  20000024  080075e8  00020024  2**2
                  ALLOC
 10 ._user_heap_stack 00000604  200044b4  080075e8  000244b4  2**0
                  ALLOC
 11 .ARM.attributes 00000030  00000000  00000000  00020024  2**0
                  CONTENTS, READONLY
 12 .debug_info   00011bcd  00000000  00000000  00020054  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_abbrev 0000278e  00000000  00000000  00031c21  2**0
                  CONTENTS, READONLY, DEBUGGING
 14 .debug_aranges 00000d60  00000000  00000000  000343b0  2**3
                  CONTENTS, READONLY, DEBUGGING
 15 .debug_ranges 00000c28  00000000  00000000  00035110  2**3
                  CONTENTS, READONLY, DEBUGGING
 16 .debug_macro  00017fe5  00000000  00000000  00035d38  2**0
                  CONTENTS, READONLY, DEBUGGING
 17 .debug_line   0000d214  00000000  00000000  0004dd1d  2**0
                  CONTENTS, READONLY, DEBUGGING
 18 .debug_str    0008cc1d  00000000  00000000  0005af31  2**0
                  CONTENTS, READONLY, DEBUGGING
 19 .comment      0000007b  00000000  00000000  000e7b4e  2**0
                  CONTENTS, READONLY
 20 .debug_frame  0000363c  00000000  00000000  000e7bcc  2**2
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

08000194 <__do_global_dtors_aux>:
 8000194:	b510      	push	{r4, lr}
 8000196:	4c05      	ldr	r4, [pc, #20]	; (80001ac <__do_global_dtors_aux+0x18>)
 8000198:	7823      	ldrb	r3, [r4, #0]
 800019a:	b933      	cbnz	r3, 80001aa <__do_global_dtors_aux+0x16>
 800019c:	4b04      	ldr	r3, [pc, #16]	; (80001b0 <__do_global_dtors_aux+0x1c>)
 800019e:	b113      	cbz	r3, 80001a6 <__do_global_dtors_aux+0x12>
 80001a0:	4804      	ldr	r0, [pc, #16]	; (80001b4 <__do_global_dtors_aux+0x20>)
 80001a2:	f3af 8000 	nop.w
 80001a6:	2301      	movs	r3, #1
 80001a8:	7023      	strb	r3, [r4, #0]
 80001aa:	bd10      	pop	{r4, pc}
 80001ac:	20000024 	.word	0x20000024
 80001b0:	00000000 	.word	0x00000000
 80001b4:	08007040 	.word	0x08007040

080001b8 <frame_dummy>:
 80001b8:	b508      	push	{r3, lr}
 80001ba:	4b03      	ldr	r3, [pc, #12]	; (80001c8 <frame_dummy+0x10>)
 80001bc:	b11b      	cbz	r3, 80001c6 <frame_dummy+0xe>
 80001be:	4903      	ldr	r1, [pc, #12]	; (80001cc <frame_dummy+0x14>)
 80001c0:	4803      	ldr	r0, [pc, #12]	; (80001d0 <frame_dummy+0x18>)
 80001c2:	f3af 8000 	nop.w
 80001c6:	bd08      	pop	{r3, pc}
 80001c8:	00000000 	.word	0x00000000
 80001cc:	20000028 	.word	0x20000028
 80001d0:	08007040 	.word	0x08007040

080001d4 <strlen>:
 80001d4:	4603      	mov	r3, r0
 80001d6:	f813 2b01 	ldrb.w	r2, [r3], #1
 80001da:	2a00      	cmp	r2, #0
 80001dc:	d1fb      	bne.n	80001d6 <strlen+0x2>
 80001de:	1a18      	subs	r0, r3, r0
 80001e0:	3801      	subs	r0, #1
 80001e2:	4770      	bx	lr

080001e4 <__aeabi_uldivmod>:
 80001e4:	b953      	cbnz	r3, 80001fc <__aeabi_uldivmod+0x18>
 80001e6:	b94a      	cbnz	r2, 80001fc <__aeabi_uldivmod+0x18>
 80001e8:	2900      	cmp	r1, #0
 80001ea:	bf08      	it	eq
 80001ec:	2800      	cmpeq	r0, #0
 80001ee:	bf1c      	itt	ne
 80001f0:	f04f 31ff 	movne.w	r1, #4294967295
 80001f4:	f04f 30ff 	movne.w	r0, #4294967295
 80001f8:	f000 b972 	b.w	80004e0 <__aeabi_idiv0>
 80001fc:	f1ad 0c08 	sub.w	ip, sp, #8
 8000200:	e96d ce04 	strd	ip, lr, [sp, #-16]!
 8000204:	f000 f806 	bl	8000214 <__udivmoddi4>
 8000208:	f8dd e004 	ldr.w	lr, [sp, #4]
 800020c:	e9dd 2302 	ldrd	r2, r3, [sp, #8]
 8000210:	b004      	add	sp, #16
 8000212:	4770      	bx	lr

08000214 <__udivmoddi4>:
 8000214:	e92d 47f0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
 8000218:	9e08      	ldr	r6, [sp, #32]
 800021a:	4604      	mov	r4, r0
 800021c:	4688      	mov	r8, r1
 800021e:	2b00      	cmp	r3, #0
 8000220:	d14b      	bne.n	80002ba <__udivmoddi4+0xa6>
 8000222:	428a      	cmp	r2, r1
 8000224:	4615      	mov	r5, r2
 8000226:	d967      	bls.n	80002f8 <__udivmoddi4+0xe4>
 8000228:	fab2 f282 	clz	r2, r2
 800022c:	b14a      	cbz	r2, 8000242 <__udivmoddi4+0x2e>
 800022e:	f1c2 0720 	rsb	r7, r2, #32
 8000232:	fa01 f302 	lsl.w	r3, r1, r2
 8000236:	fa20 f707 	lsr.w	r7, r0, r7
 800023a:	4095      	lsls	r5, r2
 800023c:	ea47 0803 	orr.w	r8, r7, r3
 8000240:	4094      	lsls	r4, r2
 8000242:	ea4f 4e15 	mov.w	lr, r5, lsr #16
 8000246:	0c23      	lsrs	r3, r4, #16
 8000248:	fbb8 f7fe 	udiv	r7, r8, lr
 800024c:	fa1f fc85 	uxth.w	ip, r5
 8000250:	fb0e 8817 	mls	r8, lr, r7, r8
 8000254:	ea43 4308 	orr.w	r3, r3, r8, lsl #16
 8000258:	fb07 f10c 	mul.w	r1, r7, ip
 800025c:	4299      	cmp	r1, r3
 800025e:	d909      	bls.n	8000274 <__udivmoddi4+0x60>
 8000260:	18eb      	adds	r3, r5, r3
 8000262:	f107 30ff 	add.w	r0, r7, #4294967295
 8000266:	f080 811b 	bcs.w	80004a0 <__udivmoddi4+0x28c>
 800026a:	4299      	cmp	r1, r3
 800026c:	f240 8118 	bls.w	80004a0 <__udivmoddi4+0x28c>
 8000270:	3f02      	subs	r7, #2
 8000272:	442b      	add	r3, r5
 8000274:	1a5b      	subs	r3, r3, r1
 8000276:	b2a4      	uxth	r4, r4
 8000278:	fbb3 f0fe 	udiv	r0, r3, lr
 800027c:	fb0e 3310 	mls	r3, lr, r0, r3
 8000280:	ea44 4403 	orr.w	r4, r4, r3, lsl #16
 8000284:	fb00 fc0c 	mul.w	ip, r0, ip
 8000288:	45a4      	cmp	ip, r4
 800028a:	d909      	bls.n	80002a0 <__udivmoddi4+0x8c>
 800028c:	192c      	adds	r4, r5, r4
 800028e:	f100 33ff 	add.w	r3, r0, #4294967295
 8000292:	f080 8107 	bcs.w	80004a4 <__udivmoddi4+0x290>
 8000296:	45a4      	cmp	ip, r4
 8000298:	f240 8104 	bls.w	80004a4 <__udivmoddi4+0x290>
 800029c:	3802      	subs	r0, #2
 800029e:	442c      	add	r4, r5
 80002a0:	ea40 4007 	orr.w	r0, r0, r7, lsl #16
 80002a4:	eba4 040c 	sub.w	r4, r4, ip
 80002a8:	2700      	movs	r7, #0
 80002aa:	b11e      	cbz	r6, 80002b4 <__udivmoddi4+0xa0>
 80002ac:	40d4      	lsrs	r4, r2
 80002ae:	2300      	movs	r3, #0
 80002b0:	e9c6 4300 	strd	r4, r3, [r6]
 80002b4:	4639      	mov	r1, r7
 80002b6:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80002ba:	428b      	cmp	r3, r1
 80002bc:	d909      	bls.n	80002d2 <__udivmoddi4+0xbe>
 80002be:	2e00      	cmp	r6, #0
 80002c0:	f000 80eb 	beq.w	800049a <__udivmoddi4+0x286>
 80002c4:	2700      	movs	r7, #0
 80002c6:	e9c6 0100 	strd	r0, r1, [r6]
 80002ca:	4638      	mov	r0, r7
 80002cc:	4639      	mov	r1, r7
 80002ce:	e8bd 87f0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
 80002d2:	fab3 f783 	clz	r7, r3
 80002d6:	2f00      	cmp	r7, #0
 80002d8:	d147      	bne.n	800036a <__udivmoddi4+0x156>
 80002da:	428b      	cmp	r3, r1
 80002dc:	d302      	bcc.n	80002e4 <__udivmoddi4+0xd0>
 80002de:	4282      	cmp	r2, r0
 80002e0:	f200 80fa 	bhi.w	80004d8 <__udivmoddi4+0x2c4>
 80002e4:	1a84      	subs	r4, r0, r2
 80002e6:	eb61 0303 	sbc.w	r3, r1, r3
 80002ea:	2001      	movs	r0, #1
 80002ec:	4698      	mov	r8, r3
 80002ee:	2e00      	cmp	r6, #0
 80002f0:	d0e0      	beq.n	80002b4 <__udivmoddi4+0xa0>
 80002f2:	e9c6 4800 	strd	r4, r8, [r6]
 80002f6:	e7dd      	b.n	80002b4 <__udivmoddi4+0xa0>
 80002f8:	b902      	cbnz	r2, 80002fc <__udivmoddi4+0xe8>
 80002fa:	deff      	udf	#255	; 0xff
 80002fc:	fab2 f282 	clz	r2, r2
 8000300:	2a00      	cmp	r2, #0
 8000302:	f040 808f 	bne.w	8000424 <__udivmoddi4+0x210>
 8000306:	1b49      	subs	r1, r1, r5
 8000308:	ea4f 4e15 	mov.w	lr, r5, lsr #16
 800030c:	fa1f f885 	uxth.w	r8, r5
 8000310:	2701      	movs	r7, #1
 8000312:	fbb1 fcfe 	udiv	ip, r1, lr
 8000316:	0c23      	lsrs	r3, r4, #16
 8000318:	fb0e 111c 	mls	r1, lr, ip, r1
 800031c:	ea43 4301 	orr.w	r3, r3, r1, lsl #16
 8000320:	fb08 f10c 	mul.w	r1, r8, ip
 8000324:	4299      	cmp	r1, r3
 8000326:	d907      	bls.n	8000338 <__udivmoddi4+0x124>
 8000328:	18eb      	adds	r3, r5, r3
 800032a:	f10c 30ff 	add.w	r0, ip, #4294967295
 800032e:	d202      	bcs.n	8000336 <__udivmoddi4+0x122>
 8000330:	4299      	cmp	r1, r3
 8000332:	f200 80cd 	bhi.w	80004d0 <__udivmoddi4+0x2bc>
 8000336:	4684      	mov	ip, r0
 8000338:	1a59      	subs	r1, r3, r1
 800033a:	b2a3      	uxth	r3, r4
 800033c:	fbb1 f0fe 	udiv	r0, r1, lr
 8000340:	fb0e 1410 	mls	r4, lr, r0, r1
 8000344:	ea43 4404 	orr.w	r4, r3, r4, lsl #16
 8000348:	fb08 f800 	mul.w	r8, r8, r0
 800034c:	45a0      	cmp	r8, r4
 800034e:	d907      	bls.n	8000360 <__udivmoddi4+0x14c>
 8000350:	192c      	adds	r4, r5, r4
 8000352:	f100 33ff 	add.w	r3, r0, #4294967295
 8000356:	d202      	bcs.n	800035e <__udivmoddi4+0x14a>
 8000358:	45a0      	cmp	r8, r4
 800035a:	f200 80b6 	bhi.w	80004ca <__udivmoddi4+0x2b6>
 800035e:	4618      	mov	r0, r3
 8000360:	eba4 0408 	sub.w	r4, r4, r8
 8000364:	ea40 400c 	orr.w	r0, r0, ip, lsl #16
 8000368:	e79f      	b.n	80002aa <__udivmoddi4+0x96>
 800036a:	f1c7 0c20 	rsb	ip, r7, #32
 800036e:	40bb      	lsls	r3, r7
 8000370:	fa22 fe0c 	lsr.w	lr, r2, ip
 8000374:	ea4e 0e03 	orr.w	lr, lr, r3
 8000378:	fa01 f407 	lsl.w	r4, r1, r7
 800037c:	fa20 f50c 	lsr.w	r5, r0, ip
 8000380:	fa21 f30c 	lsr.w	r3, r1, ip
 8000384:	ea4f 481e 	mov.w	r8, lr, lsr #16
 8000388:	4325      	orrs	r5, r4
 800038a:	fbb3 f9f8 	udiv	r9, r3, r8
 800038e:	0c2c      	lsrs	r4, r5, #16
 8000390:	fb08 3319 	mls	r3, r8, r9, r3
 8000394:	fa1f fa8e 	uxth.w	sl, lr
 8000398:	ea44 4303 	orr.w	r3, r4, r3, lsl #16
 800039c:	fb09 f40a 	mul.w	r4, r9, sl
 80003a0:	429c      	cmp	r4, r3
 80003a2:	fa02 f207 	lsl.w	r2, r2, r7
 80003a6:	fa00 f107 	lsl.w	r1, r0, r7
 80003aa:	d90b      	bls.n	80003c4 <__udivmoddi4+0x1b0>
 80003ac:	eb1e 0303 	adds.w	r3, lr, r3
 80003b0:	f109 30ff 	add.w	r0, r9, #4294967295
 80003b4:	f080 8087 	bcs.w	80004c6 <__udivmoddi4+0x2b2>
 80003b8:	429c      	cmp	r4, r3
 80003ba:	f240 8084 	bls.w	80004c6 <__udivmoddi4+0x2b2>
 80003be:	f1a9 0902 	sub.w	r9, r9, #2
 80003c2:	4473      	add	r3, lr
 80003c4:	1b1b      	subs	r3, r3, r4
 80003c6:	b2ad      	uxth	r5, r5
 80003c8:	fbb3 f0f8 	udiv	r0, r3, r8
 80003cc:	fb08 3310 	mls	r3, r8, r0, r3
 80003d0:	ea45 4403 	orr.w	r4, r5, r3, lsl #16
 80003d4:	fb00 fa0a 	mul.w	sl, r0, sl
 80003d8:	45a2      	cmp	sl, r4
 80003da:	d908      	bls.n	80003ee <__udivmoddi4+0x1da>
 80003dc:	eb1e 0404 	adds.w	r4, lr, r4
 80003e0:	f100 33ff 	add.w	r3, r0, #4294967295
 80003e4:	d26b      	bcs.n	80004be <__udivmoddi4+0x2aa>
 80003e6:	45a2      	cmp	sl, r4
 80003e8:	d969      	bls.n	80004be <__udivmoddi4+0x2aa>
 80003ea:	3802      	subs	r0, #2
 80003ec:	4474      	add	r4, lr
 80003ee:	ea40 4009 	orr.w	r0, r0, r9, lsl #16
 80003f2:	fba0 8902 	umull	r8, r9, r0, r2
 80003f6:	eba4 040a 	sub.w	r4, r4, sl
 80003fa:	454c      	cmp	r4, r9
 80003fc:	46c2      	mov	sl, r8
 80003fe:	464b      	mov	r3, r9
 8000400:	d354      	bcc.n	80004ac <__udivmoddi4+0x298>
 8000402:	d051      	beq.n	80004a8 <__udivmoddi4+0x294>
 8000404:	2e00      	cmp	r6, #0
 8000406:	d069      	beq.n	80004dc <__udivmoddi4+0x2c8>
 8000408:	ebb1 050a 	subs.w	r5, r1, sl
 800040c:	eb64 0403 	sbc.w	r4, r4, r3
 8000410:	fa04 fc0c 	lsl.w	ip, r4, ip
 8000414:	40fd      	lsrs	r5, r7
 8000416:	40fc      	lsrs	r4, r7
 8000418:	ea4c 0505 	orr.w	r5, ip, r5
 800041c:	e9c6 5400 	strd	r5, r4, [r6]
 8000420:	2700      	movs	r7, #0
 8000422:	e747      	b.n	80002b4 <__udivmoddi4+0xa0>
 8000424:	f1c2 0320 	rsb	r3, r2, #32
 8000428:	fa20 f703 	lsr.w	r7, r0, r3
 800042c:	4095      	lsls	r5, r2
 800042e:	fa01 f002 	lsl.w	r0, r1, r2
 8000432:	fa21 f303 	lsr.w	r3, r1, r3
 8000436:	ea4f 4e15 	mov.w	lr, r5, lsr #16
 800043a:	4338      	orrs	r0, r7
 800043c:	0c01      	lsrs	r1, r0, #16
 800043e:	fbb3 f7fe 	udiv	r7, r3, lr
 8000442:	fa1f f885 	uxth.w	r8, r5
 8000446:	fb0e 3317 	mls	r3, lr, r7, r3
 800044a:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
 800044e:	fb07 f308 	mul.w	r3, r7, r8
 8000452:	428b      	cmp	r3, r1
 8000454:	fa04 f402 	lsl.w	r4, r4, r2
 8000458:	d907      	bls.n	800046a <__udivmoddi4+0x256>
 800045a:	1869      	adds	r1, r5, r1
 800045c:	f107 3cff 	add.w	ip, r7, #4294967295
 8000460:	d22f      	bcs.n	80004c2 <__udivmoddi4+0x2ae>
 8000462:	428b      	cmp	r3, r1
 8000464:	d92d      	bls.n	80004c2 <__udivmoddi4+0x2ae>
 8000466:	3f02      	subs	r7, #2
 8000468:	4429      	add	r1, r5
 800046a:	1acb      	subs	r3, r1, r3
 800046c:	b281      	uxth	r1, r0
 800046e:	fbb3 f0fe 	udiv	r0, r3, lr
 8000472:	fb0e 3310 	mls	r3, lr, r0, r3
 8000476:	ea41 4103 	orr.w	r1, r1, r3, lsl #16
 800047a:	fb00 f308 	mul.w	r3, r0, r8
 800047e:	428b      	cmp	r3, r1
 8000480:	d907      	bls.n	8000492 <__udivmoddi4+0x27e>
 8000482:	1869      	adds	r1, r5, r1
 8000484:	f100 3cff 	add.w	ip, r0, #4294967295
 8000488:	d217      	bcs.n	80004ba <__udivmoddi4+0x2a6>
 800048a:	428b      	cmp	r3, r1
 800048c:	d915      	bls.n	80004ba <__udivmoddi4+0x2a6>
 800048e:	3802      	subs	r0, #2
 8000490:	4429      	add	r1, r5
 8000492:	1ac9      	subs	r1, r1, r3
 8000494:	ea40 4707 	orr.w	r7, r0, r7, lsl #16
 8000498:	e73b      	b.n	8000312 <__udivmoddi4+0xfe>
 800049a:	4637      	mov	r7, r6
 800049c:	4630      	mov	r0, r6
 800049e:	e709      	b.n	80002b4 <__udivmoddi4+0xa0>
 80004a0:	4607      	mov	r7, r0
 80004a2:	e6e7      	b.n	8000274 <__udivmoddi4+0x60>
 80004a4:	4618      	mov	r0, r3
 80004a6:	e6fb      	b.n	80002a0 <__udivmoddi4+0x8c>
 80004a8:	4541      	cmp	r1, r8
 80004aa:	d2ab      	bcs.n	8000404 <__udivmoddi4+0x1f0>
 80004ac:	ebb8 0a02 	subs.w	sl, r8, r2
 80004b0:	eb69 020e 	sbc.w	r2, r9, lr
 80004b4:	3801      	subs	r0, #1
 80004b6:	4613      	mov	r3, r2
 80004b8:	e7a4      	b.n	8000404 <__udivmoddi4+0x1f0>
 80004ba:	4660      	mov	r0, ip
 80004bc:	e7e9      	b.n	8000492 <__udivmoddi4+0x27e>
 80004be:	4618      	mov	r0, r3
 80004c0:	e795      	b.n	80003ee <__udivmoddi4+0x1da>
 80004c2:	4667      	mov	r7, ip
 80004c4:	e7d1      	b.n	800046a <__udivmoddi4+0x256>
 80004c6:	4681      	mov	r9, r0
 80004c8:	e77c      	b.n	80003c4 <__udivmoddi4+0x1b0>
 80004ca:	3802      	subs	r0, #2
 80004cc:	442c      	add	r4, r5
 80004ce:	e747      	b.n	8000360 <__udivmoddi4+0x14c>
 80004d0:	f1ac 0c02 	sub.w	ip, ip, #2
 80004d4:	442b      	add	r3, r5
 80004d6:	e72f      	b.n	8000338 <__udivmoddi4+0x124>
 80004d8:	4638      	mov	r0, r7
 80004da:	e708      	b.n	80002ee <__udivmoddi4+0xda>
 80004dc:	4637      	mov	r7, r6
 80004de:	e6e9      	b.n	80002b4 <__udivmoddi4+0xa0>

080004e0 <__aeabi_idiv0>:
 80004e0:	4770      	bx	lr
 80004e2:	bf00      	nop

080004e4 <SELECT>:
 * SPI functions
 **************************************/

/* slave select */
static void SELECT(void)
{
 80004e4:	b580      	push	{r7, lr}
 80004e6:	af00      	add	r7, sp, #0
	HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_RESET);
 80004e8:	2200      	movs	r2, #0
 80004ea:	2140      	movs	r1, #64	; 0x40
 80004ec:	4803      	ldr	r0, [pc, #12]	; (80004fc <SELECT+0x18>)
 80004ee:	f002 f81f 	bl	8002530 <HAL_GPIO_WritePin>
	HAL_Delay(1);
 80004f2:	2001      	movs	r0, #1
 80004f4:	f001 f8f2 	bl	80016dc <HAL_Delay>
}
 80004f8:	bf00      	nop
 80004fa:	bd80      	pop	{r7, pc}
 80004fc:	40020400 	.word	0x40020400

08000500 <DESELECT>:

/* slave deselect */
static void DESELECT(void)
{
 8000500:	b580      	push	{r7, lr}
 8000502:	af00      	add	r7, sp, #0
	HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_SET);
 8000504:	2201      	movs	r2, #1
 8000506:	2140      	movs	r1, #64	; 0x40
 8000508:	4803      	ldr	r0, [pc, #12]	; (8000518 <DESELECT+0x18>)
 800050a:	f002 f811 	bl	8002530 <HAL_GPIO_WritePin>
	HAL_Delay(1);
 800050e:	2001      	movs	r0, #1
 8000510:	f001 f8e4 	bl	80016dc <HAL_Delay>
}
 8000514:	bf00      	nop
 8000516:	bd80      	pop	{r7, pc}
 8000518:	40020400 	.word	0x40020400

0800051c <SPI_TxByte>:

/* SPI transmit a byte */
static void SPI_TxByte(uint8_t data)
{
 800051c:	b580      	push	{r7, lr}
 800051e:	b082      	sub	sp, #8
 8000520:	af00      	add	r7, sp, #0
 8000522:	4603      	mov	r3, r0
 8000524:	71fb      	strb	r3, [r7, #7]
	while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
 8000526:	bf00      	nop
 8000528:	4b08      	ldr	r3, [pc, #32]	; (800054c <SPI_TxByte+0x30>)
 800052a:	681b      	ldr	r3, [r3, #0]
 800052c:	689b      	ldr	r3, [r3, #8]
 800052e:	f003 0302 	and.w	r3, r3, #2
 8000532:	2b02      	cmp	r3, #2
 8000534:	d1f8      	bne.n	8000528 <SPI_TxByte+0xc>
	HAL_SPI_Transmit(HSPI_SDCARD, &data, 1, SPI_TIMEOUT);
 8000536:	1df9      	adds	r1, r7, #7
 8000538:	2364      	movs	r3, #100	; 0x64
 800053a:	2201      	movs	r2, #1
 800053c:	4803      	ldr	r0, [pc, #12]	; (800054c <SPI_TxByte+0x30>)
 800053e:	f002 fcd7 	bl	8002ef0 <HAL_SPI_Transmit>
}
 8000542:	bf00      	nop
 8000544:	3708      	adds	r7, #8
 8000546:	46bd      	mov	sp, r7
 8000548:	bd80      	pop	{r7, pc}
 800054a:	bf00      	nop
 800054c:	20001374 	.word	0x20001374

08000550 <SPI_TxBuffer>:

/* SPI transmit buffer */
static void SPI_TxBuffer(uint8_t *buffer, uint16_t len)
{
 8000550:	b580      	push	{r7, lr}
 8000552:	b082      	sub	sp, #8
 8000554:	af00      	add	r7, sp, #0
 8000556:	6078      	str	r0, [r7, #4]
 8000558:	460b      	mov	r3, r1
 800055a:	807b      	strh	r3, [r7, #2]
	while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
 800055c:	bf00      	nop
 800055e:	4b08      	ldr	r3, [pc, #32]	; (8000580 <SPI_TxBuffer+0x30>)
 8000560:	681b      	ldr	r3, [r3, #0]
 8000562:	689b      	ldr	r3, [r3, #8]
 8000564:	f003 0302 	and.w	r3, r3, #2
 8000568:	2b02      	cmp	r3, #2
 800056a:	d1f8      	bne.n	800055e <SPI_TxBuffer+0xe>
	HAL_SPI_Transmit(HSPI_SDCARD, buffer, len, SPI_TIMEOUT);
 800056c:	887a      	ldrh	r2, [r7, #2]
 800056e:	2364      	movs	r3, #100	; 0x64
 8000570:	6879      	ldr	r1, [r7, #4]
 8000572:	4803      	ldr	r0, [pc, #12]	; (8000580 <SPI_TxBuffer+0x30>)
 8000574:	f002 fcbc 	bl	8002ef0 <HAL_SPI_Transmit>
}
 8000578:	bf00      	nop
 800057a:	3708      	adds	r7, #8
 800057c:	46bd      	mov	sp, r7
 800057e:	bd80      	pop	{r7, pc}
 8000580:	20001374 	.word	0x20001374

08000584 <SPI_RxByte>:

/* SPI receive a byte */
static uint8_t SPI_RxByte(void)
{
 8000584:	b580      	push	{r7, lr}
 8000586:	b084      	sub	sp, #16
 8000588:	af02      	add	r7, sp, #8
	uint8_t dummy, data;
	dummy = 0xFF;
 800058a:	23ff      	movs	r3, #255	; 0xff
 800058c:	71fb      	strb	r3, [r7, #7]

	while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
 800058e:	bf00      	nop
 8000590:	4b09      	ldr	r3, [pc, #36]	; (80005b8 <SPI_RxByte+0x34>)
 8000592:	681b      	ldr	r3, [r3, #0]
 8000594:	689b      	ldr	r3, [r3, #8]
 8000596:	f003 0302 	and.w	r3, r3, #2
 800059a:	2b02      	cmp	r3, #2
 800059c:	d1f8      	bne.n	8000590 <SPI_RxByte+0xc>
	HAL_SPI_TransmitReceive(HSPI_SDCARD, &dummy, &data, 1, SPI_TIMEOUT);
 800059e:	1dba      	adds	r2, r7, #6
 80005a0:	1df9      	adds	r1, r7, #7
 80005a2:	2364      	movs	r3, #100	; 0x64
 80005a4:	9300      	str	r3, [sp, #0]
 80005a6:	2301      	movs	r3, #1
 80005a8:	4803      	ldr	r0, [pc, #12]	; (80005b8 <SPI_RxByte+0x34>)
 80005aa:	f002 fdd5 	bl	8003158 <HAL_SPI_TransmitReceive>

	return data;
 80005ae:	79bb      	ldrb	r3, [r7, #6]
}
 80005b0:	4618      	mov	r0, r3
 80005b2:	3708      	adds	r7, #8
 80005b4:	46bd      	mov	sp, r7
 80005b6:	bd80      	pop	{r7, pc}
 80005b8:	20001374 	.word	0x20001374

080005bc <SPI_RxBytePtr>:

/* SPI receive a byte via pointer */
static void SPI_RxBytePtr(uint8_t *buff) 
{
 80005bc:	b580      	push	{r7, lr}
 80005be:	b082      	sub	sp, #8
 80005c0:	af00      	add	r7, sp, #0
 80005c2:	6078      	str	r0, [r7, #4]
	*buff = SPI_RxByte();
 80005c4:	f7ff ffde 	bl	8000584 <SPI_RxByte>
 80005c8:	4603      	mov	r3, r0
 80005ca:	461a      	mov	r2, r3
 80005cc:	687b      	ldr	r3, [r7, #4]
 80005ce:	701a      	strb	r2, [r3, #0]
}
 80005d0:	bf00      	nop
 80005d2:	3708      	adds	r7, #8
 80005d4:	46bd      	mov	sp, r7
 80005d6:	bd80      	pop	{r7, pc}

080005d8 <SD_ReadyWait>:
 * SD functions
 **************************************/

/* wait SD ready */
static uint8_t SD_ReadyWait(void)
{
 80005d8:	b580      	push	{r7, lr}
 80005da:	b082      	sub	sp, #8
 80005dc:	af00      	add	r7, sp, #0
	uint8_t res;

	/* timeout 500ms */
	Timer2 = 500;
 80005de:	4b0a      	ldr	r3, [pc, #40]	; (8000608 <SD_ReadyWait+0x30>)
 80005e0:	f44f 72fa 	mov.w	r2, #500	; 0x1f4
 80005e4:	801a      	strh	r2, [r3, #0]

	/* if SD goes ready, receives 0xFF */
	do {
		res = SPI_RxByte();
 80005e6:	f7ff ffcd 	bl	8000584 <SPI_RxByte>
 80005ea:	4603      	mov	r3, r0
 80005ec:	71fb      	strb	r3, [r7, #7]
	} while ((res != 0xFF) && Timer2);
 80005ee:	79fb      	ldrb	r3, [r7, #7]
 80005f0:	2bff      	cmp	r3, #255	; 0xff
 80005f2:	d003      	beq.n	80005fc <SD_ReadyWait+0x24>
 80005f4:	4b04      	ldr	r3, [pc, #16]	; (8000608 <SD_ReadyWait+0x30>)
 80005f6:	881b      	ldrh	r3, [r3, #0]
 80005f8:	2b00      	cmp	r3, #0
 80005fa:	d1f4      	bne.n	80005e6 <SD_ReadyWait+0xe>

	return res;
 80005fc:	79fb      	ldrb	r3, [r7, #7]
}
 80005fe:	4618      	mov	r0, r3
 8000600:	3708      	adds	r7, #8
 8000602:	46bd      	mov	sp, r7
 8000604:	bd80      	pop	{r7, pc}
 8000606:	bf00      	nop
 8000608:	20000278 	.word	0x20000278

0800060c <SD_PowerOn>:

/* power on */
static void SD_PowerOn(void) 
{
 800060c:	b580      	push	{r7, lr}
 800060e:	b084      	sub	sp, #16
 8000610:	af00      	add	r7, sp, #0
	uint8_t args[6];
	uint32_t cnt = 0x1FFF;
 8000612:	f641 73ff 	movw	r3, #8191	; 0x1fff
 8000616:	60fb      	str	r3, [r7, #12]

	/* transmit bytes to wake up */
	DESELECT();
 8000618:	f7ff ff72 	bl	8000500 <DESELECT>
	for(int i = 0; i < 10; i++)
 800061c:	2300      	movs	r3, #0
 800061e:	60bb      	str	r3, [r7, #8]
 8000620:	e005      	b.n	800062e <SD_PowerOn+0x22>
	{
		SPI_TxByte(0xFF);
 8000622:	20ff      	movs	r0, #255	; 0xff
 8000624:	f7ff ff7a 	bl	800051c <SPI_TxByte>
	for(int i = 0; i < 10; i++)
 8000628:	68bb      	ldr	r3, [r7, #8]
 800062a:	3301      	adds	r3, #1
 800062c:	60bb      	str	r3, [r7, #8]
 800062e:	68bb      	ldr	r3, [r7, #8]
 8000630:	2b09      	cmp	r3, #9
 8000632:	ddf6      	ble.n	8000622 <SD_PowerOn+0x16>
	}

	/* slave select */
	SELECT();
 8000634:	f7ff ff56 	bl	80004e4 <SELECT>

	/* make idle state */
	args[0] = CMD0;		/* CMD0:GO_IDLE_STATE */
 8000638:	2340      	movs	r3, #64	; 0x40
 800063a:	703b      	strb	r3, [r7, #0]
	args[1] = 0;
 800063c:	2300      	movs	r3, #0
 800063e:	707b      	strb	r3, [r7, #1]
	args[2] = 0;
 8000640:	2300      	movs	r3, #0
 8000642:	70bb      	strb	r3, [r7, #2]
	args[3] = 0;
 8000644:	2300      	movs	r3, #0
 8000646:	70fb      	strb	r3, [r7, #3]
	args[4] = 0;
 8000648:	2300      	movs	r3, #0
 800064a:	713b      	strb	r3, [r7, #4]
	args[5] = 0x95;		/* CRC */
 800064c:	2395      	movs	r3, #149	; 0x95
 800064e:	717b      	strb	r3, [r7, #5]

	SPI_TxBuffer(args, sizeof(args));
 8000650:	463b      	mov	r3, r7
 8000652:	2106      	movs	r1, #6
 8000654:	4618      	mov	r0, r3
 8000656:	f7ff ff7b 	bl	8000550 <SPI_TxBuffer>

	/* wait response */
	while ((SPI_RxByte() != 0x01) && cnt)
 800065a:	e002      	b.n	8000662 <SD_PowerOn+0x56>
	{
		cnt--;
 800065c:	68fb      	ldr	r3, [r7, #12]
 800065e:	3b01      	subs	r3, #1
 8000660:	60fb      	str	r3, [r7, #12]
	while ((SPI_RxByte() != 0x01) && cnt)
 8000662:	f7ff ff8f 	bl	8000584 <SPI_RxByte>
 8000666:	4603      	mov	r3, r0
 8000668:	2b01      	cmp	r3, #1
 800066a:	d002      	beq.n	8000672 <SD_PowerOn+0x66>
 800066c:	68fb      	ldr	r3, [r7, #12]
 800066e:	2b00      	cmp	r3, #0
 8000670:	d1f4      	bne.n	800065c <SD_PowerOn+0x50>
	}

	DESELECT();
 8000672:	f7ff ff45 	bl	8000500 <DESELECT>
	SPI_TxByte(0XFF);
 8000676:	20ff      	movs	r0, #255	; 0xff
 8000678:	f7ff ff50 	bl	800051c <SPI_TxByte>

	PowerFlag = 1;
 800067c:	4b03      	ldr	r3, [pc, #12]	; (800068c <SD_PowerOn+0x80>)
 800067e:	2201      	movs	r2, #1
 8000680:	701a      	strb	r2, [r3, #0]
}
 8000682:	bf00      	nop
 8000684:	3710      	adds	r7, #16
 8000686:	46bd      	mov	sp, r7
 8000688:	bd80      	pop	{r7, pc}
 800068a:	bf00      	nop
 800068c:	20000041 	.word	0x20000041

08000690 <SD_PowerOff>:

/* power off */
static void SD_PowerOff(void) 
{
 8000690:	b480      	push	{r7}
 8000692:	af00      	add	r7, sp, #0
	PowerFlag = 0;
 8000694:	4b03      	ldr	r3, [pc, #12]	; (80006a4 <SD_PowerOff+0x14>)
 8000696:	2200      	movs	r2, #0
 8000698:	701a      	strb	r2, [r3, #0]
}
 800069a:	bf00      	nop
 800069c:	46bd      	mov	sp, r7
 800069e:	f85d 7b04 	ldr.w	r7, [sp], #4
 80006a2:	4770      	bx	lr
 80006a4:	20000041 	.word	0x20000041

080006a8 <SD_CheckPower>:

/* check power flag */
static uint8_t SD_CheckPower(void) 
{
 80006a8:	b480      	push	{r7}
 80006aa:	af00      	add	r7, sp, #0
	return PowerFlag;
 80006ac:	4b03      	ldr	r3, [pc, #12]	; (80006bc <SD_CheckPower+0x14>)
 80006ae:	781b      	ldrb	r3, [r3, #0]
}
 80006b0:	4618      	mov	r0, r3
 80006b2:	46bd      	mov	sp, r7
 80006b4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80006b8:	4770      	bx	lr
 80006ba:	bf00      	nop
 80006bc:	20000041 	.word	0x20000041

080006c0 <SD_RxDataBlock>:

/* receive data block */
static bool SD_RxDataBlock(BYTE *buff, UINT len)
{
 80006c0:	b580      	push	{r7, lr}
 80006c2:	b084      	sub	sp, #16
 80006c4:	af00      	add	r7, sp, #0
 80006c6:	6078      	str	r0, [r7, #4]
 80006c8:	6039      	str	r1, [r7, #0]
	uint8_t token;

	/* timeout 200ms */
	Timer1 = 200;
 80006ca:	4b13      	ldr	r3, [pc, #76]	; (8000718 <SD_RxDataBlock+0x58>)
 80006cc:	22c8      	movs	r2, #200	; 0xc8
 80006ce:	801a      	strh	r2, [r3, #0]

	/* loop until receive a response or timeout */
	do {
		token = SPI_RxByte();
 80006d0:	f7ff ff58 	bl	8000584 <SPI_RxByte>
 80006d4:	4603      	mov	r3, r0
 80006d6:	73fb      	strb	r3, [r7, #15]
	} while((token == 0xFF) && Timer1);
 80006d8:	7bfb      	ldrb	r3, [r7, #15]
 80006da:	2bff      	cmp	r3, #255	; 0xff
 80006dc:	d103      	bne.n	80006e6 <SD_RxDataBlock+0x26>
 80006de:	4b0e      	ldr	r3, [pc, #56]	; (8000718 <SD_RxDataBlock+0x58>)
 80006e0:	881b      	ldrh	r3, [r3, #0]
 80006e2:	2b00      	cmp	r3, #0
 80006e4:	d1f4      	bne.n	80006d0 <SD_RxDataBlock+0x10>

	/* invalid response */
	if(token != 0xFE) return FALSE;
 80006e6:	7bfb      	ldrb	r3, [r7, #15]
 80006e8:	2bfe      	cmp	r3, #254	; 0xfe
 80006ea:	d001      	beq.n	80006f0 <SD_RxDataBlock+0x30>
 80006ec:	2300      	movs	r3, #0
 80006ee:	e00f      	b.n	8000710 <SD_RxDataBlock+0x50>

	/* receive data */
	do {
		SPI_RxBytePtr(buff++);
 80006f0:	687b      	ldr	r3, [r7, #4]
 80006f2:	1c5a      	adds	r2, r3, #1
 80006f4:	607a      	str	r2, [r7, #4]
 80006f6:	4618      	mov	r0, r3
 80006f8:	f7ff ff60 	bl	80005bc <SPI_RxBytePtr>
	} while(len--);
 80006fc:	683b      	ldr	r3, [r7, #0]
 80006fe:	1e5a      	subs	r2, r3, #1
 8000700:	603a      	str	r2, [r7, #0]
 8000702:	2b00      	cmp	r3, #0
 8000704:	d1f4      	bne.n	80006f0 <SD_RxDataBlock+0x30>

	/* discard CRC */
	SPI_RxByte();
 8000706:	f7ff ff3d 	bl	8000584 <SPI_RxByte>
	SPI_RxByte();
 800070a:	f7ff ff3b 	bl	8000584 <SPI_RxByte>

	return TRUE;
 800070e:	2301      	movs	r3, #1
}
 8000710:	4618      	mov	r0, r3
 8000712:	3710      	adds	r7, #16
 8000714:	46bd      	mov	sp, r7
 8000716:	bd80      	pop	{r7, pc}
 8000718:	2000027a 	.word	0x2000027a

0800071c <SD_TxDataBlock>:

/* transmit data block */
#if _USE_WRITE == 1
static bool SD_TxDataBlock(const uint8_t *buff, BYTE token)
{
 800071c:	b580      	push	{r7, lr}
 800071e:	b084      	sub	sp, #16
 8000720:	af00      	add	r7, sp, #0
 8000722:	6078      	str	r0, [r7, #4]
 8000724:	460b      	mov	r3, r1
 8000726:	70fb      	strb	r3, [r7, #3]
	uint8_t resp;
	uint8_t i = 0;
 8000728:	2300      	movs	r3, #0
 800072a:	73bb      	strb	r3, [r7, #14]

	/* wait SD ready */
	if (SD_ReadyWait() != 0xFF) return FALSE;
 800072c:	f7ff ff54 	bl	80005d8 <SD_ReadyWait>
 8000730:	4603      	mov	r3, r0
 8000732:	2bff      	cmp	r3, #255	; 0xff
 8000734:	d001      	beq.n	800073a <SD_TxDataBlock+0x1e>
 8000736:	2300      	movs	r3, #0
 8000738:	e02f      	b.n	800079a <SD_TxDataBlock+0x7e>

	/* transmit token */
	SPI_TxByte(token);
 800073a:	78fb      	ldrb	r3, [r7, #3]
 800073c:	4618      	mov	r0, r3
 800073e:	f7ff feed 	bl	800051c <SPI_TxByte>

	/* if it's not STOP token, transmit data */
	if (token != 0xFD)
 8000742:	78fb      	ldrb	r3, [r7, #3]
 8000744:	2bfd      	cmp	r3, #253	; 0xfd
 8000746:	d020      	beq.n	800078a <SD_TxDataBlock+0x6e>
	{
		SPI_TxBuffer((uint8_t*)buff, 512);
 8000748:	f44f 7100 	mov.w	r1, #512	; 0x200
 800074c:	6878      	ldr	r0, [r7, #4]
 800074e:	f7ff feff 	bl	8000550 <SPI_TxBuffer>

		/* discard CRC */
		SPI_RxByte();
 8000752:	f7ff ff17 	bl	8000584 <SPI_RxByte>
		SPI_RxByte();
 8000756:	f7ff ff15 	bl	8000584 <SPI_RxByte>

		/* receive response */
		while (i <= 64)
 800075a:	e00b      	b.n	8000774 <SD_TxDataBlock+0x58>
		{
			resp = SPI_RxByte();
 800075c:	f7ff ff12 	bl	8000584 <SPI_RxByte>
 8000760:	4603      	mov	r3, r0
 8000762:	73fb      	strb	r3, [r7, #15]

			/* transmit 0x05 accepted */
			if ((resp & 0x1F) == 0x05) break;
 8000764:	7bfb      	ldrb	r3, [r7, #15]
 8000766:	f003 031f 	and.w	r3, r3, #31
 800076a:	2b05      	cmp	r3, #5
 800076c:	d006      	beq.n	800077c <SD_TxDataBlock+0x60>
			i++;
 800076e:	7bbb      	ldrb	r3, [r7, #14]
 8000770:	3301      	adds	r3, #1
 8000772:	73bb      	strb	r3, [r7, #14]
		while (i <= 64)
 8000774:	7bbb      	ldrb	r3, [r7, #14]
 8000776:	2b40      	cmp	r3, #64	; 0x40
 8000778:	d9f0      	bls.n	800075c <SD_TxDataBlock+0x40>
 800077a:	e000      	b.n	800077e <SD_TxDataBlock+0x62>
			if ((resp & 0x1F) == 0x05) break;
 800077c:	bf00      	nop
		}

		/* recv buffer clear */
		while (SPI_RxByte() == 0);
 800077e:	bf00      	nop
 8000780:	f7ff ff00 	bl	8000584 <SPI_RxByte>
 8000784:	4603      	mov	r3, r0
 8000786:	2b00      	cmp	r3, #0
 8000788:	d0fa      	beq.n	8000780 <SD_TxDataBlock+0x64>
	}

	/* transmit 0x05 accepted */
	if ((resp & 0x1F) == 0x05) return TRUE;
 800078a:	7bfb      	ldrb	r3, [r7, #15]
 800078c:	f003 031f 	and.w	r3, r3, #31
 8000790:	2b05      	cmp	r3, #5
 8000792:	d101      	bne.n	8000798 <SD_TxDataBlock+0x7c>
 8000794:	2301      	movs	r3, #1
 8000796:	e000      	b.n	800079a <SD_TxDataBlock+0x7e>

	return FALSE;
 8000798:	2300      	movs	r3, #0
}
 800079a:	4618      	mov	r0, r3
 800079c:	3710      	adds	r7, #16
 800079e:	46bd      	mov	sp, r7
 80007a0:	bd80      	pop	{r7, pc}

080007a2 <SD_SendCmd>:
#endif /* _USE_WRITE */

/* transmit command */
static BYTE SD_SendCmd(BYTE cmd, uint32_t arg)
{
 80007a2:	b580      	push	{r7, lr}
 80007a4:	b084      	sub	sp, #16
 80007a6:	af00      	add	r7, sp, #0
 80007a8:	4603      	mov	r3, r0
 80007aa:	6039      	str	r1, [r7, #0]
 80007ac:	71fb      	strb	r3, [r7, #7]
	uint8_t crc, res;

	/* wait SD ready */
	if (SD_ReadyWait() != 0xFF) return 0xFF;
 80007ae:	f7ff ff13 	bl	80005d8 <SD_ReadyWait>
 80007b2:	4603      	mov	r3, r0
 80007b4:	2bff      	cmp	r3, #255	; 0xff
 80007b6:	d001      	beq.n	80007bc <SD_SendCmd+0x1a>
 80007b8:	23ff      	movs	r3, #255	; 0xff
 80007ba:	e042      	b.n	8000842 <SD_SendCmd+0xa0>

	/* transmit command */
	SPI_TxByte(cmd); 					/* Command */
 80007bc:	79fb      	ldrb	r3, [r7, #7]
 80007be:	4618      	mov	r0, r3
 80007c0:	f7ff feac 	bl	800051c <SPI_TxByte>
	SPI_TxByte((uint8_t)(arg >> 24)); 	/* Argument[31..24] */
 80007c4:	683b      	ldr	r3, [r7, #0]
 80007c6:	0e1b      	lsrs	r3, r3, #24
 80007c8:	b2db      	uxtb	r3, r3
 80007ca:	4618      	mov	r0, r3
 80007cc:	f7ff fea6 	bl	800051c <SPI_TxByte>
	SPI_TxByte((uint8_t)(arg >> 16)); 	/* Argument[23..16] */
 80007d0:	683b      	ldr	r3, [r7, #0]
 80007d2:	0c1b      	lsrs	r3, r3, #16
 80007d4:	b2db      	uxtb	r3, r3
 80007d6:	4618      	mov	r0, r3
 80007d8:	f7ff fea0 	bl	800051c <SPI_TxByte>
	SPI_TxByte((uint8_t)(arg >> 8)); 	/* Argument[15..8] */
 80007dc:	683b      	ldr	r3, [r7, #0]
 80007de:	0a1b      	lsrs	r3, r3, #8
 80007e0:	b2db      	uxtb	r3, r3
 80007e2:	4618      	mov	r0, r3
 80007e4:	f7ff fe9a 	bl	800051c <SPI_TxByte>
	SPI_TxByte((uint8_t)arg); 			/* Argument[7..0] */
 80007e8:	683b      	ldr	r3, [r7, #0]
 80007ea:	b2db      	uxtb	r3, r3
 80007ec:	4618      	mov	r0, r3
 80007ee:	f7ff fe95 	bl	800051c <SPI_TxByte>

	/* prepare CRC */
	if(cmd == CMD0) crc = 0x95;	/* CRC for CMD0(0) */
 80007f2:	79fb      	ldrb	r3, [r7, #7]
 80007f4:	2b40      	cmp	r3, #64	; 0x40
 80007f6:	d102      	bne.n	80007fe <SD_SendCmd+0x5c>
 80007f8:	2395      	movs	r3, #149	; 0x95
 80007fa:	73fb      	strb	r3, [r7, #15]
 80007fc:	e007      	b.n	800080e <SD_SendCmd+0x6c>
	else if(cmd == CMD8) crc = 0x87;	/* CRC for CMD8(0x1AA) */
 80007fe:	79fb      	ldrb	r3, [r7, #7]
 8000800:	2b48      	cmp	r3, #72	; 0x48
 8000802:	d102      	bne.n	800080a <SD_SendCmd+0x68>
 8000804:	2387      	movs	r3, #135	; 0x87
 8000806:	73fb      	strb	r3, [r7, #15]
 8000808:	e001      	b.n	800080e <SD_SendCmd+0x6c>
	else crc = 1;
 800080a:	2301      	movs	r3, #1
 800080c:	73fb      	strb	r3, [r7, #15]

	/* transmit CRC */
	SPI_TxByte(crc);
 800080e:	7bfb      	ldrb	r3, [r7, #15]
 8000810:	4618      	mov	r0, r3
 8000812:	f7ff fe83 	bl	800051c <SPI_TxByte>

	/* Skip a stuff byte when STOP_TRANSMISSION */
	if (cmd == CMD12) SPI_RxByte();
 8000816:	79fb      	ldrb	r3, [r7, #7]
 8000818:	2b4c      	cmp	r3, #76	; 0x4c
 800081a:	d101      	bne.n	8000820 <SD_SendCmd+0x7e>
 800081c:	f7ff feb2 	bl	8000584 <SPI_RxByte>

	/* receive response */
	uint8_t n = 10;
 8000820:	230a      	movs	r3, #10
 8000822:	73bb      	strb	r3, [r7, #14]
	do {
		res = SPI_RxByte();
 8000824:	f7ff feae 	bl	8000584 <SPI_RxByte>
 8000828:	4603      	mov	r3, r0
 800082a:	737b      	strb	r3, [r7, #13]
	} while ((res & 0x80) && --n);
 800082c:	f997 300d 	ldrsb.w	r3, [r7, #13]
 8000830:	2b00      	cmp	r3, #0
 8000832:	da05      	bge.n	8000840 <SD_SendCmd+0x9e>
 8000834:	7bbb      	ldrb	r3, [r7, #14]
 8000836:	3b01      	subs	r3, #1
 8000838:	73bb      	strb	r3, [r7, #14]
 800083a:	7bbb      	ldrb	r3, [r7, #14]
 800083c:	2b00      	cmp	r3, #0
 800083e:	d1f1      	bne.n	8000824 <SD_SendCmd+0x82>

	return res;
 8000840:	7b7b      	ldrb	r3, [r7, #13]
}
 8000842:	4618      	mov	r0, r3
 8000844:	3710      	adds	r7, #16
 8000846:	46bd      	mov	sp, r7
 8000848:	bd80      	pop	{r7, pc}
	...

0800084c <SD_disk_initialize>:
 * user_diskio.c functions
 **************************************/

/* initialize SD */
DSTATUS SD_disk_initialize(BYTE drv) 
{
 800084c:	b590      	push	{r4, r7, lr}
 800084e:	b085      	sub	sp, #20
 8000850:	af00      	add	r7, sp, #0
 8000852:	4603      	mov	r3, r0
 8000854:	71fb      	strb	r3, [r7, #7]
	uint8_t n, type, ocr[4];

	/* single drive, drv should be 0 */
	if(drv) return STA_NOINIT;
 8000856:	79fb      	ldrb	r3, [r7, #7]
 8000858:	2b00      	cmp	r3, #0
 800085a:	d001      	beq.n	8000860 <SD_disk_initialize+0x14>
 800085c:	2301      	movs	r3, #1
 800085e:	e0d1      	b.n	8000a04 <SD_disk_initialize+0x1b8>

	/* no disk */
	if(Stat & STA_NODISK) return Stat;
 8000860:	4b6a      	ldr	r3, [pc, #424]	; (8000a0c <SD_disk_initialize+0x1c0>)
 8000862:	781b      	ldrb	r3, [r3, #0]
 8000864:	b2db      	uxtb	r3, r3
 8000866:	f003 0302 	and.w	r3, r3, #2
 800086a:	2b00      	cmp	r3, #0
 800086c:	d003      	beq.n	8000876 <SD_disk_initialize+0x2a>
 800086e:	4b67      	ldr	r3, [pc, #412]	; (8000a0c <SD_disk_initialize+0x1c0>)
 8000870:	781b      	ldrb	r3, [r3, #0]
 8000872:	b2db      	uxtb	r3, r3
 8000874:	e0c6      	b.n	8000a04 <SD_disk_initialize+0x1b8>

	/* power on */
	SD_PowerOn();
 8000876:	f7ff fec9 	bl	800060c <SD_PowerOn>

	/* slave select */
	SELECT();
 800087a:	f7ff fe33 	bl	80004e4 <SELECT>

	/* check disk type */
	type = 0;
 800087e:	2300      	movs	r3, #0
 8000880:	73bb      	strb	r3, [r7, #14]

	/* send GO_IDLE_STATE command */
	if (SD_SendCmd(CMD0, 0) == 1)
 8000882:	2100      	movs	r1, #0
 8000884:	2040      	movs	r0, #64	; 0x40
 8000886:	f7ff ff8c 	bl	80007a2 <SD_SendCmd>
 800088a:	4603      	mov	r3, r0
 800088c:	2b01      	cmp	r3, #1
 800088e:	f040 80a1 	bne.w	80009d4 <SD_disk_initialize+0x188>
	{
		/* timeout 1 sec */
		Timer1 = 1000;
 8000892:	4b5f      	ldr	r3, [pc, #380]	; (8000a10 <SD_disk_initialize+0x1c4>)
 8000894:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
 8000898:	801a      	strh	r2, [r3, #0]

		/* SDC V2+ accept CMD8 command, http://elm-chan.org/docs/mmc/mmc_e.html */
		if (SD_SendCmd(CMD8, 0x1AA) == 1)
 800089a:	f44f 71d5 	mov.w	r1, #426	; 0x1aa
 800089e:	2048      	movs	r0, #72	; 0x48
 80008a0:	f7ff ff7f 	bl	80007a2 <SD_SendCmd>
 80008a4:	4603      	mov	r3, r0
 80008a6:	2b01      	cmp	r3, #1
 80008a8:	d155      	bne.n	8000956 <SD_disk_initialize+0x10a>
		{
			/* operation condition register */
			for (n = 0; n < 4; n++)
 80008aa:	2300      	movs	r3, #0
 80008ac:	73fb      	strb	r3, [r7, #15]
 80008ae:	e00c      	b.n	80008ca <SD_disk_initialize+0x7e>
			{
				ocr[n] = SPI_RxByte();
 80008b0:	7bfc      	ldrb	r4, [r7, #15]
 80008b2:	f7ff fe67 	bl	8000584 <SPI_RxByte>
 80008b6:	4603      	mov	r3, r0
 80008b8:	461a      	mov	r2, r3
 80008ba:	f107 0310 	add.w	r3, r7, #16
 80008be:	4423      	add	r3, r4
 80008c0:	f803 2c08 	strb.w	r2, [r3, #-8]
			for (n = 0; n < 4; n++)
 80008c4:	7bfb      	ldrb	r3, [r7, #15]
 80008c6:	3301      	adds	r3, #1
 80008c8:	73fb      	strb	r3, [r7, #15]
 80008ca:	7bfb      	ldrb	r3, [r7, #15]
 80008cc:	2b03      	cmp	r3, #3
 80008ce:	d9ef      	bls.n	80008b0 <SD_disk_initialize+0x64>
			}

			/* voltage range 2.7-3.6V */
			if (ocr[2] == 0x01 && ocr[3] == 0xAA)
 80008d0:	7abb      	ldrb	r3, [r7, #10]
 80008d2:	2b01      	cmp	r3, #1
 80008d4:	d17e      	bne.n	80009d4 <SD_disk_initialize+0x188>
 80008d6:	7afb      	ldrb	r3, [r7, #11]
 80008d8:	2baa      	cmp	r3, #170	; 0xaa
 80008da:	d17b      	bne.n	80009d4 <SD_disk_initialize+0x188>
			{
				/* ACMD41 with HCS bit */
				do {
					if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0) break;
 80008dc:	2100      	movs	r1, #0
 80008de:	2077      	movs	r0, #119	; 0x77
 80008e0:	f7ff ff5f 	bl	80007a2 <SD_SendCmd>
 80008e4:	4603      	mov	r3, r0
 80008e6:	2b01      	cmp	r3, #1
 80008e8:	d807      	bhi.n	80008fa <SD_disk_initialize+0xae>
 80008ea:	f04f 4180 	mov.w	r1, #1073741824	; 0x40000000
 80008ee:	2069      	movs	r0, #105	; 0x69
 80008f0:	f7ff ff57 	bl	80007a2 <SD_SendCmd>
 80008f4:	4603      	mov	r3, r0
 80008f6:	2b00      	cmp	r3, #0
 80008f8:	d004      	beq.n	8000904 <SD_disk_initialize+0xb8>
				} while (Timer1);
 80008fa:	4b45      	ldr	r3, [pc, #276]	; (8000a10 <SD_disk_initialize+0x1c4>)
 80008fc:	881b      	ldrh	r3, [r3, #0]
 80008fe:	2b00      	cmp	r3, #0
 8000900:	d1ec      	bne.n	80008dc <SD_disk_initialize+0x90>
 8000902:	e000      	b.n	8000906 <SD_disk_initialize+0xba>
					if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0) break;
 8000904:	bf00      	nop

				/* READ_OCR */
				if (Timer1 && SD_SendCmd(CMD58, 0) == 0)
 8000906:	4b42      	ldr	r3, [pc, #264]	; (8000a10 <SD_disk_initialize+0x1c4>)
 8000908:	881b      	ldrh	r3, [r3, #0]
 800090a:	2b00      	cmp	r3, #0
 800090c:	d062      	beq.n	80009d4 <SD_disk_initialize+0x188>
 800090e:	2100      	movs	r1, #0
 8000910:	207a      	movs	r0, #122	; 0x7a
 8000912:	f7ff ff46 	bl	80007a2 <SD_SendCmd>
 8000916:	4603      	mov	r3, r0
 8000918:	2b00      	cmp	r3, #0
 800091a:	d15b      	bne.n	80009d4 <SD_disk_initialize+0x188>
				{
					/* Check CCS bit */
					for (n = 0; n < 4; n++)
 800091c:	2300      	movs	r3, #0
 800091e:	73fb      	strb	r3, [r7, #15]
 8000920:	e00c      	b.n	800093c <SD_disk_initialize+0xf0>
					{
						ocr[n] = SPI_RxByte();
 8000922:	7bfc      	ldrb	r4, [r7, #15]
 8000924:	f7ff fe2e 	bl	8000584 <SPI_RxByte>
 8000928:	4603      	mov	r3, r0
 800092a:	461a      	mov	r2, r3
 800092c:	f107 0310 	add.w	r3, r7, #16
 8000930:	4423      	add	r3, r4
 8000932:	f803 2c08 	strb.w	r2, [r3, #-8]
					for (n = 0; n < 4; n++)
 8000936:	7bfb      	ldrb	r3, [r7, #15]
 8000938:	3301      	adds	r3, #1
 800093a:	73fb      	strb	r3, [r7, #15]
 800093c:	7bfb      	ldrb	r3, [r7, #15]
 800093e:	2b03      	cmp	r3, #3
 8000940:	d9ef      	bls.n	8000922 <SD_disk_initialize+0xd6>
					}

					/* SDv2 (HC or SC) */
					type = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
 8000942:	7a3b      	ldrb	r3, [r7, #8]
 8000944:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8000948:	2b00      	cmp	r3, #0
 800094a:	d001      	beq.n	8000950 <SD_disk_initialize+0x104>
 800094c:	230c      	movs	r3, #12
 800094e:	e000      	b.n	8000952 <SD_disk_initialize+0x106>
 8000950:	2304      	movs	r3, #4
 8000952:	73bb      	strb	r3, [r7, #14]
 8000954:	e03e      	b.n	80009d4 <SD_disk_initialize+0x188>
			}
		}
		else
		{
			/* SDC V1 or MMC */
			type = (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) <= 1) ? CT_SD1 : CT_MMC;
 8000956:	2100      	movs	r1, #0
 8000958:	2077      	movs	r0, #119	; 0x77
 800095a:	f7ff ff22 	bl	80007a2 <SD_SendCmd>
 800095e:	4603      	mov	r3, r0
 8000960:	2b01      	cmp	r3, #1
 8000962:	d808      	bhi.n	8000976 <SD_disk_initialize+0x12a>
 8000964:	2100      	movs	r1, #0
 8000966:	2069      	movs	r0, #105	; 0x69
 8000968:	f7ff ff1b 	bl	80007a2 <SD_SendCmd>
 800096c:	4603      	mov	r3, r0
 800096e:	2b01      	cmp	r3, #1
 8000970:	d801      	bhi.n	8000976 <SD_disk_initialize+0x12a>
 8000972:	2302      	movs	r3, #2
 8000974:	e000      	b.n	8000978 <SD_disk_initialize+0x12c>
 8000976:	2301      	movs	r3, #1
 8000978:	73bb      	strb	r3, [r7, #14]

			do
			{
				if (type == CT_SD1)
 800097a:	7bbb      	ldrb	r3, [r7, #14]
 800097c:	2b02      	cmp	r3, #2
 800097e:	d10e      	bne.n	800099e <SD_disk_initialize+0x152>
				{
					if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) == 0) break; /* ACMD41 */
 8000980:	2100      	movs	r1, #0
 8000982:	2077      	movs	r0, #119	; 0x77
 8000984:	f7ff ff0d 	bl	80007a2 <SD_SendCmd>
 8000988:	4603      	mov	r3, r0
 800098a:	2b01      	cmp	r3, #1
 800098c:	d80e      	bhi.n	80009ac <SD_disk_initialize+0x160>
 800098e:	2100      	movs	r1, #0
 8000990:	2069      	movs	r0, #105	; 0x69
 8000992:	f7ff ff06 	bl	80007a2 <SD_SendCmd>
 8000996:	4603      	mov	r3, r0
 8000998:	2b00      	cmp	r3, #0
 800099a:	d107      	bne.n	80009ac <SD_disk_initialize+0x160>
 800099c:	e00c      	b.n	80009b8 <SD_disk_initialize+0x16c>
				}
				else
				{
					if (SD_SendCmd(CMD1, 0) == 0) break; /* CMD1 */
 800099e:	2100      	movs	r1, #0
 80009a0:	2041      	movs	r0, #65	; 0x41
 80009a2:	f7ff fefe 	bl	80007a2 <SD_SendCmd>
 80009a6:	4603      	mov	r3, r0
 80009a8:	2b00      	cmp	r3, #0
 80009aa:	d004      	beq.n	80009b6 <SD_disk_initialize+0x16a>
				}

			} while (Timer1);
 80009ac:	4b18      	ldr	r3, [pc, #96]	; (8000a10 <SD_disk_initialize+0x1c4>)
 80009ae:	881b      	ldrh	r3, [r3, #0]
 80009b0:	2b00      	cmp	r3, #0
 80009b2:	d1e2      	bne.n	800097a <SD_disk_initialize+0x12e>
 80009b4:	e000      	b.n	80009b8 <SD_disk_initialize+0x16c>
					if (SD_SendCmd(CMD1, 0) == 0) break; /* CMD1 */
 80009b6:	bf00      	nop

			/* SET_BLOCKLEN */
			if (!Timer1 || SD_SendCmd(CMD16, 512) != 0) type = 0;
 80009b8:	4b15      	ldr	r3, [pc, #84]	; (8000a10 <SD_disk_initialize+0x1c4>)
 80009ba:	881b      	ldrh	r3, [r3, #0]
 80009bc:	2b00      	cmp	r3, #0
 80009be:	d007      	beq.n	80009d0 <SD_disk_initialize+0x184>
 80009c0:	f44f 7100 	mov.w	r1, #512	; 0x200
 80009c4:	2050      	movs	r0, #80	; 0x50
 80009c6:	f7ff feec 	bl	80007a2 <SD_SendCmd>
 80009ca:	4603      	mov	r3, r0
 80009cc:	2b00      	cmp	r3, #0
 80009ce:	d001      	beq.n	80009d4 <SD_disk_initialize+0x188>
 80009d0:	2300      	movs	r3, #0
 80009d2:	73bb      	strb	r3, [r7, #14]
		}
	}

	CardType = type;
 80009d4:	4a0f      	ldr	r2, [pc, #60]	; (8000a14 <SD_disk_initialize+0x1c8>)
 80009d6:	7bbb      	ldrb	r3, [r7, #14]
 80009d8:	7013      	strb	r3, [r2, #0]

	/* Idle */
	DESELECT();
 80009da:	f7ff fd91 	bl	8000500 <DESELECT>
	SPI_RxByte();
 80009de:	f7ff fdd1 	bl	8000584 <SPI_RxByte>

	/* Clear STA_NOINIT */
	if (type)
 80009e2:	7bbb      	ldrb	r3, [r7, #14]
 80009e4:	2b00      	cmp	r3, #0
 80009e6:	d008      	beq.n	80009fa <SD_disk_initialize+0x1ae>
	{
		Stat &= ~STA_NOINIT;
 80009e8:	4b08      	ldr	r3, [pc, #32]	; (8000a0c <SD_disk_initialize+0x1c0>)
 80009ea:	781b      	ldrb	r3, [r3, #0]
 80009ec:	b2db      	uxtb	r3, r3
 80009ee:	f023 0301 	bic.w	r3, r3, #1
 80009f2:	b2da      	uxtb	r2, r3
 80009f4:	4b05      	ldr	r3, [pc, #20]	; (8000a0c <SD_disk_initialize+0x1c0>)
 80009f6:	701a      	strb	r2, [r3, #0]
 80009f8:	e001      	b.n	80009fe <SD_disk_initialize+0x1b2>
	}
	else
	{
		/* Initialization failed */
		SD_PowerOff();
 80009fa:	f7ff fe49 	bl	8000690 <SD_PowerOff>
	}

	return Stat;
 80009fe:	4b03      	ldr	r3, [pc, #12]	; (8000a0c <SD_disk_initialize+0x1c0>)
 8000a00:	781b      	ldrb	r3, [r3, #0]
 8000a02:	b2db      	uxtb	r3, r3
}
 8000a04:	4618      	mov	r0, r3
 8000a06:	3714      	adds	r7, #20
 8000a08:	46bd      	mov	sp, r7
 8000a0a:	bd90      	pop	{r4, r7, pc}
 8000a0c:	20000000 	.word	0x20000000
 8000a10:	2000027a 	.word	0x2000027a
 8000a14:	20000040 	.word	0x20000040

08000a18 <SD_disk_status>:

/* return disk status */
DSTATUS SD_disk_status(BYTE drv) 
{
 8000a18:	b480      	push	{r7}
 8000a1a:	b083      	sub	sp, #12
 8000a1c:	af00      	add	r7, sp, #0
 8000a1e:	4603      	mov	r3, r0
 8000a20:	71fb      	strb	r3, [r7, #7]
	if (drv) return STA_NOINIT;
 8000a22:	79fb      	ldrb	r3, [r7, #7]
 8000a24:	2b00      	cmp	r3, #0
 8000a26:	d001      	beq.n	8000a2c <SD_disk_status+0x14>
 8000a28:	2301      	movs	r3, #1
 8000a2a:	e002      	b.n	8000a32 <SD_disk_status+0x1a>
	return Stat;
 8000a2c:	4b04      	ldr	r3, [pc, #16]	; (8000a40 <SD_disk_status+0x28>)
 8000a2e:	781b      	ldrb	r3, [r3, #0]
 8000a30:	b2db      	uxtb	r3, r3
}
 8000a32:	4618      	mov	r0, r3
 8000a34:	370c      	adds	r7, #12
 8000a36:	46bd      	mov	sp, r7
 8000a38:	f85d 7b04 	ldr.w	r7, [sp], #4
 8000a3c:	4770      	bx	lr
 8000a3e:	bf00      	nop
 8000a40:	20000000 	.word	0x20000000

08000a44 <SD_disk_read>:

/* read sector */
DRESULT SD_disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count) 
{
 8000a44:	b580      	push	{r7, lr}
 8000a46:	b084      	sub	sp, #16
 8000a48:	af00      	add	r7, sp, #0
 8000a4a:	60b9      	str	r1, [r7, #8]
 8000a4c:	607a      	str	r2, [r7, #4]
 8000a4e:	603b      	str	r3, [r7, #0]
 8000a50:	4603      	mov	r3, r0
 8000a52:	73fb      	strb	r3, [r7, #15]
	/* pdrv should be 0 */
	if (pdrv || !count) return RES_PARERR;
 8000a54:	7bfb      	ldrb	r3, [r7, #15]
 8000a56:	2b00      	cmp	r3, #0
 8000a58:	d102      	bne.n	8000a60 <SD_disk_read+0x1c>
 8000a5a:	683b      	ldr	r3, [r7, #0]
 8000a5c:	2b00      	cmp	r3, #0
 8000a5e:	d101      	bne.n	8000a64 <SD_disk_read+0x20>
 8000a60:	2304      	movs	r3, #4
 8000a62:	e051      	b.n	8000b08 <SD_disk_read+0xc4>

	/* no disk */
	if (Stat & STA_NOINIT) return RES_NOTRDY;
 8000a64:	4b2a      	ldr	r3, [pc, #168]	; (8000b10 <SD_disk_read+0xcc>)
 8000a66:	781b      	ldrb	r3, [r3, #0]
 8000a68:	b2db      	uxtb	r3, r3
 8000a6a:	f003 0301 	and.w	r3, r3, #1
 8000a6e:	2b00      	cmp	r3, #0
 8000a70:	d001      	beq.n	8000a76 <SD_disk_read+0x32>
 8000a72:	2303      	movs	r3, #3
 8000a74:	e048      	b.n	8000b08 <SD_disk_read+0xc4>

	/* convert to byte address */
	if (!(CardType & CT_SD2)) sector *= 512;
 8000a76:	4b27      	ldr	r3, [pc, #156]	; (8000b14 <SD_disk_read+0xd0>)
 8000a78:	781b      	ldrb	r3, [r3, #0]
 8000a7a:	f003 0304 	and.w	r3, r3, #4
 8000a7e:	2b00      	cmp	r3, #0
 8000a80:	d102      	bne.n	8000a88 <SD_disk_read+0x44>
 8000a82:	687b      	ldr	r3, [r7, #4]
 8000a84:	025b      	lsls	r3, r3, #9
 8000a86:	607b      	str	r3, [r7, #4]

	SELECT();
 8000a88:	f7ff fd2c 	bl	80004e4 <SELECT>

	if (count == 1)
 8000a8c:	683b      	ldr	r3, [r7, #0]
 8000a8e:	2b01      	cmp	r3, #1
 8000a90:	d111      	bne.n	8000ab6 <SD_disk_read+0x72>
	{
		/* READ_SINGLE_BLOCK */
		if ((SD_SendCmd(CMD17, sector) == 0) && SD_RxDataBlock(buff, 512)) count = 0;
 8000a92:	6879      	ldr	r1, [r7, #4]
 8000a94:	2051      	movs	r0, #81	; 0x51
 8000a96:	f7ff fe84 	bl	80007a2 <SD_SendCmd>
 8000a9a:	4603      	mov	r3, r0
 8000a9c:	2b00      	cmp	r3, #0
 8000a9e:	d129      	bne.n	8000af4 <SD_disk_read+0xb0>
 8000aa0:	f44f 7100 	mov.w	r1, #512	; 0x200
 8000aa4:	68b8      	ldr	r0, [r7, #8]
 8000aa6:	f7ff fe0b 	bl	80006c0 <SD_RxDataBlock>
 8000aaa:	4603      	mov	r3, r0
 8000aac:	2b00      	cmp	r3, #0
 8000aae:	d021      	beq.n	8000af4 <SD_disk_read+0xb0>
 8000ab0:	2300      	movs	r3, #0
 8000ab2:	603b      	str	r3, [r7, #0]
 8000ab4:	e01e      	b.n	8000af4 <SD_disk_read+0xb0>
	}
	else
	{
		/* READ_MULTIPLE_BLOCK */
		if (SD_SendCmd(CMD18, sector) == 0)
 8000ab6:	6879      	ldr	r1, [r7, #4]
 8000ab8:	2052      	movs	r0, #82	; 0x52
 8000aba:	f7ff fe72 	bl	80007a2 <SD_SendCmd>
 8000abe:	4603      	mov	r3, r0
 8000ac0:	2b00      	cmp	r3, #0
 8000ac2:	d117      	bne.n	8000af4 <SD_disk_read+0xb0>
		{
			do {
				if (!SD_RxDataBlock(buff, 512)) break;
 8000ac4:	f44f 7100 	mov.w	r1, #512	; 0x200
 8000ac8:	68b8      	ldr	r0, [r7, #8]
 8000aca:	f7ff fdf9 	bl	80006c0 <SD_RxDataBlock>
 8000ace:	4603      	mov	r3, r0
 8000ad0:	2b00      	cmp	r3, #0
 8000ad2:	d00a      	beq.n	8000aea <SD_disk_read+0xa6>
				buff += 512;
 8000ad4:	68bb      	ldr	r3, [r7, #8]
 8000ad6:	f503 7300 	add.w	r3, r3, #512	; 0x200
 8000ada:	60bb      	str	r3, [r7, #8]
			} while (--count);
 8000adc:	683b      	ldr	r3, [r7, #0]
 8000ade:	3b01      	subs	r3, #1
 8000ae0:	603b      	str	r3, [r7, #0]
 8000ae2:	683b      	ldr	r3, [r7, #0]
 8000ae4:	2b00      	cmp	r3, #0
 8000ae6:	d1ed      	bne.n	8000ac4 <SD_disk_read+0x80>
 8000ae8:	e000      	b.n	8000aec <SD_disk_read+0xa8>
				if (!SD_RxDataBlock(buff, 512)) break;
 8000aea:	bf00      	nop

			/* STOP_TRANSMISSION */
			SD_SendCmd(CMD12, 0);
 8000aec:	2100      	movs	r1, #0
 8000aee:	204c      	movs	r0, #76	; 0x4c
 8000af0:	f7ff fe57 	bl	80007a2 <SD_SendCmd>
		}
	}

	/* Idle */
	DESELECT();
 8000af4:	f7ff fd04 	bl	8000500 <DESELECT>
	SPI_RxByte();
 8000af8:	f7ff fd44 	bl	8000584 <SPI_RxByte>

	return count ? RES_ERROR : RES_OK;
 8000afc:	683b      	ldr	r3, [r7, #0]
 8000afe:	2b00      	cmp	r3, #0
 8000b00:	bf14      	ite	ne
 8000b02:	2301      	movne	r3, #1
 8000b04:	2300      	moveq	r3, #0
 8000b06:	b2db      	uxtb	r3, r3
}
 8000b08:	4618      	mov	r0, r3
 8000b0a:	3710      	adds	r7, #16
 8000b0c:	46bd      	mov	sp, r7
 8000b0e:	bd80      	pop	{r7, pc}
 8000b10:	20000000 	.word	0x20000000
 8000b14:	20000040 	.word	0x20000040

08000b18 <SD_disk_write>:

/* write sector */
#if _USE_WRITE == 1
DRESULT SD_disk_write(BYTE pdrv, const BYTE* buff, DWORD sector, UINT count) 
{
 8000b18:	b580      	push	{r7, lr}
 8000b1a:	b084      	sub	sp, #16
 8000b1c:	af00      	add	r7, sp, #0
 8000b1e:	60b9      	str	r1, [r7, #8]
 8000b20:	607a      	str	r2, [r7, #4]
 8000b22:	603b      	str	r3, [r7, #0]
 8000b24:	4603      	mov	r3, r0
 8000b26:	73fb      	strb	r3, [r7, #15]
	/* pdrv should be 0 */
	if (pdrv || !count) return RES_PARERR;
 8000b28:	7bfb      	ldrb	r3, [r7, #15]
 8000b2a:	2b00      	cmp	r3, #0
 8000b2c:	d102      	bne.n	8000b34 <SD_disk_write+0x1c>
 8000b2e:	683b      	ldr	r3, [r7, #0]
 8000b30:	2b00      	cmp	r3, #0
 8000b32:	d101      	bne.n	8000b38 <SD_disk_write+0x20>
 8000b34:	2304      	movs	r3, #4
 8000b36:	e06b      	b.n	8000c10 <SD_disk_write+0xf8>

	/* no disk */
	if (Stat & STA_NOINIT) return RES_NOTRDY;
 8000b38:	4b37      	ldr	r3, [pc, #220]	; (8000c18 <SD_disk_write+0x100>)
 8000b3a:	781b      	ldrb	r3, [r3, #0]
 8000b3c:	b2db      	uxtb	r3, r3
 8000b3e:	f003 0301 	and.w	r3, r3, #1
 8000b42:	2b00      	cmp	r3, #0
 8000b44:	d001      	beq.n	8000b4a <SD_disk_write+0x32>
 8000b46:	2303      	movs	r3, #3
 8000b48:	e062      	b.n	8000c10 <SD_disk_write+0xf8>

	/* write protection */
	if (Stat & STA_PROTECT) return RES_WRPRT;
 8000b4a:	4b33      	ldr	r3, [pc, #204]	; (8000c18 <SD_disk_write+0x100>)
 8000b4c:	781b      	ldrb	r3, [r3, #0]
 8000b4e:	b2db      	uxtb	r3, r3
 8000b50:	f003 0304 	and.w	r3, r3, #4
 8000b54:	2b00      	cmp	r3, #0
 8000b56:	d001      	beq.n	8000b5c <SD_disk_write+0x44>
 8000b58:	2302      	movs	r3, #2
 8000b5a:	e059      	b.n	8000c10 <SD_disk_write+0xf8>

	/* convert to byte address */
	if (!(CardType & CT_SD2)) sector *= 512;
 8000b5c:	4b2f      	ldr	r3, [pc, #188]	; (8000c1c <SD_disk_write+0x104>)
 8000b5e:	781b      	ldrb	r3, [r3, #0]
 8000b60:	f003 0304 	and.w	r3, r3, #4
 8000b64:	2b00      	cmp	r3, #0
 8000b66:	d102      	bne.n	8000b6e <SD_disk_write+0x56>
 8000b68:	687b      	ldr	r3, [r7, #4]
 8000b6a:	025b      	lsls	r3, r3, #9
 8000b6c:	607b      	str	r3, [r7, #4]

	SELECT();
 8000b6e:	f7ff fcb9 	bl	80004e4 <SELECT>

	if (count == 1)
 8000b72:	683b      	ldr	r3, [r7, #0]
 8000b74:	2b01      	cmp	r3, #1
 8000b76:	d110      	bne.n	8000b9a <SD_disk_write+0x82>
	{
		/* WRITE_BLOCK */
		if ((SD_SendCmd(CMD24, sector) == 0) && SD_TxDataBlock(buff, 0xFE))
 8000b78:	6879      	ldr	r1, [r7, #4]
 8000b7a:	2058      	movs	r0, #88	; 0x58
 8000b7c:	f7ff fe11 	bl	80007a2 <SD_SendCmd>
 8000b80:	4603      	mov	r3, r0
 8000b82:	2b00      	cmp	r3, #0
 8000b84:	d13a      	bne.n	8000bfc <SD_disk_write+0xe4>
 8000b86:	21fe      	movs	r1, #254	; 0xfe
 8000b88:	68b8      	ldr	r0, [r7, #8]
 8000b8a:	f7ff fdc7 	bl	800071c <SD_TxDataBlock>
 8000b8e:	4603      	mov	r3, r0
 8000b90:	2b00      	cmp	r3, #0
 8000b92:	d033      	beq.n	8000bfc <SD_disk_write+0xe4>
			count = 0;
 8000b94:	2300      	movs	r3, #0
 8000b96:	603b      	str	r3, [r7, #0]
 8000b98:	e030      	b.n	8000bfc <SD_disk_write+0xe4>
	}
	else
	{
		/* WRITE_MULTIPLE_BLOCK */
		if (CardType & CT_SD1)
 8000b9a:	4b20      	ldr	r3, [pc, #128]	; (8000c1c <SD_disk_write+0x104>)
 8000b9c:	781b      	ldrb	r3, [r3, #0]
 8000b9e:	f003 0302 	and.w	r3, r3, #2
 8000ba2:	2b00      	cmp	r3, #0
 8000ba4:	d007      	beq.n	8000bb6 <SD_disk_write+0x9e>
		{
			SD_SendCmd(CMD55, 0);
 8000ba6:	2100      	movs	r1, #0
 8000ba8:	2077      	movs	r0, #119	; 0x77
 8000baa:	f7ff fdfa 	bl	80007a2 <SD_SendCmd>
			SD_SendCmd(CMD23, count); /* ACMD23 */
 8000bae:	6839      	ldr	r1, [r7, #0]
 8000bb0:	2057      	movs	r0, #87	; 0x57
 8000bb2:	f7ff fdf6 	bl	80007a2 <SD_SendCmd>
		}

		if (SD_SendCmd(CMD25, sector) == 0)
 8000bb6:	6879      	ldr	r1, [r7, #4]
 8000bb8:	2059      	movs	r0, #89	; 0x59
 8000bba:	f7ff fdf2 	bl	80007a2 <SD_SendCmd>
 8000bbe:	4603      	mov	r3, r0
 8000bc0:	2b00      	cmp	r3, #0
 8000bc2:	d11b      	bne.n	8000bfc <SD_disk_write+0xe4>
		{
			do {
				if(!SD_TxDataBlock(buff, 0xFC)) break;
 8000bc4:	21fc      	movs	r1, #252	; 0xfc
 8000bc6:	68b8      	ldr	r0, [r7, #8]
 8000bc8:	f7ff fda8 	bl	800071c <SD_TxDataBlock>
 8000bcc:	4603      	mov	r3, r0
 8000bce:	2b00      	cmp	r3, #0
 8000bd0:	d00a      	beq.n	8000be8 <SD_disk_write+0xd0>
				buff += 512;
 8000bd2:	68bb      	ldr	r3, [r7, #8]
 8000bd4:	f503 7300 	add.w	r3, r3, #512	; 0x200
 8000bd8:	60bb      	str	r3, [r7, #8]
			} while (--count);
 8000bda:	683b      	ldr	r3, [r7, #0]
 8000bdc:	3b01      	subs	r3, #1
 8000bde:	603b      	str	r3, [r7, #0]
 8000be0:	683b      	ldr	r3, [r7, #0]
 8000be2:	2b00      	cmp	r3, #0
 8000be4:	d1ee      	bne.n	8000bc4 <SD_disk_write+0xac>
 8000be6:	e000      	b.n	8000bea <SD_disk_write+0xd2>
				if(!SD_TxDataBlock(buff, 0xFC)) break;
 8000be8:	bf00      	nop

			/* STOP_TRAN token */
			if(!SD_TxDataBlock(0, 0xFD))
 8000bea:	21fd      	movs	r1, #253	; 0xfd
 8000bec:	2000      	movs	r0, #0
 8000bee:	f7ff fd95 	bl	800071c <SD_TxDataBlock>
 8000bf2:	4603      	mov	r3, r0
 8000bf4:	2b00      	cmp	r3, #0
 8000bf6:	d101      	bne.n	8000bfc <SD_disk_write+0xe4>
			{
				count = 1;
 8000bf8:	2301      	movs	r3, #1
 8000bfa:	603b      	str	r3, [r7, #0]
			}
		}
	}

	/* Idle */
	DESELECT();
 8000bfc:	f7ff fc80 	bl	8000500 <DESELECT>
	SPI_RxByte();
 8000c00:	f7ff fcc0 	bl	8000584 <SPI_RxByte>

	return count ? RES_ERROR : RES_OK;
 8000c04:	683b      	ldr	r3, [r7, #0]
 8000c06:	2b00      	cmp	r3, #0
 8000c08:	bf14      	ite	ne
 8000c0a:	2301      	movne	r3, #1
 8000c0c:	2300      	moveq	r3, #0
 8000c0e:	b2db      	uxtb	r3, r3
}
 8000c10:	4618      	mov	r0, r3
 8000c12:	3710      	adds	r7, #16
 8000c14:	46bd      	mov	sp, r7
 8000c16:	bd80      	pop	{r7, pc}
 8000c18:	20000000 	.word	0x20000000
 8000c1c:	20000040 	.word	0x20000040

08000c20 <SD_disk_ioctl>:
#endif /* _USE_WRITE */

/* ioctl */
DRESULT SD_disk_ioctl(BYTE drv, BYTE ctrl, void *buff) 
{
 8000c20:	b590      	push	{r4, r7, lr}
 8000c22:	b08b      	sub	sp, #44	; 0x2c
 8000c24:	af00      	add	r7, sp, #0
 8000c26:	4603      	mov	r3, r0
 8000c28:	603a      	str	r2, [r7, #0]
 8000c2a:	71fb      	strb	r3, [r7, #7]
 8000c2c:	460b      	mov	r3, r1
 8000c2e:	71bb      	strb	r3, [r7, #6]
	DRESULT res;
	uint8_t n, csd[16], *ptr = buff;
 8000c30:	683b      	ldr	r3, [r7, #0]
 8000c32:	623b      	str	r3, [r7, #32]
	WORD csize;

	/* pdrv should be 0 */
	if (drv) return RES_PARERR;
 8000c34:	79fb      	ldrb	r3, [r7, #7]
 8000c36:	2b00      	cmp	r3, #0
 8000c38:	d001      	beq.n	8000c3e <SD_disk_ioctl+0x1e>
 8000c3a:	2304      	movs	r3, #4
 8000c3c:	e113      	b.n	8000e66 <SD_disk_ioctl+0x246>
	res = RES_ERROR;
 8000c3e:	2301      	movs	r3, #1
 8000c40:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27

	if (ctrl == CTRL_POWER)
 8000c44:	79bb      	ldrb	r3, [r7, #6]
 8000c46:	2b05      	cmp	r3, #5
 8000c48:	d121      	bne.n	8000c8e <SD_disk_ioctl+0x6e>
	{
		switch (*ptr)
 8000c4a:	6a3b      	ldr	r3, [r7, #32]
 8000c4c:	781b      	ldrb	r3, [r3, #0]
 8000c4e:	2b01      	cmp	r3, #1
 8000c50:	d009      	beq.n	8000c66 <SD_disk_ioctl+0x46>
 8000c52:	2b02      	cmp	r3, #2
 8000c54:	d00d      	beq.n	8000c72 <SD_disk_ioctl+0x52>
 8000c56:	2b00      	cmp	r3, #0
 8000c58:	d115      	bne.n	8000c86 <SD_disk_ioctl+0x66>
		{
		case 0:
			SD_PowerOff();		/* Power Off */
 8000c5a:	f7ff fd19 	bl	8000690 <SD_PowerOff>
			res = RES_OK;
 8000c5e:	2300      	movs	r3, #0
 8000c60:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			break;
 8000c64:	e0fd      	b.n	8000e62 <SD_disk_ioctl+0x242>
		case 1:
			SD_PowerOn();		/* Power On */
 8000c66:	f7ff fcd1 	bl	800060c <SD_PowerOn>
			res = RES_OK;
 8000c6a:	2300      	movs	r3, #0
 8000c6c:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			break;
 8000c70:	e0f7      	b.n	8000e62 <SD_disk_ioctl+0x242>
		case 2:
			*(ptr + 1) = SD_CheckPower();
 8000c72:	6a3b      	ldr	r3, [r7, #32]
 8000c74:	1c5c      	adds	r4, r3, #1
 8000c76:	f7ff fd17 	bl	80006a8 <SD_CheckPower>
 8000c7a:	4603      	mov	r3, r0
 8000c7c:	7023      	strb	r3, [r4, #0]
			res = RES_OK;		/* Power Check */
 8000c7e:	2300      	movs	r3, #0
 8000c80:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			break;
 8000c84:	e0ed      	b.n	8000e62 <SD_disk_ioctl+0x242>
		default:
			res = RES_PARERR;
 8000c86:	2304      	movs	r3, #4
 8000c88:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
 8000c8c:	e0e9      	b.n	8000e62 <SD_disk_ioctl+0x242>
		}
	}
	else
	{
		/* no disk */
		if (Stat & STA_NOINIT) return RES_NOTRDY;
 8000c8e:	4b78      	ldr	r3, [pc, #480]	; (8000e70 <SD_disk_ioctl+0x250>)
 8000c90:	781b      	ldrb	r3, [r3, #0]
 8000c92:	b2db      	uxtb	r3, r3
 8000c94:	f003 0301 	and.w	r3, r3, #1
 8000c98:	2b00      	cmp	r3, #0
 8000c9a:	d001      	beq.n	8000ca0 <SD_disk_ioctl+0x80>
 8000c9c:	2303      	movs	r3, #3
 8000c9e:	e0e2      	b.n	8000e66 <SD_disk_ioctl+0x246>

		SELECT();
 8000ca0:	f7ff fc20 	bl	80004e4 <SELECT>

		switch (ctrl)
 8000ca4:	79bb      	ldrb	r3, [r7, #6]
 8000ca6:	2b0d      	cmp	r3, #13
 8000ca8:	f200 80cc 	bhi.w	8000e44 <SD_disk_ioctl+0x224>
 8000cac:	a201      	add	r2, pc, #4	; (adr r2, 8000cb4 <SD_disk_ioctl+0x94>)
 8000cae:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8000cb2:	bf00      	nop
 8000cb4:	08000daf 	.word	0x08000daf
 8000cb8:	08000ced 	.word	0x08000ced
 8000cbc:	08000d9f 	.word	0x08000d9f
 8000cc0:	08000e45 	.word	0x08000e45
 8000cc4:	08000e45 	.word	0x08000e45
 8000cc8:	08000e45 	.word	0x08000e45
 8000ccc:	08000e45 	.word	0x08000e45
 8000cd0:	08000e45 	.word	0x08000e45
 8000cd4:	08000e45 	.word	0x08000e45
 8000cd8:	08000e45 	.word	0x08000e45
 8000cdc:	08000e45 	.word	0x08000e45
 8000ce0:	08000dc1 	.word	0x08000dc1
 8000ce4:	08000de5 	.word	0x08000de5
 8000ce8:	08000e09 	.word	0x08000e09
		{
		case GET_SECTOR_COUNT:
			/* SEND_CSD */
			if ((SD_SendCmd(CMD9, 0) == 0) && SD_RxDataBlock(csd, 16))
 8000cec:	2100      	movs	r1, #0
 8000cee:	2049      	movs	r0, #73	; 0x49
 8000cf0:	f7ff fd57 	bl	80007a2 <SD_SendCmd>
 8000cf4:	4603      	mov	r3, r0
 8000cf6:	2b00      	cmp	r3, #0
 8000cf8:	f040 80a8 	bne.w	8000e4c <SD_disk_ioctl+0x22c>
 8000cfc:	f107 030c 	add.w	r3, r7, #12
 8000d00:	2110      	movs	r1, #16
 8000d02:	4618      	mov	r0, r3
 8000d04:	f7ff fcdc 	bl	80006c0 <SD_RxDataBlock>
 8000d08:	4603      	mov	r3, r0
 8000d0a:	2b00      	cmp	r3, #0
 8000d0c:	f000 809e 	beq.w	8000e4c <SD_disk_ioctl+0x22c>
			{
				if ((csd[0] >> 6) == 1)
 8000d10:	7b3b      	ldrb	r3, [r7, #12]
 8000d12:	099b      	lsrs	r3, r3, #6
 8000d14:	b2db      	uxtb	r3, r3
 8000d16:	2b01      	cmp	r3, #1
 8000d18:	d10e      	bne.n	8000d38 <SD_disk_ioctl+0x118>
				{
					/* SDC V2 */
					csize = csd[9] + ((WORD) csd[8] << 8) + 1;
 8000d1a:	7d7b      	ldrb	r3, [r7, #21]
 8000d1c:	b29a      	uxth	r2, r3
 8000d1e:	7d3b      	ldrb	r3, [r7, #20]
 8000d20:	b29b      	uxth	r3, r3
 8000d22:	021b      	lsls	r3, r3, #8
 8000d24:	b29b      	uxth	r3, r3
 8000d26:	4413      	add	r3, r2
 8000d28:	b29b      	uxth	r3, r3
 8000d2a:	3301      	adds	r3, #1
 8000d2c:	83fb      	strh	r3, [r7, #30]
					*(DWORD*) buff = (DWORD) csize << 10;
 8000d2e:	8bfb      	ldrh	r3, [r7, #30]
 8000d30:	029a      	lsls	r2, r3, #10
 8000d32:	683b      	ldr	r3, [r7, #0]
 8000d34:	601a      	str	r2, [r3, #0]
 8000d36:	e02e      	b.n	8000d96 <SD_disk_ioctl+0x176>
				}
				else
				{
					/* MMC or SDC V1 */
					n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
 8000d38:	7c7b      	ldrb	r3, [r7, #17]
 8000d3a:	f003 030f 	and.w	r3, r3, #15
 8000d3e:	b2da      	uxtb	r2, r3
 8000d40:	7dbb      	ldrb	r3, [r7, #22]
 8000d42:	09db      	lsrs	r3, r3, #7
 8000d44:	b2db      	uxtb	r3, r3
 8000d46:	4413      	add	r3, r2
 8000d48:	b2da      	uxtb	r2, r3
 8000d4a:	7d7b      	ldrb	r3, [r7, #21]
 8000d4c:	005b      	lsls	r3, r3, #1
 8000d4e:	b2db      	uxtb	r3, r3
 8000d50:	f003 0306 	and.w	r3, r3, #6
 8000d54:	b2db      	uxtb	r3, r3
 8000d56:	4413      	add	r3, r2
 8000d58:	b2db      	uxtb	r3, r3
 8000d5a:	3302      	adds	r3, #2
 8000d5c:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
					csize = (csd[8] >> 6) + ((WORD) csd[7] << 2) + ((WORD) (csd[6] & 3) << 10) + 1;
 8000d60:	7d3b      	ldrb	r3, [r7, #20]
 8000d62:	099b      	lsrs	r3, r3, #6
 8000d64:	b2db      	uxtb	r3, r3
 8000d66:	b29a      	uxth	r2, r3
 8000d68:	7cfb      	ldrb	r3, [r7, #19]
 8000d6a:	b29b      	uxth	r3, r3
 8000d6c:	009b      	lsls	r3, r3, #2
 8000d6e:	b29b      	uxth	r3, r3
 8000d70:	4413      	add	r3, r2
 8000d72:	b29a      	uxth	r2, r3
 8000d74:	7cbb      	ldrb	r3, [r7, #18]
 8000d76:	029b      	lsls	r3, r3, #10
 8000d78:	b29b      	uxth	r3, r3
 8000d7a:	f403 6340 	and.w	r3, r3, #3072	; 0xc00
 8000d7e:	b29b      	uxth	r3, r3
 8000d80:	4413      	add	r3, r2
 8000d82:	b29b      	uxth	r3, r3
 8000d84:	3301      	adds	r3, #1
 8000d86:	83fb      	strh	r3, [r7, #30]
					*(DWORD*) buff = (DWORD) csize << (n - 9);
 8000d88:	8bfa      	ldrh	r2, [r7, #30]
 8000d8a:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8000d8e:	3b09      	subs	r3, #9
 8000d90:	409a      	lsls	r2, r3
 8000d92:	683b      	ldr	r3, [r7, #0]
 8000d94:	601a      	str	r2, [r3, #0]
				}
				res = RES_OK;
 8000d96:	2300      	movs	r3, #0
 8000d98:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			}
			break;
 8000d9c:	e056      	b.n	8000e4c <SD_disk_ioctl+0x22c>
		case GET_SECTOR_SIZE:
			*(WORD*) buff = 512;
 8000d9e:	683b      	ldr	r3, [r7, #0]
 8000da0:	f44f 7200 	mov.w	r2, #512	; 0x200
 8000da4:	801a      	strh	r2, [r3, #0]
			res = RES_OK;
 8000da6:	2300      	movs	r3, #0
 8000da8:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			break;
 8000dac:	e055      	b.n	8000e5a <SD_disk_ioctl+0x23a>
		case CTRL_SYNC:
			if (SD_ReadyWait() == 0xFF) res = RES_OK;
 8000dae:	f7ff fc13 	bl	80005d8 <SD_ReadyWait>
 8000db2:	4603      	mov	r3, r0
 8000db4:	2bff      	cmp	r3, #255	; 0xff
 8000db6:	d14b      	bne.n	8000e50 <SD_disk_ioctl+0x230>
 8000db8:	2300      	movs	r3, #0
 8000dba:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			break;
 8000dbe:	e047      	b.n	8000e50 <SD_disk_ioctl+0x230>
		case MMC_GET_CSD:
			/* SEND_CSD */
			if (SD_SendCmd(CMD9, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
 8000dc0:	2100      	movs	r1, #0
 8000dc2:	2049      	movs	r0, #73	; 0x49
 8000dc4:	f7ff fced 	bl	80007a2 <SD_SendCmd>
 8000dc8:	4603      	mov	r3, r0
 8000dca:	2b00      	cmp	r3, #0
 8000dcc:	d142      	bne.n	8000e54 <SD_disk_ioctl+0x234>
 8000dce:	2110      	movs	r1, #16
 8000dd0:	6a38      	ldr	r0, [r7, #32]
 8000dd2:	f7ff fc75 	bl	80006c0 <SD_RxDataBlock>
 8000dd6:	4603      	mov	r3, r0
 8000dd8:	2b00      	cmp	r3, #0
 8000dda:	d03b      	beq.n	8000e54 <SD_disk_ioctl+0x234>
 8000ddc:	2300      	movs	r3, #0
 8000dde:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			break;
 8000de2:	e037      	b.n	8000e54 <SD_disk_ioctl+0x234>
		case MMC_GET_CID:
			/* SEND_CID */
			if (SD_SendCmd(CMD10, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
 8000de4:	2100      	movs	r1, #0
 8000de6:	204a      	movs	r0, #74	; 0x4a
 8000de8:	f7ff fcdb 	bl	80007a2 <SD_SendCmd>
 8000dec:	4603      	mov	r3, r0
 8000dee:	2b00      	cmp	r3, #0
 8000df0:	d132      	bne.n	8000e58 <SD_disk_ioctl+0x238>
 8000df2:	2110      	movs	r1, #16
 8000df4:	6a38      	ldr	r0, [r7, #32]
 8000df6:	f7ff fc63 	bl	80006c0 <SD_RxDataBlock>
 8000dfa:	4603      	mov	r3, r0
 8000dfc:	2b00      	cmp	r3, #0
 8000dfe:	d02b      	beq.n	8000e58 <SD_disk_ioctl+0x238>
 8000e00:	2300      	movs	r3, #0
 8000e02:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			break;
 8000e06:	e027      	b.n	8000e58 <SD_disk_ioctl+0x238>
		case MMC_GET_OCR:
			/* READ_OCR */
			if (SD_SendCmd(CMD58, 0) == 0)
 8000e08:	2100      	movs	r1, #0
 8000e0a:	207a      	movs	r0, #122	; 0x7a
 8000e0c:	f7ff fcc9 	bl	80007a2 <SD_SendCmd>
 8000e10:	4603      	mov	r3, r0
 8000e12:	2b00      	cmp	r3, #0
 8000e14:	d116      	bne.n	8000e44 <SD_disk_ioctl+0x224>
			{
				for (n = 0; n < 4; n++)
 8000e16:	2300      	movs	r3, #0
 8000e18:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
 8000e1c:	e00b      	b.n	8000e36 <SD_disk_ioctl+0x216>
				{
					*ptr++ = SPI_RxByte();
 8000e1e:	6a3c      	ldr	r4, [r7, #32]
 8000e20:	1c63      	adds	r3, r4, #1
 8000e22:	623b      	str	r3, [r7, #32]
 8000e24:	f7ff fbae 	bl	8000584 <SPI_RxByte>
 8000e28:	4603      	mov	r3, r0
 8000e2a:	7023      	strb	r3, [r4, #0]
				for (n = 0; n < 4; n++)
 8000e2c:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8000e30:	3301      	adds	r3, #1
 8000e32:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
 8000e36:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8000e3a:	2b03      	cmp	r3, #3
 8000e3c:	d9ef      	bls.n	8000e1e <SD_disk_ioctl+0x1fe>
				}
				res = RES_OK;
 8000e3e:	2300      	movs	r3, #0
 8000e40:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			}
		default:
			res = RES_PARERR;
 8000e44:	2304      	movs	r3, #4
 8000e46:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
 8000e4a:	e006      	b.n	8000e5a <SD_disk_ioctl+0x23a>
			break;
 8000e4c:	bf00      	nop
 8000e4e:	e004      	b.n	8000e5a <SD_disk_ioctl+0x23a>
			break;
 8000e50:	bf00      	nop
 8000e52:	e002      	b.n	8000e5a <SD_disk_ioctl+0x23a>
			break;
 8000e54:	bf00      	nop
 8000e56:	e000      	b.n	8000e5a <SD_disk_ioctl+0x23a>
			break;
 8000e58:	bf00      	nop
		}

		DESELECT();
 8000e5a:	f7ff fb51 	bl	8000500 <DESELECT>
		SPI_RxByte();
 8000e5e:	f7ff fb91 	bl	8000584 <SPI_RxByte>
	}

	return res;
 8000e62:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
}
 8000e66:	4618      	mov	r0, r3
 8000e68:	372c      	adds	r7, #44	; 0x2c
 8000e6a:	46bd      	mov	sp, r7
 8000e6c:	bd90      	pop	{r4, r7, pc}
 8000e6e:	bf00      	nop
 8000e70:	20000000 	.word	0x20000000

08000e74 <transmit_uart>:
/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
// sending to UART
void transmit_uart(char *string){
 8000e74:	b580      	push	{r7, lr}
 8000e76:	b084      	sub	sp, #16
 8000e78:	af00      	add	r7, sp, #0
 8000e7a:	6078      	str	r0, [r7, #4]
	uint8_t len = strlen(string);
 8000e7c:	6878      	ldr	r0, [r7, #4]
 8000e7e:	f7ff f9a9 	bl	80001d4 <strlen>
 8000e82:	4603      	mov	r3, r0
 8000e84:	73fb      	strb	r3, [r7, #15]
	HAL_UART_Transmit(&huart2, (uint8_t*) string, len, 200);
 8000e86:	7bfb      	ldrb	r3, [r7, #15]
 8000e88:	b29a      	uxth	r2, r3
 8000e8a:	23c8      	movs	r3, #200	; 0xc8
 8000e8c:	6879      	ldr	r1, [r7, #4]
 8000e8e:	4803      	ldr	r0, [pc, #12]	; (8000e9c <transmit_uart+0x28>)
 8000e90:	f002 fbfd 	bl	800368e <HAL_UART_Transmit>
}
 8000e94:	bf00      	nop
 8000e96:	3710      	adds	r7, #16
 8000e98:	46bd      	mov	sp, r7
 8000e9a:	bd80      	pop	{r7, pc}
 8000e9c:	200013cc 	.word	0x200013cc

08000ea0 <main>:
/**
  * @brief  The application entry point.
  * @retval int
  */
int main(void)
{
 8000ea0:	b580      	push	{r7, lr}
 8000ea2:	af00      	add	r7, sp, #0
  /* USER CODE END 1 */

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();
 8000ea4:	f000 fba8 	bl	80015f8 <HAL_Init>
  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();
 8000ea8:	f000 f856 	bl	8000f58 <SystemClock_Config>
  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
 8000eac:	f000 f972 	bl	8001194 <MX_GPIO_Init>
  MX_USART2_UART_Init();
 8000eb0:	f000 f946 	bl	8001140 <MX_USART2_UART_Init>
  MX_SPI1_Init();
 8000eb4:	f000 f90e 	bl	80010d4 <MX_SPI1_Init>
  MX_FATFS_Init();
 8000eb8:	f003 f848 	bl	8003f4c <MX_FATFS_Init>
  MX_ADC1_Init();
 8000ebc:	f000 f8b8 	bl	8001030 <MX_ADC1_Init>
  /* USER CODE BEGIN 2 */

  /* Waiting for the Micro SD module to initialize */
  HAL_Delay(500);
 8000ec0:	f44f 70fa 	mov.w	r0, #500	; 0x1f4
 8000ec4:	f000 fc0a 	bl	80016dc <HAL_Delay>

  fres = f_mount(&fs, "", 0);
 8000ec8:	2200      	movs	r2, #0
 8000eca:	4919      	ldr	r1, [pc, #100]	; (8000f30 <main+0x90>)
 8000ecc:	4819      	ldr	r0, [pc, #100]	; (8000f34 <main+0x94>)
 8000ece:	f005 fa7f 	bl	80063d0 <f_mount>
 8000ed2:	4603      	mov	r3, r0
 8000ed4:	461a      	mov	r2, r3
 8000ed6:	4b18      	ldr	r3, [pc, #96]	; (8000f38 <main+0x98>)
 8000ed8:	701a      	strb	r2, [r3, #0]
  if (fres == FR_OK) {
 8000eda:	4b17      	ldr	r3, [pc, #92]	; (8000f38 <main+0x98>)
 8000edc:	781b      	ldrb	r3, [r3, #0]
 8000ede:	2b00      	cmp	r3, #0
 8000ee0:	d103      	bne.n	8000eea <main+0x4a>
  	transmit_uart("SD card is mounted successfully!\r\n");
 8000ee2:	4816      	ldr	r0, [pc, #88]	; (8000f3c <main+0x9c>)
 8000ee4:	f7ff ffc6 	bl	8000e74 <transmit_uart>
 8000ee8:	e006      	b.n	8000ef8 <main+0x58>
  } else if (fres != FR_OK) {
 8000eea:	4b13      	ldr	r3, [pc, #76]	; (8000f38 <main+0x98>)
 8000eec:	781b      	ldrb	r3, [r3, #0]
 8000eee:	2b00      	cmp	r3, #0
 8000ef0:	d002      	beq.n	8000ef8 <main+0x58>
  	transmit_uart("SD card is not mounted!\r\n");
 8000ef2:	4813      	ldr	r0, [pc, #76]	; (8000f40 <main+0xa0>)
 8000ef4:	f7ff ffbe 	bl	8000e74 <transmit_uart>
  }

  // FA_OPEN_APPEND opens file if it exists and if not then creates it,
  // the pointer is set at the end of the file for appending
  fres = f_open(&fil, "log-file_test.txt", FA_OPEN_APPEND | FA_WRITE | FA_READ);
 8000ef8:	2233      	movs	r2, #51	; 0x33
 8000efa:	4912      	ldr	r1, [pc, #72]	; (8000f44 <main+0xa4>)
 8000efc:	4812      	ldr	r0, [pc, #72]	; (8000f48 <main+0xa8>)
 8000efe:	f005 faad 	bl	800645c <f_open>
 8000f02:	4603      	mov	r3, r0
 8000f04:	461a      	mov	r2, r3
 8000f06:	4b0c      	ldr	r3, [pc, #48]	; (8000f38 <main+0x98>)
 8000f08:	701a      	strb	r2, [r3, #0]
  if (fres == FR_OK) {
 8000f0a:	4b0b      	ldr	r3, [pc, #44]	; (8000f38 <main+0x98>)
 8000f0c:	781b      	ldrb	r3, [r3, #0]
 8000f0e:	2b00      	cmp	r3, #0
 8000f10:	d103      	bne.n	8000f1a <main+0x7a>
  	transmit_uart("File opened.\r\n");
 8000f12:	480e      	ldr	r0, [pc, #56]	; (8000f4c <main+0xac>)
 8000f14:	f7ff ffae 	bl	8000e74 <transmit_uart>
 8000f18:	e006      	b.n	8000f28 <main+0x88>
  } else if (fres != FR_OK) {
 8000f1a:	4b07      	ldr	r3, [pc, #28]	; (8000f38 <main+0x98>)
 8000f1c:	781b      	ldrb	r3, [r3, #0]
 8000f1e:	2b00      	cmp	r3, #0
 8000f20:	d002      	beq.n	8000f28 <main+0x88>
  	transmit_uart("File was not opened!\r\n");
 8000f22:	480b      	ldr	r0, [pc, #44]	; (8000f50 <main+0xb0>)
 8000f24:	f7ff ffa6 	bl	8000e74 <transmit_uart>
   transmit_uart("Free space could not be determined!\r\n");
  }
  */

  // Start ADC Conversion
  HAL_ADC_Start_IT(&hadc1);
 8000f28:	480a      	ldr	r0, [pc, #40]	; (8000f54 <main+0xb4>)
 8000f2a:	f000 fc3d 	bl	80017a8 <HAL_ADC_Start_IT>

  /* USER CODE END 2 */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
 8000f2e:	e7fe      	b.n	8000f2e <main+0x8e>
 8000f30:	08007058 	.word	0x08007058
 8000f34:	20000284 	.word	0x20000284
 8000f38:	2000140c 	.word	0x2000140c
 8000f3c:	0800705c 	.word	0x0800705c
 8000f40:	08007080 	.word	0x08007080
 8000f44:	0800709c 	.word	0x0800709c
 8000f48:	20001410 	.word	0x20001410
 8000f4c:	080070b0 	.word	0x080070b0
 8000f50:	080070c0 	.word	0x080070c0
 8000f54:	200012c0 	.word	0x200012c0

08000f58 <SystemClock_Config>:
/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{
 8000f58:	b580      	push	{r7, lr}
 8000f5a:	b094      	sub	sp, #80	; 0x50
 8000f5c:	af00      	add	r7, sp, #0
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 8000f5e:	f107 0320 	add.w	r3, r7, #32
 8000f62:	2230      	movs	r2, #48	; 0x30
 8000f64:	2100      	movs	r1, #0
 8000f66:	4618      	mov	r0, r3
 8000f68:	f006 f862 	bl	8007030 <memset>
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 8000f6c:	f107 030c 	add.w	r3, r7, #12
 8000f70:	2200      	movs	r2, #0
 8000f72:	601a      	str	r2, [r3, #0]
 8000f74:	605a      	str	r2, [r3, #4]
 8000f76:	609a      	str	r2, [r3, #8]
 8000f78:	60da      	str	r2, [r3, #12]
 8000f7a:	611a      	str	r2, [r3, #16]

  /** Configure the main internal regulator output voltage
  */
  __HAL_RCC_PWR_CLK_ENABLE();
 8000f7c:	2300      	movs	r3, #0
 8000f7e:	60bb      	str	r3, [r7, #8]
 8000f80:	4b29      	ldr	r3, [pc, #164]	; (8001028 <SystemClock_Config+0xd0>)
 8000f82:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8000f84:	4a28      	ldr	r2, [pc, #160]	; (8001028 <SystemClock_Config+0xd0>)
 8000f86:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8000f8a:	6413      	str	r3, [r2, #64]	; 0x40
 8000f8c:	4b26      	ldr	r3, [pc, #152]	; (8001028 <SystemClock_Config+0xd0>)
 8000f8e:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8000f90:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8000f94:	60bb      	str	r3, [r7, #8]
 8000f96:	68bb      	ldr	r3, [r7, #8]
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
 8000f98:	2300      	movs	r3, #0
 8000f9a:	607b      	str	r3, [r7, #4]
 8000f9c:	4b23      	ldr	r3, [pc, #140]	; (800102c <SystemClock_Config+0xd4>)
 8000f9e:	681b      	ldr	r3, [r3, #0]
 8000fa0:	f423 4340 	bic.w	r3, r3, #49152	; 0xc000
 8000fa4:	4a21      	ldr	r2, [pc, #132]	; (800102c <SystemClock_Config+0xd4>)
 8000fa6:	f443 4300 	orr.w	r3, r3, #32768	; 0x8000
 8000faa:	6013      	str	r3, [r2, #0]
 8000fac:	4b1f      	ldr	r3, [pc, #124]	; (800102c <SystemClock_Config+0xd4>)
 8000fae:	681b      	ldr	r3, [r3, #0]
 8000fb0:	f403 4340 	and.w	r3, r3, #49152	; 0xc000
 8000fb4:	607b      	str	r3, [r7, #4]
 8000fb6:	687b      	ldr	r3, [r7, #4]
  /** Initializes the RCC Oscillators according to the specified parameters
  * in the RCC_OscInitTypeDef structure.
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 8000fb8:	2302      	movs	r3, #2
 8000fba:	623b      	str	r3, [r7, #32]
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 8000fbc:	2301      	movs	r3, #1
 8000fbe:	62fb      	str	r3, [r7, #44]	; 0x2c
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
 8000fc0:	2310      	movs	r3, #16
 8000fc2:	633b      	str	r3, [r7, #48]	; 0x30
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 8000fc4:	2302      	movs	r3, #2
 8000fc6:	63bb      	str	r3, [r7, #56]	; 0x38
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
 8000fc8:	2300      	movs	r3, #0
 8000fca:	63fb      	str	r3, [r7, #60]	; 0x3c
  RCC_OscInitStruct.PLL.PLLM = 16;
 8000fcc:	2310      	movs	r3, #16
 8000fce:	643b      	str	r3, [r7, #64]	; 0x40
  RCC_OscInitStruct.PLL.PLLN = 336;
 8000fd0:	f44f 73a8 	mov.w	r3, #336	; 0x150
 8000fd4:	647b      	str	r3, [r7, #68]	; 0x44
  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
 8000fd6:	2304      	movs	r3, #4
 8000fd8:	64bb      	str	r3, [r7, #72]	; 0x48
  RCC_OscInitStruct.PLL.PLLQ = 7;
 8000fda:	2307      	movs	r3, #7
 8000fdc:	64fb      	str	r3, [r7, #76]	; 0x4c
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 8000fde:	f107 0320 	add.w	r3, r7, #32
 8000fe2:	4618      	mov	r0, r3
 8000fe4:	f001 fabe 	bl	8002564 <HAL_RCC_OscConfig>
 8000fe8:	4603      	mov	r3, r0
 8000fea:	2b00      	cmp	r3, #0
 8000fec:	d001      	beq.n	8000ff2 <SystemClock_Config+0x9a>
  {
    Error_Handler();
 8000fee:	f000 f987 	bl	8001300 <Error_Handler>
  }
  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 8000ff2:	230f      	movs	r3, #15
 8000ff4:	60fb      	str	r3, [r7, #12]
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 8000ff6:	2302      	movs	r3, #2
 8000ff8:	613b      	str	r3, [r7, #16]
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 8000ffa:	2300      	movs	r3, #0
 8000ffc:	617b      	str	r3, [r7, #20]
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 8000ffe:	f44f 5380 	mov.w	r3, #4096	; 0x1000
 8001002:	61bb      	str	r3, [r7, #24]
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 8001004:	2300      	movs	r3, #0
 8001006:	61fb      	str	r3, [r7, #28]

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 8001008:	f107 030c 	add.w	r3, r7, #12
 800100c:	2102      	movs	r1, #2
 800100e:	4618      	mov	r0, r3
 8001010:	f001 fd18 	bl	8002a44 <HAL_RCC_ClockConfig>
 8001014:	4603      	mov	r3, r0
 8001016:	2b00      	cmp	r3, #0
 8001018:	d001      	beq.n	800101e <SystemClock_Config+0xc6>
  {
    Error_Handler();
 800101a:	f000 f971 	bl	8001300 <Error_Handler>
  }
}
 800101e:	bf00      	nop
 8001020:	3750      	adds	r7, #80	; 0x50
 8001022:	46bd      	mov	sp, r7
 8001024:	bd80      	pop	{r7, pc}
 8001026:	bf00      	nop
 8001028:	40023800 	.word	0x40023800
 800102c:	40007000 	.word	0x40007000

08001030 <MX_ADC1_Init>:
  * @brief ADC1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_ADC1_Init(void)
{
 8001030:	b580      	push	{r7, lr}
 8001032:	b084      	sub	sp, #16
 8001034:	af00      	add	r7, sp, #0

  /* USER CODE BEGIN ADC1_Init 0 */

  /* USER CODE END ADC1_Init 0 */

  ADC_ChannelConfTypeDef sConfig = {0};
 8001036:	463b      	mov	r3, r7
 8001038:	2200      	movs	r2, #0
 800103a:	601a      	str	r2, [r3, #0]
 800103c:	605a      	str	r2, [r3, #4]
 800103e:	609a      	str	r2, [r3, #8]
 8001040:	60da      	str	r2, [r3, #12]
  /* USER CODE BEGIN ADC1_Init 1 */

  /* USER CODE END ADC1_Init 1 */
  /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
  */
  hadc1.Instance = ADC1;
 8001042:	4b21      	ldr	r3, [pc, #132]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001044:	4a21      	ldr	r2, [pc, #132]	; (80010cc <MX_ADC1_Init+0x9c>)
 8001046:	601a      	str	r2, [r3, #0]
  hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
 8001048:	4b1f      	ldr	r3, [pc, #124]	; (80010c8 <MX_ADC1_Init+0x98>)
 800104a:	f44f 3280 	mov.w	r2, #65536	; 0x10000
 800104e:	605a      	str	r2, [r3, #4]
  hadc1.Init.Resolution = ADC_RESOLUTION_12B;
 8001050:	4b1d      	ldr	r3, [pc, #116]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001052:	2200      	movs	r2, #0
 8001054:	609a      	str	r2, [r3, #8]
  hadc1.Init.ScanConvMode = DISABLE;
 8001056:	4b1c      	ldr	r3, [pc, #112]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001058:	2200      	movs	r2, #0
 800105a:	611a      	str	r2, [r3, #16]
  hadc1.Init.ContinuousConvMode = ENABLE;
 800105c:	4b1a      	ldr	r3, [pc, #104]	; (80010c8 <MX_ADC1_Init+0x98>)
 800105e:	2201      	movs	r2, #1
 8001060:	761a      	strb	r2, [r3, #24]
  hadc1.Init.DiscontinuousConvMode = DISABLE;
 8001062:	4b19      	ldr	r3, [pc, #100]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001064:	2200      	movs	r2, #0
 8001066:	f883 2020 	strb.w	r2, [r3, #32]
  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 800106a:	4b17      	ldr	r3, [pc, #92]	; (80010c8 <MX_ADC1_Init+0x98>)
 800106c:	2200      	movs	r2, #0
 800106e:	62da      	str	r2, [r3, #44]	; 0x2c
  hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 8001070:	4b15      	ldr	r3, [pc, #84]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001072:	4a17      	ldr	r2, [pc, #92]	; (80010d0 <MX_ADC1_Init+0xa0>)
 8001074:	629a      	str	r2, [r3, #40]	; 0x28
  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
 8001076:	4b14      	ldr	r3, [pc, #80]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001078:	2200      	movs	r2, #0
 800107a:	60da      	str	r2, [r3, #12]
  hadc1.Init.NbrOfConversion = 1;
 800107c:	4b12      	ldr	r3, [pc, #72]	; (80010c8 <MX_ADC1_Init+0x98>)
 800107e:	2201      	movs	r2, #1
 8001080:	61da      	str	r2, [r3, #28]
  hadc1.Init.DMAContinuousRequests = DISABLE;
 8001082:	4b11      	ldr	r3, [pc, #68]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001084:	2200      	movs	r2, #0
 8001086:	f883 2030 	strb.w	r2, [r3, #48]	; 0x30
  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
 800108a:	4b0f      	ldr	r3, [pc, #60]	; (80010c8 <MX_ADC1_Init+0x98>)
 800108c:	2201      	movs	r2, #1
 800108e:	615a      	str	r2, [r3, #20]
  if (HAL_ADC_Init(&hadc1) != HAL_OK)
 8001090:	480d      	ldr	r0, [pc, #52]	; (80010c8 <MX_ADC1_Init+0x98>)
 8001092:	f000 fb45 	bl	8001720 <HAL_ADC_Init>
 8001096:	4603      	mov	r3, r0
 8001098:	2b00      	cmp	r3, #0
 800109a:	d001      	beq.n	80010a0 <MX_ADC1_Init+0x70>
  {
    Error_Handler();
 800109c:	f000 f930 	bl	8001300 <Error_Handler>
  }
  /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
  */
  sConfig.Channel = ADC_CHANNEL_0;
 80010a0:	2300      	movs	r3, #0
 80010a2:	603b      	str	r3, [r7, #0]
  sConfig.Rank = 1;
 80010a4:	2301      	movs	r3, #1
 80010a6:	607b      	str	r3, [r7, #4]
  sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
 80010a8:	2307      	movs	r3, #7
 80010aa:	60bb      	str	r3, [r7, #8]
  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
 80010ac:	463b      	mov	r3, r7
 80010ae:	4619      	mov	r1, r3
 80010b0:	4805      	ldr	r0, [pc, #20]	; (80010c8 <MX_ADC1_Init+0x98>)
 80010b2:	f000 fd81 	bl	8001bb8 <HAL_ADC_ConfigChannel>
 80010b6:	4603      	mov	r3, r0
 80010b8:	2b00      	cmp	r3, #0
 80010ba:	d001      	beq.n	80010c0 <MX_ADC1_Init+0x90>
  {
    Error_Handler();
 80010bc:	f000 f920 	bl	8001300 <Error_Handler>
  }
  /* USER CODE BEGIN ADC1_Init 2 */

  /* USER CODE END ADC1_Init 2 */

}
 80010c0:	bf00      	nop
 80010c2:	3710      	adds	r7, #16
 80010c4:	46bd      	mov	sp, r7
 80010c6:	bd80      	pop	{r7, pc}
 80010c8:	200012c0 	.word	0x200012c0
 80010cc:	40012000 	.word	0x40012000
 80010d0:	0f000001 	.word	0x0f000001

080010d4 <MX_SPI1_Init>:
  * @brief SPI1 Initialization Function
  * @param None
  * @retval None
  */
static void MX_SPI1_Init(void)
{
 80010d4:	b580      	push	{r7, lr}
 80010d6:	af00      	add	r7, sp, #0

  /* USER CODE BEGIN SPI1_Init 1 */

  /* USER CODE END SPI1_Init 1 */
  /* SPI1 parameter configuration*/
  hspi1.Instance = SPI1;
 80010d8:	4b17      	ldr	r3, [pc, #92]	; (8001138 <MX_SPI1_Init+0x64>)
 80010da:	4a18      	ldr	r2, [pc, #96]	; (800113c <MX_SPI1_Init+0x68>)
 80010dc:	601a      	str	r2, [r3, #0]
  hspi1.Init.Mode = SPI_MODE_MASTER;
 80010de:	4b16      	ldr	r3, [pc, #88]	; (8001138 <MX_SPI1_Init+0x64>)
 80010e0:	f44f 7282 	mov.w	r2, #260	; 0x104
 80010e4:	605a      	str	r2, [r3, #4]
  hspi1.Init.Direction = SPI_DIRECTION_2LINES;
 80010e6:	4b14      	ldr	r3, [pc, #80]	; (8001138 <MX_SPI1_Init+0x64>)
 80010e8:	2200      	movs	r2, #0
 80010ea:	609a      	str	r2, [r3, #8]
  hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
 80010ec:	4b12      	ldr	r3, [pc, #72]	; (8001138 <MX_SPI1_Init+0x64>)
 80010ee:	2200      	movs	r2, #0
 80010f0:	60da      	str	r2, [r3, #12]
  hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
 80010f2:	4b11      	ldr	r3, [pc, #68]	; (8001138 <MX_SPI1_Init+0x64>)
 80010f4:	2200      	movs	r2, #0
 80010f6:	611a      	str	r2, [r3, #16]
  hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
 80010f8:	4b0f      	ldr	r3, [pc, #60]	; (8001138 <MX_SPI1_Init+0x64>)
 80010fa:	2200      	movs	r2, #0
 80010fc:	615a      	str	r2, [r3, #20]
  hspi1.Init.NSS = SPI_NSS_SOFT;
 80010fe:	4b0e      	ldr	r3, [pc, #56]	; (8001138 <MX_SPI1_Init+0x64>)
 8001100:	f44f 7200 	mov.w	r2, #512	; 0x200
 8001104:	619a      	str	r2, [r3, #24]
  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
 8001106:	4b0c      	ldr	r3, [pc, #48]	; (8001138 <MX_SPI1_Init+0x64>)
 8001108:	2210      	movs	r2, #16
 800110a:	61da      	str	r2, [r3, #28]
  hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 800110c:	4b0a      	ldr	r3, [pc, #40]	; (8001138 <MX_SPI1_Init+0x64>)
 800110e:	2200      	movs	r2, #0
 8001110:	621a      	str	r2, [r3, #32]
  hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
 8001112:	4b09      	ldr	r3, [pc, #36]	; (8001138 <MX_SPI1_Init+0x64>)
 8001114:	2200      	movs	r2, #0
 8001116:	625a      	str	r2, [r3, #36]	; 0x24
  hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 8001118:	4b07      	ldr	r3, [pc, #28]	; (8001138 <MX_SPI1_Init+0x64>)
 800111a:	2200      	movs	r2, #0
 800111c:	629a      	str	r2, [r3, #40]	; 0x28
  hspi1.Init.CRCPolynomial = 10;
 800111e:	4b06      	ldr	r3, [pc, #24]	; (8001138 <MX_SPI1_Init+0x64>)
 8001120:	220a      	movs	r2, #10
 8001122:	62da      	str	r2, [r3, #44]	; 0x2c
  if (HAL_SPI_Init(&hspi1) != HAL_OK)
 8001124:	4804      	ldr	r0, [pc, #16]	; (8001138 <MX_SPI1_Init+0x64>)
 8001126:	f001 fe7f 	bl	8002e28 <HAL_SPI_Init>
 800112a:	4603      	mov	r3, r0
 800112c:	2b00      	cmp	r3, #0
 800112e:	d001      	beq.n	8001134 <MX_SPI1_Init+0x60>
  {
    Error_Handler();
 8001130:	f000 f8e6 	bl	8001300 <Error_Handler>
  }
  /* USER CODE BEGIN SPI1_Init 2 */

  /* USER CODE END SPI1_Init 2 */

}
 8001134:	bf00      	nop
 8001136:	bd80      	pop	{r7, pc}
 8001138:	20001374 	.word	0x20001374
 800113c:	40013000 	.word	0x40013000

08001140 <MX_USART2_UART_Init>:
  * @brief USART2 Initialization Function
  * @param None
  * @retval None
  */
static void MX_USART2_UART_Init(void)
{
 8001140:	b580      	push	{r7, lr}
 8001142:	af00      	add	r7, sp, #0
  /* USER CODE END USART2_Init 0 */

  /* USER CODE BEGIN USART2_Init 1 */

  /* USER CODE END USART2_Init 1 */
  huart2.Instance = USART2;
 8001144:	4b11      	ldr	r3, [pc, #68]	; (800118c <MX_USART2_UART_Init+0x4c>)
 8001146:	4a12      	ldr	r2, [pc, #72]	; (8001190 <MX_USART2_UART_Init+0x50>)
 8001148:	601a      	str	r2, [r3, #0]
  huart2.Init.BaudRate = 115200;
 800114a:	4b10      	ldr	r3, [pc, #64]	; (800118c <MX_USART2_UART_Init+0x4c>)
 800114c:	f44f 32e1 	mov.w	r2, #115200	; 0x1c200
 8001150:	605a      	str	r2, [r3, #4]
  huart2.Init.WordLength = UART_WORDLENGTH_8B;
 8001152:	4b0e      	ldr	r3, [pc, #56]	; (800118c <MX_USART2_UART_Init+0x4c>)
 8001154:	2200      	movs	r2, #0
 8001156:	609a      	str	r2, [r3, #8]
  huart2.Init.StopBits = UART_STOPBITS_1;
 8001158:	4b0c      	ldr	r3, [pc, #48]	; (800118c <MX_USART2_UART_Init+0x4c>)
 800115a:	2200      	movs	r2, #0
 800115c:	60da      	str	r2, [r3, #12]
  huart2.Init.Parity = UART_PARITY_NONE;
 800115e:	4b0b      	ldr	r3, [pc, #44]	; (800118c <MX_USART2_UART_Init+0x4c>)
 8001160:	2200      	movs	r2, #0
 8001162:	611a      	str	r2, [r3, #16]
  huart2.Init.Mode = UART_MODE_TX_RX;
 8001164:	4b09      	ldr	r3, [pc, #36]	; (800118c <MX_USART2_UART_Init+0x4c>)
 8001166:	220c      	movs	r2, #12
 8001168:	615a      	str	r2, [r3, #20]
  huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
 800116a:	4b08      	ldr	r3, [pc, #32]	; (800118c <MX_USART2_UART_Init+0x4c>)
 800116c:	2200      	movs	r2, #0
 800116e:	619a      	str	r2, [r3, #24]
  huart2.Init.OverSampling = UART_OVERSAMPLING_16;
 8001170:	4b06      	ldr	r3, [pc, #24]	; (800118c <MX_USART2_UART_Init+0x4c>)
 8001172:	2200      	movs	r2, #0
 8001174:	61da      	str	r2, [r3, #28]
  if (HAL_UART_Init(&huart2) != HAL_OK)
 8001176:	4805      	ldr	r0, [pc, #20]	; (800118c <MX_USART2_UART_Init+0x4c>)
 8001178:	f002 fa3c 	bl	80035f4 <HAL_UART_Init>
 800117c:	4603      	mov	r3, r0
 800117e:	2b00      	cmp	r3, #0
 8001180:	d001      	beq.n	8001186 <MX_USART2_UART_Init+0x46>
  {
    Error_Handler();
 8001182:	f000 f8bd 	bl	8001300 <Error_Handler>
  }
  /* USER CODE BEGIN USART2_Init 2 */

  /* USER CODE END USART2_Init 2 */

}
 8001186:	bf00      	nop
 8001188:	bd80      	pop	{r7, pc}
 800118a:	bf00      	nop
 800118c:	200013cc 	.word	0x200013cc
 8001190:	40004400 	.word	0x40004400

08001194 <MX_GPIO_Init>:
  * @brief GPIO Initialization Function
  * @param None
  * @retval None
  */
static void MX_GPIO_Init(void)
{
 8001194:	b580      	push	{r7, lr}
 8001196:	b08a      	sub	sp, #40	; 0x28
 8001198:	af00      	add	r7, sp, #0
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 800119a:	f107 0314 	add.w	r3, r7, #20
 800119e:	2200      	movs	r2, #0
 80011a0:	601a      	str	r2, [r3, #0]
 80011a2:	605a      	str	r2, [r3, #4]
 80011a4:	609a      	str	r2, [r3, #8]
 80011a6:	60da      	str	r2, [r3, #12]
 80011a8:	611a      	str	r2, [r3, #16]

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOC_CLK_ENABLE();
 80011aa:	2300      	movs	r3, #0
 80011ac:	613b      	str	r3, [r7, #16]
 80011ae:	4b2d      	ldr	r3, [pc, #180]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011b0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80011b2:	4a2c      	ldr	r2, [pc, #176]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011b4:	f043 0304 	orr.w	r3, r3, #4
 80011b8:	6313      	str	r3, [r2, #48]	; 0x30
 80011ba:	4b2a      	ldr	r3, [pc, #168]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011bc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80011be:	f003 0304 	and.w	r3, r3, #4
 80011c2:	613b      	str	r3, [r7, #16]
 80011c4:	693b      	ldr	r3, [r7, #16]
  __HAL_RCC_GPIOH_CLK_ENABLE();
 80011c6:	2300      	movs	r3, #0
 80011c8:	60fb      	str	r3, [r7, #12]
 80011ca:	4b26      	ldr	r3, [pc, #152]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011cc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80011ce:	4a25      	ldr	r2, [pc, #148]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011d0:	f043 0380 	orr.w	r3, r3, #128	; 0x80
 80011d4:	6313      	str	r3, [r2, #48]	; 0x30
 80011d6:	4b23      	ldr	r3, [pc, #140]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011d8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80011da:	f003 0380 	and.w	r3, r3, #128	; 0x80
 80011de:	60fb      	str	r3, [r7, #12]
 80011e0:	68fb      	ldr	r3, [r7, #12]
  __HAL_RCC_GPIOA_CLK_ENABLE();
 80011e2:	2300      	movs	r3, #0
 80011e4:	60bb      	str	r3, [r7, #8]
 80011e6:	4b1f      	ldr	r3, [pc, #124]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011e8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80011ea:	4a1e      	ldr	r2, [pc, #120]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011ec:	f043 0301 	orr.w	r3, r3, #1
 80011f0:	6313      	str	r3, [r2, #48]	; 0x30
 80011f2:	4b1c      	ldr	r3, [pc, #112]	; (8001264 <MX_GPIO_Init+0xd0>)
 80011f4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80011f6:	f003 0301 	and.w	r3, r3, #1
 80011fa:	60bb      	str	r3, [r7, #8]
 80011fc:	68bb      	ldr	r3, [r7, #8]
  __HAL_RCC_GPIOB_CLK_ENABLE();
 80011fe:	2300      	movs	r3, #0
 8001200:	607b      	str	r3, [r7, #4]
 8001202:	4b18      	ldr	r3, [pc, #96]	; (8001264 <MX_GPIO_Init+0xd0>)
 8001204:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8001206:	4a17      	ldr	r2, [pc, #92]	; (8001264 <MX_GPIO_Init+0xd0>)
 8001208:	f043 0302 	orr.w	r3, r3, #2
 800120c:	6313      	str	r3, [r2, #48]	; 0x30
 800120e:	4b15      	ldr	r3, [pc, #84]	; (8001264 <MX_GPIO_Init+0xd0>)
 8001210:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8001212:	f003 0302 	and.w	r3, r3, #2
 8001216:	607b      	str	r3, [r7, #4]
 8001218:	687b      	ldr	r3, [r7, #4]

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET);
 800121a:	2201      	movs	r2, #1
 800121c:	2140      	movs	r1, #64	; 0x40
 800121e:	4812      	ldr	r0, [pc, #72]	; (8001268 <MX_GPIO_Init+0xd4>)
 8001220:	f001 f986 	bl	8002530 <HAL_GPIO_WritePin>

  /*Configure GPIO pin : B1_Pin */
  GPIO_InitStruct.Pin = B1_Pin;
 8001224:	f44f 5300 	mov.w	r3, #8192	; 0x2000
 8001228:	617b      	str	r3, [r7, #20]
  GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
 800122a:	4b10      	ldr	r3, [pc, #64]	; (800126c <MX_GPIO_Init+0xd8>)
 800122c:	61bb      	str	r3, [r7, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 800122e:	2300      	movs	r3, #0
 8001230:	61fb      	str	r3, [r7, #28]
  HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
 8001232:	f107 0314 	add.w	r3, r7, #20
 8001236:	4619      	mov	r1, r3
 8001238:	480d      	ldr	r0, [pc, #52]	; (8001270 <MX_GPIO_Init+0xdc>)
 800123a:	f000 fff7 	bl	800222c <HAL_GPIO_Init>

  /*Configure GPIO pin : PB6 */
  GPIO_InitStruct.Pin = GPIO_PIN_6;
 800123e:	2340      	movs	r3, #64	; 0x40
 8001240:	617b      	str	r3, [r7, #20]
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
 8001242:	2301      	movs	r3, #1
 8001244:	61bb      	str	r3, [r7, #24]
  GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001246:	2300      	movs	r3, #0
 8001248:	61fb      	str	r3, [r7, #28]
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
 800124a:	2301      	movs	r3, #1
 800124c:	623b      	str	r3, [r7, #32]
  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 800124e:	f107 0314 	add.w	r3, r7, #20
 8001252:	4619      	mov	r1, r3
 8001254:	4804      	ldr	r0, [pc, #16]	; (8001268 <MX_GPIO_Init+0xd4>)
 8001256:	f000 ffe9 	bl	800222c <HAL_GPIO_Init>

}
 800125a:	bf00      	nop
 800125c:	3728      	adds	r7, #40	; 0x28
 800125e:	46bd      	mov	sp, r7
 8001260:	bd80      	pop	{r7, pc}
 8001262:	bf00      	nop
 8001264:	40023800 	.word	0x40023800
 8001268:	40020400 	.word	0x40020400
 800126c:	10210000 	.word	0x10210000
 8001270:	40020800 	.word	0x40020800

08001274 <HAL_ADC_ConvCpltCallback>:

/* USER CODE BEGIN 4 */
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
 8001274:	b580      	push	{r7, lr}
 8001276:	b082      	sub	sp, #8
 8001278:	af00      	add	r7, sp, #0
 800127a:	6078      	str	r0, [r7, #4]
	 // Read & Update The ADC Result
	 AD_RES = HAL_ADC_GetValue(&hadc1);
 800127c:	4813      	ldr	r0, [pc, #76]	; (80012cc <HAL_ADC_ConvCpltCallback+0x58>)
 800127e:	f000 fc84 	bl	8001b8a <HAL_ADC_GetValue>
 8001282:	4603      	mov	r3, r0
 8001284:	b29a      	uxth	r2, r3
 8001286:	4b12      	ldr	r3, [pc, #72]	; (80012d0 <HAL_ADC_ConvCpltCallback+0x5c>)
 8001288:	801a      	strh	r2, [r3, #0]


	 f_puts(AD_RES, &fil);
 800128a:	4b11      	ldr	r3, [pc, #68]	; (80012d0 <HAL_ADC_ConvCpltCallback+0x5c>)
 800128c:	881b      	ldrh	r3, [r3, #0]
 800128e:	4911      	ldr	r1, [pc, #68]	; (80012d4 <HAL_ADC_ConvCpltCallback+0x60>)
 8001290:	4618      	mov	r0, r3
 8001292:	f005 fd63 	bl	8006d5c <f_puts>

	 fres = f_close(&fil);
 8001296:	480f      	ldr	r0, [pc, #60]	; (80012d4 <HAL_ADC_ConvCpltCallback+0x60>)
 8001298:	f005 fcbe 	bl	8006c18 <f_close>
 800129c:	4603      	mov	r3, r0
 800129e:	461a      	mov	r2, r3
 80012a0:	4b0d      	ldr	r3, [pc, #52]	; (80012d8 <HAL_ADC_ConvCpltCallback+0x64>)
 80012a2:	701a      	strb	r2, [r3, #0]
	 if (fres == FR_OK) {
 80012a4:	4b0c      	ldr	r3, [pc, #48]	; (80012d8 <HAL_ADC_ConvCpltCallback+0x64>)
 80012a6:	781b      	ldrb	r3, [r3, #0]
 80012a8:	2b00      	cmp	r3, #0
 80012aa:	d103      	bne.n	80012b4 <HAL_ADC_ConvCpltCallback+0x40>
	   	transmit_uart("File is closed.\r\n");
 80012ac:	480b      	ldr	r0, [pc, #44]	; (80012dc <HAL_ADC_ConvCpltCallback+0x68>)
 80012ae:	f7ff fde1 	bl	8000e74 <transmit_uart>
	 } else if (fres != FR_OK) {
	     transmit_uart("File was not closed.\r\n");
	 }
}
 80012b2:	e006      	b.n	80012c2 <HAL_ADC_ConvCpltCallback+0x4e>
	 } else if (fres != FR_OK) {
 80012b4:	4b08      	ldr	r3, [pc, #32]	; (80012d8 <HAL_ADC_ConvCpltCallback+0x64>)
 80012b6:	781b      	ldrb	r3, [r3, #0]
 80012b8:	2b00      	cmp	r3, #0
 80012ba:	d002      	beq.n	80012c2 <HAL_ADC_ConvCpltCallback+0x4e>
	     transmit_uart("File was not closed.\r\n");
 80012bc:	4808      	ldr	r0, [pc, #32]	; (80012e0 <HAL_ADC_ConvCpltCallback+0x6c>)
 80012be:	f7ff fdd9 	bl	8000e74 <transmit_uart>
}
 80012c2:	bf00      	nop
 80012c4:	3708      	adds	r7, #8
 80012c6:	46bd      	mov	sp, r7
 80012c8:	bd80      	pop	{r7, pc}
 80012ca:	bf00      	nop
 80012cc:	200012c0 	.word	0x200012c0
 80012d0:	20000280 	.word	0x20000280
 80012d4:	20001410 	.word	0x20001410
 80012d8:	2000140c 	.word	0x2000140c
 80012dc:	080070d8 	.word	0x080070d8
 80012e0:	080070ec 	.word	0x080070ec

080012e4 <HAL_ADC_ErrorCallback>:

void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
 80012e4:	b580      	push	{r7, lr}
 80012e6:	b082      	sub	sp, #8
 80012e8:	af00      	add	r7, sp, #0
 80012ea:	6078      	str	r0, [r7, #4]
	transmit_uart("ADC Error!\r\n");
 80012ec:	4803      	ldr	r0, [pc, #12]	; (80012fc <HAL_ADC_ErrorCallback+0x18>)
 80012ee:	f7ff fdc1 	bl	8000e74 <transmit_uart>
}
 80012f2:	bf00      	nop
 80012f4:	3708      	adds	r7, #8
 80012f6:	46bd      	mov	sp, r7
 80012f8:	bd80      	pop	{r7, pc}
 80012fa:	bf00      	nop
 80012fc:	08007104 	.word	0x08007104

08001300 <Error_Handler>:
/**
  * @brief  This function is executed in case of error occurrence.
  * @retval None
  */
void Error_Handler(void)
{
 8001300:	b480      	push	{r7}
 8001302:	af00      	add	r7, sp, #0
  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
           Can only be executed in Privileged modes.
 */
__STATIC_FORCEINLINE void __disable_irq(void)
{
  __ASM volatile ("cpsid i" : : : "memory");
 8001304:	b672      	cpsid	i
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  __disable_irq();
  while (1)
 8001306:	e7fe      	b.n	8001306 <Error_Handler+0x6>

08001308 <HAL_MspInit>:
/* USER CODE END 0 */
/**
  * Initializes the Global MSP.
  */
void HAL_MspInit(void)
{
 8001308:	b580      	push	{r7, lr}
 800130a:	b082      	sub	sp, #8
 800130c:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MspInit 0 */

  /* USER CODE END MspInit 0 */

  __HAL_RCC_SYSCFG_CLK_ENABLE();
 800130e:	2300      	movs	r3, #0
 8001310:	607b      	str	r3, [r7, #4]
 8001312:	4b10      	ldr	r3, [pc, #64]	; (8001354 <HAL_MspInit+0x4c>)
 8001314:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 8001316:	4a0f      	ldr	r2, [pc, #60]	; (8001354 <HAL_MspInit+0x4c>)
 8001318:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
 800131c:	6453      	str	r3, [r2, #68]	; 0x44
 800131e:	4b0d      	ldr	r3, [pc, #52]	; (8001354 <HAL_MspInit+0x4c>)
 8001320:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 8001322:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
 8001326:	607b      	str	r3, [r7, #4]
 8001328:	687b      	ldr	r3, [r7, #4]
  __HAL_RCC_PWR_CLK_ENABLE();
 800132a:	2300      	movs	r3, #0
 800132c:	603b      	str	r3, [r7, #0]
 800132e:	4b09      	ldr	r3, [pc, #36]	; (8001354 <HAL_MspInit+0x4c>)
 8001330:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001332:	4a08      	ldr	r2, [pc, #32]	; (8001354 <HAL_MspInit+0x4c>)
 8001334:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 8001338:	6413      	str	r3, [r2, #64]	; 0x40
 800133a:	4b06      	ldr	r3, [pc, #24]	; (8001354 <HAL_MspInit+0x4c>)
 800133c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 800133e:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 8001342:	603b      	str	r3, [r7, #0]
 8001344:	683b      	ldr	r3, [r7, #0]

  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
 8001346:	2007      	movs	r0, #7
 8001348:	f000 ff2e 	bl	80021a8 <HAL_NVIC_SetPriorityGrouping>
  /* System interrupt init*/

  /* USER CODE BEGIN MspInit 1 */

  /* USER CODE END MspInit 1 */
}
 800134c:	bf00      	nop
 800134e:	3708      	adds	r7, #8
 8001350:	46bd      	mov	sp, r7
 8001352:	bd80      	pop	{r7, pc}
 8001354:	40023800 	.word	0x40023800

08001358 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
 8001358:	b580      	push	{r7, lr}
 800135a:	b08a      	sub	sp, #40	; 0x28
 800135c:	af00      	add	r7, sp, #0
 800135e:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001360:	f107 0314 	add.w	r3, r7, #20
 8001364:	2200      	movs	r2, #0
 8001366:	601a      	str	r2, [r3, #0]
 8001368:	605a      	str	r2, [r3, #4]
 800136a:	609a      	str	r2, [r3, #8]
 800136c:	60da      	str	r2, [r3, #12]
 800136e:	611a      	str	r2, [r3, #16]
  if(hadc->Instance==ADC1)
 8001370:	687b      	ldr	r3, [r7, #4]
 8001372:	681b      	ldr	r3, [r3, #0]
 8001374:	4a1b      	ldr	r2, [pc, #108]	; (80013e4 <HAL_ADC_MspInit+0x8c>)
 8001376:	4293      	cmp	r3, r2
 8001378:	d12f      	bne.n	80013da <HAL_ADC_MspInit+0x82>
  {
  /* USER CODE BEGIN ADC1_MspInit 0 */

  /* USER CODE END ADC1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_ADC1_CLK_ENABLE();
 800137a:	2300      	movs	r3, #0
 800137c:	613b      	str	r3, [r7, #16]
 800137e:	4b1a      	ldr	r3, [pc, #104]	; (80013e8 <HAL_ADC_MspInit+0x90>)
 8001380:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 8001382:	4a19      	ldr	r2, [pc, #100]	; (80013e8 <HAL_ADC_MspInit+0x90>)
 8001384:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8001388:	6453      	str	r3, [r2, #68]	; 0x44
 800138a:	4b17      	ldr	r3, [pc, #92]	; (80013e8 <HAL_ADC_MspInit+0x90>)
 800138c:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 800138e:	f403 7380 	and.w	r3, r3, #256	; 0x100
 8001392:	613b      	str	r3, [r7, #16]
 8001394:	693b      	ldr	r3, [r7, #16]

    __HAL_RCC_GPIOA_CLK_ENABLE();
 8001396:	2300      	movs	r3, #0
 8001398:	60fb      	str	r3, [r7, #12]
 800139a:	4b13      	ldr	r3, [pc, #76]	; (80013e8 <HAL_ADC_MspInit+0x90>)
 800139c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 800139e:	4a12      	ldr	r2, [pc, #72]	; (80013e8 <HAL_ADC_MspInit+0x90>)
 80013a0:	f043 0301 	orr.w	r3, r3, #1
 80013a4:	6313      	str	r3, [r2, #48]	; 0x30
 80013a6:	4b10      	ldr	r3, [pc, #64]	; (80013e8 <HAL_ADC_MspInit+0x90>)
 80013a8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80013aa:	f003 0301 	and.w	r3, r3, #1
 80013ae:	60fb      	str	r3, [r7, #12]
 80013b0:	68fb      	ldr	r3, [r7, #12]
    /**ADC1 GPIO Configuration
    PA0-WKUP     ------> ADC1_IN0
    */
    GPIO_InitStruct.Pin = GPIO_PIN_0;
 80013b2:	2301      	movs	r3, #1
 80013b4:	617b      	str	r3, [r7, #20]
    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 80013b6:	2303      	movs	r3, #3
 80013b8:	61bb      	str	r3, [r7, #24]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80013ba:	2300      	movs	r3, #0
 80013bc:	61fb      	str	r3, [r7, #28]
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80013be:	f107 0314 	add.w	r3, r7, #20
 80013c2:	4619      	mov	r1, r3
 80013c4:	4809      	ldr	r0, [pc, #36]	; (80013ec <HAL_ADC_MspInit+0x94>)
 80013c6:	f000 ff31 	bl	800222c <HAL_GPIO_Init>

    /* ADC1 interrupt Init */
    HAL_NVIC_SetPriority(ADC_IRQn, 0, 0);
 80013ca:	2200      	movs	r2, #0
 80013cc:	2100      	movs	r1, #0
 80013ce:	2012      	movs	r0, #18
 80013d0:	f000 fef5 	bl	80021be <HAL_NVIC_SetPriority>
    HAL_NVIC_EnableIRQ(ADC_IRQn);
 80013d4:	2012      	movs	r0, #18
 80013d6:	f000 ff0e 	bl	80021f6 <HAL_NVIC_EnableIRQ>
  /* USER CODE BEGIN ADC1_MspInit 1 */

  /* USER CODE END ADC1_MspInit 1 */
  }

}
 80013da:	bf00      	nop
 80013dc:	3728      	adds	r7, #40	; 0x28
 80013de:	46bd      	mov	sp, r7
 80013e0:	bd80      	pop	{r7, pc}
 80013e2:	bf00      	nop
 80013e4:	40012000 	.word	0x40012000
 80013e8:	40023800 	.word	0x40023800
 80013ec:	40020000 	.word	0x40020000

080013f0 <HAL_SPI_MspInit>:
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
 80013f0:	b580      	push	{r7, lr}
 80013f2:	b08a      	sub	sp, #40	; 0x28
 80013f4:	af00      	add	r7, sp, #0
 80013f6:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 80013f8:	f107 0314 	add.w	r3, r7, #20
 80013fc:	2200      	movs	r2, #0
 80013fe:	601a      	str	r2, [r3, #0]
 8001400:	605a      	str	r2, [r3, #4]
 8001402:	609a      	str	r2, [r3, #8]
 8001404:	60da      	str	r2, [r3, #12]
 8001406:	611a      	str	r2, [r3, #16]
  if(hspi->Instance==SPI1)
 8001408:	687b      	ldr	r3, [r7, #4]
 800140a:	681b      	ldr	r3, [r3, #0]
 800140c:	4a19      	ldr	r2, [pc, #100]	; (8001474 <HAL_SPI_MspInit+0x84>)
 800140e:	4293      	cmp	r3, r2
 8001410:	d12b      	bne.n	800146a <HAL_SPI_MspInit+0x7a>
  {
  /* USER CODE BEGIN SPI1_MspInit 0 */

  /* USER CODE END SPI1_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_SPI1_CLK_ENABLE();
 8001412:	2300      	movs	r3, #0
 8001414:	613b      	str	r3, [r7, #16]
 8001416:	4b18      	ldr	r3, [pc, #96]	; (8001478 <HAL_SPI_MspInit+0x88>)
 8001418:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 800141a:	4a17      	ldr	r2, [pc, #92]	; (8001478 <HAL_SPI_MspInit+0x88>)
 800141c:	f443 5380 	orr.w	r3, r3, #4096	; 0x1000
 8001420:	6453      	str	r3, [r2, #68]	; 0x44
 8001422:	4b15      	ldr	r3, [pc, #84]	; (8001478 <HAL_SPI_MspInit+0x88>)
 8001424:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 8001426:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
 800142a:	613b      	str	r3, [r7, #16]
 800142c:	693b      	ldr	r3, [r7, #16]

    __HAL_RCC_GPIOA_CLK_ENABLE();
 800142e:	2300      	movs	r3, #0
 8001430:	60fb      	str	r3, [r7, #12]
 8001432:	4b11      	ldr	r3, [pc, #68]	; (8001478 <HAL_SPI_MspInit+0x88>)
 8001434:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8001436:	4a10      	ldr	r2, [pc, #64]	; (8001478 <HAL_SPI_MspInit+0x88>)
 8001438:	f043 0301 	orr.w	r3, r3, #1
 800143c:	6313      	str	r3, [r2, #48]	; 0x30
 800143e:	4b0e      	ldr	r3, [pc, #56]	; (8001478 <HAL_SPI_MspInit+0x88>)
 8001440:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8001442:	f003 0301 	and.w	r3, r3, #1
 8001446:	60fb      	str	r3, [r7, #12]
 8001448:	68fb      	ldr	r3, [r7, #12]
    /**SPI1 GPIO Configuration
    PA5     ------> SPI1_SCK
    PA6     ------> SPI1_MISO
    PA7     ------> SPI1_MOSI
    */
    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
 800144a:	23e0      	movs	r3, #224	; 0xe0
 800144c:	617b      	str	r3, [r7, #20]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 800144e:	2302      	movs	r3, #2
 8001450:	61bb      	str	r3, [r7, #24]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 8001452:	2300      	movs	r3, #0
 8001454:	61fb      	str	r3, [r7, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 8001456:	2303      	movs	r3, #3
 8001458:	623b      	str	r3, [r7, #32]
    GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
 800145a:	2305      	movs	r3, #5
 800145c:	627b      	str	r3, [r7, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 800145e:	f107 0314 	add.w	r3, r7, #20
 8001462:	4619      	mov	r1, r3
 8001464:	4805      	ldr	r0, [pc, #20]	; (800147c <HAL_SPI_MspInit+0x8c>)
 8001466:	f000 fee1 	bl	800222c <HAL_GPIO_Init>
  /* USER CODE BEGIN SPI1_MspInit 1 */

  /* USER CODE END SPI1_MspInit 1 */
  }

}
 800146a:	bf00      	nop
 800146c:	3728      	adds	r7, #40	; 0x28
 800146e:	46bd      	mov	sp, r7
 8001470:	bd80      	pop	{r7, pc}
 8001472:	bf00      	nop
 8001474:	40013000 	.word	0x40013000
 8001478:	40023800 	.word	0x40023800
 800147c:	40020000 	.word	0x40020000

08001480 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
 8001480:	b580      	push	{r7, lr}
 8001482:	b08a      	sub	sp, #40	; 0x28
 8001484:	af00      	add	r7, sp, #0
 8001486:	6078      	str	r0, [r7, #4]
  GPIO_InitTypeDef GPIO_InitStruct = {0};
 8001488:	f107 0314 	add.w	r3, r7, #20
 800148c:	2200      	movs	r2, #0
 800148e:	601a      	str	r2, [r3, #0]
 8001490:	605a      	str	r2, [r3, #4]
 8001492:	609a      	str	r2, [r3, #8]
 8001494:	60da      	str	r2, [r3, #12]
 8001496:	611a      	str	r2, [r3, #16]
  if(huart->Instance==USART2)
 8001498:	687b      	ldr	r3, [r7, #4]
 800149a:	681b      	ldr	r3, [r3, #0]
 800149c:	4a19      	ldr	r2, [pc, #100]	; (8001504 <HAL_UART_MspInit+0x84>)
 800149e:	4293      	cmp	r3, r2
 80014a0:	d12b      	bne.n	80014fa <HAL_UART_MspInit+0x7a>
  {
  /* USER CODE BEGIN USART2_MspInit 0 */

  /* USER CODE END USART2_MspInit 0 */
    /* Peripheral clock enable */
    __HAL_RCC_USART2_CLK_ENABLE();
 80014a2:	2300      	movs	r3, #0
 80014a4:	613b      	str	r3, [r7, #16]
 80014a6:	4b18      	ldr	r3, [pc, #96]	; (8001508 <HAL_UART_MspInit+0x88>)
 80014a8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80014aa:	4a17      	ldr	r2, [pc, #92]	; (8001508 <HAL_UART_MspInit+0x88>)
 80014ac:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
 80014b0:	6413      	str	r3, [r2, #64]	; 0x40
 80014b2:	4b15      	ldr	r3, [pc, #84]	; (8001508 <HAL_UART_MspInit+0x88>)
 80014b4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80014b6:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
 80014ba:	613b      	str	r3, [r7, #16]
 80014bc:	693b      	ldr	r3, [r7, #16]

    __HAL_RCC_GPIOA_CLK_ENABLE();
 80014be:	2300      	movs	r3, #0
 80014c0:	60fb      	str	r3, [r7, #12]
 80014c2:	4b11      	ldr	r3, [pc, #68]	; (8001508 <HAL_UART_MspInit+0x88>)
 80014c4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80014c6:	4a10      	ldr	r2, [pc, #64]	; (8001508 <HAL_UART_MspInit+0x88>)
 80014c8:	f043 0301 	orr.w	r3, r3, #1
 80014cc:	6313      	str	r3, [r2, #48]	; 0x30
 80014ce:	4b0e      	ldr	r3, [pc, #56]	; (8001508 <HAL_UART_MspInit+0x88>)
 80014d0:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80014d2:	f003 0301 	and.w	r3, r3, #1
 80014d6:	60fb      	str	r3, [r7, #12]
 80014d8:	68fb      	ldr	r3, [r7, #12]
    /**USART2 GPIO Configuration
    PA2     ------> USART2_TX
    PA3     ------> USART2_RX
    */
    GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
 80014da:	230c      	movs	r3, #12
 80014dc:	617b      	str	r3, [r7, #20]
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 80014de:	2302      	movs	r3, #2
 80014e0:	61bb      	str	r3, [r7, #24]
    GPIO_InitStruct.Pull = GPIO_NOPULL;
 80014e2:	2300      	movs	r3, #0
 80014e4:	61fb      	str	r3, [r7, #28]
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 80014e6:	2300      	movs	r3, #0
 80014e8:	623b      	str	r3, [r7, #32]
    GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
 80014ea:	2307      	movs	r3, #7
 80014ec:	627b      	str	r3, [r7, #36]	; 0x24
    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 80014ee:	f107 0314 	add.w	r3, r7, #20
 80014f2:	4619      	mov	r1, r3
 80014f4:	4805      	ldr	r0, [pc, #20]	; (800150c <HAL_UART_MspInit+0x8c>)
 80014f6:	f000 fe99 	bl	800222c <HAL_GPIO_Init>
  /* USER CODE BEGIN USART2_MspInit 1 */

  /* USER CODE END USART2_MspInit 1 */
  }

}
 80014fa:	bf00      	nop
 80014fc:	3728      	adds	r7, #40	; 0x28
 80014fe:	46bd      	mov	sp, r7
 8001500:	bd80      	pop	{r7, pc}
 8001502:	bf00      	nop
 8001504:	40004400 	.word	0x40004400
 8001508:	40023800 	.word	0x40023800
 800150c:	40020000 	.word	0x40020000

08001510 <NMI_Handler>:
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
 8001510:	b480      	push	{r7}
 8001512:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  while (1)
 8001514:	e7fe      	b.n	8001514 <NMI_Handler+0x4>

08001516 <HardFault_Handler>:

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
 8001516:	b480      	push	{r7}
 8001518:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
 800151a:	e7fe      	b.n	800151a <HardFault_Handler+0x4>

0800151c <MemManage_Handler>:

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
 800151c:	b480      	push	{r7}
 800151e:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
 8001520:	e7fe      	b.n	8001520 <MemManage_Handler+0x4>

08001522 <BusFault_Handler>:

/**
  * @brief This function handles Pre-fetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
 8001522:	b480      	push	{r7}
 8001524:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
 8001526:	e7fe      	b.n	8001526 <BusFault_Handler+0x4>

08001528 <UsageFault_Handler>:

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
 8001528:	b480      	push	{r7}
 800152a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
 800152c:	e7fe      	b.n	800152c <UsageFault_Handler+0x4>

0800152e <SVC_Handler>:

/**
  * @brief This function handles System service call via SWI instruction.
  */
void SVC_Handler(void)
{
 800152e:	b480      	push	{r7}
 8001530:	af00      	add	r7, sp, #0

  /* USER CODE END SVCall_IRQn 0 */
  /* USER CODE BEGIN SVCall_IRQn 1 */

  /* USER CODE END SVCall_IRQn 1 */
}
 8001532:	bf00      	nop
 8001534:	46bd      	mov	sp, r7
 8001536:	f85d 7b04 	ldr.w	r7, [sp], #4
 800153a:	4770      	bx	lr

0800153c <DebugMon_Handler>:

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
 800153c:	b480      	push	{r7}
 800153e:	af00      	add	r7, sp, #0

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}
 8001540:	bf00      	nop
 8001542:	46bd      	mov	sp, r7
 8001544:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001548:	4770      	bx	lr

0800154a <PendSV_Handler>:

/**
  * @brief This function handles Pendable request for system service.
  */
void PendSV_Handler(void)
{
 800154a:	b480      	push	{r7}
 800154c:	af00      	add	r7, sp, #0

  /* USER CODE END PendSV_IRQn 0 */
  /* USER CODE BEGIN PendSV_IRQn 1 */

  /* USER CODE END PendSV_IRQn 1 */
}
 800154e:	bf00      	nop
 8001550:	46bd      	mov	sp, r7
 8001552:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001556:	4770      	bx	lr

08001558 <SysTick_Handler>:

/**
  * @brief This function handles System tick timer.
  */
void SysTick_Handler(void)
{
 8001558:	b580      	push	{r7, lr}
 800155a:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
 800155c:	f000 f89e 	bl	800169c <HAL_IncTick>
  /* USER CODE BEGIN SysTick_IRQn 1 */

  /* USER CODE END SysTick_IRQn 1 */
}
 8001560:	bf00      	nop
 8001562:	bd80      	pop	{r7, pc}

08001564 <ADC_IRQHandler>:

/**
  * @brief This function handles ADC1 global interrupt.
  */
void ADC_IRQHandler(void)
{
 8001564:	b580      	push	{r7, lr}
 8001566:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN ADC_IRQn 0 */

  /* USER CODE END ADC_IRQn 0 */
  HAL_ADC_IRQHandler(&hadc1);
 8001568:	4802      	ldr	r0, [pc, #8]	; (8001574 <ADC_IRQHandler+0x10>)
 800156a:	f000 f9cd 	bl	8001908 <HAL_ADC_IRQHandler>
  /* USER CODE BEGIN ADC_IRQn 1 */

  /* USER CODE END ADC_IRQn 1 */
}
 800156e:	bf00      	nop
 8001570:	bd80      	pop	{r7, pc}
 8001572:	bf00      	nop
 8001574:	200012c0 	.word	0x200012c0

08001578 <SystemInit>:
  *         configuration.
  * @param  None
  * @retval None
  */
void SystemInit(void)
{
 8001578:	b480      	push	{r7}
 800157a:	af00      	add	r7, sp, #0
  /* FPU settings ------------------------------------------------------------*/
  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
 800157c:	4b08      	ldr	r3, [pc, #32]	; (80015a0 <SystemInit+0x28>)
 800157e:	f8d3 3088 	ldr.w	r3, [r3, #136]	; 0x88
 8001582:	4a07      	ldr	r2, [pc, #28]	; (80015a0 <SystemInit+0x28>)
 8001584:	f443 0370 	orr.w	r3, r3, #15728640	; 0xf00000
 8001588:	f8c2 3088 	str.w	r3, [r2, #136]	; 0x88

  /* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
 800158c:	4b04      	ldr	r3, [pc, #16]	; (80015a0 <SystemInit+0x28>)
 800158e:	f04f 6200 	mov.w	r2, #134217728	; 0x8000000
 8001592:	609a      	str	r2, [r3, #8]
#endif
}
 8001594:	bf00      	nop
 8001596:	46bd      	mov	sp, r7
 8001598:	f85d 7b04 	ldr.w	r7, [sp], #4
 800159c:	4770      	bx	lr
 800159e:	bf00      	nop
 80015a0:	e000ed00 	.word	0xe000ed00

080015a4 <Reset_Handler>:
 80015a4:	f8df d034 	ldr.w	sp, [pc, #52]	; 80015dc <LoopFillZerobss+0x14>
 80015a8:	2100      	movs	r1, #0
 80015aa:	e003      	b.n	80015b4 <LoopCopyDataInit>

080015ac <CopyDataInit>:
 80015ac:	4b0c      	ldr	r3, [pc, #48]	; (80015e0 <LoopFillZerobss+0x18>)
 80015ae:	585b      	ldr	r3, [r3, r1]
 80015b0:	5043      	str	r3, [r0, r1]
 80015b2:	3104      	adds	r1, #4

080015b4 <LoopCopyDataInit>:
 80015b4:	480b      	ldr	r0, [pc, #44]	; (80015e4 <LoopFillZerobss+0x1c>)
 80015b6:	4b0c      	ldr	r3, [pc, #48]	; (80015e8 <LoopFillZerobss+0x20>)
 80015b8:	1842      	adds	r2, r0, r1
 80015ba:	429a      	cmp	r2, r3
 80015bc:	d3f6      	bcc.n	80015ac <CopyDataInit>
 80015be:	4a0b      	ldr	r2, [pc, #44]	; (80015ec <LoopFillZerobss+0x24>)
 80015c0:	e002      	b.n	80015c8 <LoopFillZerobss>

080015c2 <FillZerobss>:
 80015c2:	2300      	movs	r3, #0
 80015c4:	f842 3b04 	str.w	r3, [r2], #4

080015c8 <LoopFillZerobss>:
 80015c8:	4b09      	ldr	r3, [pc, #36]	; (80015f0 <LoopFillZerobss+0x28>)
 80015ca:	429a      	cmp	r2, r3
 80015cc:	d3f9      	bcc.n	80015c2 <FillZerobss>
 80015ce:	f7ff ffd3 	bl	8001578 <SystemInit>
 80015d2:	f005 fd09 	bl	8006fe8 <__libc_init_array>
 80015d6:	f7ff fc63 	bl	8000ea0 <main>
 80015da:	4770      	bx	lr
 80015dc:	20018000 	.word	0x20018000
 80015e0:	080075c4 	.word	0x080075c4
 80015e4:	20000000 	.word	0x20000000
 80015e8:	20000024 	.word	0x20000024
 80015ec:	20000024 	.word	0x20000024
 80015f0:	200044b4 	.word	0x200044b4

080015f4 <DMA1_Stream0_IRQHandler>:
 80015f4:	e7fe      	b.n	80015f4 <DMA1_Stream0_IRQHandler>
	...

080015f8 <HAL_Init>:
  *         need to ensure that the SysTick time base is always set to 1 millisecond
  *         to have correct HAL operation.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_Init(void)
{
 80015f8:	b580      	push	{r7, lr}
 80015fa:	af00      	add	r7, sp, #0
  /* Configure Flash prefetch, Instruction cache, Data cache */ 
#if (INSTRUCTION_CACHE_ENABLE != 0U)
  __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
 80015fc:	4b0e      	ldr	r3, [pc, #56]	; (8001638 <HAL_Init+0x40>)
 80015fe:	681b      	ldr	r3, [r3, #0]
 8001600:	4a0d      	ldr	r2, [pc, #52]	; (8001638 <HAL_Init+0x40>)
 8001602:	f443 7300 	orr.w	r3, r3, #512	; 0x200
 8001606:	6013      	str	r3, [r2, #0]
#endif /* INSTRUCTION_CACHE_ENABLE */

#if (DATA_CACHE_ENABLE != 0U)
  __HAL_FLASH_DATA_CACHE_ENABLE();
 8001608:	4b0b      	ldr	r3, [pc, #44]	; (8001638 <HAL_Init+0x40>)
 800160a:	681b      	ldr	r3, [r3, #0]
 800160c:	4a0a      	ldr	r2, [pc, #40]	; (8001638 <HAL_Init+0x40>)
 800160e:	f443 6380 	orr.w	r3, r3, #1024	; 0x400
 8001612:	6013      	str	r3, [r2, #0]
#endif /* DATA_CACHE_ENABLE */

#if (PREFETCH_ENABLE != 0U)
  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 8001614:	4b08      	ldr	r3, [pc, #32]	; (8001638 <HAL_Init+0x40>)
 8001616:	681b      	ldr	r3, [r3, #0]
 8001618:	4a07      	ldr	r2, [pc, #28]	; (8001638 <HAL_Init+0x40>)
 800161a:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 800161e:	6013      	str	r3, [r2, #0]
#endif /* PREFETCH_ENABLE */

  /* Set Interrupt Group Priority */
  HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
 8001620:	2003      	movs	r0, #3
 8001622:	f000 fdc1 	bl	80021a8 <HAL_NVIC_SetPriorityGrouping>

  /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
  HAL_InitTick(TICK_INT_PRIORITY);
 8001626:	2000      	movs	r0, #0
 8001628:	f000 f808 	bl	800163c <HAL_InitTick>

  /* Init the low level hardware */
  HAL_MspInit();
 800162c:	f7ff fe6c 	bl	8001308 <HAL_MspInit>

  /* Return function status */
  return HAL_OK;
 8001630:	2300      	movs	r3, #0
}
 8001632:	4618      	mov	r0, r3
 8001634:	bd80      	pop	{r7, pc}
 8001636:	bf00      	nop
 8001638:	40023c00 	.word	0x40023c00

0800163c <HAL_InitTick>:
  *       implementation  in user file.
  * @param TickPriority Tick interrupt priority.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
 800163c:	b580      	push	{r7, lr}
 800163e:	b082      	sub	sp, #8
 8001640:	af00      	add	r7, sp, #0
 8001642:	6078      	str	r0, [r7, #4]
  /* Configure the SysTick to have interrupt in 1ms time basis*/
  if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
 8001644:	4b12      	ldr	r3, [pc, #72]	; (8001690 <HAL_InitTick+0x54>)
 8001646:	681a      	ldr	r2, [r3, #0]
 8001648:	4b12      	ldr	r3, [pc, #72]	; (8001694 <HAL_InitTick+0x58>)
 800164a:	781b      	ldrb	r3, [r3, #0]
 800164c:	4619      	mov	r1, r3
 800164e:	f44f 737a 	mov.w	r3, #1000	; 0x3e8
 8001652:	fbb3 f3f1 	udiv	r3, r3, r1
 8001656:	fbb2 f3f3 	udiv	r3, r2, r3
 800165a:	4618      	mov	r0, r3
 800165c:	f000 fdd9 	bl	8002212 <HAL_SYSTICK_Config>
 8001660:	4603      	mov	r3, r0
 8001662:	2b00      	cmp	r3, #0
 8001664:	d001      	beq.n	800166a <HAL_InitTick+0x2e>
  {
    return HAL_ERROR;
 8001666:	2301      	movs	r3, #1
 8001668:	e00e      	b.n	8001688 <HAL_InitTick+0x4c>
  }

  /* Configure the SysTick IRQ priority */
  if (TickPriority < (1UL << __NVIC_PRIO_BITS))
 800166a:	687b      	ldr	r3, [r7, #4]
 800166c:	2b0f      	cmp	r3, #15
 800166e:	d80a      	bhi.n	8001686 <HAL_InitTick+0x4a>
  {
    HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
 8001670:	2200      	movs	r2, #0
 8001672:	6879      	ldr	r1, [r7, #4]
 8001674:	f04f 30ff 	mov.w	r0, #4294967295
 8001678:	f000 fda1 	bl	80021be <HAL_NVIC_SetPriority>
    uwTickPrio = TickPriority;
 800167c:	4a06      	ldr	r2, [pc, #24]	; (8001698 <HAL_InitTick+0x5c>)
 800167e:	687b      	ldr	r3, [r7, #4]
 8001680:	6013      	str	r3, [r2, #0]
  {
    return HAL_ERROR;
  }

  /* Return function status */
  return HAL_OK;
 8001682:	2300      	movs	r3, #0
 8001684:	e000      	b.n	8001688 <HAL_InitTick+0x4c>
    return HAL_ERROR;
 8001686:	2301      	movs	r3, #1
}
 8001688:	4618      	mov	r0, r3
 800168a:	3708      	adds	r7, #8
 800168c:	46bd      	mov	sp, r7
 800168e:	bd80      	pop	{r7, pc}
 8001690:	20000004 	.word	0x20000004
 8001694:	2000000c 	.word	0x2000000c
 8001698:	20000008 	.word	0x20000008

0800169c <HAL_IncTick>:
 * @note This function is declared as __weak to be overwritten in case of other 
  *      implementations in user file.
  * @retval None
  */
__weak void HAL_IncTick(void)
{
 800169c:	b480      	push	{r7}
 800169e:	af00      	add	r7, sp, #0
  uwTick += uwTickFreq;
 80016a0:	4b06      	ldr	r3, [pc, #24]	; (80016bc <HAL_IncTick+0x20>)
 80016a2:	781b      	ldrb	r3, [r3, #0]
 80016a4:	461a      	mov	r2, r3
 80016a6:	4b06      	ldr	r3, [pc, #24]	; (80016c0 <HAL_IncTick+0x24>)
 80016a8:	681b      	ldr	r3, [r3, #0]
 80016aa:	4413      	add	r3, r2
 80016ac:	4a04      	ldr	r2, [pc, #16]	; (80016c0 <HAL_IncTick+0x24>)
 80016ae:	6013      	str	r3, [r2, #0]
}
 80016b0:	bf00      	nop
 80016b2:	46bd      	mov	sp, r7
 80016b4:	f85d 7b04 	ldr.w	r7, [sp], #4
 80016b8:	4770      	bx	lr
 80016ba:	bf00      	nop
 80016bc:	2000000c 	.word	0x2000000c
 80016c0:	20002440 	.word	0x20002440

080016c4 <HAL_GetTick>:
  * @note This function is declared as __weak to be overwritten in case of other 
  *       implementations in user file.
  * @retval tick value
  */
__weak uint32_t HAL_GetTick(void)
{
 80016c4:	b480      	push	{r7}
 80016c6:	af00      	add	r7, sp, #0
  return uwTick;
 80016c8:	4b03      	ldr	r3, [pc, #12]	; (80016d8 <HAL_GetTick+0x14>)
 80016ca:	681b      	ldr	r3, [r3, #0]
}
 80016cc:	4618      	mov	r0, r3
 80016ce:	46bd      	mov	sp, r7
 80016d0:	f85d 7b04 	ldr.w	r7, [sp], #4
 80016d4:	4770      	bx	lr
 80016d6:	bf00      	nop
 80016d8:	20002440 	.word	0x20002440

080016dc <HAL_Delay>:
  *       implementations in user file.
  * @param Delay specifies the delay time length, in milliseconds.
  * @retval None
  */
__weak void HAL_Delay(uint32_t Delay)
{
 80016dc:	b580      	push	{r7, lr}
 80016de:	b084      	sub	sp, #16
 80016e0:	af00      	add	r7, sp, #0
 80016e2:	6078      	str	r0, [r7, #4]
  uint32_t tickstart = HAL_GetTick();
 80016e4:	f7ff ffee 	bl	80016c4 <HAL_GetTick>
 80016e8:	60b8      	str	r0, [r7, #8]
  uint32_t wait = Delay;
 80016ea:	687b      	ldr	r3, [r7, #4]
 80016ec:	60fb      	str	r3, [r7, #12]

  /* Add a freq to guarantee minimum wait */
  if (wait < HAL_MAX_DELAY)
 80016ee:	68fb      	ldr	r3, [r7, #12]
 80016f0:	f1b3 3fff 	cmp.w	r3, #4294967295
 80016f4:	d005      	beq.n	8001702 <HAL_Delay+0x26>
  {
    wait += (uint32_t)(uwTickFreq);
 80016f6:	4b09      	ldr	r3, [pc, #36]	; (800171c <HAL_Delay+0x40>)
 80016f8:	781b      	ldrb	r3, [r3, #0]
 80016fa:	461a      	mov	r2, r3
 80016fc:	68fb      	ldr	r3, [r7, #12]
 80016fe:	4413      	add	r3, r2
 8001700:	60fb      	str	r3, [r7, #12]
  }

  while((HAL_GetTick() - tickstart) < wait)
 8001702:	bf00      	nop
 8001704:	f7ff ffde 	bl	80016c4 <HAL_GetTick>
 8001708:	4602      	mov	r2, r0
 800170a:	68bb      	ldr	r3, [r7, #8]
 800170c:	1ad3      	subs	r3, r2, r3
 800170e:	68fa      	ldr	r2, [r7, #12]
 8001710:	429a      	cmp	r2, r3
 8001712:	d8f7      	bhi.n	8001704 <HAL_Delay+0x28>
  {
  }
}
 8001714:	bf00      	nop
 8001716:	3710      	adds	r7, #16
 8001718:	46bd      	mov	sp, r7
 800171a:	bd80      	pop	{r7, pc}
 800171c:	2000000c 	.word	0x2000000c

08001720 <HAL_ADC_Init>:
  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
  *         the configuration information for the specified ADC.  
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
 8001720:	b580      	push	{r7, lr}
 8001722:	b084      	sub	sp, #16
 8001724:	af00      	add	r7, sp, #0
 8001726:	6078      	str	r0, [r7, #4]
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
 8001728:	2300      	movs	r3, #0
 800172a:	73fb      	strb	r3, [r7, #15]
  
  /* Check ADC handle */
  if(hadc == NULL)
 800172c:	687b      	ldr	r3, [r7, #4]
 800172e:	2b00      	cmp	r3, #0
 8001730:	d101      	bne.n	8001736 <HAL_ADC_Init+0x16>
  {
    return HAL_ERROR;
 8001732:	2301      	movs	r3, #1
 8001734:	e033      	b.n	800179e <HAL_ADC_Init+0x7e>
  if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
  {
    assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
  }
  
  if(hadc->State == HAL_ADC_STATE_RESET)
 8001736:	687b      	ldr	r3, [r7, #4]
 8001738:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 800173a:	2b00      	cmp	r3, #0
 800173c:	d109      	bne.n	8001752 <HAL_ADC_Init+0x32>

    /* Init the low level hardware */
    hadc->MspInitCallback(hadc);
#else
    /* Init the low level hardware */
    HAL_ADC_MspInit(hadc);
 800173e:	6878      	ldr	r0, [r7, #4]
 8001740:	f7ff fe0a 	bl	8001358 <HAL_ADC_MspInit>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */

    /* Initialize ADC error code */
    ADC_CLEAR_ERRORCODE(hadc);
 8001744:	687b      	ldr	r3, [r7, #4]
 8001746:	2200      	movs	r2, #0
 8001748:	645a      	str	r2, [r3, #68]	; 0x44
    
    /* Allocate lock resource and initialize it */
    hadc->Lock = HAL_UNLOCKED;
 800174a:	687b      	ldr	r3, [r7, #4]
 800174c:	2200      	movs	r2, #0
 800174e:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
  }
  
  /* Configuration of ADC parameters if previous preliminary actions are      */ 
  /* correctly completed.                                                     */
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
 8001752:	687b      	ldr	r3, [r7, #4]
 8001754:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001756:	f003 0310 	and.w	r3, r3, #16
 800175a:	2b00      	cmp	r3, #0
 800175c:	d118      	bne.n	8001790 <HAL_ADC_Init+0x70>
  {
    /* Set ADC state */
    ADC_STATE_CLR_SET(hadc->State,
 800175e:	687b      	ldr	r3, [r7, #4]
 8001760:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001762:	f423 5388 	bic.w	r3, r3, #4352	; 0x1100
 8001766:	f023 0302 	bic.w	r3, r3, #2
 800176a:	f043 0202 	orr.w	r2, r3, #2
 800176e:	687b      	ldr	r3, [r7, #4]
 8001770:	641a      	str	r2, [r3, #64]	; 0x40
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
                      HAL_ADC_STATE_BUSY_INTERNAL);
    
    /* Set ADC parameters */
    ADC_Init(hadc);
 8001772:	6878      	ldr	r0, [r7, #4]
 8001774:	f000 fb42 	bl	8001dfc <ADC_Init>
    
    /* Set ADC error code to none */
    ADC_CLEAR_ERRORCODE(hadc);
 8001778:	687b      	ldr	r3, [r7, #4]
 800177a:	2200      	movs	r2, #0
 800177c:	645a      	str	r2, [r3, #68]	; 0x44
    
    /* Set the ADC state */
    ADC_STATE_CLR_SET(hadc->State,
 800177e:	687b      	ldr	r3, [r7, #4]
 8001780:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001782:	f023 0303 	bic.w	r3, r3, #3
 8001786:	f043 0201 	orr.w	r2, r3, #1
 800178a:	687b      	ldr	r3, [r7, #4]
 800178c:	641a      	str	r2, [r3, #64]	; 0x40
 800178e:	e001      	b.n	8001794 <HAL_ADC_Init+0x74>
                      HAL_ADC_STATE_BUSY_INTERNAL,
                      HAL_ADC_STATE_READY);
  }
  else
  {
    tmp_hal_status = HAL_ERROR;
 8001790:	2301      	movs	r3, #1
 8001792:	73fb      	strb	r3, [r7, #15]
  }
  
  /* Release Lock */
  __HAL_UNLOCK(hadc);
 8001794:	687b      	ldr	r3, [r7, #4]
 8001796:	2200      	movs	r2, #0
 8001798:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c

  /* Return function status */
  return tmp_hal_status;
 800179c:	7bfb      	ldrb	r3, [r7, #15]
}
 800179e:	4618      	mov	r0, r3
 80017a0:	3710      	adds	r7, #16
 80017a2:	46bd      	mov	sp, r7
 80017a4:	bd80      	pop	{r7, pc}
	...

080017a8 <HAL_ADC_Start_IT>:
  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
  *         the configuration information for the specified ADC.
  * @retval HAL status.
  */
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
{
 80017a8:	b480      	push	{r7}
 80017aa:	b085      	sub	sp, #20
 80017ac:	af00      	add	r7, sp, #0
 80017ae:	6078      	str	r0, [r7, #4]
  __IO uint32_t counter = 0U;
 80017b0:	2300      	movs	r3, #0
 80017b2:	60bb      	str	r3, [r7, #8]
  /* Check the parameters */
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 
  
  /* Process locked */
  __HAL_LOCK(hadc);
 80017b4:	687b      	ldr	r3, [r7, #4]
 80017b6:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
 80017ba:	2b01      	cmp	r3, #1
 80017bc:	d101      	bne.n	80017c2 <HAL_ADC_Start_IT+0x1a>
 80017be:	2302      	movs	r3, #2
 80017c0:	e094      	b.n	80018ec <HAL_ADC_Start_IT+0x144>
 80017c2:	687b      	ldr	r3, [r7, #4]
 80017c4:	2201      	movs	r2, #1
 80017c6:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
  
  /* Enable the ADC peripheral */
  /* Check if ADC peripheral is disabled in order to enable it and wait during 
  Tstab time the ADC's stabilization */
  if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
 80017ca:	687b      	ldr	r3, [r7, #4]
 80017cc:	681b      	ldr	r3, [r3, #0]
 80017ce:	689b      	ldr	r3, [r3, #8]
 80017d0:	f003 0301 	and.w	r3, r3, #1
 80017d4:	2b01      	cmp	r3, #1
 80017d6:	d018      	beq.n	800180a <HAL_ADC_Start_IT+0x62>
  {  
    /* Enable the Peripheral */
    __HAL_ADC_ENABLE(hadc);
 80017d8:	687b      	ldr	r3, [r7, #4]
 80017da:	681b      	ldr	r3, [r3, #0]
 80017dc:	689a      	ldr	r2, [r3, #8]
 80017de:	687b      	ldr	r3, [r7, #4]
 80017e0:	681b      	ldr	r3, [r3, #0]
 80017e2:	f042 0201 	orr.w	r2, r2, #1
 80017e6:	609a      	str	r2, [r3, #8]
    
    /* Delay for ADC stabilization time */
    /* Compute number of CPU cycles to wait for */
    counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
 80017e8:	4b43      	ldr	r3, [pc, #268]	; (80018f8 <HAL_ADC_Start_IT+0x150>)
 80017ea:	681b      	ldr	r3, [r3, #0]
 80017ec:	4a43      	ldr	r2, [pc, #268]	; (80018fc <HAL_ADC_Start_IT+0x154>)
 80017ee:	fba2 2303 	umull	r2, r3, r2, r3
 80017f2:	0c9a      	lsrs	r2, r3, #18
 80017f4:	4613      	mov	r3, r2
 80017f6:	005b      	lsls	r3, r3, #1
 80017f8:	4413      	add	r3, r2
 80017fa:	60bb      	str	r3, [r7, #8]
    while(counter != 0U)
 80017fc:	e002      	b.n	8001804 <HAL_ADC_Start_IT+0x5c>
    {
      counter--;
 80017fe:	68bb      	ldr	r3, [r7, #8]
 8001800:	3b01      	subs	r3, #1
 8001802:	60bb      	str	r3, [r7, #8]
    while(counter != 0U)
 8001804:	68bb      	ldr	r3, [r7, #8]
 8001806:	2b00      	cmp	r3, #0
 8001808:	d1f9      	bne.n	80017fe <HAL_ADC_Start_IT+0x56>
    }
  }
  
  /* Start conversion if ADC is effectively enabled */
  if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
 800180a:	687b      	ldr	r3, [r7, #4]
 800180c:	681b      	ldr	r3, [r3, #0]
 800180e:	689b      	ldr	r3, [r3, #8]
 8001810:	f003 0301 	and.w	r3, r3, #1
 8001814:	2b01      	cmp	r3, #1
 8001816:	d168      	bne.n	80018ea <HAL_ADC_Start_IT+0x142>
  {
    /* Set ADC state                                                          */
    /* - Clear state bitfield related to regular group conversion results     */
    /* - Set state bitfield related to regular group operation                */
    ADC_STATE_CLR_SET(hadc->State,
 8001818:	687b      	ldr	r3, [r7, #4]
 800181a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 800181c:	f423 63e0 	bic.w	r3, r3, #1792	; 0x700
 8001820:	f023 0301 	bic.w	r3, r3, #1
 8001824:	f443 7280 	orr.w	r2, r3, #256	; 0x100
 8001828:	687b      	ldr	r3, [r7, #4]
 800182a:	641a      	str	r2, [r3, #64]	; 0x40
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
                      HAL_ADC_STATE_REG_BUSY);
    
    /* If conversions on group regular are also triggering group injected,    */
    /* update ADC state.                                                      */
    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
 800182c:	687b      	ldr	r3, [r7, #4]
 800182e:	681b      	ldr	r3, [r3, #0]
 8001830:	685b      	ldr	r3, [r3, #4]
 8001832:	f403 6380 	and.w	r3, r3, #1024	; 0x400
 8001836:	2b00      	cmp	r3, #0
 8001838:	d007      	beq.n	800184a <HAL_ADC_Start_IT+0xa2>
    {
      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
 800183a:	687b      	ldr	r3, [r7, #4]
 800183c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 800183e:	f423 5340 	bic.w	r3, r3, #12288	; 0x3000
 8001842:	f443 5280 	orr.w	r2, r3, #4096	; 0x1000
 8001846:	687b      	ldr	r3, [r7, #4]
 8001848:	641a      	str	r2, [r3, #64]	; 0x40
    }
    
    /* State machine update: Check if an injected conversion is ongoing */
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 800184a:	687b      	ldr	r3, [r7, #4]
 800184c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 800184e:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
 8001852:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 8001856:	d106      	bne.n	8001866 <HAL_ADC_Start_IT+0xbe>
    {
      /* Reset ADC error code fields related to conversions on group regular */
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));         
 8001858:	687b      	ldr	r3, [r7, #4]
 800185a:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 800185c:	f023 0206 	bic.w	r2, r3, #6
 8001860:	687b      	ldr	r3, [r7, #4]
 8001862:	645a      	str	r2, [r3, #68]	; 0x44
 8001864:	e002      	b.n	800186c <HAL_ADC_Start_IT+0xc4>
    }
    else
    {
      /* Reset ADC all error code fields */
      ADC_CLEAR_ERRORCODE(hadc);
 8001866:	687b      	ldr	r3, [r7, #4]
 8001868:	2200      	movs	r2, #0
 800186a:	645a      	str	r2, [r3, #68]	; 0x44
    }

    /* Process unlocked */
    /* Unlock before starting ADC conversions: in case of potential           */
    /* interruption, to let the process to ADC IRQ Handler.                   */
    __HAL_UNLOCK(hadc);
 800186c:	687b      	ldr	r3, [r7, #4]
 800186e:	2200      	movs	r2, #0
 8001870:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c

    /* Pointer to the common control register to which is belonging hadc    */
    /* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
    /* control register)                                                    */
    tmpADC_Common = ADC_COMMON_REGISTER(hadc);
 8001874:	4b22      	ldr	r3, [pc, #136]	; (8001900 <HAL_ADC_Start_IT+0x158>)
 8001876:	60fb      	str	r3, [r7, #12]

    /* Clear regular group conversion flag and overrun flag */
    /* (To ensure of no unknown state from potential previous ADC operations) */
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
 8001878:	687b      	ldr	r3, [r7, #4]
 800187a:	681b      	ldr	r3, [r3, #0]
 800187c:	f06f 0222 	mvn.w	r2, #34	; 0x22
 8001880:	601a      	str	r2, [r3, #0]
    
    /* Enable end of conversion interrupt for regular group */
    __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_OVR));
 8001882:	687b      	ldr	r3, [r7, #4]
 8001884:	681b      	ldr	r3, [r3, #0]
 8001886:	685b      	ldr	r3, [r3, #4]
 8001888:	687a      	ldr	r2, [r7, #4]
 800188a:	6812      	ldr	r2, [r2, #0]
 800188c:	f043 6380 	orr.w	r3, r3, #67108864	; 0x4000000
 8001890:	f043 0320 	orr.w	r3, r3, #32
 8001894:	6053      	str	r3, [r2, #4]
    
    /* Check if Multimode enabled */
    if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
 8001896:	68fb      	ldr	r3, [r7, #12]
 8001898:	685b      	ldr	r3, [r3, #4]
 800189a:	f003 031f 	and.w	r3, r3, #31
 800189e:	2b00      	cmp	r3, #0
 80018a0:	d10f      	bne.n	80018c2 <HAL_ADC_Start_IT+0x11a>
      if((hadc->Instance == ADC1) || ((hadc->Instance == ADC2) && ((ADC->CCR & ADC_CCR_MULTI_Msk) < ADC_CCR_MULTI_0)) \
                                  || ((hadc->Instance == ADC3) && ((ADC->CCR & ADC_CCR_MULTI_Msk) < ADC_CCR_MULTI_4)))
      {
#endif /* ADC2 || ADC3 */
        /* if no external trigger present enable software conversion of regular channels */
        if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) 
 80018a2:	687b      	ldr	r3, [r7, #4]
 80018a4:	681b      	ldr	r3, [r3, #0]
 80018a6:	689b      	ldr	r3, [r3, #8]
 80018a8:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
 80018ac:	2b00      	cmp	r3, #0
 80018ae:	d11c      	bne.n	80018ea <HAL_ADC_Start_IT+0x142>
        {
          /* Enable the selected ADC software conversion for regular group */
          hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
 80018b0:	687b      	ldr	r3, [r7, #4]
 80018b2:	681b      	ldr	r3, [r3, #0]
 80018b4:	689a      	ldr	r2, [r3, #8]
 80018b6:	687b      	ldr	r3, [r7, #4]
 80018b8:	681b      	ldr	r3, [r3, #0]
 80018ba:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
 80018be:	609a      	str	r2, [r3, #8]
 80018c0:	e013      	b.n	80018ea <HAL_ADC_Start_IT+0x142>
#endif /* ADC2 || ADC3 */
    }
    else
    {
      /* if instance of handle correspond to ADC1 and  no external trigger present enable software conversion of regular channels */
      if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
 80018c2:	687b      	ldr	r3, [r7, #4]
 80018c4:	681b      	ldr	r3, [r3, #0]
 80018c6:	4a0f      	ldr	r2, [pc, #60]	; (8001904 <HAL_ADC_Start_IT+0x15c>)
 80018c8:	4293      	cmp	r3, r2
 80018ca:	d10e      	bne.n	80018ea <HAL_ADC_Start_IT+0x142>
 80018cc:	687b      	ldr	r3, [r7, #4]
 80018ce:	681b      	ldr	r3, [r3, #0]
 80018d0:	689b      	ldr	r3, [r3, #8]
 80018d2:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
 80018d6:	2b00      	cmp	r3, #0
 80018d8:	d107      	bne.n	80018ea <HAL_ADC_Start_IT+0x142>
      {
        /* Enable the selected ADC software conversion for regular group */
          hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
 80018da:	687b      	ldr	r3, [r7, #4]
 80018dc:	681b      	ldr	r3, [r3, #0]
 80018de:	689a      	ldr	r2, [r3, #8]
 80018e0:	687b      	ldr	r3, [r7, #4]
 80018e2:	681b      	ldr	r3, [r3, #0]
 80018e4:	f042 4280 	orr.w	r2, r2, #1073741824	; 0x40000000
 80018e8:	609a      	str	r2, [r3, #8]
      }
    }
  }
  
  /* Return function status */
  return HAL_OK;
 80018ea:	2300      	movs	r3, #0
}
 80018ec:	4618      	mov	r0, r3
 80018ee:	3714      	adds	r7, #20
 80018f0:	46bd      	mov	sp, r7
 80018f2:	f85d 7b04 	ldr.w	r7, [sp], #4
 80018f6:	4770      	bx	lr
 80018f8:	20000004 	.word	0x20000004
 80018fc:	431bde83 	.word	0x431bde83
 8001900:	40012300 	.word	0x40012300
 8001904:	40012000 	.word	0x40012000

08001908 <HAL_ADC_IRQHandler>:
  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
  *         the configuration information for the specified ADC.
  * @retval None
  */
void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
{
 8001908:	b580      	push	{r7, lr}
 800190a:	b084      	sub	sp, #16
 800190c:	af00      	add	r7, sp, #0
 800190e:	6078      	str	r0, [r7, #4]
  uint32_t tmp1 = 0U, tmp2 = 0U;
 8001910:	2300      	movs	r3, #0
 8001912:	60fb      	str	r3, [r7, #12]
 8001914:	2300      	movs	r3, #0
 8001916:	60bb      	str	r3, [r7, #8]
  /* Check the parameters */
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
  assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
  assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
  
  tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC);
 8001918:	687b      	ldr	r3, [r7, #4]
 800191a:	681b      	ldr	r3, [r3, #0]
 800191c:	681b      	ldr	r3, [r3, #0]
 800191e:	f003 0302 	and.w	r3, r3, #2
 8001922:	2b02      	cmp	r3, #2
 8001924:	bf0c      	ite	eq
 8001926:	2301      	moveq	r3, #1
 8001928:	2300      	movne	r3, #0
 800192a:	b2db      	uxtb	r3, r3
 800192c:	60fb      	str	r3, [r7, #12]
  tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC);
 800192e:	687b      	ldr	r3, [r7, #4]
 8001930:	681b      	ldr	r3, [r3, #0]
 8001932:	685b      	ldr	r3, [r3, #4]
 8001934:	f003 0320 	and.w	r3, r3, #32
 8001938:	2b20      	cmp	r3, #32
 800193a:	bf0c      	ite	eq
 800193c:	2301      	moveq	r3, #1
 800193e:	2300      	movne	r3, #0
 8001940:	b2db      	uxtb	r3, r3
 8001942:	60bb      	str	r3, [r7, #8]
  /* Check End of conversion flag for regular channels */
  if(tmp1 && tmp2)
 8001944:	68fb      	ldr	r3, [r7, #12]
 8001946:	2b00      	cmp	r3, #0
 8001948:	d049      	beq.n	80019de <HAL_ADC_IRQHandler+0xd6>
 800194a:	68bb      	ldr	r3, [r7, #8]
 800194c:	2b00      	cmp	r3, #0
 800194e:	d046      	beq.n	80019de <HAL_ADC_IRQHandler+0xd6>
  {
    /* Update state machine on conversion status if not in error state */
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
 8001950:	687b      	ldr	r3, [r7, #4]
 8001952:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001954:	f003 0310 	and.w	r3, r3, #16
 8001958:	2b00      	cmp	r3, #0
 800195a:	d105      	bne.n	8001968 <HAL_ADC_IRQHandler+0x60>
    {
      /* Set ADC state */
      SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); 
 800195c:	687b      	ldr	r3, [r7, #4]
 800195e:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001960:	f443 7200 	orr.w	r2, r3, #512	; 0x200
 8001964:	687b      	ldr	r3, [r7, #4]
 8001966:	641a      	str	r2, [r3, #64]	; 0x40
    /* by external trigger, continuous mode or scan sequence on going.      */
    /* Note: On STM32F4, there is no independent flag of end of sequence.   */
    /*       The test of scan sequence on going is done either with scan    */
    /*       sequence disabled or with end of conversion flag set to        */
    /*       of end of sequence.                                            */
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
 8001968:	687b      	ldr	r3, [r7, #4]
 800196a:	681b      	ldr	r3, [r3, #0]
 800196c:	689b      	ldr	r3, [r3, #8]
 800196e:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
 8001972:	2b00      	cmp	r3, #0
 8001974:	d12b      	bne.n	80019ce <HAL_ADC_IRQHandler+0xc6>
       (hadc->Init.ContinuousConvMode == DISABLE)            &&
 8001976:	687b      	ldr	r3, [r7, #4]
 8001978:	7e1b      	ldrb	r3, [r3, #24]
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
 800197a:	2b00      	cmp	r3, #0
 800197c:	d127      	bne.n	80019ce <HAL_ADC_IRQHandler+0xc6>
       (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || 
 800197e:	687b      	ldr	r3, [r7, #4]
 8001980:	681b      	ldr	r3, [r3, #0]
 8001982:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8001984:	f403 0370 	and.w	r3, r3, #15728640	; 0xf00000
       (hadc->Init.ContinuousConvMode == DISABLE)            &&
 8001988:	2b00      	cmp	r3, #0
 800198a:	d006      	beq.n	800199a <HAL_ADC_IRQHandler+0x92>
        HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)  )   )
 800198c:	687b      	ldr	r3, [r7, #4]
 800198e:	681b      	ldr	r3, [r3, #0]
 8001990:	689b      	ldr	r3, [r3, #8]
 8001992:	f403 6380 	and.w	r3, r3, #1024	; 0x400
       (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || 
 8001996:	2b00      	cmp	r3, #0
 8001998:	d119      	bne.n	80019ce <HAL_ADC_IRQHandler+0xc6>
    {
      /* Disable ADC end of single conversion interrupt on group regular */
      /* Note: Overrun interrupt was enabled with EOC interrupt in          */
      /* HAL_ADC_Start_IT(), but is not disabled here because can be used   */
      /* by overrun IRQ process below.                                      */
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
 800199a:	687b      	ldr	r3, [r7, #4]
 800199c:	681b      	ldr	r3, [r3, #0]
 800199e:	685a      	ldr	r2, [r3, #4]
 80019a0:	687b      	ldr	r3, [r7, #4]
 80019a2:	681b      	ldr	r3, [r3, #0]
 80019a4:	f022 0220 	bic.w	r2, r2, #32
 80019a8:	605a      	str	r2, [r3, #4]
      
      /* Set ADC state */
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
 80019aa:	687b      	ldr	r3, [r7, #4]
 80019ac:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80019ae:	f423 7280 	bic.w	r2, r3, #256	; 0x100
 80019b2:	687b      	ldr	r3, [r7, #4]
 80019b4:	641a      	str	r2, [r3, #64]	; 0x40
      
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
 80019b6:	687b      	ldr	r3, [r7, #4]
 80019b8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80019ba:	f403 5380 	and.w	r3, r3, #4096	; 0x1000
 80019be:	2b00      	cmp	r3, #0
 80019c0:	d105      	bne.n	80019ce <HAL_ADC_IRQHandler+0xc6>
      {
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 80019c2:	687b      	ldr	r3, [r7, #4]
 80019c4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80019c6:	f043 0201 	orr.w	r2, r3, #1
 80019ca:	687b      	ldr	r3, [r7, #4]
 80019cc:	641a      	str	r2, [r3, #64]	; 0x40
    
    /* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
    hadc->ConvCpltCallback(hadc);
#else
    HAL_ADC_ConvCpltCallback(hadc);
 80019ce:	6878      	ldr	r0, [r7, #4]
 80019d0:	f7ff fc50 	bl	8001274 <HAL_ADC_ConvCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
    
    /* Clear regular group conversion flag */
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
 80019d4:	687b      	ldr	r3, [r7, #4]
 80019d6:	681b      	ldr	r3, [r3, #0]
 80019d8:	f06f 0212 	mvn.w	r2, #18
 80019dc:	601a      	str	r2, [r3, #0]
  }
  
  tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC);
 80019de:	687b      	ldr	r3, [r7, #4]
 80019e0:	681b      	ldr	r3, [r3, #0]
 80019e2:	681b      	ldr	r3, [r3, #0]
 80019e4:	f003 0304 	and.w	r3, r3, #4
 80019e8:	2b04      	cmp	r3, #4
 80019ea:	bf0c      	ite	eq
 80019ec:	2301      	moveq	r3, #1
 80019ee:	2300      	movne	r3, #0
 80019f0:	b2db      	uxtb	r3, r3
 80019f2:	60fb      	str	r3, [r7, #12]
  tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC);                               
 80019f4:	687b      	ldr	r3, [r7, #4]
 80019f6:	681b      	ldr	r3, [r3, #0]
 80019f8:	685b      	ldr	r3, [r3, #4]
 80019fa:	f003 0380 	and.w	r3, r3, #128	; 0x80
 80019fe:	2b80      	cmp	r3, #128	; 0x80
 8001a00:	bf0c      	ite	eq
 8001a02:	2301      	moveq	r3, #1
 8001a04:	2300      	movne	r3, #0
 8001a06:	b2db      	uxtb	r3, r3
 8001a08:	60bb      	str	r3, [r7, #8]
  /* Check End of conversion flag for injected channels */
  if(tmp1 && tmp2)
 8001a0a:	68fb      	ldr	r3, [r7, #12]
 8001a0c:	2b00      	cmp	r3, #0
 8001a0e:	d057      	beq.n	8001ac0 <HAL_ADC_IRQHandler+0x1b8>
 8001a10:	68bb      	ldr	r3, [r7, #8]
 8001a12:	2b00      	cmp	r3, #0
 8001a14:	d054      	beq.n	8001ac0 <HAL_ADC_IRQHandler+0x1b8>
  {
    /* Update state machine on conversion status if not in error state */
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
 8001a16:	687b      	ldr	r3, [r7, #4]
 8001a18:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001a1a:	f003 0310 	and.w	r3, r3, #16
 8001a1e:	2b00      	cmp	r3, #0
 8001a20:	d105      	bne.n	8001a2e <HAL_ADC_IRQHandler+0x126>
    {
      /* Set ADC state */
      SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
 8001a22:	687b      	ldr	r3, [r7, #4]
 8001a24:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001a26:	f443 5200 	orr.w	r2, r3, #8192	; 0x2000
 8001a2a:	687b      	ldr	r3, [r7, #4]
 8001a2c:	641a      	str	r2, [r3, #64]	; 0x40

    /* Determine whether any further conversion upcoming on group injected  */
    /* by external trigger, scan sequence on going or by automatic injected */
    /* conversion from group regular (same conditions as group regular      */
    /* interruption disabling above).                                       */
    if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                    &&
 8001a2e:	687b      	ldr	r3, [r7, #4]
 8001a30:	681b      	ldr	r3, [r3, #0]
 8001a32:	689b      	ldr	r3, [r3, #8]
 8001a34:	f403 1340 	and.w	r3, r3, #3145728	; 0x300000
 8001a38:	2b00      	cmp	r3, #0
 8001a3a:	d139      	bne.n	8001ab0 <HAL_ADC_IRQHandler+0x1a8>
       (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL)  ||
 8001a3c:	687b      	ldr	r3, [r7, #4]
 8001a3e:	681b      	ldr	r3, [r3, #0]
 8001a40:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 8001a42:	f403 1340 	and.w	r3, r3, #3145728	; 0x300000
    if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                    &&
 8001a46:	2b00      	cmp	r3, #0
 8001a48:	d006      	beq.n	8001a58 <HAL_ADC_IRQHandler+0x150>
        HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)    ) &&
 8001a4a:	687b      	ldr	r3, [r7, #4]
 8001a4c:	681b      	ldr	r3, [r3, #0]
 8001a4e:	689b      	ldr	r3, [r3, #8]
 8001a50:	f403 6380 	and.w	r3, r3, #1024	; 0x400
       (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL)  ||
 8001a54:	2b00      	cmp	r3, #0
 8001a56:	d12b      	bne.n	8001ab0 <HAL_ADC_IRQHandler+0x1a8>
       (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
 8001a58:	687b      	ldr	r3, [r7, #4]
 8001a5a:	681b      	ldr	r3, [r3, #0]
 8001a5c:	685b      	ldr	r3, [r3, #4]
 8001a5e:	f403 6380 	and.w	r3, r3, #1024	; 0x400
        HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)    ) &&
 8001a62:	2b00      	cmp	r3, #0
 8001a64:	d124      	bne.n	8001ab0 <HAL_ADC_IRQHandler+0x1a8>
        (ADC_IS_SOFTWARE_START_REGULAR(hadc)       &&
 8001a66:	687b      	ldr	r3, [r7, #4]
 8001a68:	681b      	ldr	r3, [r3, #0]
 8001a6a:	689b      	ldr	r3, [r3, #8]
 8001a6c:	f003 5340 	and.w	r3, r3, #805306368	; 0x30000000
       (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
 8001a70:	2b00      	cmp	r3, #0
 8001a72:	d11d      	bne.n	8001ab0 <HAL_ADC_IRQHandler+0x1a8>
        (hadc->Init.ContinuousConvMode == DISABLE)   )       )   )
 8001a74:	687b      	ldr	r3, [r7, #4]
 8001a76:	7e1b      	ldrb	r3, [r3, #24]
        (ADC_IS_SOFTWARE_START_REGULAR(hadc)       &&
 8001a78:	2b00      	cmp	r3, #0
 8001a7a:	d119      	bne.n	8001ab0 <HAL_ADC_IRQHandler+0x1a8>
    {
      /* Disable ADC end of single conversion interrupt on group injected */
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
 8001a7c:	687b      	ldr	r3, [r7, #4]
 8001a7e:	681b      	ldr	r3, [r3, #0]
 8001a80:	685a      	ldr	r2, [r3, #4]
 8001a82:	687b      	ldr	r3, [r7, #4]
 8001a84:	681b      	ldr	r3, [r3, #0]
 8001a86:	f022 0280 	bic.w	r2, r2, #128	; 0x80
 8001a8a:	605a      	str	r2, [r3, #4]
      
      /* Set ADC state */
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);   
 8001a8c:	687b      	ldr	r3, [r7, #4]
 8001a8e:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001a90:	f423 5280 	bic.w	r2, r3, #4096	; 0x1000
 8001a94:	687b      	ldr	r3, [r7, #4]
 8001a96:	641a      	str	r2, [r3, #64]	; 0x40

      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
 8001a98:	687b      	ldr	r3, [r7, #4]
 8001a9a:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001a9c:	f403 7380 	and.w	r3, r3, #256	; 0x100
 8001aa0:	2b00      	cmp	r3, #0
 8001aa2:	d105      	bne.n	8001ab0 <HAL_ADC_IRQHandler+0x1a8>
      { 
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
 8001aa4:	687b      	ldr	r3, [r7, #4]
 8001aa6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001aa8:	f043 0201 	orr.w	r2, r3, #1
 8001aac:	687b      	ldr	r3, [r7, #4]
 8001aae:	641a      	str	r2, [r3, #64]	; 0x40
    /* Conversion complete callback */ 
    /* Conversion complete callback */ 
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
      hadc->InjectedConvCpltCallback(hadc);
#else
      HAL_ADCEx_InjectedConvCpltCallback(hadc);
 8001ab0:	6878      	ldr	r0, [r7, #4]
 8001ab2:	f000 fa9f 	bl	8001ff4 <HAL_ADCEx_InjectedConvCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
    
    /* Clear injected group conversion flag */
    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
 8001ab6:	687b      	ldr	r3, [r7, #4]
 8001ab8:	681b      	ldr	r3, [r3, #0]
 8001aba:	f06f 020c 	mvn.w	r2, #12
 8001abe:	601a      	str	r2, [r3, #0]
  }
  
  tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD);
 8001ac0:	687b      	ldr	r3, [r7, #4]
 8001ac2:	681b      	ldr	r3, [r3, #0]
 8001ac4:	681b      	ldr	r3, [r3, #0]
 8001ac6:	f003 0301 	and.w	r3, r3, #1
 8001aca:	2b01      	cmp	r3, #1
 8001acc:	bf0c      	ite	eq
 8001ace:	2301      	moveq	r3, #1
 8001ad0:	2300      	movne	r3, #0
 8001ad2:	b2db      	uxtb	r3, r3
 8001ad4:	60fb      	str	r3, [r7, #12]
  tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD);                          
 8001ad6:	687b      	ldr	r3, [r7, #4]
 8001ad8:	681b      	ldr	r3, [r3, #0]
 8001ada:	685b      	ldr	r3, [r3, #4]
 8001adc:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8001ae0:	2b40      	cmp	r3, #64	; 0x40
 8001ae2:	bf0c      	ite	eq
 8001ae4:	2301      	moveq	r3, #1
 8001ae6:	2300      	movne	r3, #0
 8001ae8:	b2db      	uxtb	r3, r3
 8001aea:	60bb      	str	r3, [r7, #8]
  /* Check Analog watchdog flag */
  if(tmp1 && tmp2)
 8001aec:	68fb      	ldr	r3, [r7, #12]
 8001aee:	2b00      	cmp	r3, #0
 8001af0:	d017      	beq.n	8001b22 <HAL_ADC_IRQHandler+0x21a>
 8001af2:	68bb      	ldr	r3, [r7, #8]
 8001af4:	2b00      	cmp	r3, #0
 8001af6:	d014      	beq.n	8001b22 <HAL_ADC_IRQHandler+0x21a>
  {
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
 8001af8:	687b      	ldr	r3, [r7, #4]
 8001afa:	681b      	ldr	r3, [r3, #0]
 8001afc:	681b      	ldr	r3, [r3, #0]
 8001afe:	f003 0301 	and.w	r3, r3, #1
 8001b02:	2b01      	cmp	r3, #1
 8001b04:	d10d      	bne.n	8001b22 <HAL_ADC_IRQHandler+0x21a>
    {
      /* Set ADC state */
      SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
 8001b06:	687b      	ldr	r3, [r7, #4]
 8001b08:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 8001b0a:	f443 3280 	orr.w	r2, r3, #65536	; 0x10000
 8001b0e:	687b      	ldr	r3, [r7, #4]
 8001b10:	641a      	str	r2, [r3, #64]	; 0x40
      
      /* Level out of window callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
      hadc->LevelOutOfWindowCallback(hadc);
#else
      HAL_ADC_LevelOutOfWindowCallback(hadc);
 8001b12:	6878      	ldr	r0, [r7, #4]
 8001b14:	f000 f846 	bl	8001ba4 <HAL_ADC_LevelOutOfWindowCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
      
      /* Clear the ADC analog watchdog flag */
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
 8001b18:	687b      	ldr	r3, [r7, #4]
 8001b1a:	681b      	ldr	r3, [r3, #0]
 8001b1c:	f06f 0201 	mvn.w	r2, #1
 8001b20:	601a      	str	r2, [r3, #0]
    }
  }
  
  tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR);
 8001b22:	687b      	ldr	r3, [r7, #4]
 8001b24:	681b      	ldr	r3, [r3, #0]
 8001b26:	681b      	ldr	r3, [r3, #0]
 8001b28:	f003 0320 	and.w	r3, r3, #32
 8001b2c:	2b20      	cmp	r3, #32
 8001b2e:	bf0c      	ite	eq
 8001b30:	2301      	moveq	r3, #1
 8001b32:	2300      	movne	r3, #0
 8001b34:	b2db      	uxtb	r3, r3
 8001b36:	60fb      	str	r3, [r7, #12]
  tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR);
 8001b38:	687b      	ldr	r3, [r7, #4]
 8001b3a:	681b      	ldr	r3, [r3, #0]
 8001b3c:	685b      	ldr	r3, [r3, #4]
 8001b3e:	f003 6380 	and.w	r3, r3, #67108864	; 0x4000000
 8001b42:	f1b3 6f80 	cmp.w	r3, #67108864	; 0x4000000
 8001b46:	bf0c      	ite	eq
 8001b48:	2301      	moveq	r3, #1
 8001b4a:	2300      	movne	r3, #0
 8001b4c:	b2db      	uxtb	r3, r3
 8001b4e:	60bb      	str	r3, [r7, #8]
  /* Check Overrun flag */
  if(tmp1 && tmp2)
 8001b50:	68fb      	ldr	r3, [r7, #12]
 8001b52:	2b00      	cmp	r3, #0
 8001b54:	d015      	beq.n	8001b82 <HAL_ADC_IRQHandler+0x27a>
 8001b56:	68bb      	ldr	r3, [r7, #8]
 8001b58:	2b00      	cmp	r3, #0
 8001b5a:	d012      	beq.n	8001b82 <HAL_ADC_IRQHandler+0x27a>
    /* Note: On STM32F4, ADC overrun can be set through other parameters    */
    /*       refer to description of parameter "EOCSelection" for more      */
    /*       details.                                                       */
    
    /* Set ADC error code to overrun */
    SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
 8001b5c:	687b      	ldr	r3, [r7, #4]
 8001b5e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 8001b60:	f043 0202 	orr.w	r2, r3, #2
 8001b64:	687b      	ldr	r3, [r7, #4]
 8001b66:	645a      	str	r2, [r3, #68]	; 0x44
    
    /* Clear ADC overrun flag */
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
 8001b68:	687b      	ldr	r3, [r7, #4]
 8001b6a:	681b      	ldr	r3, [r3, #0]
 8001b6c:	f06f 0220 	mvn.w	r2, #32
 8001b70:	601a      	str	r2, [r3, #0]
    
    /* Error callback */ 
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
      hadc->ErrorCallback(hadc);
#else
      HAL_ADC_ErrorCallback(hadc);
 8001b72:	6878      	ldr	r0, [r7, #4]
 8001b74:	f7ff fbb6 	bl	80012e4 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
    
    /* Clear the Overrun flag */
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
 8001b78:	687b      	ldr	r3, [r7, #4]
 8001b7a:	681b      	ldr	r3, [r3, #0]
 8001b7c:	f06f 0220 	mvn.w	r2, #32
 8001b80:	601a      	str	r2, [r3, #0]
  }
}
 8001b82:	bf00      	nop
 8001b84:	3710      	adds	r7, #16
 8001b86:	46bd      	mov	sp, r7
 8001b88:	bd80      	pop	{r7, pc}

08001b8a <HAL_ADC_GetValue>:
  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
  *         the configuration information for the specified ADC.
  * @retval Converted value
  */
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
{       
 8001b8a:	b480      	push	{r7}
 8001b8c:	b083      	sub	sp, #12
 8001b8e:	af00      	add	r7, sp, #0
 8001b90:	6078      	str	r0, [r7, #4]
  /* Return the selected ADC converted value */ 
  return hadc->Instance->DR;
 8001b92:	687b      	ldr	r3, [r7, #4]
 8001b94:	681b      	ldr	r3, [r3, #0]
 8001b96:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
}
 8001b98:	4618      	mov	r0, r3
 8001b9a:	370c      	adds	r7, #12
 8001b9c:	46bd      	mov	sp, r7
 8001b9e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001ba2:	4770      	bx	lr

08001ba4 <HAL_ADC_LevelOutOfWindowCallback>:
  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
  *         the configuration information for the specified ADC.
  * @retval None
  */
__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
{
 8001ba4:	b480      	push	{r7}
 8001ba6:	b083      	sub	sp, #12
 8001ba8:	af00      	add	r7, sp, #0
 8001baa:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hadc);
  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file
   */
}
 8001bac:	bf00      	nop
 8001bae:	370c      	adds	r7, #12
 8001bb0:	46bd      	mov	sp, r7
 8001bb2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001bb6:	4770      	bx	lr

08001bb8 <HAL_ADC_ConfigChannel>:
  *         the configuration information for the specified ADC.
  * @param  sConfig ADC configuration structure. 
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
 8001bb8:	b480      	push	{r7}
 8001bba:	b085      	sub	sp, #20
 8001bbc:	af00      	add	r7, sp, #0
 8001bbe:	6078      	str	r0, [r7, #4]
 8001bc0:	6039      	str	r1, [r7, #0]
  __IO uint32_t counter = 0U;
 8001bc2:	2300      	movs	r3, #0
 8001bc4:	60bb      	str	r3, [r7, #8]
  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
  
  /* Process locked */
  __HAL_LOCK(hadc);
 8001bc6:	687b      	ldr	r3, [r7, #4]
 8001bc8:	f893 303c 	ldrb.w	r3, [r3, #60]	; 0x3c
 8001bcc:	2b01      	cmp	r3, #1
 8001bce:	d101      	bne.n	8001bd4 <HAL_ADC_ConfigChannel+0x1c>
 8001bd0:	2302      	movs	r3, #2
 8001bd2:	e105      	b.n	8001de0 <HAL_ADC_ConfigChannel+0x228>
 8001bd4:	687b      	ldr	r3, [r7, #4]
 8001bd6:	2201      	movs	r2, #1
 8001bd8:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
    
  /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
  if (sConfig->Channel > ADC_CHANNEL_9)
 8001bdc:	683b      	ldr	r3, [r7, #0]
 8001bde:	681b      	ldr	r3, [r3, #0]
 8001be0:	2b09      	cmp	r3, #9
 8001be2:	d925      	bls.n	8001c30 <HAL_ADC_ConfigChannel+0x78>
  {
    /* Clear the old sample time */
    hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
 8001be4:	687b      	ldr	r3, [r7, #4]
 8001be6:	681b      	ldr	r3, [r3, #0]
 8001be8:	68d9      	ldr	r1, [r3, #12]
 8001bea:	683b      	ldr	r3, [r7, #0]
 8001bec:	681b      	ldr	r3, [r3, #0]
 8001bee:	b29b      	uxth	r3, r3
 8001bf0:	461a      	mov	r2, r3
 8001bf2:	4613      	mov	r3, r2
 8001bf4:	005b      	lsls	r3, r3, #1
 8001bf6:	4413      	add	r3, r2
 8001bf8:	3b1e      	subs	r3, #30
 8001bfa:	2207      	movs	r2, #7
 8001bfc:	fa02 f303 	lsl.w	r3, r2, r3
 8001c00:	43da      	mvns	r2, r3
 8001c02:	687b      	ldr	r3, [r7, #4]
 8001c04:	681b      	ldr	r3, [r3, #0]
 8001c06:	400a      	ands	r2, r1
 8001c08:	60da      	str	r2, [r3, #12]
    
    /* Set the new sample time */
    hadc->Instance->SMPR1 |= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
 8001c0a:	687b      	ldr	r3, [r7, #4]
 8001c0c:	681b      	ldr	r3, [r3, #0]
 8001c0e:	68d9      	ldr	r1, [r3, #12]
 8001c10:	683b      	ldr	r3, [r7, #0]
 8001c12:	689a      	ldr	r2, [r3, #8]
 8001c14:	683b      	ldr	r3, [r7, #0]
 8001c16:	681b      	ldr	r3, [r3, #0]
 8001c18:	b29b      	uxth	r3, r3
 8001c1a:	4618      	mov	r0, r3
 8001c1c:	4603      	mov	r3, r0
 8001c1e:	005b      	lsls	r3, r3, #1
 8001c20:	4403      	add	r3, r0
 8001c22:	3b1e      	subs	r3, #30
 8001c24:	409a      	lsls	r2, r3
 8001c26:	687b      	ldr	r3, [r7, #4]
 8001c28:	681b      	ldr	r3, [r3, #0]
 8001c2a:	430a      	orrs	r2, r1
 8001c2c:	60da      	str	r2, [r3, #12]
 8001c2e:	e022      	b.n	8001c76 <HAL_ADC_ConfigChannel+0xbe>
  }
  else /* ADC_Channel include in ADC_Channel_[0..9] */
  {
    /* Clear the old sample time */
    hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
 8001c30:	687b      	ldr	r3, [r7, #4]
 8001c32:	681b      	ldr	r3, [r3, #0]
 8001c34:	6919      	ldr	r1, [r3, #16]
 8001c36:	683b      	ldr	r3, [r7, #0]
 8001c38:	681b      	ldr	r3, [r3, #0]
 8001c3a:	b29b      	uxth	r3, r3
 8001c3c:	461a      	mov	r2, r3
 8001c3e:	4613      	mov	r3, r2
 8001c40:	005b      	lsls	r3, r3, #1
 8001c42:	4413      	add	r3, r2
 8001c44:	2207      	movs	r2, #7
 8001c46:	fa02 f303 	lsl.w	r3, r2, r3
 8001c4a:	43da      	mvns	r2, r3
 8001c4c:	687b      	ldr	r3, [r7, #4]
 8001c4e:	681b      	ldr	r3, [r3, #0]
 8001c50:	400a      	ands	r2, r1
 8001c52:	611a      	str	r2, [r3, #16]
    
    /* Set the new sample time */
    hadc->Instance->SMPR2 |= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
 8001c54:	687b      	ldr	r3, [r7, #4]
 8001c56:	681b      	ldr	r3, [r3, #0]
 8001c58:	6919      	ldr	r1, [r3, #16]
 8001c5a:	683b      	ldr	r3, [r7, #0]
 8001c5c:	689a      	ldr	r2, [r3, #8]
 8001c5e:	683b      	ldr	r3, [r7, #0]
 8001c60:	681b      	ldr	r3, [r3, #0]
 8001c62:	b29b      	uxth	r3, r3
 8001c64:	4618      	mov	r0, r3
 8001c66:	4603      	mov	r3, r0
 8001c68:	005b      	lsls	r3, r3, #1
 8001c6a:	4403      	add	r3, r0
 8001c6c:	409a      	lsls	r2, r3
 8001c6e:	687b      	ldr	r3, [r7, #4]
 8001c70:	681b      	ldr	r3, [r3, #0]
 8001c72:	430a      	orrs	r2, r1
 8001c74:	611a      	str	r2, [r3, #16]
  }
  
  /* For Rank 1 to 6 */
  if (sConfig->Rank < 7U)
 8001c76:	683b      	ldr	r3, [r7, #0]
 8001c78:	685b      	ldr	r3, [r3, #4]
 8001c7a:	2b06      	cmp	r3, #6
 8001c7c:	d824      	bhi.n	8001cc8 <HAL_ADC_ConfigChannel+0x110>
  {
    /* Clear the old SQx bits for the selected rank */
    hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
 8001c7e:	687b      	ldr	r3, [r7, #4]
 8001c80:	681b      	ldr	r3, [r3, #0]
 8001c82:	6b59      	ldr	r1, [r3, #52]	; 0x34
 8001c84:	683b      	ldr	r3, [r7, #0]
 8001c86:	685a      	ldr	r2, [r3, #4]
 8001c88:	4613      	mov	r3, r2
 8001c8a:	009b      	lsls	r3, r3, #2
 8001c8c:	4413      	add	r3, r2
 8001c8e:	3b05      	subs	r3, #5
 8001c90:	221f      	movs	r2, #31
 8001c92:	fa02 f303 	lsl.w	r3, r2, r3
 8001c96:	43da      	mvns	r2, r3
 8001c98:	687b      	ldr	r3, [r7, #4]
 8001c9a:	681b      	ldr	r3, [r3, #0]
 8001c9c:	400a      	ands	r2, r1
 8001c9e:	635a      	str	r2, [r3, #52]	; 0x34
    
    /* Set the SQx bits for the selected rank */
    hadc->Instance->SQR3 |= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
 8001ca0:	687b      	ldr	r3, [r7, #4]
 8001ca2:	681b      	ldr	r3, [r3, #0]
 8001ca4:	6b59      	ldr	r1, [r3, #52]	; 0x34
 8001ca6:	683b      	ldr	r3, [r7, #0]
 8001ca8:	681b      	ldr	r3, [r3, #0]
 8001caa:	b29b      	uxth	r3, r3
 8001cac:	4618      	mov	r0, r3
 8001cae:	683b      	ldr	r3, [r7, #0]
 8001cb0:	685a      	ldr	r2, [r3, #4]
 8001cb2:	4613      	mov	r3, r2
 8001cb4:	009b      	lsls	r3, r3, #2
 8001cb6:	4413      	add	r3, r2
 8001cb8:	3b05      	subs	r3, #5
 8001cba:	fa00 f203 	lsl.w	r2, r0, r3
 8001cbe:	687b      	ldr	r3, [r7, #4]
 8001cc0:	681b      	ldr	r3, [r3, #0]
 8001cc2:	430a      	orrs	r2, r1
 8001cc4:	635a      	str	r2, [r3, #52]	; 0x34
 8001cc6:	e04c      	b.n	8001d62 <HAL_ADC_ConfigChannel+0x1aa>
  }
  /* For Rank 7 to 12 */
  else if (sConfig->Rank < 13U)
 8001cc8:	683b      	ldr	r3, [r7, #0]
 8001cca:	685b      	ldr	r3, [r3, #4]
 8001ccc:	2b0c      	cmp	r3, #12
 8001cce:	d824      	bhi.n	8001d1a <HAL_ADC_ConfigChannel+0x162>
  {
    /* Clear the old SQx bits for the selected rank */
    hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
 8001cd0:	687b      	ldr	r3, [r7, #4]
 8001cd2:	681b      	ldr	r3, [r3, #0]
 8001cd4:	6b19      	ldr	r1, [r3, #48]	; 0x30
 8001cd6:	683b      	ldr	r3, [r7, #0]
 8001cd8:	685a      	ldr	r2, [r3, #4]
 8001cda:	4613      	mov	r3, r2
 8001cdc:	009b      	lsls	r3, r3, #2
 8001cde:	4413      	add	r3, r2
 8001ce0:	3b23      	subs	r3, #35	; 0x23
 8001ce2:	221f      	movs	r2, #31
 8001ce4:	fa02 f303 	lsl.w	r3, r2, r3
 8001ce8:	43da      	mvns	r2, r3
 8001cea:	687b      	ldr	r3, [r7, #4]
 8001cec:	681b      	ldr	r3, [r3, #0]
 8001cee:	400a      	ands	r2, r1
 8001cf0:	631a      	str	r2, [r3, #48]	; 0x30
    
    /* Set the SQx bits for the selected rank */
    hadc->Instance->SQR2 |= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
 8001cf2:	687b      	ldr	r3, [r7, #4]
 8001cf4:	681b      	ldr	r3, [r3, #0]
 8001cf6:	6b19      	ldr	r1, [r3, #48]	; 0x30
 8001cf8:	683b      	ldr	r3, [r7, #0]
 8001cfa:	681b      	ldr	r3, [r3, #0]
 8001cfc:	b29b      	uxth	r3, r3
 8001cfe:	4618      	mov	r0, r3
 8001d00:	683b      	ldr	r3, [r7, #0]
 8001d02:	685a      	ldr	r2, [r3, #4]
 8001d04:	4613      	mov	r3, r2
 8001d06:	009b      	lsls	r3, r3, #2
 8001d08:	4413      	add	r3, r2
 8001d0a:	3b23      	subs	r3, #35	; 0x23
 8001d0c:	fa00 f203 	lsl.w	r2, r0, r3
 8001d10:	687b      	ldr	r3, [r7, #4]
 8001d12:	681b      	ldr	r3, [r3, #0]
 8001d14:	430a      	orrs	r2, r1
 8001d16:	631a      	str	r2, [r3, #48]	; 0x30
 8001d18:	e023      	b.n	8001d62 <HAL_ADC_ConfigChannel+0x1aa>
  }
  /* For Rank 13 to 16 */
  else
  {
    /* Clear the old SQx bits for the selected rank */
    hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
 8001d1a:	687b      	ldr	r3, [r7, #4]
 8001d1c:	681b      	ldr	r3, [r3, #0]
 8001d1e:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
 8001d20:	683b      	ldr	r3, [r7, #0]
 8001d22:	685a      	ldr	r2, [r3, #4]
 8001d24:	4613      	mov	r3, r2
 8001d26:	009b      	lsls	r3, r3, #2
 8001d28:	4413      	add	r3, r2
 8001d2a:	3b41      	subs	r3, #65	; 0x41
 8001d2c:	221f      	movs	r2, #31
 8001d2e:	fa02 f303 	lsl.w	r3, r2, r3
 8001d32:	43da      	mvns	r2, r3
 8001d34:	687b      	ldr	r3, [r7, #4]
 8001d36:	681b      	ldr	r3, [r3, #0]
 8001d38:	400a      	ands	r2, r1
 8001d3a:	62da      	str	r2, [r3, #44]	; 0x2c
    
    /* Set the SQx bits for the selected rank */
    hadc->Instance->SQR1 |= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
 8001d3c:	687b      	ldr	r3, [r7, #4]
 8001d3e:	681b      	ldr	r3, [r3, #0]
 8001d40:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
 8001d42:	683b      	ldr	r3, [r7, #0]
 8001d44:	681b      	ldr	r3, [r3, #0]
 8001d46:	b29b      	uxth	r3, r3
 8001d48:	4618      	mov	r0, r3
 8001d4a:	683b      	ldr	r3, [r7, #0]
 8001d4c:	685a      	ldr	r2, [r3, #4]
 8001d4e:	4613      	mov	r3, r2
 8001d50:	009b      	lsls	r3, r3, #2
 8001d52:	4413      	add	r3, r2
 8001d54:	3b41      	subs	r3, #65	; 0x41
 8001d56:	fa00 f203 	lsl.w	r2, r0, r3
 8001d5a:	687b      	ldr	r3, [r7, #4]
 8001d5c:	681b      	ldr	r3, [r3, #0]
 8001d5e:	430a      	orrs	r2, r1
 8001d60:	62da      	str	r2, [r3, #44]	; 0x2c
  }

    /* Pointer to the common control register to which is belonging hadc    */
    /* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
    /* control register)                                                    */
    tmpADC_Common = ADC_COMMON_REGISTER(hadc);
 8001d62:	4b22      	ldr	r3, [pc, #136]	; (8001dec <HAL_ADC_ConfigChannel+0x234>)
 8001d64:	60fb      	str	r3, [r7, #12]

  /* if ADC1 Channel_18 is selected for VBAT Channel ennable VBATE */
  if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
 8001d66:	687b      	ldr	r3, [r7, #4]
 8001d68:	681b      	ldr	r3, [r3, #0]
 8001d6a:	4a21      	ldr	r2, [pc, #132]	; (8001df0 <HAL_ADC_ConfigChannel+0x238>)
 8001d6c:	4293      	cmp	r3, r2
 8001d6e:	d109      	bne.n	8001d84 <HAL_ADC_ConfigChannel+0x1cc>
 8001d70:	683b      	ldr	r3, [r7, #0]
 8001d72:	681b      	ldr	r3, [r3, #0]
 8001d74:	2b12      	cmp	r3, #18
 8001d76:	d105      	bne.n	8001d84 <HAL_ADC_ConfigChannel+0x1cc>
    if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT)
    {
      tmpADC_Common->CCR &= ~ADC_CCR_TSVREFE;
    }
    /* Enable the VBAT channel*/
    tmpADC_Common->CCR |= ADC_CCR_VBATE;
 8001d78:	68fb      	ldr	r3, [r7, #12]
 8001d7a:	685b      	ldr	r3, [r3, #4]
 8001d7c:	f443 0280 	orr.w	r2, r3, #4194304	; 0x400000
 8001d80:	68fb      	ldr	r3, [r7, #12]
 8001d82:	605a      	str	r2, [r3, #4]
  }
  
  /* if ADC1 Channel_16 or Channel_18 is selected for Temperature sensor or 
     Channel_17 is selected for VREFINT enable TSVREFE */
  if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) || (sConfig->Channel == ADC_CHANNEL_VREFINT)))
 8001d84:	687b      	ldr	r3, [r7, #4]
 8001d86:	681b      	ldr	r3, [r3, #0]
 8001d88:	4a19      	ldr	r2, [pc, #100]	; (8001df0 <HAL_ADC_ConfigChannel+0x238>)
 8001d8a:	4293      	cmp	r3, r2
 8001d8c:	d123      	bne.n	8001dd6 <HAL_ADC_ConfigChannel+0x21e>
 8001d8e:	683b      	ldr	r3, [r7, #0]
 8001d90:	681b      	ldr	r3, [r3, #0]
 8001d92:	2b10      	cmp	r3, #16
 8001d94:	d003      	beq.n	8001d9e <HAL_ADC_ConfigChannel+0x1e6>
 8001d96:	683b      	ldr	r3, [r7, #0]
 8001d98:	681b      	ldr	r3, [r3, #0]
 8001d9a:	2b11      	cmp	r3, #17
 8001d9c:	d11b      	bne.n	8001dd6 <HAL_ADC_ConfigChannel+0x21e>
    if ((uint16_t)ADC_CHANNEL_TEMPSENSOR == (uint16_t)ADC_CHANNEL_VBAT)
    {
      tmpADC_Common->CCR &= ~ADC_CCR_VBATE;
    }
    /* Enable the Temperature sensor and VREFINT channel*/
    tmpADC_Common->CCR |= ADC_CCR_TSVREFE;
 8001d9e:	68fb      	ldr	r3, [r7, #12]
 8001da0:	685b      	ldr	r3, [r3, #4]
 8001da2:	f443 0200 	orr.w	r2, r3, #8388608	; 0x800000
 8001da6:	68fb      	ldr	r3, [r7, #12]
 8001da8:	605a      	str	r2, [r3, #4]
    
    if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
 8001daa:	683b      	ldr	r3, [r7, #0]
 8001dac:	681b      	ldr	r3, [r3, #0]
 8001dae:	2b10      	cmp	r3, #16
 8001db0:	d111      	bne.n	8001dd6 <HAL_ADC_ConfigChannel+0x21e>
    {
      /* Delay for temperature sensor stabilization time */
      /* Compute number of CPU cycles to wait for */
      counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
 8001db2:	4b10      	ldr	r3, [pc, #64]	; (8001df4 <HAL_ADC_ConfigChannel+0x23c>)
 8001db4:	681b      	ldr	r3, [r3, #0]
 8001db6:	4a10      	ldr	r2, [pc, #64]	; (8001df8 <HAL_ADC_ConfigChannel+0x240>)
 8001db8:	fba2 2303 	umull	r2, r3, r2, r3
 8001dbc:	0c9a      	lsrs	r2, r3, #18
 8001dbe:	4613      	mov	r3, r2
 8001dc0:	009b      	lsls	r3, r3, #2
 8001dc2:	4413      	add	r3, r2
 8001dc4:	005b      	lsls	r3, r3, #1
 8001dc6:	60bb      	str	r3, [r7, #8]
      while(counter != 0U)
 8001dc8:	e002      	b.n	8001dd0 <HAL_ADC_ConfigChannel+0x218>
      {
        counter--;
 8001dca:	68bb      	ldr	r3, [r7, #8]
 8001dcc:	3b01      	subs	r3, #1
 8001dce:	60bb      	str	r3, [r7, #8]
      while(counter != 0U)
 8001dd0:	68bb      	ldr	r3, [r7, #8]
 8001dd2:	2b00      	cmp	r3, #0
 8001dd4:	d1f9      	bne.n	8001dca <HAL_ADC_ConfigChannel+0x212>
      }
    }
  }
  
  /* Process unlocked */
  __HAL_UNLOCK(hadc);
 8001dd6:	687b      	ldr	r3, [r7, #4]
 8001dd8:	2200      	movs	r2, #0
 8001dda:	f883 203c 	strb.w	r2, [r3, #60]	; 0x3c
  
  /* Return function status */
  return HAL_OK;
 8001dde:	2300      	movs	r3, #0
}
 8001de0:	4618      	mov	r0, r3
 8001de2:	3714      	adds	r7, #20
 8001de4:	46bd      	mov	sp, r7
 8001de6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001dea:	4770      	bx	lr
 8001dec:	40012300 	.word	0x40012300
 8001df0:	40012000 	.word	0x40012000
 8001df4:	20000004 	.word	0x20000004
 8001df8:	431bde83 	.word	0x431bde83

08001dfc <ADC_Init>:
  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
  *         the configuration information for the specified ADC.  
  * @retval None
  */
static void ADC_Init(ADC_HandleTypeDef* hadc)
{
 8001dfc:	b480      	push	{r7}
 8001dfe:	b085      	sub	sp, #20
 8001e00:	af00      	add	r7, sp, #0
 8001e02:	6078      	str	r0, [r7, #4]
  
  /* Set ADC parameters */
  /* Pointer to the common control register to which is belonging hadc    */
  /* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
  /* control register)                                                    */
  tmpADC_Common = ADC_COMMON_REGISTER(hadc);
 8001e04:	4b79      	ldr	r3, [pc, #484]	; (8001fec <ADC_Init+0x1f0>)
 8001e06:	60fb      	str	r3, [r7, #12]
  
  /* Set the ADC clock prescaler */
  tmpADC_Common->CCR &= ~(ADC_CCR_ADCPRE);
 8001e08:	68fb      	ldr	r3, [r7, #12]
 8001e0a:	685b      	ldr	r3, [r3, #4]
 8001e0c:	f423 3240 	bic.w	r2, r3, #196608	; 0x30000
 8001e10:	68fb      	ldr	r3, [r7, #12]
 8001e12:	605a      	str	r2, [r3, #4]
  tmpADC_Common->CCR |=  hadc->Init.ClockPrescaler;
 8001e14:	68fb      	ldr	r3, [r7, #12]
 8001e16:	685a      	ldr	r2, [r3, #4]
 8001e18:	687b      	ldr	r3, [r7, #4]
 8001e1a:	685b      	ldr	r3, [r3, #4]
 8001e1c:	431a      	orrs	r2, r3
 8001e1e:	68fb      	ldr	r3, [r7, #12]
 8001e20:	605a      	str	r2, [r3, #4]
  
  /* Set ADC scan mode */
  hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
 8001e22:	687b      	ldr	r3, [r7, #4]
 8001e24:	681b      	ldr	r3, [r3, #0]
 8001e26:	685a      	ldr	r2, [r3, #4]
 8001e28:	687b      	ldr	r3, [r7, #4]
 8001e2a:	681b      	ldr	r3, [r3, #0]
 8001e2c:	f422 7280 	bic.w	r2, r2, #256	; 0x100
 8001e30:	605a      	str	r2, [r3, #4]
  hadc->Instance->CR1 |=  ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
 8001e32:	687b      	ldr	r3, [r7, #4]
 8001e34:	681b      	ldr	r3, [r3, #0]
 8001e36:	6859      	ldr	r1, [r3, #4]
 8001e38:	687b      	ldr	r3, [r7, #4]
 8001e3a:	691b      	ldr	r3, [r3, #16]
 8001e3c:	021a      	lsls	r2, r3, #8
 8001e3e:	687b      	ldr	r3, [r7, #4]
 8001e40:	681b      	ldr	r3, [r3, #0]
 8001e42:	430a      	orrs	r2, r1
 8001e44:	605a      	str	r2, [r3, #4]
  
  /* Set ADC resolution */
  hadc->Instance->CR1 &= ~(ADC_CR1_RES);
 8001e46:	687b      	ldr	r3, [r7, #4]
 8001e48:	681b      	ldr	r3, [r3, #0]
 8001e4a:	685a      	ldr	r2, [r3, #4]
 8001e4c:	687b      	ldr	r3, [r7, #4]
 8001e4e:	681b      	ldr	r3, [r3, #0]
 8001e50:	f022 7240 	bic.w	r2, r2, #50331648	; 0x3000000
 8001e54:	605a      	str	r2, [r3, #4]
  hadc->Instance->CR1 |=  hadc->Init.Resolution;
 8001e56:	687b      	ldr	r3, [r7, #4]
 8001e58:	681b      	ldr	r3, [r3, #0]
 8001e5a:	6859      	ldr	r1, [r3, #4]
 8001e5c:	687b      	ldr	r3, [r7, #4]
 8001e5e:	689a      	ldr	r2, [r3, #8]
 8001e60:	687b      	ldr	r3, [r7, #4]
 8001e62:	681b      	ldr	r3, [r3, #0]
 8001e64:	430a      	orrs	r2, r1
 8001e66:	605a      	str	r2, [r3, #4]
  
  /* Set ADC data alignment */
  hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
 8001e68:	687b      	ldr	r3, [r7, #4]
 8001e6a:	681b      	ldr	r3, [r3, #0]
 8001e6c:	689a      	ldr	r2, [r3, #8]
 8001e6e:	687b      	ldr	r3, [r7, #4]
 8001e70:	681b      	ldr	r3, [r3, #0]
 8001e72:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
 8001e76:	609a      	str	r2, [r3, #8]
  hadc->Instance->CR2 |= hadc->Init.DataAlign;
 8001e78:	687b      	ldr	r3, [r7, #4]
 8001e7a:	681b      	ldr	r3, [r3, #0]
 8001e7c:	6899      	ldr	r1, [r3, #8]
 8001e7e:	687b      	ldr	r3, [r7, #4]
 8001e80:	68da      	ldr	r2, [r3, #12]
 8001e82:	687b      	ldr	r3, [r7, #4]
 8001e84:	681b      	ldr	r3, [r3, #0]
 8001e86:	430a      	orrs	r2, r1
 8001e88:	609a      	str	r2, [r3, #8]
  /* Enable external trigger if trigger selection is different of software  */
  /* start.                                                                 */
  /* Note: This configuration keeps the hardware feature of parameter       */
  /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
  /*       software start.                                                  */
  if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
 8001e8a:	687b      	ldr	r3, [r7, #4]
 8001e8c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
 8001e8e:	4a58      	ldr	r2, [pc, #352]	; (8001ff0 <ADC_Init+0x1f4>)
 8001e90:	4293      	cmp	r3, r2
 8001e92:	d022      	beq.n	8001eda <ADC_Init+0xde>
  {
    /* Select external trigger to start conversion */
    hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
 8001e94:	687b      	ldr	r3, [r7, #4]
 8001e96:	681b      	ldr	r3, [r3, #0]
 8001e98:	689a      	ldr	r2, [r3, #8]
 8001e9a:	687b      	ldr	r3, [r7, #4]
 8001e9c:	681b      	ldr	r3, [r3, #0]
 8001e9e:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
 8001ea2:	609a      	str	r2, [r3, #8]
    hadc->Instance->CR2 |= hadc->Init.ExternalTrigConv;
 8001ea4:	687b      	ldr	r3, [r7, #4]
 8001ea6:	681b      	ldr	r3, [r3, #0]
 8001ea8:	6899      	ldr	r1, [r3, #8]
 8001eaa:	687b      	ldr	r3, [r7, #4]
 8001eac:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8001eae:	687b      	ldr	r3, [r7, #4]
 8001eb0:	681b      	ldr	r3, [r3, #0]
 8001eb2:	430a      	orrs	r2, r1
 8001eb4:	609a      	str	r2, [r3, #8]
    
    /* Select external trigger polarity */
    hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
 8001eb6:	687b      	ldr	r3, [r7, #4]
 8001eb8:	681b      	ldr	r3, [r3, #0]
 8001eba:	689a      	ldr	r2, [r3, #8]
 8001ebc:	687b      	ldr	r3, [r7, #4]
 8001ebe:	681b      	ldr	r3, [r3, #0]
 8001ec0:	f022 5240 	bic.w	r2, r2, #805306368	; 0x30000000
 8001ec4:	609a      	str	r2, [r3, #8]
    hadc->Instance->CR2 |= hadc->Init.ExternalTrigConvEdge;
 8001ec6:	687b      	ldr	r3, [r7, #4]
 8001ec8:	681b      	ldr	r3, [r3, #0]
 8001eca:	6899      	ldr	r1, [r3, #8]
 8001ecc:	687b      	ldr	r3, [r7, #4]
 8001ece:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8001ed0:	687b      	ldr	r3, [r7, #4]
 8001ed2:	681b      	ldr	r3, [r3, #0]
 8001ed4:	430a      	orrs	r2, r1
 8001ed6:	609a      	str	r2, [r3, #8]
 8001ed8:	e00f      	b.n	8001efa <ADC_Init+0xfe>
  }
  else
  {
    /* Reset the external trigger */
    hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
 8001eda:	687b      	ldr	r3, [r7, #4]
 8001edc:	681b      	ldr	r3, [r3, #0]
 8001ede:	689a      	ldr	r2, [r3, #8]
 8001ee0:	687b      	ldr	r3, [r7, #4]
 8001ee2:	681b      	ldr	r3, [r3, #0]
 8001ee4:	f022 6270 	bic.w	r2, r2, #251658240	; 0xf000000
 8001ee8:	609a      	str	r2, [r3, #8]
    hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
 8001eea:	687b      	ldr	r3, [r7, #4]
 8001eec:	681b      	ldr	r3, [r3, #0]
 8001eee:	689a      	ldr	r2, [r3, #8]
 8001ef0:	687b      	ldr	r3, [r7, #4]
 8001ef2:	681b      	ldr	r3, [r3, #0]
 8001ef4:	f022 5240 	bic.w	r2, r2, #805306368	; 0x30000000
 8001ef8:	609a      	str	r2, [r3, #8]
  }
  
  /* Enable or disable ADC continuous conversion mode */
  hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
 8001efa:	687b      	ldr	r3, [r7, #4]
 8001efc:	681b      	ldr	r3, [r3, #0]
 8001efe:	689a      	ldr	r2, [r3, #8]
 8001f00:	687b      	ldr	r3, [r7, #4]
 8001f02:	681b      	ldr	r3, [r3, #0]
 8001f04:	f022 0202 	bic.w	r2, r2, #2
 8001f08:	609a      	str	r2, [r3, #8]
  hadc->Instance->CR2 |= ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode);
 8001f0a:	687b      	ldr	r3, [r7, #4]
 8001f0c:	681b      	ldr	r3, [r3, #0]
 8001f0e:	6899      	ldr	r1, [r3, #8]
 8001f10:	687b      	ldr	r3, [r7, #4]
 8001f12:	7e1b      	ldrb	r3, [r3, #24]
 8001f14:	005a      	lsls	r2, r3, #1
 8001f16:	687b      	ldr	r3, [r7, #4]
 8001f18:	681b      	ldr	r3, [r3, #0]
 8001f1a:	430a      	orrs	r2, r1
 8001f1c:	609a      	str	r2, [r3, #8]
  
  if(hadc->Init.DiscontinuousConvMode != DISABLE)
 8001f1e:	687b      	ldr	r3, [r7, #4]
 8001f20:	f893 3020 	ldrb.w	r3, [r3, #32]
 8001f24:	2b00      	cmp	r3, #0
 8001f26:	d01b      	beq.n	8001f60 <ADC_Init+0x164>
  {
    assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
  
    /* Enable the selected ADC regular discontinuous mode */
    hadc->Instance->CR1 |= (uint32_t)ADC_CR1_DISCEN;
 8001f28:	687b      	ldr	r3, [r7, #4]
 8001f2a:	681b      	ldr	r3, [r3, #0]
 8001f2c:	685a      	ldr	r2, [r3, #4]
 8001f2e:	687b      	ldr	r3, [r7, #4]
 8001f30:	681b      	ldr	r3, [r3, #0]
 8001f32:	f442 6200 	orr.w	r2, r2, #2048	; 0x800
 8001f36:	605a      	str	r2, [r3, #4]
    
    /* Set the number of channels to be converted in discontinuous mode */
    hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
 8001f38:	687b      	ldr	r3, [r7, #4]
 8001f3a:	681b      	ldr	r3, [r3, #0]
 8001f3c:	685a      	ldr	r2, [r3, #4]
 8001f3e:	687b      	ldr	r3, [r7, #4]
 8001f40:	681b      	ldr	r3, [r3, #0]
 8001f42:	f422 4260 	bic.w	r2, r2, #57344	; 0xe000
 8001f46:	605a      	str	r2, [r3, #4]
    hadc->Instance->CR1 |=  ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
 8001f48:	687b      	ldr	r3, [r7, #4]
 8001f4a:	681b      	ldr	r3, [r3, #0]
 8001f4c:	6859      	ldr	r1, [r3, #4]
 8001f4e:	687b      	ldr	r3, [r7, #4]
 8001f50:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8001f52:	3b01      	subs	r3, #1
 8001f54:	035a      	lsls	r2, r3, #13
 8001f56:	687b      	ldr	r3, [r7, #4]
 8001f58:	681b      	ldr	r3, [r3, #0]
 8001f5a:	430a      	orrs	r2, r1
 8001f5c:	605a      	str	r2, [r3, #4]
 8001f5e:	e007      	b.n	8001f70 <ADC_Init+0x174>
  }
  else
  {
    /* Disable the selected ADC regular discontinuous mode */
    hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
 8001f60:	687b      	ldr	r3, [r7, #4]
 8001f62:	681b      	ldr	r3, [r3, #0]
 8001f64:	685a      	ldr	r2, [r3, #4]
 8001f66:	687b      	ldr	r3, [r7, #4]
 8001f68:	681b      	ldr	r3, [r3, #0]
 8001f6a:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
 8001f6e:	605a      	str	r2, [r3, #4]
  }
  
  /* Set ADC number of conversion */
  hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
 8001f70:	687b      	ldr	r3, [r7, #4]
 8001f72:	681b      	ldr	r3, [r3, #0]
 8001f74:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8001f76:	687b      	ldr	r3, [r7, #4]
 8001f78:	681b      	ldr	r3, [r3, #0]
 8001f7a:	f422 0270 	bic.w	r2, r2, #15728640	; 0xf00000
 8001f7e:	62da      	str	r2, [r3, #44]	; 0x2c
  hadc->Instance->SQR1 |=  ADC_SQR1(hadc->Init.NbrOfConversion);
 8001f80:	687b      	ldr	r3, [r7, #4]
 8001f82:	681b      	ldr	r3, [r3, #0]
 8001f84:	6ad9      	ldr	r1, [r3, #44]	; 0x2c
 8001f86:	687b      	ldr	r3, [r7, #4]
 8001f88:	69db      	ldr	r3, [r3, #28]
 8001f8a:	3b01      	subs	r3, #1
 8001f8c:	051a      	lsls	r2, r3, #20
 8001f8e:	687b      	ldr	r3, [r7, #4]
 8001f90:	681b      	ldr	r3, [r3, #0]
 8001f92:	430a      	orrs	r2, r1
 8001f94:	62da      	str	r2, [r3, #44]	; 0x2c
  
  /* Enable or disable ADC DMA continuous request */
  hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
 8001f96:	687b      	ldr	r3, [r7, #4]
 8001f98:	681b      	ldr	r3, [r3, #0]
 8001f9a:	689a      	ldr	r2, [r3, #8]
 8001f9c:	687b      	ldr	r3, [r7, #4]
 8001f9e:	681b      	ldr	r3, [r3, #0]
 8001fa0:	f422 7200 	bic.w	r2, r2, #512	; 0x200
 8001fa4:	609a      	str	r2, [r3, #8]
  hadc->Instance->CR2 |= ADC_CR2_DMAContReq((uint32_t)hadc->Init.DMAContinuousRequests);
 8001fa6:	687b      	ldr	r3, [r7, #4]
 8001fa8:	681b      	ldr	r3, [r3, #0]
 8001faa:	6899      	ldr	r1, [r3, #8]
 8001fac:	687b      	ldr	r3, [r7, #4]
 8001fae:	f893 3030 	ldrb.w	r3, [r3, #48]	; 0x30
 8001fb2:	025a      	lsls	r2, r3, #9
 8001fb4:	687b      	ldr	r3, [r7, #4]
 8001fb6:	681b      	ldr	r3, [r3, #0]
 8001fb8:	430a      	orrs	r2, r1
 8001fba:	609a      	str	r2, [r3, #8]
  
  /* Enable or disable ADC end of conversion selection */
  hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
 8001fbc:	687b      	ldr	r3, [r7, #4]
 8001fbe:	681b      	ldr	r3, [r3, #0]
 8001fc0:	689a      	ldr	r2, [r3, #8]
 8001fc2:	687b      	ldr	r3, [r7, #4]
 8001fc4:	681b      	ldr	r3, [r3, #0]
 8001fc6:	f422 6280 	bic.w	r2, r2, #1024	; 0x400
 8001fca:	609a      	str	r2, [r3, #8]
  hadc->Instance->CR2 |= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
 8001fcc:	687b      	ldr	r3, [r7, #4]
 8001fce:	681b      	ldr	r3, [r3, #0]
 8001fd0:	6899      	ldr	r1, [r3, #8]
 8001fd2:	687b      	ldr	r3, [r7, #4]
 8001fd4:	695b      	ldr	r3, [r3, #20]
 8001fd6:	029a      	lsls	r2, r3, #10
 8001fd8:	687b      	ldr	r3, [r7, #4]
 8001fda:	681b      	ldr	r3, [r3, #0]
 8001fdc:	430a      	orrs	r2, r1
 8001fde:	609a      	str	r2, [r3, #8]
}
 8001fe0:	bf00      	nop
 8001fe2:	3714      	adds	r7, #20
 8001fe4:	46bd      	mov	sp, r7
 8001fe6:	f85d 7b04 	ldr.w	r7, [sp], #4
 8001fea:	4770      	bx	lr
 8001fec:	40012300 	.word	0x40012300
 8001ff0:	0f000001 	.word	0x0f000001

08001ff4 <HAL_ADCEx_InjectedConvCpltCallback>:
  * @param  hadc pointer to a ADC_HandleTypeDef structure that contains
  *         the configuration information for the specified ADC.
  * @retval None
  */
__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
{
 8001ff4:	b480      	push	{r7}
 8001ff6:	b083      	sub	sp, #12
 8001ff8:	af00      	add	r7, sp, #0
 8001ffa:	6078      	str	r0, [r7, #4]
  /* Prevent unused argument(s) compilation warning */
  UNUSED(hadc);
  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
   */
}
 8001ffc:	bf00      	nop
 8001ffe:	370c      	adds	r7, #12
 8002000:	46bd      	mov	sp, r7
 8002002:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002006:	4770      	bx	lr

08002008 <__NVIC_SetPriorityGrouping>:
           In case of a conflict between priority grouping and available
           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
  \param [in]      PriorityGroup  Priority grouping field.
 */
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
 8002008:	b480      	push	{r7}
 800200a:	b085      	sub	sp, #20
 800200c:	af00      	add	r7, sp, #0
 800200e:	6078      	str	r0, [r7, #4]
  uint32_t reg_value;
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 8002010:	687b      	ldr	r3, [r7, #4]
 8002012:	f003 0307 	and.w	r3, r3, #7
 8002016:	60fb      	str	r3, [r7, #12]

  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
 8002018:	4b0c      	ldr	r3, [pc, #48]	; (800204c <__NVIC_SetPriorityGrouping+0x44>)
 800201a:	68db      	ldr	r3, [r3, #12]
 800201c:	60bb      	str	r3, [r7, #8]
  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
 800201e:	68ba      	ldr	r2, [r7, #8]
 8002020:	f64f 03ff 	movw	r3, #63743	; 0xf8ff
 8002024:	4013      	ands	r3, r2
 8002026:	60bb      	str	r3, [r7, #8]
  reg_value  =  (reg_value                                   |
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
 8002028:	68fb      	ldr	r3, [r7, #12]
 800202a:	021a      	lsls	r2, r3, #8
                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
 800202c:	68bb      	ldr	r3, [r7, #8]
 800202e:	4313      	orrs	r3, r2
  reg_value  =  (reg_value                                   |
 8002030:	f043 63bf 	orr.w	r3, r3, #100139008	; 0x5f80000
 8002034:	f443 3300 	orr.w	r3, r3, #131072	; 0x20000
 8002038:	60bb      	str	r3, [r7, #8]
  SCB->AIRCR =  reg_value;
 800203a:	4a04      	ldr	r2, [pc, #16]	; (800204c <__NVIC_SetPriorityGrouping+0x44>)
 800203c:	68bb      	ldr	r3, [r7, #8]
 800203e:	60d3      	str	r3, [r2, #12]
}
 8002040:	bf00      	nop
 8002042:	3714      	adds	r7, #20
 8002044:	46bd      	mov	sp, r7
 8002046:	f85d 7b04 	ldr.w	r7, [sp], #4
 800204a:	4770      	bx	lr
 800204c:	e000ed00 	.word	0xe000ed00

08002050 <__NVIC_GetPriorityGrouping>:
  \brief   Get Priority Grouping
  \details Reads the priority grouping field from the NVIC Interrupt Controller.
  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
 */
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
 8002050:	b480      	push	{r7}
 8002052:	af00      	add	r7, sp, #0
  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 8002054:	4b04      	ldr	r3, [pc, #16]	; (8002068 <__NVIC_GetPriorityGrouping+0x18>)
 8002056:	68db      	ldr	r3, [r3, #12]
 8002058:	0a1b      	lsrs	r3, r3, #8
 800205a:	f003 0307 	and.w	r3, r3, #7
}
 800205e:	4618      	mov	r0, r3
 8002060:	46bd      	mov	sp, r7
 8002062:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002066:	4770      	bx	lr
 8002068:	e000ed00 	.word	0xe000ed00

0800206c <__NVIC_EnableIRQ>:
  \details Enables a device specific interrupt in the NVIC interrupt controller.
  \param [in]      IRQn  Device specific interrupt number.
  \note    IRQn must not be negative.
 */
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
 800206c:	b480      	push	{r7}
 800206e:	b083      	sub	sp, #12
 8002070:	af00      	add	r7, sp, #0
 8002072:	4603      	mov	r3, r0
 8002074:	71fb      	strb	r3, [r7, #7]
  if ((int32_t)(IRQn) >= 0)
 8002076:	f997 3007 	ldrsb.w	r3, [r7, #7]
 800207a:	2b00      	cmp	r3, #0
 800207c:	db0b      	blt.n	8002096 <__NVIC_EnableIRQ+0x2a>
  {
    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
 800207e:	79fb      	ldrb	r3, [r7, #7]
 8002080:	f003 021f 	and.w	r2, r3, #31
 8002084:	4907      	ldr	r1, [pc, #28]	; (80020a4 <__NVIC_EnableIRQ+0x38>)
 8002086:	f997 3007 	ldrsb.w	r3, [r7, #7]
 800208a:	095b      	lsrs	r3, r3, #5
 800208c:	2001      	movs	r0, #1
 800208e:	fa00 f202 	lsl.w	r2, r0, r2
 8002092:	f841 2023 	str.w	r2, [r1, r3, lsl #2]
  }
}
 8002096:	bf00      	nop
 8002098:	370c      	adds	r7, #12
 800209a:	46bd      	mov	sp, r7
 800209c:	f85d 7b04 	ldr.w	r7, [sp], #4
 80020a0:	4770      	bx	lr
 80020a2:	bf00      	nop
 80020a4:	e000e100 	.word	0xe000e100

080020a8 <__NVIC_SetPriority>:
  \param [in]      IRQn  Interrupt number.
  \param [in]  priority  Priority to set.
  \note    The priority cannot be set for every processor exception.
 */
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
 80020a8:	b480      	push	{r7}
 80020aa:	b083      	sub	sp, #12
 80020ac:	af00      	add	r7, sp, #0
 80020ae:	4603      	mov	r3, r0
 80020b0:	6039      	str	r1, [r7, #0]
 80020b2:	71fb      	strb	r3, [r7, #7]
  if ((int32_t)(IRQn) >= 0)
 80020b4:	f997 3007 	ldrsb.w	r3, [r7, #7]
 80020b8:	2b00      	cmp	r3, #0
 80020ba:	db0a      	blt.n	80020d2 <__NVIC_SetPriority+0x2a>
  {
    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80020bc:	683b      	ldr	r3, [r7, #0]
 80020be:	b2da      	uxtb	r2, r3
 80020c0:	490c      	ldr	r1, [pc, #48]	; (80020f4 <__NVIC_SetPriority+0x4c>)
 80020c2:	f997 3007 	ldrsb.w	r3, [r7, #7]
 80020c6:	0112      	lsls	r2, r2, #4
 80020c8:	b2d2      	uxtb	r2, r2
 80020ca:	440b      	add	r3, r1
 80020cc:	f883 2300 	strb.w	r2, [r3, #768]	; 0x300
  }
  else
  {
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
  }
}
 80020d0:	e00a      	b.n	80020e8 <__NVIC_SetPriority+0x40>
    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
 80020d2:	683b      	ldr	r3, [r7, #0]
 80020d4:	b2da      	uxtb	r2, r3
 80020d6:	4908      	ldr	r1, [pc, #32]	; (80020f8 <__NVIC_SetPriority+0x50>)
 80020d8:	79fb      	ldrb	r3, [r7, #7]
 80020da:	f003 030f 	and.w	r3, r3, #15
 80020de:	3b04      	subs	r3, #4
 80020e0:	0112      	lsls	r2, r2, #4
 80020e2:	b2d2      	uxtb	r2, r2
 80020e4:	440b      	add	r3, r1
 80020e6:	761a      	strb	r2, [r3, #24]
}
 80020e8:	bf00      	nop
 80020ea:	370c      	adds	r7, #12
 80020ec:	46bd      	mov	sp, r7
 80020ee:	f85d 7b04 	ldr.w	r7, [sp], #4
 80020f2:	4770      	bx	lr
 80020f4:	e000e100 	.word	0xe000e100
 80020f8:	e000ed00 	.word	0xe000ed00

080020fc <NVIC_EncodePriority>:
  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
  \param [in]       SubPriority  Subpriority value (starting from 0).
  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
 */
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
 80020fc:	b480      	push	{r7}
 80020fe:	b089      	sub	sp, #36	; 0x24
 8002100:	af00      	add	r7, sp, #0
 8002102:	60f8      	str	r0, [r7, #12]
 8002104:	60b9      	str	r1, [r7, #8]
 8002106:	607a      	str	r2, [r7, #4]
  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
 8002108:	68fb      	ldr	r3, [r7, #12]
 800210a:	f003 0307 	and.w	r3, r3, #7
 800210e:	61fb      	str	r3, [r7, #28]
  uint32_t PreemptPriorityBits;
  uint32_t SubPriorityBits;

  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
 8002110:	69fb      	ldr	r3, [r7, #28]
 8002112:	f1c3 0307 	rsb	r3, r3, #7
 8002116:	2b04      	cmp	r3, #4
 8002118:	bf28      	it	cs
 800211a:	2304      	movcs	r3, #4
 800211c:	61bb      	str	r3, [r7, #24]
  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 800211e:	69fb      	ldr	r3, [r7, #28]
 8002120:	3304      	adds	r3, #4
 8002122:	2b06      	cmp	r3, #6
 8002124:	d902      	bls.n	800212c <NVIC_EncodePriority+0x30>
 8002126:	69fb      	ldr	r3, [r7, #28]
 8002128:	3b03      	subs	r3, #3
 800212a:	e000      	b.n	800212e <NVIC_EncodePriority+0x32>
 800212c:	2300      	movs	r3, #0
 800212e:	617b      	str	r3, [r7, #20]

  return (
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8002130:	f04f 32ff 	mov.w	r2, #4294967295
 8002134:	69bb      	ldr	r3, [r7, #24]
 8002136:	fa02 f303 	lsl.w	r3, r2, r3
 800213a:	43da      	mvns	r2, r3
 800213c:	68bb      	ldr	r3, [r7, #8]
 800213e:	401a      	ands	r2, r3
 8002140:	697b      	ldr	r3, [r7, #20]
 8002142:	409a      	lsls	r2, r3
           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
 8002144:	f04f 31ff 	mov.w	r1, #4294967295
 8002148:	697b      	ldr	r3, [r7, #20]
 800214a:	fa01 f303 	lsl.w	r3, r1, r3
 800214e:	43d9      	mvns	r1, r3
 8002150:	687b      	ldr	r3, [r7, #4]
 8002152:	400b      	ands	r3, r1
           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
 8002154:	4313      	orrs	r3, r2
         );
}
 8002156:	4618      	mov	r0, r3
 8002158:	3724      	adds	r7, #36	; 0x24
 800215a:	46bd      	mov	sp, r7
 800215c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002160:	4770      	bx	lr
	...

08002164 <SysTick_Config>:
  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
           must contain a vendor-specific implementation of this function.
 */
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
 8002164:	b580      	push	{r7, lr}
 8002166:	b082      	sub	sp, #8
 8002168:	af00      	add	r7, sp, #0
 800216a:	6078      	str	r0, [r7, #4]
  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
 800216c:	687b      	ldr	r3, [r7, #4]
 800216e:	3b01      	subs	r3, #1
 8002170:	f1b3 7f80 	cmp.w	r3, #16777216	; 0x1000000
 8002174:	d301      	bcc.n	800217a <SysTick_Config+0x16>
  {
    return (1UL);                                                   /* Reload value impossible */
 8002176:	2301      	movs	r3, #1
 8002178:	e00f      	b.n	800219a <SysTick_Config+0x36>
  }

  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
 800217a:	4a0a      	ldr	r2, [pc, #40]	; (80021a4 <SysTick_Config+0x40>)
 800217c:	687b      	ldr	r3, [r7, #4]
 800217e:	3b01      	subs	r3, #1
 8002180:	6053      	str	r3, [r2, #4]
  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
 8002182:	210f      	movs	r1, #15
 8002184:	f04f 30ff 	mov.w	r0, #4294967295
 8002188:	f7ff ff8e 	bl	80020a8 <__NVIC_SetPriority>
  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
 800218c:	4b05      	ldr	r3, [pc, #20]	; (80021a4 <SysTick_Config+0x40>)
 800218e:	2200      	movs	r2, #0
 8002190:	609a      	str	r2, [r3, #8]
  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
 8002192:	4b04      	ldr	r3, [pc, #16]	; (80021a4 <SysTick_Config+0x40>)
 8002194:	2207      	movs	r2, #7
 8002196:	601a      	str	r2, [r3, #0]
                   SysTick_CTRL_TICKINT_Msk   |
                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
  return (0UL);                                                     /* Function successful */
 8002198:	2300      	movs	r3, #0
}
 800219a:	4618      	mov	r0, r3
 800219c:	3708      	adds	r7, #8
 800219e:	46bd      	mov	sp, r7
 80021a0:	bd80      	pop	{r7, pc}
 80021a2:	bf00      	nop
 80021a4:	e000e010 	.word	0xe000e010

080021a8 <HAL_NVIC_SetPriorityGrouping>:
  * @note   When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. 
  *         The pending IRQ priority will be managed only by the subpriority. 
  * @retval None
  */
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
 80021a8:	b580      	push	{r7, lr}
 80021aa:	b082      	sub	sp, #8
 80021ac:	af00      	add	r7, sp, #0
 80021ae:	6078      	str	r0, [r7, #4]
  /* Check the parameters */
  assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
  
  /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
  NVIC_SetPriorityGrouping(PriorityGroup);
 80021b0:	6878      	ldr	r0, [r7, #4]
 80021b2:	f7ff ff29 	bl	8002008 <__NVIC_SetPriorityGrouping>
}
 80021b6:	bf00      	nop
 80021b8:	3708      	adds	r7, #8
 80021ba:	46bd      	mov	sp, r7
 80021bc:	bd80      	pop	{r7, pc}

080021be <HAL_NVIC_SetPriority>:
  *         This parameter can be a value between 0 and 15
  *         A lower priority value indicates a higher priority.          
  * @retval None
  */
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{ 
 80021be:	b580      	push	{r7, lr}
 80021c0:	b086      	sub	sp, #24
 80021c2:	af00      	add	r7, sp, #0
 80021c4:	4603      	mov	r3, r0
 80021c6:	60b9      	str	r1, [r7, #8]
 80021c8:	607a      	str	r2, [r7, #4]
 80021ca:	73fb      	strb	r3, [r7, #15]
  uint32_t prioritygroup = 0x00U;
 80021cc:	2300      	movs	r3, #0
 80021ce:	617b      	str	r3, [r7, #20]
  
  /* Check the parameters */
  assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
  assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
  
  prioritygroup = NVIC_GetPriorityGrouping();
 80021d0:	f7ff ff3e 	bl	8002050 <__NVIC_GetPriorityGrouping>
 80021d4:	6178      	str	r0, [r7, #20]
  
  NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
 80021d6:	687a      	ldr	r2, [r7, #4]
 80021d8:	68b9      	ldr	r1, [r7, #8]
 80021da:	6978      	ldr	r0, [r7, #20]
 80021dc:	f7ff ff8e 	bl	80020fc <NVIC_EncodePriority>
 80021e0:	4602      	mov	r2, r0
 80021e2:	f997 300f 	ldrsb.w	r3, [r7, #15]
 80021e6:	4611      	mov	r1, r2
 80021e8:	4618      	mov	r0, r3
 80021ea:	f7ff ff5d 	bl	80020a8 <__NVIC_SetPriority>
}
 80021ee:	bf00      	nop
 80021f0:	3718      	adds	r7, #24
 80021f2:	46bd      	mov	sp, r7
 80021f4:	bd80      	pop	{r7, pc}

080021f6 <HAL_NVIC_EnableIRQ>:
  *         This parameter can be an enumerator of IRQn_Type enumeration
  *         (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
  * @retval None
  */
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
 80021f6:	b580      	push	{r7, lr}
 80021f8:	b082      	sub	sp, #8
 80021fa:	af00      	add	r7, sp, #0
 80021fc:	4603      	mov	r3, r0
 80021fe:	71fb      	strb	r3, [r7, #7]
  /* Check the parameters */
  assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
  
  /* Enable interrupt */
  NVIC_EnableIRQ(IRQn);
 8002200:	f997 3007 	ldrsb.w	r3, [r7, #7]
 8002204:	4618      	mov	r0, r3
 8002206:	f7ff ff31 	bl	800206c <__NVIC_EnableIRQ>
}
 800220a:	bf00      	nop
 800220c:	3708      	adds	r7, #8
 800220e:	46bd      	mov	sp, r7
 8002210:	bd80      	pop	{r7, pc}

08002212 <HAL_SYSTICK_Config>:
  * @param  TicksNumb Specifies the ticks Number of ticks between two interrupts.
  * @retval status:  - 0  Function succeeded.
  *                  - 1  Function failed.
  */
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
 8002212:	b580      	push	{r7, lr}
 8002214:	b082      	sub	sp, #8
 8002216:	af00      	add	r7, sp, #0
 8002218:	6078      	str	r0, [r7, #4]
   return SysTick_Config(TicksNumb);
 800221a:	6878      	ldr	r0, [r7, #4]
 800221c:	f7ff ffa2 	bl	8002164 <SysTick_Config>
 8002220:	4603      	mov	r3, r0
}
 8002222:	4618      	mov	r0, r3
 8002224:	3708      	adds	r7, #8
 8002226:	46bd      	mov	sp, r7
 8002228:	bd80      	pop	{r7, pc}
	...

0800222c <HAL_GPIO_Init>:
  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
  *         the configuration information for the specified GPIO peripheral.
  * @retval None
  */
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
 800222c:	b480      	push	{r7}
 800222e:	b089      	sub	sp, #36	; 0x24
 8002230:	af00      	add	r7, sp, #0
 8002232:	6078      	str	r0, [r7, #4]
 8002234:	6039      	str	r1, [r7, #0]
  uint32_t position;
  uint32_t ioposition = 0x00U;
 8002236:	2300      	movs	r3, #0
 8002238:	617b      	str	r3, [r7, #20]
  uint32_t iocurrent = 0x00U;
 800223a:	2300      	movs	r3, #0
 800223c:	613b      	str	r3, [r7, #16]
  uint32_t temp = 0x00U;
 800223e:	2300      	movs	r3, #0
 8002240:	61bb      	str	r3, [r7, #24]
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
  assert_param(IS_GPIO_PULL(GPIO_Init->Pull));

  /* Configure the port pins */
  for(position = 0U; position < GPIO_NUMBER; position++)
 8002242:	2300      	movs	r3, #0
 8002244:	61fb      	str	r3, [r7, #28]
 8002246:	e159      	b.n	80024fc <HAL_GPIO_Init+0x2d0>
  {
    /* Get the IO position */
    ioposition = 0x01U << position;
 8002248:	2201      	movs	r2, #1
 800224a:	69fb      	ldr	r3, [r7, #28]
 800224c:	fa02 f303 	lsl.w	r3, r2, r3
 8002250:	617b      	str	r3, [r7, #20]
    /* Get the current IO position */
    iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
 8002252:	683b      	ldr	r3, [r7, #0]
 8002254:	681b      	ldr	r3, [r3, #0]
 8002256:	697a      	ldr	r2, [r7, #20]
 8002258:	4013      	ands	r3, r2
 800225a:	613b      	str	r3, [r7, #16]

    if(iocurrent == ioposition)
 800225c:	693a      	ldr	r2, [r7, #16]
 800225e:	697b      	ldr	r3, [r7, #20]
 8002260:	429a      	cmp	r2, r3
 8002262:	f040 8148 	bne.w	80024f6 <HAL_GPIO_Init+0x2ca>
    {
      /*--------------------- GPIO Mode Configuration ------------------------*/
      /* In case of Output or Alternate function mode selection */
      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
 8002266:	683b      	ldr	r3, [r7, #0]
 8002268:	685b      	ldr	r3, [r3, #4]
 800226a:	2b01      	cmp	r3, #1
 800226c:	d00b      	beq.n	8002286 <HAL_GPIO_Init+0x5a>
 800226e:	683b      	ldr	r3, [r7, #0]
 8002270:	685b      	ldr	r3, [r3, #4]
 8002272:	2b02      	cmp	r3, #2
 8002274:	d007      	beq.n	8002286 <HAL_GPIO_Init+0x5a>
         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
 8002276:	683b      	ldr	r3, [r7, #0]
 8002278:	685b      	ldr	r3, [r3, #4]
      if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
 800227a:	2b11      	cmp	r3, #17
 800227c:	d003      	beq.n	8002286 <HAL_GPIO_Init+0x5a>
         (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
 800227e:	683b      	ldr	r3, [r7, #0]
 8002280:	685b      	ldr	r3, [r3, #4]
 8002282:	2b12      	cmp	r3, #18
 8002284:	d130      	bne.n	80022e8 <HAL_GPIO_Init+0xbc>
      {
        /* Check the Speed parameter */
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
        /* Configure the IO Speed */
        temp = GPIOx->OSPEEDR; 
 8002286:	687b      	ldr	r3, [r7, #4]
 8002288:	689b      	ldr	r3, [r3, #8]
 800228a:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
 800228c:	69fb      	ldr	r3, [r7, #28]
 800228e:	005b      	lsls	r3, r3, #1
 8002290:	2203      	movs	r2, #3
 8002292:	fa02 f303 	lsl.w	r3, r2, r3
 8002296:	43db      	mvns	r3, r3
 8002298:	69ba      	ldr	r2, [r7, #24]
 800229a:	4013      	ands	r3, r2
 800229c:	61bb      	str	r3, [r7, #24]
        temp |= (GPIO_Init->Speed << (position * 2U));
 800229e:	683b      	ldr	r3, [r7, #0]
 80022a0:	68da      	ldr	r2, [r3, #12]
 80022a2:	69fb      	ldr	r3, [r7, #28]
 80022a4:	005b      	lsls	r3, r3, #1
 80022a6:	fa02 f303 	lsl.w	r3, r2, r3
 80022aa:	69ba      	ldr	r2, [r7, #24]
 80022ac:	4313      	orrs	r3, r2
 80022ae:	61bb      	str	r3, [r7, #24]
        GPIOx->OSPEEDR = temp;
 80022b0:	687b      	ldr	r3, [r7, #4]
 80022b2:	69ba      	ldr	r2, [r7, #24]
 80022b4:	609a      	str	r2, [r3, #8]

        /* Configure the IO Output Type */
        temp = GPIOx->OTYPER;
 80022b6:	687b      	ldr	r3, [r7, #4]
 80022b8:	685b      	ldr	r3, [r3, #4]
 80022ba:	61bb      	str	r3, [r7, #24]
        temp &= ~(GPIO_OTYPER_OT_0 << position) ;
 80022bc:	2201      	movs	r2, #1
 80022be:	69fb      	ldr	r3, [r7, #28]
 80022c0:	fa02 f303 	lsl.w	r3, r2, r3
 80022c4:	43db      	mvns	r3, r3
 80022c6:	69ba      	ldr	r2, [r7, #24]
 80022c8:	4013      	ands	r3, r2
 80022ca:	61bb      	str	r3, [r7, #24]
        temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
 80022cc:	683b      	ldr	r3, [r7, #0]
 80022ce:	685b      	ldr	r3, [r3, #4]
 80022d0:	091b      	lsrs	r3, r3, #4
 80022d2:	f003 0201 	and.w	r2, r3, #1
 80022d6:	69fb      	ldr	r3, [r7, #28]
 80022d8:	fa02 f303 	lsl.w	r3, r2, r3
 80022dc:	69ba      	ldr	r2, [r7, #24]
 80022de:	4313      	orrs	r3, r2
 80022e0:	61bb      	str	r3, [r7, #24]
        GPIOx->OTYPER = temp;
 80022e2:	687b      	ldr	r3, [r7, #4]
 80022e4:	69ba      	ldr	r2, [r7, #24]
 80022e6:	605a      	str	r2, [r3, #4]
       }

      /* Activate the Pull-up or Pull down resistor for the current IO */
      temp = GPIOx->PUPDR;
 80022e8:	687b      	ldr	r3, [r7, #4]
 80022ea:	68db      	ldr	r3, [r3, #12]
 80022ec:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
 80022ee:	69fb      	ldr	r3, [r7, #28]
 80022f0:	005b      	lsls	r3, r3, #1
 80022f2:	2203      	movs	r2, #3
 80022f4:	fa02 f303 	lsl.w	r3, r2, r3
 80022f8:	43db      	mvns	r3, r3
 80022fa:	69ba      	ldr	r2, [r7, #24]
 80022fc:	4013      	ands	r3, r2
 80022fe:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Pull) << (position * 2U));
 8002300:	683b      	ldr	r3, [r7, #0]
 8002302:	689a      	ldr	r2, [r3, #8]
 8002304:	69fb      	ldr	r3, [r7, #28]
 8002306:	005b      	lsls	r3, r3, #1
 8002308:	fa02 f303 	lsl.w	r3, r2, r3
 800230c:	69ba      	ldr	r2, [r7, #24]
 800230e:	4313      	orrs	r3, r2
 8002310:	61bb      	str	r3, [r7, #24]
      GPIOx->PUPDR = temp;
 8002312:	687b      	ldr	r3, [r7, #4]
 8002314:	69ba      	ldr	r2, [r7, #24]
 8002316:	60da      	str	r2, [r3, #12]

      /* In case of Alternate function mode selection */
      if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
 8002318:	683b      	ldr	r3, [r7, #0]
 800231a:	685b      	ldr	r3, [r3, #4]
 800231c:	2b02      	cmp	r3, #2
 800231e:	d003      	beq.n	8002328 <HAL_GPIO_Init+0xfc>
 8002320:	683b      	ldr	r3, [r7, #0]
 8002322:	685b      	ldr	r3, [r3, #4]
 8002324:	2b12      	cmp	r3, #18
 8002326:	d123      	bne.n	8002370 <HAL_GPIO_Init+0x144>
      {
        /* Check the Alternate function parameter */
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
        /* Configure Alternate function mapped with the current IO */
        temp = GPIOx->AFR[position >> 3U];
 8002328:	69fb      	ldr	r3, [r7, #28]
 800232a:	08da      	lsrs	r2, r3, #3
 800232c:	687b      	ldr	r3, [r7, #4]
 800232e:	3208      	adds	r2, #8
 8002330:	f853 3022 	ldr.w	r3, [r3, r2, lsl #2]
 8002334:	61bb      	str	r3, [r7, #24]
        temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
 8002336:	69fb      	ldr	r3, [r7, #28]
 8002338:	f003 0307 	and.w	r3, r3, #7
 800233c:	009b      	lsls	r3, r3, #2
 800233e:	220f      	movs	r2, #15
 8002340:	fa02 f303 	lsl.w	r3, r2, r3
 8002344:	43db      	mvns	r3, r3
 8002346:	69ba      	ldr	r2, [r7, #24]
 8002348:	4013      	ands	r3, r2
 800234a:	61bb      	str	r3, [r7, #24]
        temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
 800234c:	683b      	ldr	r3, [r7, #0]
 800234e:	691a      	ldr	r2, [r3, #16]
 8002350:	69fb      	ldr	r3, [r7, #28]
 8002352:	f003 0307 	and.w	r3, r3, #7
 8002356:	009b      	lsls	r3, r3, #2
 8002358:	fa02 f303 	lsl.w	r3, r2, r3
 800235c:	69ba      	ldr	r2, [r7, #24]
 800235e:	4313      	orrs	r3, r2
 8002360:	61bb      	str	r3, [r7, #24]
        GPIOx->AFR[position >> 3U] = temp;
 8002362:	69fb      	ldr	r3, [r7, #28]
 8002364:	08da      	lsrs	r2, r3, #3
 8002366:	687b      	ldr	r3, [r7, #4]
 8002368:	3208      	adds	r2, #8
 800236a:	69b9      	ldr	r1, [r7, #24]
 800236c:	f843 1022 	str.w	r1, [r3, r2, lsl #2]
      }

      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
      temp = GPIOx->MODER;
 8002370:	687b      	ldr	r3, [r7, #4]
 8002372:	681b      	ldr	r3, [r3, #0]
 8002374:	61bb      	str	r3, [r7, #24]
      temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
 8002376:	69fb      	ldr	r3, [r7, #28]
 8002378:	005b      	lsls	r3, r3, #1
 800237a:	2203      	movs	r2, #3
 800237c:	fa02 f303 	lsl.w	r3, r2, r3
 8002380:	43db      	mvns	r3, r3
 8002382:	69ba      	ldr	r2, [r7, #24]
 8002384:	4013      	ands	r3, r2
 8002386:	61bb      	str	r3, [r7, #24]
      temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
 8002388:	683b      	ldr	r3, [r7, #0]
 800238a:	685b      	ldr	r3, [r3, #4]
 800238c:	f003 0203 	and.w	r2, r3, #3
 8002390:	69fb      	ldr	r3, [r7, #28]
 8002392:	005b      	lsls	r3, r3, #1
 8002394:	fa02 f303 	lsl.w	r3, r2, r3
 8002398:	69ba      	ldr	r2, [r7, #24]
 800239a:	4313      	orrs	r3, r2
 800239c:	61bb      	str	r3, [r7, #24]
      GPIOx->MODER = temp;
 800239e:	687b      	ldr	r3, [r7, #4]
 80023a0:	69ba      	ldr	r2, [r7, #24]
 80023a2:	601a      	str	r2, [r3, #0]

      /*--------------------- EXTI Mode Configuration ------------------------*/
      /* Configure the External Interrupt or event for the current IO */
      if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
 80023a4:	683b      	ldr	r3, [r7, #0]
 80023a6:	685b      	ldr	r3, [r3, #4]
 80023a8:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80023ac:	2b00      	cmp	r3, #0
 80023ae:	f000 80a2 	beq.w	80024f6 <HAL_GPIO_Init+0x2ca>
      {
        /* Enable SYSCFG Clock */
        __HAL_RCC_SYSCFG_CLK_ENABLE();
 80023b2:	2300      	movs	r3, #0
 80023b4:	60fb      	str	r3, [r7, #12]
 80023b6:	4b56      	ldr	r3, [pc, #344]	; (8002510 <HAL_GPIO_Init+0x2e4>)
 80023b8:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 80023ba:	4a55      	ldr	r2, [pc, #340]	; (8002510 <HAL_GPIO_Init+0x2e4>)
 80023bc:	f443 4380 	orr.w	r3, r3, #16384	; 0x4000
 80023c0:	6453      	str	r3, [r2, #68]	; 0x44
 80023c2:	4b53      	ldr	r3, [pc, #332]	; (8002510 <HAL_GPIO_Init+0x2e4>)
 80023c4:	6c5b      	ldr	r3, [r3, #68]	; 0x44
 80023c6:	f403 4380 	and.w	r3, r3, #16384	; 0x4000
 80023ca:	60fb      	str	r3, [r7, #12]
 80023cc:	68fb      	ldr	r3, [r7, #12]

        temp = SYSCFG->EXTICR[position >> 2U];
 80023ce:	4a51      	ldr	r2, [pc, #324]	; (8002514 <HAL_GPIO_Init+0x2e8>)
 80023d0:	69fb      	ldr	r3, [r7, #28]
 80023d2:	089b      	lsrs	r3, r3, #2
 80023d4:	3302      	adds	r3, #2
 80023d6:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 80023da:	61bb      	str	r3, [r7, #24]
        temp &= ~(0x0FU << (4U * (position & 0x03U)));
 80023dc:	69fb      	ldr	r3, [r7, #28]
 80023de:	f003 0303 	and.w	r3, r3, #3
 80023e2:	009b      	lsls	r3, r3, #2
 80023e4:	220f      	movs	r2, #15
 80023e6:	fa02 f303 	lsl.w	r3, r2, r3
 80023ea:	43db      	mvns	r3, r3
 80023ec:	69ba      	ldr	r2, [r7, #24]
 80023ee:	4013      	ands	r3, r2
 80023f0:	61bb      	str	r3, [r7, #24]
        temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
 80023f2:	687b      	ldr	r3, [r7, #4]
 80023f4:	4a48      	ldr	r2, [pc, #288]	; (8002518 <HAL_GPIO_Init+0x2ec>)
 80023f6:	4293      	cmp	r3, r2
 80023f8:	d019      	beq.n	800242e <HAL_GPIO_Init+0x202>
 80023fa:	687b      	ldr	r3, [r7, #4]
 80023fc:	4a47      	ldr	r2, [pc, #284]	; (800251c <HAL_GPIO_Init+0x2f0>)
 80023fe:	4293      	cmp	r3, r2
 8002400:	d013      	beq.n	800242a <HAL_GPIO_Init+0x1fe>
 8002402:	687b      	ldr	r3, [r7, #4]
 8002404:	4a46      	ldr	r2, [pc, #280]	; (8002520 <HAL_GPIO_Init+0x2f4>)
 8002406:	4293      	cmp	r3, r2
 8002408:	d00d      	beq.n	8002426 <HAL_GPIO_Init+0x1fa>
 800240a:	687b      	ldr	r3, [r7, #4]
 800240c:	4a45      	ldr	r2, [pc, #276]	; (8002524 <HAL_GPIO_Init+0x2f8>)
 800240e:	4293      	cmp	r3, r2
 8002410:	d007      	beq.n	8002422 <HAL_GPIO_Init+0x1f6>
 8002412:	687b      	ldr	r3, [r7, #4]
 8002414:	4a44      	ldr	r2, [pc, #272]	; (8002528 <HAL_GPIO_Init+0x2fc>)
 8002416:	4293      	cmp	r3, r2
 8002418:	d101      	bne.n	800241e <HAL_GPIO_Init+0x1f2>
 800241a:	2304      	movs	r3, #4
 800241c:	e008      	b.n	8002430 <HAL_GPIO_Init+0x204>
 800241e:	2307      	movs	r3, #7
 8002420:	e006      	b.n	8002430 <HAL_GPIO_Init+0x204>
 8002422:	2303      	movs	r3, #3
 8002424:	e004      	b.n	8002430 <HAL_GPIO_Init+0x204>
 8002426:	2302      	movs	r3, #2
 8002428:	e002      	b.n	8002430 <HAL_GPIO_Init+0x204>
 800242a:	2301      	movs	r3, #1
 800242c:	e000      	b.n	8002430 <HAL_GPIO_Init+0x204>
 800242e:	2300      	movs	r3, #0
 8002430:	69fa      	ldr	r2, [r7, #28]
 8002432:	f002 0203 	and.w	r2, r2, #3
 8002436:	0092      	lsls	r2, r2, #2
 8002438:	4093      	lsls	r3, r2
 800243a:	69ba      	ldr	r2, [r7, #24]
 800243c:	4313      	orrs	r3, r2
 800243e:	61bb      	str	r3, [r7, #24]
        SYSCFG->EXTICR[position >> 2U] = temp;
 8002440:	4934      	ldr	r1, [pc, #208]	; (8002514 <HAL_GPIO_Init+0x2e8>)
 8002442:	69fb      	ldr	r3, [r7, #28]
 8002444:	089b      	lsrs	r3, r3, #2
 8002446:	3302      	adds	r3, #2
 8002448:	69ba      	ldr	r2, [r7, #24]
 800244a:	f841 2023 	str.w	r2, [r1, r3, lsl #2]

        /* Clear EXTI line configuration */
        temp = EXTI->IMR;
 800244e:	4b37      	ldr	r3, [pc, #220]	; (800252c <HAL_GPIO_Init+0x300>)
 8002450:	681b      	ldr	r3, [r3, #0]
 8002452:	61bb      	str	r3, [r7, #24]
        temp &= ~((uint32_t)iocurrent);
 8002454:	693b      	ldr	r3, [r7, #16]
 8002456:	43db      	mvns	r3, r3
 8002458:	69ba      	ldr	r2, [r7, #24]
 800245a:	4013      	ands	r3, r2
 800245c:	61bb      	str	r3, [r7, #24]
        if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
 800245e:	683b      	ldr	r3, [r7, #0]
 8002460:	685b      	ldr	r3, [r3, #4]
 8002462:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
 8002466:	2b00      	cmp	r3, #0
 8002468:	d003      	beq.n	8002472 <HAL_GPIO_Init+0x246>
        {
          temp |= iocurrent;
 800246a:	69ba      	ldr	r2, [r7, #24]
 800246c:	693b      	ldr	r3, [r7, #16]
 800246e:	4313      	orrs	r3, r2
 8002470:	61bb      	str	r3, [r7, #24]
        }
        EXTI->IMR = temp;
 8002472:	4a2e      	ldr	r2, [pc, #184]	; (800252c <HAL_GPIO_Init+0x300>)
 8002474:	69bb      	ldr	r3, [r7, #24]
 8002476:	6013      	str	r3, [r2, #0]

        temp = EXTI->EMR;
 8002478:	4b2c      	ldr	r3, [pc, #176]	; (800252c <HAL_GPIO_Init+0x300>)
 800247a:	685b      	ldr	r3, [r3, #4]
 800247c:	61bb      	str	r3, [r7, #24]
        temp &= ~((uint32_t)iocurrent);
 800247e:	693b      	ldr	r3, [r7, #16]
 8002480:	43db      	mvns	r3, r3
 8002482:	69ba      	ldr	r2, [r7, #24]
 8002484:	4013      	ands	r3, r2
 8002486:	61bb      	str	r3, [r7, #24]
        if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
 8002488:	683b      	ldr	r3, [r7, #0]
 800248a:	685b      	ldr	r3, [r3, #4]
 800248c:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
 8002490:	2b00      	cmp	r3, #0
 8002492:	d003      	beq.n	800249c <HAL_GPIO_Init+0x270>
        {
          temp |= iocurrent;
 8002494:	69ba      	ldr	r2, [r7, #24]
 8002496:	693b      	ldr	r3, [r7, #16]
 8002498:	4313      	orrs	r3, r2
 800249a:	61bb      	str	r3, [r7, #24]
        }
        EXTI->EMR = temp;
 800249c:	4a23      	ldr	r2, [pc, #140]	; (800252c <HAL_GPIO_Init+0x300>)
 800249e:	69bb      	ldr	r3, [r7, #24]
 80024a0:	6053      	str	r3, [r2, #4]

        /* Clear Rising Falling edge configuration */
        temp = EXTI->RTSR;
 80024a2:	4b22      	ldr	r3, [pc, #136]	; (800252c <HAL_GPIO_Init+0x300>)
 80024a4:	689b      	ldr	r3, [r3, #8]
 80024a6:	61bb      	str	r3, [r7, #24]
        temp &= ~((uint32_t)iocurrent);
 80024a8:	693b      	ldr	r3, [r7, #16]
 80024aa:	43db      	mvns	r3, r3
 80024ac:	69ba      	ldr	r2, [r7, #24]
 80024ae:	4013      	ands	r3, r2
 80024b0:	61bb      	str	r3, [r7, #24]
        if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
 80024b2:	683b      	ldr	r3, [r7, #0]
 80024b4:	685b      	ldr	r3, [r3, #4]
 80024b6:	f403 1380 	and.w	r3, r3, #1048576	; 0x100000
 80024ba:	2b00      	cmp	r3, #0
 80024bc:	d003      	beq.n	80024c6 <HAL_GPIO_Init+0x29a>
        {
          temp |= iocurrent;
 80024be:	69ba      	ldr	r2, [r7, #24]
 80024c0:	693b      	ldr	r3, [r7, #16]
 80024c2:	4313      	orrs	r3, r2
 80024c4:	61bb      	str	r3, [r7, #24]
        }
        EXTI->RTSR = temp;
 80024c6:	4a19      	ldr	r2, [pc, #100]	; (800252c <HAL_GPIO_Init+0x300>)
 80024c8:	69bb      	ldr	r3, [r7, #24]
 80024ca:	6093      	str	r3, [r2, #8]

        temp = EXTI->FTSR;
 80024cc:	4b17      	ldr	r3, [pc, #92]	; (800252c <HAL_GPIO_Init+0x300>)
 80024ce:	68db      	ldr	r3, [r3, #12]
 80024d0:	61bb      	str	r3, [r7, #24]
        temp &= ~((uint32_t)iocurrent);
 80024d2:	693b      	ldr	r3, [r7, #16]
 80024d4:	43db      	mvns	r3, r3
 80024d6:	69ba      	ldr	r2, [r7, #24]
 80024d8:	4013      	ands	r3, r2
 80024da:	61bb      	str	r3, [r7, #24]
        if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
 80024dc:	683b      	ldr	r3, [r7, #0]
 80024de:	685b      	ldr	r3, [r3, #4]
 80024e0:	f403 1300 	and.w	r3, r3, #2097152	; 0x200000
 80024e4:	2b00      	cmp	r3, #0
 80024e6:	d003      	beq.n	80024f0 <HAL_GPIO_Init+0x2c4>
        {
          temp |= iocurrent;
 80024e8:	69ba      	ldr	r2, [r7, #24]
 80024ea:	693b      	ldr	r3, [r7, #16]
 80024ec:	4313      	orrs	r3, r2
 80024ee:	61bb      	str	r3, [r7, #24]
        }
        EXTI->FTSR = temp;
 80024f0:	4a0e      	ldr	r2, [pc, #56]	; (800252c <HAL_GPIO_Init+0x300>)
 80024f2:	69bb      	ldr	r3, [r7, #24]
 80024f4:	60d3      	str	r3, [r2, #12]
  for(position = 0U; position < GPIO_NUMBER; position++)
 80024f6:	69fb      	ldr	r3, [r7, #28]
 80024f8:	3301      	adds	r3, #1
 80024fa:	61fb      	str	r3, [r7, #28]
 80024fc:	69fb      	ldr	r3, [r7, #28]
 80024fe:	2b0f      	cmp	r3, #15
 8002500:	f67f aea2 	bls.w	8002248 <HAL_GPIO_Init+0x1c>
      }
    }
  }
}
 8002504:	bf00      	nop
 8002506:	3724      	adds	r7, #36	; 0x24
 8002508:	46bd      	mov	sp, r7
 800250a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800250e:	4770      	bx	lr
 8002510:	40023800 	.word	0x40023800
 8002514:	40013800 	.word	0x40013800
 8002518:	40020000 	.word	0x40020000
 800251c:	40020400 	.word	0x40020400
 8002520:	40020800 	.word	0x40020800
 8002524:	40020c00 	.word	0x40020c00
 8002528:	40021000 	.word	0x40021000
 800252c:	40013c00 	.word	0x40013c00

08002530 <HAL_GPIO_WritePin>:
  *            @arg GPIO_PIN_RESET: to clear the port pin
  *            @arg GPIO_PIN_SET: to set the port pin
  * @retval None
  */
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
 8002530:	b480      	push	{r7}
 8002532:	b083      	sub	sp, #12
 8002534:	af00      	add	r7, sp, #0
 8002536:	6078      	str	r0, [r7, #4]
 8002538:	460b      	mov	r3, r1
 800253a:	807b      	strh	r3, [r7, #2]
 800253c:	4613      	mov	r3, r2
 800253e:	707b      	strb	r3, [r7, #1]
  /* Check the parameters */
  assert_param(IS_GPIO_PIN(GPIO_Pin));
  assert_param(IS_GPIO_PIN_ACTION(PinState));

  if(PinState != GPIO_PIN_RESET)
 8002540:	787b      	ldrb	r3, [r7, #1]
 8002542:	2b00      	cmp	r3, #0
 8002544:	d003      	beq.n	800254e <HAL_GPIO_WritePin+0x1e>
  {
    GPIOx->BSRR = GPIO_Pin;
 8002546:	887a      	ldrh	r2, [r7, #2]
 8002548:	687b      	ldr	r3, [r7, #4]
 800254a:	619a      	str	r2, [r3, #24]
  }
  else
  {
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
  }
}
 800254c:	e003      	b.n	8002556 <HAL_GPIO_WritePin+0x26>
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
 800254e:	887b      	ldrh	r3, [r7, #2]
 8002550:	041a      	lsls	r2, r3, #16
 8002552:	687b      	ldr	r3, [r7, #4]
 8002554:	619a      	str	r2, [r3, #24]
}
 8002556:	bf00      	nop
 8002558:	370c      	adds	r7, #12
 800255a:	46bd      	mov	sp, r7
 800255c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002560:	4770      	bx	lr
	...

08002564 <HAL_RCC_OscConfig>:
  *         supported by this API. User should request a transition to HSE Off
  *         first and then HSE On or HSE Bypass.
  * @retval HAL status
  */
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
{
 8002564:	b580      	push	{r7, lr}
 8002566:	b086      	sub	sp, #24
 8002568:	af00      	add	r7, sp, #0
 800256a:	6078      	str	r0, [r7, #4]
  uint32_t tickstart, pll_config;

  /* Check Null pointer */
  if(RCC_OscInitStruct == NULL)
 800256c:	687b      	ldr	r3, [r7, #4]
 800256e:	2b00      	cmp	r3, #0
 8002570:	d101      	bne.n	8002576 <HAL_RCC_OscConfig+0x12>
  {
    return HAL_ERROR;
 8002572:	2301      	movs	r3, #1
 8002574:	e25b      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
  }

  /* Check the parameters */
  assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
  /*------------------------------- HSE Configuration ------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 8002576:	687b      	ldr	r3, [r7, #4]
 8002578:	681b      	ldr	r3, [r3, #0]
 800257a:	f003 0301 	and.w	r3, r3, #1
 800257e:	2b00      	cmp	r3, #0
 8002580:	d075      	beq.n	800266e <HAL_RCC_OscConfig+0x10a>
  {
    /* Check the parameters */
    assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
    /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
 8002582:	4ba3      	ldr	r3, [pc, #652]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002584:	689b      	ldr	r3, [r3, #8]
 8002586:	f003 030c 	and.w	r3, r3, #12
 800258a:	2b04      	cmp	r3, #4
 800258c:	d00c      	beq.n	80025a8 <HAL_RCC_OscConfig+0x44>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
 800258e:	4ba0      	ldr	r3, [pc, #640]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002590:	689b      	ldr	r3, [r3, #8]
 8002592:	f003 030c 	and.w	r3, r3, #12
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
 8002596:	2b08      	cmp	r3, #8
 8002598:	d112      	bne.n	80025c0 <HAL_RCC_OscConfig+0x5c>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
 800259a:	4b9d      	ldr	r3, [pc, #628]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 800259c:	685b      	ldr	r3, [r3, #4]
 800259e:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
 80025a2:	f5b3 0f80 	cmp.w	r3, #4194304	; 0x400000
 80025a6:	d10b      	bne.n	80025c0 <HAL_RCC_OscConfig+0x5c>
    {
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 80025a8:	4b99      	ldr	r3, [pc, #612]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025aa:	681b      	ldr	r3, [r3, #0]
 80025ac:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
 80025b0:	2b00      	cmp	r3, #0
 80025b2:	d05b      	beq.n	800266c <HAL_RCC_OscConfig+0x108>
 80025b4:	687b      	ldr	r3, [r7, #4]
 80025b6:	685b      	ldr	r3, [r3, #4]
 80025b8:	2b00      	cmp	r3, #0
 80025ba:	d157      	bne.n	800266c <HAL_RCC_OscConfig+0x108>
      {
        return HAL_ERROR;
 80025bc:	2301      	movs	r3, #1
 80025be:	e236      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      }
    }
    else
    {
      /* Set the new HSE configuration ---------------------------------------*/
      __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 80025c0:	687b      	ldr	r3, [r7, #4]
 80025c2:	685b      	ldr	r3, [r3, #4]
 80025c4:	f5b3 3f80 	cmp.w	r3, #65536	; 0x10000
 80025c8:	d106      	bne.n	80025d8 <HAL_RCC_OscConfig+0x74>
 80025ca:	4b91      	ldr	r3, [pc, #580]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025cc:	681b      	ldr	r3, [r3, #0]
 80025ce:	4a90      	ldr	r2, [pc, #576]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025d0:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 80025d4:	6013      	str	r3, [r2, #0]
 80025d6:	e01d      	b.n	8002614 <HAL_RCC_OscConfig+0xb0>
 80025d8:	687b      	ldr	r3, [r7, #4]
 80025da:	685b      	ldr	r3, [r3, #4]
 80025dc:	f5b3 2fa0 	cmp.w	r3, #327680	; 0x50000
 80025e0:	d10c      	bne.n	80025fc <HAL_RCC_OscConfig+0x98>
 80025e2:	4b8b      	ldr	r3, [pc, #556]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025e4:	681b      	ldr	r3, [r3, #0]
 80025e6:	4a8a      	ldr	r2, [pc, #552]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025e8:	f443 2380 	orr.w	r3, r3, #262144	; 0x40000
 80025ec:	6013      	str	r3, [r2, #0]
 80025ee:	4b88      	ldr	r3, [pc, #544]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025f0:	681b      	ldr	r3, [r3, #0]
 80025f2:	4a87      	ldr	r2, [pc, #540]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025f4:	f443 3380 	orr.w	r3, r3, #65536	; 0x10000
 80025f8:	6013      	str	r3, [r2, #0]
 80025fa:	e00b      	b.n	8002614 <HAL_RCC_OscConfig+0xb0>
 80025fc:	4b84      	ldr	r3, [pc, #528]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80025fe:	681b      	ldr	r3, [r3, #0]
 8002600:	4a83      	ldr	r2, [pc, #524]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002602:	f423 3380 	bic.w	r3, r3, #65536	; 0x10000
 8002606:	6013      	str	r3, [r2, #0]
 8002608:	4b81      	ldr	r3, [pc, #516]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 800260a:	681b      	ldr	r3, [r3, #0]
 800260c:	4a80      	ldr	r2, [pc, #512]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 800260e:	f423 2380 	bic.w	r3, r3, #262144	; 0x40000
 8002612:	6013      	str	r3, [r2, #0]

      /* Check the HSE State */
      if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
 8002614:	687b      	ldr	r3, [r7, #4]
 8002616:	685b      	ldr	r3, [r3, #4]
 8002618:	2b00      	cmp	r3, #0
 800261a:	d013      	beq.n	8002644 <HAL_RCC_OscConfig+0xe0>
      {
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 800261c:	f7ff f852 	bl	80016c4 <HAL_GetTick>
 8002620:	6138      	str	r0, [r7, #16]

        /* Wait till HSE is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8002622:	e008      	b.n	8002636 <HAL_RCC_OscConfig+0xd2>
        {
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 8002624:	f7ff f84e 	bl	80016c4 <HAL_GetTick>
 8002628:	4602      	mov	r2, r0
 800262a:	693b      	ldr	r3, [r7, #16]
 800262c:	1ad3      	subs	r3, r2, r3
 800262e:	2b64      	cmp	r3, #100	; 0x64
 8002630:	d901      	bls.n	8002636 <HAL_RCC_OscConfig+0xd2>
          {
            return HAL_TIMEOUT;
 8002632:	2303      	movs	r3, #3
 8002634:	e1fb      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8002636:	4b76      	ldr	r3, [pc, #472]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002638:	681b      	ldr	r3, [r3, #0]
 800263a:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
 800263e:	2b00      	cmp	r3, #0
 8002640:	d0f0      	beq.n	8002624 <HAL_RCC_OscConfig+0xc0>
 8002642:	e014      	b.n	800266e <HAL_RCC_OscConfig+0x10a>
        }
      }
      else
      {
        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8002644:	f7ff f83e 	bl	80016c4 <HAL_GetTick>
 8002648:	6138      	str	r0, [r7, #16]

        /* Wait till HSE is bypassed or disabled */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 800264a:	e008      	b.n	800265e <HAL_RCC_OscConfig+0xfa>
        {
          if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 800264c:	f7ff f83a 	bl	80016c4 <HAL_GetTick>
 8002650:	4602      	mov	r2, r0
 8002652:	693b      	ldr	r3, [r7, #16]
 8002654:	1ad3      	subs	r3, r2, r3
 8002656:	2b64      	cmp	r3, #100	; 0x64
 8002658:	d901      	bls.n	800265e <HAL_RCC_OscConfig+0xfa>
          {
            return HAL_TIMEOUT;
 800265a:	2303      	movs	r3, #3
 800265c:	e1e7      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 800265e:	4b6c      	ldr	r3, [pc, #432]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002660:	681b      	ldr	r3, [r3, #0]
 8002662:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
 8002666:	2b00      	cmp	r3, #0
 8002668:	d1f0      	bne.n	800264c <HAL_RCC_OscConfig+0xe8>
 800266a:	e000      	b.n	800266e <HAL_RCC_OscConfig+0x10a>
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
 800266c:	bf00      	nop
        }
      }
    }
  }
  /*----------------------------- HSI Configuration --------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 800266e:	687b      	ldr	r3, [r7, #4]
 8002670:	681b      	ldr	r3, [r3, #0]
 8002672:	f003 0302 	and.w	r3, r3, #2
 8002676:	2b00      	cmp	r3, #0
 8002678:	d063      	beq.n	8002742 <HAL_RCC_OscConfig+0x1de>
    /* Check the parameters */
    assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
    assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));

    /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
 800267a:	4b65      	ldr	r3, [pc, #404]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 800267c:	689b      	ldr	r3, [r3, #8]
 800267e:	f003 030c 	and.w	r3, r3, #12
 8002682:	2b00      	cmp	r3, #0
 8002684:	d00b      	beq.n	800269e <HAL_RCC_OscConfig+0x13a>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
 8002686:	4b62      	ldr	r3, [pc, #392]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002688:	689b      	ldr	r3, [r3, #8]
 800268a:	f003 030c 	and.w	r3, r3, #12
    if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
 800268e:	2b08      	cmp	r3, #8
 8002690:	d11c      	bne.n	80026cc <HAL_RCC_OscConfig+0x168>
      ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
 8002692:	4b5f      	ldr	r3, [pc, #380]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002694:	685b      	ldr	r3, [r3, #4]
 8002696:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
 800269a:	2b00      	cmp	r3, #0
 800269c:	d116      	bne.n	80026cc <HAL_RCC_OscConfig+0x168>
    {
      /* When HSI is used as system clock it will not disabled */
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 800269e:	4b5c      	ldr	r3, [pc, #368]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80026a0:	681b      	ldr	r3, [r3, #0]
 80026a2:	f003 0302 	and.w	r3, r3, #2
 80026a6:	2b00      	cmp	r3, #0
 80026a8:	d005      	beq.n	80026b6 <HAL_RCC_OscConfig+0x152>
 80026aa:	687b      	ldr	r3, [r7, #4]
 80026ac:	68db      	ldr	r3, [r3, #12]
 80026ae:	2b01      	cmp	r3, #1
 80026b0:	d001      	beq.n	80026b6 <HAL_RCC_OscConfig+0x152>
      {
        return HAL_ERROR;
 80026b2:	2301      	movs	r3, #1
 80026b4:	e1bb      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      }
      /* Otherwise, just the calibration is allowed */
      else
      {
        /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 80026b6:	4b56      	ldr	r3, [pc, #344]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80026b8:	681b      	ldr	r3, [r3, #0]
 80026ba:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
 80026be:	687b      	ldr	r3, [r7, #4]
 80026c0:	691b      	ldr	r3, [r3, #16]
 80026c2:	00db      	lsls	r3, r3, #3
 80026c4:	4952      	ldr	r1, [pc, #328]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80026c6:	4313      	orrs	r3, r2
 80026c8:	600b      	str	r3, [r1, #0]
      if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
 80026ca:	e03a      	b.n	8002742 <HAL_RCC_OscConfig+0x1de>
      }
    }
    else
    {
      /* Check the HSI State */
      if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
 80026cc:	687b      	ldr	r3, [r7, #4]
 80026ce:	68db      	ldr	r3, [r3, #12]
 80026d0:	2b00      	cmp	r3, #0
 80026d2:	d020      	beq.n	8002716 <HAL_RCC_OscConfig+0x1b2>
      {
        /* Enable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_ENABLE();
 80026d4:	4b4f      	ldr	r3, [pc, #316]	; (8002814 <HAL_RCC_OscConfig+0x2b0>)
 80026d6:	2201      	movs	r2, #1
 80026d8:	601a      	str	r2, [r3, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 80026da:	f7fe fff3 	bl	80016c4 <HAL_GetTick>
 80026de:	6138      	str	r0, [r7, #16]

        /* Wait till HSI is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80026e0:	e008      	b.n	80026f4 <HAL_RCC_OscConfig+0x190>
        {
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 80026e2:	f7fe ffef 	bl	80016c4 <HAL_GetTick>
 80026e6:	4602      	mov	r2, r0
 80026e8:	693b      	ldr	r3, [r7, #16]
 80026ea:	1ad3      	subs	r3, r2, r3
 80026ec:	2b02      	cmp	r3, #2
 80026ee:	d901      	bls.n	80026f4 <HAL_RCC_OscConfig+0x190>
          {
            return HAL_TIMEOUT;
 80026f0:	2303      	movs	r3, #3
 80026f2:	e19c      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 80026f4:	4b46      	ldr	r3, [pc, #280]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80026f6:	681b      	ldr	r3, [r3, #0]
 80026f8:	f003 0302 	and.w	r3, r3, #2
 80026fc:	2b00      	cmp	r3, #0
 80026fe:	d0f0      	beq.n	80026e2 <HAL_RCC_OscConfig+0x17e>
          }
        }

        /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
        __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 8002700:	4b43      	ldr	r3, [pc, #268]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002702:	681b      	ldr	r3, [r3, #0]
 8002704:	f023 02f8 	bic.w	r2, r3, #248	; 0xf8
 8002708:	687b      	ldr	r3, [r7, #4]
 800270a:	691b      	ldr	r3, [r3, #16]
 800270c:	00db      	lsls	r3, r3, #3
 800270e:	4940      	ldr	r1, [pc, #256]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002710:	4313      	orrs	r3, r2
 8002712:	600b      	str	r3, [r1, #0]
 8002714:	e015      	b.n	8002742 <HAL_RCC_OscConfig+0x1de>
      }
      else
      {
        /* Disable the Internal High Speed oscillator (HSI). */
        __HAL_RCC_HSI_DISABLE();
 8002716:	4b3f      	ldr	r3, [pc, #252]	; (8002814 <HAL_RCC_OscConfig+0x2b0>)
 8002718:	2200      	movs	r2, #0
 800271a:	601a      	str	r2, [r3, #0]

        /* Get Start Tick*/
        tickstart = HAL_GetTick();
 800271c:	f7fe ffd2 	bl	80016c4 <HAL_GetTick>
 8002720:	6138      	str	r0, [r7, #16]

        /* Wait till HSI is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8002722:	e008      	b.n	8002736 <HAL_RCC_OscConfig+0x1d2>
        {
          if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 8002724:	f7fe ffce 	bl	80016c4 <HAL_GetTick>
 8002728:	4602      	mov	r2, r0
 800272a:	693b      	ldr	r3, [r7, #16]
 800272c:	1ad3      	subs	r3, r2, r3
 800272e:	2b02      	cmp	r3, #2
 8002730:	d901      	bls.n	8002736 <HAL_RCC_OscConfig+0x1d2>
          {
            return HAL_TIMEOUT;
 8002732:	2303      	movs	r3, #3
 8002734:	e17b      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 8002736:	4b36      	ldr	r3, [pc, #216]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002738:	681b      	ldr	r3, [r3, #0]
 800273a:	f003 0302 	and.w	r3, r3, #2
 800273e:	2b00      	cmp	r3, #0
 8002740:	d1f0      	bne.n	8002724 <HAL_RCC_OscConfig+0x1c0>
        }
      }
    }
  }
  /*------------------------------ LSI Configuration -------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 8002742:	687b      	ldr	r3, [r7, #4]
 8002744:	681b      	ldr	r3, [r3, #0]
 8002746:	f003 0308 	and.w	r3, r3, #8
 800274a:	2b00      	cmp	r3, #0
 800274c:	d030      	beq.n	80027b0 <HAL_RCC_OscConfig+0x24c>
  {
    /* Check the parameters */
    assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));

    /* Check the LSI State */
    if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
 800274e:	687b      	ldr	r3, [r7, #4]
 8002750:	695b      	ldr	r3, [r3, #20]
 8002752:	2b00      	cmp	r3, #0
 8002754:	d016      	beq.n	8002784 <HAL_RCC_OscConfig+0x220>
    {
      /* Enable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_ENABLE();
 8002756:	4b30      	ldr	r3, [pc, #192]	; (8002818 <HAL_RCC_OscConfig+0x2b4>)
 8002758:	2201      	movs	r2, #1
 800275a:	601a      	str	r2, [r3, #0]

      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 800275c:	f7fe ffb2 	bl	80016c4 <HAL_GetTick>
 8002760:	6138      	str	r0, [r7, #16]

      /* Wait till LSI is ready */
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8002762:	e008      	b.n	8002776 <HAL_RCC_OscConfig+0x212>
      {
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8002764:	f7fe ffae 	bl	80016c4 <HAL_GetTick>
 8002768:	4602      	mov	r2, r0
 800276a:	693b      	ldr	r3, [r7, #16]
 800276c:	1ad3      	subs	r3, r2, r3
 800276e:	2b02      	cmp	r3, #2
 8002770:	d901      	bls.n	8002776 <HAL_RCC_OscConfig+0x212>
        {
          return HAL_TIMEOUT;
 8002772:	2303      	movs	r3, #3
 8002774:	e15b      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 8002776:	4b26      	ldr	r3, [pc, #152]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 8002778:	6f5b      	ldr	r3, [r3, #116]	; 0x74
 800277a:	f003 0302 	and.w	r3, r3, #2
 800277e:	2b00      	cmp	r3, #0
 8002780:	d0f0      	beq.n	8002764 <HAL_RCC_OscConfig+0x200>
 8002782:	e015      	b.n	80027b0 <HAL_RCC_OscConfig+0x24c>
      }
    }
    else
    {
      /* Disable the Internal Low Speed oscillator (LSI). */
      __HAL_RCC_LSI_DISABLE();
 8002784:	4b24      	ldr	r3, [pc, #144]	; (8002818 <HAL_RCC_OscConfig+0x2b4>)
 8002786:	2200      	movs	r2, #0
 8002788:	601a      	str	r2, [r3, #0]

      /* Get Start Tick */
      tickstart = HAL_GetTick();
 800278a:	f7fe ff9b 	bl	80016c4 <HAL_GetTick>
 800278e:	6138      	str	r0, [r7, #16]

      /* Wait till LSI is ready */
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 8002790:	e008      	b.n	80027a4 <HAL_RCC_OscConfig+0x240>
      {
        if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 8002792:	f7fe ff97 	bl	80016c4 <HAL_GetTick>
 8002796:	4602      	mov	r2, r0
 8002798:	693b      	ldr	r3, [r7, #16]
 800279a:	1ad3      	subs	r3, r2, r3
 800279c:	2b02      	cmp	r3, #2
 800279e:	d901      	bls.n	80027a4 <HAL_RCC_OscConfig+0x240>
        {
          return HAL_TIMEOUT;
 80027a0:	2303      	movs	r3, #3
 80027a2:	e144      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 80027a4:	4b1a      	ldr	r3, [pc, #104]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80027a6:	6f5b      	ldr	r3, [r3, #116]	; 0x74
 80027a8:	f003 0302 	and.w	r3, r3, #2
 80027ac:	2b00      	cmp	r3, #0
 80027ae:	d1f0      	bne.n	8002792 <HAL_RCC_OscConfig+0x22e>
        }
      }
    }
  }
  /*------------------------------ LSE Configuration -------------------------*/
  if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 80027b0:	687b      	ldr	r3, [r7, #4]
 80027b2:	681b      	ldr	r3, [r3, #0]
 80027b4:	f003 0304 	and.w	r3, r3, #4
 80027b8:	2b00      	cmp	r3, #0
 80027ba:	f000 80a0 	beq.w	80028fe <HAL_RCC_OscConfig+0x39a>
  {
    FlagStatus       pwrclkchanged = RESET;
 80027be:	2300      	movs	r3, #0
 80027c0:	75fb      	strb	r3, [r7, #23]
    /* Check the parameters */
    assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));

    /* Update LSE configuration in Backup Domain control register    */
    /* Requires to enable write access to Backup Domain of necessary */
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 80027c2:	4b13      	ldr	r3, [pc, #76]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80027c4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80027c6:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80027ca:	2b00      	cmp	r3, #0
 80027cc:	d10f      	bne.n	80027ee <HAL_RCC_OscConfig+0x28a>
    {
      __HAL_RCC_PWR_CLK_ENABLE();
 80027ce:	2300      	movs	r3, #0
 80027d0:	60bb      	str	r3, [r7, #8]
 80027d2:	4b0f      	ldr	r3, [pc, #60]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80027d4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80027d6:	4a0e      	ldr	r2, [pc, #56]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80027d8:	f043 5380 	orr.w	r3, r3, #268435456	; 0x10000000
 80027dc:	6413      	str	r3, [r2, #64]	; 0x40
 80027de:	4b0c      	ldr	r3, [pc, #48]	; (8002810 <HAL_RCC_OscConfig+0x2ac>)
 80027e0:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80027e2:	f003 5380 	and.w	r3, r3, #268435456	; 0x10000000
 80027e6:	60bb      	str	r3, [r7, #8]
 80027e8:	68bb      	ldr	r3, [r7, #8]
      pwrclkchanged = SET;
 80027ea:	2301      	movs	r3, #1
 80027ec:	75fb      	strb	r3, [r7, #23]
    }

    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 80027ee:	4b0b      	ldr	r3, [pc, #44]	; (800281c <HAL_RCC_OscConfig+0x2b8>)
 80027f0:	681b      	ldr	r3, [r3, #0]
 80027f2:	f403 7380 	and.w	r3, r3, #256	; 0x100
 80027f6:	2b00      	cmp	r3, #0
 80027f8:	d121      	bne.n	800283e <HAL_RCC_OscConfig+0x2da>
    {
      /* Enable write access to Backup domain */
      SET_BIT(PWR->CR, PWR_CR_DBP);
 80027fa:	4b08      	ldr	r3, [pc, #32]	; (800281c <HAL_RCC_OscConfig+0x2b8>)
 80027fc:	681b      	ldr	r3, [r3, #0]
 80027fe:	4a07      	ldr	r2, [pc, #28]	; (800281c <HAL_RCC_OscConfig+0x2b8>)
 8002800:	f443 7380 	orr.w	r3, r3, #256	; 0x100
 8002804:	6013      	str	r3, [r2, #0]

      /* Wait for Backup domain Write protection disable */
      tickstart = HAL_GetTick();
 8002806:	f7fe ff5d 	bl	80016c4 <HAL_GetTick>
 800280a:	6138      	str	r0, [r7, #16]

      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 800280c:	e011      	b.n	8002832 <HAL_RCC_OscConfig+0x2ce>
 800280e:	bf00      	nop
 8002810:	40023800 	.word	0x40023800
 8002814:	42470000 	.word	0x42470000
 8002818:	42470e80 	.word	0x42470e80
 800281c:	40007000 	.word	0x40007000
      {
        if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 8002820:	f7fe ff50 	bl	80016c4 <HAL_GetTick>
 8002824:	4602      	mov	r2, r0
 8002826:	693b      	ldr	r3, [r7, #16]
 8002828:	1ad3      	subs	r3, r2, r3
 800282a:	2b02      	cmp	r3, #2
 800282c:	d901      	bls.n	8002832 <HAL_RCC_OscConfig+0x2ce>
        {
          return HAL_TIMEOUT;
 800282e:	2303      	movs	r3, #3
 8002830:	e0fd      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 8002832:	4b81      	ldr	r3, [pc, #516]	; (8002a38 <HAL_RCC_OscConfig+0x4d4>)
 8002834:	681b      	ldr	r3, [r3, #0]
 8002836:	f403 7380 	and.w	r3, r3, #256	; 0x100
 800283a:	2b00      	cmp	r3, #0
 800283c:	d0f0      	beq.n	8002820 <HAL_RCC_OscConfig+0x2bc>
        }
      }
    }

    /* Set the new LSE configuration -----------------------------------------*/
    __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 800283e:	687b      	ldr	r3, [r7, #4]
 8002840:	689b      	ldr	r3, [r3, #8]
 8002842:	2b01      	cmp	r3, #1
 8002844:	d106      	bne.n	8002854 <HAL_RCC_OscConfig+0x2f0>
 8002846:	4b7d      	ldr	r3, [pc, #500]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 8002848:	6f1b      	ldr	r3, [r3, #112]	; 0x70
 800284a:	4a7c      	ldr	r2, [pc, #496]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800284c:	f043 0301 	orr.w	r3, r3, #1
 8002850:	6713      	str	r3, [r2, #112]	; 0x70
 8002852:	e01c      	b.n	800288e <HAL_RCC_OscConfig+0x32a>
 8002854:	687b      	ldr	r3, [r7, #4]
 8002856:	689b      	ldr	r3, [r3, #8]
 8002858:	2b05      	cmp	r3, #5
 800285a:	d10c      	bne.n	8002876 <HAL_RCC_OscConfig+0x312>
 800285c:	4b77      	ldr	r3, [pc, #476]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800285e:	6f1b      	ldr	r3, [r3, #112]	; 0x70
 8002860:	4a76      	ldr	r2, [pc, #472]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 8002862:	f043 0304 	orr.w	r3, r3, #4
 8002866:	6713      	str	r3, [r2, #112]	; 0x70
 8002868:	4b74      	ldr	r3, [pc, #464]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800286a:	6f1b      	ldr	r3, [r3, #112]	; 0x70
 800286c:	4a73      	ldr	r2, [pc, #460]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800286e:	f043 0301 	orr.w	r3, r3, #1
 8002872:	6713      	str	r3, [r2, #112]	; 0x70
 8002874:	e00b      	b.n	800288e <HAL_RCC_OscConfig+0x32a>
 8002876:	4b71      	ldr	r3, [pc, #452]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 8002878:	6f1b      	ldr	r3, [r3, #112]	; 0x70
 800287a:	4a70      	ldr	r2, [pc, #448]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800287c:	f023 0301 	bic.w	r3, r3, #1
 8002880:	6713      	str	r3, [r2, #112]	; 0x70
 8002882:	4b6e      	ldr	r3, [pc, #440]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 8002884:	6f1b      	ldr	r3, [r3, #112]	; 0x70
 8002886:	4a6d      	ldr	r2, [pc, #436]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 8002888:	f023 0304 	bic.w	r3, r3, #4
 800288c:	6713      	str	r3, [r2, #112]	; 0x70
    /* Check the LSE State */
    if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
 800288e:	687b      	ldr	r3, [r7, #4]
 8002890:	689b      	ldr	r3, [r3, #8]
 8002892:	2b00      	cmp	r3, #0
 8002894:	d015      	beq.n	80028c2 <HAL_RCC_OscConfig+0x35e>
    {
      /* Get Start Tick*/
      tickstart = HAL_GetTick();
 8002896:	f7fe ff15 	bl	80016c4 <HAL_GetTick>
 800289a:	6138      	str	r0, [r7, #16]

      /* Wait till LSE is ready */
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 800289c:	e00a      	b.n	80028b4 <HAL_RCC_OscConfig+0x350>
      {
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 800289e:	f7fe ff11 	bl	80016c4 <HAL_GetTick>
 80028a2:	4602      	mov	r2, r0
 80028a4:	693b      	ldr	r3, [r7, #16]
 80028a6:	1ad3      	subs	r3, r2, r3
 80028a8:	f241 3288 	movw	r2, #5000	; 0x1388
 80028ac:	4293      	cmp	r3, r2
 80028ae:	d901      	bls.n	80028b4 <HAL_RCC_OscConfig+0x350>
        {
          return HAL_TIMEOUT;
 80028b0:	2303      	movs	r3, #3
 80028b2:	e0bc      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 80028b4:	4b61      	ldr	r3, [pc, #388]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 80028b6:	6f1b      	ldr	r3, [r3, #112]	; 0x70
 80028b8:	f003 0302 	and.w	r3, r3, #2
 80028bc:	2b00      	cmp	r3, #0
 80028be:	d0ee      	beq.n	800289e <HAL_RCC_OscConfig+0x33a>
 80028c0:	e014      	b.n	80028ec <HAL_RCC_OscConfig+0x388>
      }
    }
    else
    {
      /* Get Start Tick */
      tickstart = HAL_GetTick();
 80028c2:	f7fe feff 	bl	80016c4 <HAL_GetTick>
 80028c6:	6138      	str	r0, [r7, #16]

      /* Wait till LSE is ready */
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 80028c8:	e00a      	b.n	80028e0 <HAL_RCC_OscConfig+0x37c>
      {
        if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 80028ca:	f7fe fefb 	bl	80016c4 <HAL_GetTick>
 80028ce:	4602      	mov	r2, r0
 80028d0:	693b      	ldr	r3, [r7, #16]
 80028d2:	1ad3      	subs	r3, r2, r3
 80028d4:	f241 3288 	movw	r2, #5000	; 0x1388
 80028d8:	4293      	cmp	r3, r2
 80028da:	d901      	bls.n	80028e0 <HAL_RCC_OscConfig+0x37c>
        {
          return HAL_TIMEOUT;
 80028dc:	2303      	movs	r3, #3
 80028de:	e0a6      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 80028e0:	4b56      	ldr	r3, [pc, #344]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 80028e2:	6f1b      	ldr	r3, [r3, #112]	; 0x70
 80028e4:	f003 0302 	and.w	r3, r3, #2
 80028e8:	2b00      	cmp	r3, #0
 80028ea:	d1ee      	bne.n	80028ca <HAL_RCC_OscConfig+0x366>
        }
      }
    }

    /* Restore clock configuration if changed */
    if(pwrclkchanged == SET)
 80028ec:	7dfb      	ldrb	r3, [r7, #23]
 80028ee:	2b01      	cmp	r3, #1
 80028f0:	d105      	bne.n	80028fe <HAL_RCC_OscConfig+0x39a>
    {
      __HAL_RCC_PWR_CLK_DISABLE();
 80028f2:	4b52      	ldr	r3, [pc, #328]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 80028f4:	6c1b      	ldr	r3, [r3, #64]	; 0x40
 80028f6:	4a51      	ldr	r2, [pc, #324]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 80028f8:	f023 5380 	bic.w	r3, r3, #268435456	; 0x10000000
 80028fc:	6413      	str	r3, [r2, #64]	; 0x40
    }
  }
  /*-------------------------------- PLL Configuration -----------------------*/
  /* Check the parameters */
  assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
  if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 80028fe:	687b      	ldr	r3, [r7, #4]
 8002900:	699b      	ldr	r3, [r3, #24]
 8002902:	2b00      	cmp	r3, #0
 8002904:	f000 8092 	beq.w	8002a2c <HAL_RCC_OscConfig+0x4c8>
  {
    /* Check if the PLL is used as system clock or not */
    if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
 8002908:	4b4c      	ldr	r3, [pc, #304]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800290a:	689b      	ldr	r3, [r3, #8]
 800290c:	f003 030c 	and.w	r3, r3, #12
 8002910:	2b08      	cmp	r3, #8
 8002912:	d05c      	beq.n	80029ce <HAL_RCC_OscConfig+0x46a>
    {
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 8002914:	687b      	ldr	r3, [r7, #4]
 8002916:	699b      	ldr	r3, [r3, #24]
 8002918:	2b02      	cmp	r3, #2
 800291a:	d141      	bne.n	80029a0 <HAL_RCC_OscConfig+0x43c>
        assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
        assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
        assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));

        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 800291c:	4b48      	ldr	r3, [pc, #288]	; (8002a40 <HAL_RCC_OscConfig+0x4dc>)
 800291e:	2200      	movs	r2, #0
 8002920:	601a      	str	r2, [r3, #0]

        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8002922:	f7fe fecf 	bl	80016c4 <HAL_GetTick>
 8002926:	6138      	str	r0, [r7, #16]

        /* Wait till PLL is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 8002928:	e008      	b.n	800293c <HAL_RCC_OscConfig+0x3d8>
        {
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 800292a:	f7fe fecb 	bl	80016c4 <HAL_GetTick>
 800292e:	4602      	mov	r2, r0
 8002930:	693b      	ldr	r3, [r7, #16]
 8002932:	1ad3      	subs	r3, r2, r3
 8002934:	2b02      	cmp	r3, #2
 8002936:	d901      	bls.n	800293c <HAL_RCC_OscConfig+0x3d8>
          {
            return HAL_TIMEOUT;
 8002938:	2303      	movs	r3, #3
 800293a:	e078      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 800293c:	4b3f      	ldr	r3, [pc, #252]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800293e:	681b      	ldr	r3, [r3, #0]
 8002940:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
 8002944:	2b00      	cmp	r3, #0
 8002946:	d1f0      	bne.n	800292a <HAL_RCC_OscConfig+0x3c6>
          }
        }

        /* Configure the main PLL clock source, multiplication and division factors. */
        WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource                                            | \
 8002948:	687b      	ldr	r3, [r7, #4]
 800294a:	69da      	ldr	r2, [r3, #28]
 800294c:	687b      	ldr	r3, [r7, #4]
 800294e:	6a1b      	ldr	r3, [r3, #32]
 8002950:	431a      	orrs	r2, r3
 8002952:	687b      	ldr	r3, [r7, #4]
 8002954:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8002956:	019b      	lsls	r3, r3, #6
 8002958:	431a      	orrs	r2, r3
 800295a:	687b      	ldr	r3, [r7, #4]
 800295c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
 800295e:	085b      	lsrs	r3, r3, #1
 8002960:	3b01      	subs	r3, #1
 8002962:	041b      	lsls	r3, r3, #16
 8002964:	431a      	orrs	r2, r3
 8002966:	687b      	ldr	r3, [r7, #4]
 8002968:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 800296a:	061b      	lsls	r3, r3, #24
 800296c:	4933      	ldr	r1, [pc, #204]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 800296e:	4313      	orrs	r3, r2
 8002970:	604b      	str	r3, [r1, #4]
                                 RCC_OscInitStruct->PLL.PLLM                                                 | \
                                 (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)             | \
                                 (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
                                 (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
        /* Enable the main PLL. */
        __HAL_RCC_PLL_ENABLE();
 8002972:	4b33      	ldr	r3, [pc, #204]	; (8002a40 <HAL_RCC_OscConfig+0x4dc>)
 8002974:	2201      	movs	r2, #1
 8002976:	601a      	str	r2, [r3, #0]

        /* Get Start Tick */
        tickstart = HAL_GetTick();
 8002978:	f7fe fea4 	bl	80016c4 <HAL_GetTick>
 800297c:	6138      	str	r0, [r7, #16]

        /* Wait till PLL is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 800297e:	e008      	b.n	8002992 <HAL_RCC_OscConfig+0x42e>
        {
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 8002980:	f7fe fea0 	bl	80016c4 <HAL_GetTick>
 8002984:	4602      	mov	r2, r0
 8002986:	693b      	ldr	r3, [r7, #16]
 8002988:	1ad3      	subs	r3, r2, r3
 800298a:	2b02      	cmp	r3, #2
 800298c:	d901      	bls.n	8002992 <HAL_RCC_OscConfig+0x42e>
          {
            return HAL_TIMEOUT;
 800298e:	2303      	movs	r3, #3
 8002990:	e04d      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8002992:	4b2a      	ldr	r3, [pc, #168]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 8002994:	681b      	ldr	r3, [r3, #0]
 8002996:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
 800299a:	2b00      	cmp	r3, #0
 800299c:	d0f0      	beq.n	8002980 <HAL_RCC_OscConfig+0x41c>
 800299e:	e045      	b.n	8002a2c <HAL_RCC_OscConfig+0x4c8>
        }
      }
      else
      {
        /* Disable the main PLL. */
        __HAL_RCC_PLL_DISABLE();
 80029a0:	4b27      	ldr	r3, [pc, #156]	; (8002a40 <HAL_RCC_OscConfig+0x4dc>)
 80029a2:	2200      	movs	r2, #0
 80029a4:	601a      	str	r2, [r3, #0]

        /* Get Start Tick */
        tickstart = HAL_GetTick();
 80029a6:	f7fe fe8d 	bl	80016c4 <HAL_GetTick>
 80029aa:	6138      	str	r0, [r7, #16]

        /* Wait till PLL is ready */
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 80029ac:	e008      	b.n	80029c0 <HAL_RCC_OscConfig+0x45c>
        {
          if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 80029ae:	f7fe fe89 	bl	80016c4 <HAL_GetTick>
 80029b2:	4602      	mov	r2, r0
 80029b4:	693b      	ldr	r3, [r7, #16]
 80029b6:	1ad3      	subs	r3, r2, r3
 80029b8:	2b02      	cmp	r3, #2
 80029ba:	d901      	bls.n	80029c0 <HAL_RCC_OscConfig+0x45c>
          {
            return HAL_TIMEOUT;
 80029bc:	2303      	movs	r3, #3
 80029be:	e036      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
 80029c0:	4b1e      	ldr	r3, [pc, #120]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 80029c2:	681b      	ldr	r3, [r3, #0]
 80029c4:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
 80029c8:	2b00      	cmp	r3, #0
 80029ca:	d1f0      	bne.n	80029ae <HAL_RCC_OscConfig+0x44a>
 80029cc:	e02e      	b.n	8002a2c <HAL_RCC_OscConfig+0x4c8>
      }
    }
    else
    {
      /* Check if there is a request to disable the PLL used as System clock source */
      if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
 80029ce:	687b      	ldr	r3, [r7, #4]
 80029d0:	699b      	ldr	r3, [r3, #24]
 80029d2:	2b01      	cmp	r3, #1
 80029d4:	d101      	bne.n	80029da <HAL_RCC_OscConfig+0x476>
      {
        return HAL_ERROR;
 80029d6:	2301      	movs	r3, #1
 80029d8:	e029      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
      }
      else
      {
        /* Do not return HAL_ERROR if request repeats the current configuration */
        pll_config = RCC->PLLCFGR;
 80029da:	4b18      	ldr	r3, [pc, #96]	; (8002a3c <HAL_RCC_OscConfig+0x4d8>)
 80029dc:	685b      	ldr	r3, [r3, #4]
 80029de:	60fb      	str	r3, [r7, #12]
        if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 80029e0:	68fb      	ldr	r3, [r7, #12]
 80029e2:	f403 0280 	and.w	r2, r3, #4194304	; 0x400000
 80029e6:	687b      	ldr	r3, [r7, #4]
 80029e8:	69db      	ldr	r3, [r3, #28]
 80029ea:	429a      	cmp	r2, r3
 80029ec:	d11c      	bne.n	8002a28 <HAL_RCC_OscConfig+0x4c4>
           (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
 80029ee:	68fb      	ldr	r3, [r7, #12]
 80029f0:	f003 023f 	and.w	r2, r3, #63	; 0x3f
 80029f4:	687b      	ldr	r3, [r7, #4]
 80029f6:	6a1b      	ldr	r3, [r3, #32]
        if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
 80029f8:	429a      	cmp	r2, r3
 80029fa:	d115      	bne.n	8002a28 <HAL_RCC_OscConfig+0x4c4>
           (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
 80029fc:	68fa      	ldr	r2, [r7, #12]
 80029fe:	f647 73c0 	movw	r3, #32704	; 0x7fc0
 8002a02:	4013      	ands	r3, r2
 8002a04:	687a      	ldr	r2, [r7, #4]
 8002a06:	6a52      	ldr	r2, [r2, #36]	; 0x24
           (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
 8002a08:	4293      	cmp	r3, r2
 8002a0a:	d10d      	bne.n	8002a28 <HAL_RCC_OscConfig+0x4c4>
           (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
 8002a0c:	68fb      	ldr	r3, [r7, #12]
 8002a0e:	f403 3240 	and.w	r2, r3, #196608	; 0x30000
 8002a12:	687b      	ldr	r3, [r7, #4]
 8002a14:	6a9b      	ldr	r3, [r3, #40]	; 0x28
           (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
 8002a16:	429a      	cmp	r2, r3
 8002a18:	d106      	bne.n	8002a28 <HAL_RCC_OscConfig+0x4c4>
           (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ))
 8002a1a:	68fb      	ldr	r3, [r7, #12]
 8002a1c:	f003 6270 	and.w	r2, r3, #251658240	; 0xf000000
 8002a20:	687b      	ldr	r3, [r7, #4]
 8002a22:	6adb      	ldr	r3, [r3, #44]	; 0x2c
           (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
 8002a24:	429a      	cmp	r2, r3
 8002a26:	d001      	beq.n	8002a2c <HAL_RCC_OscConfig+0x4c8>
        {
          return HAL_ERROR;
 8002a28:	2301      	movs	r3, #1
 8002a2a:	e000      	b.n	8002a2e <HAL_RCC_OscConfig+0x4ca>
        }
      }
    }
  }
  return HAL_OK;
 8002a2c:	2300      	movs	r3, #0
}
 8002a2e:	4618      	mov	r0, r3
 8002a30:	3718      	adds	r7, #24
 8002a32:	46bd      	mov	sp, r7
 8002a34:	bd80      	pop	{r7, pc}
 8002a36:	bf00      	nop
 8002a38:	40007000 	.word	0x40007000
 8002a3c:	40023800 	.word	0x40023800
 8002a40:	42470060 	.word	0x42470060

08002a44 <HAL_RCC_ClockConfig>:
  *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
  *         (for more details refer to section above "Initialization/de-initialization functions")
  * @retval None
  */
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
{
 8002a44:	b580      	push	{r7, lr}
 8002a46:	b084      	sub	sp, #16
 8002a48:	af00      	add	r7, sp, #0
 8002a4a:	6078      	str	r0, [r7, #4]
 8002a4c:	6039      	str	r1, [r7, #0]
  uint32_t tickstart;

  /* Check Null pointer */
  if(RCC_ClkInitStruct == NULL)
 8002a4e:	687b      	ldr	r3, [r7, #4]
 8002a50:	2b00      	cmp	r3, #0
 8002a52:	d101      	bne.n	8002a58 <HAL_RCC_ClockConfig+0x14>
  {
    return HAL_ERROR;
 8002a54:	2301      	movs	r3, #1
 8002a56:	e0cc      	b.n	8002bf2 <HAL_RCC_ClockConfig+0x1ae>
  /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
    must be correctly programmed according to the frequency of the CPU clock
    (HCLK) and the supply voltage of the device. */

  /* Increasing the number of wait states because of higher CPU frequency */
  if(FLatency > __HAL_FLASH_GET_LATENCY())
 8002a58:	4b68      	ldr	r3, [pc, #416]	; (8002bfc <HAL_RCC_ClockConfig+0x1b8>)
 8002a5a:	681b      	ldr	r3, [r3, #0]
 8002a5c:	f003 030f 	and.w	r3, r3, #15
 8002a60:	683a      	ldr	r2, [r7, #0]
 8002a62:	429a      	cmp	r2, r3
 8002a64:	d90c      	bls.n	8002a80 <HAL_RCC_ClockConfig+0x3c>
  {
    /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 8002a66:	4b65      	ldr	r3, [pc, #404]	; (8002bfc <HAL_RCC_ClockConfig+0x1b8>)
 8002a68:	683a      	ldr	r2, [r7, #0]
 8002a6a:	b2d2      	uxtb	r2, r2
 8002a6c:	701a      	strb	r2, [r3, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
 8002a6e:	4b63      	ldr	r3, [pc, #396]	; (8002bfc <HAL_RCC_ClockConfig+0x1b8>)
 8002a70:	681b      	ldr	r3, [r3, #0]
 8002a72:	f003 030f 	and.w	r3, r3, #15
 8002a76:	683a      	ldr	r2, [r7, #0]
 8002a78:	429a      	cmp	r2, r3
 8002a7a:	d001      	beq.n	8002a80 <HAL_RCC_ClockConfig+0x3c>
    {
      return HAL_ERROR;
 8002a7c:	2301      	movs	r3, #1
 8002a7e:	e0b8      	b.n	8002bf2 <HAL_RCC_ClockConfig+0x1ae>
    }
  }

  /*-------------------------- HCLK Configuration --------------------------*/
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 8002a80:	687b      	ldr	r3, [r7, #4]
 8002a82:	681b      	ldr	r3, [r3, #0]
 8002a84:	f003 0302 	and.w	r3, r3, #2
 8002a88:	2b00      	cmp	r3, #0
 8002a8a:	d020      	beq.n	8002ace <HAL_RCC_ClockConfig+0x8a>
  {
    /* Set the highest APBx dividers in order to ensure that we do not go through
       a non-spec phase whatever we decrease or increase HCLK. */
    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8002a8c:	687b      	ldr	r3, [r7, #4]
 8002a8e:	681b      	ldr	r3, [r3, #0]
 8002a90:	f003 0304 	and.w	r3, r3, #4
 8002a94:	2b00      	cmp	r3, #0
 8002a96:	d005      	beq.n	8002aa4 <HAL_RCC_ClockConfig+0x60>
    {
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
 8002a98:	4b59      	ldr	r3, [pc, #356]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002a9a:	689b      	ldr	r3, [r3, #8]
 8002a9c:	4a58      	ldr	r2, [pc, #352]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002a9e:	f443 53e0 	orr.w	r3, r3, #7168	; 0x1c00
 8002aa2:	6093      	str	r3, [r2, #8]
    }

    if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8002aa4:	687b      	ldr	r3, [r7, #4]
 8002aa6:	681b      	ldr	r3, [r3, #0]
 8002aa8:	f003 0308 	and.w	r3, r3, #8
 8002aac:	2b00      	cmp	r3, #0
 8002aae:	d005      	beq.n	8002abc <HAL_RCC_ClockConfig+0x78>
    {
      MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
 8002ab0:	4b53      	ldr	r3, [pc, #332]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002ab2:	689b      	ldr	r3, [r3, #8]
 8002ab4:	4a52      	ldr	r2, [pc, #328]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002ab6:	f443 4360 	orr.w	r3, r3, #57344	; 0xe000
 8002aba:	6093      	str	r3, [r2, #8]
    }

    assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
    MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 8002abc:	4b50      	ldr	r3, [pc, #320]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002abe:	689b      	ldr	r3, [r3, #8]
 8002ac0:	f023 02f0 	bic.w	r2, r3, #240	; 0xf0
 8002ac4:	687b      	ldr	r3, [r7, #4]
 8002ac6:	689b      	ldr	r3, [r3, #8]
 8002ac8:	494d      	ldr	r1, [pc, #308]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002aca:	4313      	orrs	r3, r2
 8002acc:	608b      	str	r3, [r1, #8]
  }

  /*------------------------- SYSCLK Configuration ---------------------------*/
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 8002ace:	687b      	ldr	r3, [r7, #4]
 8002ad0:	681b      	ldr	r3, [r3, #0]
 8002ad2:	f003 0301 	and.w	r3, r3, #1
 8002ad6:	2b00      	cmp	r3, #0
 8002ad8:	d044      	beq.n	8002b64 <HAL_RCC_ClockConfig+0x120>
  {
    assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));

    /* HSE is selected as System Clock Source */
    if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 8002ada:	687b      	ldr	r3, [r7, #4]
 8002adc:	685b      	ldr	r3, [r3, #4]
 8002ade:	2b01      	cmp	r3, #1
 8002ae0:	d107      	bne.n	8002af2 <HAL_RCC_ClockConfig+0xae>
    {
      /* Check the HSE ready flag */
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 8002ae2:	4b47      	ldr	r3, [pc, #284]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002ae4:	681b      	ldr	r3, [r3, #0]
 8002ae6:	f403 3300 	and.w	r3, r3, #131072	; 0x20000
 8002aea:	2b00      	cmp	r3, #0
 8002aec:	d119      	bne.n	8002b22 <HAL_RCC_ClockConfig+0xde>
      {
        return HAL_ERROR;
 8002aee:	2301      	movs	r3, #1
 8002af0:	e07f      	b.n	8002bf2 <HAL_RCC_ClockConfig+0x1ae>
      }
    }
    /* PLL is selected as System Clock Source */
    else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)   ||
 8002af2:	687b      	ldr	r3, [r7, #4]
 8002af4:	685b      	ldr	r3, [r3, #4]
 8002af6:	2b02      	cmp	r3, #2
 8002af8:	d003      	beq.n	8002b02 <HAL_RCC_ClockConfig+0xbe>
            (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
 8002afa:	687b      	ldr	r3, [r7, #4]
 8002afc:	685b      	ldr	r3, [r3, #4]
    else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)   ||
 8002afe:	2b03      	cmp	r3, #3
 8002b00:	d107      	bne.n	8002b12 <HAL_RCC_ClockConfig+0xce>
    {
      /* Check the PLL ready flag */
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 8002b02:	4b3f      	ldr	r3, [pc, #252]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002b04:	681b      	ldr	r3, [r3, #0]
 8002b06:	f003 7300 	and.w	r3, r3, #33554432	; 0x2000000
 8002b0a:	2b00      	cmp	r3, #0
 8002b0c:	d109      	bne.n	8002b22 <HAL_RCC_ClockConfig+0xde>
      {
        return HAL_ERROR;
 8002b0e:	2301      	movs	r3, #1
 8002b10:	e06f      	b.n	8002bf2 <HAL_RCC_ClockConfig+0x1ae>
    }
    /* HSI is selected as System Clock Source */
    else
    {
      /* Check the HSI ready flag */
      if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 8002b12:	4b3b      	ldr	r3, [pc, #236]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002b14:	681b      	ldr	r3, [r3, #0]
 8002b16:	f003 0302 	and.w	r3, r3, #2
 8002b1a:	2b00      	cmp	r3, #0
 8002b1c:	d101      	bne.n	8002b22 <HAL_RCC_ClockConfig+0xde>
      {
        return HAL_ERROR;
 8002b1e:	2301      	movs	r3, #1
 8002b20:	e067      	b.n	8002bf2 <HAL_RCC_ClockConfig+0x1ae>
      }
    }

    __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 8002b22:	4b37      	ldr	r3, [pc, #220]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002b24:	689b      	ldr	r3, [r3, #8]
 8002b26:	f023 0203 	bic.w	r2, r3, #3
 8002b2a:	687b      	ldr	r3, [r7, #4]
 8002b2c:	685b      	ldr	r3, [r3, #4]
 8002b2e:	4934      	ldr	r1, [pc, #208]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002b30:	4313      	orrs	r3, r2
 8002b32:	608b      	str	r3, [r1, #8]

    /* Get Start Tick */
    tickstart = HAL_GetTick();
 8002b34:	f7fe fdc6 	bl	80016c4 <HAL_GetTick>
 8002b38:	60f8      	str	r0, [r7, #12]

    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 8002b3a:	e00a      	b.n	8002b52 <HAL_RCC_ClockConfig+0x10e>
    {
      if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 8002b3c:	f7fe fdc2 	bl	80016c4 <HAL_GetTick>
 8002b40:	4602      	mov	r2, r0
 8002b42:	68fb      	ldr	r3, [r7, #12]
 8002b44:	1ad3      	subs	r3, r2, r3
 8002b46:	f241 3288 	movw	r2, #5000	; 0x1388
 8002b4a:	4293      	cmp	r3, r2
 8002b4c:	d901      	bls.n	8002b52 <HAL_RCC_ClockConfig+0x10e>
      {
        return HAL_TIMEOUT;
 8002b4e:	2303      	movs	r3, #3
 8002b50:	e04f      	b.n	8002bf2 <HAL_RCC_ClockConfig+0x1ae>
    while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 8002b52:	4b2b      	ldr	r3, [pc, #172]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002b54:	689b      	ldr	r3, [r3, #8]
 8002b56:	f003 020c 	and.w	r2, r3, #12
 8002b5a:	687b      	ldr	r3, [r7, #4]
 8002b5c:	685b      	ldr	r3, [r3, #4]
 8002b5e:	009b      	lsls	r3, r3, #2
 8002b60:	429a      	cmp	r2, r3
 8002b62:	d1eb      	bne.n	8002b3c <HAL_RCC_ClockConfig+0xf8>
      }
    }
  }

  /* Decreasing the number of wait states because of lower CPU frequency */
  if(FLatency < __HAL_FLASH_GET_LATENCY())
 8002b64:	4b25      	ldr	r3, [pc, #148]	; (8002bfc <HAL_RCC_ClockConfig+0x1b8>)
 8002b66:	681b      	ldr	r3, [r3, #0]
 8002b68:	f003 030f 	and.w	r3, r3, #15
 8002b6c:	683a      	ldr	r2, [r7, #0]
 8002b6e:	429a      	cmp	r2, r3
 8002b70:	d20c      	bcs.n	8002b8c <HAL_RCC_ClockConfig+0x148>
  {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
    __HAL_FLASH_SET_LATENCY(FLatency);
 8002b72:	4b22      	ldr	r3, [pc, #136]	; (8002bfc <HAL_RCC_ClockConfig+0x1b8>)
 8002b74:	683a      	ldr	r2, [r7, #0]
 8002b76:	b2d2      	uxtb	r2, r2
 8002b78:	701a      	strb	r2, [r3, #0]

    /* Check that the new number of wait states is taken into account to access the Flash
    memory by reading the FLASH_ACR register */
    if(__HAL_FLASH_GET_LATENCY() != FLatency)
 8002b7a:	4b20      	ldr	r3, [pc, #128]	; (8002bfc <HAL_RCC_ClockConfig+0x1b8>)
 8002b7c:	681b      	ldr	r3, [r3, #0]
 8002b7e:	f003 030f 	and.w	r3, r3, #15
 8002b82:	683a      	ldr	r2, [r7, #0]
 8002b84:	429a      	cmp	r2, r3
 8002b86:	d001      	beq.n	8002b8c <HAL_RCC_ClockConfig+0x148>
    {
      return HAL_ERROR;
 8002b88:	2301      	movs	r3, #1
 8002b8a:	e032      	b.n	8002bf2 <HAL_RCC_ClockConfig+0x1ae>
    }
  }

  /*-------------------------- PCLK1 Configuration ---------------------------*/
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 8002b8c:	687b      	ldr	r3, [r7, #4]
 8002b8e:	681b      	ldr	r3, [r3, #0]
 8002b90:	f003 0304 	and.w	r3, r3, #4
 8002b94:	2b00      	cmp	r3, #0
 8002b96:	d008      	beq.n	8002baa <HAL_RCC_ClockConfig+0x166>
  {
    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
 8002b98:	4b19      	ldr	r3, [pc, #100]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002b9a:	689b      	ldr	r3, [r3, #8]
 8002b9c:	f423 52e0 	bic.w	r2, r3, #7168	; 0x1c00
 8002ba0:	687b      	ldr	r3, [r7, #4]
 8002ba2:	68db      	ldr	r3, [r3, #12]
 8002ba4:	4916      	ldr	r1, [pc, #88]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002ba6:	4313      	orrs	r3, r2
 8002ba8:	608b      	str	r3, [r1, #8]
  }

  /*-------------------------- PCLK2 Configuration ---------------------------*/
  if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
 8002baa:	687b      	ldr	r3, [r7, #4]
 8002bac:	681b      	ldr	r3, [r3, #0]
 8002bae:	f003 0308 	and.w	r3, r3, #8
 8002bb2:	2b00      	cmp	r3, #0
 8002bb4:	d009      	beq.n	8002bca <HAL_RCC_ClockConfig+0x186>
  {
    assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
    MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
 8002bb6:	4b12      	ldr	r3, [pc, #72]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002bb8:	689b      	ldr	r3, [r3, #8]
 8002bba:	f423 4260 	bic.w	r2, r3, #57344	; 0xe000
 8002bbe:	687b      	ldr	r3, [r7, #4]
 8002bc0:	691b      	ldr	r3, [r3, #16]
 8002bc2:	00db      	lsls	r3, r3, #3
 8002bc4:	490e      	ldr	r1, [pc, #56]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002bc6:	4313      	orrs	r3, r2
 8002bc8:	608b      	str	r3, [r1, #8]
  }

  /* Update the SystemCoreClock global variable */
  SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
 8002bca:	f000 f821 	bl	8002c10 <HAL_RCC_GetSysClockFreq>
 8002bce:	4601      	mov	r1, r0
 8002bd0:	4b0b      	ldr	r3, [pc, #44]	; (8002c00 <HAL_RCC_ClockConfig+0x1bc>)
 8002bd2:	689b      	ldr	r3, [r3, #8]
 8002bd4:	091b      	lsrs	r3, r3, #4
 8002bd6:	f003 030f 	and.w	r3, r3, #15
 8002bda:	4a0a      	ldr	r2, [pc, #40]	; (8002c04 <HAL_RCC_ClockConfig+0x1c0>)
 8002bdc:	5cd3      	ldrb	r3, [r2, r3]
 8002bde:	fa21 f303 	lsr.w	r3, r1, r3
 8002be2:	4a09      	ldr	r2, [pc, #36]	; (8002c08 <HAL_RCC_ClockConfig+0x1c4>)
 8002be4:	6013      	str	r3, [r2, #0]

  /* Configure the source of time base considering new system clocks settings */
  HAL_InitTick (uwTickPrio);
 8002be6:	4b09      	ldr	r3, [pc, #36]	; (8002c0c <HAL_RCC_ClockConfig+0x1c8>)
 8002be8:	681b      	ldr	r3, [r3, #0]
 8002bea:	4618      	mov	r0, r3
 8002bec:	f7fe fd26 	bl	800163c <HAL_InitTick>

  return HAL_OK;
 8002bf0:	2300      	movs	r3, #0
}
 8002bf2:	4618      	mov	r0, r3
 8002bf4:	3710      	adds	r7, #16
 8002bf6:	46bd      	mov	sp, r7
 8002bf8:	bd80      	pop	{r7, pc}
 8002bfa:	bf00      	nop
 8002bfc:	40023c00 	.word	0x40023c00
 8002c00:	40023800 	.word	0x40023800
 8002c04:	0800715c 	.word	0x0800715c
 8002c08:	20000004 	.word	0x20000004
 8002c0c:	20000008 	.word	0x20000008

08002c10 <HAL_RCC_GetSysClockFreq>:
  *
  *
  * @retval SYSCLK frequency
  */
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
{
 8002c10:	b5f0      	push	{r4, r5, r6, r7, lr}
 8002c12:	b085      	sub	sp, #20
 8002c14:	af00      	add	r7, sp, #0
  uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
 8002c16:	2300      	movs	r3, #0
 8002c18:	607b      	str	r3, [r7, #4]
 8002c1a:	2300      	movs	r3, #0
 8002c1c:	60fb      	str	r3, [r7, #12]
 8002c1e:	2300      	movs	r3, #0
 8002c20:	603b      	str	r3, [r7, #0]
  uint32_t sysclockfreq = 0U;
 8002c22:	2300      	movs	r3, #0
 8002c24:	60bb      	str	r3, [r7, #8]

  /* Get SYSCLK source -------------------------------------------------------*/
  switch (RCC->CFGR & RCC_CFGR_SWS)
 8002c26:	4b63      	ldr	r3, [pc, #396]	; (8002db4 <HAL_RCC_GetSysClockFreq+0x1a4>)
 8002c28:	689b      	ldr	r3, [r3, #8]
 8002c2a:	f003 030c 	and.w	r3, r3, #12
 8002c2e:	2b04      	cmp	r3, #4
 8002c30:	d007      	beq.n	8002c42 <HAL_RCC_GetSysClockFreq+0x32>
 8002c32:	2b08      	cmp	r3, #8
 8002c34:	d008      	beq.n	8002c48 <HAL_RCC_GetSysClockFreq+0x38>
 8002c36:	2b00      	cmp	r3, #0
 8002c38:	f040 80b4 	bne.w	8002da4 <HAL_RCC_GetSysClockFreq+0x194>
  {
    case RCC_CFGR_SWS_HSI:  /* HSI used as system clock source */
    {
      sysclockfreq = HSI_VALUE;
 8002c3c:	4b5e      	ldr	r3, [pc, #376]	; (8002db8 <HAL_RCC_GetSysClockFreq+0x1a8>)
 8002c3e:	60bb      	str	r3, [r7, #8]
       break;
 8002c40:	e0b3      	b.n	8002daa <HAL_RCC_GetSysClockFreq+0x19a>
    }
    case RCC_CFGR_SWS_HSE:  /* HSE used as system clock  source */
    {
      sysclockfreq = HSE_VALUE;
 8002c42:	4b5e      	ldr	r3, [pc, #376]	; (8002dbc <HAL_RCC_GetSysClockFreq+0x1ac>)
 8002c44:	60bb      	str	r3, [r7, #8]
      break;
 8002c46:	e0b0      	b.n	8002daa <HAL_RCC_GetSysClockFreq+0x19a>
    }
    case RCC_CFGR_SWS_PLL:  /* PLL used as system clock  source */
    {
      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
      SYSCLK = PLL_VCO / PLLP */
      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
 8002c48:	4b5a      	ldr	r3, [pc, #360]	; (8002db4 <HAL_RCC_GetSysClockFreq+0x1a4>)
 8002c4a:	685b      	ldr	r3, [r3, #4]
 8002c4c:	f003 033f 	and.w	r3, r3, #63	; 0x3f
 8002c50:	607b      	str	r3, [r7, #4]
      if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
 8002c52:	4b58      	ldr	r3, [pc, #352]	; (8002db4 <HAL_RCC_GetSysClockFreq+0x1a4>)
 8002c54:	685b      	ldr	r3, [r3, #4]
 8002c56:	f403 0380 	and.w	r3, r3, #4194304	; 0x400000
 8002c5a:	2b00      	cmp	r3, #0
 8002c5c:	d04a      	beq.n	8002cf4 <HAL_RCC_GetSysClockFreq+0xe4>
      {
        /* HSE used as PLL clock source */
        pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
 8002c5e:	4b55      	ldr	r3, [pc, #340]	; (8002db4 <HAL_RCC_GetSysClockFreq+0x1a4>)
 8002c60:	685b      	ldr	r3, [r3, #4]
 8002c62:	099b      	lsrs	r3, r3, #6
 8002c64:	f04f 0400 	mov.w	r4, #0
 8002c68:	f240 11ff 	movw	r1, #511	; 0x1ff
 8002c6c:	f04f 0200 	mov.w	r2, #0
 8002c70:	ea03 0501 	and.w	r5, r3, r1
 8002c74:	ea04 0602 	and.w	r6, r4, r2
 8002c78:	4629      	mov	r1, r5
 8002c7a:	4632      	mov	r2, r6
 8002c7c:	f04f 0300 	mov.w	r3, #0
 8002c80:	f04f 0400 	mov.w	r4, #0
 8002c84:	0154      	lsls	r4, r2, #5
 8002c86:	ea44 64d1 	orr.w	r4, r4, r1, lsr #27
 8002c8a:	014b      	lsls	r3, r1, #5
 8002c8c:	4619      	mov	r1, r3
 8002c8e:	4622      	mov	r2, r4
 8002c90:	1b49      	subs	r1, r1, r5
 8002c92:	eb62 0206 	sbc.w	r2, r2, r6
 8002c96:	f04f 0300 	mov.w	r3, #0
 8002c9a:	f04f 0400 	mov.w	r4, #0
 8002c9e:	0194      	lsls	r4, r2, #6
 8002ca0:	ea44 6491 	orr.w	r4, r4, r1, lsr #26
 8002ca4:	018b      	lsls	r3, r1, #6
 8002ca6:	1a5b      	subs	r3, r3, r1
 8002ca8:	eb64 0402 	sbc.w	r4, r4, r2
 8002cac:	f04f 0100 	mov.w	r1, #0
 8002cb0:	f04f 0200 	mov.w	r2, #0
 8002cb4:	00e2      	lsls	r2, r4, #3
 8002cb6:	ea42 7253 	orr.w	r2, r2, r3, lsr #29
 8002cba:	00d9      	lsls	r1, r3, #3
 8002cbc:	460b      	mov	r3, r1
 8002cbe:	4614      	mov	r4, r2
 8002cc0:	195b      	adds	r3, r3, r5
 8002cc2:	eb44 0406 	adc.w	r4, r4, r6
 8002cc6:	f04f 0100 	mov.w	r1, #0
 8002cca:	f04f 0200 	mov.w	r2, #0
 8002cce:	0262      	lsls	r2, r4, #9
 8002cd0:	ea42 52d3 	orr.w	r2, r2, r3, lsr #23
 8002cd4:	0259      	lsls	r1, r3, #9
 8002cd6:	460b      	mov	r3, r1
 8002cd8:	4614      	mov	r4, r2
 8002cda:	4618      	mov	r0, r3
 8002cdc:	4621      	mov	r1, r4
 8002cde:	687b      	ldr	r3, [r7, #4]
 8002ce0:	f04f 0400 	mov.w	r4, #0
 8002ce4:	461a      	mov	r2, r3
 8002ce6:	4623      	mov	r3, r4
 8002ce8:	f7fd fa7c 	bl	80001e4 <__aeabi_uldivmod>
 8002cec:	4603      	mov	r3, r0
 8002cee:	460c      	mov	r4, r1
 8002cf0:	60fb      	str	r3, [r7, #12]
 8002cf2:	e049      	b.n	8002d88 <HAL_RCC_GetSysClockFreq+0x178>
      }
      else
      {
        /* HSI used as PLL clock source */
        pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
 8002cf4:	4b2f      	ldr	r3, [pc, #188]	; (8002db4 <HAL_RCC_GetSysClockFreq+0x1a4>)
 8002cf6:	685b      	ldr	r3, [r3, #4]
 8002cf8:	099b      	lsrs	r3, r3, #6
 8002cfa:	f04f 0400 	mov.w	r4, #0
 8002cfe:	f240 11ff 	movw	r1, #511	; 0x1ff
 8002d02:	f04f 0200 	mov.w	r2, #0
 8002d06:	ea03 0501 	and.w	r5, r3, r1
 8002d0a:	ea04 0602 	and.w	r6, r4, r2
 8002d0e:	4629      	mov	r1, r5
 8002d10:	4632      	mov	r2, r6
 8002d12:	f04f 0300 	mov.w	r3, #0
 8002d16:	f04f 0400 	mov.w	r4, #0
 8002d1a:	0154      	lsls	r4, r2, #5
 8002d1c:	ea44 64d1 	orr.w	r4, r4, r1, lsr #27
 8002d20:	014b      	lsls	r3, r1, #5
 8002d22:	4619      	mov	r1, r3
 8002d24:	4622      	mov	r2, r4
 8002d26:	1b49      	subs	r1, r1, r5
 8002d28:	eb62 0206 	sbc.w	r2, r2, r6
 8002d2c:	f04f 0300 	mov.w	r3, #0
 8002d30:	f04f 0400 	mov.w	r4, #0
 8002d34:	0194      	lsls	r4, r2, #6
 8002d36:	ea44 6491 	orr.w	r4, r4, r1, lsr #26
 8002d3a:	018b      	lsls	r3, r1, #6
 8002d3c:	1a5b      	subs	r3, r3, r1
 8002d3e:	eb64 0402 	sbc.w	r4, r4, r2
 8002d42:	f04f 0100 	mov.w	r1, #0
 8002d46:	f04f 0200 	mov.w	r2, #0
 8002d4a:	00e2      	lsls	r2, r4, #3
 8002d4c:	ea42 7253 	orr.w	r2, r2, r3, lsr #29
 8002d50:	00d9      	lsls	r1, r3, #3
 8002d52:	460b      	mov	r3, r1
 8002d54:	4614      	mov	r4, r2
 8002d56:	195b      	adds	r3, r3, r5
 8002d58:	eb44 0406 	adc.w	r4, r4, r6
 8002d5c:	f04f 0100 	mov.w	r1, #0
 8002d60:	f04f 0200 	mov.w	r2, #0
 8002d64:	02a2      	lsls	r2, r4, #10
 8002d66:	ea42 5293 	orr.w	r2, r2, r3, lsr #22
 8002d6a:	0299      	lsls	r1, r3, #10
 8002d6c:	460b      	mov	r3, r1
 8002d6e:	4614      	mov	r4, r2
 8002d70:	4618      	mov	r0, r3
 8002d72:	4621      	mov	r1, r4
 8002d74:	687b      	ldr	r3, [r7, #4]
 8002d76:	f04f 0400 	mov.w	r4, #0
 8002d7a:	461a      	mov	r2, r3
 8002d7c:	4623      	mov	r3, r4
 8002d7e:	f7fd fa31 	bl	80001e4 <__aeabi_uldivmod>
 8002d82:	4603      	mov	r3, r0
 8002d84:	460c      	mov	r4, r1
 8002d86:	60fb      	str	r3, [r7, #12]
      }
      pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
 8002d88:	4b0a      	ldr	r3, [pc, #40]	; (8002db4 <HAL_RCC_GetSysClockFreq+0x1a4>)
 8002d8a:	685b      	ldr	r3, [r3, #4]
 8002d8c:	0c1b      	lsrs	r3, r3, #16
 8002d8e:	f003 0303 	and.w	r3, r3, #3
 8002d92:	3301      	adds	r3, #1
 8002d94:	005b      	lsls	r3, r3, #1
 8002d96:	603b      	str	r3, [r7, #0]

      sysclockfreq = pllvco/pllp;
 8002d98:	68fa      	ldr	r2, [r7, #12]
 8002d9a:	683b      	ldr	r3, [r7, #0]
 8002d9c:	fbb2 f3f3 	udiv	r3, r2, r3
 8002da0:	60bb      	str	r3, [r7, #8]
      break;
 8002da2:	e002      	b.n	8002daa <HAL_RCC_GetSysClockFreq+0x19a>
    }
    default:
    {
      sysclockfreq = HSI_VALUE;
 8002da4:	4b04      	ldr	r3, [pc, #16]	; (8002db8 <HAL_RCC_GetSysClockFreq+0x1a8>)
 8002da6:	60bb      	str	r3, [r7, #8]
      break;
 8002da8:	bf00      	nop
    }
  }
  return sysclockfreq;
 8002daa:	68bb      	ldr	r3, [r7, #8]
}
 8002dac:	4618      	mov	r0, r3
 8002dae:	3714      	adds	r7, #20
 8002db0:	46bd      	mov	sp, r7
 8002db2:	bdf0      	pop	{r4, r5, r6, r7, pc}
 8002db4:	40023800 	.word	0x40023800
 8002db8:	00f42400 	.word	0x00f42400
 8002dbc:	007a1200 	.word	0x007a1200

08002dc0 <HAL_RCC_GetHCLKFreq>:
  * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
  *         and updated within this function
  * @retval HCLK frequency
  */
uint32_t HAL_RCC_GetHCLKFreq(void)
{
 8002dc0:	b480      	push	{r7}
 8002dc2:	af00      	add	r7, sp, #0
  return SystemCoreClock;
 8002dc4:	4b03      	ldr	r3, [pc, #12]	; (8002dd4 <HAL_RCC_GetHCLKFreq+0x14>)
 8002dc6:	681b      	ldr	r3, [r3, #0]
}
 8002dc8:	4618      	mov	r0, r3
 8002dca:	46bd      	mov	sp, r7
 8002dcc:	f85d 7b04 	ldr.w	r7, [sp], #4
 8002dd0:	4770      	bx	lr
 8002dd2:	bf00      	nop
 8002dd4:	20000004 	.word	0x20000004

08002dd8 <HAL_RCC_GetPCLK1Freq>:
  * @note   Each time PCLK1 changes, this function must be called to update the
  *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK1 frequency
  */
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
 8002dd8:	b580      	push	{r7, lr}
 8002dda:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
 8002ddc:	f7ff fff0 	bl	8002dc0 <HAL_RCC_GetHCLKFreq>
 8002de0:	4601      	mov	r1, r0
 8002de2:	4b05      	ldr	r3, [pc, #20]	; (8002df8 <HAL_RCC_GetPCLK1Freq+0x20>)
 8002de4:	689b      	ldr	r3, [r3, #8]
 8002de6:	0a9b      	lsrs	r3, r3, #10
 8002de8:	f003 0307 	and.w	r3, r3, #7
 8002dec:	4a03      	ldr	r2, [pc, #12]	; (8002dfc <HAL_RCC_GetPCLK1Freq+0x24>)
 8002dee:	5cd3      	ldrb	r3, [r2, r3]
 8002df0:	fa21 f303 	lsr.w	r3, r1, r3
}
 8002df4:	4618      	mov	r0, r3
 8002df6:	bd80      	pop	{r7, pc}
 8002df8:	40023800 	.word	0x40023800
 8002dfc:	0800716c 	.word	0x0800716c

08002e00 <HAL_RCC_GetPCLK2Freq>:
  * @note   Each time PCLK2 changes, this function must be called to update the
  *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
  * @retval PCLK2 frequency
  */
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
 8002e00:	b580      	push	{r7, lr}
 8002e02:	af00      	add	r7, sp, #0
  /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
  return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
 8002e04:	f7ff ffdc 	bl	8002dc0 <HAL_RCC_GetHCLKFreq>
 8002e08:	4601      	mov	r1, r0
 8002e0a:	4b05      	ldr	r3, [pc, #20]	; (8002e20 <HAL_RCC_GetPCLK2Freq+0x20>)
 8002e0c:	689b      	ldr	r3, [r3, #8]
 8002e0e:	0b5b      	lsrs	r3, r3, #13
 8002e10:	f003 0307 	and.w	r3, r3, #7
 8002e14:	4a03      	ldr	r2, [pc, #12]	; (8002e24 <HAL_RCC_GetPCLK2Freq+0x24>)
 8002e16:	5cd3      	ldrb	r3, [r2, r3]
 8002e18:	fa21 f303 	lsr.w	r3, r1, r3
}
 8002e1c:	4618      	mov	r0, r3
 8002e1e:	bd80      	pop	{r7, pc}
 8002e20:	40023800 	.word	0x40023800
 8002e24:	0800716c 	.word	0x0800716c

08002e28 <HAL_SPI_Init>:
  * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
  *               the configuration information for SPI module.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
{
 8002e28:	b580      	push	{r7, lr}
 8002e2a:	b082      	sub	sp, #8
 8002e2c:	af00      	add	r7, sp, #0
 8002e2e:	6078      	str	r0, [r7, #4]
  /* Check the SPI handle allocation */
  if (hspi == NULL)
 8002e30:	687b      	ldr	r3, [r7, #4]
 8002e32:	2b00      	cmp	r3, #0
 8002e34:	d101      	bne.n	8002e3a <HAL_SPI_Init+0x12>
  {
    return HAL_ERROR;
 8002e36:	2301      	movs	r3, #1
 8002e38:	e056      	b.n	8002ee8 <HAL_SPI_Init+0xc0>
  if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
  {
    assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
  }
#else
  hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
 8002e3a:	687b      	ldr	r3, [r7, #4]
 8002e3c:	2200      	movs	r2, #0
 8002e3e:	629a      	str	r2, [r3, #40]	; 0x28
#endif /* USE_SPI_CRC */

  if (hspi->State == HAL_SPI_STATE_RESET)
 8002e40:	687b      	ldr	r3, [r7, #4]
 8002e42:	f893 3051 	ldrb.w	r3, [r3, #81]	; 0x51
 8002e46:	b2db      	uxtb	r3, r3
 8002e48:	2b00      	cmp	r3, #0
 8002e4a:	d106      	bne.n	8002e5a <HAL_SPI_Init+0x32>
  {
    /* Allocate lock resource and initialize it */
    hspi->Lock = HAL_UNLOCKED;
 8002e4c:	687b      	ldr	r3, [r7, #4]
 8002e4e:	2200      	movs	r2, #0
 8002e50:	f883 2050 	strb.w	r2, [r3, #80]	; 0x50

    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
    hspi->MspInitCallback(hspi);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC... */
    HAL_SPI_MspInit(hspi);
 8002e54:	6878      	ldr	r0, [r7, #4]
 8002e56:	f7fe facb 	bl	80013f0 <HAL_SPI_MspInit>
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  }

  hspi->State = HAL_SPI_STATE_BUSY;
 8002e5a:	687b      	ldr	r3, [r7, #4]
 8002e5c:	2202      	movs	r2, #2
 8002e5e:	f883 2051 	strb.w	r2, [r3, #81]	; 0x51

  /* Disable the selected SPI peripheral */
  __HAL_SPI_DISABLE(hspi);
 8002e62:	687b      	ldr	r3, [r7, #4]
 8002e64:	681b      	ldr	r3, [r3, #0]
 8002e66:	681a      	ldr	r2, [r3, #0]
 8002e68:	687b      	ldr	r3, [r7, #4]
 8002e6a:	681b      	ldr	r3, [r3, #0]
 8002e6c:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8002e70:	601a      	str	r2, [r3, #0]

  /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
  Communication speed, First bit and CRC calculation state */
  WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
 8002e72:	687b      	ldr	r3, [r7, #4]
 8002e74:	685a      	ldr	r2, [r3, #4]
 8002e76:	687b      	ldr	r3, [r7, #4]
 8002e78:	689b      	ldr	r3, [r3, #8]
 8002e7a:	431a      	orrs	r2, r3
 8002e7c:	687b      	ldr	r3, [r7, #4]
 8002e7e:	68db      	ldr	r3, [r3, #12]
 8002e80:	431a      	orrs	r2, r3
 8002e82:	687b      	ldr	r3, [r7, #4]
 8002e84:	691b      	ldr	r3, [r3, #16]
 8002e86:	431a      	orrs	r2, r3
 8002e88:	687b      	ldr	r3, [r7, #4]
 8002e8a:	695b      	ldr	r3, [r3, #20]
 8002e8c:	431a      	orrs	r2, r3
 8002e8e:	687b      	ldr	r3, [r7, #4]
 8002e90:	699b      	ldr	r3, [r3, #24]
 8002e92:	f403 7300 	and.w	r3, r3, #512	; 0x200
 8002e96:	431a      	orrs	r2, r3
 8002e98:	687b      	ldr	r3, [r7, #4]
 8002e9a:	69db      	ldr	r3, [r3, #28]
 8002e9c:	431a      	orrs	r2, r3
 8002e9e:	687b      	ldr	r3, [r7, #4]
 8002ea0:	6a1b      	ldr	r3, [r3, #32]
 8002ea2:	ea42 0103 	orr.w	r1, r2, r3
 8002ea6:	687b      	ldr	r3, [r7, #4]
 8002ea8:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8002eaa:	687b      	ldr	r3, [r7, #4]
 8002eac:	681b      	ldr	r3, [r3, #0]
 8002eae:	430a      	orrs	r2, r1
 8002eb0:	601a      	str	r2, [r3, #0]
                                  hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
                                  hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit  | hspi->Init.CRCCalculation));

  /* Configure : NSS management, TI Mode */
  WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
 8002eb2:	687b      	ldr	r3, [r7, #4]
 8002eb4:	699b      	ldr	r3, [r3, #24]
 8002eb6:	0c1b      	lsrs	r3, r3, #16
 8002eb8:	f003 0104 	and.w	r1, r3, #4
 8002ebc:	687b      	ldr	r3, [r7, #4]
 8002ebe:	6a5a      	ldr	r2, [r3, #36]	; 0x24
 8002ec0:	687b      	ldr	r3, [r7, #4]
 8002ec2:	681b      	ldr	r3, [r3, #0]
 8002ec4:	430a      	orrs	r2, r1
 8002ec6:	605a      	str	r2, [r3, #4]
  }
#endif /* USE_SPI_CRC */

#if defined(SPI_I2SCFGR_I2SMOD)
  /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
  CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
 8002ec8:	687b      	ldr	r3, [r7, #4]
 8002eca:	681b      	ldr	r3, [r3, #0]
 8002ecc:	69da      	ldr	r2, [r3, #28]
 8002ece:	687b      	ldr	r3, [r7, #4]
 8002ed0:	681b      	ldr	r3, [r3, #0]
 8002ed2:	f422 6200 	bic.w	r2, r2, #2048	; 0x800
 8002ed6:	61da      	str	r2, [r3, #28]
#endif /* SPI_I2SCFGR_I2SMOD */

  hspi->ErrorCode = HAL_SPI_ERROR_NONE;
 8002ed8:	687b      	ldr	r3, [r7, #4]
 8002eda:	2200      	movs	r2, #0
 8002edc:	655a      	str	r2, [r3, #84]	; 0x54
  hspi->State     = HAL_SPI_STATE_READY;
 8002ede:	687b      	ldr	r3, [r7, #4]
 8002ee0:	2201      	movs	r2, #1
 8002ee2:	f883 2051 	strb.w	r2, [r3, #81]	; 0x51

  return HAL_OK;
 8002ee6:	2300      	movs	r3, #0
}
 8002ee8:	4618      	mov	r0, r3
 8002eea:	3708      	adds	r7, #8
 8002eec:	46bd      	mov	sp, r7
 8002eee:	bd80      	pop	{r7, pc}

08002ef0 <HAL_SPI_Transmit>:
  * @param  Size amount of data to be sent
  * @param  Timeout Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
 8002ef0:	b580      	push	{r7, lr}
 8002ef2:	b088      	sub	sp, #32
 8002ef4:	af00      	add	r7, sp, #0
 8002ef6:	60f8      	str	r0, [r7, #12]
 8002ef8:	60b9      	str	r1, [r7, #8]
 8002efa:	603b      	str	r3, [r7, #0]
 8002efc:	4613      	mov	r3, r2
 8002efe:	80fb      	strh	r3, [r7, #6]
  uint32_t tickstart;
  HAL_StatusTypeDef errorcode = HAL_OK;
 8002f00:	2300      	movs	r3, #0
 8002f02:	77fb      	strb	r3, [r7, #31]

  /* Check Direction parameter */
  assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));

  /* Process Locked */
  __HAL_LOCK(hspi);
 8002f04:	68fb      	ldr	r3, [r7, #12]
 8002f06:	f893 3050 	ldrb.w	r3, [r3, #80]	; 0x50
 8002f0a:	2b01      	cmp	r3, #1
 8002f0c:	d101      	bne.n	8002f12 <HAL_SPI_Transmit+0x22>
 8002f0e:	2302      	movs	r3, #2
 8002f10:	e11e      	b.n	8003150 <HAL_SPI_Transmit+0x260>
 8002f12:	68fb      	ldr	r3, [r7, #12]
 8002f14:	2201      	movs	r2, #1
 8002f16:	f883 2050 	strb.w	r2, [r3, #80]	; 0x50

  /* Init tickstart for timeout management*/
  tickstart = HAL_GetTick();
 8002f1a:	f7fe fbd3 	bl	80016c4 <HAL_GetTick>
 8002f1e:	61b8      	str	r0, [r7, #24]
  initial_TxXferCount = Size;
 8002f20:	88fb      	ldrh	r3, [r7, #6]
 8002f22:	82fb      	strh	r3, [r7, #22]

  if (hspi->State != HAL_SPI_STATE_READY)
 8002f24:	68fb      	ldr	r3, [r7, #12]
 8002f26:	f893 3051 	ldrb.w	r3, [r3, #81]	; 0x51
 8002f2a:	b2db      	uxtb	r3, r3
 8002f2c:	2b01      	cmp	r3, #1
 8002f2e:	d002      	beq.n	8002f36 <HAL_SPI_Transmit+0x46>
  {
    errorcode = HAL_BUSY;
 8002f30:	2302      	movs	r3, #2
 8002f32:	77fb      	strb	r3, [r7, #31]
    goto error;
 8002f34:	e103      	b.n	800313e <HAL_SPI_Transmit+0x24e>
  }

  if ((pData == NULL) || (Size == 0U))
 8002f36:	68bb      	ldr	r3, [r7, #8]
 8002f38:	2b00      	cmp	r3, #0
 8002f3a:	d002      	beq.n	8002f42 <HAL_SPI_Transmit+0x52>
 8002f3c:	88fb      	ldrh	r3, [r7, #6]
 8002f3e:	2b00      	cmp	r3, #0
 8002f40:	d102      	bne.n	8002f48 <HAL_SPI_Transmit+0x58>
  {
    errorcode = HAL_ERROR;
 8002f42:	2301      	movs	r3, #1
 8002f44:	77fb      	strb	r3, [r7, #31]
    goto error;
 8002f46:	e0fa      	b.n	800313e <HAL_SPI_Transmit+0x24e>
  }

  /* Set the transaction information */
  hspi->State       = HAL_SPI_STATE_BUSY_TX;
 8002f48:	68fb      	ldr	r3, [r7, #12]
 8002f4a:	2203      	movs	r2, #3
 8002f4c:	f883 2051 	strb.w	r2, [r3, #81]	; 0x51
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 8002f50:	68fb      	ldr	r3, [r7, #12]
 8002f52:	2200      	movs	r2, #0
 8002f54:	655a      	str	r2, [r3, #84]	; 0x54
  hspi->pTxBuffPtr  = (uint8_t *)pData;
 8002f56:	68fb      	ldr	r3, [r7, #12]
 8002f58:	68ba      	ldr	r2, [r7, #8]
 8002f5a:	631a      	str	r2, [r3, #48]	; 0x30
  hspi->TxXferSize  = Size;
 8002f5c:	68fb      	ldr	r3, [r7, #12]
 8002f5e:	88fa      	ldrh	r2, [r7, #6]
 8002f60:	869a      	strh	r2, [r3, #52]	; 0x34
  hspi->TxXferCount = Size;
 8002f62:	68fb      	ldr	r3, [r7, #12]
 8002f64:	88fa      	ldrh	r2, [r7, #6]
 8002f66:	86da      	strh	r2, [r3, #54]	; 0x36

  /*Init field not used in handle to zero */
  hspi->pRxBuffPtr  = (uint8_t *)NULL;
 8002f68:	68fb      	ldr	r3, [r7, #12]
 8002f6a:	2200      	movs	r2, #0
 8002f6c:	639a      	str	r2, [r3, #56]	; 0x38
  hspi->RxXferSize  = 0U;
 8002f6e:	68fb      	ldr	r3, [r7, #12]
 8002f70:	2200      	movs	r2, #0
 8002f72:	879a      	strh	r2, [r3, #60]	; 0x3c
  hspi->RxXferCount = 0U;
 8002f74:	68fb      	ldr	r3, [r7, #12]
 8002f76:	2200      	movs	r2, #0
 8002f78:	87da      	strh	r2, [r3, #62]	; 0x3e
  hspi->TxISR       = NULL;
 8002f7a:	68fb      	ldr	r3, [r7, #12]
 8002f7c:	2200      	movs	r2, #0
 8002f7e:	645a      	str	r2, [r3, #68]	; 0x44
  hspi->RxISR       = NULL;
 8002f80:	68fb      	ldr	r3, [r7, #12]
 8002f82:	2200      	movs	r2, #0
 8002f84:	641a      	str	r2, [r3, #64]	; 0x40

  /* Configure communication direction : 1Line */
  if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
 8002f86:	68fb      	ldr	r3, [r7, #12]
 8002f88:	689b      	ldr	r3, [r3, #8]
 8002f8a:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
 8002f8e:	d107      	bne.n	8002fa0 <HAL_SPI_Transmit+0xb0>
  {
    SPI_1LINE_TX(hspi);
 8002f90:	68fb      	ldr	r3, [r7, #12]
 8002f92:	681b      	ldr	r3, [r3, #0]
 8002f94:	681a      	ldr	r2, [r3, #0]
 8002f96:	68fb      	ldr	r3, [r7, #12]
 8002f98:	681b      	ldr	r3, [r3, #0]
 8002f9a:	f442 4280 	orr.w	r2, r2, #16384	; 0x4000
 8002f9e:	601a      	str	r2, [r3, #0]
    SPI_RESET_CRC(hspi);
  }
#endif /* USE_SPI_CRC */

  /* Check if the SPI is already enabled */
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
 8002fa0:	68fb      	ldr	r3, [r7, #12]
 8002fa2:	681b      	ldr	r3, [r3, #0]
 8002fa4:	681b      	ldr	r3, [r3, #0]
 8002fa6:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8002faa:	2b40      	cmp	r3, #64	; 0x40
 8002fac:	d007      	beq.n	8002fbe <HAL_SPI_Transmit+0xce>
  {
    /* Enable SPI peripheral */
    __HAL_SPI_ENABLE(hspi);
 8002fae:	68fb      	ldr	r3, [r7, #12]
 8002fb0:	681b      	ldr	r3, [r3, #0]
 8002fb2:	681a      	ldr	r2, [r3, #0]
 8002fb4:	68fb      	ldr	r3, [r7, #12]
 8002fb6:	681b      	ldr	r3, [r3, #0]
 8002fb8:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8002fbc:	601a      	str	r2, [r3, #0]
  }

  /* Transmit data in 16 Bit mode */
  if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
 8002fbe:	68fb      	ldr	r3, [r7, #12]
 8002fc0:	68db      	ldr	r3, [r3, #12]
 8002fc2:	f5b3 6f00 	cmp.w	r3, #2048	; 0x800
 8002fc6:	d14b      	bne.n	8003060 <HAL_SPI_Transmit+0x170>
  {
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
 8002fc8:	68fb      	ldr	r3, [r7, #12]
 8002fca:	685b      	ldr	r3, [r3, #4]
 8002fcc:	2b00      	cmp	r3, #0
 8002fce:	d002      	beq.n	8002fd6 <HAL_SPI_Transmit+0xe6>
 8002fd0:	8afb      	ldrh	r3, [r7, #22]
 8002fd2:	2b01      	cmp	r3, #1
 8002fd4:	d13e      	bne.n	8003054 <HAL_SPI_Transmit+0x164>
    {
      hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
 8002fd6:	68fb      	ldr	r3, [r7, #12]
 8002fd8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8002fda:	881a      	ldrh	r2, [r3, #0]
 8002fdc:	68fb      	ldr	r3, [r7, #12]
 8002fde:	681b      	ldr	r3, [r3, #0]
 8002fe0:	60da      	str	r2, [r3, #12]
      hspi->pTxBuffPtr += sizeof(uint16_t);
 8002fe2:	68fb      	ldr	r3, [r7, #12]
 8002fe4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8002fe6:	1c9a      	adds	r2, r3, #2
 8002fe8:	68fb      	ldr	r3, [r7, #12]
 8002fea:	631a      	str	r2, [r3, #48]	; 0x30
      hspi->TxXferCount--;
 8002fec:	68fb      	ldr	r3, [r7, #12]
 8002fee:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 8002ff0:	b29b      	uxth	r3, r3
 8002ff2:	3b01      	subs	r3, #1
 8002ff4:	b29a      	uxth	r2, r3
 8002ff6:	68fb      	ldr	r3, [r7, #12]
 8002ff8:	86da      	strh	r2, [r3, #54]	; 0x36
    }
    /* Transmit data in 16 Bit mode */
    while (hspi->TxXferCount > 0U)
 8002ffa:	e02b      	b.n	8003054 <HAL_SPI_Transmit+0x164>
    {
      /* Wait until TXE flag is set to send data */
      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
 8002ffc:	68fb      	ldr	r3, [r7, #12]
 8002ffe:	681b      	ldr	r3, [r3, #0]
 8003000:	689b      	ldr	r3, [r3, #8]
 8003002:	f003 0302 	and.w	r3, r3, #2
 8003006:	2b02      	cmp	r3, #2
 8003008:	d112      	bne.n	8003030 <HAL_SPI_Transmit+0x140>
      {
        hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
 800300a:	68fb      	ldr	r3, [r7, #12]
 800300c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 800300e:	881a      	ldrh	r2, [r3, #0]
 8003010:	68fb      	ldr	r3, [r7, #12]
 8003012:	681b      	ldr	r3, [r3, #0]
 8003014:	60da      	str	r2, [r3, #12]
        hspi->pTxBuffPtr += sizeof(uint16_t);
 8003016:	68fb      	ldr	r3, [r7, #12]
 8003018:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 800301a:	1c9a      	adds	r2, r3, #2
 800301c:	68fb      	ldr	r3, [r7, #12]
 800301e:	631a      	str	r2, [r3, #48]	; 0x30
        hspi->TxXferCount--;
 8003020:	68fb      	ldr	r3, [r7, #12]
 8003022:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 8003024:	b29b      	uxth	r3, r3
 8003026:	3b01      	subs	r3, #1
 8003028:	b29a      	uxth	r2, r3
 800302a:	68fb      	ldr	r3, [r7, #12]
 800302c:	86da      	strh	r2, [r3, #54]	; 0x36
 800302e:	e011      	b.n	8003054 <HAL_SPI_Transmit+0x164>
      }
      else
      {
        /* Timeout management */
        if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
 8003030:	f7fe fb48 	bl	80016c4 <HAL_GetTick>
 8003034:	4602      	mov	r2, r0
 8003036:	69bb      	ldr	r3, [r7, #24]
 8003038:	1ad3      	subs	r3, r2, r3
 800303a:	683a      	ldr	r2, [r7, #0]
 800303c:	429a      	cmp	r2, r3
 800303e:	d803      	bhi.n	8003048 <HAL_SPI_Transmit+0x158>
 8003040:	683b      	ldr	r3, [r7, #0]
 8003042:	f1b3 3fff 	cmp.w	r3, #4294967295
 8003046:	d102      	bne.n	800304e <HAL_SPI_Transmit+0x15e>
 8003048:	683b      	ldr	r3, [r7, #0]
 800304a:	2b00      	cmp	r3, #0
 800304c:	d102      	bne.n	8003054 <HAL_SPI_Transmit+0x164>
        {
          errorcode = HAL_TIMEOUT;
 800304e:	2303      	movs	r3, #3
 8003050:	77fb      	strb	r3, [r7, #31]
          goto error;
 8003052:	e074      	b.n	800313e <HAL_SPI_Transmit+0x24e>
    while (hspi->TxXferCount > 0U)
 8003054:	68fb      	ldr	r3, [r7, #12]
 8003056:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 8003058:	b29b      	uxth	r3, r3
 800305a:	2b00      	cmp	r3, #0
 800305c:	d1ce      	bne.n	8002ffc <HAL_SPI_Transmit+0x10c>
 800305e:	e04c      	b.n	80030fa <HAL_SPI_Transmit+0x20a>
    }
  }
  /* Transmit data in 8 Bit mode */
  else
  {
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
 8003060:	68fb      	ldr	r3, [r7, #12]
 8003062:	685b      	ldr	r3, [r3, #4]
 8003064:	2b00      	cmp	r3, #0
 8003066:	d002      	beq.n	800306e <HAL_SPI_Transmit+0x17e>
 8003068:	8afb      	ldrh	r3, [r7, #22]
 800306a:	2b01      	cmp	r3, #1
 800306c:	d140      	bne.n	80030f0 <HAL_SPI_Transmit+0x200>
    {
      *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
 800306e:	68fb      	ldr	r3, [r7, #12]
 8003070:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8003072:	68fb      	ldr	r3, [r7, #12]
 8003074:	681b      	ldr	r3, [r3, #0]
 8003076:	330c      	adds	r3, #12
 8003078:	7812      	ldrb	r2, [r2, #0]
 800307a:	701a      	strb	r2, [r3, #0]
      hspi->pTxBuffPtr += sizeof(uint8_t);
 800307c:	68fb      	ldr	r3, [r7, #12]
 800307e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8003080:	1c5a      	adds	r2, r3, #1
 8003082:	68fb      	ldr	r3, [r7, #12]
 8003084:	631a      	str	r2, [r3, #48]	; 0x30
      hspi->TxXferCount--;
 8003086:	68fb      	ldr	r3, [r7, #12]
 8003088:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 800308a:	b29b      	uxth	r3, r3
 800308c:	3b01      	subs	r3, #1
 800308e:	b29a      	uxth	r2, r3
 8003090:	68fb      	ldr	r3, [r7, #12]
 8003092:	86da      	strh	r2, [r3, #54]	; 0x36
    }
    while (hspi->TxXferCount > 0U)
 8003094:	e02c      	b.n	80030f0 <HAL_SPI_Transmit+0x200>
    {
      /* Wait until TXE flag is set to send data */
      if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
 8003096:	68fb      	ldr	r3, [r7, #12]
 8003098:	681b      	ldr	r3, [r3, #0]
 800309a:	689b      	ldr	r3, [r3, #8]
 800309c:	f003 0302 	and.w	r3, r3, #2
 80030a0:	2b02      	cmp	r3, #2
 80030a2:	d113      	bne.n	80030cc <HAL_SPI_Transmit+0x1dc>
      {
        *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
 80030a4:	68fb      	ldr	r3, [r7, #12]
 80030a6:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 80030a8:	68fb      	ldr	r3, [r7, #12]
 80030aa:	681b      	ldr	r3, [r3, #0]
 80030ac:	330c      	adds	r3, #12
 80030ae:	7812      	ldrb	r2, [r2, #0]
 80030b0:	701a      	strb	r2, [r3, #0]
        hspi->pTxBuffPtr += sizeof(uint8_t);
 80030b2:	68fb      	ldr	r3, [r7, #12]
 80030b4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80030b6:	1c5a      	adds	r2, r3, #1
 80030b8:	68fb      	ldr	r3, [r7, #12]
 80030ba:	631a      	str	r2, [r3, #48]	; 0x30
        hspi->TxXferCount--;
 80030bc:	68fb      	ldr	r3, [r7, #12]
 80030be:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 80030c0:	b29b      	uxth	r3, r3
 80030c2:	3b01      	subs	r3, #1
 80030c4:	b29a      	uxth	r2, r3
 80030c6:	68fb      	ldr	r3, [r7, #12]
 80030c8:	86da      	strh	r2, [r3, #54]	; 0x36
 80030ca:	e011      	b.n	80030f0 <HAL_SPI_Transmit+0x200>
      }
      else
      {
        /* Timeout management */
        if ((((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
 80030cc:	f7fe fafa 	bl	80016c4 <HAL_GetTick>
 80030d0:	4602      	mov	r2, r0
 80030d2:	69bb      	ldr	r3, [r7, #24]
 80030d4:	1ad3      	subs	r3, r2, r3
 80030d6:	683a      	ldr	r2, [r7, #0]
 80030d8:	429a      	cmp	r2, r3
 80030da:	d803      	bhi.n	80030e4 <HAL_SPI_Transmit+0x1f4>
 80030dc:	683b      	ldr	r3, [r7, #0]
 80030de:	f1b3 3fff 	cmp.w	r3, #4294967295
 80030e2:	d102      	bne.n	80030ea <HAL_SPI_Transmit+0x1fa>
 80030e4:	683b      	ldr	r3, [r7, #0]
 80030e6:	2b00      	cmp	r3, #0
 80030e8:	d102      	bne.n	80030f0 <HAL_SPI_Transmit+0x200>
        {
          errorcode = HAL_TIMEOUT;
 80030ea:	2303      	movs	r3, #3
 80030ec:	77fb      	strb	r3, [r7, #31]
          goto error;
 80030ee:	e026      	b.n	800313e <HAL_SPI_Transmit+0x24e>
    while (hspi->TxXferCount > 0U)
 80030f0:	68fb      	ldr	r3, [r7, #12]
 80030f2:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 80030f4:	b29b      	uxth	r3, r3
 80030f6:	2b00      	cmp	r3, #0
 80030f8:	d1cd      	bne.n	8003096 <HAL_SPI_Transmit+0x1a6>
    SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);
  }
#endif /* USE_SPI_CRC */

  /* Check the end of the transaction */
  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
 80030fa:	69ba      	ldr	r2, [r7, #24]
 80030fc:	6839      	ldr	r1, [r7, #0]
 80030fe:	68f8      	ldr	r0, [r7, #12]
 8003100:	f000 fa36 	bl	8003570 <SPI_EndRxTxTransaction>
 8003104:	4603      	mov	r3, r0
 8003106:	2b00      	cmp	r3, #0
 8003108:	d002      	beq.n	8003110 <HAL_SPI_Transmit+0x220>
  {
    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
 800310a:	68fb      	ldr	r3, [r7, #12]
 800310c:	2220      	movs	r2, #32
 800310e:	655a      	str	r2, [r3, #84]	; 0x54
  }

  /* Clear overrun flag in 2 Lines communication mode because received is not read */
  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
 8003110:	68fb      	ldr	r3, [r7, #12]
 8003112:	689b      	ldr	r3, [r3, #8]
 8003114:	2b00      	cmp	r3, #0
 8003116:	d10a      	bne.n	800312e <HAL_SPI_Transmit+0x23e>
  {
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
 8003118:	2300      	movs	r3, #0
 800311a:	613b      	str	r3, [r7, #16]
 800311c:	68fb      	ldr	r3, [r7, #12]
 800311e:	681b      	ldr	r3, [r3, #0]
 8003120:	68db      	ldr	r3, [r3, #12]
 8003122:	613b      	str	r3, [r7, #16]
 8003124:	68fb      	ldr	r3, [r7, #12]
 8003126:	681b      	ldr	r3, [r3, #0]
 8003128:	689b      	ldr	r3, [r3, #8]
 800312a:	613b      	str	r3, [r7, #16]
 800312c:	693b      	ldr	r3, [r7, #16]
  }

  if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
 800312e:	68fb      	ldr	r3, [r7, #12]
 8003130:	6d5b      	ldr	r3, [r3, #84]	; 0x54
 8003132:	2b00      	cmp	r3, #0
 8003134:	d002      	beq.n	800313c <HAL_SPI_Transmit+0x24c>
  {
    errorcode = HAL_ERROR;
 8003136:	2301      	movs	r3, #1
 8003138:	77fb      	strb	r3, [r7, #31]
 800313a:	e000      	b.n	800313e <HAL_SPI_Transmit+0x24e>
  }

error:
 800313c:	bf00      	nop
  hspi->State = HAL_SPI_STATE_READY;
 800313e:	68fb      	ldr	r3, [r7, #12]
 8003140:	2201      	movs	r2, #1
 8003142:	f883 2051 	strb.w	r2, [r3, #81]	; 0x51
  /* Process Unlocked */
  __HAL_UNLOCK(hspi);
 8003146:	68fb      	ldr	r3, [r7, #12]
 8003148:	2200      	movs	r2, #0
 800314a:	f883 2050 	strb.w	r2, [r3, #80]	; 0x50
  return errorcode;
 800314e:	7ffb      	ldrb	r3, [r7, #31]
}
 8003150:	4618      	mov	r0, r3
 8003152:	3720      	adds	r7, #32
 8003154:	46bd      	mov	sp, r7
 8003156:	bd80      	pop	{r7, pc}

08003158 <HAL_SPI_TransmitReceive>:
  * @param  Timeout Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
                                          uint32_t Timeout)
{
 8003158:	b580      	push	{r7, lr}
 800315a:	b08c      	sub	sp, #48	; 0x30
 800315c:	af00      	add	r7, sp, #0
 800315e:	60f8      	str	r0, [r7, #12]
 8003160:	60b9      	str	r1, [r7, #8]
 8003162:	607a      	str	r2, [r7, #4]
 8003164:	807b      	strh	r3, [r7, #2]
  uint32_t             tmp_mode;
  HAL_SPI_StateTypeDef tmp_state;
  uint32_t             tickstart;

  /* Variable used to alternate Rx and Tx during transfer */
  uint32_t             txallowed = 1U;
 8003166:	2301      	movs	r3, #1
 8003168:	62fb      	str	r3, [r7, #44]	; 0x2c
  HAL_StatusTypeDef    errorcode = HAL_OK;
 800316a:	2300      	movs	r3, #0
 800316c:	f887 302b 	strb.w	r3, [r7, #43]	; 0x2b

  /* Check Direction parameter */
  assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));

  /* Process Locked */
  __HAL_LOCK(hspi);
 8003170:	68fb      	ldr	r3, [r7, #12]
 8003172:	f893 3050 	ldrb.w	r3, [r3, #80]	; 0x50
 8003176:	2b01      	cmp	r3, #1
 8003178:	d101      	bne.n	800317e <HAL_SPI_TransmitReceive+0x26>
 800317a:	2302      	movs	r3, #2
 800317c:	e18a      	b.n	8003494 <HAL_SPI_TransmitReceive+0x33c>
 800317e:	68fb      	ldr	r3, [r7, #12]
 8003180:	2201      	movs	r2, #1
 8003182:	f883 2050 	strb.w	r2, [r3, #80]	; 0x50

  /* Init tickstart for timeout management*/
  tickstart = HAL_GetTick();
 8003186:	f7fe fa9d 	bl	80016c4 <HAL_GetTick>
 800318a:	6278      	str	r0, [r7, #36]	; 0x24

  /* Init temporary variables */
  tmp_state           = hspi->State;
 800318c:	68fb      	ldr	r3, [r7, #12]
 800318e:	f893 3051 	ldrb.w	r3, [r3, #81]	; 0x51
 8003192:	f887 3023 	strb.w	r3, [r7, #35]	; 0x23
  tmp_mode            = hspi->Init.Mode;
 8003196:	68fb      	ldr	r3, [r7, #12]
 8003198:	685b      	ldr	r3, [r3, #4]
 800319a:	61fb      	str	r3, [r7, #28]
  initial_TxXferCount = Size;
 800319c:	887b      	ldrh	r3, [r7, #2]
 800319e:	837b      	strh	r3, [r7, #26]

  if (!((tmp_state == HAL_SPI_STATE_READY) || \
 80031a0:	f897 3023 	ldrb.w	r3, [r7, #35]	; 0x23
 80031a4:	2b01      	cmp	r3, #1
 80031a6:	d00f      	beq.n	80031c8 <HAL_SPI_TransmitReceive+0x70>
 80031a8:	69fb      	ldr	r3, [r7, #28]
 80031aa:	f5b3 7f82 	cmp.w	r3, #260	; 0x104
 80031ae:	d107      	bne.n	80031c0 <HAL_SPI_TransmitReceive+0x68>
        ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
 80031b0:	68fb      	ldr	r3, [r7, #12]
 80031b2:	689b      	ldr	r3, [r3, #8]
 80031b4:	2b00      	cmp	r3, #0
 80031b6:	d103      	bne.n	80031c0 <HAL_SPI_TransmitReceive+0x68>
 80031b8:	f897 3023 	ldrb.w	r3, [r7, #35]	; 0x23
 80031bc:	2b04      	cmp	r3, #4
 80031be:	d003      	beq.n	80031c8 <HAL_SPI_TransmitReceive+0x70>
  {
    errorcode = HAL_BUSY;
 80031c0:	2302      	movs	r3, #2
 80031c2:	f887 302b 	strb.w	r3, [r7, #43]	; 0x2b
    goto error;
 80031c6:	e15b      	b.n	8003480 <HAL_SPI_TransmitReceive+0x328>
  }

  if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
 80031c8:	68bb      	ldr	r3, [r7, #8]
 80031ca:	2b00      	cmp	r3, #0
 80031cc:	d005      	beq.n	80031da <HAL_SPI_TransmitReceive+0x82>
 80031ce:	687b      	ldr	r3, [r7, #4]
 80031d0:	2b00      	cmp	r3, #0
 80031d2:	d002      	beq.n	80031da <HAL_SPI_TransmitReceive+0x82>
 80031d4:	887b      	ldrh	r3, [r7, #2]
 80031d6:	2b00      	cmp	r3, #0
 80031d8:	d103      	bne.n	80031e2 <HAL_SPI_TransmitReceive+0x8a>
  {
    errorcode = HAL_ERROR;
 80031da:	2301      	movs	r3, #1
 80031dc:	f887 302b 	strb.w	r3, [r7, #43]	; 0x2b
    goto error;
 80031e0:	e14e      	b.n	8003480 <HAL_SPI_TransmitReceive+0x328>
  }

  /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  if (hspi->State != HAL_SPI_STATE_BUSY_RX)
 80031e2:	68fb      	ldr	r3, [r7, #12]
 80031e4:	f893 3051 	ldrb.w	r3, [r3, #81]	; 0x51
 80031e8:	b2db      	uxtb	r3, r3
 80031ea:	2b04      	cmp	r3, #4
 80031ec:	d003      	beq.n	80031f6 <HAL_SPI_TransmitReceive+0x9e>
  {
    hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
 80031ee:	68fb      	ldr	r3, [r7, #12]
 80031f0:	2205      	movs	r2, #5
 80031f2:	f883 2051 	strb.w	r2, [r3, #81]	; 0x51
  }

  /* Set the transaction information */
  hspi->ErrorCode   = HAL_SPI_ERROR_NONE;
 80031f6:	68fb      	ldr	r3, [r7, #12]
 80031f8:	2200      	movs	r2, #0
 80031fa:	655a      	str	r2, [r3, #84]	; 0x54
  hspi->pRxBuffPtr  = (uint8_t *)pRxData;
 80031fc:	68fb      	ldr	r3, [r7, #12]
 80031fe:	687a      	ldr	r2, [r7, #4]
 8003200:	639a      	str	r2, [r3, #56]	; 0x38
  hspi->RxXferCount = Size;
 8003202:	68fb      	ldr	r3, [r7, #12]
 8003204:	887a      	ldrh	r2, [r7, #2]
 8003206:	87da      	strh	r2, [r3, #62]	; 0x3e
  hspi->RxXferSize  = Size;
 8003208:	68fb      	ldr	r3, [r7, #12]
 800320a:	887a      	ldrh	r2, [r7, #2]
 800320c:	879a      	strh	r2, [r3, #60]	; 0x3c
  hspi->pTxBuffPtr  = (uint8_t *)pTxData;
 800320e:	68fb      	ldr	r3, [r7, #12]
 8003210:	68ba      	ldr	r2, [r7, #8]
 8003212:	631a      	str	r2, [r3, #48]	; 0x30
  hspi->TxXferCount = Size;
 8003214:	68fb      	ldr	r3, [r7, #12]
 8003216:	887a      	ldrh	r2, [r7, #2]
 8003218:	86da      	strh	r2, [r3, #54]	; 0x36
  hspi->TxXferSize  = Size;
 800321a:	68fb      	ldr	r3, [r7, #12]
 800321c:	887a      	ldrh	r2, [r7, #2]
 800321e:	869a      	strh	r2, [r3, #52]	; 0x34

  /*Init field not used in handle to zero */
  hspi->RxISR       = NULL;
 8003220:	68fb      	ldr	r3, [r7, #12]
 8003222:	2200      	movs	r2, #0
 8003224:	641a      	str	r2, [r3, #64]	; 0x40
  hspi->TxISR       = NULL;
 8003226:	68fb      	ldr	r3, [r7, #12]
 8003228:	2200      	movs	r2, #0
 800322a:	645a      	str	r2, [r3, #68]	; 0x44
    SPI_RESET_CRC(hspi);
  }
#endif /* USE_SPI_CRC */

  /* Check if the SPI is already enabled */
  if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
 800322c:	68fb      	ldr	r3, [r7, #12]
 800322e:	681b      	ldr	r3, [r3, #0]
 8003230:	681b      	ldr	r3, [r3, #0]
 8003232:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8003236:	2b40      	cmp	r3, #64	; 0x40
 8003238:	d007      	beq.n	800324a <HAL_SPI_TransmitReceive+0xf2>
  {
    /* Enable SPI peripheral */
    __HAL_SPI_ENABLE(hspi);
 800323a:	68fb      	ldr	r3, [r7, #12]
 800323c:	681b      	ldr	r3, [r3, #0]
 800323e:	681a      	ldr	r2, [r3, #0]
 8003240:	68fb      	ldr	r3, [r7, #12]
 8003242:	681b      	ldr	r3, [r3, #0]
 8003244:	f042 0240 	orr.w	r2, r2, #64	; 0x40
 8003248:	601a      	str	r2, [r3, #0]
  }

  /* Transmit and Receive data in 16 Bit mode */
  if (hspi->Init.DataSize == SPI_DATASIZE_16BIT)
 800324a:	68fb      	ldr	r3, [r7, #12]
 800324c:	68db      	ldr	r3, [r3, #12]
 800324e:	f5b3 6f00 	cmp.w	r3, #2048	; 0x800
 8003252:	d178      	bne.n	8003346 <HAL_SPI_TransmitReceive+0x1ee>
  {
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
 8003254:	68fb      	ldr	r3, [r7, #12]
 8003256:	685b      	ldr	r3, [r3, #4]
 8003258:	2b00      	cmp	r3, #0
 800325a:	d002      	beq.n	8003262 <HAL_SPI_TransmitReceive+0x10a>
 800325c:	8b7b      	ldrh	r3, [r7, #26]
 800325e:	2b01      	cmp	r3, #1
 8003260:	d166      	bne.n	8003330 <HAL_SPI_TransmitReceive+0x1d8>
    {
      hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
 8003262:	68fb      	ldr	r3, [r7, #12]
 8003264:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8003266:	881a      	ldrh	r2, [r3, #0]
 8003268:	68fb      	ldr	r3, [r7, #12]
 800326a:	681b      	ldr	r3, [r3, #0]
 800326c:	60da      	str	r2, [r3, #12]
      hspi->pTxBuffPtr += sizeof(uint16_t);
 800326e:	68fb      	ldr	r3, [r7, #12]
 8003270:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8003272:	1c9a      	adds	r2, r3, #2
 8003274:	68fb      	ldr	r3, [r7, #12]
 8003276:	631a      	str	r2, [r3, #48]	; 0x30
      hspi->TxXferCount--;
 8003278:	68fb      	ldr	r3, [r7, #12]
 800327a:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 800327c:	b29b      	uxth	r3, r3
 800327e:	3b01      	subs	r3, #1
 8003280:	b29a      	uxth	r2, r3
 8003282:	68fb      	ldr	r3, [r7, #12]
 8003284:	86da      	strh	r2, [r3, #54]	; 0x36
    }
    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
 8003286:	e053      	b.n	8003330 <HAL_SPI_TransmitReceive+0x1d8>
    {
      /* Check TXE flag */
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
 8003288:	68fb      	ldr	r3, [r7, #12]
 800328a:	681b      	ldr	r3, [r3, #0]
 800328c:	689b      	ldr	r3, [r3, #8]
 800328e:	f003 0302 	and.w	r3, r3, #2
 8003292:	2b02      	cmp	r3, #2
 8003294:	d11b      	bne.n	80032ce <HAL_SPI_TransmitReceive+0x176>
 8003296:	68fb      	ldr	r3, [r7, #12]
 8003298:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 800329a:	b29b      	uxth	r3, r3
 800329c:	2b00      	cmp	r3, #0
 800329e:	d016      	beq.n	80032ce <HAL_SPI_TransmitReceive+0x176>
 80032a0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
 80032a2:	2b01      	cmp	r3, #1
 80032a4:	d113      	bne.n	80032ce <HAL_SPI_TransmitReceive+0x176>
      {
        hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
 80032a6:	68fb      	ldr	r3, [r7, #12]
 80032a8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80032aa:	881a      	ldrh	r2, [r3, #0]
 80032ac:	68fb      	ldr	r3, [r7, #12]
 80032ae:	681b      	ldr	r3, [r3, #0]
 80032b0:	60da      	str	r2, [r3, #12]
        hspi->pTxBuffPtr += sizeof(uint16_t);
 80032b2:	68fb      	ldr	r3, [r7, #12]
 80032b4:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80032b6:	1c9a      	adds	r2, r3, #2
 80032b8:	68fb      	ldr	r3, [r7, #12]
 80032ba:	631a      	str	r2, [r3, #48]	; 0x30
        hspi->TxXferCount--;
 80032bc:	68fb      	ldr	r3, [r7, #12]
 80032be:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 80032c0:	b29b      	uxth	r3, r3
 80032c2:	3b01      	subs	r3, #1
 80032c4:	b29a      	uxth	r2, r3
 80032c6:	68fb      	ldr	r3, [r7, #12]
 80032c8:	86da      	strh	r2, [r3, #54]	; 0x36
        /* Next Data is a reception (Rx). Tx not allowed */
        txallowed = 0U;
 80032ca:	2300      	movs	r3, #0
 80032cc:	62fb      	str	r3, [r7, #44]	; 0x2c
        }
#endif /* USE_SPI_CRC */
      }

      /* Check RXNE flag */
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
 80032ce:	68fb      	ldr	r3, [r7, #12]
 80032d0:	681b      	ldr	r3, [r3, #0]
 80032d2:	689b      	ldr	r3, [r3, #8]
 80032d4:	f003 0301 	and.w	r3, r3, #1
 80032d8:	2b01      	cmp	r3, #1
 80032da:	d119      	bne.n	8003310 <HAL_SPI_TransmitReceive+0x1b8>
 80032dc:	68fb      	ldr	r3, [r7, #12]
 80032de:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
 80032e0:	b29b      	uxth	r3, r3
 80032e2:	2b00      	cmp	r3, #0
 80032e4:	d014      	beq.n	8003310 <HAL_SPI_TransmitReceive+0x1b8>
      {
        *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
 80032e6:	68fb      	ldr	r3, [r7, #12]
 80032e8:	681b      	ldr	r3, [r3, #0]
 80032ea:	68da      	ldr	r2, [r3, #12]
 80032ec:	68fb      	ldr	r3, [r7, #12]
 80032ee:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 80032f0:	b292      	uxth	r2, r2
 80032f2:	801a      	strh	r2, [r3, #0]
        hspi->pRxBuffPtr += sizeof(uint16_t);
 80032f4:	68fb      	ldr	r3, [r7, #12]
 80032f6:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 80032f8:	1c9a      	adds	r2, r3, #2
 80032fa:	68fb      	ldr	r3, [r7, #12]
 80032fc:	639a      	str	r2, [r3, #56]	; 0x38
        hspi->RxXferCount--;
 80032fe:	68fb      	ldr	r3, [r7, #12]
 8003300:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
 8003302:	b29b      	uxth	r3, r3
 8003304:	3b01      	subs	r3, #1
 8003306:	b29a      	uxth	r2, r3
 8003308:	68fb      	ldr	r3, [r7, #12]
 800330a:	87da      	strh	r2, [r3, #62]	; 0x3e
        /* Next Data is a Transmission (Tx). Tx is allowed */
        txallowed = 1U;
 800330c:	2301      	movs	r3, #1
 800330e:	62fb      	str	r3, [r7, #44]	; 0x2c
      }
      if (((HAL_GetTick() - tickstart) >=  Timeout) && (Timeout != HAL_MAX_DELAY))
 8003310:	f7fe f9d8 	bl	80016c4 <HAL_GetTick>
 8003314:	4602      	mov	r2, r0
 8003316:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8003318:	1ad3      	subs	r3, r2, r3
 800331a:	6bba      	ldr	r2, [r7, #56]	; 0x38
 800331c:	429a      	cmp	r2, r3
 800331e:	d807      	bhi.n	8003330 <HAL_SPI_TransmitReceive+0x1d8>
 8003320:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8003322:	f1b3 3fff 	cmp.w	r3, #4294967295
 8003326:	d003      	beq.n	8003330 <HAL_SPI_TransmitReceive+0x1d8>
      {
        errorcode = HAL_TIMEOUT;
 8003328:	2303      	movs	r3, #3
 800332a:	f887 302b 	strb.w	r3, [r7, #43]	; 0x2b
        goto error;
 800332e:	e0a7      	b.n	8003480 <HAL_SPI_TransmitReceive+0x328>
    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
 8003330:	68fb      	ldr	r3, [r7, #12]
 8003332:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 8003334:	b29b      	uxth	r3, r3
 8003336:	2b00      	cmp	r3, #0
 8003338:	d1a6      	bne.n	8003288 <HAL_SPI_TransmitReceive+0x130>
 800333a:	68fb      	ldr	r3, [r7, #12]
 800333c:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
 800333e:	b29b      	uxth	r3, r3
 8003340:	2b00      	cmp	r3, #0
 8003342:	d1a1      	bne.n	8003288 <HAL_SPI_TransmitReceive+0x130>
 8003344:	e07c      	b.n	8003440 <HAL_SPI_TransmitReceive+0x2e8>
    }
  }
  /* Transmit and Receive data in 8 Bit mode */
  else
  {
    if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
 8003346:	68fb      	ldr	r3, [r7, #12]
 8003348:	685b      	ldr	r3, [r3, #4]
 800334a:	2b00      	cmp	r3, #0
 800334c:	d002      	beq.n	8003354 <HAL_SPI_TransmitReceive+0x1fc>
 800334e:	8b7b      	ldrh	r3, [r7, #26]
 8003350:	2b01      	cmp	r3, #1
 8003352:	d16b      	bne.n	800342c <HAL_SPI_TransmitReceive+0x2d4>
    {
      *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
 8003354:	68fb      	ldr	r3, [r7, #12]
 8003356:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 8003358:	68fb      	ldr	r3, [r7, #12]
 800335a:	681b      	ldr	r3, [r3, #0]
 800335c:	330c      	adds	r3, #12
 800335e:	7812      	ldrb	r2, [r2, #0]
 8003360:	701a      	strb	r2, [r3, #0]
      hspi->pTxBuffPtr += sizeof(uint8_t);
 8003362:	68fb      	ldr	r3, [r7, #12]
 8003364:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8003366:	1c5a      	adds	r2, r3, #1
 8003368:	68fb      	ldr	r3, [r7, #12]
 800336a:	631a      	str	r2, [r3, #48]	; 0x30
      hspi->TxXferCount--;
 800336c:	68fb      	ldr	r3, [r7, #12]
 800336e:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 8003370:	b29b      	uxth	r3, r3
 8003372:	3b01      	subs	r3, #1
 8003374:	b29a      	uxth	r2, r3
 8003376:	68fb      	ldr	r3, [r7, #12]
 8003378:	86da      	strh	r2, [r3, #54]	; 0x36
    }
    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
 800337a:	e057      	b.n	800342c <HAL_SPI_TransmitReceive+0x2d4>
    {
      /* Check TXE flag */
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
 800337c:	68fb      	ldr	r3, [r7, #12]
 800337e:	681b      	ldr	r3, [r3, #0]
 8003380:	689b      	ldr	r3, [r3, #8]
 8003382:	f003 0302 	and.w	r3, r3, #2
 8003386:	2b02      	cmp	r3, #2
 8003388:	d11c      	bne.n	80033c4 <HAL_SPI_TransmitReceive+0x26c>
 800338a:	68fb      	ldr	r3, [r7, #12]
 800338c:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 800338e:	b29b      	uxth	r3, r3
 8003390:	2b00      	cmp	r3, #0
 8003392:	d017      	beq.n	80033c4 <HAL_SPI_TransmitReceive+0x26c>
 8003394:	6afb      	ldr	r3, [r7, #44]	; 0x2c
 8003396:	2b01      	cmp	r3, #1
 8003398:	d114      	bne.n	80033c4 <HAL_SPI_TransmitReceive+0x26c>
      {
        *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
 800339a:	68fb      	ldr	r3, [r7, #12]
 800339c:	6b1a      	ldr	r2, [r3, #48]	; 0x30
 800339e:	68fb      	ldr	r3, [r7, #12]
 80033a0:	681b      	ldr	r3, [r3, #0]
 80033a2:	330c      	adds	r3, #12
 80033a4:	7812      	ldrb	r2, [r2, #0]
 80033a6:	701a      	strb	r2, [r3, #0]
        hspi->pTxBuffPtr++;
 80033a8:	68fb      	ldr	r3, [r7, #12]
 80033aa:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 80033ac:	1c5a      	adds	r2, r3, #1
 80033ae:	68fb      	ldr	r3, [r7, #12]
 80033b0:	631a      	str	r2, [r3, #48]	; 0x30
        hspi->TxXferCount--;
 80033b2:	68fb      	ldr	r3, [r7, #12]
 80033b4:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 80033b6:	b29b      	uxth	r3, r3
 80033b8:	3b01      	subs	r3, #1
 80033ba:	b29a      	uxth	r2, r3
 80033bc:	68fb      	ldr	r3, [r7, #12]
 80033be:	86da      	strh	r2, [r3, #54]	; 0x36
        /* Next Data is a reception (Rx). Tx not allowed */
        txallowed = 0U;
 80033c0:	2300      	movs	r3, #0
 80033c2:	62fb      	str	r3, [r7, #44]	; 0x2c
        }
#endif /* USE_SPI_CRC */
      }

      /* Wait until RXNE flag is reset */
      if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
 80033c4:	68fb      	ldr	r3, [r7, #12]
 80033c6:	681b      	ldr	r3, [r3, #0]
 80033c8:	689b      	ldr	r3, [r3, #8]
 80033ca:	f003 0301 	and.w	r3, r3, #1
 80033ce:	2b01      	cmp	r3, #1
 80033d0:	d119      	bne.n	8003406 <HAL_SPI_TransmitReceive+0x2ae>
 80033d2:	68fb      	ldr	r3, [r7, #12]
 80033d4:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
 80033d6:	b29b      	uxth	r3, r3
 80033d8:	2b00      	cmp	r3, #0
 80033da:	d014      	beq.n	8003406 <HAL_SPI_TransmitReceive+0x2ae>
      {
        (*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;
 80033dc:	68fb      	ldr	r3, [r7, #12]
 80033de:	681b      	ldr	r3, [r3, #0]
 80033e0:	68da      	ldr	r2, [r3, #12]
 80033e2:	68fb      	ldr	r3, [r7, #12]
 80033e4:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 80033e6:	b2d2      	uxtb	r2, r2
 80033e8:	701a      	strb	r2, [r3, #0]
        hspi->pRxBuffPtr++;
 80033ea:	68fb      	ldr	r3, [r7, #12]
 80033ec:	6b9b      	ldr	r3, [r3, #56]	; 0x38
 80033ee:	1c5a      	adds	r2, r3, #1
 80033f0:	68fb      	ldr	r3, [r7, #12]
 80033f2:	639a      	str	r2, [r3, #56]	; 0x38
        hspi->RxXferCount--;
 80033f4:	68fb      	ldr	r3, [r7, #12]
 80033f6:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
 80033f8:	b29b      	uxth	r3, r3
 80033fa:	3b01      	subs	r3, #1
 80033fc:	b29a      	uxth	r2, r3
 80033fe:	68fb      	ldr	r3, [r7, #12]
 8003400:	87da      	strh	r2, [r3, #62]	; 0x3e
        /* Next Data is a Transmission (Tx). Tx is allowed */
        txallowed = 1U;
 8003402:	2301      	movs	r3, #1
 8003404:	62fb      	str	r3, [r7, #44]	; 0x2c
      }
      if ((((HAL_GetTick() - tickstart) >=  Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
 8003406:	f7fe f95d 	bl	80016c4 <HAL_GetTick>
 800340a:	4602      	mov	r2, r0
 800340c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 800340e:	1ad3      	subs	r3, r2, r3
 8003410:	6bba      	ldr	r2, [r7, #56]	; 0x38
 8003412:	429a      	cmp	r2, r3
 8003414:	d803      	bhi.n	800341e <HAL_SPI_TransmitReceive+0x2c6>
 8003416:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8003418:	f1b3 3fff 	cmp.w	r3, #4294967295
 800341c:	d102      	bne.n	8003424 <HAL_SPI_TransmitReceive+0x2cc>
 800341e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8003420:	2b00      	cmp	r3, #0
 8003422:	d103      	bne.n	800342c <HAL_SPI_TransmitReceive+0x2d4>
      {
        errorcode = HAL_TIMEOUT;
 8003424:	2303      	movs	r3, #3
 8003426:	f887 302b 	strb.w	r3, [r7, #43]	; 0x2b
        goto error;
 800342a:	e029      	b.n	8003480 <HAL_SPI_TransmitReceive+0x328>
    while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
 800342c:	68fb      	ldr	r3, [r7, #12]
 800342e:	8edb      	ldrh	r3, [r3, #54]	; 0x36
 8003430:	b29b      	uxth	r3, r3
 8003432:	2b00      	cmp	r3, #0
 8003434:	d1a2      	bne.n	800337c <HAL_SPI_TransmitReceive+0x224>
 8003436:	68fb      	ldr	r3, [r7, #12]
 8003438:	8fdb      	ldrh	r3, [r3, #62]	; 0x3e
 800343a:	b29b      	uxth	r3, r3
 800343c:	2b00      	cmp	r3, #0
 800343e:	d19d      	bne.n	800337c <HAL_SPI_TransmitReceive+0x224>
    errorcode = HAL_ERROR;
  }
#endif /* USE_SPI_CRC */

  /* Check the end of the transaction */
  if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
 8003440:	6a7a      	ldr	r2, [r7, #36]	; 0x24
 8003442:	6bb9      	ldr	r1, [r7, #56]	; 0x38
 8003444:	68f8      	ldr	r0, [r7, #12]
 8003446:	f000 f893 	bl	8003570 <SPI_EndRxTxTransaction>
 800344a:	4603      	mov	r3, r0
 800344c:	2b00      	cmp	r3, #0
 800344e:	d006      	beq.n	800345e <HAL_SPI_TransmitReceive+0x306>
  {
    errorcode = HAL_ERROR;
 8003450:	2301      	movs	r3, #1
 8003452:	f887 302b 	strb.w	r3, [r7, #43]	; 0x2b
    hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
 8003456:	68fb      	ldr	r3, [r7, #12]
 8003458:	2220      	movs	r2, #32
 800345a:	655a      	str	r2, [r3, #84]	; 0x54
    goto error;
 800345c:	e010      	b.n	8003480 <HAL_SPI_TransmitReceive+0x328>
  }

  /* Clear overrun flag in 2 Lines communication mode because received is not read */
  if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
 800345e:	68fb      	ldr	r3, [r7, #12]
 8003460:	689b      	ldr	r3, [r3, #8]
 8003462:	2b00      	cmp	r3, #0
 8003464:	d10b      	bne.n	800347e <HAL_SPI_TransmitReceive+0x326>
  {
    __HAL_SPI_CLEAR_OVRFLAG(hspi);
 8003466:	2300      	movs	r3, #0
 8003468:	617b      	str	r3, [r7, #20]
 800346a:	68fb      	ldr	r3, [r7, #12]
 800346c:	681b      	ldr	r3, [r3, #0]
 800346e:	68db      	ldr	r3, [r3, #12]
 8003470:	617b      	str	r3, [r7, #20]
 8003472:	68fb      	ldr	r3, [r7, #12]
 8003474:	681b      	ldr	r3, [r3, #0]
 8003476:	689b      	ldr	r3, [r3, #8]
 8003478:	617b      	str	r3, [r7, #20]
 800347a:	697b      	ldr	r3, [r7, #20]
 800347c:	e000      	b.n	8003480 <HAL_SPI_TransmitReceive+0x328>
  }

error :
 800347e:	bf00      	nop
  hspi->State = HAL_SPI_STATE_READY;
 8003480:	68fb      	ldr	r3, [r7, #12]
 8003482:	2201      	movs	r2, #1
 8003484:	f883 2051 	strb.w	r2, [r3, #81]	; 0x51
  __HAL_UNLOCK(hspi);
 8003488:	68fb      	ldr	r3, [r7, #12]
 800348a:	2200      	movs	r2, #0
 800348c:	f883 2050 	strb.w	r2, [r3, #80]	; 0x50
  return errorcode;
 8003490:	f897 302b 	ldrb.w	r3, [r7, #43]	; 0x2b
}
 8003494:	4618      	mov	r0, r3
 8003496:	3730      	adds	r7, #48	; 0x30
 8003498:	46bd      	mov	sp, r7
 800349a:	bd80      	pop	{r7, pc}

0800349c <SPI_WaitFlagStateUntilTimeout>:
  * @param  Tickstart tick start value
  * @retval HAL status
  */
static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
                                                       uint32_t Timeout, uint32_t Tickstart)
{
 800349c:	b580      	push	{r7, lr}
 800349e:	b084      	sub	sp, #16
 80034a0:	af00      	add	r7, sp, #0
 80034a2:	60f8      	str	r0, [r7, #12]
 80034a4:	60b9      	str	r1, [r7, #8]
 80034a6:	603b      	str	r3, [r7, #0]
 80034a8:	4613      	mov	r3, r2
 80034aa:	71fb      	strb	r3, [r7, #7]
  while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
 80034ac:	e04c      	b.n	8003548 <SPI_WaitFlagStateUntilTimeout+0xac>
  {
    if (Timeout != HAL_MAX_DELAY)
 80034ae:	683b      	ldr	r3, [r7, #0]
 80034b0:	f1b3 3fff 	cmp.w	r3, #4294967295
 80034b4:	d048      	beq.n	8003548 <SPI_WaitFlagStateUntilTimeout+0xac>
    {
      if (((HAL_GetTick() - Tickstart) >= Timeout) || (Timeout == 0U))
 80034b6:	f7fe f905 	bl	80016c4 <HAL_GetTick>
 80034ba:	4602      	mov	r2, r0
 80034bc:	69bb      	ldr	r3, [r7, #24]
 80034be:	1ad3      	subs	r3, r2, r3
 80034c0:	683a      	ldr	r2, [r7, #0]
 80034c2:	429a      	cmp	r2, r3
 80034c4:	d902      	bls.n	80034cc <SPI_WaitFlagStateUntilTimeout+0x30>
 80034c6:	683b      	ldr	r3, [r7, #0]
 80034c8:	2b00      	cmp	r3, #0
 80034ca:	d13d      	bne.n	8003548 <SPI_WaitFlagStateUntilTimeout+0xac>
        /* Disable the SPI and reset the CRC: the CRC value should be cleared
        on both master and slave sides in order to resynchronize the master
        and slave for their respective CRC calculation */

        /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
        __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
 80034cc:	68fb      	ldr	r3, [r7, #12]
 80034ce:	681b      	ldr	r3, [r3, #0]
 80034d0:	685a      	ldr	r2, [r3, #4]
 80034d2:	68fb      	ldr	r3, [r7, #12]
 80034d4:	681b      	ldr	r3, [r3, #0]
 80034d6:	f022 02e0 	bic.w	r2, r2, #224	; 0xe0
 80034da:	605a      	str	r2, [r3, #4]

        if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
 80034dc:	68fb      	ldr	r3, [r7, #12]
 80034de:	685b      	ldr	r3, [r3, #4]
 80034e0:	f5b3 7f82 	cmp.w	r3, #260	; 0x104
 80034e4:	d111      	bne.n	800350a <SPI_WaitFlagStateUntilTimeout+0x6e>
 80034e6:	68fb      	ldr	r3, [r7, #12]
 80034e8:	689b      	ldr	r3, [r3, #8]
 80034ea:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
 80034ee:	d004      	beq.n	80034fa <SPI_WaitFlagStateUntilTimeout+0x5e>
                                                     || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
 80034f0:	68fb      	ldr	r3, [r7, #12]
 80034f2:	689b      	ldr	r3, [r3, #8]
 80034f4:	f5b3 6f80 	cmp.w	r3, #1024	; 0x400
 80034f8:	d107      	bne.n	800350a <SPI_WaitFlagStateUntilTimeout+0x6e>
        {
          /* Disable SPI peripheral */
          __HAL_SPI_DISABLE(hspi);
 80034fa:	68fb      	ldr	r3, [r7, #12]
 80034fc:	681b      	ldr	r3, [r3, #0]
 80034fe:	681a      	ldr	r2, [r3, #0]
 8003500:	68fb      	ldr	r3, [r7, #12]
 8003502:	681b      	ldr	r3, [r3, #0]
 8003504:	f022 0240 	bic.w	r2, r2, #64	; 0x40
 8003508:	601a      	str	r2, [r3, #0]
        }

        /* Reset CRC Calculation */
        if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
 800350a:	68fb      	ldr	r3, [r7, #12]
 800350c:	6a9b      	ldr	r3, [r3, #40]	; 0x28
 800350e:	f5b3 5f00 	cmp.w	r3, #8192	; 0x2000
 8003512:	d10f      	bne.n	8003534 <SPI_WaitFlagStateUntilTimeout+0x98>
        {
          SPI_RESET_CRC(hspi);
 8003514:	68fb      	ldr	r3, [r7, #12]
 8003516:	681b      	ldr	r3, [r3, #0]
 8003518:	681a      	ldr	r2, [r3, #0]
 800351a:	68fb      	ldr	r3, [r7, #12]
 800351c:	681b      	ldr	r3, [r3, #0]
 800351e:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
 8003522:	601a      	str	r2, [r3, #0]
 8003524:	68fb      	ldr	r3, [r7, #12]
 8003526:	681b      	ldr	r3, [r3, #0]
 8003528:	681a      	ldr	r2, [r3, #0]
 800352a:	68fb      	ldr	r3, [r7, #12]
 800352c:	681b      	ldr	r3, [r3, #0]
 800352e:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 8003532:	601a      	str	r2, [r3, #0]
        }

        hspi->State = HAL_SPI_STATE_READY;
 8003534:	68fb      	ldr	r3, [r7, #12]
 8003536:	2201      	movs	r2, #1
 8003538:	f883 2051 	strb.w	r2, [r3, #81]	; 0x51

        /* Process Unlocked */
        __HAL_UNLOCK(hspi);
 800353c:	68fb      	ldr	r3, [r7, #12]
 800353e:	2200      	movs	r2, #0
 8003540:	f883 2050 	strb.w	r2, [r3, #80]	; 0x50

        return HAL_TIMEOUT;
 8003544:	2303      	movs	r3, #3
 8003546:	e00f      	b.n	8003568 <SPI_WaitFlagStateUntilTimeout+0xcc>
  while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
 8003548:	68fb      	ldr	r3, [r7, #12]
 800354a:	681b      	ldr	r3, [r3, #0]
 800354c:	689a      	ldr	r2, [r3, #8]
 800354e:	68bb      	ldr	r3, [r7, #8]
 8003550:	4013      	ands	r3, r2
 8003552:	68ba      	ldr	r2, [r7, #8]
 8003554:	429a      	cmp	r2, r3
 8003556:	bf0c      	ite	eq
 8003558:	2301      	moveq	r3, #1
 800355a:	2300      	movne	r3, #0
 800355c:	b2db      	uxtb	r3, r3
 800355e:	461a      	mov	r2, r3
 8003560:	79fb      	ldrb	r3, [r7, #7]
 8003562:	429a      	cmp	r2, r3
 8003564:	d1a3      	bne.n	80034ae <SPI_WaitFlagStateUntilTimeout+0x12>
      }
    }
  }

  return HAL_OK;
 8003566:	2300      	movs	r3, #0
}
 8003568:	4618      	mov	r0, r3
 800356a:	3710      	adds	r7, #16
 800356c:	46bd      	mov	sp, r7
 800356e:	bd80      	pop	{r7, pc}

08003570 <SPI_EndRxTxTransaction>:
  * @param  Timeout Timeout duration
  * @param  Tickstart tick start value
  * @retval HAL status
  */
static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
{
 8003570:	b580      	push	{r7, lr}
 8003572:	b088      	sub	sp, #32
 8003574:	af02      	add	r7, sp, #8
 8003576:	60f8      	str	r0, [r7, #12]
 8003578:	60b9      	str	r1, [r7, #8]
 800357a:	607a      	str	r2, [r7, #4]
  /* Timeout in µs */
  __IO uint32_t count = SPI_BSY_FLAG_WORKAROUND_TIMEOUT * (SystemCoreClock / 24U / 1000000U);
 800357c:	4b1b      	ldr	r3, [pc, #108]	; (80035ec <SPI_EndRxTxTransaction+0x7c>)
 800357e:	681b      	ldr	r3, [r3, #0]
 8003580:	4a1b      	ldr	r2, [pc, #108]	; (80035f0 <SPI_EndRxTxTransaction+0x80>)
 8003582:	fba2 2303 	umull	r2, r3, r2, r3
 8003586:	0d5b      	lsrs	r3, r3, #21
 8003588:	f44f 727a 	mov.w	r2, #1000	; 0x3e8
 800358c:	fb02 f303 	mul.w	r3, r2, r3
 8003590:	617b      	str	r3, [r7, #20]
  /* Erratasheet: BSY bit may stay high at the end of a data transfer in Slave mode */
  if (hspi->Init.Mode == SPI_MODE_MASTER)
 8003592:	68fb      	ldr	r3, [r7, #12]
 8003594:	685b      	ldr	r3, [r3, #4]
 8003596:	f5b3 7f82 	cmp.w	r3, #260	; 0x104
 800359a:	d112      	bne.n	80035c2 <SPI_EndRxTxTransaction+0x52>
  {
    /* Control the BSY flag */
    if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
 800359c:	687b      	ldr	r3, [r7, #4]
 800359e:	9300      	str	r3, [sp, #0]
 80035a0:	68bb      	ldr	r3, [r7, #8]
 80035a2:	2200      	movs	r2, #0
 80035a4:	2180      	movs	r1, #128	; 0x80
 80035a6:	68f8      	ldr	r0, [r7, #12]
 80035a8:	f7ff ff78 	bl	800349c <SPI_WaitFlagStateUntilTimeout>
 80035ac:	4603      	mov	r3, r0
 80035ae:	2b00      	cmp	r3, #0
 80035b0:	d016      	beq.n	80035e0 <SPI_EndRxTxTransaction+0x70>
    {
      SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
 80035b2:	68fb      	ldr	r3, [r7, #12]
 80035b4:	6d5b      	ldr	r3, [r3, #84]	; 0x54
 80035b6:	f043 0220 	orr.w	r2, r3, #32
 80035ba:	68fb      	ldr	r3, [r7, #12]
 80035bc:	655a      	str	r2, [r3, #84]	; 0x54
      return HAL_TIMEOUT;
 80035be:	2303      	movs	r3, #3
 80035c0:	e00f      	b.n	80035e2 <SPI_EndRxTxTransaction+0x72>
    * User have to calculate the timeout value to fit with the time of 1 byte transfer.
    * This time is directly link with the SPI clock from Master device.
    */
    do
    {
      if (count == 0U)
 80035c2:	697b      	ldr	r3, [r7, #20]
 80035c4:	2b00      	cmp	r3, #0
 80035c6:	d00a      	beq.n	80035de <SPI_EndRxTxTransaction+0x6e>
      {
        break;
      }
      count--;
 80035c8:	697b      	ldr	r3, [r7, #20]
 80035ca:	3b01      	subs	r3, #1
 80035cc:	617b      	str	r3, [r7, #20]
    } while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);
 80035ce:	68fb      	ldr	r3, [r7, #12]
 80035d0:	681b      	ldr	r3, [r3, #0]
 80035d2:	689b      	ldr	r3, [r3, #8]
 80035d4:	f003 0380 	and.w	r3, r3, #128	; 0x80
 80035d8:	2b80      	cmp	r3, #128	; 0x80
 80035da:	d0f2      	beq.n	80035c2 <SPI_EndRxTxTransaction+0x52>
 80035dc:	e000      	b.n	80035e0 <SPI_EndRxTxTransaction+0x70>
        break;
 80035de:	bf00      	nop
  }

  return HAL_OK;
 80035e0:	2300      	movs	r3, #0
}
 80035e2:	4618      	mov	r0, r3
 80035e4:	3718      	adds	r7, #24
 80035e6:	46bd      	mov	sp, r7
 80035e8:	bd80      	pop	{r7, pc}
 80035ea:	bf00      	nop
 80035ec:	20000004 	.word	0x20000004
 80035f0:	165e9f81 	.word	0x165e9f81

080035f4 <HAL_UART_Init>:
  * @param  huart  Pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
 80035f4:	b580      	push	{r7, lr}
 80035f6:	b082      	sub	sp, #8
 80035f8:	af00      	add	r7, sp, #0
 80035fa:	6078      	str	r0, [r7, #4]
  /* Check the UART handle allocation */
  if (huart == NULL)
 80035fc:	687b      	ldr	r3, [r7, #4]
 80035fe:	2b00      	cmp	r3, #0
 8003600:	d101      	bne.n	8003606 <HAL_UART_Init+0x12>
  {
    return HAL_ERROR;
 8003602:	2301      	movs	r3, #1
 8003604:	e03f      	b.n	8003686 <HAL_UART_Init+0x92>
    assert_param(IS_UART_INSTANCE(huart->Instance));
  }
  assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
  assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));

  if (huart->gState == HAL_UART_STATE_RESET)
 8003606:	687b      	ldr	r3, [r7, #4]
 8003608:	f893 3039 	ldrb.w	r3, [r3, #57]	; 0x39
 800360c:	b2db      	uxtb	r3, r3
 800360e:	2b00      	cmp	r3, #0
 8003610:	d106      	bne.n	8003620 <HAL_UART_Init+0x2c>
  {
    /* Allocate lock resource and initialize it */
    huart->Lock = HAL_UNLOCKED;
 8003612:	687b      	ldr	r3, [r7, #4]
 8003614:	2200      	movs	r2, #0
 8003616:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38

    /* Init the low level hardware */
    huart->MspInitCallback(huart);
#else
    /* Init the low level hardware : GPIO, CLOCK */
    HAL_UART_MspInit(huart);
 800361a:	6878      	ldr	r0, [r7, #4]
 800361c:	f7fd ff30 	bl	8001480 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
  }

  huart->gState = HAL_UART_STATE_BUSY;
 8003620:	687b      	ldr	r3, [r7, #4]
 8003622:	2224      	movs	r2, #36	; 0x24
 8003624:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39

  /* Disable the peripheral */
  __HAL_UART_DISABLE(huart);
 8003628:	687b      	ldr	r3, [r7, #4]
 800362a:	681b      	ldr	r3, [r3, #0]
 800362c:	68da      	ldr	r2, [r3, #12]
 800362e:	687b      	ldr	r3, [r7, #4]
 8003630:	681b      	ldr	r3, [r3, #0]
 8003632:	f422 5200 	bic.w	r2, r2, #8192	; 0x2000
 8003636:	60da      	str	r2, [r3, #12]

  /* Set the UART Communication parameters */
  UART_SetConfig(huart);
 8003638:	6878      	ldr	r0, [r7, #4]
 800363a:	f000 f90b 	bl	8003854 <UART_SetConfig>

  /* In asynchronous mode, the following bits must be kept cleared:
     - LINEN and CLKEN bits in the USART_CR2 register,
     - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
  CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
 800363e:	687b      	ldr	r3, [r7, #4]
 8003640:	681b      	ldr	r3, [r3, #0]
 8003642:	691a      	ldr	r2, [r3, #16]
 8003644:	687b      	ldr	r3, [r7, #4]
 8003646:	681b      	ldr	r3, [r3, #0]
 8003648:	f422 4290 	bic.w	r2, r2, #18432	; 0x4800
 800364c:	611a      	str	r2, [r3, #16]
  CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
 800364e:	687b      	ldr	r3, [r7, #4]
 8003650:	681b      	ldr	r3, [r3, #0]
 8003652:	695a      	ldr	r2, [r3, #20]
 8003654:	687b      	ldr	r3, [r7, #4]
 8003656:	681b      	ldr	r3, [r3, #0]
 8003658:	f022 022a 	bic.w	r2, r2, #42	; 0x2a
 800365c:	615a      	str	r2, [r3, #20]

  /* Enable the peripheral */
  __HAL_UART_ENABLE(huart);
 800365e:	687b      	ldr	r3, [r7, #4]
 8003660:	681b      	ldr	r3, [r3, #0]
 8003662:	68da      	ldr	r2, [r3, #12]
 8003664:	687b      	ldr	r3, [r7, #4]
 8003666:	681b      	ldr	r3, [r3, #0]
 8003668:	f442 5200 	orr.w	r2, r2, #8192	; 0x2000
 800366c:	60da      	str	r2, [r3, #12]

  /* Initialize the UART state */
  huart->ErrorCode = HAL_UART_ERROR_NONE;
 800366e:	687b      	ldr	r3, [r7, #4]
 8003670:	2200      	movs	r2, #0
 8003672:	63da      	str	r2, [r3, #60]	; 0x3c
  huart->gState = HAL_UART_STATE_READY;
 8003674:	687b      	ldr	r3, [r7, #4]
 8003676:	2220      	movs	r2, #32
 8003678:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
  huart->RxState = HAL_UART_STATE_READY;
 800367c:	687b      	ldr	r3, [r7, #4]
 800367e:	2220      	movs	r2, #32
 8003680:	f883 203a 	strb.w	r2, [r3, #58]	; 0x3a

  return HAL_OK;
 8003684:	2300      	movs	r3, #0
}
 8003686:	4618      	mov	r0, r3
 8003688:	3708      	adds	r7, #8
 800368a:	46bd      	mov	sp, r7
 800368c:	bd80      	pop	{r7, pc}

0800368e <HAL_UART_Transmit>:
  * @param  Size  Amount of data elements (u8 or u16) to be sent
  * @param  Timeout Timeout duration
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
 800368e:	b580      	push	{r7, lr}
 8003690:	b088      	sub	sp, #32
 8003692:	af02      	add	r7, sp, #8
 8003694:	60f8      	str	r0, [r7, #12]
 8003696:	60b9      	str	r1, [r7, #8]
 8003698:	603b      	str	r3, [r7, #0]
 800369a:	4613      	mov	r3, r2
 800369c:	80fb      	strh	r3, [r7, #6]
  uint16_t *tmp;
  uint32_t tickstart = 0U;
 800369e:	2300      	movs	r3, #0
 80036a0:	617b      	str	r3, [r7, #20]

  /* Check that a Tx process is not already ongoing */
  if (huart->gState == HAL_UART_STATE_READY)
 80036a2:	68fb      	ldr	r3, [r7, #12]
 80036a4:	f893 3039 	ldrb.w	r3, [r3, #57]	; 0x39
 80036a8:	b2db      	uxtb	r3, r3
 80036aa:	2b20      	cmp	r3, #32
 80036ac:	f040 8083 	bne.w	80037b6 <HAL_UART_Transmit+0x128>
  {
    if ((pData == NULL) || (Size == 0U))
 80036b0:	68bb      	ldr	r3, [r7, #8]
 80036b2:	2b00      	cmp	r3, #0
 80036b4:	d002      	beq.n	80036bc <HAL_UART_Transmit+0x2e>
 80036b6:	88fb      	ldrh	r3, [r7, #6]
 80036b8:	2b00      	cmp	r3, #0
 80036ba:	d101      	bne.n	80036c0 <HAL_UART_Transmit+0x32>
    {
      return  HAL_ERROR;
 80036bc:	2301      	movs	r3, #1
 80036be:	e07b      	b.n	80037b8 <HAL_UART_Transmit+0x12a>
    }

    /* Process Locked */
    __HAL_LOCK(huart);
 80036c0:	68fb      	ldr	r3, [r7, #12]
 80036c2:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
 80036c6:	2b01      	cmp	r3, #1
 80036c8:	d101      	bne.n	80036ce <HAL_UART_Transmit+0x40>
 80036ca:	2302      	movs	r3, #2
 80036cc:	e074      	b.n	80037b8 <HAL_UART_Transmit+0x12a>
 80036ce:	68fb      	ldr	r3, [r7, #12]
 80036d0:	2201      	movs	r2, #1
 80036d2:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38

    huart->ErrorCode = HAL_UART_ERROR_NONE;
 80036d6:	68fb      	ldr	r3, [r7, #12]
 80036d8:	2200      	movs	r2, #0
 80036da:	63da      	str	r2, [r3, #60]	; 0x3c
    huart->gState = HAL_UART_STATE_BUSY_TX;
 80036dc:	68fb      	ldr	r3, [r7, #12]
 80036de:	2221      	movs	r2, #33	; 0x21
 80036e0:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39

    /* Init tickstart for timeout managment */
    tickstart = HAL_GetTick();
 80036e4:	f7fd ffee 	bl	80016c4 <HAL_GetTick>
 80036e8:	6178      	str	r0, [r7, #20]

    huart->TxXferSize = Size;
 80036ea:	68fb      	ldr	r3, [r7, #12]
 80036ec:	88fa      	ldrh	r2, [r7, #6]
 80036ee:	849a      	strh	r2, [r3, #36]	; 0x24
    huart->TxXferCount = Size;
 80036f0:	68fb      	ldr	r3, [r7, #12]
 80036f2:	88fa      	ldrh	r2, [r7, #6]
 80036f4:	84da      	strh	r2, [r3, #38]	; 0x26

    /* Process Unlocked */
    __HAL_UNLOCK(huart);
 80036f6:	68fb      	ldr	r3, [r7, #12]
 80036f8:	2200      	movs	r2, #0
 80036fa:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38

    while (huart->TxXferCount > 0U)
 80036fe:	e042      	b.n	8003786 <HAL_UART_Transmit+0xf8>
    {
      huart->TxXferCount--;
 8003700:	68fb      	ldr	r3, [r7, #12]
 8003702:	8cdb      	ldrh	r3, [r3, #38]	; 0x26
 8003704:	b29b      	uxth	r3, r3
 8003706:	3b01      	subs	r3, #1
 8003708:	b29a      	uxth	r2, r3
 800370a:	68fb      	ldr	r3, [r7, #12]
 800370c:	84da      	strh	r2, [r3, #38]	; 0x26
      if (huart->Init.WordLength == UART_WORDLENGTH_9B)
 800370e:	68fb      	ldr	r3, [r7, #12]
 8003710:	689b      	ldr	r3, [r3, #8]
 8003712:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 8003716:	d122      	bne.n	800375e <HAL_UART_Transmit+0xd0>
      {
        if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 8003718:	683b      	ldr	r3, [r7, #0]
 800371a:	9300      	str	r3, [sp, #0]
 800371c:	697b      	ldr	r3, [r7, #20]
 800371e:	2200      	movs	r2, #0
 8003720:	2180      	movs	r1, #128	; 0x80
 8003722:	68f8      	ldr	r0, [r7, #12]
 8003724:	f000 f84c 	bl	80037c0 <UART_WaitOnFlagUntilTimeout>
 8003728:	4603      	mov	r3, r0
 800372a:	2b00      	cmp	r3, #0
 800372c:	d001      	beq.n	8003732 <HAL_UART_Transmit+0xa4>
        {
          return HAL_TIMEOUT;
 800372e:	2303      	movs	r3, #3
 8003730:	e042      	b.n	80037b8 <HAL_UART_Transmit+0x12a>
        }
        tmp = (uint16_t *) pData;
 8003732:	68bb      	ldr	r3, [r7, #8]
 8003734:	613b      	str	r3, [r7, #16]
        huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
 8003736:	693b      	ldr	r3, [r7, #16]
 8003738:	881b      	ldrh	r3, [r3, #0]
 800373a:	461a      	mov	r2, r3
 800373c:	68fb      	ldr	r3, [r7, #12]
 800373e:	681b      	ldr	r3, [r3, #0]
 8003740:	f3c2 0208 	ubfx	r2, r2, #0, #9
 8003744:	605a      	str	r2, [r3, #4]
        if (huart->Init.Parity == UART_PARITY_NONE)
 8003746:	68fb      	ldr	r3, [r7, #12]
 8003748:	691b      	ldr	r3, [r3, #16]
 800374a:	2b00      	cmp	r3, #0
 800374c:	d103      	bne.n	8003756 <HAL_UART_Transmit+0xc8>
        {
          pData += 2U;
 800374e:	68bb      	ldr	r3, [r7, #8]
 8003750:	3302      	adds	r3, #2
 8003752:	60bb      	str	r3, [r7, #8]
 8003754:	e017      	b.n	8003786 <HAL_UART_Transmit+0xf8>
        }
        else
        {
          pData += 1U;
 8003756:	68bb      	ldr	r3, [r7, #8]
 8003758:	3301      	adds	r3, #1
 800375a:	60bb      	str	r3, [r7, #8]
 800375c:	e013      	b.n	8003786 <HAL_UART_Transmit+0xf8>
        }
      }
      else
      {
        if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
 800375e:	683b      	ldr	r3, [r7, #0]
 8003760:	9300      	str	r3, [sp, #0]
 8003762:	697b      	ldr	r3, [r7, #20]
 8003764:	2200      	movs	r2, #0
 8003766:	2180      	movs	r1, #128	; 0x80
 8003768:	68f8      	ldr	r0, [r7, #12]
 800376a:	f000 f829 	bl	80037c0 <UART_WaitOnFlagUntilTimeout>
 800376e:	4603      	mov	r3, r0
 8003770:	2b00      	cmp	r3, #0
 8003772:	d001      	beq.n	8003778 <HAL_UART_Transmit+0xea>
        {
          return HAL_TIMEOUT;
 8003774:	2303      	movs	r3, #3
 8003776:	e01f      	b.n	80037b8 <HAL_UART_Transmit+0x12a>
        }
        huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
 8003778:	68bb      	ldr	r3, [r7, #8]
 800377a:	1c5a      	adds	r2, r3, #1
 800377c:	60ba      	str	r2, [r7, #8]
 800377e:	781a      	ldrb	r2, [r3, #0]
 8003780:	68fb      	ldr	r3, [r7, #12]
 8003782:	681b      	ldr	r3, [r3, #0]
 8003784:	605a      	str	r2, [r3, #4]
    while (huart->TxXferCount > 0U)
 8003786:	68fb      	ldr	r3, [r7, #12]
 8003788:	8cdb      	ldrh	r3, [r3, #38]	; 0x26
 800378a:	b29b      	uxth	r3, r3
 800378c:	2b00      	cmp	r3, #0
 800378e:	d1b7      	bne.n	8003700 <HAL_UART_Transmit+0x72>
      }
    }

    if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
 8003790:	683b      	ldr	r3, [r7, #0]
 8003792:	9300      	str	r3, [sp, #0]
 8003794:	697b      	ldr	r3, [r7, #20]
 8003796:	2200      	movs	r2, #0
 8003798:	2140      	movs	r1, #64	; 0x40
 800379a:	68f8      	ldr	r0, [r7, #12]
 800379c:	f000 f810 	bl	80037c0 <UART_WaitOnFlagUntilTimeout>
 80037a0:	4603      	mov	r3, r0
 80037a2:	2b00      	cmp	r3, #0
 80037a4:	d001      	beq.n	80037aa <HAL_UART_Transmit+0x11c>
    {
      return HAL_TIMEOUT;
 80037a6:	2303      	movs	r3, #3
 80037a8:	e006      	b.n	80037b8 <HAL_UART_Transmit+0x12a>
    }

    /* At end of Tx process, restore huart->gState to Ready */
    huart->gState = HAL_UART_STATE_READY;
 80037aa:	68fb      	ldr	r3, [r7, #12]
 80037ac:	2220      	movs	r2, #32
 80037ae:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39

    return HAL_OK;
 80037b2:	2300      	movs	r3, #0
 80037b4:	e000      	b.n	80037b8 <HAL_UART_Transmit+0x12a>
  }
  else
  {
    return HAL_BUSY;
 80037b6:	2302      	movs	r3, #2
  }
}
 80037b8:	4618      	mov	r0, r3
 80037ba:	3718      	adds	r7, #24
 80037bc:	46bd      	mov	sp, r7
 80037be:	bd80      	pop	{r7, pc}

080037c0 <UART_WaitOnFlagUntilTimeout>:
  * @param  Tickstart Tick start value
  * @param  Timeout Timeout duration
  * @retval HAL status
  */
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
{
 80037c0:	b580      	push	{r7, lr}
 80037c2:	b084      	sub	sp, #16
 80037c4:	af00      	add	r7, sp, #0
 80037c6:	60f8      	str	r0, [r7, #12]
 80037c8:	60b9      	str	r1, [r7, #8]
 80037ca:	603b      	str	r3, [r7, #0]
 80037cc:	4613      	mov	r3, r2
 80037ce:	71fb      	strb	r3, [r7, #7]
  /* Wait until flag is set */
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 80037d0:	e02c      	b.n	800382c <UART_WaitOnFlagUntilTimeout+0x6c>
  {
    /* Check for the Timeout */
    if (Timeout != HAL_MAX_DELAY)
 80037d2:	69bb      	ldr	r3, [r7, #24]
 80037d4:	f1b3 3fff 	cmp.w	r3, #4294967295
 80037d8:	d028      	beq.n	800382c <UART_WaitOnFlagUntilTimeout+0x6c>
    {
      if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
 80037da:	69bb      	ldr	r3, [r7, #24]
 80037dc:	2b00      	cmp	r3, #0
 80037de:	d007      	beq.n	80037f0 <UART_WaitOnFlagUntilTimeout+0x30>
 80037e0:	f7fd ff70 	bl	80016c4 <HAL_GetTick>
 80037e4:	4602      	mov	r2, r0
 80037e6:	683b      	ldr	r3, [r7, #0]
 80037e8:	1ad3      	subs	r3, r2, r3
 80037ea:	69ba      	ldr	r2, [r7, #24]
 80037ec:	429a      	cmp	r2, r3
 80037ee:	d21d      	bcs.n	800382c <UART_WaitOnFlagUntilTimeout+0x6c>
      {
        /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
        CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
 80037f0:	68fb      	ldr	r3, [r7, #12]
 80037f2:	681b      	ldr	r3, [r3, #0]
 80037f4:	68da      	ldr	r2, [r3, #12]
 80037f6:	68fb      	ldr	r3, [r7, #12]
 80037f8:	681b      	ldr	r3, [r3, #0]
 80037fa:	f422 72d0 	bic.w	r2, r2, #416	; 0x1a0
 80037fe:	60da      	str	r2, [r3, #12]
        CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
 8003800:	68fb      	ldr	r3, [r7, #12]
 8003802:	681b      	ldr	r3, [r3, #0]
 8003804:	695a      	ldr	r2, [r3, #20]
 8003806:	68fb      	ldr	r3, [r7, #12]
 8003808:	681b      	ldr	r3, [r3, #0]
 800380a:	f022 0201 	bic.w	r2, r2, #1
 800380e:	615a      	str	r2, [r3, #20]

        huart->gState  = HAL_UART_STATE_READY;
 8003810:	68fb      	ldr	r3, [r7, #12]
 8003812:	2220      	movs	r2, #32
 8003814:	f883 2039 	strb.w	r2, [r3, #57]	; 0x39
        huart->RxState = HAL_UART_STATE_READY;
 8003818:	68fb      	ldr	r3, [r7, #12]
 800381a:	2220      	movs	r2, #32
 800381c:	f883 203a 	strb.w	r2, [r3, #58]	; 0x3a

        /* Process Unlocked */
        __HAL_UNLOCK(huart);
 8003820:	68fb      	ldr	r3, [r7, #12]
 8003822:	2200      	movs	r2, #0
 8003824:	f883 2038 	strb.w	r2, [r3, #56]	; 0x38

        return HAL_TIMEOUT;
 8003828:	2303      	movs	r3, #3
 800382a:	e00f      	b.n	800384c <UART_WaitOnFlagUntilTimeout+0x8c>
  while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
 800382c:	68fb      	ldr	r3, [r7, #12]
 800382e:	681b      	ldr	r3, [r3, #0]
 8003830:	681a      	ldr	r2, [r3, #0]
 8003832:	68bb      	ldr	r3, [r7, #8]
 8003834:	4013      	ands	r3, r2
 8003836:	68ba      	ldr	r2, [r7, #8]
 8003838:	429a      	cmp	r2, r3
 800383a:	bf0c      	ite	eq
 800383c:	2301      	moveq	r3, #1
 800383e:	2300      	movne	r3, #0
 8003840:	b2db      	uxtb	r3, r3
 8003842:	461a      	mov	r2, r3
 8003844:	79fb      	ldrb	r3, [r7, #7]
 8003846:	429a      	cmp	r2, r3
 8003848:	d0c3      	beq.n	80037d2 <UART_WaitOnFlagUntilTimeout+0x12>
      }
    }
  }
  return HAL_OK;
 800384a:	2300      	movs	r3, #0
}
 800384c:	4618      	mov	r0, r3
 800384e:	3710      	adds	r7, #16
 8003850:	46bd      	mov	sp, r7
 8003852:	bd80      	pop	{r7, pc}

08003854 <UART_SetConfig>:
  * @param  huart  Pointer to a UART_HandleTypeDef structure that contains
  *                the configuration information for the specified UART module.
  * @retval None
  */
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
 8003854:	e92d 4ff0 	stmdb	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
 8003858:	b085      	sub	sp, #20
 800385a:	af00      	add	r7, sp, #0
 800385c:	6078      	str	r0, [r7, #4]
  assert_param(IS_UART_MODE(huart->Init.Mode));

  /*-------------------------- USART CR2 Configuration -----------------------*/
  /* Configure the UART Stop Bits: Set STOP[13:12] bits
     according to huart->Init.StopBits value */
  MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
 800385e:	687b      	ldr	r3, [r7, #4]
 8003860:	681b      	ldr	r3, [r3, #0]
 8003862:	691b      	ldr	r3, [r3, #16]
 8003864:	f423 5140 	bic.w	r1, r3, #12288	; 0x3000
 8003868:	687b      	ldr	r3, [r7, #4]
 800386a:	68da      	ldr	r2, [r3, #12]
 800386c:	687b      	ldr	r3, [r7, #4]
 800386e:	681b      	ldr	r3, [r3, #0]
 8003870:	430a      	orrs	r2, r1
 8003872:	611a      	str	r2, [r3, #16]
     Set the M bits according to huart->Init.WordLength value
     Set PCE and PS bits according to huart->Init.Parity value
     Set TE and RE bits according to huart->Init.Mode value
     Set OVER8 bit according to huart->Init.OverSampling value */

  tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
 8003874:	687b      	ldr	r3, [r7, #4]
 8003876:	689a      	ldr	r2, [r3, #8]
 8003878:	687b      	ldr	r3, [r7, #4]
 800387a:	691b      	ldr	r3, [r3, #16]
 800387c:	431a      	orrs	r2, r3
 800387e:	687b      	ldr	r3, [r7, #4]
 8003880:	695b      	ldr	r3, [r3, #20]
 8003882:	431a      	orrs	r2, r3
 8003884:	687b      	ldr	r3, [r7, #4]
 8003886:	69db      	ldr	r3, [r3, #28]
 8003888:	4313      	orrs	r3, r2
 800388a:	60fb      	str	r3, [r7, #12]
  MODIFY_REG(huart->Instance->CR1,
 800388c:	687b      	ldr	r3, [r7, #4]
 800388e:	681b      	ldr	r3, [r3, #0]
 8003890:	68db      	ldr	r3, [r3, #12]
 8003892:	f423 4316 	bic.w	r3, r3, #38400	; 0x9600
 8003896:	f023 030c 	bic.w	r3, r3, #12
 800389a:	687a      	ldr	r2, [r7, #4]
 800389c:	6812      	ldr	r2, [r2, #0]
 800389e:	68f9      	ldr	r1, [r7, #12]
 80038a0:	430b      	orrs	r3, r1
 80038a2:	60d3      	str	r3, [r2, #12]
             (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
             tmpreg);

  /*-------------------------- USART CR3 Configuration -----------------------*/
  /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
  MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
 80038a4:	687b      	ldr	r3, [r7, #4]
 80038a6:	681b      	ldr	r3, [r3, #0]
 80038a8:	695b      	ldr	r3, [r3, #20]
 80038aa:	f423 7140 	bic.w	r1, r3, #768	; 0x300
 80038ae:	687b      	ldr	r3, [r7, #4]
 80038b0:	699a      	ldr	r2, [r3, #24]
 80038b2:	687b      	ldr	r3, [r7, #4]
 80038b4:	681b      	ldr	r3, [r3, #0]
 80038b6:	430a      	orrs	r2, r1
 80038b8:	615a      	str	r2, [r3, #20]

  /* Check the Over Sampling */
  if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
 80038ba:	687b      	ldr	r3, [r7, #4]
 80038bc:	69db      	ldr	r3, [r3, #28]
 80038be:	f5b3 4f00 	cmp.w	r3, #32768	; 0x8000
 80038c2:	f040 818b 	bne.w	8003bdc <UART_SetConfig+0x388>
    {
      pclk = HAL_RCC_GetPCLK2Freq();
      huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
    }
#elif defined(USART6)
    if ((huart->Instance == USART1) || (huart->Instance == USART6))
 80038c6:	687b      	ldr	r3, [r7, #4]
 80038c8:	681b      	ldr	r3, [r3, #0]
 80038ca:	4ac1      	ldr	r2, [pc, #772]	; (8003bd0 <UART_SetConfig+0x37c>)
 80038cc:	4293      	cmp	r3, r2
 80038ce:	d005      	beq.n	80038dc <UART_SetConfig+0x88>
 80038d0:	687b      	ldr	r3, [r7, #4]
 80038d2:	681b      	ldr	r3, [r3, #0]
 80038d4:	4abf      	ldr	r2, [pc, #764]	; (8003bd4 <UART_SetConfig+0x380>)
 80038d6:	4293      	cmp	r3, r2
 80038d8:	f040 80bd 	bne.w	8003a56 <UART_SetConfig+0x202>
    {
      pclk = HAL_RCC_GetPCLK2Freq();
 80038dc:	f7ff fa90 	bl	8002e00 <HAL_RCC_GetPCLK2Freq>
 80038e0:	60b8      	str	r0, [r7, #8]
      huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
 80038e2:	68bb      	ldr	r3, [r7, #8]
 80038e4:	461d      	mov	r5, r3
 80038e6:	f04f 0600 	mov.w	r6, #0
 80038ea:	46a8      	mov	r8, r5
 80038ec:	46b1      	mov	r9, r6
 80038ee:	eb18 0308 	adds.w	r3, r8, r8
 80038f2:	eb49 0409 	adc.w	r4, r9, r9
 80038f6:	4698      	mov	r8, r3
 80038f8:	46a1      	mov	r9, r4
 80038fa:	eb18 0805 	adds.w	r8, r8, r5
 80038fe:	eb49 0906 	adc.w	r9, r9, r6
 8003902:	f04f 0100 	mov.w	r1, #0
 8003906:	f04f 0200 	mov.w	r2, #0
 800390a:	ea4f 02c9 	mov.w	r2, r9, lsl #3
 800390e:	ea42 7258 	orr.w	r2, r2, r8, lsr #29
 8003912:	ea4f 01c8 	mov.w	r1, r8, lsl #3
 8003916:	4688      	mov	r8, r1
 8003918:	4691      	mov	r9, r2
 800391a:	eb18 0005 	adds.w	r0, r8, r5
 800391e:	eb49 0106 	adc.w	r1, r9, r6
 8003922:	687b      	ldr	r3, [r7, #4]
 8003924:	685b      	ldr	r3, [r3, #4]
 8003926:	461d      	mov	r5, r3
 8003928:	f04f 0600 	mov.w	r6, #0
 800392c:	196b      	adds	r3, r5, r5
 800392e:	eb46 0406 	adc.w	r4, r6, r6
 8003932:	461a      	mov	r2, r3
 8003934:	4623      	mov	r3, r4
 8003936:	f7fc fc55 	bl	80001e4 <__aeabi_uldivmod>
 800393a:	4603      	mov	r3, r0
 800393c:	460c      	mov	r4, r1
 800393e:	461a      	mov	r2, r3
 8003940:	4ba5      	ldr	r3, [pc, #660]	; (8003bd8 <UART_SetConfig+0x384>)
 8003942:	fba3 2302 	umull	r2, r3, r3, r2
 8003946:	095b      	lsrs	r3, r3, #5
 8003948:	ea4f 1803 	mov.w	r8, r3, lsl #4
 800394c:	68bb      	ldr	r3, [r7, #8]
 800394e:	461d      	mov	r5, r3
 8003950:	f04f 0600 	mov.w	r6, #0
 8003954:	46a9      	mov	r9, r5
 8003956:	46b2      	mov	sl, r6
 8003958:	eb19 0309 	adds.w	r3, r9, r9
 800395c:	eb4a 040a 	adc.w	r4, sl, sl
 8003960:	4699      	mov	r9, r3
 8003962:	46a2      	mov	sl, r4
 8003964:	eb19 0905 	adds.w	r9, r9, r5
 8003968:	eb4a 0a06 	adc.w	sl, sl, r6
 800396c:	f04f 0100 	mov.w	r1, #0
 8003970:	f04f 0200 	mov.w	r2, #0
 8003974:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 8003978:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 800397c:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003980:	4689      	mov	r9, r1
 8003982:	4692      	mov	sl, r2
 8003984:	eb19 0005 	adds.w	r0, r9, r5
 8003988:	eb4a 0106 	adc.w	r1, sl, r6
 800398c:	687b      	ldr	r3, [r7, #4]
 800398e:	685b      	ldr	r3, [r3, #4]
 8003990:	461d      	mov	r5, r3
 8003992:	f04f 0600 	mov.w	r6, #0
 8003996:	196b      	adds	r3, r5, r5
 8003998:	eb46 0406 	adc.w	r4, r6, r6
 800399c:	461a      	mov	r2, r3
 800399e:	4623      	mov	r3, r4
 80039a0:	f7fc fc20 	bl	80001e4 <__aeabi_uldivmod>
 80039a4:	4603      	mov	r3, r0
 80039a6:	460c      	mov	r4, r1
 80039a8:	461a      	mov	r2, r3
 80039aa:	4b8b      	ldr	r3, [pc, #556]	; (8003bd8 <UART_SetConfig+0x384>)
 80039ac:	fba3 1302 	umull	r1, r3, r3, r2
 80039b0:	095b      	lsrs	r3, r3, #5
 80039b2:	2164      	movs	r1, #100	; 0x64
 80039b4:	fb01 f303 	mul.w	r3, r1, r3
 80039b8:	1ad3      	subs	r3, r2, r3
 80039ba:	00db      	lsls	r3, r3, #3
 80039bc:	3332      	adds	r3, #50	; 0x32
 80039be:	4a86      	ldr	r2, [pc, #536]	; (8003bd8 <UART_SetConfig+0x384>)
 80039c0:	fba2 2303 	umull	r2, r3, r2, r3
 80039c4:	095b      	lsrs	r3, r3, #5
 80039c6:	005b      	lsls	r3, r3, #1
 80039c8:	f403 73f8 	and.w	r3, r3, #496	; 0x1f0
 80039cc:	4498      	add	r8, r3
 80039ce:	68bb      	ldr	r3, [r7, #8]
 80039d0:	461d      	mov	r5, r3
 80039d2:	f04f 0600 	mov.w	r6, #0
 80039d6:	46a9      	mov	r9, r5
 80039d8:	46b2      	mov	sl, r6
 80039da:	eb19 0309 	adds.w	r3, r9, r9
 80039de:	eb4a 040a 	adc.w	r4, sl, sl
 80039e2:	4699      	mov	r9, r3
 80039e4:	46a2      	mov	sl, r4
 80039e6:	eb19 0905 	adds.w	r9, r9, r5
 80039ea:	eb4a 0a06 	adc.w	sl, sl, r6
 80039ee:	f04f 0100 	mov.w	r1, #0
 80039f2:	f04f 0200 	mov.w	r2, #0
 80039f6:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 80039fa:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 80039fe:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003a02:	4689      	mov	r9, r1
 8003a04:	4692      	mov	sl, r2
 8003a06:	eb19 0005 	adds.w	r0, r9, r5
 8003a0a:	eb4a 0106 	adc.w	r1, sl, r6
 8003a0e:	687b      	ldr	r3, [r7, #4]
 8003a10:	685b      	ldr	r3, [r3, #4]
 8003a12:	461d      	mov	r5, r3
 8003a14:	f04f 0600 	mov.w	r6, #0
 8003a18:	196b      	adds	r3, r5, r5
 8003a1a:	eb46 0406 	adc.w	r4, r6, r6
 8003a1e:	461a      	mov	r2, r3
 8003a20:	4623      	mov	r3, r4
 8003a22:	f7fc fbdf 	bl	80001e4 <__aeabi_uldivmod>
 8003a26:	4603      	mov	r3, r0
 8003a28:	460c      	mov	r4, r1
 8003a2a:	461a      	mov	r2, r3
 8003a2c:	4b6a      	ldr	r3, [pc, #424]	; (8003bd8 <UART_SetConfig+0x384>)
 8003a2e:	fba3 1302 	umull	r1, r3, r3, r2
 8003a32:	095b      	lsrs	r3, r3, #5
 8003a34:	2164      	movs	r1, #100	; 0x64
 8003a36:	fb01 f303 	mul.w	r3, r1, r3
 8003a3a:	1ad3      	subs	r3, r2, r3
 8003a3c:	00db      	lsls	r3, r3, #3
 8003a3e:	3332      	adds	r3, #50	; 0x32
 8003a40:	4a65      	ldr	r2, [pc, #404]	; (8003bd8 <UART_SetConfig+0x384>)
 8003a42:	fba2 2303 	umull	r2, r3, r2, r3
 8003a46:	095b      	lsrs	r3, r3, #5
 8003a48:	f003 0207 	and.w	r2, r3, #7
 8003a4c:	687b      	ldr	r3, [r7, #4]
 8003a4e:	681b      	ldr	r3, [r3, #0]
 8003a50:	4442      	add	r2, r8
 8003a52:	609a      	str	r2, [r3, #8]
 8003a54:	e26f      	b.n	8003f36 <UART_SetConfig+0x6e2>
      huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
    }
#endif /* USART6 */
    else
    {
      pclk = HAL_RCC_GetPCLK1Freq();
 8003a56:	f7ff f9bf 	bl	8002dd8 <HAL_RCC_GetPCLK1Freq>
 8003a5a:	60b8      	str	r0, [r7, #8]
      huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
 8003a5c:	68bb      	ldr	r3, [r7, #8]
 8003a5e:	461d      	mov	r5, r3
 8003a60:	f04f 0600 	mov.w	r6, #0
 8003a64:	46a8      	mov	r8, r5
 8003a66:	46b1      	mov	r9, r6
 8003a68:	eb18 0308 	adds.w	r3, r8, r8
 8003a6c:	eb49 0409 	adc.w	r4, r9, r9
 8003a70:	4698      	mov	r8, r3
 8003a72:	46a1      	mov	r9, r4
 8003a74:	eb18 0805 	adds.w	r8, r8, r5
 8003a78:	eb49 0906 	adc.w	r9, r9, r6
 8003a7c:	f04f 0100 	mov.w	r1, #0
 8003a80:	f04f 0200 	mov.w	r2, #0
 8003a84:	ea4f 02c9 	mov.w	r2, r9, lsl #3
 8003a88:	ea42 7258 	orr.w	r2, r2, r8, lsr #29
 8003a8c:	ea4f 01c8 	mov.w	r1, r8, lsl #3
 8003a90:	4688      	mov	r8, r1
 8003a92:	4691      	mov	r9, r2
 8003a94:	eb18 0005 	adds.w	r0, r8, r5
 8003a98:	eb49 0106 	adc.w	r1, r9, r6
 8003a9c:	687b      	ldr	r3, [r7, #4]
 8003a9e:	685b      	ldr	r3, [r3, #4]
 8003aa0:	461d      	mov	r5, r3
 8003aa2:	f04f 0600 	mov.w	r6, #0
 8003aa6:	196b      	adds	r3, r5, r5
 8003aa8:	eb46 0406 	adc.w	r4, r6, r6
 8003aac:	461a      	mov	r2, r3
 8003aae:	4623      	mov	r3, r4
 8003ab0:	f7fc fb98 	bl	80001e4 <__aeabi_uldivmod>
 8003ab4:	4603      	mov	r3, r0
 8003ab6:	460c      	mov	r4, r1
 8003ab8:	461a      	mov	r2, r3
 8003aba:	4b47      	ldr	r3, [pc, #284]	; (8003bd8 <UART_SetConfig+0x384>)
 8003abc:	fba3 2302 	umull	r2, r3, r3, r2
 8003ac0:	095b      	lsrs	r3, r3, #5
 8003ac2:	ea4f 1803 	mov.w	r8, r3, lsl #4
 8003ac6:	68bb      	ldr	r3, [r7, #8]
 8003ac8:	461d      	mov	r5, r3
 8003aca:	f04f 0600 	mov.w	r6, #0
 8003ace:	46a9      	mov	r9, r5
 8003ad0:	46b2      	mov	sl, r6
 8003ad2:	eb19 0309 	adds.w	r3, r9, r9
 8003ad6:	eb4a 040a 	adc.w	r4, sl, sl
 8003ada:	4699      	mov	r9, r3
 8003adc:	46a2      	mov	sl, r4
 8003ade:	eb19 0905 	adds.w	r9, r9, r5
 8003ae2:	eb4a 0a06 	adc.w	sl, sl, r6
 8003ae6:	f04f 0100 	mov.w	r1, #0
 8003aea:	f04f 0200 	mov.w	r2, #0
 8003aee:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 8003af2:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 8003af6:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003afa:	4689      	mov	r9, r1
 8003afc:	4692      	mov	sl, r2
 8003afe:	eb19 0005 	adds.w	r0, r9, r5
 8003b02:	eb4a 0106 	adc.w	r1, sl, r6
 8003b06:	687b      	ldr	r3, [r7, #4]
 8003b08:	685b      	ldr	r3, [r3, #4]
 8003b0a:	461d      	mov	r5, r3
 8003b0c:	f04f 0600 	mov.w	r6, #0
 8003b10:	196b      	adds	r3, r5, r5
 8003b12:	eb46 0406 	adc.w	r4, r6, r6
 8003b16:	461a      	mov	r2, r3
 8003b18:	4623      	mov	r3, r4
 8003b1a:	f7fc fb63 	bl	80001e4 <__aeabi_uldivmod>
 8003b1e:	4603      	mov	r3, r0
 8003b20:	460c      	mov	r4, r1
 8003b22:	461a      	mov	r2, r3
 8003b24:	4b2c      	ldr	r3, [pc, #176]	; (8003bd8 <UART_SetConfig+0x384>)
 8003b26:	fba3 1302 	umull	r1, r3, r3, r2
 8003b2a:	095b      	lsrs	r3, r3, #5
 8003b2c:	2164      	movs	r1, #100	; 0x64
 8003b2e:	fb01 f303 	mul.w	r3, r1, r3
 8003b32:	1ad3      	subs	r3, r2, r3
 8003b34:	00db      	lsls	r3, r3, #3
 8003b36:	3332      	adds	r3, #50	; 0x32
 8003b38:	4a27      	ldr	r2, [pc, #156]	; (8003bd8 <UART_SetConfig+0x384>)
 8003b3a:	fba2 2303 	umull	r2, r3, r2, r3
 8003b3e:	095b      	lsrs	r3, r3, #5
 8003b40:	005b      	lsls	r3, r3, #1
 8003b42:	f403 73f8 	and.w	r3, r3, #496	; 0x1f0
 8003b46:	4498      	add	r8, r3
 8003b48:	68bb      	ldr	r3, [r7, #8]
 8003b4a:	461d      	mov	r5, r3
 8003b4c:	f04f 0600 	mov.w	r6, #0
 8003b50:	46a9      	mov	r9, r5
 8003b52:	46b2      	mov	sl, r6
 8003b54:	eb19 0309 	adds.w	r3, r9, r9
 8003b58:	eb4a 040a 	adc.w	r4, sl, sl
 8003b5c:	4699      	mov	r9, r3
 8003b5e:	46a2      	mov	sl, r4
 8003b60:	eb19 0905 	adds.w	r9, r9, r5
 8003b64:	eb4a 0a06 	adc.w	sl, sl, r6
 8003b68:	f04f 0100 	mov.w	r1, #0
 8003b6c:	f04f 0200 	mov.w	r2, #0
 8003b70:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 8003b74:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 8003b78:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003b7c:	4689      	mov	r9, r1
 8003b7e:	4692      	mov	sl, r2
 8003b80:	eb19 0005 	adds.w	r0, r9, r5
 8003b84:	eb4a 0106 	adc.w	r1, sl, r6
 8003b88:	687b      	ldr	r3, [r7, #4]
 8003b8a:	685b      	ldr	r3, [r3, #4]
 8003b8c:	461d      	mov	r5, r3
 8003b8e:	f04f 0600 	mov.w	r6, #0
 8003b92:	196b      	adds	r3, r5, r5
 8003b94:	eb46 0406 	adc.w	r4, r6, r6
 8003b98:	461a      	mov	r2, r3
 8003b9a:	4623      	mov	r3, r4
 8003b9c:	f7fc fb22 	bl	80001e4 <__aeabi_uldivmod>
 8003ba0:	4603      	mov	r3, r0
 8003ba2:	460c      	mov	r4, r1
 8003ba4:	461a      	mov	r2, r3
 8003ba6:	4b0c      	ldr	r3, [pc, #48]	; (8003bd8 <UART_SetConfig+0x384>)
 8003ba8:	fba3 1302 	umull	r1, r3, r3, r2
 8003bac:	095b      	lsrs	r3, r3, #5
 8003bae:	2164      	movs	r1, #100	; 0x64
 8003bb0:	fb01 f303 	mul.w	r3, r1, r3
 8003bb4:	1ad3      	subs	r3, r2, r3
 8003bb6:	00db      	lsls	r3, r3, #3
 8003bb8:	3332      	adds	r3, #50	; 0x32
 8003bba:	4a07      	ldr	r2, [pc, #28]	; (8003bd8 <UART_SetConfig+0x384>)
 8003bbc:	fba2 2303 	umull	r2, r3, r2, r3
 8003bc0:	095b      	lsrs	r3, r3, #5
 8003bc2:	f003 0207 	and.w	r2, r3, #7
 8003bc6:	687b      	ldr	r3, [r7, #4]
 8003bc8:	681b      	ldr	r3, [r3, #0]
 8003bca:	4442      	add	r2, r8
 8003bcc:	609a      	str	r2, [r3, #8]
    {
      pclk = HAL_RCC_GetPCLK1Freq();
      huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
    }
  }
}
 8003bce:	e1b2      	b.n	8003f36 <UART_SetConfig+0x6e2>
 8003bd0:	40011000 	.word	0x40011000
 8003bd4:	40011400 	.word	0x40011400
 8003bd8:	51eb851f 	.word	0x51eb851f
    if ((huart->Instance == USART1) || (huart->Instance == USART6))
 8003bdc:	687b      	ldr	r3, [r7, #4]
 8003bde:	681b      	ldr	r3, [r3, #0]
 8003be0:	4ad7      	ldr	r2, [pc, #860]	; (8003f40 <UART_SetConfig+0x6ec>)
 8003be2:	4293      	cmp	r3, r2
 8003be4:	d005      	beq.n	8003bf2 <UART_SetConfig+0x39e>
 8003be6:	687b      	ldr	r3, [r7, #4]
 8003be8:	681b      	ldr	r3, [r3, #0]
 8003bea:	4ad6      	ldr	r2, [pc, #856]	; (8003f44 <UART_SetConfig+0x6f0>)
 8003bec:	4293      	cmp	r3, r2
 8003bee:	f040 80d1 	bne.w	8003d94 <UART_SetConfig+0x540>
      pclk = HAL_RCC_GetPCLK2Freq();
 8003bf2:	f7ff f905 	bl	8002e00 <HAL_RCC_GetPCLK2Freq>
 8003bf6:	60b8      	str	r0, [r7, #8]
      huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
 8003bf8:	68bb      	ldr	r3, [r7, #8]
 8003bfa:	469a      	mov	sl, r3
 8003bfc:	f04f 0b00 	mov.w	fp, #0
 8003c00:	46d0      	mov	r8, sl
 8003c02:	46d9      	mov	r9, fp
 8003c04:	eb18 0308 	adds.w	r3, r8, r8
 8003c08:	eb49 0409 	adc.w	r4, r9, r9
 8003c0c:	4698      	mov	r8, r3
 8003c0e:	46a1      	mov	r9, r4
 8003c10:	eb18 080a 	adds.w	r8, r8, sl
 8003c14:	eb49 090b 	adc.w	r9, r9, fp
 8003c18:	f04f 0100 	mov.w	r1, #0
 8003c1c:	f04f 0200 	mov.w	r2, #0
 8003c20:	ea4f 02c9 	mov.w	r2, r9, lsl #3
 8003c24:	ea42 7258 	orr.w	r2, r2, r8, lsr #29
 8003c28:	ea4f 01c8 	mov.w	r1, r8, lsl #3
 8003c2c:	4688      	mov	r8, r1
 8003c2e:	4691      	mov	r9, r2
 8003c30:	eb1a 0508 	adds.w	r5, sl, r8
 8003c34:	eb4b 0609 	adc.w	r6, fp, r9
 8003c38:	687b      	ldr	r3, [r7, #4]
 8003c3a:	685b      	ldr	r3, [r3, #4]
 8003c3c:	4619      	mov	r1, r3
 8003c3e:	f04f 0200 	mov.w	r2, #0
 8003c42:	f04f 0300 	mov.w	r3, #0
 8003c46:	f04f 0400 	mov.w	r4, #0
 8003c4a:	0094      	lsls	r4, r2, #2
 8003c4c:	ea44 7491 	orr.w	r4, r4, r1, lsr #30
 8003c50:	008b      	lsls	r3, r1, #2
 8003c52:	461a      	mov	r2, r3
 8003c54:	4623      	mov	r3, r4
 8003c56:	4628      	mov	r0, r5
 8003c58:	4631      	mov	r1, r6
 8003c5a:	f7fc fac3 	bl	80001e4 <__aeabi_uldivmod>
 8003c5e:	4603      	mov	r3, r0
 8003c60:	460c      	mov	r4, r1
 8003c62:	461a      	mov	r2, r3
 8003c64:	4bb8      	ldr	r3, [pc, #736]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003c66:	fba3 2302 	umull	r2, r3, r3, r2
 8003c6a:	095b      	lsrs	r3, r3, #5
 8003c6c:	ea4f 1803 	mov.w	r8, r3, lsl #4
 8003c70:	68bb      	ldr	r3, [r7, #8]
 8003c72:	469b      	mov	fp, r3
 8003c74:	f04f 0c00 	mov.w	ip, #0
 8003c78:	46d9      	mov	r9, fp
 8003c7a:	46e2      	mov	sl, ip
 8003c7c:	eb19 0309 	adds.w	r3, r9, r9
 8003c80:	eb4a 040a 	adc.w	r4, sl, sl
 8003c84:	4699      	mov	r9, r3
 8003c86:	46a2      	mov	sl, r4
 8003c88:	eb19 090b 	adds.w	r9, r9, fp
 8003c8c:	eb4a 0a0c 	adc.w	sl, sl, ip
 8003c90:	f04f 0100 	mov.w	r1, #0
 8003c94:	f04f 0200 	mov.w	r2, #0
 8003c98:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 8003c9c:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 8003ca0:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003ca4:	4689      	mov	r9, r1
 8003ca6:	4692      	mov	sl, r2
 8003ca8:	eb1b 0509 	adds.w	r5, fp, r9
 8003cac:	eb4c 060a 	adc.w	r6, ip, sl
 8003cb0:	687b      	ldr	r3, [r7, #4]
 8003cb2:	685b      	ldr	r3, [r3, #4]
 8003cb4:	4619      	mov	r1, r3
 8003cb6:	f04f 0200 	mov.w	r2, #0
 8003cba:	f04f 0300 	mov.w	r3, #0
 8003cbe:	f04f 0400 	mov.w	r4, #0
 8003cc2:	0094      	lsls	r4, r2, #2
 8003cc4:	ea44 7491 	orr.w	r4, r4, r1, lsr #30
 8003cc8:	008b      	lsls	r3, r1, #2
 8003cca:	461a      	mov	r2, r3
 8003ccc:	4623      	mov	r3, r4
 8003cce:	4628      	mov	r0, r5
 8003cd0:	4631      	mov	r1, r6
 8003cd2:	f7fc fa87 	bl	80001e4 <__aeabi_uldivmod>
 8003cd6:	4603      	mov	r3, r0
 8003cd8:	460c      	mov	r4, r1
 8003cda:	461a      	mov	r2, r3
 8003cdc:	4b9a      	ldr	r3, [pc, #616]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003cde:	fba3 1302 	umull	r1, r3, r3, r2
 8003ce2:	095b      	lsrs	r3, r3, #5
 8003ce4:	2164      	movs	r1, #100	; 0x64
 8003ce6:	fb01 f303 	mul.w	r3, r1, r3
 8003cea:	1ad3      	subs	r3, r2, r3
 8003cec:	011b      	lsls	r3, r3, #4
 8003cee:	3332      	adds	r3, #50	; 0x32
 8003cf0:	4a95      	ldr	r2, [pc, #596]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003cf2:	fba2 2303 	umull	r2, r3, r2, r3
 8003cf6:	095b      	lsrs	r3, r3, #5
 8003cf8:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
 8003cfc:	4498      	add	r8, r3
 8003cfe:	68bb      	ldr	r3, [r7, #8]
 8003d00:	469b      	mov	fp, r3
 8003d02:	f04f 0c00 	mov.w	ip, #0
 8003d06:	46d9      	mov	r9, fp
 8003d08:	46e2      	mov	sl, ip
 8003d0a:	eb19 0309 	adds.w	r3, r9, r9
 8003d0e:	eb4a 040a 	adc.w	r4, sl, sl
 8003d12:	4699      	mov	r9, r3
 8003d14:	46a2      	mov	sl, r4
 8003d16:	eb19 090b 	adds.w	r9, r9, fp
 8003d1a:	eb4a 0a0c 	adc.w	sl, sl, ip
 8003d1e:	f04f 0100 	mov.w	r1, #0
 8003d22:	f04f 0200 	mov.w	r2, #0
 8003d26:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 8003d2a:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 8003d2e:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003d32:	4689      	mov	r9, r1
 8003d34:	4692      	mov	sl, r2
 8003d36:	eb1b 0509 	adds.w	r5, fp, r9
 8003d3a:	eb4c 060a 	adc.w	r6, ip, sl
 8003d3e:	687b      	ldr	r3, [r7, #4]
 8003d40:	685b      	ldr	r3, [r3, #4]
 8003d42:	4619      	mov	r1, r3
 8003d44:	f04f 0200 	mov.w	r2, #0
 8003d48:	f04f 0300 	mov.w	r3, #0
 8003d4c:	f04f 0400 	mov.w	r4, #0
 8003d50:	0094      	lsls	r4, r2, #2
 8003d52:	ea44 7491 	orr.w	r4, r4, r1, lsr #30
 8003d56:	008b      	lsls	r3, r1, #2
 8003d58:	461a      	mov	r2, r3
 8003d5a:	4623      	mov	r3, r4
 8003d5c:	4628      	mov	r0, r5
 8003d5e:	4631      	mov	r1, r6
 8003d60:	f7fc fa40 	bl	80001e4 <__aeabi_uldivmod>
 8003d64:	4603      	mov	r3, r0
 8003d66:	460c      	mov	r4, r1
 8003d68:	461a      	mov	r2, r3
 8003d6a:	4b77      	ldr	r3, [pc, #476]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003d6c:	fba3 1302 	umull	r1, r3, r3, r2
 8003d70:	095b      	lsrs	r3, r3, #5
 8003d72:	2164      	movs	r1, #100	; 0x64
 8003d74:	fb01 f303 	mul.w	r3, r1, r3
 8003d78:	1ad3      	subs	r3, r2, r3
 8003d7a:	011b      	lsls	r3, r3, #4
 8003d7c:	3332      	adds	r3, #50	; 0x32
 8003d7e:	4a72      	ldr	r2, [pc, #456]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003d80:	fba2 2303 	umull	r2, r3, r2, r3
 8003d84:	095b      	lsrs	r3, r3, #5
 8003d86:	f003 020f 	and.w	r2, r3, #15
 8003d8a:	687b      	ldr	r3, [r7, #4]
 8003d8c:	681b      	ldr	r3, [r3, #0]
 8003d8e:	4442      	add	r2, r8
 8003d90:	609a      	str	r2, [r3, #8]
 8003d92:	e0d0      	b.n	8003f36 <UART_SetConfig+0x6e2>
      pclk = HAL_RCC_GetPCLK1Freq();
 8003d94:	f7ff f820 	bl	8002dd8 <HAL_RCC_GetPCLK1Freq>
 8003d98:	60b8      	str	r0, [r7, #8]
      huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
 8003d9a:	68bb      	ldr	r3, [r7, #8]
 8003d9c:	469a      	mov	sl, r3
 8003d9e:	f04f 0b00 	mov.w	fp, #0
 8003da2:	46d0      	mov	r8, sl
 8003da4:	46d9      	mov	r9, fp
 8003da6:	eb18 0308 	adds.w	r3, r8, r8
 8003daa:	eb49 0409 	adc.w	r4, r9, r9
 8003dae:	4698      	mov	r8, r3
 8003db0:	46a1      	mov	r9, r4
 8003db2:	eb18 080a 	adds.w	r8, r8, sl
 8003db6:	eb49 090b 	adc.w	r9, r9, fp
 8003dba:	f04f 0100 	mov.w	r1, #0
 8003dbe:	f04f 0200 	mov.w	r2, #0
 8003dc2:	ea4f 02c9 	mov.w	r2, r9, lsl #3
 8003dc6:	ea42 7258 	orr.w	r2, r2, r8, lsr #29
 8003dca:	ea4f 01c8 	mov.w	r1, r8, lsl #3
 8003dce:	4688      	mov	r8, r1
 8003dd0:	4691      	mov	r9, r2
 8003dd2:	eb1a 0508 	adds.w	r5, sl, r8
 8003dd6:	eb4b 0609 	adc.w	r6, fp, r9
 8003dda:	687b      	ldr	r3, [r7, #4]
 8003ddc:	685b      	ldr	r3, [r3, #4]
 8003dde:	4619      	mov	r1, r3
 8003de0:	f04f 0200 	mov.w	r2, #0
 8003de4:	f04f 0300 	mov.w	r3, #0
 8003de8:	f04f 0400 	mov.w	r4, #0
 8003dec:	0094      	lsls	r4, r2, #2
 8003dee:	ea44 7491 	orr.w	r4, r4, r1, lsr #30
 8003df2:	008b      	lsls	r3, r1, #2
 8003df4:	461a      	mov	r2, r3
 8003df6:	4623      	mov	r3, r4
 8003df8:	4628      	mov	r0, r5
 8003dfa:	4631      	mov	r1, r6
 8003dfc:	f7fc f9f2 	bl	80001e4 <__aeabi_uldivmod>
 8003e00:	4603      	mov	r3, r0
 8003e02:	460c      	mov	r4, r1
 8003e04:	461a      	mov	r2, r3
 8003e06:	4b50      	ldr	r3, [pc, #320]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003e08:	fba3 2302 	umull	r2, r3, r3, r2
 8003e0c:	095b      	lsrs	r3, r3, #5
 8003e0e:	ea4f 1803 	mov.w	r8, r3, lsl #4
 8003e12:	68bb      	ldr	r3, [r7, #8]
 8003e14:	469b      	mov	fp, r3
 8003e16:	f04f 0c00 	mov.w	ip, #0
 8003e1a:	46d9      	mov	r9, fp
 8003e1c:	46e2      	mov	sl, ip
 8003e1e:	eb19 0309 	adds.w	r3, r9, r9
 8003e22:	eb4a 040a 	adc.w	r4, sl, sl
 8003e26:	4699      	mov	r9, r3
 8003e28:	46a2      	mov	sl, r4
 8003e2a:	eb19 090b 	adds.w	r9, r9, fp
 8003e2e:	eb4a 0a0c 	adc.w	sl, sl, ip
 8003e32:	f04f 0100 	mov.w	r1, #0
 8003e36:	f04f 0200 	mov.w	r2, #0
 8003e3a:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 8003e3e:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 8003e42:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003e46:	4689      	mov	r9, r1
 8003e48:	4692      	mov	sl, r2
 8003e4a:	eb1b 0509 	adds.w	r5, fp, r9
 8003e4e:	eb4c 060a 	adc.w	r6, ip, sl
 8003e52:	687b      	ldr	r3, [r7, #4]
 8003e54:	685b      	ldr	r3, [r3, #4]
 8003e56:	4619      	mov	r1, r3
 8003e58:	f04f 0200 	mov.w	r2, #0
 8003e5c:	f04f 0300 	mov.w	r3, #0
 8003e60:	f04f 0400 	mov.w	r4, #0
 8003e64:	0094      	lsls	r4, r2, #2
 8003e66:	ea44 7491 	orr.w	r4, r4, r1, lsr #30
 8003e6a:	008b      	lsls	r3, r1, #2
 8003e6c:	461a      	mov	r2, r3
 8003e6e:	4623      	mov	r3, r4
 8003e70:	4628      	mov	r0, r5
 8003e72:	4631      	mov	r1, r6
 8003e74:	f7fc f9b6 	bl	80001e4 <__aeabi_uldivmod>
 8003e78:	4603      	mov	r3, r0
 8003e7a:	460c      	mov	r4, r1
 8003e7c:	461a      	mov	r2, r3
 8003e7e:	4b32      	ldr	r3, [pc, #200]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003e80:	fba3 1302 	umull	r1, r3, r3, r2
 8003e84:	095b      	lsrs	r3, r3, #5
 8003e86:	2164      	movs	r1, #100	; 0x64
 8003e88:	fb01 f303 	mul.w	r3, r1, r3
 8003e8c:	1ad3      	subs	r3, r2, r3
 8003e8e:	011b      	lsls	r3, r3, #4
 8003e90:	3332      	adds	r3, #50	; 0x32
 8003e92:	4a2d      	ldr	r2, [pc, #180]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003e94:	fba2 2303 	umull	r2, r3, r2, r3
 8003e98:	095b      	lsrs	r3, r3, #5
 8003e9a:	f003 03f0 	and.w	r3, r3, #240	; 0xf0
 8003e9e:	4498      	add	r8, r3
 8003ea0:	68bb      	ldr	r3, [r7, #8]
 8003ea2:	469b      	mov	fp, r3
 8003ea4:	f04f 0c00 	mov.w	ip, #0
 8003ea8:	46d9      	mov	r9, fp
 8003eaa:	46e2      	mov	sl, ip
 8003eac:	eb19 0309 	adds.w	r3, r9, r9
 8003eb0:	eb4a 040a 	adc.w	r4, sl, sl
 8003eb4:	4699      	mov	r9, r3
 8003eb6:	46a2      	mov	sl, r4
 8003eb8:	eb19 090b 	adds.w	r9, r9, fp
 8003ebc:	eb4a 0a0c 	adc.w	sl, sl, ip
 8003ec0:	f04f 0100 	mov.w	r1, #0
 8003ec4:	f04f 0200 	mov.w	r2, #0
 8003ec8:	ea4f 02ca 	mov.w	r2, sl, lsl #3
 8003ecc:	ea42 7259 	orr.w	r2, r2, r9, lsr #29
 8003ed0:	ea4f 01c9 	mov.w	r1, r9, lsl #3
 8003ed4:	4689      	mov	r9, r1
 8003ed6:	4692      	mov	sl, r2
 8003ed8:	eb1b 0509 	adds.w	r5, fp, r9
 8003edc:	eb4c 060a 	adc.w	r6, ip, sl
 8003ee0:	687b      	ldr	r3, [r7, #4]
 8003ee2:	685b      	ldr	r3, [r3, #4]
 8003ee4:	4619      	mov	r1, r3
 8003ee6:	f04f 0200 	mov.w	r2, #0
 8003eea:	f04f 0300 	mov.w	r3, #0
 8003eee:	f04f 0400 	mov.w	r4, #0
 8003ef2:	0094      	lsls	r4, r2, #2
 8003ef4:	ea44 7491 	orr.w	r4, r4, r1, lsr #30
 8003ef8:	008b      	lsls	r3, r1, #2
 8003efa:	461a      	mov	r2, r3
 8003efc:	4623      	mov	r3, r4
 8003efe:	4628      	mov	r0, r5
 8003f00:	4631      	mov	r1, r6
 8003f02:	f7fc f96f 	bl	80001e4 <__aeabi_uldivmod>
 8003f06:	4603      	mov	r3, r0
 8003f08:	460c      	mov	r4, r1
 8003f0a:	461a      	mov	r2, r3
 8003f0c:	4b0e      	ldr	r3, [pc, #56]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003f0e:	fba3 1302 	umull	r1, r3, r3, r2
 8003f12:	095b      	lsrs	r3, r3, #5
 8003f14:	2164      	movs	r1, #100	; 0x64
 8003f16:	fb01 f303 	mul.w	r3, r1, r3
 8003f1a:	1ad3      	subs	r3, r2, r3
 8003f1c:	011b      	lsls	r3, r3, #4
 8003f1e:	3332      	adds	r3, #50	; 0x32
 8003f20:	4a09      	ldr	r2, [pc, #36]	; (8003f48 <UART_SetConfig+0x6f4>)
 8003f22:	fba2 2303 	umull	r2, r3, r2, r3
 8003f26:	095b      	lsrs	r3, r3, #5
 8003f28:	f003 020f 	and.w	r2, r3, #15
 8003f2c:	687b      	ldr	r3, [r7, #4]
 8003f2e:	681b      	ldr	r3, [r3, #0]
 8003f30:	4442      	add	r2, r8
 8003f32:	609a      	str	r2, [r3, #8]
}
 8003f34:	e7ff      	b.n	8003f36 <UART_SetConfig+0x6e2>
 8003f36:	bf00      	nop
 8003f38:	3714      	adds	r7, #20
 8003f3a:	46bd      	mov	sp, r7
 8003f3c:	e8bd 8ff0 	ldmia.w	sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
 8003f40:	40011000 	.word	0x40011000
 8003f44:	40011400 	.word	0x40011400
 8003f48:	51eb851f 	.word	0x51eb851f

08003f4c <MX_FATFS_Init>:
/* USER CODE BEGIN Variables */

/* USER CODE END Variables */

void MX_FATFS_Init(void)
{
 8003f4c:	b580      	push	{r7, lr}
 8003f4e:	af00      	add	r7, sp, #0
  /*## FatFS: Link the USER driver ###########################*/
  retUSER = FATFS_LinkDriver(&USER_Driver, USERPath);
 8003f50:	4904      	ldr	r1, [pc, #16]	; (8003f64 <MX_FATFS_Init+0x18>)
 8003f52:	4805      	ldr	r0, [pc, #20]	; (8003f68 <MX_FATFS_Init+0x1c>)
 8003f54:	f002 ff72 	bl	8006e3c <FATFS_LinkDriver>
 8003f58:	4603      	mov	r3, r0
 8003f5a:	461a      	mov	r2, r3
 8003f5c:	4b03      	ldr	r3, [pc, #12]	; (8003f6c <MX_FATFS_Init+0x20>)
 8003f5e:	701a      	strb	r2, [r3, #0]

  /* USER CODE BEGIN Init */
  /* additional user code for init */
  /* USER CODE END Init */
}
 8003f60:	bf00      	nop
 8003f62:	bd80      	pop	{r7, pc}
 8003f64:	20002444 	.word	0x20002444
 8003f68:	20000010 	.word	0x20000010
 8003f6c:	20002448 	.word	0x20002448

08003f70 <get_fattime>:
  * @brief  Gets Time from RTC
  * @param  None
  * @retval Time in DWORD
  */
DWORD get_fattime(void)
{
 8003f70:	b480      	push	{r7}
 8003f72:	af00      	add	r7, sp, #0
  /* USER CODE BEGIN get_fattime */
  return 0;
 8003f74:	2300      	movs	r3, #0
  /* USER CODE END get_fattime */
}
 8003f76:	4618      	mov	r0, r3
 8003f78:	46bd      	mov	sp, r7
 8003f7a:	f85d 7b04 	ldr.w	r7, [sp], #4
 8003f7e:	4770      	bx	lr

08003f80 <USER_initialize>:
  * @retval DSTATUS: Operation status
  */
DSTATUS USER_initialize (
	BYTE pdrv           /* Physical drive nmuber to identify the drive */
)
{
 8003f80:	b580      	push	{r7, lr}
 8003f82:	b082      	sub	sp, #8
 8003f84:	af00      	add	r7, sp, #0
 8003f86:	4603      	mov	r3, r0
 8003f88:	71fb      	strb	r3, [r7, #7]
  /* USER CODE BEGIN INIT */
    SD_disk_initialize (pdrv);
 8003f8a:	79fb      	ldrb	r3, [r7, #7]
 8003f8c:	4618      	mov	r0, r3
 8003f8e:	f7fc fc5d 	bl	800084c <SD_disk_initialize>
  /* USER CODE END INIT */
}
 8003f92:	bf00      	nop
 8003f94:	4618      	mov	r0, r3
 8003f96:	3708      	adds	r7, #8
 8003f98:	46bd      	mov	sp, r7
 8003f9a:	bd80      	pop	{r7, pc}

08003f9c <USER_status>:
  * @retval DSTATUS: Operation status
  */
DSTATUS USER_status (
	BYTE pdrv       /* Physical drive number to identify the drive */
)
{
 8003f9c:	b580      	push	{r7, lr}
 8003f9e:	b082      	sub	sp, #8
 8003fa0:	af00      	add	r7, sp, #0
 8003fa2:	4603      	mov	r3, r0
 8003fa4:	71fb      	strb	r3, [r7, #7]
  /* USER CODE BEGIN STATUS */
	SD_disk_status (pdrv);
 8003fa6:	79fb      	ldrb	r3, [r7, #7]
 8003fa8:	4618      	mov	r0, r3
 8003faa:	f7fc fd35 	bl	8000a18 <SD_disk_status>
  /* USER CODE END STATUS */
}
 8003fae:	bf00      	nop
 8003fb0:	4618      	mov	r0, r3
 8003fb2:	3708      	adds	r7, #8
 8003fb4:	46bd      	mov	sp, r7
 8003fb6:	bd80      	pop	{r7, pc}

08003fb8 <USER_read>:
	BYTE pdrv,      /* Physical drive nmuber to identify the drive */
	BYTE *buff,     /* Data buffer to store read data */
	DWORD sector,   /* Sector address in LBA */
	UINT count      /* Number of sectors to read */
)
{
 8003fb8:	b580      	push	{r7, lr}
 8003fba:	b084      	sub	sp, #16
 8003fbc:	af00      	add	r7, sp, #0
 8003fbe:	60b9      	str	r1, [r7, #8]
 8003fc0:	607a      	str	r2, [r7, #4]
 8003fc2:	603b      	str	r3, [r7, #0]
 8003fc4:	4603      	mov	r3, r0
 8003fc6:	73fb      	strb	r3, [r7, #15]
  /* USER CODE BEGIN READ */
	SD_disk_read (pdrv, buff, sector, count);
 8003fc8:	7bf8      	ldrb	r0, [r7, #15]
 8003fca:	683b      	ldr	r3, [r7, #0]
 8003fcc:	687a      	ldr	r2, [r7, #4]
 8003fce:	68b9      	ldr	r1, [r7, #8]
 8003fd0:	f7fc fd38 	bl	8000a44 <SD_disk_read>
  /* USER CODE END READ */
}
 8003fd4:	bf00      	nop
 8003fd6:	4618      	mov	r0, r3
 8003fd8:	3710      	adds	r7, #16
 8003fda:	46bd      	mov	sp, r7
 8003fdc:	bd80      	pop	{r7, pc}

08003fde <USER_write>:
	BYTE pdrv,          /* Physical drive nmuber to identify the drive */
	const BYTE *buff,   /* Data to be written */
	DWORD sector,       /* Sector address in LBA */
	UINT count          /* Number of sectors to write */
)
{
 8003fde:	b580      	push	{r7, lr}
 8003fe0:	b084      	sub	sp, #16
 8003fe2:	af00      	add	r7, sp, #0
 8003fe4:	60b9      	str	r1, [r7, #8]
 8003fe6:	607a      	str	r2, [r7, #4]
 8003fe8:	603b      	str	r3, [r7, #0]
 8003fea:	4603      	mov	r3, r0
 8003fec:	73fb      	strb	r3, [r7, #15]
  /* USER CODE BEGIN WRITE */
  /* USER CODE HERE */
	SD_disk_write (pdrv, buff, sector, count);
 8003fee:	7bf8      	ldrb	r0, [r7, #15]
 8003ff0:	683b      	ldr	r3, [r7, #0]
 8003ff2:	687a      	ldr	r2, [r7, #4]
 8003ff4:	68b9      	ldr	r1, [r7, #8]
 8003ff6:	f7fc fd8f 	bl	8000b18 <SD_disk_write>
  /* USER CODE END WRITE */
}
 8003ffa:	bf00      	nop
 8003ffc:	4618      	mov	r0, r3
 8003ffe:	3710      	adds	r7, #16
 8004000:	46bd      	mov	sp, r7
 8004002:	bd80      	pop	{r7, pc}

08004004 <USER_ioctl>:
DRESULT USER_ioctl (
	BYTE pdrv,      /* Physical drive nmuber (0..) */
	BYTE cmd,       /* Control code */
	void *buff      /* Buffer to send/receive control data */
)
{
 8004004:	b580      	push	{r7, lr}
 8004006:	b082      	sub	sp, #8
 8004008:	af00      	add	r7, sp, #0
 800400a:	4603      	mov	r3, r0
 800400c:	603a      	str	r2, [r7, #0]
 800400e:	71fb      	strb	r3, [r7, #7]
 8004010:	460b      	mov	r3, r1
 8004012:	71bb      	strb	r3, [r7, #6]
  /* USER CODE BEGIN IOCTL */
	SD_disk_ioctl (pdrv, cmd, buff);
 8004014:	79fb      	ldrb	r3, [r7, #7]
 8004016:	79b9      	ldrb	r1, [r7, #6]
 8004018:	683a      	ldr	r2, [r7, #0]
 800401a:	4618      	mov	r0, r3
 800401c:	f7fc fe00 	bl	8000c20 <SD_disk_ioctl>
  /* USER CODE END IOCTL */
}
 8004020:	bf00      	nop
 8004022:	4618      	mov	r0, r3
 8004024:	3708      	adds	r7, #8
 8004026:	46bd      	mov	sp, r7
 8004028:	bd80      	pop	{r7, pc}
	...

0800402c <disk_status>:
  * @retval DSTATUS: Operation status
  */
DSTATUS disk_status (
	BYTE pdrv		/* Physical drive number to identify the drive */
)
{
 800402c:	b580      	push	{r7, lr}
 800402e:	b084      	sub	sp, #16
 8004030:	af00      	add	r7, sp, #0
 8004032:	4603      	mov	r3, r0
 8004034:	71fb      	strb	r3, [r7, #7]
  DSTATUS stat;

  stat = disk.drv[pdrv]->disk_status(disk.lun[pdrv]);
 8004036:	79fb      	ldrb	r3, [r7, #7]
 8004038:	4a08      	ldr	r2, [pc, #32]	; (800405c <disk_status+0x30>)
 800403a:	009b      	lsls	r3, r3, #2
 800403c:	4413      	add	r3, r2
 800403e:	685b      	ldr	r3, [r3, #4]
 8004040:	685b      	ldr	r3, [r3, #4]
 8004042:	79fa      	ldrb	r2, [r7, #7]
 8004044:	4905      	ldr	r1, [pc, #20]	; (800405c <disk_status+0x30>)
 8004046:	440a      	add	r2, r1
 8004048:	7a12      	ldrb	r2, [r2, #8]
 800404a:	4610      	mov	r0, r2
 800404c:	4798      	blx	r3
 800404e:	4603      	mov	r3, r0
 8004050:	73fb      	strb	r3, [r7, #15]
  return stat;
 8004052:	7bfb      	ldrb	r3, [r7, #15]
}
 8004054:	4618      	mov	r0, r3
 8004056:	3710      	adds	r7, #16
 8004058:	46bd      	mov	sp, r7
 800405a:	bd80      	pop	{r7, pc}
 800405c:	2000026c 	.word	0x2000026c

08004060 <disk_initialize>:
  * @retval DSTATUS: Operation status
  */
DSTATUS disk_initialize (
	BYTE pdrv				/* Physical drive nmuber to identify the drive */
)
{
 8004060:	b580      	push	{r7, lr}
 8004062:	b084      	sub	sp, #16
 8004064:	af00      	add	r7, sp, #0
 8004066:	4603      	mov	r3, r0
 8004068:	71fb      	strb	r3, [r7, #7]
  DSTATUS stat = RES_OK;
 800406a:	2300      	movs	r3, #0
 800406c:	73fb      	strb	r3, [r7, #15]

  if(disk.is_initialized[pdrv] == 0)
 800406e:	79fb      	ldrb	r3, [r7, #7]
 8004070:	4a0d      	ldr	r2, [pc, #52]	; (80040a8 <disk_initialize+0x48>)
 8004072:	5cd3      	ldrb	r3, [r2, r3]
 8004074:	2b00      	cmp	r3, #0
 8004076:	d111      	bne.n	800409c <disk_initialize+0x3c>
  {
    disk.is_initialized[pdrv] = 1;
 8004078:	79fb      	ldrb	r3, [r7, #7]
 800407a:	4a0b      	ldr	r2, [pc, #44]	; (80040a8 <disk_initialize+0x48>)
 800407c:	2101      	movs	r1, #1
 800407e:	54d1      	strb	r1, [r2, r3]
    stat = disk.drv[pdrv]->disk_initialize(disk.lun[pdrv]);
 8004080:	79fb      	ldrb	r3, [r7, #7]
 8004082:	4a09      	ldr	r2, [pc, #36]	; (80040a8 <disk_initialize+0x48>)
 8004084:	009b      	lsls	r3, r3, #2
 8004086:	4413      	add	r3, r2
 8004088:	685b      	ldr	r3, [r3, #4]
 800408a:	681b      	ldr	r3, [r3, #0]
 800408c:	79fa      	ldrb	r2, [r7, #7]
 800408e:	4906      	ldr	r1, [pc, #24]	; (80040a8 <disk_initialize+0x48>)
 8004090:	440a      	add	r2, r1
 8004092:	7a12      	ldrb	r2, [r2, #8]
 8004094:	4610      	mov	r0, r2
 8004096:	4798      	blx	r3
 8004098:	4603      	mov	r3, r0
 800409a:	73fb      	strb	r3, [r7, #15]
  }
  return stat;
 800409c:	7bfb      	ldrb	r3, [r7, #15]
}
 800409e:	4618      	mov	r0, r3
 80040a0:	3710      	adds	r7, #16
 80040a2:	46bd      	mov	sp, r7
 80040a4:	bd80      	pop	{r7, pc}
 80040a6:	bf00      	nop
 80040a8:	2000026c 	.word	0x2000026c

080040ac <disk_read>:
	BYTE pdrv,		/* Physical drive nmuber to identify the drive */
	BYTE *buff,		/* Data buffer to store read data */
	DWORD sector,	        /* Sector address in LBA */
	UINT count		/* Number of sectors to read */
)
{
 80040ac:	b590      	push	{r4, r7, lr}
 80040ae:	b087      	sub	sp, #28
 80040b0:	af00      	add	r7, sp, #0
 80040b2:	60b9      	str	r1, [r7, #8]
 80040b4:	607a      	str	r2, [r7, #4]
 80040b6:	603b      	str	r3, [r7, #0]
 80040b8:	4603      	mov	r3, r0
 80040ba:	73fb      	strb	r3, [r7, #15]
  DRESULT res;

  res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
 80040bc:	7bfb      	ldrb	r3, [r7, #15]
 80040be:	4a0a      	ldr	r2, [pc, #40]	; (80040e8 <disk_read+0x3c>)
 80040c0:	009b      	lsls	r3, r3, #2
 80040c2:	4413      	add	r3, r2
 80040c4:	685b      	ldr	r3, [r3, #4]
 80040c6:	689c      	ldr	r4, [r3, #8]
 80040c8:	7bfb      	ldrb	r3, [r7, #15]
 80040ca:	4a07      	ldr	r2, [pc, #28]	; (80040e8 <disk_read+0x3c>)
 80040cc:	4413      	add	r3, r2
 80040ce:	7a18      	ldrb	r0, [r3, #8]
 80040d0:	683b      	ldr	r3, [r7, #0]
 80040d2:	687a      	ldr	r2, [r7, #4]
 80040d4:	68b9      	ldr	r1, [r7, #8]
 80040d6:	47a0      	blx	r4
 80040d8:	4603      	mov	r3, r0
 80040da:	75fb      	strb	r3, [r7, #23]
  return res;
 80040dc:	7dfb      	ldrb	r3, [r7, #23]
}
 80040de:	4618      	mov	r0, r3
 80040e0:	371c      	adds	r7, #28
 80040e2:	46bd      	mov	sp, r7
 80040e4:	bd90      	pop	{r4, r7, pc}
 80040e6:	bf00      	nop
 80040e8:	2000026c 	.word	0x2000026c

080040ec <disk_write>:
	BYTE pdrv,		/* Physical drive nmuber to identify the drive */
	const BYTE *buff,	/* Data to be written */
	DWORD sector,		/* Sector address in LBA */
	UINT count        	/* Number of sectors to write */
)
{
 80040ec:	b590      	push	{r4, r7, lr}
 80040ee:	b087      	sub	sp, #28
 80040f0:	af00      	add	r7, sp, #0
 80040f2:	60b9      	str	r1, [r7, #8]
 80040f4:	607a      	str	r2, [r7, #4]
 80040f6:	603b      	str	r3, [r7, #0]
 80040f8:	4603      	mov	r3, r0
 80040fa:	73fb      	strb	r3, [r7, #15]
  DRESULT res;

  res = disk.drv[pdrv]->disk_write(disk.lun[pdrv], buff, sector, count);
 80040fc:	7bfb      	ldrb	r3, [r7, #15]
 80040fe:	4a0a      	ldr	r2, [pc, #40]	; (8004128 <disk_write+0x3c>)
 8004100:	009b      	lsls	r3, r3, #2
 8004102:	4413      	add	r3, r2
 8004104:	685b      	ldr	r3, [r3, #4]
 8004106:	68dc      	ldr	r4, [r3, #12]
 8004108:	7bfb      	ldrb	r3, [r7, #15]
 800410a:	4a07      	ldr	r2, [pc, #28]	; (8004128 <disk_write+0x3c>)
 800410c:	4413      	add	r3, r2
 800410e:	7a18      	ldrb	r0, [r3, #8]
 8004110:	683b      	ldr	r3, [r7, #0]
 8004112:	687a      	ldr	r2, [r7, #4]
 8004114:	68b9      	ldr	r1, [r7, #8]
 8004116:	47a0      	blx	r4
 8004118:	4603      	mov	r3, r0
 800411a:	75fb      	strb	r3, [r7, #23]
  return res;
 800411c:	7dfb      	ldrb	r3, [r7, #23]
}
 800411e:	4618      	mov	r0, r3
 8004120:	371c      	adds	r7, #28
 8004122:	46bd      	mov	sp, r7
 8004124:	bd90      	pop	{r4, r7, pc}
 8004126:	bf00      	nop
 8004128:	2000026c 	.word	0x2000026c

0800412c <disk_ioctl>:
DRESULT disk_ioctl (
	BYTE pdrv,		/* Physical drive nmuber (0..) */
	BYTE cmd,		/* Control code */
	void *buff		/* Buffer to send/receive control data */
)
{
 800412c:	b580      	push	{r7, lr}
 800412e:	b084      	sub	sp, #16
 8004130:	af00      	add	r7, sp, #0
 8004132:	4603      	mov	r3, r0
 8004134:	603a      	str	r2, [r7, #0]
 8004136:	71fb      	strb	r3, [r7, #7]
 8004138:	460b      	mov	r3, r1
 800413a:	71bb      	strb	r3, [r7, #6]
  DRESULT res;

  res = disk.drv[pdrv]->disk_ioctl(disk.lun[pdrv], cmd, buff);
 800413c:	79fb      	ldrb	r3, [r7, #7]
 800413e:	4a09      	ldr	r2, [pc, #36]	; (8004164 <disk_ioctl+0x38>)
 8004140:	009b      	lsls	r3, r3, #2
 8004142:	4413      	add	r3, r2
 8004144:	685b      	ldr	r3, [r3, #4]
 8004146:	691b      	ldr	r3, [r3, #16]
 8004148:	79fa      	ldrb	r2, [r7, #7]
 800414a:	4906      	ldr	r1, [pc, #24]	; (8004164 <disk_ioctl+0x38>)
 800414c:	440a      	add	r2, r1
 800414e:	7a10      	ldrb	r0, [r2, #8]
 8004150:	79b9      	ldrb	r1, [r7, #6]
 8004152:	683a      	ldr	r2, [r7, #0]
 8004154:	4798      	blx	r3
 8004156:	4603      	mov	r3, r0
 8004158:	73fb      	strb	r3, [r7, #15]
  return res;
 800415a:	7bfb      	ldrb	r3, [r7, #15]
}
 800415c:	4618      	mov	r0, r3
 800415e:	3710      	adds	r7, #16
 8004160:	46bd      	mov	sp, r7
 8004162:	bd80      	pop	{r7, pc}
 8004164:	2000026c 	.word	0x2000026c

08004168 <ld_word>:
/* Load/Store multi-byte word in the FAT structure                       */
/*-----------------------------------------------------------------------*/

static
WORD ld_word (const BYTE* ptr)	/*	 Load a 2-byte little-endian word */
{
 8004168:	b480      	push	{r7}
 800416a:	b085      	sub	sp, #20
 800416c:	af00      	add	r7, sp, #0
 800416e:	6078      	str	r0, [r7, #4]
	WORD rv;

	rv = ptr[1];
 8004170:	687b      	ldr	r3, [r7, #4]
 8004172:	3301      	adds	r3, #1
 8004174:	781b      	ldrb	r3, [r3, #0]
 8004176:	81fb      	strh	r3, [r7, #14]
	rv = rv << 8 | ptr[0];
 8004178:	89fb      	ldrh	r3, [r7, #14]
 800417a:	021b      	lsls	r3, r3, #8
 800417c:	b21a      	sxth	r2, r3
 800417e:	687b      	ldr	r3, [r7, #4]
 8004180:	781b      	ldrb	r3, [r3, #0]
 8004182:	b21b      	sxth	r3, r3
 8004184:	4313      	orrs	r3, r2
 8004186:	b21b      	sxth	r3, r3
 8004188:	81fb      	strh	r3, [r7, #14]
	return rv;
 800418a:	89fb      	ldrh	r3, [r7, #14]
}
 800418c:	4618      	mov	r0, r3
 800418e:	3714      	adds	r7, #20
 8004190:	46bd      	mov	sp, r7
 8004192:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004196:	4770      	bx	lr

08004198 <ld_dword>:

static
DWORD ld_dword (const BYTE* ptr)	/* Load a 4-byte little-endian word */
{
 8004198:	b480      	push	{r7}
 800419a:	b085      	sub	sp, #20
 800419c:	af00      	add	r7, sp, #0
 800419e:	6078      	str	r0, [r7, #4]
	DWORD rv;

	rv = ptr[3];
 80041a0:	687b      	ldr	r3, [r7, #4]
 80041a2:	3303      	adds	r3, #3
 80041a4:	781b      	ldrb	r3, [r3, #0]
 80041a6:	60fb      	str	r3, [r7, #12]
	rv = rv << 8 | ptr[2];
 80041a8:	68fb      	ldr	r3, [r7, #12]
 80041aa:	021b      	lsls	r3, r3, #8
 80041ac:	687a      	ldr	r2, [r7, #4]
 80041ae:	3202      	adds	r2, #2
 80041b0:	7812      	ldrb	r2, [r2, #0]
 80041b2:	4313      	orrs	r3, r2
 80041b4:	60fb      	str	r3, [r7, #12]
	rv = rv << 8 | ptr[1];
 80041b6:	68fb      	ldr	r3, [r7, #12]
 80041b8:	021b      	lsls	r3, r3, #8
 80041ba:	687a      	ldr	r2, [r7, #4]
 80041bc:	3201      	adds	r2, #1
 80041be:	7812      	ldrb	r2, [r2, #0]
 80041c0:	4313      	orrs	r3, r2
 80041c2:	60fb      	str	r3, [r7, #12]
	rv = rv << 8 | ptr[0];
 80041c4:	68fb      	ldr	r3, [r7, #12]
 80041c6:	021b      	lsls	r3, r3, #8
 80041c8:	687a      	ldr	r2, [r7, #4]
 80041ca:	7812      	ldrb	r2, [r2, #0]
 80041cc:	4313      	orrs	r3, r2
 80041ce:	60fb      	str	r3, [r7, #12]
	return rv;
 80041d0:	68fb      	ldr	r3, [r7, #12]
}
 80041d2:	4618      	mov	r0, r3
 80041d4:	3714      	adds	r7, #20
 80041d6:	46bd      	mov	sp, r7
 80041d8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80041dc:	4770      	bx	lr

080041de <st_word>:
#endif

#if !_FS_READONLY
static
void st_word (BYTE* ptr, WORD val)	/* Store a 2-byte word in little-endian */
{
 80041de:	b480      	push	{r7}
 80041e0:	b083      	sub	sp, #12
 80041e2:	af00      	add	r7, sp, #0
 80041e4:	6078      	str	r0, [r7, #4]
 80041e6:	460b      	mov	r3, r1
 80041e8:	807b      	strh	r3, [r7, #2]
	*ptr++ = (BYTE)val; val >>= 8;
 80041ea:	687b      	ldr	r3, [r7, #4]
 80041ec:	1c5a      	adds	r2, r3, #1
 80041ee:	607a      	str	r2, [r7, #4]
 80041f0:	887a      	ldrh	r2, [r7, #2]
 80041f2:	b2d2      	uxtb	r2, r2
 80041f4:	701a      	strb	r2, [r3, #0]
 80041f6:	887b      	ldrh	r3, [r7, #2]
 80041f8:	0a1b      	lsrs	r3, r3, #8
 80041fa:	807b      	strh	r3, [r7, #2]
	*ptr++ = (BYTE)val;
 80041fc:	687b      	ldr	r3, [r7, #4]
 80041fe:	1c5a      	adds	r2, r3, #1
 8004200:	607a      	str	r2, [r7, #4]
 8004202:	887a      	ldrh	r2, [r7, #2]
 8004204:	b2d2      	uxtb	r2, r2
 8004206:	701a      	strb	r2, [r3, #0]
}
 8004208:	bf00      	nop
 800420a:	370c      	adds	r7, #12
 800420c:	46bd      	mov	sp, r7
 800420e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004212:	4770      	bx	lr

08004214 <st_dword>:

static
void st_dword (BYTE* ptr, DWORD val)	/* Store a 4-byte word in little-endian */
{
 8004214:	b480      	push	{r7}
 8004216:	b083      	sub	sp, #12
 8004218:	af00      	add	r7, sp, #0
 800421a:	6078      	str	r0, [r7, #4]
 800421c:	6039      	str	r1, [r7, #0]
	*ptr++ = (BYTE)val; val >>= 8;
 800421e:	687b      	ldr	r3, [r7, #4]
 8004220:	1c5a      	adds	r2, r3, #1
 8004222:	607a      	str	r2, [r7, #4]
 8004224:	683a      	ldr	r2, [r7, #0]
 8004226:	b2d2      	uxtb	r2, r2
 8004228:	701a      	strb	r2, [r3, #0]
 800422a:	683b      	ldr	r3, [r7, #0]
 800422c:	0a1b      	lsrs	r3, r3, #8
 800422e:	603b      	str	r3, [r7, #0]
	*ptr++ = (BYTE)val; val >>= 8;
 8004230:	687b      	ldr	r3, [r7, #4]
 8004232:	1c5a      	adds	r2, r3, #1
 8004234:	607a      	str	r2, [r7, #4]
 8004236:	683a      	ldr	r2, [r7, #0]
 8004238:	b2d2      	uxtb	r2, r2
 800423a:	701a      	strb	r2, [r3, #0]
 800423c:	683b      	ldr	r3, [r7, #0]
 800423e:	0a1b      	lsrs	r3, r3, #8
 8004240:	603b      	str	r3, [r7, #0]
	*ptr++ = (BYTE)val; val >>= 8;
 8004242:	687b      	ldr	r3, [r7, #4]
 8004244:	1c5a      	adds	r2, r3, #1
 8004246:	607a      	str	r2, [r7, #4]
 8004248:	683a      	ldr	r2, [r7, #0]
 800424a:	b2d2      	uxtb	r2, r2
 800424c:	701a      	strb	r2, [r3, #0]
 800424e:	683b      	ldr	r3, [r7, #0]
 8004250:	0a1b      	lsrs	r3, r3, #8
 8004252:	603b      	str	r3, [r7, #0]
	*ptr++ = (BYTE)val;
 8004254:	687b      	ldr	r3, [r7, #4]
 8004256:	1c5a      	adds	r2, r3, #1
 8004258:	607a      	str	r2, [r7, #4]
 800425a:	683a      	ldr	r2, [r7, #0]
 800425c:	b2d2      	uxtb	r2, r2
 800425e:	701a      	strb	r2, [r3, #0]
}
 8004260:	bf00      	nop
 8004262:	370c      	adds	r7, #12
 8004264:	46bd      	mov	sp, r7
 8004266:	f85d 7b04 	ldr.w	r7, [sp], #4
 800426a:	4770      	bx	lr

0800426c <mem_cpy>:
/* String functions                                                      */
/*-----------------------------------------------------------------------*/

/* Copy memory to memory */
static
void mem_cpy (void* dst, const void* src, UINT cnt) {
 800426c:	b480      	push	{r7}
 800426e:	b087      	sub	sp, #28
 8004270:	af00      	add	r7, sp, #0
 8004272:	60f8      	str	r0, [r7, #12]
 8004274:	60b9      	str	r1, [r7, #8]
 8004276:	607a      	str	r2, [r7, #4]
	BYTE *d = (BYTE*)dst;
 8004278:	68fb      	ldr	r3, [r7, #12]
 800427a:	617b      	str	r3, [r7, #20]
	const BYTE *s = (const BYTE*)src;
 800427c:	68bb      	ldr	r3, [r7, #8]
 800427e:	613b      	str	r3, [r7, #16]

	if (cnt) {
 8004280:	687b      	ldr	r3, [r7, #4]
 8004282:	2b00      	cmp	r3, #0
 8004284:	d00d      	beq.n	80042a2 <mem_cpy+0x36>
		do {
			*d++ = *s++;
 8004286:	693a      	ldr	r2, [r7, #16]
 8004288:	1c53      	adds	r3, r2, #1
 800428a:	613b      	str	r3, [r7, #16]
 800428c:	697b      	ldr	r3, [r7, #20]
 800428e:	1c59      	adds	r1, r3, #1
 8004290:	6179      	str	r1, [r7, #20]
 8004292:	7812      	ldrb	r2, [r2, #0]
 8004294:	701a      	strb	r2, [r3, #0]
		} while (--cnt);
 8004296:	687b      	ldr	r3, [r7, #4]
 8004298:	3b01      	subs	r3, #1
 800429a:	607b      	str	r3, [r7, #4]
 800429c:	687b      	ldr	r3, [r7, #4]
 800429e:	2b00      	cmp	r3, #0
 80042a0:	d1f1      	bne.n	8004286 <mem_cpy+0x1a>
	}
}
 80042a2:	bf00      	nop
 80042a4:	371c      	adds	r7, #28
 80042a6:	46bd      	mov	sp, r7
 80042a8:	f85d 7b04 	ldr.w	r7, [sp], #4
 80042ac:	4770      	bx	lr

080042ae <mem_set>:

/* Fill memory block */
static
void mem_set (void* dst, int val, UINT cnt) {
 80042ae:	b480      	push	{r7}
 80042b0:	b087      	sub	sp, #28
 80042b2:	af00      	add	r7, sp, #0
 80042b4:	60f8      	str	r0, [r7, #12]
 80042b6:	60b9      	str	r1, [r7, #8]
 80042b8:	607a      	str	r2, [r7, #4]
	BYTE *d = (BYTE*)dst;
 80042ba:	68fb      	ldr	r3, [r7, #12]
 80042bc:	617b      	str	r3, [r7, #20]

	do {
		*d++ = (BYTE)val;
 80042be:	697b      	ldr	r3, [r7, #20]
 80042c0:	1c5a      	adds	r2, r3, #1
 80042c2:	617a      	str	r2, [r7, #20]
 80042c4:	68ba      	ldr	r2, [r7, #8]
 80042c6:	b2d2      	uxtb	r2, r2
 80042c8:	701a      	strb	r2, [r3, #0]
	} while (--cnt);
 80042ca:	687b      	ldr	r3, [r7, #4]
 80042cc:	3b01      	subs	r3, #1
 80042ce:	607b      	str	r3, [r7, #4]
 80042d0:	687b      	ldr	r3, [r7, #4]
 80042d2:	2b00      	cmp	r3, #0
 80042d4:	d1f3      	bne.n	80042be <mem_set+0x10>
}
 80042d6:	bf00      	nop
 80042d8:	371c      	adds	r7, #28
 80042da:	46bd      	mov	sp, r7
 80042dc:	f85d 7b04 	ldr.w	r7, [sp], #4
 80042e0:	4770      	bx	lr

080042e2 <mem_cmp>:

/* Compare memory block */
static
int mem_cmp (const void* dst, const void* src, UINT cnt) {	/* ZR:same, NZ:different */
 80042e2:	b480      	push	{r7}
 80042e4:	b089      	sub	sp, #36	; 0x24
 80042e6:	af00      	add	r7, sp, #0
 80042e8:	60f8      	str	r0, [r7, #12]
 80042ea:	60b9      	str	r1, [r7, #8]
 80042ec:	607a      	str	r2, [r7, #4]
	const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src;
 80042ee:	68fb      	ldr	r3, [r7, #12]
 80042f0:	61fb      	str	r3, [r7, #28]
 80042f2:	68bb      	ldr	r3, [r7, #8]
 80042f4:	61bb      	str	r3, [r7, #24]
	int r = 0;
 80042f6:	2300      	movs	r3, #0
 80042f8:	617b      	str	r3, [r7, #20]

	do {
		r = *d++ - *s++;
 80042fa:	69fb      	ldr	r3, [r7, #28]
 80042fc:	1c5a      	adds	r2, r3, #1
 80042fe:	61fa      	str	r2, [r7, #28]
 8004300:	781b      	ldrb	r3, [r3, #0]
 8004302:	4619      	mov	r1, r3
 8004304:	69bb      	ldr	r3, [r7, #24]
 8004306:	1c5a      	adds	r2, r3, #1
 8004308:	61ba      	str	r2, [r7, #24]
 800430a:	781b      	ldrb	r3, [r3, #0]
 800430c:	1acb      	subs	r3, r1, r3
 800430e:	617b      	str	r3, [r7, #20]
	} while (--cnt && r == 0);
 8004310:	687b      	ldr	r3, [r7, #4]
 8004312:	3b01      	subs	r3, #1
 8004314:	607b      	str	r3, [r7, #4]
 8004316:	687b      	ldr	r3, [r7, #4]
 8004318:	2b00      	cmp	r3, #0
 800431a:	d002      	beq.n	8004322 <mem_cmp+0x40>
 800431c:	697b      	ldr	r3, [r7, #20]
 800431e:	2b00      	cmp	r3, #0
 8004320:	d0eb      	beq.n	80042fa <mem_cmp+0x18>

	return r;
 8004322:	697b      	ldr	r3, [r7, #20]
}
 8004324:	4618      	mov	r0, r3
 8004326:	3724      	adds	r7, #36	; 0x24
 8004328:	46bd      	mov	sp, r7
 800432a:	f85d 7b04 	ldr.w	r7, [sp], #4
 800432e:	4770      	bx	lr

08004330 <chk_chr>:

/* Check if chr is contained in the string */
static
int chk_chr (const char* str, int chr) {	/* NZ:contained, ZR:not contained */
 8004330:	b480      	push	{r7}
 8004332:	b083      	sub	sp, #12
 8004334:	af00      	add	r7, sp, #0
 8004336:	6078      	str	r0, [r7, #4]
 8004338:	6039      	str	r1, [r7, #0]
	while (*str && *str != chr) str++;
 800433a:	e002      	b.n	8004342 <chk_chr+0x12>
 800433c:	687b      	ldr	r3, [r7, #4]
 800433e:	3301      	adds	r3, #1
 8004340:	607b      	str	r3, [r7, #4]
 8004342:	687b      	ldr	r3, [r7, #4]
 8004344:	781b      	ldrb	r3, [r3, #0]
 8004346:	2b00      	cmp	r3, #0
 8004348:	d005      	beq.n	8004356 <chk_chr+0x26>
 800434a:	687b      	ldr	r3, [r7, #4]
 800434c:	781b      	ldrb	r3, [r3, #0]
 800434e:	461a      	mov	r2, r3
 8004350:	683b      	ldr	r3, [r7, #0]
 8004352:	4293      	cmp	r3, r2
 8004354:	d1f2      	bne.n	800433c <chk_chr+0xc>
	return *str;
 8004356:	687b      	ldr	r3, [r7, #4]
 8004358:	781b      	ldrb	r3, [r3, #0]
}
 800435a:	4618      	mov	r0, r3
 800435c:	370c      	adds	r7, #12
 800435e:	46bd      	mov	sp, r7
 8004360:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004364:	4770      	bx	lr
	...

08004368 <chk_lock>:
static
FRESULT chk_lock (	/* Check if the file can be accessed */
	DIR* dp,		/* Directory object pointing the file to be checked */
	int acc			/* Desired access type (0:Read, 1:Write, 2:Delete/Rename) */
)
{
 8004368:	b480      	push	{r7}
 800436a:	b085      	sub	sp, #20
 800436c:	af00      	add	r7, sp, #0
 800436e:	6078      	str	r0, [r7, #4]
 8004370:	6039      	str	r1, [r7, #0]
	UINT i, be;

	/* Search file semaphore table */
	for (i = be = 0; i < _FS_LOCK; i++) {
 8004372:	2300      	movs	r3, #0
 8004374:	60bb      	str	r3, [r7, #8]
 8004376:	68bb      	ldr	r3, [r7, #8]
 8004378:	60fb      	str	r3, [r7, #12]
 800437a:	e029      	b.n	80043d0 <chk_lock+0x68>
		if (Files[i].fs) {	/* Existing entry */
 800437c:	4a27      	ldr	r2, [pc, #156]	; (800441c <chk_lock+0xb4>)
 800437e:	68fb      	ldr	r3, [r7, #12]
 8004380:	011b      	lsls	r3, r3, #4
 8004382:	4413      	add	r3, r2
 8004384:	681b      	ldr	r3, [r3, #0]
 8004386:	2b00      	cmp	r3, #0
 8004388:	d01d      	beq.n	80043c6 <chk_lock+0x5e>
			if (Files[i].fs == dp->obj.fs &&	 	/* Check if the object matched with an open object */
 800438a:	4a24      	ldr	r2, [pc, #144]	; (800441c <chk_lock+0xb4>)
 800438c:	68fb      	ldr	r3, [r7, #12]
 800438e:	011b      	lsls	r3, r3, #4
 8004390:	4413      	add	r3, r2
 8004392:	681a      	ldr	r2, [r3, #0]
 8004394:	687b      	ldr	r3, [r7, #4]
 8004396:	681b      	ldr	r3, [r3, #0]
 8004398:	429a      	cmp	r2, r3
 800439a:	d116      	bne.n	80043ca <chk_lock+0x62>
				Files[i].clu == dp->obj.sclust &&
 800439c:	4a1f      	ldr	r2, [pc, #124]	; (800441c <chk_lock+0xb4>)
 800439e:	68fb      	ldr	r3, [r7, #12]
 80043a0:	011b      	lsls	r3, r3, #4
 80043a2:	4413      	add	r3, r2
 80043a4:	3304      	adds	r3, #4
 80043a6:	681a      	ldr	r2, [r3, #0]
 80043a8:	687b      	ldr	r3, [r7, #4]
 80043aa:	689b      	ldr	r3, [r3, #8]
			if (Files[i].fs == dp->obj.fs &&	 	/* Check if the object matched with an open object */
 80043ac:	429a      	cmp	r2, r3
 80043ae:	d10c      	bne.n	80043ca <chk_lock+0x62>
				Files[i].ofs == dp->dptr) break;
 80043b0:	4a1a      	ldr	r2, [pc, #104]	; (800441c <chk_lock+0xb4>)
 80043b2:	68fb      	ldr	r3, [r7, #12]
 80043b4:	011b      	lsls	r3, r3, #4
 80043b6:	4413      	add	r3, r2
 80043b8:	3308      	adds	r3, #8
 80043ba:	681a      	ldr	r2, [r3, #0]
 80043bc:	687b      	ldr	r3, [r7, #4]
 80043be:	695b      	ldr	r3, [r3, #20]
				Files[i].clu == dp->obj.sclust &&
 80043c0:	429a      	cmp	r2, r3
 80043c2:	d102      	bne.n	80043ca <chk_lock+0x62>
				Files[i].ofs == dp->dptr) break;
 80043c4:	e007      	b.n	80043d6 <chk_lock+0x6e>
		} else {			/* Blank entry */
			be = 1;
 80043c6:	2301      	movs	r3, #1
 80043c8:	60bb      	str	r3, [r7, #8]
	for (i = be = 0; i < _FS_LOCK; i++) {
 80043ca:	68fb      	ldr	r3, [r7, #12]
 80043cc:	3301      	adds	r3, #1
 80043ce:	60fb      	str	r3, [r7, #12]
 80043d0:	68fb      	ldr	r3, [r7, #12]
 80043d2:	2b01      	cmp	r3, #1
 80043d4:	d9d2      	bls.n	800437c <chk_lock+0x14>
		}
	}
	if (i == _FS_LOCK) {	/* The object is not opened */
 80043d6:	68fb      	ldr	r3, [r7, #12]
 80043d8:	2b02      	cmp	r3, #2
 80043da:	d109      	bne.n	80043f0 <chk_lock+0x88>
		return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES;	/* Is there a blank entry for new object? */
 80043dc:	68bb      	ldr	r3, [r7, #8]
 80043de:	2b00      	cmp	r3, #0
 80043e0:	d102      	bne.n	80043e8 <chk_lock+0x80>
 80043e2:	683b      	ldr	r3, [r7, #0]
 80043e4:	2b02      	cmp	r3, #2
 80043e6:	d101      	bne.n	80043ec <chk_lock+0x84>
 80043e8:	2300      	movs	r3, #0
 80043ea:	e010      	b.n	800440e <chk_lock+0xa6>
 80043ec:	2312      	movs	r3, #18
 80043ee:	e00e      	b.n	800440e <chk_lock+0xa6>
	}

	/* The object has been opened. Reject any open against writing file and all write mode open */
	return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK;
 80043f0:	683b      	ldr	r3, [r7, #0]
 80043f2:	2b00      	cmp	r3, #0
 80043f4:	d108      	bne.n	8004408 <chk_lock+0xa0>
 80043f6:	4a09      	ldr	r2, [pc, #36]	; (800441c <chk_lock+0xb4>)
 80043f8:	68fb      	ldr	r3, [r7, #12]
 80043fa:	011b      	lsls	r3, r3, #4
 80043fc:	4413      	add	r3, r2
 80043fe:	330c      	adds	r3, #12
 8004400:	881b      	ldrh	r3, [r3, #0]
 8004402:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
 8004406:	d101      	bne.n	800440c <chk_lock+0xa4>
 8004408:	2310      	movs	r3, #16
 800440a:	e000      	b.n	800440e <chk_lock+0xa6>
 800440c:	2300      	movs	r3, #0
}
 800440e:	4618      	mov	r0, r3
 8004410:	3714      	adds	r7, #20
 8004412:	46bd      	mov	sp, r7
 8004414:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004418:	4770      	bx	lr
 800441a:	bf00      	nop
 800441c:	2000004c 	.word	0x2000004c

08004420 <enq_lock>:


static
int enq_lock (void)	/* Check if an entry is available for a new object */
{
 8004420:	b480      	push	{r7}
 8004422:	b083      	sub	sp, #12
 8004424:	af00      	add	r7, sp, #0
	UINT i;

	for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
 8004426:	2300      	movs	r3, #0
 8004428:	607b      	str	r3, [r7, #4]
 800442a:	e002      	b.n	8004432 <enq_lock+0x12>
 800442c:	687b      	ldr	r3, [r7, #4]
 800442e:	3301      	adds	r3, #1
 8004430:	607b      	str	r3, [r7, #4]
 8004432:	687b      	ldr	r3, [r7, #4]
 8004434:	2b01      	cmp	r3, #1
 8004436:	d806      	bhi.n	8004446 <enq_lock+0x26>
 8004438:	4a09      	ldr	r2, [pc, #36]	; (8004460 <enq_lock+0x40>)
 800443a:	687b      	ldr	r3, [r7, #4]
 800443c:	011b      	lsls	r3, r3, #4
 800443e:	4413      	add	r3, r2
 8004440:	681b      	ldr	r3, [r3, #0]
 8004442:	2b00      	cmp	r3, #0
 8004444:	d1f2      	bne.n	800442c <enq_lock+0xc>
	return (i == _FS_LOCK) ? 0 : 1;
 8004446:	687b      	ldr	r3, [r7, #4]
 8004448:	2b02      	cmp	r3, #2
 800444a:	bf14      	ite	ne
 800444c:	2301      	movne	r3, #1
 800444e:	2300      	moveq	r3, #0
 8004450:	b2db      	uxtb	r3, r3
}
 8004452:	4618      	mov	r0, r3
 8004454:	370c      	adds	r7, #12
 8004456:	46bd      	mov	sp, r7
 8004458:	f85d 7b04 	ldr.w	r7, [sp], #4
 800445c:	4770      	bx	lr
 800445e:	bf00      	nop
 8004460:	2000004c 	.word	0x2000004c

08004464 <inc_lock>:
static
UINT inc_lock (	/* Increment object open counter and returns its index (0:Internal error) */
	DIR* dp,	/* Directory object pointing the file to register or increment */
	int acc		/* Desired access (0:Read, 1:Write, 2:Delete/Rename) */
)
{
 8004464:	b480      	push	{r7}
 8004466:	b085      	sub	sp, #20
 8004468:	af00      	add	r7, sp, #0
 800446a:	6078      	str	r0, [r7, #4]
 800446c:	6039      	str	r1, [r7, #0]
	UINT i;


	for (i = 0; i < _FS_LOCK; i++) {	/* Find the object */
 800446e:	2300      	movs	r3, #0
 8004470:	60fb      	str	r3, [r7, #12]
 8004472:	e01f      	b.n	80044b4 <inc_lock+0x50>
		if (Files[i].fs == dp->obj.fs &&
 8004474:	4a41      	ldr	r2, [pc, #260]	; (800457c <inc_lock+0x118>)
 8004476:	68fb      	ldr	r3, [r7, #12]
 8004478:	011b      	lsls	r3, r3, #4
 800447a:	4413      	add	r3, r2
 800447c:	681a      	ldr	r2, [r3, #0]
 800447e:	687b      	ldr	r3, [r7, #4]
 8004480:	681b      	ldr	r3, [r3, #0]
 8004482:	429a      	cmp	r2, r3
 8004484:	d113      	bne.n	80044ae <inc_lock+0x4a>
			Files[i].clu == dp->obj.sclust &&
 8004486:	4a3d      	ldr	r2, [pc, #244]	; (800457c <inc_lock+0x118>)
 8004488:	68fb      	ldr	r3, [r7, #12]
 800448a:	011b      	lsls	r3, r3, #4
 800448c:	4413      	add	r3, r2
 800448e:	3304      	adds	r3, #4
 8004490:	681a      	ldr	r2, [r3, #0]
 8004492:	687b      	ldr	r3, [r7, #4]
 8004494:	689b      	ldr	r3, [r3, #8]
		if (Files[i].fs == dp->obj.fs &&
 8004496:	429a      	cmp	r2, r3
 8004498:	d109      	bne.n	80044ae <inc_lock+0x4a>
			Files[i].ofs == dp->dptr) break;
 800449a:	4a38      	ldr	r2, [pc, #224]	; (800457c <inc_lock+0x118>)
 800449c:	68fb      	ldr	r3, [r7, #12]
 800449e:	011b      	lsls	r3, r3, #4
 80044a0:	4413      	add	r3, r2
 80044a2:	3308      	adds	r3, #8
 80044a4:	681a      	ldr	r2, [r3, #0]
 80044a6:	687b      	ldr	r3, [r7, #4]
 80044a8:	695b      	ldr	r3, [r3, #20]
			Files[i].clu == dp->obj.sclust &&
 80044aa:	429a      	cmp	r2, r3
 80044ac:	d006      	beq.n	80044bc <inc_lock+0x58>
	for (i = 0; i < _FS_LOCK; i++) {	/* Find the object */
 80044ae:	68fb      	ldr	r3, [r7, #12]
 80044b0:	3301      	adds	r3, #1
 80044b2:	60fb      	str	r3, [r7, #12]
 80044b4:	68fb      	ldr	r3, [r7, #12]
 80044b6:	2b01      	cmp	r3, #1
 80044b8:	d9dc      	bls.n	8004474 <inc_lock+0x10>
 80044ba:	e000      	b.n	80044be <inc_lock+0x5a>
			Files[i].ofs == dp->dptr) break;
 80044bc:	bf00      	nop
	}

	if (i == _FS_LOCK) {				/* Not opened. Register it as new. */
 80044be:	68fb      	ldr	r3, [r7, #12]
 80044c0:	2b02      	cmp	r3, #2
 80044c2:	d132      	bne.n	800452a <inc_lock+0xc6>
		for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
 80044c4:	2300      	movs	r3, #0
 80044c6:	60fb      	str	r3, [r7, #12]
 80044c8:	e002      	b.n	80044d0 <inc_lock+0x6c>
 80044ca:	68fb      	ldr	r3, [r7, #12]
 80044cc:	3301      	adds	r3, #1
 80044ce:	60fb      	str	r3, [r7, #12]
 80044d0:	68fb      	ldr	r3, [r7, #12]
 80044d2:	2b01      	cmp	r3, #1
 80044d4:	d806      	bhi.n	80044e4 <inc_lock+0x80>
 80044d6:	4a29      	ldr	r2, [pc, #164]	; (800457c <inc_lock+0x118>)
 80044d8:	68fb      	ldr	r3, [r7, #12]
 80044da:	011b      	lsls	r3, r3, #4
 80044dc:	4413      	add	r3, r2
 80044de:	681b      	ldr	r3, [r3, #0]
 80044e0:	2b00      	cmp	r3, #0
 80044e2:	d1f2      	bne.n	80044ca <inc_lock+0x66>
		if (i == _FS_LOCK) return 0;	/* No free entry to register (int err) */
 80044e4:	68fb      	ldr	r3, [r7, #12]
 80044e6:	2b02      	cmp	r3, #2
 80044e8:	d101      	bne.n	80044ee <inc_lock+0x8a>
 80044ea:	2300      	movs	r3, #0
 80044ec:	e040      	b.n	8004570 <inc_lock+0x10c>
		Files[i].fs = dp->obj.fs;
 80044ee:	687b      	ldr	r3, [r7, #4]
 80044f0:	681a      	ldr	r2, [r3, #0]
 80044f2:	4922      	ldr	r1, [pc, #136]	; (800457c <inc_lock+0x118>)
 80044f4:	68fb      	ldr	r3, [r7, #12]
 80044f6:	011b      	lsls	r3, r3, #4
 80044f8:	440b      	add	r3, r1
 80044fa:	601a      	str	r2, [r3, #0]
		Files[i].clu = dp->obj.sclust;
 80044fc:	687b      	ldr	r3, [r7, #4]
 80044fe:	689a      	ldr	r2, [r3, #8]
 8004500:	491e      	ldr	r1, [pc, #120]	; (800457c <inc_lock+0x118>)
 8004502:	68fb      	ldr	r3, [r7, #12]
 8004504:	011b      	lsls	r3, r3, #4
 8004506:	440b      	add	r3, r1
 8004508:	3304      	adds	r3, #4
 800450a:	601a      	str	r2, [r3, #0]
		Files[i].ofs = dp->dptr;
 800450c:	687b      	ldr	r3, [r7, #4]
 800450e:	695a      	ldr	r2, [r3, #20]
 8004510:	491a      	ldr	r1, [pc, #104]	; (800457c <inc_lock+0x118>)
 8004512:	68fb      	ldr	r3, [r7, #12]
 8004514:	011b      	lsls	r3, r3, #4
 8004516:	440b      	add	r3, r1
 8004518:	3308      	adds	r3, #8
 800451a:	601a      	str	r2, [r3, #0]
		Files[i].ctr = 0;
 800451c:	4a17      	ldr	r2, [pc, #92]	; (800457c <inc_lock+0x118>)
 800451e:	68fb      	ldr	r3, [r7, #12]
 8004520:	011b      	lsls	r3, r3, #4
 8004522:	4413      	add	r3, r2
 8004524:	330c      	adds	r3, #12
 8004526:	2200      	movs	r2, #0
 8004528:	801a      	strh	r2, [r3, #0]
	}

	if (acc && Files[i].ctr) return 0;	/* Access violation (int err) */
 800452a:	683b      	ldr	r3, [r7, #0]
 800452c:	2b00      	cmp	r3, #0
 800452e:	d009      	beq.n	8004544 <inc_lock+0xe0>
 8004530:	4a12      	ldr	r2, [pc, #72]	; (800457c <inc_lock+0x118>)
 8004532:	68fb      	ldr	r3, [r7, #12]
 8004534:	011b      	lsls	r3, r3, #4
 8004536:	4413      	add	r3, r2
 8004538:	330c      	adds	r3, #12
 800453a:	881b      	ldrh	r3, [r3, #0]
 800453c:	2b00      	cmp	r3, #0
 800453e:	d001      	beq.n	8004544 <inc_lock+0xe0>
 8004540:	2300      	movs	r3, #0
 8004542:	e015      	b.n	8004570 <inc_lock+0x10c>

	Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1;	/* Set semaphore value */
 8004544:	683b      	ldr	r3, [r7, #0]
 8004546:	2b00      	cmp	r3, #0
 8004548:	d108      	bne.n	800455c <inc_lock+0xf8>
 800454a:	4a0c      	ldr	r2, [pc, #48]	; (800457c <inc_lock+0x118>)
 800454c:	68fb      	ldr	r3, [r7, #12]
 800454e:	011b      	lsls	r3, r3, #4
 8004550:	4413      	add	r3, r2
 8004552:	330c      	adds	r3, #12
 8004554:	881b      	ldrh	r3, [r3, #0]
 8004556:	3301      	adds	r3, #1
 8004558:	b29a      	uxth	r2, r3
 800455a:	e001      	b.n	8004560 <inc_lock+0xfc>
 800455c:	f44f 7280 	mov.w	r2, #256	; 0x100
 8004560:	4906      	ldr	r1, [pc, #24]	; (800457c <inc_lock+0x118>)
 8004562:	68fb      	ldr	r3, [r7, #12]
 8004564:	011b      	lsls	r3, r3, #4
 8004566:	440b      	add	r3, r1
 8004568:	330c      	adds	r3, #12
 800456a:	801a      	strh	r2, [r3, #0]

	return i + 1;
 800456c:	68fb      	ldr	r3, [r7, #12]
 800456e:	3301      	adds	r3, #1
}
 8004570:	4618      	mov	r0, r3
 8004572:	3714      	adds	r7, #20
 8004574:	46bd      	mov	sp, r7
 8004576:	f85d 7b04 	ldr.w	r7, [sp], #4
 800457a:	4770      	bx	lr
 800457c:	2000004c 	.word	0x2000004c

08004580 <dec_lock>:

static
FRESULT dec_lock (	/* Decrement object open counter */
	UINT i			/* Semaphore index (1..) */
)
{
 8004580:	b480      	push	{r7}
 8004582:	b085      	sub	sp, #20
 8004584:	af00      	add	r7, sp, #0
 8004586:	6078      	str	r0, [r7, #4]
	WORD n;
	FRESULT res;


	if (--i < _FS_LOCK) {	/* Shift index number origin from 0 */
 8004588:	687b      	ldr	r3, [r7, #4]
 800458a:	3b01      	subs	r3, #1
 800458c:	607b      	str	r3, [r7, #4]
 800458e:	687b      	ldr	r3, [r7, #4]
 8004590:	2b01      	cmp	r3, #1
 8004592:	d825      	bhi.n	80045e0 <dec_lock+0x60>
		n = Files[i].ctr;
 8004594:	4a17      	ldr	r2, [pc, #92]	; (80045f4 <dec_lock+0x74>)
 8004596:	687b      	ldr	r3, [r7, #4]
 8004598:	011b      	lsls	r3, r3, #4
 800459a:	4413      	add	r3, r2
 800459c:	330c      	adds	r3, #12
 800459e:	881b      	ldrh	r3, [r3, #0]
 80045a0:	81fb      	strh	r3, [r7, #14]
		if (n == 0x100) n = 0;		/* If write mode open, delete the entry */
 80045a2:	89fb      	ldrh	r3, [r7, #14]
 80045a4:	f5b3 7f80 	cmp.w	r3, #256	; 0x100
 80045a8:	d101      	bne.n	80045ae <dec_lock+0x2e>
 80045aa:	2300      	movs	r3, #0
 80045ac:	81fb      	strh	r3, [r7, #14]
		if (n > 0) n--;				/* Decrement read mode open count */
 80045ae:	89fb      	ldrh	r3, [r7, #14]
 80045b0:	2b00      	cmp	r3, #0
 80045b2:	d002      	beq.n	80045ba <dec_lock+0x3a>
 80045b4:	89fb      	ldrh	r3, [r7, #14]
 80045b6:	3b01      	subs	r3, #1
 80045b8:	81fb      	strh	r3, [r7, #14]
		Files[i].ctr = n;
 80045ba:	4a0e      	ldr	r2, [pc, #56]	; (80045f4 <dec_lock+0x74>)
 80045bc:	687b      	ldr	r3, [r7, #4]
 80045be:	011b      	lsls	r3, r3, #4
 80045c0:	4413      	add	r3, r2
 80045c2:	330c      	adds	r3, #12
 80045c4:	89fa      	ldrh	r2, [r7, #14]
 80045c6:	801a      	strh	r2, [r3, #0]
		if (n == 0) Files[i].fs = 0;	/* Delete the entry if open count gets zero */
 80045c8:	89fb      	ldrh	r3, [r7, #14]
 80045ca:	2b00      	cmp	r3, #0
 80045cc:	d105      	bne.n	80045da <dec_lock+0x5a>
 80045ce:	4a09      	ldr	r2, [pc, #36]	; (80045f4 <dec_lock+0x74>)
 80045d0:	687b      	ldr	r3, [r7, #4]
 80045d2:	011b      	lsls	r3, r3, #4
 80045d4:	4413      	add	r3, r2
 80045d6:	2200      	movs	r2, #0
 80045d8:	601a      	str	r2, [r3, #0]
		res = FR_OK;
 80045da:	2300      	movs	r3, #0
 80045dc:	737b      	strb	r3, [r7, #13]
 80045de:	e001      	b.n	80045e4 <dec_lock+0x64>
	} else {
		res = FR_INT_ERR;			/* Invalid index nunber */
 80045e0:	2302      	movs	r3, #2
 80045e2:	737b      	strb	r3, [r7, #13]
	}
	return res;
 80045e4:	7b7b      	ldrb	r3, [r7, #13]
}
 80045e6:	4618      	mov	r0, r3
 80045e8:	3714      	adds	r7, #20
 80045ea:	46bd      	mov	sp, r7
 80045ec:	f85d 7b04 	ldr.w	r7, [sp], #4
 80045f0:	4770      	bx	lr
 80045f2:	bf00      	nop
 80045f4:	2000004c 	.word	0x2000004c

080045f8 <clear_lock>:

static
void clear_lock (	/* Clear lock entries of the volume */
	FATFS *fs
)
{
 80045f8:	b480      	push	{r7}
 80045fa:	b085      	sub	sp, #20
 80045fc:	af00      	add	r7, sp, #0
 80045fe:	6078      	str	r0, [r7, #4]
	UINT i;

	for (i = 0; i < _FS_LOCK; i++) {
 8004600:	2300      	movs	r3, #0
 8004602:	60fb      	str	r3, [r7, #12]
 8004604:	e010      	b.n	8004628 <clear_lock+0x30>
		if (Files[i].fs == fs) Files[i].fs = 0;
 8004606:	4a0d      	ldr	r2, [pc, #52]	; (800463c <clear_lock+0x44>)
 8004608:	68fb      	ldr	r3, [r7, #12]
 800460a:	011b      	lsls	r3, r3, #4
 800460c:	4413      	add	r3, r2
 800460e:	681b      	ldr	r3, [r3, #0]
 8004610:	687a      	ldr	r2, [r7, #4]
 8004612:	429a      	cmp	r2, r3
 8004614:	d105      	bne.n	8004622 <clear_lock+0x2a>
 8004616:	4a09      	ldr	r2, [pc, #36]	; (800463c <clear_lock+0x44>)
 8004618:	68fb      	ldr	r3, [r7, #12]
 800461a:	011b      	lsls	r3, r3, #4
 800461c:	4413      	add	r3, r2
 800461e:	2200      	movs	r2, #0
 8004620:	601a      	str	r2, [r3, #0]
	for (i = 0; i < _FS_LOCK; i++) {
 8004622:	68fb      	ldr	r3, [r7, #12]
 8004624:	3301      	adds	r3, #1
 8004626:	60fb      	str	r3, [r7, #12]
 8004628:	68fb      	ldr	r3, [r7, #12]
 800462a:	2b01      	cmp	r3, #1
 800462c:	d9eb      	bls.n	8004606 <clear_lock+0xe>
	}
}
 800462e:	bf00      	nop
 8004630:	3714      	adds	r7, #20
 8004632:	46bd      	mov	sp, r7
 8004634:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004638:	4770      	bx	lr
 800463a:	bf00      	nop
 800463c:	2000004c 	.word	0x2000004c

08004640 <sync_window>:
#if !_FS_READONLY
static
FRESULT sync_window (	/* Returns FR_OK or FR_DISK_ERROR */
	FATFS* fs			/* File system object */
)
{
 8004640:	b580      	push	{r7, lr}
 8004642:	b086      	sub	sp, #24
 8004644:	af00      	add	r7, sp, #0
 8004646:	6078      	str	r0, [r7, #4]
	DWORD wsect;
	UINT nf;
	FRESULT res = FR_OK;
 8004648:	2300      	movs	r3, #0
 800464a:	73fb      	strb	r3, [r7, #15]


	if (fs->wflag) {	/* Write back the sector if it is dirty */
 800464c:	687b      	ldr	r3, [r7, #4]
 800464e:	78db      	ldrb	r3, [r3, #3]
 8004650:	2b00      	cmp	r3, #0
 8004652:	d034      	beq.n	80046be <sync_window+0x7e>
		wsect = fs->winsect;	/* Current sector number */
 8004654:	687b      	ldr	r3, [r7, #4]
 8004656:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 8004658:	617b      	str	r3, [r7, #20]
		if (disk_write(fs->drv, fs->win, wsect, 1) != RES_OK) {
 800465a:	687b      	ldr	r3, [r7, #4]
 800465c:	7858      	ldrb	r0, [r3, #1]
 800465e:	687b      	ldr	r3, [r7, #4]
 8004660:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004664:	2301      	movs	r3, #1
 8004666:	697a      	ldr	r2, [r7, #20]
 8004668:	f7ff fd40 	bl	80040ec <disk_write>
 800466c:	4603      	mov	r3, r0
 800466e:	2b00      	cmp	r3, #0
 8004670:	d002      	beq.n	8004678 <sync_window+0x38>
			res = FR_DISK_ERR;
 8004672:	2301      	movs	r3, #1
 8004674:	73fb      	strb	r3, [r7, #15]
 8004676:	e022      	b.n	80046be <sync_window+0x7e>
		} else {
			fs->wflag = 0;
 8004678:	687b      	ldr	r3, [r7, #4]
 800467a:	2200      	movs	r2, #0
 800467c:	70da      	strb	r2, [r3, #3]
			if (wsect - fs->fatbase < fs->fsize) {		/* Is it in the FAT area? */
 800467e:	687b      	ldr	r3, [r7, #4]
 8004680:	6a9b      	ldr	r3, [r3, #40]	; 0x28
 8004682:	697a      	ldr	r2, [r7, #20]
 8004684:	1ad2      	subs	r2, r2, r3
 8004686:	687b      	ldr	r3, [r7, #4]
 8004688:	6a1b      	ldr	r3, [r3, #32]
 800468a:	429a      	cmp	r2, r3
 800468c:	d217      	bcs.n	80046be <sync_window+0x7e>
				for (nf = fs->n_fats; nf >= 2; nf--) {	/* Reflect the change to all FAT copies */
 800468e:	687b      	ldr	r3, [r7, #4]
 8004690:	789b      	ldrb	r3, [r3, #2]
 8004692:	613b      	str	r3, [r7, #16]
 8004694:	e010      	b.n	80046b8 <sync_window+0x78>
					wsect += fs->fsize;
 8004696:	687b      	ldr	r3, [r7, #4]
 8004698:	6a1b      	ldr	r3, [r3, #32]
 800469a:	697a      	ldr	r2, [r7, #20]
 800469c:	4413      	add	r3, r2
 800469e:	617b      	str	r3, [r7, #20]
					disk_write(fs->drv, fs->win, wsect, 1);
 80046a0:	687b      	ldr	r3, [r7, #4]
 80046a2:	7858      	ldrb	r0, [r3, #1]
 80046a4:	687b      	ldr	r3, [r7, #4]
 80046a6:	f103 0138 	add.w	r1, r3, #56	; 0x38
 80046aa:	2301      	movs	r3, #1
 80046ac:	697a      	ldr	r2, [r7, #20]
 80046ae:	f7ff fd1d 	bl	80040ec <disk_write>
				for (nf = fs->n_fats; nf >= 2; nf--) {	/* Reflect the change to all FAT copies */
 80046b2:	693b      	ldr	r3, [r7, #16]
 80046b4:	3b01      	subs	r3, #1
 80046b6:	613b      	str	r3, [r7, #16]
 80046b8:	693b      	ldr	r3, [r7, #16]
 80046ba:	2b01      	cmp	r3, #1
 80046bc:	d8eb      	bhi.n	8004696 <sync_window+0x56>
				}
			}
		}
	}
	return res;
 80046be:	7bfb      	ldrb	r3, [r7, #15]
}
 80046c0:	4618      	mov	r0, r3
 80046c2:	3718      	adds	r7, #24
 80046c4:	46bd      	mov	sp, r7
 80046c6:	bd80      	pop	{r7, pc}

080046c8 <move_window>:
static
FRESULT move_window (	/* Returns FR_OK or FR_DISK_ERROR */
	FATFS* fs,			/* File system object */
	DWORD sector		/* Sector number to make appearance in the fs->win[] */
)
{
 80046c8:	b580      	push	{r7, lr}
 80046ca:	b084      	sub	sp, #16
 80046cc:	af00      	add	r7, sp, #0
 80046ce:	6078      	str	r0, [r7, #4]
 80046d0:	6039      	str	r1, [r7, #0]
	FRESULT res = FR_OK;
 80046d2:	2300      	movs	r3, #0
 80046d4:	73fb      	strb	r3, [r7, #15]


	if (sector != fs->winsect) {	/* Window offset changed? */
 80046d6:	687b      	ldr	r3, [r7, #4]
 80046d8:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 80046da:	683a      	ldr	r2, [r7, #0]
 80046dc:	429a      	cmp	r2, r3
 80046de:	d01b      	beq.n	8004718 <move_window+0x50>
#if !_FS_READONLY
		res = sync_window(fs);		/* Write-back changes */
 80046e0:	6878      	ldr	r0, [r7, #4]
 80046e2:	f7ff ffad 	bl	8004640 <sync_window>
 80046e6:	4603      	mov	r3, r0
 80046e8:	73fb      	strb	r3, [r7, #15]
#endif
		if (res == FR_OK) {			/* Fill sector window with new data */
 80046ea:	7bfb      	ldrb	r3, [r7, #15]
 80046ec:	2b00      	cmp	r3, #0
 80046ee:	d113      	bne.n	8004718 <move_window+0x50>
			if (disk_read(fs->drv, fs->win, sector, 1) != RES_OK) {
 80046f0:	687b      	ldr	r3, [r7, #4]
 80046f2:	7858      	ldrb	r0, [r3, #1]
 80046f4:	687b      	ldr	r3, [r7, #4]
 80046f6:	f103 0138 	add.w	r1, r3, #56	; 0x38
 80046fa:	2301      	movs	r3, #1
 80046fc:	683a      	ldr	r2, [r7, #0]
 80046fe:	f7ff fcd5 	bl	80040ac <disk_read>
 8004702:	4603      	mov	r3, r0
 8004704:	2b00      	cmp	r3, #0
 8004706:	d004      	beq.n	8004712 <move_window+0x4a>
				sector = 0xFFFFFFFF;	/* Invalidate window if data is not reliable */
 8004708:	f04f 33ff 	mov.w	r3, #4294967295
 800470c:	603b      	str	r3, [r7, #0]
				res = FR_DISK_ERR;
 800470e:	2301      	movs	r3, #1
 8004710:	73fb      	strb	r3, [r7, #15]
			}
			fs->winsect = sector;
 8004712:	687b      	ldr	r3, [r7, #4]
 8004714:	683a      	ldr	r2, [r7, #0]
 8004716:	635a      	str	r2, [r3, #52]	; 0x34
		}
	}
	return res;
 8004718:	7bfb      	ldrb	r3, [r7, #15]
}
 800471a:	4618      	mov	r0, r3
 800471c:	3710      	adds	r7, #16
 800471e:	46bd      	mov	sp, r7
 8004720:	bd80      	pop	{r7, pc}
	...

08004724 <sync_fs>:

static
FRESULT sync_fs (	/* FR_OK:succeeded, !=0:error */
	FATFS* fs		/* File system object */
)
{
 8004724:	b580      	push	{r7, lr}
 8004726:	b084      	sub	sp, #16
 8004728:	af00      	add	r7, sp, #0
 800472a:	6078      	str	r0, [r7, #4]
	FRESULT res;


	res = sync_window(fs);
 800472c:	6878      	ldr	r0, [r7, #4]
 800472e:	f7ff ff87 	bl	8004640 <sync_window>
 8004732:	4603      	mov	r3, r0
 8004734:	73fb      	strb	r3, [r7, #15]
	if (res == FR_OK) {
 8004736:	7bfb      	ldrb	r3, [r7, #15]
 8004738:	2b00      	cmp	r3, #0
 800473a:	d159      	bne.n	80047f0 <sync_fs+0xcc>
		/* Update FSInfo sector if needed */
		if (fs->fs_type == FS_FAT32 && fs->fsi_flag == 1) {
 800473c:	687b      	ldr	r3, [r7, #4]
 800473e:	781b      	ldrb	r3, [r3, #0]
 8004740:	2b03      	cmp	r3, #3
 8004742:	d149      	bne.n	80047d8 <sync_fs+0xb4>
 8004744:	687b      	ldr	r3, [r7, #4]
 8004746:	791b      	ldrb	r3, [r3, #4]
 8004748:	2b01      	cmp	r3, #1
 800474a:	d145      	bne.n	80047d8 <sync_fs+0xb4>
			/* Create FSInfo structure */
			mem_set(fs->win, 0, SS(fs));
 800474c:	687b      	ldr	r3, [r7, #4]
 800474e:	f103 0038 	add.w	r0, r3, #56	; 0x38
 8004752:	687b      	ldr	r3, [r7, #4]
 8004754:	899b      	ldrh	r3, [r3, #12]
 8004756:	461a      	mov	r2, r3
 8004758:	2100      	movs	r1, #0
 800475a:	f7ff fda8 	bl	80042ae <mem_set>
			st_word(fs->win + BS_55AA, 0xAA55);
 800475e:	687b      	ldr	r3, [r7, #4]
 8004760:	3338      	adds	r3, #56	; 0x38
 8004762:	f503 73ff 	add.w	r3, r3, #510	; 0x1fe
 8004766:	f64a 2155 	movw	r1, #43605	; 0xaa55
 800476a:	4618      	mov	r0, r3
 800476c:	f7ff fd37 	bl	80041de <st_word>
			st_dword(fs->win + FSI_LeadSig, 0x41615252);
 8004770:	687b      	ldr	r3, [r7, #4]
 8004772:	3338      	adds	r3, #56	; 0x38
 8004774:	4921      	ldr	r1, [pc, #132]	; (80047fc <sync_fs+0xd8>)
 8004776:	4618      	mov	r0, r3
 8004778:	f7ff fd4c 	bl	8004214 <st_dword>
			st_dword(fs->win + FSI_StrucSig, 0x61417272);
 800477c:	687b      	ldr	r3, [r7, #4]
 800477e:	3338      	adds	r3, #56	; 0x38
 8004780:	f503 73f2 	add.w	r3, r3, #484	; 0x1e4
 8004784:	491e      	ldr	r1, [pc, #120]	; (8004800 <sync_fs+0xdc>)
 8004786:	4618      	mov	r0, r3
 8004788:	f7ff fd44 	bl	8004214 <st_dword>
			st_dword(fs->win + FSI_Free_Count, fs->free_clst);
 800478c:	687b      	ldr	r3, [r7, #4]
 800478e:	3338      	adds	r3, #56	; 0x38
 8004790:	f503 72f4 	add.w	r2, r3, #488	; 0x1e8
 8004794:	687b      	ldr	r3, [r7, #4]
 8004796:	699b      	ldr	r3, [r3, #24]
 8004798:	4619      	mov	r1, r3
 800479a:	4610      	mov	r0, r2
 800479c:	f7ff fd3a 	bl	8004214 <st_dword>
			st_dword(fs->win + FSI_Nxt_Free, fs->last_clst);
 80047a0:	687b      	ldr	r3, [r7, #4]
 80047a2:	3338      	adds	r3, #56	; 0x38
 80047a4:	f503 72f6 	add.w	r2, r3, #492	; 0x1ec
 80047a8:	687b      	ldr	r3, [r7, #4]
 80047aa:	695b      	ldr	r3, [r3, #20]
 80047ac:	4619      	mov	r1, r3
 80047ae:	4610      	mov	r0, r2
 80047b0:	f7ff fd30 	bl	8004214 <st_dword>
			/* Write it into the FSInfo sector */
			fs->winsect = fs->volbase + 1;
 80047b4:	687b      	ldr	r3, [r7, #4]
 80047b6:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 80047b8:	1c5a      	adds	r2, r3, #1
 80047ba:	687b      	ldr	r3, [r7, #4]
 80047bc:	635a      	str	r2, [r3, #52]	; 0x34
			disk_write(fs->drv, fs->win, fs->winsect, 1);
 80047be:	687b      	ldr	r3, [r7, #4]
 80047c0:	7858      	ldrb	r0, [r3, #1]
 80047c2:	687b      	ldr	r3, [r7, #4]
 80047c4:	f103 0138 	add.w	r1, r3, #56	; 0x38
 80047c8:	687b      	ldr	r3, [r7, #4]
 80047ca:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 80047cc:	2301      	movs	r3, #1
 80047ce:	f7ff fc8d 	bl	80040ec <disk_write>
			fs->fsi_flag = 0;
 80047d2:	687b      	ldr	r3, [r7, #4]
 80047d4:	2200      	movs	r2, #0
 80047d6:	711a      	strb	r2, [r3, #4]
		}
		/* Make sure that no pending write process in the physical drive */
		if (disk_ioctl(fs->drv, CTRL_SYNC, 0) != RES_OK) res = FR_DISK_ERR;
 80047d8:	687b      	ldr	r3, [r7, #4]
 80047da:	785b      	ldrb	r3, [r3, #1]
 80047dc:	2200      	movs	r2, #0
 80047de:	2100      	movs	r1, #0
 80047e0:	4618      	mov	r0, r3
 80047e2:	f7ff fca3 	bl	800412c <disk_ioctl>
 80047e6:	4603      	mov	r3, r0
 80047e8:	2b00      	cmp	r3, #0
 80047ea:	d001      	beq.n	80047f0 <sync_fs+0xcc>
 80047ec:	2301      	movs	r3, #1
 80047ee:	73fb      	strb	r3, [r7, #15]
	}

	return res;
 80047f0:	7bfb      	ldrb	r3, [r7, #15]
}
 80047f2:	4618      	mov	r0, r3
 80047f4:	3710      	adds	r7, #16
 80047f6:	46bd      	mov	sp, r7
 80047f8:	bd80      	pop	{r7, pc}
 80047fa:	bf00      	nop
 80047fc:	41615252 	.word	0x41615252
 8004800:	61417272 	.word	0x61417272

08004804 <clust2sect>:
static
DWORD clust2sect (	/* !=0:Sector number, 0:Failed (invalid cluster#) */
	FATFS* fs,		/* File system object */
	DWORD clst		/* Cluster# to be converted */
)
{
 8004804:	b480      	push	{r7}
 8004806:	b083      	sub	sp, #12
 8004808:	af00      	add	r7, sp, #0
 800480a:	6078      	str	r0, [r7, #4]
 800480c:	6039      	str	r1, [r7, #0]
	clst -= 2;
 800480e:	683b      	ldr	r3, [r7, #0]
 8004810:	3b02      	subs	r3, #2
 8004812:	603b      	str	r3, [r7, #0]
	if (clst >= fs->n_fatent - 2) return 0;		/* Invalid cluster# */
 8004814:	687b      	ldr	r3, [r7, #4]
 8004816:	69db      	ldr	r3, [r3, #28]
 8004818:	3b02      	subs	r3, #2
 800481a:	683a      	ldr	r2, [r7, #0]
 800481c:	429a      	cmp	r2, r3
 800481e:	d301      	bcc.n	8004824 <clust2sect+0x20>
 8004820:	2300      	movs	r3, #0
 8004822:	e008      	b.n	8004836 <clust2sect+0x32>
	return clst * fs->csize + fs->database;
 8004824:	687b      	ldr	r3, [r7, #4]
 8004826:	895b      	ldrh	r3, [r3, #10]
 8004828:	461a      	mov	r2, r3
 800482a:	683b      	ldr	r3, [r7, #0]
 800482c:	fb03 f202 	mul.w	r2, r3, r2
 8004830:	687b      	ldr	r3, [r7, #4]
 8004832:	6b1b      	ldr	r3, [r3, #48]	; 0x30
 8004834:	4413      	add	r3, r2
}
 8004836:	4618      	mov	r0, r3
 8004838:	370c      	adds	r7, #12
 800483a:	46bd      	mov	sp, r7
 800483c:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004840:	4770      	bx	lr

08004842 <get_fat>:
static
DWORD get_fat (	/* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x7FFFFFFF:Cluster status */
	_FDID* obj,	/* Corresponding object */
	DWORD clst	/* Cluster number to get the value */
)
{
 8004842:	b580      	push	{r7, lr}
 8004844:	b086      	sub	sp, #24
 8004846:	af00      	add	r7, sp, #0
 8004848:	6078      	str	r0, [r7, #4]
 800484a:	6039      	str	r1, [r7, #0]
	UINT wc, bc;
	DWORD val;
	FATFS *fs = obj->fs;
 800484c:	687b      	ldr	r3, [r7, #4]
 800484e:	681b      	ldr	r3, [r3, #0]
 8004850:	613b      	str	r3, [r7, #16]


	if (clst < 2 || clst >= fs->n_fatent) {	/* Check if in valid range */
 8004852:	683b      	ldr	r3, [r7, #0]
 8004854:	2b01      	cmp	r3, #1
 8004856:	d904      	bls.n	8004862 <get_fat+0x20>
 8004858:	693b      	ldr	r3, [r7, #16]
 800485a:	69db      	ldr	r3, [r3, #28]
 800485c:	683a      	ldr	r2, [r7, #0]
 800485e:	429a      	cmp	r2, r3
 8004860:	d302      	bcc.n	8004868 <get_fat+0x26>
		val = 1;	/* Internal error */
 8004862:	2301      	movs	r3, #1
 8004864:	617b      	str	r3, [r7, #20]
 8004866:	e0b7      	b.n	80049d8 <get_fat+0x196>

	} else {
		val = 0xFFFFFFFF;	/* Default value falls on disk error */
 8004868:	f04f 33ff 	mov.w	r3, #4294967295
 800486c:	617b      	str	r3, [r7, #20]

		switch (fs->fs_type) {
 800486e:	693b      	ldr	r3, [r7, #16]
 8004870:	781b      	ldrb	r3, [r3, #0]
 8004872:	2b02      	cmp	r3, #2
 8004874:	d05a      	beq.n	800492c <get_fat+0xea>
 8004876:	2b03      	cmp	r3, #3
 8004878:	d07d      	beq.n	8004976 <get_fat+0x134>
 800487a:	2b01      	cmp	r3, #1
 800487c:	f040 80a2 	bne.w	80049c4 <get_fat+0x182>
		case FS_FAT12 :
			bc = (UINT)clst; bc += bc / 2;
 8004880:	683b      	ldr	r3, [r7, #0]
 8004882:	60fb      	str	r3, [r7, #12]
 8004884:	68fb      	ldr	r3, [r7, #12]
 8004886:	085b      	lsrs	r3, r3, #1
 8004888:	68fa      	ldr	r2, [r7, #12]
 800488a:	4413      	add	r3, r2
 800488c:	60fb      	str	r3, [r7, #12]
			if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
 800488e:	693b      	ldr	r3, [r7, #16]
 8004890:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004892:	693b      	ldr	r3, [r7, #16]
 8004894:	899b      	ldrh	r3, [r3, #12]
 8004896:	4619      	mov	r1, r3
 8004898:	68fb      	ldr	r3, [r7, #12]
 800489a:	fbb3 f3f1 	udiv	r3, r3, r1
 800489e:	4413      	add	r3, r2
 80048a0:	4619      	mov	r1, r3
 80048a2:	6938      	ldr	r0, [r7, #16]
 80048a4:	f7ff ff10 	bl	80046c8 <move_window>
 80048a8:	4603      	mov	r3, r0
 80048aa:	2b00      	cmp	r3, #0
 80048ac:	f040 808d 	bne.w	80049ca <get_fat+0x188>
			wc = fs->win[bc++ % SS(fs)];
 80048b0:	68fb      	ldr	r3, [r7, #12]
 80048b2:	1c5a      	adds	r2, r3, #1
 80048b4:	60fa      	str	r2, [r7, #12]
 80048b6:	693a      	ldr	r2, [r7, #16]
 80048b8:	8992      	ldrh	r2, [r2, #12]
 80048ba:	fbb3 f1f2 	udiv	r1, r3, r2
 80048be:	fb02 f201 	mul.w	r2, r2, r1
 80048c2:	1a9b      	subs	r3, r3, r2
 80048c4:	693a      	ldr	r2, [r7, #16]
 80048c6:	4413      	add	r3, r2
 80048c8:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
 80048cc:	60bb      	str	r3, [r7, #8]
			if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
 80048ce:	693b      	ldr	r3, [r7, #16]
 80048d0:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 80048d2:	693b      	ldr	r3, [r7, #16]
 80048d4:	899b      	ldrh	r3, [r3, #12]
 80048d6:	4619      	mov	r1, r3
 80048d8:	68fb      	ldr	r3, [r7, #12]
 80048da:	fbb3 f3f1 	udiv	r3, r3, r1
 80048de:	4413      	add	r3, r2
 80048e0:	4619      	mov	r1, r3
 80048e2:	6938      	ldr	r0, [r7, #16]
 80048e4:	f7ff fef0 	bl	80046c8 <move_window>
 80048e8:	4603      	mov	r3, r0
 80048ea:	2b00      	cmp	r3, #0
 80048ec:	d16f      	bne.n	80049ce <get_fat+0x18c>
			wc |= fs->win[bc % SS(fs)] << 8;
 80048ee:	693b      	ldr	r3, [r7, #16]
 80048f0:	899b      	ldrh	r3, [r3, #12]
 80048f2:	461a      	mov	r2, r3
 80048f4:	68fb      	ldr	r3, [r7, #12]
 80048f6:	fbb3 f1f2 	udiv	r1, r3, r2
 80048fa:	fb02 f201 	mul.w	r2, r2, r1
 80048fe:	1a9b      	subs	r3, r3, r2
 8004900:	693a      	ldr	r2, [r7, #16]
 8004902:	4413      	add	r3, r2
 8004904:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
 8004908:	021b      	lsls	r3, r3, #8
 800490a:	461a      	mov	r2, r3
 800490c:	68bb      	ldr	r3, [r7, #8]
 800490e:	4313      	orrs	r3, r2
 8004910:	60bb      	str	r3, [r7, #8]
			val = (clst & 1) ? (wc >> 4) : (wc & 0xFFF);
 8004912:	683b      	ldr	r3, [r7, #0]
 8004914:	f003 0301 	and.w	r3, r3, #1
 8004918:	2b00      	cmp	r3, #0
 800491a:	d002      	beq.n	8004922 <get_fat+0xe0>
 800491c:	68bb      	ldr	r3, [r7, #8]
 800491e:	091b      	lsrs	r3, r3, #4
 8004920:	e002      	b.n	8004928 <get_fat+0xe6>
 8004922:	68bb      	ldr	r3, [r7, #8]
 8004924:	f3c3 030b 	ubfx	r3, r3, #0, #12
 8004928:	617b      	str	r3, [r7, #20]
			break;
 800492a:	e055      	b.n	80049d8 <get_fat+0x196>

		case FS_FAT16 :
			if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
 800492c:	693b      	ldr	r3, [r7, #16]
 800492e:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004930:	693b      	ldr	r3, [r7, #16]
 8004932:	899b      	ldrh	r3, [r3, #12]
 8004934:	085b      	lsrs	r3, r3, #1
 8004936:	b29b      	uxth	r3, r3
 8004938:	4619      	mov	r1, r3
 800493a:	683b      	ldr	r3, [r7, #0]
 800493c:	fbb3 f3f1 	udiv	r3, r3, r1
 8004940:	4413      	add	r3, r2
 8004942:	4619      	mov	r1, r3
 8004944:	6938      	ldr	r0, [r7, #16]
 8004946:	f7ff febf 	bl	80046c8 <move_window>
 800494a:	4603      	mov	r3, r0
 800494c:	2b00      	cmp	r3, #0
 800494e:	d140      	bne.n	80049d2 <get_fat+0x190>
			val = ld_word(fs->win + clst * 2 % SS(fs));
 8004950:	693b      	ldr	r3, [r7, #16]
 8004952:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004956:	683b      	ldr	r3, [r7, #0]
 8004958:	005b      	lsls	r3, r3, #1
 800495a:	693a      	ldr	r2, [r7, #16]
 800495c:	8992      	ldrh	r2, [r2, #12]
 800495e:	fbb3 f0f2 	udiv	r0, r3, r2
 8004962:	fb02 f200 	mul.w	r2, r2, r0
 8004966:	1a9b      	subs	r3, r3, r2
 8004968:	440b      	add	r3, r1
 800496a:	4618      	mov	r0, r3
 800496c:	f7ff fbfc 	bl	8004168 <ld_word>
 8004970:	4603      	mov	r3, r0
 8004972:	617b      	str	r3, [r7, #20]
			break;
 8004974:	e030      	b.n	80049d8 <get_fat+0x196>

		case FS_FAT32 :
			if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
 8004976:	693b      	ldr	r3, [r7, #16]
 8004978:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 800497a:	693b      	ldr	r3, [r7, #16]
 800497c:	899b      	ldrh	r3, [r3, #12]
 800497e:	089b      	lsrs	r3, r3, #2
 8004980:	b29b      	uxth	r3, r3
 8004982:	4619      	mov	r1, r3
 8004984:	683b      	ldr	r3, [r7, #0]
 8004986:	fbb3 f3f1 	udiv	r3, r3, r1
 800498a:	4413      	add	r3, r2
 800498c:	4619      	mov	r1, r3
 800498e:	6938      	ldr	r0, [r7, #16]
 8004990:	f7ff fe9a 	bl	80046c8 <move_window>
 8004994:	4603      	mov	r3, r0
 8004996:	2b00      	cmp	r3, #0
 8004998:	d11d      	bne.n	80049d6 <get_fat+0x194>
			val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF;
 800499a:	693b      	ldr	r3, [r7, #16]
 800499c:	f103 0138 	add.w	r1, r3, #56	; 0x38
 80049a0:	683b      	ldr	r3, [r7, #0]
 80049a2:	009b      	lsls	r3, r3, #2
 80049a4:	693a      	ldr	r2, [r7, #16]
 80049a6:	8992      	ldrh	r2, [r2, #12]
 80049a8:	fbb3 f0f2 	udiv	r0, r3, r2
 80049ac:	fb02 f200 	mul.w	r2, r2, r0
 80049b0:	1a9b      	subs	r3, r3, r2
 80049b2:	440b      	add	r3, r1
 80049b4:	4618      	mov	r0, r3
 80049b6:	f7ff fbef 	bl	8004198 <ld_dword>
 80049ba:	4603      	mov	r3, r0
 80049bc:	f023 4370 	bic.w	r3, r3, #4026531840	; 0xf0000000
 80049c0:	617b      	str	r3, [r7, #20]
			break;
 80049c2:	e009      	b.n	80049d8 <get_fat+0x196>
				}
			}
			/* go to default */
#endif
		default:
			val = 1;	/* Internal error */
 80049c4:	2301      	movs	r3, #1
 80049c6:	617b      	str	r3, [r7, #20]
 80049c8:	e006      	b.n	80049d8 <get_fat+0x196>
			if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
 80049ca:	bf00      	nop
 80049cc:	e004      	b.n	80049d8 <get_fat+0x196>
			if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break;
 80049ce:	bf00      	nop
 80049d0:	e002      	b.n	80049d8 <get_fat+0x196>
			if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break;
 80049d2:	bf00      	nop
 80049d4:	e000      	b.n	80049d8 <get_fat+0x196>
			if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break;
 80049d6:	bf00      	nop
		}
	}

	return val;
 80049d8:	697b      	ldr	r3, [r7, #20]
}
 80049da:	4618      	mov	r0, r3
 80049dc:	3718      	adds	r7, #24
 80049de:	46bd      	mov	sp, r7
 80049e0:	bd80      	pop	{r7, pc}

080049e2 <put_fat>:
FRESULT put_fat (	/* FR_OK(0):succeeded, !=0:error */
	FATFS* fs,		/* Corresponding file system object */
	DWORD clst,		/* FAT index number (cluster number) to be changed */
	DWORD val		/* New value to be set to the entry */
)
{
 80049e2:	b590      	push	{r4, r7, lr}
 80049e4:	b089      	sub	sp, #36	; 0x24
 80049e6:	af00      	add	r7, sp, #0
 80049e8:	60f8      	str	r0, [r7, #12]
 80049ea:	60b9      	str	r1, [r7, #8]
 80049ec:	607a      	str	r2, [r7, #4]
	UINT bc;
	BYTE *p;
	FRESULT res = FR_INT_ERR;
 80049ee:	2302      	movs	r3, #2
 80049f0:	77fb      	strb	r3, [r7, #31]

	if (clst >= 2 && clst < fs->n_fatent) {	/* Check if in valid range */
 80049f2:	68bb      	ldr	r3, [r7, #8]
 80049f4:	2b01      	cmp	r3, #1
 80049f6:	f240 8106 	bls.w	8004c06 <put_fat+0x224>
 80049fa:	68fb      	ldr	r3, [r7, #12]
 80049fc:	69db      	ldr	r3, [r3, #28]
 80049fe:	68ba      	ldr	r2, [r7, #8]
 8004a00:	429a      	cmp	r2, r3
 8004a02:	f080 8100 	bcs.w	8004c06 <put_fat+0x224>
		switch (fs->fs_type) {
 8004a06:	68fb      	ldr	r3, [r7, #12]
 8004a08:	781b      	ldrb	r3, [r3, #0]
 8004a0a:	2b02      	cmp	r3, #2
 8004a0c:	f000 8088 	beq.w	8004b20 <put_fat+0x13e>
 8004a10:	2b03      	cmp	r3, #3
 8004a12:	f000 80b0 	beq.w	8004b76 <put_fat+0x194>
 8004a16:	2b01      	cmp	r3, #1
 8004a18:	f040 80f5 	bne.w	8004c06 <put_fat+0x224>
		case FS_FAT12 :	/* Bitfield items */
			bc = (UINT)clst; bc += bc / 2;
 8004a1c:	68bb      	ldr	r3, [r7, #8]
 8004a1e:	61bb      	str	r3, [r7, #24]
 8004a20:	69bb      	ldr	r3, [r7, #24]
 8004a22:	085b      	lsrs	r3, r3, #1
 8004a24:	69ba      	ldr	r2, [r7, #24]
 8004a26:	4413      	add	r3, r2
 8004a28:	61bb      	str	r3, [r7, #24]
			res = move_window(fs, fs->fatbase + (bc / SS(fs)));
 8004a2a:	68fb      	ldr	r3, [r7, #12]
 8004a2c:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004a2e:	68fb      	ldr	r3, [r7, #12]
 8004a30:	899b      	ldrh	r3, [r3, #12]
 8004a32:	4619      	mov	r1, r3
 8004a34:	69bb      	ldr	r3, [r7, #24]
 8004a36:	fbb3 f3f1 	udiv	r3, r3, r1
 8004a3a:	4413      	add	r3, r2
 8004a3c:	4619      	mov	r1, r3
 8004a3e:	68f8      	ldr	r0, [r7, #12]
 8004a40:	f7ff fe42 	bl	80046c8 <move_window>
 8004a44:	4603      	mov	r3, r0
 8004a46:	77fb      	strb	r3, [r7, #31]
			if (res != FR_OK) break;
 8004a48:	7ffb      	ldrb	r3, [r7, #31]
 8004a4a:	2b00      	cmp	r3, #0
 8004a4c:	f040 80d4 	bne.w	8004bf8 <put_fat+0x216>
			p = fs->win + bc++ % SS(fs);
 8004a50:	68fb      	ldr	r3, [r7, #12]
 8004a52:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004a56:	69bb      	ldr	r3, [r7, #24]
 8004a58:	1c5a      	adds	r2, r3, #1
 8004a5a:	61ba      	str	r2, [r7, #24]
 8004a5c:	68fa      	ldr	r2, [r7, #12]
 8004a5e:	8992      	ldrh	r2, [r2, #12]
 8004a60:	fbb3 f0f2 	udiv	r0, r3, r2
 8004a64:	fb02 f200 	mul.w	r2, r2, r0
 8004a68:	1a9b      	subs	r3, r3, r2
 8004a6a:	440b      	add	r3, r1
 8004a6c:	617b      	str	r3, [r7, #20]
			*p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val;
 8004a6e:	68bb      	ldr	r3, [r7, #8]
 8004a70:	f003 0301 	and.w	r3, r3, #1
 8004a74:	2b00      	cmp	r3, #0
 8004a76:	d00d      	beq.n	8004a94 <put_fat+0xb2>
 8004a78:	697b      	ldr	r3, [r7, #20]
 8004a7a:	781b      	ldrb	r3, [r3, #0]
 8004a7c:	b25b      	sxtb	r3, r3
 8004a7e:	f003 030f 	and.w	r3, r3, #15
 8004a82:	b25a      	sxtb	r2, r3
 8004a84:	687b      	ldr	r3, [r7, #4]
 8004a86:	b2db      	uxtb	r3, r3
 8004a88:	011b      	lsls	r3, r3, #4
 8004a8a:	b25b      	sxtb	r3, r3
 8004a8c:	4313      	orrs	r3, r2
 8004a8e:	b25b      	sxtb	r3, r3
 8004a90:	b2db      	uxtb	r3, r3
 8004a92:	e001      	b.n	8004a98 <put_fat+0xb6>
 8004a94:	687b      	ldr	r3, [r7, #4]
 8004a96:	b2db      	uxtb	r3, r3
 8004a98:	697a      	ldr	r2, [r7, #20]
 8004a9a:	7013      	strb	r3, [r2, #0]
			fs->wflag = 1;
 8004a9c:	68fb      	ldr	r3, [r7, #12]
 8004a9e:	2201      	movs	r2, #1
 8004aa0:	70da      	strb	r2, [r3, #3]
			res = move_window(fs, fs->fatbase + (bc / SS(fs)));
 8004aa2:	68fb      	ldr	r3, [r7, #12]
 8004aa4:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004aa6:	68fb      	ldr	r3, [r7, #12]
 8004aa8:	899b      	ldrh	r3, [r3, #12]
 8004aaa:	4619      	mov	r1, r3
 8004aac:	69bb      	ldr	r3, [r7, #24]
 8004aae:	fbb3 f3f1 	udiv	r3, r3, r1
 8004ab2:	4413      	add	r3, r2
 8004ab4:	4619      	mov	r1, r3
 8004ab6:	68f8      	ldr	r0, [r7, #12]
 8004ab8:	f7ff fe06 	bl	80046c8 <move_window>
 8004abc:	4603      	mov	r3, r0
 8004abe:	77fb      	strb	r3, [r7, #31]
			if (res != FR_OK) break;
 8004ac0:	7ffb      	ldrb	r3, [r7, #31]
 8004ac2:	2b00      	cmp	r3, #0
 8004ac4:	f040 809a 	bne.w	8004bfc <put_fat+0x21a>
			p = fs->win + bc % SS(fs);
 8004ac8:	68fb      	ldr	r3, [r7, #12]
 8004aca:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004ace:	68fb      	ldr	r3, [r7, #12]
 8004ad0:	899b      	ldrh	r3, [r3, #12]
 8004ad2:	461a      	mov	r2, r3
 8004ad4:	69bb      	ldr	r3, [r7, #24]
 8004ad6:	fbb3 f0f2 	udiv	r0, r3, r2
 8004ada:	fb02 f200 	mul.w	r2, r2, r0
 8004ade:	1a9b      	subs	r3, r3, r2
 8004ae0:	440b      	add	r3, r1
 8004ae2:	617b      	str	r3, [r7, #20]
			*p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
 8004ae4:	68bb      	ldr	r3, [r7, #8]
 8004ae6:	f003 0301 	and.w	r3, r3, #1
 8004aea:	2b00      	cmp	r3, #0
 8004aec:	d003      	beq.n	8004af6 <put_fat+0x114>
 8004aee:	687b      	ldr	r3, [r7, #4]
 8004af0:	091b      	lsrs	r3, r3, #4
 8004af2:	b2db      	uxtb	r3, r3
 8004af4:	e00e      	b.n	8004b14 <put_fat+0x132>
 8004af6:	697b      	ldr	r3, [r7, #20]
 8004af8:	781b      	ldrb	r3, [r3, #0]
 8004afa:	b25b      	sxtb	r3, r3
 8004afc:	f023 030f 	bic.w	r3, r3, #15
 8004b00:	b25a      	sxtb	r2, r3
 8004b02:	687b      	ldr	r3, [r7, #4]
 8004b04:	0a1b      	lsrs	r3, r3, #8
 8004b06:	b25b      	sxtb	r3, r3
 8004b08:	f003 030f 	and.w	r3, r3, #15
 8004b0c:	b25b      	sxtb	r3, r3
 8004b0e:	4313      	orrs	r3, r2
 8004b10:	b25b      	sxtb	r3, r3
 8004b12:	b2db      	uxtb	r3, r3
 8004b14:	697a      	ldr	r2, [r7, #20]
 8004b16:	7013      	strb	r3, [r2, #0]
			fs->wflag = 1;
 8004b18:	68fb      	ldr	r3, [r7, #12]
 8004b1a:	2201      	movs	r2, #1
 8004b1c:	70da      	strb	r2, [r3, #3]
			break;
 8004b1e:	e072      	b.n	8004c06 <put_fat+0x224>

		case FS_FAT16 :	/* WORD aligned items */
			res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)));
 8004b20:	68fb      	ldr	r3, [r7, #12]
 8004b22:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004b24:	68fb      	ldr	r3, [r7, #12]
 8004b26:	899b      	ldrh	r3, [r3, #12]
 8004b28:	085b      	lsrs	r3, r3, #1
 8004b2a:	b29b      	uxth	r3, r3
 8004b2c:	4619      	mov	r1, r3
 8004b2e:	68bb      	ldr	r3, [r7, #8]
 8004b30:	fbb3 f3f1 	udiv	r3, r3, r1
 8004b34:	4413      	add	r3, r2
 8004b36:	4619      	mov	r1, r3
 8004b38:	68f8      	ldr	r0, [r7, #12]
 8004b3a:	f7ff fdc5 	bl	80046c8 <move_window>
 8004b3e:	4603      	mov	r3, r0
 8004b40:	77fb      	strb	r3, [r7, #31]
			if (res != FR_OK) break;
 8004b42:	7ffb      	ldrb	r3, [r7, #31]
 8004b44:	2b00      	cmp	r3, #0
 8004b46:	d15b      	bne.n	8004c00 <put_fat+0x21e>
			st_word(fs->win + clst * 2 % SS(fs), (WORD)val);
 8004b48:	68fb      	ldr	r3, [r7, #12]
 8004b4a:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004b4e:	68bb      	ldr	r3, [r7, #8]
 8004b50:	005b      	lsls	r3, r3, #1
 8004b52:	68fa      	ldr	r2, [r7, #12]
 8004b54:	8992      	ldrh	r2, [r2, #12]
 8004b56:	fbb3 f0f2 	udiv	r0, r3, r2
 8004b5a:	fb02 f200 	mul.w	r2, r2, r0
 8004b5e:	1a9b      	subs	r3, r3, r2
 8004b60:	440b      	add	r3, r1
 8004b62:	687a      	ldr	r2, [r7, #4]
 8004b64:	b292      	uxth	r2, r2
 8004b66:	4611      	mov	r1, r2
 8004b68:	4618      	mov	r0, r3
 8004b6a:	f7ff fb38 	bl	80041de <st_word>
			fs->wflag = 1;
 8004b6e:	68fb      	ldr	r3, [r7, #12]
 8004b70:	2201      	movs	r2, #1
 8004b72:	70da      	strb	r2, [r3, #3]
			break;
 8004b74:	e047      	b.n	8004c06 <put_fat+0x224>

		case FS_FAT32 :	/* DWORD aligned items */
#if _FS_EXFAT
		case FS_EXFAT :
#endif
			res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)));
 8004b76:	68fb      	ldr	r3, [r7, #12]
 8004b78:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8004b7a:	68fb      	ldr	r3, [r7, #12]
 8004b7c:	899b      	ldrh	r3, [r3, #12]
 8004b7e:	089b      	lsrs	r3, r3, #2
 8004b80:	b29b      	uxth	r3, r3
 8004b82:	4619      	mov	r1, r3
 8004b84:	68bb      	ldr	r3, [r7, #8]
 8004b86:	fbb3 f3f1 	udiv	r3, r3, r1
 8004b8a:	4413      	add	r3, r2
 8004b8c:	4619      	mov	r1, r3
 8004b8e:	68f8      	ldr	r0, [r7, #12]
 8004b90:	f7ff fd9a 	bl	80046c8 <move_window>
 8004b94:	4603      	mov	r3, r0
 8004b96:	77fb      	strb	r3, [r7, #31]
			if (res != FR_OK) break;
 8004b98:	7ffb      	ldrb	r3, [r7, #31]
 8004b9a:	2b00      	cmp	r3, #0
 8004b9c:	d132      	bne.n	8004c04 <put_fat+0x222>
			if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
				val = (val & 0x0FFFFFFF) | (ld_dword(fs->win + clst * 4 % SS(fs)) & 0xF0000000);
 8004b9e:	687b      	ldr	r3, [r7, #4]
 8004ba0:	f023 4470 	bic.w	r4, r3, #4026531840	; 0xf0000000
 8004ba4:	68fb      	ldr	r3, [r7, #12]
 8004ba6:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004baa:	68bb      	ldr	r3, [r7, #8]
 8004bac:	009b      	lsls	r3, r3, #2
 8004bae:	68fa      	ldr	r2, [r7, #12]
 8004bb0:	8992      	ldrh	r2, [r2, #12]
 8004bb2:	fbb3 f0f2 	udiv	r0, r3, r2
 8004bb6:	fb02 f200 	mul.w	r2, r2, r0
 8004bba:	1a9b      	subs	r3, r3, r2
 8004bbc:	440b      	add	r3, r1
 8004bbe:	4618      	mov	r0, r3
 8004bc0:	f7ff faea 	bl	8004198 <ld_dword>
 8004bc4:	4603      	mov	r3, r0
 8004bc6:	f003 4370 	and.w	r3, r3, #4026531840	; 0xf0000000
 8004bca:	4323      	orrs	r3, r4
 8004bcc:	607b      	str	r3, [r7, #4]
			}
			st_dword(fs->win + clst * 4 % SS(fs), val);
 8004bce:	68fb      	ldr	r3, [r7, #12]
 8004bd0:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004bd4:	68bb      	ldr	r3, [r7, #8]
 8004bd6:	009b      	lsls	r3, r3, #2
 8004bd8:	68fa      	ldr	r2, [r7, #12]
 8004bda:	8992      	ldrh	r2, [r2, #12]
 8004bdc:	fbb3 f0f2 	udiv	r0, r3, r2
 8004be0:	fb02 f200 	mul.w	r2, r2, r0
 8004be4:	1a9b      	subs	r3, r3, r2
 8004be6:	440b      	add	r3, r1
 8004be8:	6879      	ldr	r1, [r7, #4]
 8004bea:	4618      	mov	r0, r3
 8004bec:	f7ff fb12 	bl	8004214 <st_dword>
			fs->wflag = 1;
 8004bf0:	68fb      	ldr	r3, [r7, #12]
 8004bf2:	2201      	movs	r2, #1
 8004bf4:	70da      	strb	r2, [r3, #3]
			break;
 8004bf6:	e006      	b.n	8004c06 <put_fat+0x224>
			if (res != FR_OK) break;
 8004bf8:	bf00      	nop
 8004bfa:	e004      	b.n	8004c06 <put_fat+0x224>
			if (res != FR_OK) break;
 8004bfc:	bf00      	nop
 8004bfe:	e002      	b.n	8004c06 <put_fat+0x224>
			if (res != FR_OK) break;
 8004c00:	bf00      	nop
 8004c02:	e000      	b.n	8004c06 <put_fat+0x224>
			if (res != FR_OK) break;
 8004c04:	bf00      	nop
		}
	}
	return res;
 8004c06:	7ffb      	ldrb	r3, [r7, #31]
}
 8004c08:	4618      	mov	r0, r3
 8004c0a:	3724      	adds	r7, #36	; 0x24
 8004c0c:	46bd      	mov	sp, r7
 8004c0e:	bd90      	pop	{r4, r7, pc}

08004c10 <remove_chain>:
FRESULT remove_chain (	/* FR_OK(0):succeeded, !=0:error */
	_FDID* obj,			/* Corresponding object */
	DWORD clst,			/* Cluster to remove a chain from */
	DWORD pclst			/* Previous cluster of clst (0:an entire chain) */
)
{
 8004c10:	b580      	push	{r7, lr}
 8004c12:	b088      	sub	sp, #32
 8004c14:	af00      	add	r7, sp, #0
 8004c16:	60f8      	str	r0, [r7, #12]
 8004c18:	60b9      	str	r1, [r7, #8]
 8004c1a:	607a      	str	r2, [r7, #4]
	FRESULT res = FR_OK;
 8004c1c:	2300      	movs	r3, #0
 8004c1e:	77fb      	strb	r3, [r7, #31]
	DWORD nxt;
	FATFS *fs = obj->fs;
 8004c20:	68fb      	ldr	r3, [r7, #12]
 8004c22:	681b      	ldr	r3, [r3, #0]
 8004c24:	61bb      	str	r3, [r7, #24]
#endif
#if _USE_TRIM
	DWORD rt[2];
#endif

	if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR;	/* Check if in valid range */
 8004c26:	68bb      	ldr	r3, [r7, #8]
 8004c28:	2b01      	cmp	r3, #1
 8004c2a:	d904      	bls.n	8004c36 <remove_chain+0x26>
 8004c2c:	69bb      	ldr	r3, [r7, #24]
 8004c2e:	69db      	ldr	r3, [r3, #28]
 8004c30:	68ba      	ldr	r2, [r7, #8]
 8004c32:	429a      	cmp	r2, r3
 8004c34:	d301      	bcc.n	8004c3a <remove_chain+0x2a>
 8004c36:	2302      	movs	r3, #2
 8004c38:	e04b      	b.n	8004cd2 <remove_chain+0xc2>

	/* Mark the previous cluster 'EOC' on the FAT if it exists */
	if (pclst && (!_FS_EXFAT || fs->fs_type != FS_EXFAT || obj->stat != 2)) {
 8004c3a:	687b      	ldr	r3, [r7, #4]
 8004c3c:	2b00      	cmp	r3, #0
 8004c3e:	d00c      	beq.n	8004c5a <remove_chain+0x4a>
		res = put_fat(fs, pclst, 0xFFFFFFFF);
 8004c40:	f04f 32ff 	mov.w	r2, #4294967295
 8004c44:	6879      	ldr	r1, [r7, #4]
 8004c46:	69b8      	ldr	r0, [r7, #24]
 8004c48:	f7ff fecb 	bl	80049e2 <put_fat>
 8004c4c:	4603      	mov	r3, r0
 8004c4e:	77fb      	strb	r3, [r7, #31]
		if (res != FR_OK) return res;
 8004c50:	7ffb      	ldrb	r3, [r7, #31]
 8004c52:	2b00      	cmp	r3, #0
 8004c54:	d001      	beq.n	8004c5a <remove_chain+0x4a>
 8004c56:	7ffb      	ldrb	r3, [r7, #31]
 8004c58:	e03b      	b.n	8004cd2 <remove_chain+0xc2>
	}

	/* Remove the chain */
	do {
		nxt = get_fat(obj, clst);			/* Get cluster status */
 8004c5a:	68b9      	ldr	r1, [r7, #8]
 8004c5c:	68f8      	ldr	r0, [r7, #12]
 8004c5e:	f7ff fdf0 	bl	8004842 <get_fat>
 8004c62:	6178      	str	r0, [r7, #20]
		if (nxt == 0) break;				/* Empty cluster? */
 8004c64:	697b      	ldr	r3, [r7, #20]
 8004c66:	2b00      	cmp	r3, #0
 8004c68:	d031      	beq.n	8004cce <remove_chain+0xbe>
		if (nxt == 1) return FR_INT_ERR;	/* Internal error? */
 8004c6a:	697b      	ldr	r3, [r7, #20]
 8004c6c:	2b01      	cmp	r3, #1
 8004c6e:	d101      	bne.n	8004c74 <remove_chain+0x64>
 8004c70:	2302      	movs	r3, #2
 8004c72:	e02e      	b.n	8004cd2 <remove_chain+0xc2>
		if (nxt == 0xFFFFFFFF) return FR_DISK_ERR;	/* Disk error? */
 8004c74:	697b      	ldr	r3, [r7, #20]
 8004c76:	f1b3 3fff 	cmp.w	r3, #4294967295
 8004c7a:	d101      	bne.n	8004c80 <remove_chain+0x70>
 8004c7c:	2301      	movs	r3, #1
 8004c7e:	e028      	b.n	8004cd2 <remove_chain+0xc2>
		if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
			res = put_fat(fs, clst, 0);		/* Mark the cluster 'free' on the FAT */
 8004c80:	2200      	movs	r2, #0
 8004c82:	68b9      	ldr	r1, [r7, #8]
 8004c84:	69b8      	ldr	r0, [r7, #24]
 8004c86:	f7ff feac 	bl	80049e2 <put_fat>
 8004c8a:	4603      	mov	r3, r0
 8004c8c:	77fb      	strb	r3, [r7, #31]
			if (res != FR_OK) return res;
 8004c8e:	7ffb      	ldrb	r3, [r7, #31]
 8004c90:	2b00      	cmp	r3, #0
 8004c92:	d001      	beq.n	8004c98 <remove_chain+0x88>
 8004c94:	7ffb      	ldrb	r3, [r7, #31]
 8004c96:	e01c      	b.n	8004cd2 <remove_chain+0xc2>
		}
		if (fs->free_clst < fs->n_fatent - 2) {	/* Update FSINFO */
 8004c98:	69bb      	ldr	r3, [r7, #24]
 8004c9a:	699a      	ldr	r2, [r3, #24]
 8004c9c:	69bb      	ldr	r3, [r7, #24]
 8004c9e:	69db      	ldr	r3, [r3, #28]
 8004ca0:	3b02      	subs	r3, #2
 8004ca2:	429a      	cmp	r2, r3
 8004ca4:	d20b      	bcs.n	8004cbe <remove_chain+0xae>
			fs->free_clst++;
 8004ca6:	69bb      	ldr	r3, [r7, #24]
 8004ca8:	699b      	ldr	r3, [r3, #24]
 8004caa:	1c5a      	adds	r2, r3, #1
 8004cac:	69bb      	ldr	r3, [r7, #24]
 8004cae:	619a      	str	r2, [r3, #24]
			fs->fsi_flag |= 1;
 8004cb0:	69bb      	ldr	r3, [r7, #24]
 8004cb2:	791b      	ldrb	r3, [r3, #4]
 8004cb4:	f043 0301 	orr.w	r3, r3, #1
 8004cb8:	b2da      	uxtb	r2, r3
 8004cba:	69bb      	ldr	r3, [r7, #24]
 8004cbc:	711a      	strb	r2, [r3, #4]
			disk_ioctl(fs->drv, CTRL_TRIM, rt);				/* Inform device the block can be erased */
#endif
			scl = ecl = nxt;
		}
#endif
		clst = nxt;					/* Next cluster */
 8004cbe:	697b      	ldr	r3, [r7, #20]
 8004cc0:	60bb      	str	r3, [r7, #8]
	} while (clst < fs->n_fatent);	/* Repeat while not the last link */
 8004cc2:	69bb      	ldr	r3, [r7, #24]
 8004cc4:	69db      	ldr	r3, [r3, #28]
 8004cc6:	68ba      	ldr	r2, [r7, #8]
 8004cc8:	429a      	cmp	r2, r3
 8004cca:	d3c6      	bcc.n	8004c5a <remove_chain+0x4a>
 8004ccc:	e000      	b.n	8004cd0 <remove_chain+0xc0>
		if (nxt == 0) break;				/* Empty cluster? */
 8004cce:	bf00      	nop
				obj->stat = 2;	/* Change the object status 'contiguous' */
			}
		}
	}
#endif
	return FR_OK;
 8004cd0:	2300      	movs	r3, #0
}
 8004cd2:	4618      	mov	r0, r3
 8004cd4:	3720      	adds	r7, #32
 8004cd6:	46bd      	mov	sp, r7
 8004cd8:	bd80      	pop	{r7, pc}

08004cda <create_chain>:
static
DWORD create_chain (	/* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */
	_FDID* obj,			/* Corresponding object */
	DWORD clst			/* Cluster# to stretch, 0:Create a new chain */
)
{
 8004cda:	b580      	push	{r7, lr}
 8004cdc:	b088      	sub	sp, #32
 8004cde:	af00      	add	r7, sp, #0
 8004ce0:	6078      	str	r0, [r7, #4]
 8004ce2:	6039      	str	r1, [r7, #0]
	DWORD cs, ncl, scl;
	FRESULT res;
	FATFS *fs = obj->fs;
 8004ce4:	687b      	ldr	r3, [r7, #4]
 8004ce6:	681b      	ldr	r3, [r3, #0]
 8004ce8:	613b      	str	r3, [r7, #16]


	if (clst == 0) {	/* Create a new chain */
 8004cea:	683b      	ldr	r3, [r7, #0]
 8004cec:	2b00      	cmp	r3, #0
 8004cee:	d10d      	bne.n	8004d0c <create_chain+0x32>
		scl = fs->last_clst;				/* Get suggested cluster to start from */
 8004cf0:	693b      	ldr	r3, [r7, #16]
 8004cf2:	695b      	ldr	r3, [r3, #20]
 8004cf4:	61bb      	str	r3, [r7, #24]
		if (scl == 0 || scl >= fs->n_fatent) scl = 1;
 8004cf6:	69bb      	ldr	r3, [r7, #24]
 8004cf8:	2b00      	cmp	r3, #0
 8004cfa:	d004      	beq.n	8004d06 <create_chain+0x2c>
 8004cfc:	693b      	ldr	r3, [r7, #16]
 8004cfe:	69db      	ldr	r3, [r3, #28]
 8004d00:	69ba      	ldr	r2, [r7, #24]
 8004d02:	429a      	cmp	r2, r3
 8004d04:	d31b      	bcc.n	8004d3e <create_chain+0x64>
 8004d06:	2301      	movs	r3, #1
 8004d08:	61bb      	str	r3, [r7, #24]
 8004d0a:	e018      	b.n	8004d3e <create_chain+0x64>
	}
	else {				/* Stretch current chain */
		cs = get_fat(obj, clst);			/* Check the cluster status */
 8004d0c:	6839      	ldr	r1, [r7, #0]
 8004d0e:	6878      	ldr	r0, [r7, #4]
 8004d10:	f7ff fd97 	bl	8004842 <get_fat>
 8004d14:	60f8      	str	r0, [r7, #12]
		if (cs < 2) return 1;				/* Invalid FAT value */
 8004d16:	68fb      	ldr	r3, [r7, #12]
 8004d18:	2b01      	cmp	r3, #1
 8004d1a:	d801      	bhi.n	8004d20 <create_chain+0x46>
 8004d1c:	2301      	movs	r3, #1
 8004d1e:	e070      	b.n	8004e02 <create_chain+0x128>
		if (cs == 0xFFFFFFFF) return cs;	/* A disk error occurred */
 8004d20:	68fb      	ldr	r3, [r7, #12]
 8004d22:	f1b3 3fff 	cmp.w	r3, #4294967295
 8004d26:	d101      	bne.n	8004d2c <create_chain+0x52>
 8004d28:	68fb      	ldr	r3, [r7, #12]
 8004d2a:	e06a      	b.n	8004e02 <create_chain+0x128>
		if (cs < fs->n_fatent) return cs;	/* It is already followed by next cluster */
 8004d2c:	693b      	ldr	r3, [r7, #16]
 8004d2e:	69db      	ldr	r3, [r3, #28]
 8004d30:	68fa      	ldr	r2, [r7, #12]
 8004d32:	429a      	cmp	r2, r3
 8004d34:	d201      	bcs.n	8004d3a <create_chain+0x60>
 8004d36:	68fb      	ldr	r3, [r7, #12]
 8004d38:	e063      	b.n	8004e02 <create_chain+0x128>
		scl = clst;
 8004d3a:	683b      	ldr	r3, [r7, #0]
 8004d3c:	61bb      	str	r3, [r7, #24]
			}
		}
	} else
#endif
	{	/* On the FAT12/16/32 volume */
		ncl = scl;	/* Start cluster */
 8004d3e:	69bb      	ldr	r3, [r7, #24]
 8004d40:	61fb      	str	r3, [r7, #28]
		for (;;) {
			ncl++;							/* Next cluster */
 8004d42:	69fb      	ldr	r3, [r7, #28]
 8004d44:	3301      	adds	r3, #1
 8004d46:	61fb      	str	r3, [r7, #28]
			if (ncl >= fs->n_fatent) {		/* Check wrap-around */
 8004d48:	693b      	ldr	r3, [r7, #16]
 8004d4a:	69db      	ldr	r3, [r3, #28]
 8004d4c:	69fa      	ldr	r2, [r7, #28]
 8004d4e:	429a      	cmp	r2, r3
 8004d50:	d307      	bcc.n	8004d62 <create_chain+0x88>
				ncl = 2;
 8004d52:	2302      	movs	r3, #2
 8004d54:	61fb      	str	r3, [r7, #28]
				if (ncl > scl) return 0;	/* No free cluster */
 8004d56:	69fa      	ldr	r2, [r7, #28]
 8004d58:	69bb      	ldr	r3, [r7, #24]
 8004d5a:	429a      	cmp	r2, r3
 8004d5c:	d901      	bls.n	8004d62 <create_chain+0x88>
 8004d5e:	2300      	movs	r3, #0
 8004d60:	e04f      	b.n	8004e02 <create_chain+0x128>
			}
			cs = get_fat(obj, ncl);			/* Get the cluster status */
 8004d62:	69f9      	ldr	r1, [r7, #28]
 8004d64:	6878      	ldr	r0, [r7, #4]
 8004d66:	f7ff fd6c 	bl	8004842 <get_fat>
 8004d6a:	60f8      	str	r0, [r7, #12]
			if (cs == 0) break;				/* Found a free cluster */
 8004d6c:	68fb      	ldr	r3, [r7, #12]
 8004d6e:	2b00      	cmp	r3, #0
 8004d70:	d00e      	beq.n	8004d90 <create_chain+0xb6>
			if (cs == 1 || cs == 0xFFFFFFFF) return cs;	/* An error occurred */
 8004d72:	68fb      	ldr	r3, [r7, #12]
 8004d74:	2b01      	cmp	r3, #1
 8004d76:	d003      	beq.n	8004d80 <create_chain+0xa6>
 8004d78:	68fb      	ldr	r3, [r7, #12]
 8004d7a:	f1b3 3fff 	cmp.w	r3, #4294967295
 8004d7e:	d101      	bne.n	8004d84 <create_chain+0xaa>
 8004d80:	68fb      	ldr	r3, [r7, #12]
 8004d82:	e03e      	b.n	8004e02 <create_chain+0x128>
			if (ncl == scl) return 0;		/* No free cluster */
 8004d84:	69fa      	ldr	r2, [r7, #28]
 8004d86:	69bb      	ldr	r3, [r7, #24]
 8004d88:	429a      	cmp	r2, r3
 8004d8a:	d1da      	bne.n	8004d42 <create_chain+0x68>
 8004d8c:	2300      	movs	r3, #0
 8004d8e:	e038      	b.n	8004e02 <create_chain+0x128>
			if (cs == 0) break;				/* Found a free cluster */
 8004d90:	bf00      	nop
		}
		res = put_fat(fs, ncl, 0xFFFFFFFF);	/* Mark the new cluster 'EOC' */
 8004d92:	f04f 32ff 	mov.w	r2, #4294967295
 8004d96:	69f9      	ldr	r1, [r7, #28]
 8004d98:	6938      	ldr	r0, [r7, #16]
 8004d9a:	f7ff fe22 	bl	80049e2 <put_fat>
 8004d9e:	4603      	mov	r3, r0
 8004da0:	75fb      	strb	r3, [r7, #23]
		if (res == FR_OK && clst != 0) {
 8004da2:	7dfb      	ldrb	r3, [r7, #23]
 8004da4:	2b00      	cmp	r3, #0
 8004da6:	d109      	bne.n	8004dbc <create_chain+0xe2>
 8004da8:	683b      	ldr	r3, [r7, #0]
 8004daa:	2b00      	cmp	r3, #0
 8004dac:	d006      	beq.n	8004dbc <create_chain+0xe2>
			res = put_fat(fs, clst, ncl);	/* Link it from the previous one if needed */
 8004dae:	69fa      	ldr	r2, [r7, #28]
 8004db0:	6839      	ldr	r1, [r7, #0]
 8004db2:	6938      	ldr	r0, [r7, #16]
 8004db4:	f7ff fe15 	bl	80049e2 <put_fat>
 8004db8:	4603      	mov	r3, r0
 8004dba:	75fb      	strb	r3, [r7, #23]
		}
	}

	if (res == FR_OK) {			/* Update FSINFO if function succeeded. */
 8004dbc:	7dfb      	ldrb	r3, [r7, #23]
 8004dbe:	2b00      	cmp	r3, #0
 8004dc0:	d116      	bne.n	8004df0 <create_chain+0x116>
		fs->last_clst = ncl;
 8004dc2:	693b      	ldr	r3, [r7, #16]
 8004dc4:	69fa      	ldr	r2, [r7, #28]
 8004dc6:	615a      	str	r2, [r3, #20]
		if (fs->free_clst <= fs->n_fatent - 2) fs->free_clst--;
 8004dc8:	693b      	ldr	r3, [r7, #16]
 8004dca:	699a      	ldr	r2, [r3, #24]
 8004dcc:	693b      	ldr	r3, [r7, #16]
 8004dce:	69db      	ldr	r3, [r3, #28]
 8004dd0:	3b02      	subs	r3, #2
 8004dd2:	429a      	cmp	r2, r3
 8004dd4:	d804      	bhi.n	8004de0 <create_chain+0x106>
 8004dd6:	693b      	ldr	r3, [r7, #16]
 8004dd8:	699b      	ldr	r3, [r3, #24]
 8004dda:	1e5a      	subs	r2, r3, #1
 8004ddc:	693b      	ldr	r3, [r7, #16]
 8004dde:	619a      	str	r2, [r3, #24]
		fs->fsi_flag |= 1;
 8004de0:	693b      	ldr	r3, [r7, #16]
 8004de2:	791b      	ldrb	r3, [r3, #4]
 8004de4:	f043 0301 	orr.w	r3, r3, #1
 8004de8:	b2da      	uxtb	r2, r3
 8004dea:	693b      	ldr	r3, [r7, #16]
 8004dec:	711a      	strb	r2, [r3, #4]
 8004dee:	e007      	b.n	8004e00 <create_chain+0x126>
	} else {
		ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1;	/* Failed. Generate error status */
 8004df0:	7dfb      	ldrb	r3, [r7, #23]
 8004df2:	2b01      	cmp	r3, #1
 8004df4:	d102      	bne.n	8004dfc <create_chain+0x122>
 8004df6:	f04f 33ff 	mov.w	r3, #4294967295
 8004dfa:	e000      	b.n	8004dfe <create_chain+0x124>
 8004dfc:	2301      	movs	r3, #1
 8004dfe:	61fb      	str	r3, [r7, #28]
	}

	return ncl;		/* Return new cluster number or error status */
 8004e00:	69fb      	ldr	r3, [r7, #28]
}
 8004e02:	4618      	mov	r0, r3
 8004e04:	3720      	adds	r7, #32
 8004e06:	46bd      	mov	sp, r7
 8004e08:	bd80      	pop	{r7, pc}

08004e0a <clmt_clust>:
static
DWORD clmt_clust (	/* <2:Error, >=2:Cluster number */
	FIL* fp,		/* Pointer to the file object */
	FSIZE_t ofs		/* File offset to be converted to cluster# */
)
{
 8004e0a:	b480      	push	{r7}
 8004e0c:	b087      	sub	sp, #28
 8004e0e:	af00      	add	r7, sp, #0
 8004e10:	6078      	str	r0, [r7, #4]
 8004e12:	6039      	str	r1, [r7, #0]
	DWORD cl, ncl, *tbl;
	FATFS *fs = fp->obj.fs;
 8004e14:	687b      	ldr	r3, [r7, #4]
 8004e16:	681b      	ldr	r3, [r3, #0]
 8004e18:	60fb      	str	r3, [r7, #12]


	tbl = fp->cltbl + 1;	/* Top of CLMT */
 8004e1a:	687b      	ldr	r3, [r7, #4]
 8004e1c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8004e1e:	3304      	adds	r3, #4
 8004e20:	613b      	str	r3, [r7, #16]
	cl = (DWORD)(ofs / SS(fs) / fs->csize);	/* Cluster order from top of the file */
 8004e22:	68fb      	ldr	r3, [r7, #12]
 8004e24:	899b      	ldrh	r3, [r3, #12]
 8004e26:	461a      	mov	r2, r3
 8004e28:	683b      	ldr	r3, [r7, #0]
 8004e2a:	fbb3 f3f2 	udiv	r3, r3, r2
 8004e2e:	68fa      	ldr	r2, [r7, #12]
 8004e30:	8952      	ldrh	r2, [r2, #10]
 8004e32:	fbb3 f3f2 	udiv	r3, r3, r2
 8004e36:	617b      	str	r3, [r7, #20]
	for (;;) {
		ncl = *tbl++;			/* Number of cluters in the fragment */
 8004e38:	693b      	ldr	r3, [r7, #16]
 8004e3a:	1d1a      	adds	r2, r3, #4
 8004e3c:	613a      	str	r2, [r7, #16]
 8004e3e:	681b      	ldr	r3, [r3, #0]
 8004e40:	60bb      	str	r3, [r7, #8]
		if (ncl == 0) return 0;	/* End of table? (error) */
 8004e42:	68bb      	ldr	r3, [r7, #8]
 8004e44:	2b00      	cmp	r3, #0
 8004e46:	d101      	bne.n	8004e4c <clmt_clust+0x42>
 8004e48:	2300      	movs	r3, #0
 8004e4a:	e010      	b.n	8004e6e <clmt_clust+0x64>
		if (cl < ncl) break;	/* In this fragment? */
 8004e4c:	697a      	ldr	r2, [r7, #20]
 8004e4e:	68bb      	ldr	r3, [r7, #8]
 8004e50:	429a      	cmp	r2, r3
 8004e52:	d307      	bcc.n	8004e64 <clmt_clust+0x5a>
		cl -= ncl; tbl++;		/* Next fragment */
 8004e54:	697a      	ldr	r2, [r7, #20]
 8004e56:	68bb      	ldr	r3, [r7, #8]
 8004e58:	1ad3      	subs	r3, r2, r3
 8004e5a:	617b      	str	r3, [r7, #20]
 8004e5c:	693b      	ldr	r3, [r7, #16]
 8004e5e:	3304      	adds	r3, #4
 8004e60:	613b      	str	r3, [r7, #16]
		ncl = *tbl++;			/* Number of cluters in the fragment */
 8004e62:	e7e9      	b.n	8004e38 <clmt_clust+0x2e>
		if (cl < ncl) break;	/* In this fragment? */
 8004e64:	bf00      	nop
	}
	return cl + *tbl;	/* Return the cluster number */
 8004e66:	693b      	ldr	r3, [r7, #16]
 8004e68:	681a      	ldr	r2, [r3, #0]
 8004e6a:	697b      	ldr	r3, [r7, #20]
 8004e6c:	4413      	add	r3, r2
}
 8004e6e:	4618      	mov	r0, r3
 8004e70:	371c      	adds	r7, #28
 8004e72:	46bd      	mov	sp, r7
 8004e74:	f85d 7b04 	ldr.w	r7, [sp], #4
 8004e78:	4770      	bx	lr

08004e7a <dir_sdi>:
static
FRESULT dir_sdi (	/* FR_OK(0):succeeded, !=0:error */
	DIR* dp,		/* Pointer to directory object */
	DWORD ofs		/* Offset of directory table */
)
{
 8004e7a:	b580      	push	{r7, lr}
 8004e7c:	b086      	sub	sp, #24
 8004e7e:	af00      	add	r7, sp, #0
 8004e80:	6078      	str	r0, [r7, #4]
 8004e82:	6039      	str	r1, [r7, #0]
	DWORD csz, clst;
	FATFS *fs = dp->obj.fs;
 8004e84:	687b      	ldr	r3, [r7, #4]
 8004e86:	681b      	ldr	r3, [r3, #0]
 8004e88:	613b      	str	r3, [r7, #16]


	if (ofs >= (DWORD)((_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR) || ofs % SZDIRE) {	/* Check range of offset and alignment */
 8004e8a:	683b      	ldr	r3, [r7, #0]
 8004e8c:	f5b3 1f00 	cmp.w	r3, #2097152	; 0x200000
 8004e90:	d204      	bcs.n	8004e9c <dir_sdi+0x22>
 8004e92:	683b      	ldr	r3, [r7, #0]
 8004e94:	f003 031f 	and.w	r3, r3, #31
 8004e98:	2b00      	cmp	r3, #0
 8004e9a:	d001      	beq.n	8004ea0 <dir_sdi+0x26>
		return FR_INT_ERR;
 8004e9c:	2302      	movs	r3, #2
 8004e9e:	e071      	b.n	8004f84 <dir_sdi+0x10a>
	}
	dp->dptr = ofs;				/* Set current offset */
 8004ea0:	687b      	ldr	r3, [r7, #4]
 8004ea2:	683a      	ldr	r2, [r7, #0]
 8004ea4:	615a      	str	r2, [r3, #20]
	clst = dp->obj.sclust;		/* Table start cluster (0:root) */
 8004ea6:	687b      	ldr	r3, [r7, #4]
 8004ea8:	689b      	ldr	r3, [r3, #8]
 8004eaa:	617b      	str	r3, [r7, #20]
	if (clst == 0 && fs->fs_type >= FS_FAT32) {	/* Replace cluster# 0 with root cluster# */
 8004eac:	697b      	ldr	r3, [r7, #20]
 8004eae:	2b00      	cmp	r3, #0
 8004eb0:	d106      	bne.n	8004ec0 <dir_sdi+0x46>
 8004eb2:	693b      	ldr	r3, [r7, #16]
 8004eb4:	781b      	ldrb	r3, [r3, #0]
 8004eb6:	2b02      	cmp	r3, #2
 8004eb8:	d902      	bls.n	8004ec0 <dir_sdi+0x46>
		clst = fs->dirbase;
 8004eba:	693b      	ldr	r3, [r7, #16]
 8004ebc:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 8004ebe:	617b      	str	r3, [r7, #20]
		if (_FS_EXFAT) dp->obj.stat = 0;	/* exFAT: Root dir has an FAT chain */
	}

	if (clst == 0) {	/* Static table (root-directory in FAT12/16) */
 8004ec0:	697b      	ldr	r3, [r7, #20]
 8004ec2:	2b00      	cmp	r3, #0
 8004ec4:	d10c      	bne.n	8004ee0 <dir_sdi+0x66>
		if (ofs / SZDIRE >= fs->n_rootdir)	return FR_INT_ERR;	/* Is index out of range? */
 8004ec6:	683b      	ldr	r3, [r7, #0]
 8004ec8:	095b      	lsrs	r3, r3, #5
 8004eca:	693a      	ldr	r2, [r7, #16]
 8004ecc:	8912      	ldrh	r2, [r2, #8]
 8004ece:	4293      	cmp	r3, r2
 8004ed0:	d301      	bcc.n	8004ed6 <dir_sdi+0x5c>
 8004ed2:	2302      	movs	r3, #2
 8004ed4:	e056      	b.n	8004f84 <dir_sdi+0x10a>
		dp->sect = fs->dirbase;
 8004ed6:	693b      	ldr	r3, [r7, #16]
 8004ed8:	6ada      	ldr	r2, [r3, #44]	; 0x2c
 8004eda:	687b      	ldr	r3, [r7, #4]
 8004edc:	61da      	str	r2, [r3, #28]
 8004ede:	e02d      	b.n	8004f3c <dir_sdi+0xc2>

	} else {			/* Dynamic table (sub-directory or root-directory in FAT32+) */
		csz = (DWORD)fs->csize * SS(fs);	/* Bytes per cluster */
 8004ee0:	693b      	ldr	r3, [r7, #16]
 8004ee2:	895b      	ldrh	r3, [r3, #10]
 8004ee4:	461a      	mov	r2, r3
 8004ee6:	693b      	ldr	r3, [r7, #16]
 8004ee8:	899b      	ldrh	r3, [r3, #12]
 8004eea:	fb03 f302 	mul.w	r3, r3, r2
 8004eee:	60fb      	str	r3, [r7, #12]
		while (ofs >= csz) {				/* Follow cluster chain */
 8004ef0:	e019      	b.n	8004f26 <dir_sdi+0xac>
			clst = get_fat(&dp->obj, clst);				/* Get next cluster */
 8004ef2:	687b      	ldr	r3, [r7, #4]
 8004ef4:	6979      	ldr	r1, [r7, #20]
 8004ef6:	4618      	mov	r0, r3
 8004ef8:	f7ff fca3 	bl	8004842 <get_fat>
 8004efc:	6178      	str	r0, [r7, #20]
			if (clst == 0xFFFFFFFF) return FR_DISK_ERR;	/* Disk error */
 8004efe:	697b      	ldr	r3, [r7, #20]
 8004f00:	f1b3 3fff 	cmp.w	r3, #4294967295
 8004f04:	d101      	bne.n	8004f0a <dir_sdi+0x90>
 8004f06:	2301      	movs	r3, #1
 8004f08:	e03c      	b.n	8004f84 <dir_sdi+0x10a>
			if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR;	/* Reached to end of table or internal error */
 8004f0a:	697b      	ldr	r3, [r7, #20]
 8004f0c:	2b01      	cmp	r3, #1
 8004f0e:	d904      	bls.n	8004f1a <dir_sdi+0xa0>
 8004f10:	693b      	ldr	r3, [r7, #16]
 8004f12:	69db      	ldr	r3, [r3, #28]
 8004f14:	697a      	ldr	r2, [r7, #20]
 8004f16:	429a      	cmp	r2, r3
 8004f18:	d301      	bcc.n	8004f1e <dir_sdi+0xa4>
 8004f1a:	2302      	movs	r3, #2
 8004f1c:	e032      	b.n	8004f84 <dir_sdi+0x10a>
			ofs -= csz;
 8004f1e:	683a      	ldr	r2, [r7, #0]
 8004f20:	68fb      	ldr	r3, [r7, #12]
 8004f22:	1ad3      	subs	r3, r2, r3
 8004f24:	603b      	str	r3, [r7, #0]
		while (ofs >= csz) {				/* Follow cluster chain */
 8004f26:	683a      	ldr	r2, [r7, #0]
 8004f28:	68fb      	ldr	r3, [r7, #12]
 8004f2a:	429a      	cmp	r2, r3
 8004f2c:	d2e1      	bcs.n	8004ef2 <dir_sdi+0x78>
		}
		dp->sect = clust2sect(fs, clst);
 8004f2e:	6979      	ldr	r1, [r7, #20]
 8004f30:	6938      	ldr	r0, [r7, #16]
 8004f32:	f7ff fc67 	bl	8004804 <clust2sect>
 8004f36:	4602      	mov	r2, r0
 8004f38:	687b      	ldr	r3, [r7, #4]
 8004f3a:	61da      	str	r2, [r3, #28]
	}
	dp->clust = clst;					/* Current cluster# */
 8004f3c:	687b      	ldr	r3, [r7, #4]
 8004f3e:	697a      	ldr	r2, [r7, #20]
 8004f40:	619a      	str	r2, [r3, #24]
	if (!dp->sect) return FR_INT_ERR;
 8004f42:	687b      	ldr	r3, [r7, #4]
 8004f44:	69db      	ldr	r3, [r3, #28]
 8004f46:	2b00      	cmp	r3, #0
 8004f48:	d101      	bne.n	8004f4e <dir_sdi+0xd4>
 8004f4a:	2302      	movs	r3, #2
 8004f4c:	e01a      	b.n	8004f84 <dir_sdi+0x10a>
	dp->sect += ofs / SS(fs);			/* Sector# of the directory entry */
 8004f4e:	687b      	ldr	r3, [r7, #4]
 8004f50:	69da      	ldr	r2, [r3, #28]
 8004f52:	693b      	ldr	r3, [r7, #16]
 8004f54:	899b      	ldrh	r3, [r3, #12]
 8004f56:	4619      	mov	r1, r3
 8004f58:	683b      	ldr	r3, [r7, #0]
 8004f5a:	fbb3 f3f1 	udiv	r3, r3, r1
 8004f5e:	441a      	add	r2, r3
 8004f60:	687b      	ldr	r3, [r7, #4]
 8004f62:	61da      	str	r2, [r3, #28]
	dp->dir = fs->win + (ofs % SS(fs));	/* Pointer to the entry in the win[] */
 8004f64:	693b      	ldr	r3, [r7, #16]
 8004f66:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8004f6a:	693b      	ldr	r3, [r7, #16]
 8004f6c:	899b      	ldrh	r3, [r3, #12]
 8004f6e:	461a      	mov	r2, r3
 8004f70:	683b      	ldr	r3, [r7, #0]
 8004f72:	fbb3 f0f2 	udiv	r0, r3, r2
 8004f76:	fb02 f200 	mul.w	r2, r2, r0
 8004f7a:	1a9b      	subs	r3, r3, r2
 8004f7c:	18ca      	adds	r2, r1, r3
 8004f7e:	687b      	ldr	r3, [r7, #4]
 8004f80:	621a      	str	r2, [r3, #32]

	return FR_OK;
 8004f82:	2300      	movs	r3, #0
}
 8004f84:	4618      	mov	r0, r3
 8004f86:	3718      	adds	r7, #24
 8004f88:	46bd      	mov	sp, r7
 8004f8a:	bd80      	pop	{r7, pc}

08004f8c <dir_next>:
static
FRESULT dir_next (	/* FR_OK(0):succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */
	DIR* dp,		/* Pointer to the directory object */
	int stretch		/* 0: Do not stretch table, 1: Stretch table if needed */
)
{
 8004f8c:	b580      	push	{r7, lr}
 8004f8e:	b086      	sub	sp, #24
 8004f90:	af00      	add	r7, sp, #0
 8004f92:	6078      	str	r0, [r7, #4]
 8004f94:	6039      	str	r1, [r7, #0]
	DWORD ofs, clst;
	FATFS *fs = dp->obj.fs;
 8004f96:	687b      	ldr	r3, [r7, #4]
 8004f98:	681b      	ldr	r3, [r3, #0]
 8004f9a:	60fb      	str	r3, [r7, #12]
#if !_FS_READONLY
	UINT n;
#endif

	ofs = dp->dptr + SZDIRE;	/* Next entry */
 8004f9c:	687b      	ldr	r3, [r7, #4]
 8004f9e:	695b      	ldr	r3, [r3, #20]
 8004fa0:	3320      	adds	r3, #32
 8004fa2:	60bb      	str	r3, [r7, #8]
	if (!dp->sect || ofs >= (DWORD)((_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR)) return FR_NO_FILE;	/* Report EOT when offset has reached max value */
 8004fa4:	687b      	ldr	r3, [r7, #4]
 8004fa6:	69db      	ldr	r3, [r3, #28]
 8004fa8:	2b00      	cmp	r3, #0
 8004faa:	d003      	beq.n	8004fb4 <dir_next+0x28>
 8004fac:	68bb      	ldr	r3, [r7, #8]
 8004fae:	f5b3 1f00 	cmp.w	r3, #2097152	; 0x200000
 8004fb2:	d301      	bcc.n	8004fb8 <dir_next+0x2c>
 8004fb4:	2304      	movs	r3, #4
 8004fb6:	e0bb      	b.n	8005130 <dir_next+0x1a4>

	if (ofs % SS(fs) == 0) {	/* Sector changed? */
 8004fb8:	68fb      	ldr	r3, [r7, #12]
 8004fba:	899b      	ldrh	r3, [r3, #12]
 8004fbc:	461a      	mov	r2, r3
 8004fbe:	68bb      	ldr	r3, [r7, #8]
 8004fc0:	fbb3 f1f2 	udiv	r1, r3, r2
 8004fc4:	fb02 f201 	mul.w	r2, r2, r1
 8004fc8:	1a9b      	subs	r3, r3, r2
 8004fca:	2b00      	cmp	r3, #0
 8004fcc:	f040 809d 	bne.w	800510a <dir_next+0x17e>
		dp->sect++;				/* Next sector */
 8004fd0:	687b      	ldr	r3, [r7, #4]
 8004fd2:	69db      	ldr	r3, [r3, #28]
 8004fd4:	1c5a      	adds	r2, r3, #1
 8004fd6:	687b      	ldr	r3, [r7, #4]
 8004fd8:	61da      	str	r2, [r3, #28]

		if (!dp->clust) {		/* Static table */
 8004fda:	687b      	ldr	r3, [r7, #4]
 8004fdc:	699b      	ldr	r3, [r3, #24]
 8004fde:	2b00      	cmp	r3, #0
 8004fe0:	d10b      	bne.n	8004ffa <dir_next+0x6e>
			if (ofs / SZDIRE >= fs->n_rootdir) {	/* Report EOT if it reached end of static table */
 8004fe2:	68bb      	ldr	r3, [r7, #8]
 8004fe4:	095b      	lsrs	r3, r3, #5
 8004fe6:	68fa      	ldr	r2, [r7, #12]
 8004fe8:	8912      	ldrh	r2, [r2, #8]
 8004fea:	4293      	cmp	r3, r2
 8004fec:	f0c0 808d 	bcc.w	800510a <dir_next+0x17e>
				dp->sect = 0; return FR_NO_FILE;
 8004ff0:	687b      	ldr	r3, [r7, #4]
 8004ff2:	2200      	movs	r2, #0
 8004ff4:	61da      	str	r2, [r3, #28]
 8004ff6:	2304      	movs	r3, #4
 8004ff8:	e09a      	b.n	8005130 <dir_next+0x1a4>
			}
		}
		else {					/* Dynamic table */
			if ((ofs / SS(fs) & (fs->csize - 1)) == 0) {		/* Cluster changed? */
 8004ffa:	68fb      	ldr	r3, [r7, #12]
 8004ffc:	899b      	ldrh	r3, [r3, #12]
 8004ffe:	461a      	mov	r2, r3
 8005000:	68bb      	ldr	r3, [r7, #8]
 8005002:	fbb3 f3f2 	udiv	r3, r3, r2
 8005006:	68fa      	ldr	r2, [r7, #12]
 8005008:	8952      	ldrh	r2, [r2, #10]
 800500a:	3a01      	subs	r2, #1
 800500c:	4013      	ands	r3, r2
 800500e:	2b00      	cmp	r3, #0
 8005010:	d17b      	bne.n	800510a <dir_next+0x17e>
				clst = get_fat(&dp->obj, dp->clust);			/* Get next cluster */
 8005012:	687a      	ldr	r2, [r7, #4]
 8005014:	687b      	ldr	r3, [r7, #4]
 8005016:	699b      	ldr	r3, [r3, #24]
 8005018:	4619      	mov	r1, r3
 800501a:	4610      	mov	r0, r2
 800501c:	f7ff fc11 	bl	8004842 <get_fat>
 8005020:	6178      	str	r0, [r7, #20]
				if (clst <= 1) return FR_INT_ERR;				/* Internal error */
 8005022:	697b      	ldr	r3, [r7, #20]
 8005024:	2b01      	cmp	r3, #1
 8005026:	d801      	bhi.n	800502c <dir_next+0xa0>
 8005028:	2302      	movs	r3, #2
 800502a:	e081      	b.n	8005130 <dir_next+0x1a4>
				if (clst == 0xFFFFFFFF) return FR_DISK_ERR;		/* Disk error */
 800502c:	697b      	ldr	r3, [r7, #20]
 800502e:	f1b3 3fff 	cmp.w	r3, #4294967295
 8005032:	d101      	bne.n	8005038 <dir_next+0xac>
 8005034:	2301      	movs	r3, #1
 8005036:	e07b      	b.n	8005130 <dir_next+0x1a4>
				if (clst >= fs->n_fatent) {						/* Reached end of dynamic table */
 8005038:	68fb      	ldr	r3, [r7, #12]
 800503a:	69db      	ldr	r3, [r3, #28]
 800503c:	697a      	ldr	r2, [r7, #20]
 800503e:	429a      	cmp	r2, r3
 8005040:	d359      	bcc.n	80050f6 <dir_next+0x16a>
#if !_FS_READONLY
					if (!stretch) {								/* If no stretch, report EOT */
 8005042:	683b      	ldr	r3, [r7, #0]
 8005044:	2b00      	cmp	r3, #0
 8005046:	d104      	bne.n	8005052 <dir_next+0xc6>
						dp->sect = 0; return FR_NO_FILE;
 8005048:	687b      	ldr	r3, [r7, #4]
 800504a:	2200      	movs	r2, #0
 800504c:	61da      	str	r2, [r3, #28]
 800504e:	2304      	movs	r3, #4
 8005050:	e06e      	b.n	8005130 <dir_next+0x1a4>
					}
					clst = create_chain(&dp->obj, dp->clust);	/* Allocate a cluster */
 8005052:	687a      	ldr	r2, [r7, #4]
 8005054:	687b      	ldr	r3, [r7, #4]
 8005056:	699b      	ldr	r3, [r3, #24]
 8005058:	4619      	mov	r1, r3
 800505a:	4610      	mov	r0, r2
 800505c:	f7ff fe3d 	bl	8004cda <create_chain>
 8005060:	6178      	str	r0, [r7, #20]
					if (clst == 0) return FR_DENIED;			/* No free cluster */
 8005062:	697b      	ldr	r3, [r7, #20]
 8005064:	2b00      	cmp	r3, #0
 8005066:	d101      	bne.n	800506c <dir_next+0xe0>
 8005068:	2307      	movs	r3, #7
 800506a:	e061      	b.n	8005130 <dir_next+0x1a4>
					if (clst == 1) return FR_INT_ERR;			/* Internal error */
 800506c:	697b      	ldr	r3, [r7, #20]
 800506e:	2b01      	cmp	r3, #1
 8005070:	d101      	bne.n	8005076 <dir_next+0xea>
 8005072:	2302      	movs	r3, #2
 8005074:	e05c      	b.n	8005130 <dir_next+0x1a4>
					if (clst == 0xFFFFFFFF) return FR_DISK_ERR;	/* Disk error */
 8005076:	697b      	ldr	r3, [r7, #20]
 8005078:	f1b3 3fff 	cmp.w	r3, #4294967295
 800507c:	d101      	bne.n	8005082 <dir_next+0xf6>
 800507e:	2301      	movs	r3, #1
 8005080:	e056      	b.n	8005130 <dir_next+0x1a4>
					/* Clean-up the stretched table */
					if (_FS_EXFAT) dp->obj.stat |= 4;			/* The directory needs to be updated */
					if (sync_window(fs) != FR_OK) return FR_DISK_ERR;	/* Flush disk access window */
 8005082:	68f8      	ldr	r0, [r7, #12]
 8005084:	f7ff fadc 	bl	8004640 <sync_window>
 8005088:	4603      	mov	r3, r0
 800508a:	2b00      	cmp	r3, #0
 800508c:	d001      	beq.n	8005092 <dir_next+0x106>
 800508e:	2301      	movs	r3, #1
 8005090:	e04e      	b.n	8005130 <dir_next+0x1a4>
					mem_set(fs->win, 0, SS(fs));				/* Clear window buffer */
 8005092:	68fb      	ldr	r3, [r7, #12]
 8005094:	f103 0038 	add.w	r0, r3, #56	; 0x38
 8005098:	68fb      	ldr	r3, [r7, #12]
 800509a:	899b      	ldrh	r3, [r3, #12]
 800509c:	461a      	mov	r2, r3
 800509e:	2100      	movs	r1, #0
 80050a0:	f7ff f905 	bl	80042ae <mem_set>
					for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) {	/* Fill the new cluster with 0 */
 80050a4:	2300      	movs	r3, #0
 80050a6:	613b      	str	r3, [r7, #16]
 80050a8:	6979      	ldr	r1, [r7, #20]
 80050aa:	68f8      	ldr	r0, [r7, #12]
 80050ac:	f7ff fbaa 	bl	8004804 <clust2sect>
 80050b0:	4602      	mov	r2, r0
 80050b2:	68fb      	ldr	r3, [r7, #12]
 80050b4:	635a      	str	r2, [r3, #52]	; 0x34
 80050b6:	e012      	b.n	80050de <dir_next+0x152>
						fs->wflag = 1;
 80050b8:	68fb      	ldr	r3, [r7, #12]
 80050ba:	2201      	movs	r2, #1
 80050bc:	70da      	strb	r2, [r3, #3]
						if (sync_window(fs) != FR_OK) return FR_DISK_ERR;
 80050be:	68f8      	ldr	r0, [r7, #12]
 80050c0:	f7ff fabe 	bl	8004640 <sync_window>
 80050c4:	4603      	mov	r3, r0
 80050c6:	2b00      	cmp	r3, #0
 80050c8:	d001      	beq.n	80050ce <dir_next+0x142>
 80050ca:	2301      	movs	r3, #1
 80050cc:	e030      	b.n	8005130 <dir_next+0x1a4>
					for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) {	/* Fill the new cluster with 0 */
 80050ce:	693b      	ldr	r3, [r7, #16]
 80050d0:	3301      	adds	r3, #1
 80050d2:	613b      	str	r3, [r7, #16]
 80050d4:	68fb      	ldr	r3, [r7, #12]
 80050d6:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 80050d8:	1c5a      	adds	r2, r3, #1
 80050da:	68fb      	ldr	r3, [r7, #12]
 80050dc:	635a      	str	r2, [r3, #52]	; 0x34
 80050de:	68fb      	ldr	r3, [r7, #12]
 80050e0:	895b      	ldrh	r3, [r3, #10]
 80050e2:	461a      	mov	r2, r3
 80050e4:	693b      	ldr	r3, [r7, #16]
 80050e6:	4293      	cmp	r3, r2
 80050e8:	d3e6      	bcc.n	80050b8 <dir_next+0x12c>
					}
					fs->winsect -= n;							/* Restore window offset */
 80050ea:	68fb      	ldr	r3, [r7, #12]
 80050ec:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 80050ee:	693b      	ldr	r3, [r7, #16]
 80050f0:	1ad2      	subs	r2, r2, r3
 80050f2:	68fb      	ldr	r3, [r7, #12]
 80050f4:	635a      	str	r2, [r3, #52]	; 0x34
#else
					if (!stretch) dp->sect = 0;					/* (this line is to suppress compiler warning) */
					dp->sect = 0; return FR_NO_FILE;			/* Report EOT */
#endif
				}
				dp->clust = clst;		/* Initialize data for new cluster */
 80050f6:	687b      	ldr	r3, [r7, #4]
 80050f8:	697a      	ldr	r2, [r7, #20]
 80050fa:	619a      	str	r2, [r3, #24]
				dp->sect = clust2sect(fs, clst);
 80050fc:	6979      	ldr	r1, [r7, #20]
 80050fe:	68f8      	ldr	r0, [r7, #12]
 8005100:	f7ff fb80 	bl	8004804 <clust2sect>
 8005104:	4602      	mov	r2, r0
 8005106:	687b      	ldr	r3, [r7, #4]
 8005108:	61da      	str	r2, [r3, #28]
			}
		}
	}
	dp->dptr = ofs;						/* Current entry */
 800510a:	687b      	ldr	r3, [r7, #4]
 800510c:	68ba      	ldr	r2, [r7, #8]
 800510e:	615a      	str	r2, [r3, #20]
	dp->dir = fs->win + ofs % SS(fs);	/* Pointer to the entry in the win[] */
 8005110:	68fb      	ldr	r3, [r7, #12]
 8005112:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8005116:	68fb      	ldr	r3, [r7, #12]
 8005118:	899b      	ldrh	r3, [r3, #12]
 800511a:	461a      	mov	r2, r3
 800511c:	68bb      	ldr	r3, [r7, #8]
 800511e:	fbb3 f0f2 	udiv	r0, r3, r2
 8005122:	fb02 f200 	mul.w	r2, r2, r0
 8005126:	1a9b      	subs	r3, r3, r2
 8005128:	18ca      	adds	r2, r1, r3
 800512a:	687b      	ldr	r3, [r7, #4]
 800512c:	621a      	str	r2, [r3, #32]

	return FR_OK;
 800512e:	2300      	movs	r3, #0
}
 8005130:	4618      	mov	r0, r3
 8005132:	3718      	adds	r7, #24
 8005134:	46bd      	mov	sp, r7
 8005136:	bd80      	pop	{r7, pc}

08005138 <dir_alloc>:
static
FRESULT dir_alloc (	/* FR_OK(0):succeeded, !=0:error */
	DIR* dp,		/* Pointer to the directory object */
	UINT nent		/* Number of contiguous entries to allocate */
)
{
 8005138:	b580      	push	{r7, lr}
 800513a:	b086      	sub	sp, #24
 800513c:	af00      	add	r7, sp, #0
 800513e:	6078      	str	r0, [r7, #4]
 8005140:	6039      	str	r1, [r7, #0]
	FRESULT res;
	UINT n;
	FATFS *fs = dp->obj.fs;
 8005142:	687b      	ldr	r3, [r7, #4]
 8005144:	681b      	ldr	r3, [r3, #0]
 8005146:	60fb      	str	r3, [r7, #12]


	res = dir_sdi(dp, 0);
 8005148:	2100      	movs	r1, #0
 800514a:	6878      	ldr	r0, [r7, #4]
 800514c:	f7ff fe95 	bl	8004e7a <dir_sdi>
 8005150:	4603      	mov	r3, r0
 8005152:	75fb      	strb	r3, [r7, #23]
	if (res == FR_OK) {
 8005154:	7dfb      	ldrb	r3, [r7, #23]
 8005156:	2b00      	cmp	r3, #0
 8005158:	d12b      	bne.n	80051b2 <dir_alloc+0x7a>
		n = 0;
 800515a:	2300      	movs	r3, #0
 800515c:	613b      	str	r3, [r7, #16]
		do {
			res = move_window(fs, dp->sect);
 800515e:	687b      	ldr	r3, [r7, #4]
 8005160:	69db      	ldr	r3, [r3, #28]
 8005162:	4619      	mov	r1, r3
 8005164:	68f8      	ldr	r0, [r7, #12]
 8005166:	f7ff faaf 	bl	80046c8 <move_window>
 800516a:	4603      	mov	r3, r0
 800516c:	75fb      	strb	r3, [r7, #23]
			if (res != FR_OK) break;
 800516e:	7dfb      	ldrb	r3, [r7, #23]
 8005170:	2b00      	cmp	r3, #0
 8005172:	d11d      	bne.n	80051b0 <dir_alloc+0x78>
#if _FS_EXFAT
			if ((fs->fs_type == FS_EXFAT) ? (int)((dp->dir[XDIR_Type] & 0x80) == 0) : (int)(dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0)) {
#else
			if (dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0) {
 8005174:	687b      	ldr	r3, [r7, #4]
 8005176:	6a1b      	ldr	r3, [r3, #32]
 8005178:	781b      	ldrb	r3, [r3, #0]
 800517a:	2be5      	cmp	r3, #229	; 0xe5
 800517c:	d004      	beq.n	8005188 <dir_alloc+0x50>
 800517e:	687b      	ldr	r3, [r7, #4]
 8005180:	6a1b      	ldr	r3, [r3, #32]
 8005182:	781b      	ldrb	r3, [r3, #0]
 8005184:	2b00      	cmp	r3, #0
 8005186:	d107      	bne.n	8005198 <dir_alloc+0x60>
#endif
				if (++n == nent) break;	/* A block of contiguous free entries is found */
 8005188:	693b      	ldr	r3, [r7, #16]
 800518a:	3301      	adds	r3, #1
 800518c:	613b      	str	r3, [r7, #16]
 800518e:	693a      	ldr	r2, [r7, #16]
 8005190:	683b      	ldr	r3, [r7, #0]
 8005192:	429a      	cmp	r2, r3
 8005194:	d102      	bne.n	800519c <dir_alloc+0x64>
 8005196:	e00c      	b.n	80051b2 <dir_alloc+0x7a>
			} else {
				n = 0;					/* Not a blank entry. Restart to search */
 8005198:	2300      	movs	r3, #0
 800519a:	613b      	str	r3, [r7, #16]
			}
			res = dir_next(dp, 1);
 800519c:	2101      	movs	r1, #1
 800519e:	6878      	ldr	r0, [r7, #4]
 80051a0:	f7ff fef4 	bl	8004f8c <dir_next>
 80051a4:	4603      	mov	r3, r0
 80051a6:	75fb      	strb	r3, [r7, #23]
		} while (res == FR_OK);	/* Next entry with table stretch enabled */
 80051a8:	7dfb      	ldrb	r3, [r7, #23]
 80051aa:	2b00      	cmp	r3, #0
 80051ac:	d0d7      	beq.n	800515e <dir_alloc+0x26>
 80051ae:	e000      	b.n	80051b2 <dir_alloc+0x7a>
			if (res != FR_OK) break;
 80051b0:	bf00      	nop
	}

	if (res == FR_NO_FILE) res = FR_DENIED;	/* No directory entry to allocate */
 80051b2:	7dfb      	ldrb	r3, [r7, #23]
 80051b4:	2b04      	cmp	r3, #4
 80051b6:	d101      	bne.n	80051bc <dir_alloc+0x84>
 80051b8:	2307      	movs	r3, #7
 80051ba:	75fb      	strb	r3, [r7, #23]
	return res;
 80051bc:	7dfb      	ldrb	r3, [r7, #23]
}
 80051be:	4618      	mov	r0, r3
 80051c0:	3718      	adds	r7, #24
 80051c2:	46bd      	mov	sp, r7
 80051c4:	bd80      	pop	{r7, pc}

080051c6 <ld_clust>:
static
DWORD ld_clust (	/* Returns the top cluster value of the SFN entry */
	FATFS* fs,		/* Pointer to the fs object */
	const BYTE* dir	/* Pointer to the key entry */
)
{
 80051c6:	b580      	push	{r7, lr}
 80051c8:	b084      	sub	sp, #16
 80051ca:	af00      	add	r7, sp, #0
 80051cc:	6078      	str	r0, [r7, #4]
 80051ce:	6039      	str	r1, [r7, #0]
	DWORD cl;

	cl = ld_word(dir + DIR_FstClusLO);
 80051d0:	683b      	ldr	r3, [r7, #0]
 80051d2:	331a      	adds	r3, #26
 80051d4:	4618      	mov	r0, r3
 80051d6:	f7fe ffc7 	bl	8004168 <ld_word>
 80051da:	4603      	mov	r3, r0
 80051dc:	60fb      	str	r3, [r7, #12]
	if (fs->fs_type == FS_FAT32) {
 80051de:	687b      	ldr	r3, [r7, #4]
 80051e0:	781b      	ldrb	r3, [r3, #0]
 80051e2:	2b03      	cmp	r3, #3
 80051e4:	d109      	bne.n	80051fa <ld_clust+0x34>
		cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16;
 80051e6:	683b      	ldr	r3, [r7, #0]
 80051e8:	3314      	adds	r3, #20
 80051ea:	4618      	mov	r0, r3
 80051ec:	f7fe ffbc 	bl	8004168 <ld_word>
 80051f0:	4603      	mov	r3, r0
 80051f2:	041b      	lsls	r3, r3, #16
 80051f4:	68fa      	ldr	r2, [r7, #12]
 80051f6:	4313      	orrs	r3, r2
 80051f8:	60fb      	str	r3, [r7, #12]
	}

	return cl;
 80051fa:	68fb      	ldr	r3, [r7, #12]
}
 80051fc:	4618      	mov	r0, r3
 80051fe:	3710      	adds	r7, #16
 8005200:	46bd      	mov	sp, r7
 8005202:	bd80      	pop	{r7, pc}

08005204 <st_clust>:
void st_clust (
	FATFS* fs,	/* Pointer to the fs object */
	BYTE* dir,	/* Pointer to the key entry */
	DWORD cl	/* Value to be set */
)
{
 8005204:	b580      	push	{r7, lr}
 8005206:	b084      	sub	sp, #16
 8005208:	af00      	add	r7, sp, #0
 800520a:	60f8      	str	r0, [r7, #12]
 800520c:	60b9      	str	r1, [r7, #8]
 800520e:	607a      	str	r2, [r7, #4]
	st_word(dir + DIR_FstClusLO, (WORD)cl);
 8005210:	68bb      	ldr	r3, [r7, #8]
 8005212:	331a      	adds	r3, #26
 8005214:	687a      	ldr	r2, [r7, #4]
 8005216:	b292      	uxth	r2, r2
 8005218:	4611      	mov	r1, r2
 800521a:	4618      	mov	r0, r3
 800521c:	f7fe ffdf 	bl	80041de <st_word>
	if (fs->fs_type == FS_FAT32) {
 8005220:	68fb      	ldr	r3, [r7, #12]
 8005222:	781b      	ldrb	r3, [r3, #0]
 8005224:	2b03      	cmp	r3, #3
 8005226:	d109      	bne.n	800523c <st_clust+0x38>
		st_word(dir + DIR_FstClusHI, (WORD)(cl >> 16));
 8005228:	68bb      	ldr	r3, [r7, #8]
 800522a:	f103 0214 	add.w	r2, r3, #20
 800522e:	687b      	ldr	r3, [r7, #4]
 8005230:	0c1b      	lsrs	r3, r3, #16
 8005232:	b29b      	uxth	r3, r3
 8005234:	4619      	mov	r1, r3
 8005236:	4610      	mov	r0, r2
 8005238:	f7fe ffd1 	bl	80041de <st_word>
	}
}
 800523c:	bf00      	nop
 800523e:	3710      	adds	r7, #16
 8005240:	46bd      	mov	sp, r7
 8005242:	bd80      	pop	{r7, pc}

08005244 <cmp_lfn>:
static
int cmp_lfn (				/* 1:matched, 0:not matched */
	const WCHAR* lfnbuf,	/* Pointer to the LFN working buffer to be compared */
	BYTE* dir				/* Pointer to the directory entry containing the part of LFN */
)
{
 8005244:	b590      	push	{r4, r7, lr}
 8005246:	b087      	sub	sp, #28
 8005248:	af00      	add	r7, sp, #0
 800524a:	6078      	str	r0, [r7, #4]
 800524c:	6039      	str	r1, [r7, #0]
	UINT i, s;
	WCHAR wc, uc;


	if (ld_word(dir + LDIR_FstClusLO) != 0) return 0;	/* Check LDIR_FstClusLO */
 800524e:	683b      	ldr	r3, [r7, #0]
 8005250:	331a      	adds	r3, #26
 8005252:	4618      	mov	r0, r3
 8005254:	f7fe ff88 	bl	8004168 <ld_word>
 8005258:	4603      	mov	r3, r0
 800525a:	2b00      	cmp	r3, #0
 800525c:	d001      	beq.n	8005262 <cmp_lfn+0x1e>
 800525e:	2300      	movs	r3, #0
 8005260:	e059      	b.n	8005316 <cmp_lfn+0xd2>

	i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13;	/* Offset in the LFN buffer */
 8005262:	683b      	ldr	r3, [r7, #0]
 8005264:	781b      	ldrb	r3, [r3, #0]
 8005266:	f003 033f 	and.w	r3, r3, #63	; 0x3f
 800526a:	1e5a      	subs	r2, r3, #1
 800526c:	4613      	mov	r3, r2
 800526e:	005b      	lsls	r3, r3, #1
 8005270:	4413      	add	r3, r2
 8005272:	009b      	lsls	r3, r3, #2
 8005274:	4413      	add	r3, r2
 8005276:	617b      	str	r3, [r7, #20]

	for (wc = 1, s = 0; s < 13; s++) {		/* Process all characters in the entry */
 8005278:	2301      	movs	r3, #1
 800527a:	81fb      	strh	r3, [r7, #14]
 800527c:	2300      	movs	r3, #0
 800527e:	613b      	str	r3, [r7, #16]
 8005280:	e033      	b.n	80052ea <cmp_lfn+0xa6>
		uc = ld_word(dir + LfnOfs[s]);		/* Pick an LFN character */
 8005282:	4a27      	ldr	r2, [pc, #156]	; (8005320 <cmp_lfn+0xdc>)
 8005284:	693b      	ldr	r3, [r7, #16]
 8005286:	4413      	add	r3, r2
 8005288:	781b      	ldrb	r3, [r3, #0]
 800528a:	461a      	mov	r2, r3
 800528c:	683b      	ldr	r3, [r7, #0]
 800528e:	4413      	add	r3, r2
 8005290:	4618      	mov	r0, r3
 8005292:	f7fe ff69 	bl	8004168 <ld_word>
 8005296:	4603      	mov	r3, r0
 8005298:	81bb      	strh	r3, [r7, #12]
		if (wc) {
 800529a:	89fb      	ldrh	r3, [r7, #14]
 800529c:	2b00      	cmp	r3, #0
 800529e:	d01a      	beq.n	80052d6 <cmp_lfn+0x92>
			if (i >= _MAX_LFN || ff_wtoupper(uc) != ff_wtoupper(lfnbuf[i++])) {	/* Compare it */
 80052a0:	697b      	ldr	r3, [r7, #20]
 80052a2:	2bfe      	cmp	r3, #254	; 0xfe
 80052a4:	d812      	bhi.n	80052cc <cmp_lfn+0x88>
 80052a6:	89bb      	ldrh	r3, [r7, #12]
 80052a8:	4618      	mov	r0, r3
 80052aa:	f001 fe13 	bl	8006ed4 <ff_wtoupper>
 80052ae:	4603      	mov	r3, r0
 80052b0:	461c      	mov	r4, r3
 80052b2:	697b      	ldr	r3, [r7, #20]
 80052b4:	1c5a      	adds	r2, r3, #1
 80052b6:	617a      	str	r2, [r7, #20]
 80052b8:	005b      	lsls	r3, r3, #1
 80052ba:	687a      	ldr	r2, [r7, #4]
 80052bc:	4413      	add	r3, r2
 80052be:	881b      	ldrh	r3, [r3, #0]
 80052c0:	4618      	mov	r0, r3
 80052c2:	f001 fe07 	bl	8006ed4 <ff_wtoupper>
 80052c6:	4603      	mov	r3, r0
 80052c8:	429c      	cmp	r4, r3
 80052ca:	d001      	beq.n	80052d0 <cmp_lfn+0x8c>
				return 0;					/* Not matched */
 80052cc:	2300      	movs	r3, #0
 80052ce:	e022      	b.n	8005316 <cmp_lfn+0xd2>
			}
			wc = uc;
 80052d0:	89bb      	ldrh	r3, [r7, #12]
 80052d2:	81fb      	strh	r3, [r7, #14]
 80052d4:	e006      	b.n	80052e4 <cmp_lfn+0xa0>
		} else {
			if (uc != 0xFFFF) return 0;		/* Check filler */
 80052d6:	89bb      	ldrh	r3, [r7, #12]
 80052d8:	f64f 72ff 	movw	r2, #65535	; 0xffff
 80052dc:	4293      	cmp	r3, r2
 80052de:	d001      	beq.n	80052e4 <cmp_lfn+0xa0>
 80052e0:	2300      	movs	r3, #0
 80052e2:	e018      	b.n	8005316 <cmp_lfn+0xd2>
	for (wc = 1, s = 0; s < 13; s++) {		/* Process all characters in the entry */
 80052e4:	693b      	ldr	r3, [r7, #16]
 80052e6:	3301      	adds	r3, #1
 80052e8:	613b      	str	r3, [r7, #16]
 80052ea:	693b      	ldr	r3, [r7, #16]
 80052ec:	2b0c      	cmp	r3, #12
 80052ee:	d9c8      	bls.n	8005282 <cmp_lfn+0x3e>
		}
	}

	if ((dir[LDIR_Ord] & LLEF) && wc && lfnbuf[i]) return 0;	/* Last segment matched but different length */
 80052f0:	683b      	ldr	r3, [r7, #0]
 80052f2:	781b      	ldrb	r3, [r3, #0]
 80052f4:	f003 0340 	and.w	r3, r3, #64	; 0x40
 80052f8:	2b00      	cmp	r3, #0
 80052fa:	d00b      	beq.n	8005314 <cmp_lfn+0xd0>
 80052fc:	89fb      	ldrh	r3, [r7, #14]
 80052fe:	2b00      	cmp	r3, #0
 8005300:	d008      	beq.n	8005314 <cmp_lfn+0xd0>
 8005302:	697b      	ldr	r3, [r7, #20]
 8005304:	005b      	lsls	r3, r3, #1
 8005306:	687a      	ldr	r2, [r7, #4]
 8005308:	4413      	add	r3, r2
 800530a:	881b      	ldrh	r3, [r3, #0]
 800530c:	2b00      	cmp	r3, #0
 800530e:	d001      	beq.n	8005314 <cmp_lfn+0xd0>
 8005310:	2300      	movs	r3, #0
 8005312:	e000      	b.n	8005316 <cmp_lfn+0xd2>

	return 1;		/* The part of LFN matched */
 8005314:	2301      	movs	r3, #1
}
 8005316:	4618      	mov	r0, r3
 8005318:	371c      	adds	r7, #28
 800531a:	46bd      	mov	sp, r7
 800531c:	bd90      	pop	{r4, r7, pc}
 800531e:	bf00      	nop
 8005320:	080071f4 	.word	0x080071f4

08005324 <put_lfn>:
	const WCHAR* lfn,	/* Pointer to the LFN */
	BYTE* dir,			/* Pointer to the LFN entry to be created */
	BYTE ord,			/* LFN order (1-20) */
	BYTE sum			/* Checksum of the corresponding SFN */
)
{
 8005324:	b580      	push	{r7, lr}
 8005326:	b088      	sub	sp, #32
 8005328:	af00      	add	r7, sp, #0
 800532a:	60f8      	str	r0, [r7, #12]
 800532c:	60b9      	str	r1, [r7, #8]
 800532e:	4611      	mov	r1, r2
 8005330:	461a      	mov	r2, r3
 8005332:	460b      	mov	r3, r1
 8005334:	71fb      	strb	r3, [r7, #7]
 8005336:	4613      	mov	r3, r2
 8005338:	71bb      	strb	r3, [r7, #6]
	UINT i, s;
	WCHAR wc;


	dir[LDIR_Chksum] = sum;			/* Set checksum */
 800533a:	68bb      	ldr	r3, [r7, #8]
 800533c:	330d      	adds	r3, #13
 800533e:	79ba      	ldrb	r2, [r7, #6]
 8005340:	701a      	strb	r2, [r3, #0]
	dir[LDIR_Attr] = AM_LFN;		/* Set attribute. LFN entry */
 8005342:	68bb      	ldr	r3, [r7, #8]
 8005344:	330b      	adds	r3, #11
 8005346:	220f      	movs	r2, #15
 8005348:	701a      	strb	r2, [r3, #0]
	dir[LDIR_Type] = 0;
 800534a:	68bb      	ldr	r3, [r7, #8]
 800534c:	330c      	adds	r3, #12
 800534e:	2200      	movs	r2, #0
 8005350:	701a      	strb	r2, [r3, #0]
	st_word(dir + LDIR_FstClusLO, 0);
 8005352:	68bb      	ldr	r3, [r7, #8]
 8005354:	331a      	adds	r3, #26
 8005356:	2100      	movs	r1, #0
 8005358:	4618      	mov	r0, r3
 800535a:	f7fe ff40 	bl	80041de <st_word>

	i = (ord - 1) * 13;				/* Get offset in the LFN working buffer */
 800535e:	79fb      	ldrb	r3, [r7, #7]
 8005360:	1e5a      	subs	r2, r3, #1
 8005362:	4613      	mov	r3, r2
 8005364:	005b      	lsls	r3, r3, #1
 8005366:	4413      	add	r3, r2
 8005368:	009b      	lsls	r3, r3, #2
 800536a:	4413      	add	r3, r2
 800536c:	61fb      	str	r3, [r7, #28]
	s = wc = 0;
 800536e:	2300      	movs	r3, #0
 8005370:	82fb      	strh	r3, [r7, #22]
 8005372:	2300      	movs	r3, #0
 8005374:	61bb      	str	r3, [r7, #24]
	do {
		if (wc != 0xFFFF) wc = lfn[i++];	/* Get an effective character */
 8005376:	8afb      	ldrh	r3, [r7, #22]
 8005378:	f64f 72ff 	movw	r2, #65535	; 0xffff
 800537c:	4293      	cmp	r3, r2
 800537e:	d007      	beq.n	8005390 <put_lfn+0x6c>
 8005380:	69fb      	ldr	r3, [r7, #28]
 8005382:	1c5a      	adds	r2, r3, #1
 8005384:	61fa      	str	r2, [r7, #28]
 8005386:	005b      	lsls	r3, r3, #1
 8005388:	68fa      	ldr	r2, [r7, #12]
 800538a:	4413      	add	r3, r2
 800538c:	881b      	ldrh	r3, [r3, #0]
 800538e:	82fb      	strh	r3, [r7, #22]
		st_word(dir + LfnOfs[s], wc);		/* Put it */
 8005390:	4a17      	ldr	r2, [pc, #92]	; (80053f0 <put_lfn+0xcc>)
 8005392:	69bb      	ldr	r3, [r7, #24]
 8005394:	4413      	add	r3, r2
 8005396:	781b      	ldrb	r3, [r3, #0]
 8005398:	461a      	mov	r2, r3
 800539a:	68bb      	ldr	r3, [r7, #8]
 800539c:	4413      	add	r3, r2
 800539e:	8afa      	ldrh	r2, [r7, #22]
 80053a0:	4611      	mov	r1, r2
 80053a2:	4618      	mov	r0, r3
 80053a4:	f7fe ff1b 	bl	80041de <st_word>
		if (wc == 0) wc = 0xFFFF;		/* Padding characters for left locations */
 80053a8:	8afb      	ldrh	r3, [r7, #22]
 80053aa:	2b00      	cmp	r3, #0
 80053ac:	d102      	bne.n	80053b4 <put_lfn+0x90>
 80053ae:	f64f 73ff 	movw	r3, #65535	; 0xffff
 80053b2:	82fb      	strh	r3, [r7, #22]
	} while (++s < 13);
 80053b4:	69bb      	ldr	r3, [r7, #24]
 80053b6:	3301      	adds	r3, #1
 80053b8:	61bb      	str	r3, [r7, #24]
 80053ba:	69bb      	ldr	r3, [r7, #24]
 80053bc:	2b0c      	cmp	r3, #12
 80053be:	d9da      	bls.n	8005376 <put_lfn+0x52>
	if (wc == 0xFFFF || !lfn[i]) ord |= LLEF;	/* Last LFN part is the start of LFN sequence */
 80053c0:	8afb      	ldrh	r3, [r7, #22]
 80053c2:	f64f 72ff 	movw	r2, #65535	; 0xffff
 80053c6:	4293      	cmp	r3, r2
 80053c8:	d006      	beq.n	80053d8 <put_lfn+0xb4>
 80053ca:	69fb      	ldr	r3, [r7, #28]
 80053cc:	005b      	lsls	r3, r3, #1
 80053ce:	68fa      	ldr	r2, [r7, #12]
 80053d0:	4413      	add	r3, r2
 80053d2:	881b      	ldrh	r3, [r3, #0]
 80053d4:	2b00      	cmp	r3, #0
 80053d6:	d103      	bne.n	80053e0 <put_lfn+0xbc>
 80053d8:	79fb      	ldrb	r3, [r7, #7]
 80053da:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 80053de:	71fb      	strb	r3, [r7, #7]
	dir[LDIR_Ord] = ord;			/* Set the LFN order */
 80053e0:	68bb      	ldr	r3, [r7, #8]
 80053e2:	79fa      	ldrb	r2, [r7, #7]
 80053e4:	701a      	strb	r2, [r3, #0]
}
 80053e6:	bf00      	nop
 80053e8:	3720      	adds	r7, #32
 80053ea:	46bd      	mov	sp, r7
 80053ec:	bd80      	pop	{r7, pc}
 80053ee:	bf00      	nop
 80053f0:	080071f4 	.word	0x080071f4

080053f4 <gen_numname>:
	BYTE* dst,			/* Pointer to the buffer to store numbered SFN */
	const BYTE* src,	/* Pointer to SFN */
	const WCHAR* lfn,	/* Pointer to LFN */
	UINT seq			/* Sequence number */
)
{
 80053f4:	b580      	push	{r7, lr}
 80053f6:	b08c      	sub	sp, #48	; 0x30
 80053f8:	af00      	add	r7, sp, #0
 80053fa:	60f8      	str	r0, [r7, #12]
 80053fc:	60b9      	str	r1, [r7, #8]
 80053fe:	607a      	str	r2, [r7, #4]
 8005400:	603b      	str	r3, [r7, #0]
	UINT i, j;
	WCHAR wc;
	DWORD sr;


	mem_cpy(dst, src, 11);
 8005402:	220b      	movs	r2, #11
 8005404:	68b9      	ldr	r1, [r7, #8]
 8005406:	68f8      	ldr	r0, [r7, #12]
 8005408:	f7fe ff30 	bl	800426c <mem_cpy>

	if (seq > 5) {	/* In case of many collisions, generate a hash number instead of sequential number */
 800540c:	683b      	ldr	r3, [r7, #0]
 800540e:	2b05      	cmp	r3, #5
 8005410:	d92b      	bls.n	800546a <gen_numname+0x76>
		sr = seq;
 8005412:	683b      	ldr	r3, [r7, #0]
 8005414:	61fb      	str	r3, [r7, #28]
		while (*lfn) {	/* Create a CRC */
 8005416:	e022      	b.n	800545e <gen_numname+0x6a>
			wc = *lfn++;
 8005418:	687b      	ldr	r3, [r7, #4]
 800541a:	1c9a      	adds	r2, r3, #2
 800541c:	607a      	str	r2, [r7, #4]
 800541e:	881b      	ldrh	r3, [r3, #0]
 8005420:	847b      	strh	r3, [r7, #34]	; 0x22
			for (i = 0; i < 16; i++) {
 8005422:	2300      	movs	r3, #0
 8005424:	62bb      	str	r3, [r7, #40]	; 0x28
 8005426:	e017      	b.n	8005458 <gen_numname+0x64>
				sr = (sr << 1) + (wc & 1);
 8005428:	69fb      	ldr	r3, [r7, #28]
 800542a:	005a      	lsls	r2, r3, #1
 800542c:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
 800542e:	f003 0301 	and.w	r3, r3, #1
 8005432:	4413      	add	r3, r2
 8005434:	61fb      	str	r3, [r7, #28]
				wc >>= 1;
 8005436:	8c7b      	ldrh	r3, [r7, #34]	; 0x22
 8005438:	085b      	lsrs	r3, r3, #1
 800543a:	847b      	strh	r3, [r7, #34]	; 0x22
				if (sr & 0x10000) sr ^= 0x11021;
 800543c:	69fb      	ldr	r3, [r7, #28]
 800543e:	f403 3380 	and.w	r3, r3, #65536	; 0x10000
 8005442:	2b00      	cmp	r3, #0
 8005444:	d005      	beq.n	8005452 <gen_numname+0x5e>
 8005446:	69fb      	ldr	r3, [r7, #28]
 8005448:	f483 3388 	eor.w	r3, r3, #69632	; 0x11000
 800544c:	f083 0321 	eor.w	r3, r3, #33	; 0x21
 8005450:	61fb      	str	r3, [r7, #28]
			for (i = 0; i < 16; i++) {
 8005452:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8005454:	3301      	adds	r3, #1
 8005456:	62bb      	str	r3, [r7, #40]	; 0x28
 8005458:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800545a:	2b0f      	cmp	r3, #15
 800545c:	d9e4      	bls.n	8005428 <gen_numname+0x34>
		while (*lfn) {	/* Create a CRC */
 800545e:	687b      	ldr	r3, [r7, #4]
 8005460:	881b      	ldrh	r3, [r3, #0]
 8005462:	2b00      	cmp	r3, #0
 8005464:	d1d8      	bne.n	8005418 <gen_numname+0x24>
			}
		}
		seq = (UINT)sr;
 8005466:	69fb      	ldr	r3, [r7, #28]
 8005468:	603b      	str	r3, [r7, #0]
	}

	/* itoa (hexdecimal) */
	i = 7;
 800546a:	2307      	movs	r3, #7
 800546c:	62bb      	str	r3, [r7, #40]	; 0x28
	do {
		c = (BYTE)((seq % 16) + '0');
 800546e:	683b      	ldr	r3, [r7, #0]
 8005470:	b2db      	uxtb	r3, r3
 8005472:	f003 030f 	and.w	r3, r3, #15
 8005476:	b2db      	uxtb	r3, r3
 8005478:	3330      	adds	r3, #48	; 0x30
 800547a:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
		if (c > '9') c += 7;
 800547e:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8005482:	2b39      	cmp	r3, #57	; 0x39
 8005484:	d904      	bls.n	8005490 <gen_numname+0x9c>
 8005486:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 800548a:	3307      	adds	r3, #7
 800548c:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
		ns[i--] = c;
 8005490:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8005492:	1e5a      	subs	r2, r3, #1
 8005494:	62ba      	str	r2, [r7, #40]	; 0x28
 8005496:	f107 0230 	add.w	r2, r7, #48	; 0x30
 800549a:	4413      	add	r3, r2
 800549c:	f897 202f 	ldrb.w	r2, [r7, #47]	; 0x2f
 80054a0:	f803 2c1c 	strb.w	r2, [r3, #-28]
		seq /= 16;
 80054a4:	683b      	ldr	r3, [r7, #0]
 80054a6:	091b      	lsrs	r3, r3, #4
 80054a8:	603b      	str	r3, [r7, #0]
	} while (seq);
 80054aa:	683b      	ldr	r3, [r7, #0]
 80054ac:	2b00      	cmp	r3, #0
 80054ae:	d1de      	bne.n	800546e <gen_numname+0x7a>
	ns[i] = '~';
 80054b0:	f107 0214 	add.w	r2, r7, #20
 80054b4:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80054b6:	4413      	add	r3, r2
 80054b8:	227e      	movs	r2, #126	; 0x7e
 80054ba:	701a      	strb	r2, [r3, #0]

	/* Append the number */
	for (j = 0; j < i && dst[j] != ' '; j++) {
 80054bc:	2300      	movs	r3, #0
 80054be:	627b      	str	r3, [r7, #36]	; 0x24
 80054c0:	e002      	b.n	80054c8 <gen_numname+0xd4>
 80054c2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80054c4:	3301      	adds	r3, #1
 80054c6:	627b      	str	r3, [r7, #36]	; 0x24
 80054c8:	6a7a      	ldr	r2, [r7, #36]	; 0x24
 80054ca:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80054cc:	429a      	cmp	r2, r3
 80054ce:	d205      	bcs.n	80054dc <gen_numname+0xe8>
 80054d0:	68fa      	ldr	r2, [r7, #12]
 80054d2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80054d4:	4413      	add	r3, r2
 80054d6:	781b      	ldrb	r3, [r3, #0]
 80054d8:	2b20      	cmp	r3, #32
 80054da:	d1f2      	bne.n	80054c2 <gen_numname+0xce>
			if (j == i - 1) break;
			j++;
		}
	}
	do {
		dst[j++] = (i < 8) ? ns[i++] : ' ';
 80054dc:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80054de:	2b07      	cmp	r3, #7
 80054e0:	d808      	bhi.n	80054f4 <gen_numname+0x100>
 80054e2:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80054e4:	1c5a      	adds	r2, r3, #1
 80054e6:	62ba      	str	r2, [r7, #40]	; 0x28
 80054e8:	f107 0230 	add.w	r2, r7, #48	; 0x30
 80054ec:	4413      	add	r3, r2
 80054ee:	f813 1c1c 	ldrb.w	r1, [r3, #-28]
 80054f2:	e000      	b.n	80054f6 <gen_numname+0x102>
 80054f4:	2120      	movs	r1, #32
 80054f6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80054f8:	1c5a      	adds	r2, r3, #1
 80054fa:	627a      	str	r2, [r7, #36]	; 0x24
 80054fc:	68fa      	ldr	r2, [r7, #12]
 80054fe:	4413      	add	r3, r2
 8005500:	460a      	mov	r2, r1
 8005502:	701a      	strb	r2, [r3, #0]
	} while (j < 8);
 8005504:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8005506:	2b07      	cmp	r3, #7
 8005508:	d9e8      	bls.n	80054dc <gen_numname+0xe8>
}
 800550a:	bf00      	nop
 800550c:	3730      	adds	r7, #48	; 0x30
 800550e:	46bd      	mov	sp, r7
 8005510:	bd80      	pop	{r7, pc}

08005512 <sum_sfn>:

static
BYTE sum_sfn (
	const BYTE* dir		/* Pointer to the SFN entry */
)
{
 8005512:	b480      	push	{r7}
 8005514:	b085      	sub	sp, #20
 8005516:	af00      	add	r7, sp, #0
 8005518:	6078      	str	r0, [r7, #4]
	BYTE sum = 0;
 800551a:	2300      	movs	r3, #0
 800551c:	73fb      	strb	r3, [r7, #15]
	UINT n = 11;
 800551e:	230b      	movs	r3, #11
 8005520:	60bb      	str	r3, [r7, #8]

	do {
		sum = (sum >> 1) + (sum << 7) + *dir++;
 8005522:	7bfb      	ldrb	r3, [r7, #15]
 8005524:	b2da      	uxtb	r2, r3
 8005526:	0852      	lsrs	r2, r2, #1
 8005528:	01db      	lsls	r3, r3, #7
 800552a:	4313      	orrs	r3, r2
 800552c:	b2da      	uxtb	r2, r3
 800552e:	687b      	ldr	r3, [r7, #4]
 8005530:	1c59      	adds	r1, r3, #1
 8005532:	6079      	str	r1, [r7, #4]
 8005534:	781b      	ldrb	r3, [r3, #0]
 8005536:	4413      	add	r3, r2
 8005538:	73fb      	strb	r3, [r7, #15]
	} while (--n);
 800553a:	68bb      	ldr	r3, [r7, #8]
 800553c:	3b01      	subs	r3, #1
 800553e:	60bb      	str	r3, [r7, #8]
 8005540:	68bb      	ldr	r3, [r7, #8]
 8005542:	2b00      	cmp	r3, #0
 8005544:	d1ed      	bne.n	8005522 <sum_sfn+0x10>
	return sum;
 8005546:	7bfb      	ldrb	r3, [r7, #15]
}
 8005548:	4618      	mov	r0, r3
 800554a:	3714      	adds	r7, #20
 800554c:	46bd      	mov	sp, r7
 800554e:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005552:	4770      	bx	lr

08005554 <dir_find>:

static
FRESULT dir_find (	/* FR_OK(0):succeeded, !=0:error */
	DIR* dp			/* Pointer to the directory object with the file name */
)
{
 8005554:	b580      	push	{r7, lr}
 8005556:	b086      	sub	sp, #24
 8005558:	af00      	add	r7, sp, #0
 800555a:	6078      	str	r0, [r7, #4]
	FRESULT res;
	FATFS *fs = dp->obj.fs;
 800555c:	687b      	ldr	r3, [r7, #4]
 800555e:	681b      	ldr	r3, [r3, #0]
 8005560:	613b      	str	r3, [r7, #16]
	BYTE c;
#if _USE_LFN != 0
	BYTE a, ord, sum;
#endif

	res = dir_sdi(dp, 0);			/* Rewind directory object */
 8005562:	2100      	movs	r1, #0
 8005564:	6878      	ldr	r0, [r7, #4]
 8005566:	f7ff fc88 	bl	8004e7a <dir_sdi>
 800556a:	4603      	mov	r3, r0
 800556c:	75fb      	strb	r3, [r7, #23]
	if (res != FR_OK) return res;
 800556e:	7dfb      	ldrb	r3, [r7, #23]
 8005570:	2b00      	cmp	r3, #0
 8005572:	d001      	beq.n	8005578 <dir_find+0x24>
 8005574:	7dfb      	ldrb	r3, [r7, #23]
 8005576:	e0a9      	b.n	80056cc <dir_find+0x178>
		return res;
	}
#endif
	/* On the FAT12/16/32 volume */
#if _USE_LFN != 0
	ord = sum = 0xFF; dp->blk_ofs = 0xFFFFFFFF;	/* Reset LFN sequence */
 8005578:	23ff      	movs	r3, #255	; 0xff
 800557a:	753b      	strb	r3, [r7, #20]
 800557c:	7d3b      	ldrb	r3, [r7, #20]
 800557e:	757b      	strb	r3, [r7, #21]
 8005580:	687b      	ldr	r3, [r7, #4]
 8005582:	f04f 32ff 	mov.w	r2, #4294967295
 8005586:	631a      	str	r2, [r3, #48]	; 0x30
#endif
	do {
		res = move_window(fs, dp->sect);
 8005588:	687b      	ldr	r3, [r7, #4]
 800558a:	69db      	ldr	r3, [r3, #28]
 800558c:	4619      	mov	r1, r3
 800558e:	6938      	ldr	r0, [r7, #16]
 8005590:	f7ff f89a 	bl	80046c8 <move_window>
 8005594:	4603      	mov	r3, r0
 8005596:	75fb      	strb	r3, [r7, #23]
		if (res != FR_OK) break;
 8005598:	7dfb      	ldrb	r3, [r7, #23]
 800559a:	2b00      	cmp	r3, #0
 800559c:	f040 8090 	bne.w	80056c0 <dir_find+0x16c>
		c = dp->dir[DIR_Name];
 80055a0:	687b      	ldr	r3, [r7, #4]
 80055a2:	6a1b      	ldr	r3, [r3, #32]
 80055a4:	781b      	ldrb	r3, [r3, #0]
 80055a6:	75bb      	strb	r3, [r7, #22]
		if (c == 0) { res = FR_NO_FILE; break; }	/* Reached to end of table */
 80055a8:	7dbb      	ldrb	r3, [r7, #22]
 80055aa:	2b00      	cmp	r3, #0
 80055ac:	d102      	bne.n	80055b4 <dir_find+0x60>
 80055ae:	2304      	movs	r3, #4
 80055b0:	75fb      	strb	r3, [r7, #23]
 80055b2:	e08a      	b.n	80056ca <dir_find+0x176>
#if _USE_LFN != 0	/* LFN configuration */
		dp->obj.attr = a = dp->dir[DIR_Attr] & AM_MASK;
 80055b4:	687b      	ldr	r3, [r7, #4]
 80055b6:	6a1b      	ldr	r3, [r3, #32]
 80055b8:	330b      	adds	r3, #11
 80055ba:	781b      	ldrb	r3, [r3, #0]
 80055bc:	f003 033f 	and.w	r3, r3, #63	; 0x3f
 80055c0:	73fb      	strb	r3, [r7, #15]
 80055c2:	687b      	ldr	r3, [r7, #4]
 80055c4:	7bfa      	ldrb	r2, [r7, #15]
 80055c6:	719a      	strb	r2, [r3, #6]
		if (c == DDEM || ((a & AM_VOL) && a != AM_LFN)) {	/* An entry without valid data */
 80055c8:	7dbb      	ldrb	r3, [r7, #22]
 80055ca:	2be5      	cmp	r3, #229	; 0xe5
 80055cc:	d007      	beq.n	80055de <dir_find+0x8a>
 80055ce:	7bfb      	ldrb	r3, [r7, #15]
 80055d0:	f003 0308 	and.w	r3, r3, #8
 80055d4:	2b00      	cmp	r3, #0
 80055d6:	d009      	beq.n	80055ec <dir_find+0x98>
 80055d8:	7bfb      	ldrb	r3, [r7, #15]
 80055da:	2b0f      	cmp	r3, #15
 80055dc:	d006      	beq.n	80055ec <dir_find+0x98>
			ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF;	/* Reset LFN sequence */
 80055de:	23ff      	movs	r3, #255	; 0xff
 80055e0:	757b      	strb	r3, [r7, #21]
 80055e2:	687b      	ldr	r3, [r7, #4]
 80055e4:	f04f 32ff 	mov.w	r2, #4294967295
 80055e8:	631a      	str	r2, [r3, #48]	; 0x30
 80055ea:	e05e      	b.n	80056aa <dir_find+0x156>
		} else {
			if (a == AM_LFN) {			/* An LFN entry is found */
 80055ec:	7bfb      	ldrb	r3, [r7, #15]
 80055ee:	2b0f      	cmp	r3, #15
 80055f0:	d136      	bne.n	8005660 <dir_find+0x10c>
				if (!(dp->fn[NSFLAG] & NS_NOLFN)) {
 80055f2:	687b      	ldr	r3, [r7, #4]
 80055f4:	f893 302f 	ldrb.w	r3, [r3, #47]	; 0x2f
 80055f8:	f003 0340 	and.w	r3, r3, #64	; 0x40
 80055fc:	2b00      	cmp	r3, #0
 80055fe:	d154      	bne.n	80056aa <dir_find+0x156>
					if (c & LLEF) {		/* Is it start of LFN sequence? */
 8005600:	7dbb      	ldrb	r3, [r7, #22]
 8005602:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8005606:	2b00      	cmp	r3, #0
 8005608:	d00d      	beq.n	8005626 <dir_find+0xd2>
						sum = dp->dir[LDIR_Chksum];
 800560a:	687b      	ldr	r3, [r7, #4]
 800560c:	6a1b      	ldr	r3, [r3, #32]
 800560e:	7b5b      	ldrb	r3, [r3, #13]
 8005610:	753b      	strb	r3, [r7, #20]
						c &= (BYTE)~LLEF; ord = c;	/* LFN start order */
 8005612:	7dbb      	ldrb	r3, [r7, #22]
 8005614:	f023 0340 	bic.w	r3, r3, #64	; 0x40
 8005618:	75bb      	strb	r3, [r7, #22]
 800561a:	7dbb      	ldrb	r3, [r7, #22]
 800561c:	757b      	strb	r3, [r7, #21]
						dp->blk_ofs = dp->dptr;	/* Start offset of LFN */
 800561e:	687b      	ldr	r3, [r7, #4]
 8005620:	695a      	ldr	r2, [r3, #20]
 8005622:	687b      	ldr	r3, [r7, #4]
 8005624:	631a      	str	r2, [r3, #48]	; 0x30
					}
					/* Check validity of the LFN entry and compare it with given name */
					ord = (c == ord && sum == dp->dir[LDIR_Chksum] && cmp_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF;
 8005626:	7dba      	ldrb	r2, [r7, #22]
 8005628:	7d7b      	ldrb	r3, [r7, #21]
 800562a:	429a      	cmp	r2, r3
 800562c:	d115      	bne.n	800565a <dir_find+0x106>
 800562e:	687b      	ldr	r3, [r7, #4]
 8005630:	6a1b      	ldr	r3, [r3, #32]
 8005632:	330d      	adds	r3, #13
 8005634:	781b      	ldrb	r3, [r3, #0]
 8005636:	7d3a      	ldrb	r2, [r7, #20]
 8005638:	429a      	cmp	r2, r3
 800563a:	d10e      	bne.n	800565a <dir_find+0x106>
 800563c:	693b      	ldr	r3, [r7, #16]
 800563e:	691a      	ldr	r2, [r3, #16]
 8005640:	687b      	ldr	r3, [r7, #4]
 8005642:	6a1b      	ldr	r3, [r3, #32]
 8005644:	4619      	mov	r1, r3
 8005646:	4610      	mov	r0, r2
 8005648:	f7ff fdfc 	bl	8005244 <cmp_lfn>
 800564c:	4603      	mov	r3, r0
 800564e:	2b00      	cmp	r3, #0
 8005650:	d003      	beq.n	800565a <dir_find+0x106>
 8005652:	7d7b      	ldrb	r3, [r7, #21]
 8005654:	3b01      	subs	r3, #1
 8005656:	b2db      	uxtb	r3, r3
 8005658:	e000      	b.n	800565c <dir_find+0x108>
 800565a:	23ff      	movs	r3, #255	; 0xff
 800565c:	757b      	strb	r3, [r7, #21]
 800565e:	e024      	b.n	80056aa <dir_find+0x156>
				}
			} else {					/* An SFN entry is found */
				if (!ord && sum == sum_sfn(dp->dir)) break;	/* LFN matched? */
 8005660:	7d7b      	ldrb	r3, [r7, #21]
 8005662:	2b00      	cmp	r3, #0
 8005664:	d109      	bne.n	800567a <dir_find+0x126>
 8005666:	687b      	ldr	r3, [r7, #4]
 8005668:	6a1b      	ldr	r3, [r3, #32]
 800566a:	4618      	mov	r0, r3
 800566c:	f7ff ff51 	bl	8005512 <sum_sfn>
 8005670:	4603      	mov	r3, r0
 8005672:	461a      	mov	r2, r3
 8005674:	7d3b      	ldrb	r3, [r7, #20]
 8005676:	4293      	cmp	r3, r2
 8005678:	d024      	beq.n	80056c4 <dir_find+0x170>
				if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break;	/* SFN matched? */
 800567a:	687b      	ldr	r3, [r7, #4]
 800567c:	f893 302f 	ldrb.w	r3, [r3, #47]	; 0x2f
 8005680:	f003 0301 	and.w	r3, r3, #1
 8005684:	2b00      	cmp	r3, #0
 8005686:	d10a      	bne.n	800569e <dir_find+0x14a>
 8005688:	687b      	ldr	r3, [r7, #4]
 800568a:	6a18      	ldr	r0, [r3, #32]
 800568c:	687b      	ldr	r3, [r7, #4]
 800568e:	3324      	adds	r3, #36	; 0x24
 8005690:	220b      	movs	r2, #11
 8005692:	4619      	mov	r1, r3
 8005694:	f7fe fe25 	bl	80042e2 <mem_cmp>
 8005698:	4603      	mov	r3, r0
 800569a:	2b00      	cmp	r3, #0
 800569c:	d014      	beq.n	80056c8 <dir_find+0x174>
				ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF;	/* Reset LFN sequence */
 800569e:	23ff      	movs	r3, #255	; 0xff
 80056a0:	757b      	strb	r3, [r7, #21]
 80056a2:	687b      	ldr	r3, [r7, #4]
 80056a4:	f04f 32ff 	mov.w	r2, #4294967295
 80056a8:	631a      	str	r2, [r3, #48]	; 0x30
		}
#else		/* Non LFN configuration */
		dp->obj.attr = dp->dir[DIR_Attr] & AM_MASK;
		if (!(dp->dir[DIR_Attr] & AM_VOL) && !mem_cmp(dp->dir, dp->fn, 11)) break;	/* Is it a valid entry? */
#endif
		res = dir_next(dp, 0);	/* Next entry */
 80056aa:	2100      	movs	r1, #0
 80056ac:	6878      	ldr	r0, [r7, #4]
 80056ae:	f7ff fc6d 	bl	8004f8c <dir_next>
 80056b2:	4603      	mov	r3, r0
 80056b4:	75fb      	strb	r3, [r7, #23]
	} while (res == FR_OK);
 80056b6:	7dfb      	ldrb	r3, [r7, #23]
 80056b8:	2b00      	cmp	r3, #0
 80056ba:	f43f af65 	beq.w	8005588 <dir_find+0x34>
 80056be:	e004      	b.n	80056ca <dir_find+0x176>
		if (res != FR_OK) break;
 80056c0:	bf00      	nop
 80056c2:	e002      	b.n	80056ca <dir_find+0x176>
				if (!ord && sum == sum_sfn(dp->dir)) break;	/* LFN matched? */
 80056c4:	bf00      	nop
 80056c6:	e000      	b.n	80056ca <dir_find+0x176>
				if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break;	/* SFN matched? */
 80056c8:	bf00      	nop

	return res;
 80056ca:	7dfb      	ldrb	r3, [r7, #23]
}
 80056cc:	4618      	mov	r0, r3
 80056ce:	3718      	adds	r7, #24
 80056d0:	46bd      	mov	sp, r7
 80056d2:	bd80      	pop	{r7, pc}

080056d4 <dir_register>:

static
FRESULT dir_register (	/* FR_OK:succeeded, FR_DENIED:no free entry or too many SFN collision, FR_DISK_ERR:disk error */
	DIR* dp				/* Target directory with object name to be created */
)
{
 80056d4:	b580      	push	{r7, lr}
 80056d6:	b08c      	sub	sp, #48	; 0x30
 80056d8:	af00      	add	r7, sp, #0
 80056da:	6078      	str	r0, [r7, #4]
	FRESULT res;
	FATFS *fs = dp->obj.fs;
 80056dc:	687b      	ldr	r3, [r7, #4]
 80056de:	681b      	ldr	r3, [r3, #0]
 80056e0:	61fb      	str	r3, [r7, #28]
#if _USE_LFN != 0	/* LFN configuration */
	UINT n, nlen, nent;
	BYTE sn[12], sum;


	if (dp->fn[NSFLAG] & (NS_DOT | NS_NONAME)) return FR_INVALID_NAME;	/* Check name validity */
 80056e2:	687b      	ldr	r3, [r7, #4]
 80056e4:	f893 302f 	ldrb.w	r3, [r3, #47]	; 0x2f
 80056e8:	f003 03a0 	and.w	r3, r3, #160	; 0xa0
 80056ec:	2b00      	cmp	r3, #0
 80056ee:	d001      	beq.n	80056f4 <dir_register+0x20>
 80056f0:	2306      	movs	r3, #6
 80056f2:	e0e0      	b.n	80058b6 <dir_register+0x1e2>
	for (nlen = 0; fs->lfnbuf[nlen]; nlen++) ;	/* Get lfn length */
 80056f4:	2300      	movs	r3, #0
 80056f6:	627b      	str	r3, [r7, #36]	; 0x24
 80056f8:	e002      	b.n	8005700 <dir_register+0x2c>
 80056fa:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80056fc:	3301      	adds	r3, #1
 80056fe:	627b      	str	r3, [r7, #36]	; 0x24
 8005700:	69fb      	ldr	r3, [r7, #28]
 8005702:	691a      	ldr	r2, [r3, #16]
 8005704:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8005706:	005b      	lsls	r3, r3, #1
 8005708:	4413      	add	r3, r2
 800570a:	881b      	ldrh	r3, [r3, #0]
 800570c:	2b00      	cmp	r3, #0
 800570e:	d1f4      	bne.n	80056fa <dir_register+0x26>
		create_xdir(fs->dirbuf, fs->lfnbuf);	/* Create on-memory directory block to be written later */
		return FR_OK;
	}
#endif
	/* On the FAT12/16/32 volume */
	mem_cpy(sn, dp->fn, 12);
 8005710:	687b      	ldr	r3, [r7, #4]
 8005712:	f103 0124 	add.w	r1, r3, #36	; 0x24
 8005716:	f107 030c 	add.w	r3, r7, #12
 800571a:	220c      	movs	r2, #12
 800571c:	4618      	mov	r0, r3
 800571e:	f7fe fda5 	bl	800426c <mem_cpy>
	if (sn[NSFLAG] & NS_LOSS) {			/* When LFN is out of 8.3 format, generate a numbered name */
 8005722:	7dfb      	ldrb	r3, [r7, #23]
 8005724:	f003 0301 	and.w	r3, r3, #1
 8005728:	2b00      	cmp	r3, #0
 800572a:	d032      	beq.n	8005792 <dir_register+0xbe>
		dp->fn[NSFLAG] = NS_NOLFN;		/* Find only SFN */
 800572c:	687b      	ldr	r3, [r7, #4]
 800572e:	2240      	movs	r2, #64	; 0x40
 8005730:	f883 202f 	strb.w	r2, [r3, #47]	; 0x2f
		for (n = 1; n < 100; n++) {
 8005734:	2301      	movs	r3, #1
 8005736:	62bb      	str	r3, [r7, #40]	; 0x28
 8005738:	e016      	b.n	8005768 <dir_register+0x94>
			gen_numname(dp->fn, sn, fs->lfnbuf, n);	/* Generate a numbered name */
 800573a:	687b      	ldr	r3, [r7, #4]
 800573c:	f103 0024 	add.w	r0, r3, #36	; 0x24
 8005740:	69fb      	ldr	r3, [r7, #28]
 8005742:	691a      	ldr	r2, [r3, #16]
 8005744:	f107 010c 	add.w	r1, r7, #12
 8005748:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800574a:	f7ff fe53 	bl	80053f4 <gen_numname>
			res = dir_find(dp);				/* Check if the name collides with existing SFN */
 800574e:	6878      	ldr	r0, [r7, #4]
 8005750:	f7ff ff00 	bl	8005554 <dir_find>
 8005754:	4603      	mov	r3, r0
 8005756:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
			if (res != FR_OK) break;
 800575a:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 800575e:	2b00      	cmp	r3, #0
 8005760:	d106      	bne.n	8005770 <dir_register+0x9c>
		for (n = 1; n < 100; n++) {
 8005762:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8005764:	3301      	adds	r3, #1
 8005766:	62bb      	str	r3, [r7, #40]	; 0x28
 8005768:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800576a:	2b63      	cmp	r3, #99	; 0x63
 800576c:	d9e5      	bls.n	800573a <dir_register+0x66>
 800576e:	e000      	b.n	8005772 <dir_register+0x9e>
			if (res != FR_OK) break;
 8005770:	bf00      	nop
		}
		if (n == 100) return FR_DENIED;		/* Abort if too many collisions */
 8005772:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8005774:	2b64      	cmp	r3, #100	; 0x64
 8005776:	d101      	bne.n	800577c <dir_register+0xa8>
 8005778:	2307      	movs	r3, #7
 800577a:	e09c      	b.n	80058b6 <dir_register+0x1e2>
		if (res != FR_NO_FILE) return res;	/* Abort if the result is other than 'not collided' */
 800577c:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8005780:	2b04      	cmp	r3, #4
 8005782:	d002      	beq.n	800578a <dir_register+0xb6>
 8005784:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8005788:	e095      	b.n	80058b6 <dir_register+0x1e2>
		dp->fn[NSFLAG] = sn[NSFLAG];
 800578a:	7dfa      	ldrb	r2, [r7, #23]
 800578c:	687b      	ldr	r3, [r7, #4]
 800578e:	f883 202f 	strb.w	r2, [r3, #47]	; 0x2f
	}

	/* Create an SFN with/without LFNs. */
	nent = (sn[NSFLAG] & NS_LFN) ? (nlen + 12) / 13 + 1 : 1;	/* Number of entries to allocate */
 8005792:	7dfb      	ldrb	r3, [r7, #23]
 8005794:	f003 0302 	and.w	r3, r3, #2
 8005798:	2b00      	cmp	r3, #0
 800579a:	d007      	beq.n	80057ac <dir_register+0xd8>
 800579c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 800579e:	330c      	adds	r3, #12
 80057a0:	4a47      	ldr	r2, [pc, #284]	; (80058c0 <dir_register+0x1ec>)
 80057a2:	fba2 2303 	umull	r2, r3, r2, r3
 80057a6:	089b      	lsrs	r3, r3, #2
 80057a8:	3301      	adds	r3, #1
 80057aa:	e000      	b.n	80057ae <dir_register+0xda>
 80057ac:	2301      	movs	r3, #1
 80057ae:	623b      	str	r3, [r7, #32]
	res = dir_alloc(dp, nent);		/* Allocate entries */
 80057b0:	6a39      	ldr	r1, [r7, #32]
 80057b2:	6878      	ldr	r0, [r7, #4]
 80057b4:	f7ff fcc0 	bl	8005138 <dir_alloc>
 80057b8:	4603      	mov	r3, r0
 80057ba:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
	if (res == FR_OK && --nent) {	/* Set LFN entry if needed */
 80057be:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 80057c2:	2b00      	cmp	r3, #0
 80057c4:	d148      	bne.n	8005858 <dir_register+0x184>
 80057c6:	6a3b      	ldr	r3, [r7, #32]
 80057c8:	3b01      	subs	r3, #1
 80057ca:	623b      	str	r3, [r7, #32]
 80057cc:	6a3b      	ldr	r3, [r7, #32]
 80057ce:	2b00      	cmp	r3, #0
 80057d0:	d042      	beq.n	8005858 <dir_register+0x184>
		res = dir_sdi(dp, dp->dptr - nent * SZDIRE);
 80057d2:	687b      	ldr	r3, [r7, #4]
 80057d4:	695a      	ldr	r2, [r3, #20]
 80057d6:	6a3b      	ldr	r3, [r7, #32]
 80057d8:	015b      	lsls	r3, r3, #5
 80057da:	1ad3      	subs	r3, r2, r3
 80057dc:	4619      	mov	r1, r3
 80057de:	6878      	ldr	r0, [r7, #4]
 80057e0:	f7ff fb4b 	bl	8004e7a <dir_sdi>
 80057e4:	4603      	mov	r3, r0
 80057e6:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
		if (res == FR_OK) {
 80057ea:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 80057ee:	2b00      	cmp	r3, #0
 80057f0:	d132      	bne.n	8005858 <dir_register+0x184>
			sum = sum_sfn(dp->fn);	/* Checksum value of the SFN tied to the LFN */
 80057f2:	687b      	ldr	r3, [r7, #4]
 80057f4:	3324      	adds	r3, #36	; 0x24
 80057f6:	4618      	mov	r0, r3
 80057f8:	f7ff fe8b 	bl	8005512 <sum_sfn>
 80057fc:	4603      	mov	r3, r0
 80057fe:	76fb      	strb	r3, [r7, #27]
			do {					/* Store LFN entries in bottom first */
				res = move_window(fs, dp->sect);
 8005800:	687b      	ldr	r3, [r7, #4]
 8005802:	69db      	ldr	r3, [r3, #28]
 8005804:	4619      	mov	r1, r3
 8005806:	69f8      	ldr	r0, [r7, #28]
 8005808:	f7fe ff5e 	bl	80046c8 <move_window>
 800580c:	4603      	mov	r3, r0
 800580e:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
				if (res != FR_OK) break;
 8005812:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8005816:	2b00      	cmp	r3, #0
 8005818:	d11d      	bne.n	8005856 <dir_register+0x182>
				put_lfn(fs->lfnbuf, dp->dir, (BYTE)nent, sum);
 800581a:	69fb      	ldr	r3, [r7, #28]
 800581c:	6918      	ldr	r0, [r3, #16]
 800581e:	687b      	ldr	r3, [r7, #4]
 8005820:	6a19      	ldr	r1, [r3, #32]
 8005822:	6a3b      	ldr	r3, [r7, #32]
 8005824:	b2da      	uxtb	r2, r3
 8005826:	7efb      	ldrb	r3, [r7, #27]
 8005828:	f7ff fd7c 	bl	8005324 <put_lfn>
				fs->wflag = 1;
 800582c:	69fb      	ldr	r3, [r7, #28]
 800582e:	2201      	movs	r2, #1
 8005830:	70da      	strb	r2, [r3, #3]
				res = dir_next(dp, 0);	/* Next entry */
 8005832:	2100      	movs	r1, #0
 8005834:	6878      	ldr	r0, [r7, #4]
 8005836:	f7ff fba9 	bl	8004f8c <dir_next>
 800583a:	4603      	mov	r3, r0
 800583c:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
			} while (res == FR_OK && --nent);
 8005840:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8005844:	2b00      	cmp	r3, #0
 8005846:	d107      	bne.n	8005858 <dir_register+0x184>
 8005848:	6a3b      	ldr	r3, [r7, #32]
 800584a:	3b01      	subs	r3, #1
 800584c:	623b      	str	r3, [r7, #32]
 800584e:	6a3b      	ldr	r3, [r7, #32]
 8005850:	2b00      	cmp	r3, #0
 8005852:	d1d5      	bne.n	8005800 <dir_register+0x12c>
 8005854:	e000      	b.n	8005858 <dir_register+0x184>
				if (res != FR_OK) break;
 8005856:	bf00      	nop
	res = dir_alloc(dp, 1);		/* Allocate an entry for SFN */

#endif

	/* Set SFN entry */
	if (res == FR_OK) {
 8005858:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 800585c:	2b00      	cmp	r3, #0
 800585e:	d128      	bne.n	80058b2 <dir_register+0x1de>
		res = move_window(fs, dp->sect);
 8005860:	687b      	ldr	r3, [r7, #4]
 8005862:	69db      	ldr	r3, [r3, #28]
 8005864:	4619      	mov	r1, r3
 8005866:	69f8      	ldr	r0, [r7, #28]
 8005868:	f7fe ff2e 	bl	80046c8 <move_window>
 800586c:	4603      	mov	r3, r0
 800586e:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
		if (res == FR_OK) {
 8005872:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8005876:	2b00      	cmp	r3, #0
 8005878:	d11b      	bne.n	80058b2 <dir_register+0x1de>
			mem_set(dp->dir, 0, SZDIRE);	/* Clean the entry */
 800587a:	687b      	ldr	r3, [r7, #4]
 800587c:	6a1b      	ldr	r3, [r3, #32]
 800587e:	2220      	movs	r2, #32
 8005880:	2100      	movs	r1, #0
 8005882:	4618      	mov	r0, r3
 8005884:	f7fe fd13 	bl	80042ae <mem_set>
			mem_cpy(dp->dir + DIR_Name, dp->fn, 11);	/* Put SFN */
 8005888:	687b      	ldr	r3, [r7, #4]
 800588a:	6a18      	ldr	r0, [r3, #32]
 800588c:	687b      	ldr	r3, [r7, #4]
 800588e:	3324      	adds	r3, #36	; 0x24
 8005890:	220b      	movs	r2, #11
 8005892:	4619      	mov	r1, r3
 8005894:	f7fe fcea 	bl	800426c <mem_cpy>
#if _USE_LFN != 0
			dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT);	/* Put NT flag */
 8005898:	687b      	ldr	r3, [r7, #4]
 800589a:	f893 202f 	ldrb.w	r2, [r3, #47]	; 0x2f
 800589e:	687b      	ldr	r3, [r7, #4]
 80058a0:	6a1b      	ldr	r3, [r3, #32]
 80058a2:	330c      	adds	r3, #12
 80058a4:	f002 0218 	and.w	r2, r2, #24
 80058a8:	b2d2      	uxtb	r2, r2
 80058aa:	701a      	strb	r2, [r3, #0]
#endif
			fs->wflag = 1;
 80058ac:	69fb      	ldr	r3, [r7, #28]
 80058ae:	2201      	movs	r2, #1
 80058b0:	70da      	strb	r2, [r3, #3]
		}
	}

	return res;
 80058b2:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
}
 80058b6:	4618      	mov	r0, r3
 80058b8:	3730      	adds	r7, #48	; 0x30
 80058ba:	46bd      	mov	sp, r7
 80058bc:	bd80      	pop	{r7, pc}
 80058be:	bf00      	nop
 80058c0:	4ec4ec4f 	.word	0x4ec4ec4f

080058c4 <create_name>:
static
FRESULT create_name (	/* FR_OK: successful, FR_INVALID_NAME: could not create */
	DIR* dp,			/* Pointer to the directory object */
	const TCHAR** path	/* Pointer to pointer to the segment in the path string */
)
{
 80058c4:	b580      	push	{r7, lr}
 80058c6:	b08a      	sub	sp, #40	; 0x28
 80058c8:	af00      	add	r7, sp, #0
 80058ca:	6078      	str	r0, [r7, #4]
 80058cc:	6039      	str	r1, [r7, #0]
	WCHAR w, *lfn;
	UINT i, ni, si, di;
	const TCHAR *p;

	/* Create LFN in Unicode */
	p = *path; lfn = dp->obj.fs->lfnbuf; si = di = 0;
 80058ce:	683b      	ldr	r3, [r7, #0]
 80058d0:	681b      	ldr	r3, [r3, #0]
 80058d2:	613b      	str	r3, [r7, #16]
 80058d4:	687b      	ldr	r3, [r7, #4]
 80058d6:	681b      	ldr	r3, [r3, #0]
 80058d8:	691b      	ldr	r3, [r3, #16]
 80058da:	60fb      	str	r3, [r7, #12]
 80058dc:	2300      	movs	r3, #0
 80058de:	617b      	str	r3, [r7, #20]
 80058e0:	697b      	ldr	r3, [r7, #20]
 80058e2:	61bb      	str	r3, [r7, #24]
	for (;;) {
		w = p[si++];					/* Get a character */
 80058e4:	69bb      	ldr	r3, [r7, #24]
 80058e6:	1c5a      	adds	r2, r3, #1
 80058e8:	61ba      	str	r2, [r7, #24]
 80058ea:	693a      	ldr	r2, [r7, #16]
 80058ec:	4413      	add	r3, r2
 80058ee:	781b      	ldrb	r3, [r3, #0]
 80058f0:	84bb      	strh	r3, [r7, #36]	; 0x24
		if (w < ' ') break;				/* Break if end of the path name */
 80058f2:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 80058f4:	2b1f      	cmp	r3, #31
 80058f6:	d940      	bls.n	800597a <create_name+0xb6>
		if (w == '/' || w == '\\') {	/* Break if a separator is found */
 80058f8:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 80058fa:	2b2f      	cmp	r3, #47	; 0x2f
 80058fc:	d006      	beq.n	800590c <create_name+0x48>
 80058fe:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005900:	2b5c      	cmp	r3, #92	; 0x5c
 8005902:	d110      	bne.n	8005926 <create_name+0x62>
			while (p[si] == '/' || p[si] == '\\') si++;	/* Skip duplicated separator if exist */
 8005904:	e002      	b.n	800590c <create_name+0x48>
 8005906:	69bb      	ldr	r3, [r7, #24]
 8005908:	3301      	adds	r3, #1
 800590a:	61bb      	str	r3, [r7, #24]
 800590c:	693a      	ldr	r2, [r7, #16]
 800590e:	69bb      	ldr	r3, [r7, #24]
 8005910:	4413      	add	r3, r2
 8005912:	781b      	ldrb	r3, [r3, #0]
 8005914:	2b2f      	cmp	r3, #47	; 0x2f
 8005916:	d0f6      	beq.n	8005906 <create_name+0x42>
 8005918:	693a      	ldr	r2, [r7, #16]
 800591a:	69bb      	ldr	r3, [r7, #24]
 800591c:	4413      	add	r3, r2
 800591e:	781b      	ldrb	r3, [r3, #0]
 8005920:	2b5c      	cmp	r3, #92	; 0x5c
 8005922:	d0f0      	beq.n	8005906 <create_name+0x42>
			break;
 8005924:	e02a      	b.n	800597c <create_name+0xb8>
		}
		if (di >= _MAX_LFN) return FR_INVALID_NAME;	/* Reject too long name */
 8005926:	697b      	ldr	r3, [r7, #20]
 8005928:	2bfe      	cmp	r3, #254	; 0xfe
 800592a:	d901      	bls.n	8005930 <create_name+0x6c>
 800592c:	2306      	movs	r3, #6
 800592e:	e177      	b.n	8005c20 <create_name+0x35c>
#if !_LFN_UNICODE
		w &= 0xFF;
 8005930:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005932:	b2db      	uxtb	r3, r3
 8005934:	84bb      	strh	r3, [r7, #36]	; 0x24
		if (IsDBCS1(w)) {				/* Check if it is a DBC 1st byte (always false on SBCS cfg) */
			b = (BYTE)p[si++];			/* Get 2nd byte */
			w = (w << 8) + b;			/* Create a DBC */
			if (!IsDBCS2(b)) return FR_INVALID_NAME;	/* Reject invalid sequence */
		}
		w = ff_convert(w, 1);			/* Convert ANSI/OEM to Unicode */
 8005936:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005938:	2101      	movs	r1, #1
 800593a:	4618      	mov	r0, r3
 800593c:	f001 fa8e 	bl	8006e5c <ff_convert>
 8005940:	4603      	mov	r3, r0
 8005942:	84bb      	strh	r3, [r7, #36]	; 0x24
		if (!w) return FR_INVALID_NAME;	/* Reject invalid code */
 8005944:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005946:	2b00      	cmp	r3, #0
 8005948:	d101      	bne.n	800594e <create_name+0x8a>
 800594a:	2306      	movs	r3, #6
 800594c:	e168      	b.n	8005c20 <create_name+0x35c>
#endif
		if (w < 0x80 && chk_chr("\"*:<>\?|\x7F", w)) return FR_INVALID_NAME;	/* Reject illegal characters for LFN */
 800594e:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005950:	2b7f      	cmp	r3, #127	; 0x7f
 8005952:	d809      	bhi.n	8005968 <create_name+0xa4>
 8005954:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005956:	4619      	mov	r1, r3
 8005958:	48b3      	ldr	r0, [pc, #716]	; (8005c28 <create_name+0x364>)
 800595a:	f7fe fce9 	bl	8004330 <chk_chr>
 800595e:	4603      	mov	r3, r0
 8005960:	2b00      	cmp	r3, #0
 8005962:	d001      	beq.n	8005968 <create_name+0xa4>
 8005964:	2306      	movs	r3, #6
 8005966:	e15b      	b.n	8005c20 <create_name+0x35c>
		lfn[di++] = w;					/* Store the Unicode character */
 8005968:	697b      	ldr	r3, [r7, #20]
 800596a:	1c5a      	adds	r2, r3, #1
 800596c:	617a      	str	r2, [r7, #20]
 800596e:	005b      	lsls	r3, r3, #1
 8005970:	68fa      	ldr	r2, [r7, #12]
 8005972:	4413      	add	r3, r2
 8005974:	8cba      	ldrh	r2, [r7, #36]	; 0x24
 8005976:	801a      	strh	r2, [r3, #0]
		w = p[si++];					/* Get a character */
 8005978:	e7b4      	b.n	80058e4 <create_name+0x20>
		if (w < ' ') break;				/* Break if end of the path name */
 800597a:	bf00      	nop
	}
	*path = &p[si];						/* Return pointer to the next segment */
 800597c:	693a      	ldr	r2, [r7, #16]
 800597e:	69bb      	ldr	r3, [r7, #24]
 8005980:	441a      	add	r2, r3
 8005982:	683b      	ldr	r3, [r7, #0]
 8005984:	601a      	str	r2, [r3, #0]
	cf = (w < ' ') ? NS_LAST : 0;		/* Set last segment flag if end of the path */
 8005986:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005988:	2b1f      	cmp	r3, #31
 800598a:	d801      	bhi.n	8005990 <create_name+0xcc>
 800598c:	2304      	movs	r3, #4
 800598e:	e000      	b.n	8005992 <create_name+0xce>
 8005990:	2300      	movs	r3, #0
 8005992:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			dp->fn[i] = (i < di) ? '.' : ' ';
		dp->fn[i] = cf | NS_DOT;		/* This is a dot entry */
		return FR_OK;
	}
#endif
	while (di) {						/* Snip off trailing spaces and dots if exist */
 8005996:	e011      	b.n	80059bc <create_name+0xf8>
		w = lfn[di - 1];
 8005998:	697b      	ldr	r3, [r7, #20]
 800599a:	f103 4300 	add.w	r3, r3, #2147483648	; 0x80000000
 800599e:	3b01      	subs	r3, #1
 80059a0:	005b      	lsls	r3, r3, #1
 80059a2:	68fa      	ldr	r2, [r7, #12]
 80059a4:	4413      	add	r3, r2
 80059a6:	881b      	ldrh	r3, [r3, #0]
 80059a8:	84bb      	strh	r3, [r7, #36]	; 0x24
		if (w != ' ' && w != '.') break;
 80059aa:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 80059ac:	2b20      	cmp	r3, #32
 80059ae:	d002      	beq.n	80059b6 <create_name+0xf2>
 80059b0:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 80059b2:	2b2e      	cmp	r3, #46	; 0x2e
 80059b4:	d106      	bne.n	80059c4 <create_name+0x100>
		di--;
 80059b6:	697b      	ldr	r3, [r7, #20]
 80059b8:	3b01      	subs	r3, #1
 80059ba:	617b      	str	r3, [r7, #20]
	while (di) {						/* Snip off trailing spaces and dots if exist */
 80059bc:	697b      	ldr	r3, [r7, #20]
 80059be:	2b00      	cmp	r3, #0
 80059c0:	d1ea      	bne.n	8005998 <create_name+0xd4>
 80059c2:	e000      	b.n	80059c6 <create_name+0x102>
		if (w != ' ' && w != '.') break;
 80059c4:	bf00      	nop
	}
	lfn[di] = 0;						/* LFN is created */
 80059c6:	697b      	ldr	r3, [r7, #20]
 80059c8:	005b      	lsls	r3, r3, #1
 80059ca:	68fa      	ldr	r2, [r7, #12]
 80059cc:	4413      	add	r3, r2
 80059ce:	2200      	movs	r2, #0
 80059d0:	801a      	strh	r2, [r3, #0]
	if (di == 0) return FR_INVALID_NAME;	/* Reject nul name */
 80059d2:	697b      	ldr	r3, [r7, #20]
 80059d4:	2b00      	cmp	r3, #0
 80059d6:	d101      	bne.n	80059dc <create_name+0x118>
 80059d8:	2306      	movs	r3, #6
 80059da:	e121      	b.n	8005c20 <create_name+0x35c>

	/* Create SFN in directory form */
	mem_set(dp->fn, ' ', 11);
 80059dc:	687b      	ldr	r3, [r7, #4]
 80059de:	3324      	adds	r3, #36	; 0x24
 80059e0:	220b      	movs	r2, #11
 80059e2:	2120      	movs	r1, #32
 80059e4:	4618      	mov	r0, r3
 80059e6:	f7fe fc62 	bl	80042ae <mem_set>
	for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ;	/* Strip leading spaces and dots */
 80059ea:	2300      	movs	r3, #0
 80059ec:	61bb      	str	r3, [r7, #24]
 80059ee:	e002      	b.n	80059f6 <create_name+0x132>
 80059f0:	69bb      	ldr	r3, [r7, #24]
 80059f2:	3301      	adds	r3, #1
 80059f4:	61bb      	str	r3, [r7, #24]
 80059f6:	69bb      	ldr	r3, [r7, #24]
 80059f8:	005b      	lsls	r3, r3, #1
 80059fa:	68fa      	ldr	r2, [r7, #12]
 80059fc:	4413      	add	r3, r2
 80059fe:	881b      	ldrh	r3, [r3, #0]
 8005a00:	2b20      	cmp	r3, #32
 8005a02:	d0f5      	beq.n	80059f0 <create_name+0x12c>
 8005a04:	69bb      	ldr	r3, [r7, #24]
 8005a06:	005b      	lsls	r3, r3, #1
 8005a08:	68fa      	ldr	r2, [r7, #12]
 8005a0a:	4413      	add	r3, r2
 8005a0c:	881b      	ldrh	r3, [r3, #0]
 8005a0e:	2b2e      	cmp	r3, #46	; 0x2e
 8005a10:	d0ee      	beq.n	80059f0 <create_name+0x12c>
	if (si) cf |= NS_LOSS | NS_LFN;
 8005a12:	69bb      	ldr	r3, [r7, #24]
 8005a14:	2b00      	cmp	r3, #0
 8005a16:	d009      	beq.n	8005a2c <create_name+0x168>
 8005a18:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005a1c:	f043 0303 	orr.w	r3, r3, #3
 8005a20:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
	while (di && lfn[di - 1] != '.') di--;	/* Find extension (di<=si: no extension) */
 8005a24:	e002      	b.n	8005a2c <create_name+0x168>
 8005a26:	697b      	ldr	r3, [r7, #20]
 8005a28:	3b01      	subs	r3, #1
 8005a2a:	617b      	str	r3, [r7, #20]
 8005a2c:	697b      	ldr	r3, [r7, #20]
 8005a2e:	2b00      	cmp	r3, #0
 8005a30:	d009      	beq.n	8005a46 <create_name+0x182>
 8005a32:	697b      	ldr	r3, [r7, #20]
 8005a34:	f103 4300 	add.w	r3, r3, #2147483648	; 0x80000000
 8005a38:	3b01      	subs	r3, #1
 8005a3a:	005b      	lsls	r3, r3, #1
 8005a3c:	68fa      	ldr	r2, [r7, #12]
 8005a3e:	4413      	add	r3, r2
 8005a40:	881b      	ldrh	r3, [r3, #0]
 8005a42:	2b2e      	cmp	r3, #46	; 0x2e
 8005a44:	d1ef      	bne.n	8005a26 <create_name+0x162>

	i = b = 0; ni = 8;
 8005a46:	2300      	movs	r3, #0
 8005a48:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
 8005a4c:	2300      	movs	r3, #0
 8005a4e:	623b      	str	r3, [r7, #32]
 8005a50:	2308      	movs	r3, #8
 8005a52:	61fb      	str	r3, [r7, #28]
	for (;;) {
		w = lfn[si++];					/* Get an LFN character */
 8005a54:	69bb      	ldr	r3, [r7, #24]
 8005a56:	1c5a      	adds	r2, r3, #1
 8005a58:	61ba      	str	r2, [r7, #24]
 8005a5a:	005b      	lsls	r3, r3, #1
 8005a5c:	68fa      	ldr	r2, [r7, #12]
 8005a5e:	4413      	add	r3, r2
 8005a60:	881b      	ldrh	r3, [r3, #0]
 8005a62:	84bb      	strh	r3, [r7, #36]	; 0x24
		if (!w) break;					/* Break on end of the LFN */
 8005a64:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005a66:	2b00      	cmp	r3, #0
 8005a68:	f000 8090 	beq.w	8005b8c <create_name+0x2c8>
		if (w == ' ' || (w == '.' && si != di)) {	/* Remove spaces and dots */
 8005a6c:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005a6e:	2b20      	cmp	r3, #32
 8005a70:	d006      	beq.n	8005a80 <create_name+0x1bc>
 8005a72:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005a74:	2b2e      	cmp	r3, #46	; 0x2e
 8005a76:	d10a      	bne.n	8005a8e <create_name+0x1ca>
 8005a78:	69ba      	ldr	r2, [r7, #24]
 8005a7a:	697b      	ldr	r3, [r7, #20]
 8005a7c:	429a      	cmp	r2, r3
 8005a7e:	d006      	beq.n	8005a8e <create_name+0x1ca>
			cf |= NS_LOSS | NS_LFN; continue;
 8005a80:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005a84:	f043 0303 	orr.w	r3, r3, #3
 8005a88:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
 8005a8c:	e07d      	b.n	8005b8a <create_name+0x2c6>
		}

		if (i >= ni || si == di) {		/* Extension or end of SFN */
 8005a8e:	6a3a      	ldr	r2, [r7, #32]
 8005a90:	69fb      	ldr	r3, [r7, #28]
 8005a92:	429a      	cmp	r2, r3
 8005a94:	d203      	bcs.n	8005a9e <create_name+0x1da>
 8005a96:	69ba      	ldr	r2, [r7, #24]
 8005a98:	697b      	ldr	r3, [r7, #20]
 8005a9a:	429a      	cmp	r2, r3
 8005a9c:	d123      	bne.n	8005ae6 <create_name+0x222>
			if (ni == 11) {				/* Long extension */
 8005a9e:	69fb      	ldr	r3, [r7, #28]
 8005aa0:	2b0b      	cmp	r3, #11
 8005aa2:	d106      	bne.n	8005ab2 <create_name+0x1ee>
				cf |= NS_LOSS | NS_LFN; break;
 8005aa4:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005aa8:	f043 0303 	orr.w	r3, r3, #3
 8005aac:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
 8005ab0:	e06f      	b.n	8005b92 <create_name+0x2ce>
			}
			if (si != di) cf |= NS_LOSS | NS_LFN;	/* Out of 8.3 format */
 8005ab2:	69ba      	ldr	r2, [r7, #24]
 8005ab4:	697b      	ldr	r3, [r7, #20]
 8005ab6:	429a      	cmp	r2, r3
 8005ab8:	d005      	beq.n	8005ac6 <create_name+0x202>
 8005aba:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005abe:	f043 0303 	orr.w	r3, r3, #3
 8005ac2:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			if (si > di) break;			/* No extension */
 8005ac6:	69ba      	ldr	r2, [r7, #24]
 8005ac8:	697b      	ldr	r3, [r7, #20]
 8005aca:	429a      	cmp	r2, r3
 8005acc:	d860      	bhi.n	8005b90 <create_name+0x2cc>
			si = di; i = 8; ni = 11;	/* Enter extension section */
 8005ace:	697b      	ldr	r3, [r7, #20]
 8005ad0:	61bb      	str	r3, [r7, #24]
 8005ad2:	2308      	movs	r3, #8
 8005ad4:	623b      	str	r3, [r7, #32]
 8005ad6:	230b      	movs	r3, #11
 8005ad8:	61fb      	str	r3, [r7, #28]
			b <<= 2; continue;
 8005ada:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005ade:	009b      	lsls	r3, r3, #2
 8005ae0:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
 8005ae4:	e051      	b.n	8005b8a <create_name+0x2c6>
		}

		if (w >= 0x80) {				/* Non ASCII character */
 8005ae6:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005ae8:	2b7f      	cmp	r3, #127	; 0x7f
 8005aea:	d914      	bls.n	8005b16 <create_name+0x252>
#ifdef _EXCVT
			w = ff_convert(w, 0);		/* Unicode -> OEM code */
 8005aec:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005aee:	2100      	movs	r1, #0
 8005af0:	4618      	mov	r0, r3
 8005af2:	f001 f9b3 	bl	8006e5c <ff_convert>
 8005af6:	4603      	mov	r3, r0
 8005af8:	84bb      	strh	r3, [r7, #36]	; 0x24
			if (w) w = ExCvt[w - 0x80];	/* Convert extended character to upper (SBCS) */
 8005afa:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005afc:	2b00      	cmp	r3, #0
 8005afe:	d004      	beq.n	8005b0a <create_name+0x246>
 8005b00:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b02:	3b80      	subs	r3, #128	; 0x80
 8005b04:	4a49      	ldr	r2, [pc, #292]	; (8005c2c <create_name+0x368>)
 8005b06:	5cd3      	ldrb	r3, [r2, r3]
 8005b08:	84bb      	strh	r3, [r7, #36]	; 0x24
#else
			w = ff_convert(ff_wtoupper(w), 0);	/* Upper converted Unicode -> OEM code */
#endif
			cf |= NS_LFN;				/* Force create LFN entry */
 8005b0a:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005b0e:	f043 0302 	orr.w	r3, r3, #2
 8005b12:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
			if (i >= ni - 1) {
				cf |= NS_LOSS | NS_LFN; i = ni; continue;
			}
			dp->fn[i++] = (BYTE)(w >> 8);
		} else {						/* SBC */
			if (!w || chk_chr("+,;=[]", w)) {	/* Replace illegal characters for SFN */
 8005b16:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b18:	2b00      	cmp	r3, #0
 8005b1a:	d007      	beq.n	8005b2c <create_name+0x268>
 8005b1c:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b1e:	4619      	mov	r1, r3
 8005b20:	4843      	ldr	r0, [pc, #268]	; (8005c30 <create_name+0x36c>)
 8005b22:	f7fe fc05 	bl	8004330 <chk_chr>
 8005b26:	4603      	mov	r3, r0
 8005b28:	2b00      	cmp	r3, #0
 8005b2a:	d008      	beq.n	8005b3e <create_name+0x27a>
				w = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */
 8005b2c:	235f      	movs	r3, #95	; 0x5f
 8005b2e:	84bb      	strh	r3, [r7, #36]	; 0x24
 8005b30:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005b34:	f043 0303 	orr.w	r3, r3, #3
 8005b38:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
 8005b3c:	e01b      	b.n	8005b76 <create_name+0x2b2>
			} else {
				if (IsUpper(w)) {		/* ASCII large capital */
 8005b3e:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b40:	2b40      	cmp	r3, #64	; 0x40
 8005b42:	d909      	bls.n	8005b58 <create_name+0x294>
 8005b44:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b46:	2b5a      	cmp	r3, #90	; 0x5a
 8005b48:	d806      	bhi.n	8005b58 <create_name+0x294>
					b |= 2;
 8005b4a:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005b4e:	f043 0302 	orr.w	r3, r3, #2
 8005b52:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
 8005b56:	e00e      	b.n	8005b76 <create_name+0x2b2>
				} else {
					if (IsLower(w)) {	/* ASCII small capital */
 8005b58:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b5a:	2b60      	cmp	r3, #96	; 0x60
 8005b5c:	d90b      	bls.n	8005b76 <create_name+0x2b2>
 8005b5e:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b60:	2b7a      	cmp	r3, #122	; 0x7a
 8005b62:	d808      	bhi.n	8005b76 <create_name+0x2b2>
						b |= 1; w -= 0x20;
 8005b64:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005b68:	f043 0301 	orr.w	r3, r3, #1
 8005b6c:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
 8005b70:	8cbb      	ldrh	r3, [r7, #36]	; 0x24
 8005b72:	3b20      	subs	r3, #32
 8005b74:	84bb      	strh	r3, [r7, #36]	; 0x24
					}
				}
			}
		}
		dp->fn[i++] = (BYTE)w;
 8005b76:	6a3b      	ldr	r3, [r7, #32]
 8005b78:	1c5a      	adds	r2, r3, #1
 8005b7a:	623a      	str	r2, [r7, #32]
 8005b7c:	8cba      	ldrh	r2, [r7, #36]	; 0x24
 8005b7e:	b2d1      	uxtb	r1, r2
 8005b80:	687a      	ldr	r2, [r7, #4]
 8005b82:	4413      	add	r3, r2
 8005b84:	460a      	mov	r2, r1
 8005b86:	f883 2024 	strb.w	r2, [r3, #36]	; 0x24
		w = lfn[si++];					/* Get an LFN character */
 8005b8a:	e763      	b.n	8005a54 <create_name+0x190>
		if (!w) break;					/* Break on end of the LFN */
 8005b8c:	bf00      	nop
 8005b8e:	e000      	b.n	8005b92 <create_name+0x2ce>
			if (si > di) break;			/* No extension */
 8005b90:	bf00      	nop
	}

	if (dp->fn[0] == DDEM) dp->fn[0] = RDDEM;	/* If the first character collides with DDEM, replace it with RDDEM */
 8005b92:	687b      	ldr	r3, [r7, #4]
 8005b94:	f893 3024 	ldrb.w	r3, [r3, #36]	; 0x24
 8005b98:	2be5      	cmp	r3, #229	; 0xe5
 8005b9a:	d103      	bne.n	8005ba4 <create_name+0x2e0>
 8005b9c:	687b      	ldr	r3, [r7, #4]
 8005b9e:	2205      	movs	r2, #5
 8005ba0:	f883 2024 	strb.w	r2, [r3, #36]	; 0x24

	if (ni == 8) b <<= 2;
 8005ba4:	69fb      	ldr	r3, [r7, #28]
 8005ba6:	2b08      	cmp	r3, #8
 8005ba8:	d104      	bne.n	8005bb4 <create_name+0x2f0>
 8005baa:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005bae:	009b      	lsls	r3, r3, #2
 8005bb0:	f887 3026 	strb.w	r3, [r7, #38]	; 0x26
	if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) cf |= NS_LFN;	/* Create LFN entry when there are composite capitals */
 8005bb4:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005bb8:	f003 030c 	and.w	r3, r3, #12
 8005bbc:	2b0c      	cmp	r3, #12
 8005bbe:	d005      	beq.n	8005bcc <create_name+0x308>
 8005bc0:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005bc4:	f003 0303 	and.w	r3, r3, #3
 8005bc8:	2b03      	cmp	r3, #3
 8005bca:	d105      	bne.n	8005bd8 <create_name+0x314>
 8005bcc:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005bd0:	f043 0302 	orr.w	r3, r3, #2
 8005bd4:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
	if (!(cf & NS_LFN)) {						/* When LFN is in 8.3 format without extended character, NT flags are created */
 8005bd8:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005bdc:	f003 0302 	and.w	r3, r3, #2
 8005be0:	2b00      	cmp	r3, #0
 8005be2:	d117      	bne.n	8005c14 <create_name+0x350>
		if ((b & 0x03) == 0x01) cf |= NS_EXT;	/* NT flag (Extension has only small capital) */
 8005be4:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005be8:	f003 0303 	and.w	r3, r3, #3
 8005bec:	2b01      	cmp	r3, #1
 8005bee:	d105      	bne.n	8005bfc <create_name+0x338>
 8005bf0:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005bf4:	f043 0310 	orr.w	r3, r3, #16
 8005bf8:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
		if ((b & 0x0C) == 0x04) cf |= NS_BODY;	/* NT flag (Filename has only small capital) */
 8005bfc:	f897 3026 	ldrb.w	r3, [r7, #38]	; 0x26
 8005c00:	f003 030c 	and.w	r3, r3, #12
 8005c04:	2b04      	cmp	r3, #4
 8005c06:	d105      	bne.n	8005c14 <create_name+0x350>
 8005c08:	f897 3027 	ldrb.w	r3, [r7, #39]	; 0x27
 8005c0c:	f043 0308 	orr.w	r3, r3, #8
 8005c10:	f887 3027 	strb.w	r3, [r7, #39]	; 0x27
	}

	dp->fn[NSFLAG] = cf;	/* SFN is created */
 8005c14:	687b      	ldr	r3, [r7, #4]
 8005c16:	f897 2027 	ldrb.w	r2, [r7, #39]	; 0x27
 8005c1a:	f883 202f 	strb.w	r2, [r3, #47]	; 0x2f

	return FR_OK;
 8005c1e:	2300      	movs	r3, #0
	if (sfn[0] == DDEM) sfn[0] = RDDEM;	/* If the first character collides with DDEM, replace it with RDDEM */
	sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0;		/* Set last segment flag if end of the path */

	return FR_OK;
#endif /* _USE_LFN != 0 */
}
 8005c20:	4618      	mov	r0, r3
 8005c22:	3728      	adds	r7, #40	; 0x28
 8005c24:	46bd      	mov	sp, r7
 8005c26:	bd80      	pop	{r7, pc}
 8005c28:	08007114 	.word	0x08007114
 8005c2c:	08007174 	.word	0x08007174
 8005c30:	08007120 	.word	0x08007120

08005c34 <follow_path>:
static
FRESULT follow_path (	/* FR_OK(0): successful, !=0: error code */
	DIR* dp,			/* Directory object to return last directory and found object */
	const TCHAR* path	/* Full-path string to find a file or directory */
)
{
 8005c34:	b580      	push	{r7, lr}
 8005c36:	b086      	sub	sp, #24
 8005c38:	af00      	add	r7, sp, #0
 8005c3a:	6078      	str	r0, [r7, #4]
 8005c3c:	6039      	str	r1, [r7, #0]
	FRESULT res;
	BYTE ns;
	_FDID *obj = &dp->obj;
 8005c3e:	687b      	ldr	r3, [r7, #4]
 8005c40:	613b      	str	r3, [r7, #16]
	FATFS *fs = obj->fs;
 8005c42:	693b      	ldr	r3, [r7, #16]
 8005c44:	681b      	ldr	r3, [r3, #0]
 8005c46:	60fb      	str	r3, [r7, #12]
	if (*path != '/' && *path != '\\') {	/* Without heading separator */
		obj->sclust = fs->cdir;				/* Start from current directory */
	} else
#endif
	{										/* With heading separator */
		while (*path == '/' || *path == '\\') path++;	/* Strip heading separator */
 8005c48:	e002      	b.n	8005c50 <follow_path+0x1c>
 8005c4a:	683b      	ldr	r3, [r7, #0]
 8005c4c:	3301      	adds	r3, #1
 8005c4e:	603b      	str	r3, [r7, #0]
 8005c50:	683b      	ldr	r3, [r7, #0]
 8005c52:	781b      	ldrb	r3, [r3, #0]
 8005c54:	2b2f      	cmp	r3, #47	; 0x2f
 8005c56:	d0f8      	beq.n	8005c4a <follow_path+0x16>
 8005c58:	683b      	ldr	r3, [r7, #0]
 8005c5a:	781b      	ldrb	r3, [r3, #0]
 8005c5c:	2b5c      	cmp	r3, #92	; 0x5c
 8005c5e:	d0f4      	beq.n	8005c4a <follow_path+0x16>
		obj->sclust = 0;					/* Start from root directory */
 8005c60:	693b      	ldr	r3, [r7, #16]
 8005c62:	2200      	movs	r2, #0
 8005c64:	609a      	str	r2, [r3, #8]
		obj->stat = fs->dirbuf[XDIR_GenFlags] & 2;
	}
#endif
#endif

	if ((UINT)*path < ' ') {				/* Null path name is the origin directory itself */
 8005c66:	683b      	ldr	r3, [r7, #0]
 8005c68:	781b      	ldrb	r3, [r3, #0]
 8005c6a:	2b1f      	cmp	r3, #31
 8005c6c:	d80a      	bhi.n	8005c84 <follow_path+0x50>
		dp->fn[NSFLAG] = NS_NONAME;
 8005c6e:	687b      	ldr	r3, [r7, #4]
 8005c70:	2280      	movs	r2, #128	; 0x80
 8005c72:	f883 202f 	strb.w	r2, [r3, #47]	; 0x2f
		res = dir_sdi(dp, 0);
 8005c76:	2100      	movs	r1, #0
 8005c78:	6878      	ldr	r0, [r7, #4]
 8005c7a:	f7ff f8fe 	bl	8004e7a <dir_sdi>
 8005c7e:	4603      	mov	r3, r0
 8005c80:	75fb      	strb	r3, [r7, #23]
 8005c82:	e048      	b.n	8005d16 <follow_path+0xe2>

	} else {								/* Follow path */
		for (;;) {
			res = create_name(dp, &path);	/* Get a segment name of the path */
 8005c84:	463b      	mov	r3, r7
 8005c86:	4619      	mov	r1, r3
 8005c88:	6878      	ldr	r0, [r7, #4]
 8005c8a:	f7ff fe1b 	bl	80058c4 <create_name>
 8005c8e:	4603      	mov	r3, r0
 8005c90:	75fb      	strb	r3, [r7, #23]
			if (res != FR_OK) break;
 8005c92:	7dfb      	ldrb	r3, [r7, #23]
 8005c94:	2b00      	cmp	r3, #0
 8005c96:	d139      	bne.n	8005d0c <follow_path+0xd8>
			res = dir_find(dp);				/* Find an object with the segment name */
 8005c98:	6878      	ldr	r0, [r7, #4]
 8005c9a:	f7ff fc5b 	bl	8005554 <dir_find>
 8005c9e:	4603      	mov	r3, r0
 8005ca0:	75fb      	strb	r3, [r7, #23]
			ns = dp->fn[NSFLAG];
 8005ca2:	687b      	ldr	r3, [r7, #4]
 8005ca4:	f893 302f 	ldrb.w	r3, [r3, #47]	; 0x2f
 8005ca8:	72fb      	strb	r3, [r7, #11]
			if (res != FR_OK) {				/* Failed to find the object */
 8005caa:	7dfb      	ldrb	r3, [r7, #23]
 8005cac:	2b00      	cmp	r3, #0
 8005cae:	d00a      	beq.n	8005cc6 <follow_path+0x92>
				if (res == FR_NO_FILE) {	/* Object is not found */
 8005cb0:	7dfb      	ldrb	r3, [r7, #23]
 8005cb2:	2b04      	cmp	r3, #4
 8005cb4:	d12c      	bne.n	8005d10 <follow_path+0xdc>
					if (_FS_RPATH && (ns & NS_DOT)) {	/* If dot entry is not exist, stay there */
						if (!(ns & NS_LAST)) continue;	/* Continue to follow if not last segment */
						dp->fn[NSFLAG] = NS_NONAME;
						res = FR_OK;
					} else {							/* Could not find the object */
						if (!(ns & NS_LAST)) res = FR_NO_PATH;	/* Adjust error code if not last segment */
 8005cb6:	7afb      	ldrb	r3, [r7, #11]
 8005cb8:	f003 0304 	and.w	r3, r3, #4
 8005cbc:	2b00      	cmp	r3, #0
 8005cbe:	d127      	bne.n	8005d10 <follow_path+0xdc>
 8005cc0:	2305      	movs	r3, #5
 8005cc2:	75fb      	strb	r3, [r7, #23]
					}
				}
				break;
 8005cc4:	e024      	b.n	8005d10 <follow_path+0xdc>
			}
			if (ns & NS_LAST) break;			/* Last segment matched. Function completed. */
 8005cc6:	7afb      	ldrb	r3, [r7, #11]
 8005cc8:	f003 0304 	and.w	r3, r3, #4
 8005ccc:	2b00      	cmp	r3, #0
 8005cce:	d121      	bne.n	8005d14 <follow_path+0xe0>
			/* Get into the sub-directory */
			if (!(obj->attr & AM_DIR)) {		/* It is not a sub-directory and cannot follow */
 8005cd0:	693b      	ldr	r3, [r7, #16]
 8005cd2:	799b      	ldrb	r3, [r3, #6]
 8005cd4:	f003 0310 	and.w	r3, r3, #16
 8005cd8:	2b00      	cmp	r3, #0
 8005cda:	d102      	bne.n	8005ce2 <follow_path+0xae>
				res = FR_NO_PATH; break;
 8005cdc:	2305      	movs	r3, #5
 8005cde:	75fb      	strb	r3, [r7, #23]
 8005ce0:	e019      	b.n	8005d16 <follow_path+0xe2>
				obj->stat = fs->dirbuf[XDIR_GenFlags] & 2;
				obj->objsize = ld_qword(fs->dirbuf + XDIR_FileSize);
			} else
#endif
			{
				obj->sclust = ld_clust(fs, fs->win + dp->dptr % SS(fs));	/* Open next directory */
 8005ce2:	68fb      	ldr	r3, [r7, #12]
 8005ce4:	f103 0138 	add.w	r1, r3, #56	; 0x38
 8005ce8:	687b      	ldr	r3, [r7, #4]
 8005cea:	695b      	ldr	r3, [r3, #20]
 8005cec:	68fa      	ldr	r2, [r7, #12]
 8005cee:	8992      	ldrh	r2, [r2, #12]
 8005cf0:	fbb3 f0f2 	udiv	r0, r3, r2
 8005cf4:	fb02 f200 	mul.w	r2, r2, r0
 8005cf8:	1a9b      	subs	r3, r3, r2
 8005cfa:	440b      	add	r3, r1
 8005cfc:	4619      	mov	r1, r3
 8005cfe:	68f8      	ldr	r0, [r7, #12]
 8005d00:	f7ff fa61 	bl	80051c6 <ld_clust>
 8005d04:	4602      	mov	r2, r0
 8005d06:	693b      	ldr	r3, [r7, #16]
 8005d08:	609a      	str	r2, [r3, #8]
			res = create_name(dp, &path);	/* Get a segment name of the path */
 8005d0a:	e7bb      	b.n	8005c84 <follow_path+0x50>
			if (res != FR_OK) break;
 8005d0c:	bf00      	nop
 8005d0e:	e002      	b.n	8005d16 <follow_path+0xe2>
				break;
 8005d10:	bf00      	nop
 8005d12:	e000      	b.n	8005d16 <follow_path+0xe2>
			if (ns & NS_LAST) break;			/* Last segment matched. Function completed. */
 8005d14:	bf00      	nop
			}
		}
	}

	return res;
 8005d16:	7dfb      	ldrb	r3, [r7, #23]
}
 8005d18:	4618      	mov	r0, r3
 8005d1a:	3718      	adds	r7, #24
 8005d1c:	46bd      	mov	sp, r7
 8005d1e:	bd80      	pop	{r7, pc}

08005d20 <get_ldnumber>:

static
int get_ldnumber (		/* Returns logical drive number (-1:invalid drive) */
	const TCHAR** path	/* Pointer to pointer to the path name */
)
{
 8005d20:	b480      	push	{r7}
 8005d22:	b087      	sub	sp, #28
 8005d24:	af00      	add	r7, sp, #0
 8005d26:	6078      	str	r0, [r7, #4]
	const TCHAR *tp, *tt;
	UINT i;
	int vol = -1;
 8005d28:	f04f 33ff 	mov.w	r3, #4294967295
 8005d2c:	613b      	str	r3, [r7, #16]
	char c;
	TCHAR tc;
#endif


	if (*path) {	/* If the pointer is not a null */
 8005d2e:	687b      	ldr	r3, [r7, #4]
 8005d30:	681b      	ldr	r3, [r3, #0]
 8005d32:	2b00      	cmp	r3, #0
 8005d34:	d031      	beq.n	8005d9a <get_ldnumber+0x7a>
		for (tt = *path; (UINT)*tt >= (_USE_LFN ? ' ' : '!') && *tt != ':'; tt++) ;	/* Find ':' in the path */
 8005d36:	687b      	ldr	r3, [r7, #4]
 8005d38:	681b      	ldr	r3, [r3, #0]
 8005d3a:	617b      	str	r3, [r7, #20]
 8005d3c:	e002      	b.n	8005d44 <get_ldnumber+0x24>
 8005d3e:	697b      	ldr	r3, [r7, #20]
 8005d40:	3301      	adds	r3, #1
 8005d42:	617b      	str	r3, [r7, #20]
 8005d44:	697b      	ldr	r3, [r7, #20]
 8005d46:	781b      	ldrb	r3, [r3, #0]
 8005d48:	2b1f      	cmp	r3, #31
 8005d4a:	d903      	bls.n	8005d54 <get_ldnumber+0x34>
 8005d4c:	697b      	ldr	r3, [r7, #20]
 8005d4e:	781b      	ldrb	r3, [r3, #0]
 8005d50:	2b3a      	cmp	r3, #58	; 0x3a
 8005d52:	d1f4      	bne.n	8005d3e <get_ldnumber+0x1e>
		if (*tt == ':') {	/* If a ':' is exist in the path name */
 8005d54:	697b      	ldr	r3, [r7, #20]
 8005d56:	781b      	ldrb	r3, [r3, #0]
 8005d58:	2b3a      	cmp	r3, #58	; 0x3a
 8005d5a:	d11c      	bne.n	8005d96 <get_ldnumber+0x76>
			tp = *path;
 8005d5c:	687b      	ldr	r3, [r7, #4]
 8005d5e:	681b      	ldr	r3, [r3, #0]
 8005d60:	60fb      	str	r3, [r7, #12]
			i = *tp++ - '0';
 8005d62:	68fb      	ldr	r3, [r7, #12]
 8005d64:	1c5a      	adds	r2, r3, #1
 8005d66:	60fa      	str	r2, [r7, #12]
 8005d68:	781b      	ldrb	r3, [r3, #0]
 8005d6a:	3b30      	subs	r3, #48	; 0x30
 8005d6c:	60bb      	str	r3, [r7, #8]
			if (i < 10 && tp == tt) {	/* Is there a numeric drive id? */
 8005d6e:	68bb      	ldr	r3, [r7, #8]
 8005d70:	2b09      	cmp	r3, #9
 8005d72:	d80e      	bhi.n	8005d92 <get_ldnumber+0x72>
 8005d74:	68fa      	ldr	r2, [r7, #12]
 8005d76:	697b      	ldr	r3, [r7, #20]
 8005d78:	429a      	cmp	r2, r3
 8005d7a:	d10a      	bne.n	8005d92 <get_ldnumber+0x72>
				if (i < _VOLUMES) {	/* If a drive id is found, get the value and strip it */
 8005d7c:	68bb      	ldr	r3, [r7, #8]
 8005d7e:	2b00      	cmp	r3, #0
 8005d80:	d107      	bne.n	8005d92 <get_ldnumber+0x72>
					vol = (int)i;
 8005d82:	68bb      	ldr	r3, [r7, #8]
 8005d84:	613b      	str	r3, [r7, #16]
					*path = ++tt;
 8005d86:	697b      	ldr	r3, [r7, #20]
 8005d88:	3301      	adds	r3, #1
 8005d8a:	617b      	str	r3, [r7, #20]
 8005d8c:	687b      	ldr	r3, [r7, #4]
 8005d8e:	697a      	ldr	r2, [r7, #20]
 8005d90:	601a      	str	r2, [r3, #0]
					vol = (int)i;
					*path = tt;
				}
			}
#endif
			return vol;
 8005d92:	693b      	ldr	r3, [r7, #16]
 8005d94:	e002      	b.n	8005d9c <get_ldnumber+0x7c>
		}
#if _FS_RPATH != 0 && _VOLUMES >= 2
		vol = CurrVol;	/* Current drive */
#else
		vol = 0;		/* Drive 0 */
 8005d96:	2300      	movs	r3, #0
 8005d98:	613b      	str	r3, [r7, #16]
#endif
	}
	return vol;
 8005d9a:	693b      	ldr	r3, [r7, #16]
}
 8005d9c:	4618      	mov	r0, r3
 8005d9e:	371c      	adds	r7, #28
 8005da0:	46bd      	mov	sp, r7
 8005da2:	f85d 7b04 	ldr.w	r7, [sp], #4
 8005da6:	4770      	bx	lr

08005da8 <check_fs>:
static
BYTE check_fs (	/* 0:FAT, 1:exFAT, 2:Valid BS but not FAT, 3:Not a BS, 4:Disk error */
	FATFS* fs,	/* File system object */
	DWORD sect	/* Sector# (lba) to load and check if it is an FAT-VBR or not */
)
{
 8005da8:	b580      	push	{r7, lr}
 8005daa:	b082      	sub	sp, #8
 8005dac:	af00      	add	r7, sp, #0
 8005dae:	6078      	str	r0, [r7, #4]
 8005db0:	6039      	str	r1, [r7, #0]
	fs->wflag = 0; fs->winsect = 0xFFFFFFFF;		/* Invaidate window */
 8005db2:	687b      	ldr	r3, [r7, #4]
 8005db4:	2200      	movs	r2, #0
 8005db6:	70da      	strb	r2, [r3, #3]
 8005db8:	687b      	ldr	r3, [r7, #4]
 8005dba:	f04f 32ff 	mov.w	r2, #4294967295
 8005dbe:	635a      	str	r2, [r3, #52]	; 0x34
	if (move_window(fs, sect) != FR_OK) return 4;	/* Load boot record */
 8005dc0:	6839      	ldr	r1, [r7, #0]
 8005dc2:	6878      	ldr	r0, [r7, #4]
 8005dc4:	f7fe fc80 	bl	80046c8 <move_window>
 8005dc8:	4603      	mov	r3, r0
 8005dca:	2b00      	cmp	r3, #0
 8005dcc:	d001      	beq.n	8005dd2 <check_fs+0x2a>
 8005dce:	2304      	movs	r3, #4
 8005dd0:	e038      	b.n	8005e44 <check_fs+0x9c>

	if (ld_word(fs->win + BS_55AA) != 0xAA55) return 3;	/* Check boot record signature (always placed here even if the sector size is >512) */
 8005dd2:	687b      	ldr	r3, [r7, #4]
 8005dd4:	3338      	adds	r3, #56	; 0x38
 8005dd6:	f503 73ff 	add.w	r3, r3, #510	; 0x1fe
 8005dda:	4618      	mov	r0, r3
 8005ddc:	f7fe f9c4 	bl	8004168 <ld_word>
 8005de0:	4603      	mov	r3, r0
 8005de2:	461a      	mov	r2, r3
 8005de4:	f64a 2355 	movw	r3, #43605	; 0xaa55
 8005de8:	429a      	cmp	r2, r3
 8005dea:	d001      	beq.n	8005df0 <check_fs+0x48>
 8005dec:	2303      	movs	r3, #3
 8005dee:	e029      	b.n	8005e44 <check_fs+0x9c>

	if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90)) {
 8005df0:	687b      	ldr	r3, [r7, #4]
 8005df2:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
 8005df6:	2be9      	cmp	r3, #233	; 0xe9
 8005df8:	d009      	beq.n	8005e0e <check_fs+0x66>
 8005dfa:	687b      	ldr	r3, [r7, #4]
 8005dfc:	f893 3038 	ldrb.w	r3, [r3, #56]	; 0x38
 8005e00:	2beb      	cmp	r3, #235	; 0xeb
 8005e02:	d11e      	bne.n	8005e42 <check_fs+0x9a>
 8005e04:	687b      	ldr	r3, [r7, #4]
 8005e06:	f893 303a 	ldrb.w	r3, [r3, #58]	; 0x3a
 8005e0a:	2b90      	cmp	r3, #144	; 0x90
 8005e0c:	d119      	bne.n	8005e42 <check_fs+0x9a>
		if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0;	/* Check "FAT" string */
 8005e0e:	687b      	ldr	r3, [r7, #4]
 8005e10:	3338      	adds	r3, #56	; 0x38
 8005e12:	3336      	adds	r3, #54	; 0x36
 8005e14:	4618      	mov	r0, r3
 8005e16:	f7fe f9bf 	bl	8004198 <ld_dword>
 8005e1a:	4603      	mov	r3, r0
 8005e1c:	f023 437f 	bic.w	r3, r3, #4278190080	; 0xff000000
 8005e20:	4a0a      	ldr	r2, [pc, #40]	; (8005e4c <check_fs+0xa4>)
 8005e22:	4293      	cmp	r3, r2
 8005e24:	d101      	bne.n	8005e2a <check_fs+0x82>
 8005e26:	2300      	movs	r3, #0
 8005e28:	e00c      	b.n	8005e44 <check_fs+0x9c>
		if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0;			/* Check "FAT3" string */
 8005e2a:	687b      	ldr	r3, [r7, #4]
 8005e2c:	3338      	adds	r3, #56	; 0x38
 8005e2e:	3352      	adds	r3, #82	; 0x52
 8005e30:	4618      	mov	r0, r3
 8005e32:	f7fe f9b1 	bl	8004198 <ld_dword>
 8005e36:	4602      	mov	r2, r0
 8005e38:	4b05      	ldr	r3, [pc, #20]	; (8005e50 <check_fs+0xa8>)
 8005e3a:	429a      	cmp	r2, r3
 8005e3c:	d101      	bne.n	8005e42 <check_fs+0x9a>
 8005e3e:	2300      	movs	r3, #0
 8005e40:	e000      	b.n	8005e44 <check_fs+0x9c>
	}
#if _FS_EXFAT
	if (!mem_cmp(fs->win + BS_JmpBoot, "\xEB\x76\x90" "EXFAT   ", 11)) return 1;
#endif
	return 2;
 8005e42:	2302      	movs	r3, #2
}
 8005e44:	4618      	mov	r0, r3
 8005e46:	3708      	adds	r7, #8
 8005e48:	46bd      	mov	sp, r7
 8005e4a:	bd80      	pop	{r7, pc}
 8005e4c:	00544146 	.word	0x00544146
 8005e50:	33544146 	.word	0x33544146

08005e54 <find_volume>:
FRESULT find_volume (	/* FR_OK(0): successful, !=0: any error occurred */
	const TCHAR** path,	/* Pointer to pointer to the path name (drive number) */
	FATFS** rfs,		/* Pointer to pointer to the found file system object */
	BYTE mode			/* !=0: Check write protection for write access */
)
{
 8005e54:	b580      	push	{r7, lr}
 8005e56:	b096      	sub	sp, #88	; 0x58
 8005e58:	af00      	add	r7, sp, #0
 8005e5a:	60f8      	str	r0, [r7, #12]
 8005e5c:	60b9      	str	r1, [r7, #8]
 8005e5e:	4613      	mov	r3, r2
 8005e60:	71fb      	strb	r3, [r7, #7]
	FATFS *fs;
	UINT i;


	/* Get logical drive number */
	*rfs = 0;
 8005e62:	68bb      	ldr	r3, [r7, #8]
 8005e64:	2200      	movs	r2, #0
 8005e66:	601a      	str	r2, [r3, #0]
	vol = get_ldnumber(path);
 8005e68:	68f8      	ldr	r0, [r7, #12]
 8005e6a:	f7ff ff59 	bl	8005d20 <get_ldnumber>
 8005e6e:	63f8      	str	r0, [r7, #60]	; 0x3c
	if (vol < 0) return FR_INVALID_DRIVE;
 8005e70:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
 8005e72:	2b00      	cmp	r3, #0
 8005e74:	da01      	bge.n	8005e7a <find_volume+0x26>
 8005e76:	230b      	movs	r3, #11
 8005e78:	e268      	b.n	800634c <find_volume+0x4f8>

	/* Check if the file system object is valid or not */
	fs = FatFs[vol];					/* Get pointer to the file system object */
 8005e7a:	4ab0      	ldr	r2, [pc, #704]	; (800613c <find_volume+0x2e8>)
 8005e7c:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
 8005e7e:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8005e82:	63bb      	str	r3, [r7, #56]	; 0x38
	if (!fs) return FR_NOT_ENABLED;		/* Is the file system object available? */
 8005e84:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005e86:	2b00      	cmp	r3, #0
 8005e88:	d101      	bne.n	8005e8e <find_volume+0x3a>
 8005e8a:	230c      	movs	r3, #12
 8005e8c:	e25e      	b.n	800634c <find_volume+0x4f8>

	ENTER_FF(fs);						/* Lock the volume */
	*rfs = fs;							/* Return pointer to the file system object */
 8005e8e:	68bb      	ldr	r3, [r7, #8]
 8005e90:	6bba      	ldr	r2, [r7, #56]	; 0x38
 8005e92:	601a      	str	r2, [r3, #0]

	mode &= (BYTE)~FA_READ;				/* Desired access mode, write access or not */
 8005e94:	79fb      	ldrb	r3, [r7, #7]
 8005e96:	f023 0301 	bic.w	r3, r3, #1
 8005e9a:	71fb      	strb	r3, [r7, #7]
	if (fs->fs_type) {					/* If the volume has been mounted */
 8005e9c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005e9e:	781b      	ldrb	r3, [r3, #0]
 8005ea0:	2b00      	cmp	r3, #0
 8005ea2:	d01a      	beq.n	8005eda <find_volume+0x86>
		stat = disk_status(fs->drv);
 8005ea4:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005ea6:	785b      	ldrb	r3, [r3, #1]
 8005ea8:	4618      	mov	r0, r3
 8005eaa:	f7fe f8bf 	bl	800402c <disk_status>
 8005eae:	4603      	mov	r3, r0
 8005eb0:	f887 3037 	strb.w	r3, [r7, #55]	; 0x37
		if (!(stat & STA_NOINIT)) {		/* and the physical drive is kept initialized */
 8005eb4:	f897 3037 	ldrb.w	r3, [r7, #55]	; 0x37
 8005eb8:	f003 0301 	and.w	r3, r3, #1
 8005ebc:	2b00      	cmp	r3, #0
 8005ebe:	d10c      	bne.n	8005eda <find_volume+0x86>
			if (!_FS_READONLY && mode && (stat & STA_PROTECT)) {	/* Check write protection if needed */
 8005ec0:	79fb      	ldrb	r3, [r7, #7]
 8005ec2:	2b00      	cmp	r3, #0
 8005ec4:	d007      	beq.n	8005ed6 <find_volume+0x82>
 8005ec6:	f897 3037 	ldrb.w	r3, [r7, #55]	; 0x37
 8005eca:	f003 0304 	and.w	r3, r3, #4
 8005ece:	2b00      	cmp	r3, #0
 8005ed0:	d001      	beq.n	8005ed6 <find_volume+0x82>
				return FR_WRITE_PROTECTED;
 8005ed2:	230a      	movs	r3, #10
 8005ed4:	e23a      	b.n	800634c <find_volume+0x4f8>
			}
			return FR_OK;				/* The file system object is valid */
 8005ed6:	2300      	movs	r3, #0
 8005ed8:	e238      	b.n	800634c <find_volume+0x4f8>
	}

	/* The file system object is not valid. */
	/* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */

	fs->fs_type = 0;					/* Clear the file system object */
 8005eda:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005edc:	2200      	movs	r2, #0
 8005ede:	701a      	strb	r2, [r3, #0]
	fs->drv = LD2PD(vol);				/* Bind the logical drive and a physical drive */
 8005ee0:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
 8005ee2:	b2da      	uxtb	r2, r3
 8005ee4:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005ee6:	705a      	strb	r2, [r3, #1]
	stat = disk_initialize(fs->drv);	/* Initialize the physical drive */
 8005ee8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005eea:	785b      	ldrb	r3, [r3, #1]
 8005eec:	4618      	mov	r0, r3
 8005eee:	f7fe f8b7 	bl	8004060 <disk_initialize>
 8005ef2:	4603      	mov	r3, r0
 8005ef4:	f887 3037 	strb.w	r3, [r7, #55]	; 0x37
	if (stat & STA_NOINIT) { 			/* Check if the initialization succeeded */
 8005ef8:	f897 3037 	ldrb.w	r3, [r7, #55]	; 0x37
 8005efc:	f003 0301 	and.w	r3, r3, #1
 8005f00:	2b00      	cmp	r3, #0
 8005f02:	d001      	beq.n	8005f08 <find_volume+0xb4>
		return FR_NOT_READY;			/* Failed to initialize due to no medium or hard error */
 8005f04:	2303      	movs	r3, #3
 8005f06:	e221      	b.n	800634c <find_volume+0x4f8>
	}
	if (!_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */
 8005f08:	79fb      	ldrb	r3, [r7, #7]
 8005f0a:	2b00      	cmp	r3, #0
 8005f0c:	d007      	beq.n	8005f1e <find_volume+0xca>
 8005f0e:	f897 3037 	ldrb.w	r3, [r7, #55]	; 0x37
 8005f12:	f003 0304 	and.w	r3, r3, #4
 8005f16:	2b00      	cmp	r3, #0
 8005f18:	d001      	beq.n	8005f1e <find_volume+0xca>
		return FR_WRITE_PROTECTED;
 8005f1a:	230a      	movs	r3, #10
 8005f1c:	e216      	b.n	800634c <find_volume+0x4f8>
	}
#if _MAX_SS != _MIN_SS					/* Get sector size (multiple sector size cfg only) */
	if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK) return FR_DISK_ERR;
 8005f1e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005f20:	7858      	ldrb	r0, [r3, #1]
 8005f22:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005f24:	330c      	adds	r3, #12
 8005f26:	461a      	mov	r2, r3
 8005f28:	2102      	movs	r1, #2
 8005f2a:	f7fe f8ff 	bl	800412c <disk_ioctl>
 8005f2e:	4603      	mov	r3, r0
 8005f30:	2b00      	cmp	r3, #0
 8005f32:	d001      	beq.n	8005f38 <find_volume+0xe4>
 8005f34:	2301      	movs	r3, #1
 8005f36:	e209      	b.n	800634c <find_volume+0x4f8>
	if (SS(fs) > _MAX_SS || SS(fs) < _MIN_SS || (SS(fs) & (SS(fs) - 1))) return FR_DISK_ERR;
 8005f38:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005f3a:	899b      	ldrh	r3, [r3, #12]
 8005f3c:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 8005f40:	d80d      	bhi.n	8005f5e <find_volume+0x10a>
 8005f42:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005f44:	899b      	ldrh	r3, [r3, #12]
 8005f46:	f5b3 7f00 	cmp.w	r3, #512	; 0x200
 8005f4a:	d308      	bcc.n	8005f5e <find_volume+0x10a>
 8005f4c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005f4e:	899b      	ldrh	r3, [r3, #12]
 8005f50:	461a      	mov	r2, r3
 8005f52:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005f54:	899b      	ldrh	r3, [r3, #12]
 8005f56:	3b01      	subs	r3, #1
 8005f58:	4013      	ands	r3, r2
 8005f5a:	2b00      	cmp	r3, #0
 8005f5c:	d001      	beq.n	8005f62 <find_volume+0x10e>
 8005f5e:	2301      	movs	r3, #1
 8005f60:	e1f4      	b.n	800634c <find_volume+0x4f8>
#endif

	/* Find an FAT partition on the drive. Supports only generic partitioning rules, FDISK and SFD. */
	bsect = 0;
 8005f62:	2300      	movs	r3, #0
 8005f64:	653b      	str	r3, [r7, #80]	; 0x50
	fmt = check_fs(fs, bsect);			/* Load sector 0 and check if it is an FAT-VBR as SFD */
 8005f66:	6d39      	ldr	r1, [r7, #80]	; 0x50
 8005f68:	6bb8      	ldr	r0, [r7, #56]	; 0x38
 8005f6a:	f7ff ff1d 	bl	8005da8 <check_fs>
 8005f6e:	4603      	mov	r3, r0
 8005f70:	f887 3057 	strb.w	r3, [r7, #87]	; 0x57
	if (fmt == 2 || (fmt < 2 && LD2PT(vol) != 0)) {	/* Not an FAT-VBR or forced partition number */
 8005f74:	f897 3057 	ldrb.w	r3, [r7, #87]	; 0x57
 8005f78:	2b02      	cmp	r3, #2
 8005f7a:	d14b      	bne.n	8006014 <find_volume+0x1c0>
		for (i = 0; i < 4; i++) {		/* Get partition offset */
 8005f7c:	2300      	movs	r3, #0
 8005f7e:	643b      	str	r3, [r7, #64]	; 0x40
 8005f80:	e01f      	b.n	8005fc2 <find_volume+0x16e>
			pt = fs->win + (MBR_Table + i * SZ_PTE);
 8005f82:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8005f84:	f103 0238 	add.w	r2, r3, #56	; 0x38
 8005f88:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8005f8a:	011b      	lsls	r3, r3, #4
 8005f8c:	f503 73df 	add.w	r3, r3, #446	; 0x1be
 8005f90:	4413      	add	r3, r2
 8005f92:	633b      	str	r3, [r7, #48]	; 0x30
			br[i] = pt[PTE_System] ? ld_dword(pt + PTE_StLba) : 0;
 8005f94:	6b3b      	ldr	r3, [r7, #48]	; 0x30
 8005f96:	3304      	adds	r3, #4
 8005f98:	781b      	ldrb	r3, [r3, #0]
 8005f9a:	2b00      	cmp	r3, #0
 8005f9c:	d006      	beq.n	8005fac <find_volume+0x158>
 8005f9e:	6b3b      	ldr	r3, [r7, #48]	; 0x30
 8005fa0:	3308      	adds	r3, #8
 8005fa2:	4618      	mov	r0, r3
 8005fa4:	f7fe f8f8 	bl	8004198 <ld_dword>
 8005fa8:	4602      	mov	r2, r0
 8005faa:	e000      	b.n	8005fae <find_volume+0x15a>
 8005fac:	2200      	movs	r2, #0
 8005fae:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8005fb0:	009b      	lsls	r3, r3, #2
 8005fb2:	f107 0158 	add.w	r1, r7, #88	; 0x58
 8005fb6:	440b      	add	r3, r1
 8005fb8:	f843 2c44 	str.w	r2, [r3, #-68]
		for (i = 0; i < 4; i++) {		/* Get partition offset */
 8005fbc:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8005fbe:	3301      	adds	r3, #1
 8005fc0:	643b      	str	r3, [r7, #64]	; 0x40
 8005fc2:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8005fc4:	2b03      	cmp	r3, #3
 8005fc6:	d9dc      	bls.n	8005f82 <find_volume+0x12e>
		}
		i = LD2PT(vol);					/* Partition number: 0:auto, 1-4:forced */
 8005fc8:	2300      	movs	r3, #0
 8005fca:	643b      	str	r3, [r7, #64]	; 0x40
		if (i) i--;
 8005fcc:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8005fce:	2b00      	cmp	r3, #0
 8005fd0:	d002      	beq.n	8005fd8 <find_volume+0x184>
 8005fd2:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8005fd4:	3b01      	subs	r3, #1
 8005fd6:	643b      	str	r3, [r7, #64]	; 0x40
		do {							/* Find an FAT volume */
			bsect = br[i];
 8005fd8:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8005fda:	009b      	lsls	r3, r3, #2
 8005fdc:	f107 0258 	add.w	r2, r7, #88	; 0x58
 8005fe0:	4413      	add	r3, r2
 8005fe2:	f853 3c44 	ldr.w	r3, [r3, #-68]
 8005fe6:	653b      	str	r3, [r7, #80]	; 0x50
			fmt = bsect ? check_fs(fs, bsect) : 3;	/* Check the partition */
 8005fe8:	6d3b      	ldr	r3, [r7, #80]	; 0x50
 8005fea:	2b00      	cmp	r3, #0
 8005fec:	d005      	beq.n	8005ffa <find_volume+0x1a6>
 8005fee:	6d39      	ldr	r1, [r7, #80]	; 0x50
 8005ff0:	6bb8      	ldr	r0, [r7, #56]	; 0x38
 8005ff2:	f7ff fed9 	bl	8005da8 <check_fs>
 8005ff6:	4603      	mov	r3, r0
 8005ff8:	e000      	b.n	8005ffc <find_volume+0x1a8>
 8005ffa:	2303      	movs	r3, #3
 8005ffc:	f887 3057 	strb.w	r3, [r7, #87]	; 0x57
		} while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4);
 8006000:	f897 3057 	ldrb.w	r3, [r7, #87]	; 0x57
 8006004:	2b01      	cmp	r3, #1
 8006006:	d905      	bls.n	8006014 <find_volume+0x1c0>
 8006008:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 800600a:	3301      	adds	r3, #1
 800600c:	643b      	str	r3, [r7, #64]	; 0x40
 800600e:	6c3b      	ldr	r3, [r7, #64]	; 0x40
 8006010:	2b03      	cmp	r3, #3
 8006012:	d9e1      	bls.n	8005fd8 <find_volume+0x184>
	}
	if (fmt == 4) return FR_DISK_ERR;		/* An error occured in the disk I/O layer */
 8006014:	f897 3057 	ldrb.w	r3, [r7, #87]	; 0x57
 8006018:	2b04      	cmp	r3, #4
 800601a:	d101      	bne.n	8006020 <find_volume+0x1cc>
 800601c:	2301      	movs	r3, #1
 800601e:	e195      	b.n	800634c <find_volume+0x4f8>
	if (fmt >= 2) return FR_NO_FILESYSTEM;	/* No FAT volume is found */
 8006020:	f897 3057 	ldrb.w	r3, [r7, #87]	; 0x57
 8006024:	2b01      	cmp	r3, #1
 8006026:	d901      	bls.n	800602c <find_volume+0x1d8>
 8006028:	230d      	movs	r3, #13
 800602a:	e18f      	b.n	800634c <find_volume+0x4f8>
#endif
		fmt = FS_EXFAT;			/* FAT sub-type */
	} else
#endif	/* _FS_EXFAT */
	{
		if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) return FR_NO_FILESYSTEM;	/* (BPB_BytsPerSec must be equal to the physical sector size) */
 800602c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800602e:	3338      	adds	r3, #56	; 0x38
 8006030:	330b      	adds	r3, #11
 8006032:	4618      	mov	r0, r3
 8006034:	f7fe f898 	bl	8004168 <ld_word>
 8006038:	4603      	mov	r3, r0
 800603a:	461a      	mov	r2, r3
 800603c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800603e:	899b      	ldrh	r3, [r3, #12]
 8006040:	429a      	cmp	r2, r3
 8006042:	d001      	beq.n	8006048 <find_volume+0x1f4>
 8006044:	230d      	movs	r3, #13
 8006046:	e181      	b.n	800634c <find_volume+0x4f8>

		fasize = ld_word(fs->win + BPB_FATSz16);		/* Number of sectors per FAT */
 8006048:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800604a:	3338      	adds	r3, #56	; 0x38
 800604c:	3316      	adds	r3, #22
 800604e:	4618      	mov	r0, r3
 8006050:	f7fe f88a 	bl	8004168 <ld_word>
 8006054:	4603      	mov	r3, r0
 8006056:	64fb      	str	r3, [r7, #76]	; 0x4c
		if (fasize == 0) fasize = ld_dword(fs->win + BPB_FATSz32);
 8006058:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
 800605a:	2b00      	cmp	r3, #0
 800605c:	d106      	bne.n	800606c <find_volume+0x218>
 800605e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006060:	3338      	adds	r3, #56	; 0x38
 8006062:	3324      	adds	r3, #36	; 0x24
 8006064:	4618      	mov	r0, r3
 8006066:	f7fe f897 	bl	8004198 <ld_dword>
 800606a:	64f8      	str	r0, [r7, #76]	; 0x4c
		fs->fsize = fasize;
 800606c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800606e:	6cfa      	ldr	r2, [r7, #76]	; 0x4c
 8006070:	621a      	str	r2, [r3, #32]

		fs->n_fats = fs->win[BPB_NumFATs];				/* Number of FATs */
 8006072:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006074:	f893 2048 	ldrb.w	r2, [r3, #72]	; 0x48
 8006078:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800607a:	709a      	strb	r2, [r3, #2]
		if (fs->n_fats != 1 && fs->n_fats != 2) return FR_NO_FILESYSTEM;	/* (Must be 1 or 2) */
 800607c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800607e:	789b      	ldrb	r3, [r3, #2]
 8006080:	2b01      	cmp	r3, #1
 8006082:	d005      	beq.n	8006090 <find_volume+0x23c>
 8006084:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006086:	789b      	ldrb	r3, [r3, #2]
 8006088:	2b02      	cmp	r3, #2
 800608a:	d001      	beq.n	8006090 <find_volume+0x23c>
 800608c:	230d      	movs	r3, #13
 800608e:	e15d      	b.n	800634c <find_volume+0x4f8>
		fasize *= fs->n_fats;							/* Number of sectors for FAT area */
 8006090:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006092:	789b      	ldrb	r3, [r3, #2]
 8006094:	461a      	mov	r2, r3
 8006096:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
 8006098:	fb02 f303 	mul.w	r3, r2, r3
 800609c:	64fb      	str	r3, [r7, #76]	; 0x4c

		fs->csize = fs->win[BPB_SecPerClus];			/* Cluster size */
 800609e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060a0:	f893 3045 	ldrb.w	r3, [r3, #69]	; 0x45
 80060a4:	b29a      	uxth	r2, r3
 80060a6:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060a8:	815a      	strh	r2, [r3, #10]
		if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) return FR_NO_FILESYSTEM;	/* (Must be power of 2) */
 80060aa:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060ac:	895b      	ldrh	r3, [r3, #10]
 80060ae:	2b00      	cmp	r3, #0
 80060b0:	d008      	beq.n	80060c4 <find_volume+0x270>
 80060b2:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060b4:	895b      	ldrh	r3, [r3, #10]
 80060b6:	461a      	mov	r2, r3
 80060b8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060ba:	895b      	ldrh	r3, [r3, #10]
 80060bc:	3b01      	subs	r3, #1
 80060be:	4013      	ands	r3, r2
 80060c0:	2b00      	cmp	r3, #0
 80060c2:	d001      	beq.n	80060c8 <find_volume+0x274>
 80060c4:	230d      	movs	r3, #13
 80060c6:	e141      	b.n	800634c <find_volume+0x4f8>

		fs->n_rootdir = ld_word(fs->win + BPB_RootEntCnt);	/* Number of root directory entries */
 80060c8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060ca:	3338      	adds	r3, #56	; 0x38
 80060cc:	3311      	adds	r3, #17
 80060ce:	4618      	mov	r0, r3
 80060d0:	f7fe f84a 	bl	8004168 <ld_word>
 80060d4:	4603      	mov	r3, r0
 80060d6:	461a      	mov	r2, r3
 80060d8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060da:	811a      	strh	r2, [r3, #8]
		if (fs->n_rootdir % (SS(fs) / SZDIRE)) return FR_NO_FILESYSTEM;	/* (Must be sector aligned) */
 80060dc:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060de:	891b      	ldrh	r3, [r3, #8]
 80060e0:	6bba      	ldr	r2, [r7, #56]	; 0x38
 80060e2:	8992      	ldrh	r2, [r2, #12]
 80060e4:	0952      	lsrs	r2, r2, #5
 80060e6:	b292      	uxth	r2, r2
 80060e8:	fbb3 f1f2 	udiv	r1, r3, r2
 80060ec:	fb02 f201 	mul.w	r2, r2, r1
 80060f0:	1a9b      	subs	r3, r3, r2
 80060f2:	b29b      	uxth	r3, r3
 80060f4:	2b00      	cmp	r3, #0
 80060f6:	d001      	beq.n	80060fc <find_volume+0x2a8>
 80060f8:	230d      	movs	r3, #13
 80060fa:	e127      	b.n	800634c <find_volume+0x4f8>

		tsect = ld_word(fs->win + BPB_TotSec16);		/* Number of sectors on the volume */
 80060fc:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80060fe:	3338      	adds	r3, #56	; 0x38
 8006100:	3313      	adds	r3, #19
 8006102:	4618      	mov	r0, r3
 8006104:	f7fe f830 	bl	8004168 <ld_word>
 8006108:	4603      	mov	r3, r0
 800610a:	64bb      	str	r3, [r7, #72]	; 0x48
		if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32);
 800610c:	6cbb      	ldr	r3, [r7, #72]	; 0x48
 800610e:	2b00      	cmp	r3, #0
 8006110:	d106      	bne.n	8006120 <find_volume+0x2cc>
 8006112:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006114:	3338      	adds	r3, #56	; 0x38
 8006116:	3320      	adds	r3, #32
 8006118:	4618      	mov	r0, r3
 800611a:	f7fe f83d 	bl	8004198 <ld_dword>
 800611e:	64b8      	str	r0, [r7, #72]	; 0x48

		nrsv = ld_word(fs->win + BPB_RsvdSecCnt);		/* Number of reserved sectors */
 8006120:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006122:	3338      	adds	r3, #56	; 0x38
 8006124:	330e      	adds	r3, #14
 8006126:	4618      	mov	r0, r3
 8006128:	f7fe f81e 	bl	8004168 <ld_word>
 800612c:	4603      	mov	r3, r0
 800612e:	85fb      	strh	r3, [r7, #46]	; 0x2e
		if (nrsv == 0) return FR_NO_FILESYSTEM;			/* (Must not be 0) */
 8006130:	8dfb      	ldrh	r3, [r7, #46]	; 0x2e
 8006132:	2b00      	cmp	r3, #0
 8006134:	d104      	bne.n	8006140 <find_volume+0x2ec>
 8006136:	230d      	movs	r3, #13
 8006138:	e108      	b.n	800634c <find_volume+0x4f8>
 800613a:	bf00      	nop
 800613c:	20000044 	.word	0x20000044

		/* Determine the FAT sub type */
		sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZDIRE);	/* RSV + FAT + DIR */
 8006140:	8dfa      	ldrh	r2, [r7, #46]	; 0x2e
 8006142:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
 8006144:	4413      	add	r3, r2
 8006146:	6bba      	ldr	r2, [r7, #56]	; 0x38
 8006148:	8911      	ldrh	r1, [r2, #8]
 800614a:	6bba      	ldr	r2, [r7, #56]	; 0x38
 800614c:	8992      	ldrh	r2, [r2, #12]
 800614e:	0952      	lsrs	r2, r2, #5
 8006150:	b292      	uxth	r2, r2
 8006152:	fbb1 f2f2 	udiv	r2, r1, r2
 8006156:	b292      	uxth	r2, r2
 8006158:	4413      	add	r3, r2
 800615a:	62bb      	str	r3, [r7, #40]	; 0x28
		if (tsect < sysect) return FR_NO_FILESYSTEM;	/* (Invalid volume size) */
 800615c:	6cba      	ldr	r2, [r7, #72]	; 0x48
 800615e:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8006160:	429a      	cmp	r2, r3
 8006162:	d201      	bcs.n	8006168 <find_volume+0x314>
 8006164:	230d      	movs	r3, #13
 8006166:	e0f1      	b.n	800634c <find_volume+0x4f8>
		nclst = (tsect - sysect) / fs->csize;			/* Number of clusters */
 8006168:	6cba      	ldr	r2, [r7, #72]	; 0x48
 800616a:	6abb      	ldr	r3, [r7, #40]	; 0x28
 800616c:	1ad3      	subs	r3, r2, r3
 800616e:	6bba      	ldr	r2, [r7, #56]	; 0x38
 8006170:	8952      	ldrh	r2, [r2, #10]
 8006172:	fbb3 f3f2 	udiv	r3, r3, r2
 8006176:	627b      	str	r3, [r7, #36]	; 0x24
		if (nclst == 0) return FR_NO_FILESYSTEM;		/* (Invalid volume size) */
 8006178:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 800617a:	2b00      	cmp	r3, #0
 800617c:	d101      	bne.n	8006182 <find_volume+0x32e>
 800617e:	230d      	movs	r3, #13
 8006180:	e0e4      	b.n	800634c <find_volume+0x4f8>
		fmt = FS_FAT32;
 8006182:	2303      	movs	r3, #3
 8006184:	f887 3057 	strb.w	r3, [r7, #87]	; 0x57
		if (nclst <= MAX_FAT16) fmt = FS_FAT16;
 8006188:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 800618a:	f64f 72f5 	movw	r2, #65525	; 0xfff5
 800618e:	4293      	cmp	r3, r2
 8006190:	d802      	bhi.n	8006198 <find_volume+0x344>
 8006192:	2302      	movs	r3, #2
 8006194:	f887 3057 	strb.w	r3, [r7, #87]	; 0x57
		if (nclst <= MAX_FAT12) fmt = FS_FAT12;
 8006198:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 800619a:	f640 72f5 	movw	r2, #4085	; 0xff5
 800619e:	4293      	cmp	r3, r2
 80061a0:	d802      	bhi.n	80061a8 <find_volume+0x354>
 80061a2:	2301      	movs	r3, #1
 80061a4:	f887 3057 	strb.w	r3, [r7, #87]	; 0x57

		/* Boundaries and Limits */
		fs->n_fatent = nclst + 2;						/* Number of FAT entries */
 80061a8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 80061aa:	1c9a      	adds	r2, r3, #2
 80061ac:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80061ae:	61da      	str	r2, [r3, #28]
		fs->volbase = bsect;							/* Volume start sector */
 80061b0:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80061b2:	6d3a      	ldr	r2, [r7, #80]	; 0x50
 80061b4:	625a      	str	r2, [r3, #36]	; 0x24
		fs->fatbase = bsect + nrsv; 					/* FAT start sector */
 80061b6:	8dfa      	ldrh	r2, [r7, #46]	; 0x2e
 80061b8:	6d3b      	ldr	r3, [r7, #80]	; 0x50
 80061ba:	441a      	add	r2, r3
 80061bc:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80061be:	629a      	str	r2, [r3, #40]	; 0x28
		fs->database = bsect + sysect;					/* Data start sector */
 80061c0:	6d3a      	ldr	r2, [r7, #80]	; 0x50
 80061c2:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80061c4:	441a      	add	r2, r3
 80061c6:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80061c8:	631a      	str	r2, [r3, #48]	; 0x30
		if (fmt == FS_FAT32) {
 80061ca:	f897 3057 	ldrb.w	r3, [r7, #87]	; 0x57
 80061ce:	2b03      	cmp	r3, #3
 80061d0:	d11e      	bne.n	8006210 <find_volume+0x3bc>
			if (ld_word(fs->win + BPB_FSVer32) != 0) return FR_NO_FILESYSTEM;	/* (Must be FAT32 revision 0.0) */
 80061d2:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80061d4:	3338      	adds	r3, #56	; 0x38
 80061d6:	332a      	adds	r3, #42	; 0x2a
 80061d8:	4618      	mov	r0, r3
 80061da:	f7fd ffc5 	bl	8004168 <ld_word>
 80061de:	4603      	mov	r3, r0
 80061e0:	2b00      	cmp	r3, #0
 80061e2:	d001      	beq.n	80061e8 <find_volume+0x394>
 80061e4:	230d      	movs	r3, #13
 80061e6:	e0b1      	b.n	800634c <find_volume+0x4f8>
			if (fs->n_rootdir) return FR_NO_FILESYSTEM;	/* (BPB_RootEntCnt must be 0) */
 80061e8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80061ea:	891b      	ldrh	r3, [r3, #8]
 80061ec:	2b00      	cmp	r3, #0
 80061ee:	d001      	beq.n	80061f4 <find_volume+0x3a0>
 80061f0:	230d      	movs	r3, #13
 80061f2:	e0ab      	b.n	800634c <find_volume+0x4f8>
			fs->dirbase = ld_dword(fs->win + BPB_RootClus32);	/* Root directory start cluster */
 80061f4:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80061f6:	3338      	adds	r3, #56	; 0x38
 80061f8:	332c      	adds	r3, #44	; 0x2c
 80061fa:	4618      	mov	r0, r3
 80061fc:	f7fd ffcc 	bl	8004198 <ld_dword>
 8006200:	4602      	mov	r2, r0
 8006202:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006204:	62da      	str	r2, [r3, #44]	; 0x2c
			szbfat = fs->n_fatent * 4;					/* (Needed FAT size) */
 8006206:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006208:	69db      	ldr	r3, [r3, #28]
 800620a:	009b      	lsls	r3, r3, #2
 800620c:	647b      	str	r3, [r7, #68]	; 0x44
 800620e:	e01f      	b.n	8006250 <find_volume+0x3fc>
		} else {
			if (fs->n_rootdir == 0)	return FR_NO_FILESYSTEM;/* (BPB_RootEntCnt must not be 0) */
 8006210:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006212:	891b      	ldrh	r3, [r3, #8]
 8006214:	2b00      	cmp	r3, #0
 8006216:	d101      	bne.n	800621c <find_volume+0x3c8>
 8006218:	230d      	movs	r3, #13
 800621a:	e097      	b.n	800634c <find_volume+0x4f8>
			fs->dirbase = fs->fatbase + fasize;			/* Root directory start sector */
 800621c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800621e:	6a9a      	ldr	r2, [r3, #40]	; 0x28
 8006220:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
 8006222:	441a      	add	r2, r3
 8006224:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006226:	62da      	str	r2, [r3, #44]	; 0x2c
			szbfat = (fmt == FS_FAT16) ?				/* (Needed FAT size) */
				fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1);
 8006228:	f897 3057 	ldrb.w	r3, [r7, #87]	; 0x57
 800622c:	2b02      	cmp	r3, #2
 800622e:	d103      	bne.n	8006238 <find_volume+0x3e4>
 8006230:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006232:	69db      	ldr	r3, [r3, #28]
 8006234:	005b      	lsls	r3, r3, #1
 8006236:	e00a      	b.n	800624e <find_volume+0x3fa>
 8006238:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800623a:	69da      	ldr	r2, [r3, #28]
 800623c:	4613      	mov	r3, r2
 800623e:	005b      	lsls	r3, r3, #1
 8006240:	4413      	add	r3, r2
 8006242:	085a      	lsrs	r2, r3, #1
 8006244:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006246:	69db      	ldr	r3, [r3, #28]
 8006248:	f003 0301 	and.w	r3, r3, #1
 800624c:	4413      	add	r3, r2
			szbfat = (fmt == FS_FAT16) ?				/* (Needed FAT size) */
 800624e:	647b      	str	r3, [r7, #68]	; 0x44
		}
		if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) return FR_NO_FILESYSTEM;	/* (BPB_FATSz must not be less than the size needed) */
 8006250:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006252:	6a1a      	ldr	r2, [r3, #32]
 8006254:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006256:	899b      	ldrh	r3, [r3, #12]
 8006258:	4619      	mov	r1, r3
 800625a:	6c7b      	ldr	r3, [r7, #68]	; 0x44
 800625c:	440b      	add	r3, r1
 800625e:	3b01      	subs	r3, #1
 8006260:	6bb9      	ldr	r1, [r7, #56]	; 0x38
 8006262:	8989      	ldrh	r1, [r1, #12]
 8006264:	fbb3 f3f1 	udiv	r3, r3, r1
 8006268:	429a      	cmp	r2, r3
 800626a:	d201      	bcs.n	8006270 <find_volume+0x41c>
 800626c:	230d      	movs	r3, #13
 800626e:	e06d      	b.n	800634c <find_volume+0x4f8>

#if !_FS_READONLY
		/* Get FSINFO if available */
		fs->last_clst = fs->free_clst = 0xFFFFFFFF;		/* Initialize cluster allocation information */
 8006270:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006272:	f04f 32ff 	mov.w	r2, #4294967295
 8006276:	619a      	str	r2, [r3, #24]
 8006278:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800627a:	699a      	ldr	r2, [r3, #24]
 800627c:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800627e:	615a      	str	r2, [r3, #20]
		fs->fsi_flag = 0x80;
 8006280:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006282:	2280      	movs	r2, #128	; 0x80
 8006284:	711a      	strb	r2, [r3, #4]
#if (_FS_NOFSINFO & 3) != 3
		if (fmt == FS_FAT32				/* Enable FSINFO only if FAT32 and BPB_FSInfo32 == 1 */
 8006286:	f897 3057 	ldrb.w	r3, [r7, #87]	; 0x57
 800628a:	2b03      	cmp	r3, #3
 800628c:	d149      	bne.n	8006322 <find_volume+0x4ce>
			&& ld_word(fs->win + BPB_FSInfo32) == 1
 800628e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006290:	3338      	adds	r3, #56	; 0x38
 8006292:	3330      	adds	r3, #48	; 0x30
 8006294:	4618      	mov	r0, r3
 8006296:	f7fd ff67 	bl	8004168 <ld_word>
 800629a:	4603      	mov	r3, r0
 800629c:	2b01      	cmp	r3, #1
 800629e:	d140      	bne.n	8006322 <find_volume+0x4ce>
			&& move_window(fs, bsect + 1) == FR_OK)
 80062a0:	6d3b      	ldr	r3, [r7, #80]	; 0x50
 80062a2:	3301      	adds	r3, #1
 80062a4:	4619      	mov	r1, r3
 80062a6:	6bb8      	ldr	r0, [r7, #56]	; 0x38
 80062a8:	f7fe fa0e 	bl	80046c8 <move_window>
 80062ac:	4603      	mov	r3, r0
 80062ae:	2b00      	cmp	r3, #0
 80062b0:	d137      	bne.n	8006322 <find_volume+0x4ce>
		{
			fs->fsi_flag = 0;
 80062b2:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80062b4:	2200      	movs	r2, #0
 80062b6:	711a      	strb	r2, [r3, #4]
			if (ld_word(fs->win + BS_55AA) == 0xAA55	/* Load FSINFO data if available */
 80062b8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80062ba:	3338      	adds	r3, #56	; 0x38
 80062bc:	f503 73ff 	add.w	r3, r3, #510	; 0x1fe
 80062c0:	4618      	mov	r0, r3
 80062c2:	f7fd ff51 	bl	8004168 <ld_word>
 80062c6:	4603      	mov	r3, r0
 80062c8:	461a      	mov	r2, r3
 80062ca:	f64a 2355 	movw	r3, #43605	; 0xaa55
 80062ce:	429a      	cmp	r2, r3
 80062d0:	d127      	bne.n	8006322 <find_volume+0x4ce>
				&& ld_dword(fs->win + FSI_LeadSig) == 0x41615252
 80062d2:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80062d4:	3338      	adds	r3, #56	; 0x38
 80062d6:	4618      	mov	r0, r3
 80062d8:	f7fd ff5e 	bl	8004198 <ld_dword>
 80062dc:	4602      	mov	r2, r0
 80062de:	4b1d      	ldr	r3, [pc, #116]	; (8006354 <find_volume+0x500>)
 80062e0:	429a      	cmp	r2, r3
 80062e2:	d11e      	bne.n	8006322 <find_volume+0x4ce>
				&& ld_dword(fs->win + FSI_StrucSig) == 0x61417272)
 80062e4:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80062e6:	3338      	adds	r3, #56	; 0x38
 80062e8:	f503 73f2 	add.w	r3, r3, #484	; 0x1e4
 80062ec:	4618      	mov	r0, r3
 80062ee:	f7fd ff53 	bl	8004198 <ld_dword>
 80062f2:	4602      	mov	r2, r0
 80062f4:	4b18      	ldr	r3, [pc, #96]	; (8006358 <find_volume+0x504>)
 80062f6:	429a      	cmp	r2, r3
 80062f8:	d113      	bne.n	8006322 <find_volume+0x4ce>
			{
#if (_FS_NOFSINFO & 1) == 0
				fs->free_clst = ld_dword(fs->win + FSI_Free_Count);
 80062fa:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80062fc:	3338      	adds	r3, #56	; 0x38
 80062fe:	f503 73f4 	add.w	r3, r3, #488	; 0x1e8
 8006302:	4618      	mov	r0, r3
 8006304:	f7fd ff48 	bl	8004198 <ld_dword>
 8006308:	4602      	mov	r2, r0
 800630a:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800630c:	619a      	str	r2, [r3, #24]
#endif
#if (_FS_NOFSINFO & 2) == 0
				fs->last_clst = ld_dword(fs->win + FSI_Nxt_Free);
 800630e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006310:	3338      	adds	r3, #56	; 0x38
 8006312:	f503 73f6 	add.w	r3, r3, #492	; 0x1ec
 8006316:	4618      	mov	r0, r3
 8006318:	f7fd ff3e 	bl	8004198 <ld_dword>
 800631c:	4602      	mov	r2, r0
 800631e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006320:	615a      	str	r2, [r3, #20]
		}
#endif	/* (_FS_NOFSINFO & 3) != 3 */
#endif	/* !_FS_READONLY */
	}

	fs->fs_type = fmt;		/* FAT sub-type */
 8006322:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006324:	f897 2057 	ldrb.w	r2, [r7, #87]	; 0x57
 8006328:	701a      	strb	r2, [r3, #0]
	fs->id = ++Fsid;		/* File system mount ID */
 800632a:	4b0c      	ldr	r3, [pc, #48]	; (800635c <find_volume+0x508>)
 800632c:	881b      	ldrh	r3, [r3, #0]
 800632e:	3301      	adds	r3, #1
 8006330:	b29a      	uxth	r2, r3
 8006332:	4b0a      	ldr	r3, [pc, #40]	; (800635c <find_volume+0x508>)
 8006334:	801a      	strh	r2, [r3, #0]
 8006336:	4b09      	ldr	r3, [pc, #36]	; (800635c <find_volume+0x508>)
 8006338:	881a      	ldrh	r2, [r3, #0]
 800633a:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800633c:	80da      	strh	r2, [r3, #6]
#if _USE_LFN == 1
	fs->lfnbuf = LfnBuf;	/* Static LFN working buffer */
 800633e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006340:	4a07      	ldr	r2, [pc, #28]	; (8006360 <find_volume+0x50c>)
 8006342:	611a      	str	r2, [r3, #16]
#endif
#if _FS_RPATH != 0
	fs->cdir = 0;			/* Initialize current directory */
#endif
#if _FS_LOCK != 0			/* Clear file lock semaphores */
	clear_lock(fs);
 8006344:	6bb8      	ldr	r0, [r7, #56]	; 0x38
 8006346:	f7fe f957 	bl	80045f8 <clear_lock>
#endif
	return FR_OK;
 800634a:	2300      	movs	r3, #0
}
 800634c:	4618      	mov	r0, r3
 800634e:	3758      	adds	r7, #88	; 0x58
 8006350:	46bd      	mov	sp, r7
 8006352:	bd80      	pop	{r7, pc}
 8006354:	41615252 	.word	0x41615252
 8006358:	61417272 	.word	0x61417272
 800635c:	20000048 	.word	0x20000048
 8006360:	2000006c 	.word	0x2000006c

08006364 <validate>:
static
FRESULT validate (	/* Returns FR_OK or FR_INVALID_OBJECT */
	_FDID* obj,		/* Pointer to the _OBJ, the 1st member in the FIL/DIR object, to check validity */
	FATFS** fs		/* Pointer to pointer to the owner file system object to return */
)
{
 8006364:	b580      	push	{r7, lr}
 8006366:	b084      	sub	sp, #16
 8006368:	af00      	add	r7, sp, #0
 800636a:	6078      	str	r0, [r7, #4]
 800636c:	6039      	str	r1, [r7, #0]
	FRESULT res = FR_INVALID_OBJECT;
 800636e:	2309      	movs	r3, #9
 8006370:	73fb      	strb	r3, [r7, #15]


	if (obj && obj->fs && obj->fs->fs_type && obj->id == obj->fs->id) {	/* Test if the object is valid */
 8006372:	687b      	ldr	r3, [r7, #4]
 8006374:	2b00      	cmp	r3, #0
 8006376:	d01c      	beq.n	80063b2 <validate+0x4e>
 8006378:	687b      	ldr	r3, [r7, #4]
 800637a:	681b      	ldr	r3, [r3, #0]
 800637c:	2b00      	cmp	r3, #0
 800637e:	d018      	beq.n	80063b2 <validate+0x4e>
 8006380:	687b      	ldr	r3, [r7, #4]
 8006382:	681b      	ldr	r3, [r3, #0]
 8006384:	781b      	ldrb	r3, [r3, #0]
 8006386:	2b00      	cmp	r3, #0
 8006388:	d013      	beq.n	80063b2 <validate+0x4e>
 800638a:	687b      	ldr	r3, [r7, #4]
 800638c:	889a      	ldrh	r2, [r3, #4]
 800638e:	687b      	ldr	r3, [r7, #4]
 8006390:	681b      	ldr	r3, [r3, #0]
 8006392:	88db      	ldrh	r3, [r3, #6]
 8006394:	429a      	cmp	r2, r3
 8006396:	d10c      	bne.n	80063b2 <validate+0x4e>
			}
		} else {
			res = FR_TIMEOUT;
		}
#else
		if (!(disk_status(obj->fs->drv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */
 8006398:	687b      	ldr	r3, [r7, #4]
 800639a:	681b      	ldr	r3, [r3, #0]
 800639c:	785b      	ldrb	r3, [r3, #1]
 800639e:	4618      	mov	r0, r3
 80063a0:	f7fd fe44 	bl	800402c <disk_status>
 80063a4:	4603      	mov	r3, r0
 80063a6:	f003 0301 	and.w	r3, r3, #1
 80063aa:	2b00      	cmp	r3, #0
 80063ac:	d101      	bne.n	80063b2 <validate+0x4e>
			res = FR_OK;
 80063ae:	2300      	movs	r3, #0
 80063b0:	73fb      	strb	r3, [r7, #15]
		}
#endif
	}
	*fs = (res == FR_OK) ? obj->fs : 0;	/* Corresponding filesystem object */
 80063b2:	7bfb      	ldrb	r3, [r7, #15]
 80063b4:	2b00      	cmp	r3, #0
 80063b6:	d102      	bne.n	80063be <validate+0x5a>
 80063b8:	687b      	ldr	r3, [r7, #4]
 80063ba:	681b      	ldr	r3, [r3, #0]
 80063bc:	e000      	b.n	80063c0 <validate+0x5c>
 80063be:	2300      	movs	r3, #0
 80063c0:	683a      	ldr	r2, [r7, #0]
 80063c2:	6013      	str	r3, [r2, #0]
	return res;
 80063c4:	7bfb      	ldrb	r3, [r7, #15]
}
 80063c6:	4618      	mov	r0, r3
 80063c8:	3710      	adds	r7, #16
 80063ca:	46bd      	mov	sp, r7
 80063cc:	bd80      	pop	{r7, pc}
	...

080063d0 <f_mount>:
FRESULT f_mount (
	FATFS* fs,			/* Pointer to the file system object (NULL:unmount)*/
	const TCHAR* path,	/* Logical drive number to be mounted/unmounted */
	BYTE opt			/* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */
)
{
 80063d0:	b580      	push	{r7, lr}
 80063d2:	b088      	sub	sp, #32
 80063d4:	af00      	add	r7, sp, #0
 80063d6:	60f8      	str	r0, [r7, #12]
 80063d8:	60b9      	str	r1, [r7, #8]
 80063da:	4613      	mov	r3, r2
 80063dc:	71fb      	strb	r3, [r7, #7]
	FATFS *cfs;
	int vol;
	FRESULT res;
	const TCHAR *rp = path;
 80063de:	68bb      	ldr	r3, [r7, #8]
 80063e0:	613b      	str	r3, [r7, #16]


	/* Get logical drive number */
	vol = get_ldnumber(&rp);
 80063e2:	f107 0310 	add.w	r3, r7, #16
 80063e6:	4618      	mov	r0, r3
 80063e8:	f7ff fc9a 	bl	8005d20 <get_ldnumber>
 80063ec:	61f8      	str	r0, [r7, #28]
	if (vol < 0) return FR_INVALID_DRIVE;
 80063ee:	69fb      	ldr	r3, [r7, #28]
 80063f0:	2b00      	cmp	r3, #0
 80063f2:	da01      	bge.n	80063f8 <f_mount+0x28>
 80063f4:	230b      	movs	r3, #11
 80063f6:	e02b      	b.n	8006450 <f_mount+0x80>
	cfs = FatFs[vol];					/* Pointer to fs object */
 80063f8:	4a17      	ldr	r2, [pc, #92]	; (8006458 <f_mount+0x88>)
 80063fa:	69fb      	ldr	r3, [r7, #28]
 80063fc:	f852 3023 	ldr.w	r3, [r2, r3, lsl #2]
 8006400:	61bb      	str	r3, [r7, #24]

	if (cfs) {
 8006402:	69bb      	ldr	r3, [r7, #24]
 8006404:	2b00      	cmp	r3, #0
 8006406:	d005      	beq.n	8006414 <f_mount+0x44>
#if _FS_LOCK != 0
		clear_lock(cfs);
 8006408:	69b8      	ldr	r0, [r7, #24]
 800640a:	f7fe f8f5 	bl	80045f8 <clear_lock>
#endif
#if _FS_REENTRANT						/* Discard sync object of the current volume */
		if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR;
#endif
		cfs->fs_type = 0;				/* Clear old fs object */
 800640e:	69bb      	ldr	r3, [r7, #24]
 8006410:	2200      	movs	r2, #0
 8006412:	701a      	strb	r2, [r3, #0]
	}

	if (fs) {
 8006414:	68fb      	ldr	r3, [r7, #12]
 8006416:	2b00      	cmp	r3, #0
 8006418:	d002      	beq.n	8006420 <f_mount+0x50>
		fs->fs_type = 0;				/* Clear new fs object */
 800641a:	68fb      	ldr	r3, [r7, #12]
 800641c:	2200      	movs	r2, #0
 800641e:	701a      	strb	r2, [r3, #0]
#if _FS_REENTRANT						/* Create sync object for the new volume */
		if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR;
#endif
	}
	FatFs[vol] = fs;					/* Register new fs object */
 8006420:	68fa      	ldr	r2, [r7, #12]
 8006422:	490d      	ldr	r1, [pc, #52]	; (8006458 <f_mount+0x88>)
 8006424:	69fb      	ldr	r3, [r7, #28]
 8006426:	f841 2023 	str.w	r2, [r1, r3, lsl #2]

	if (!fs || opt != 1) return FR_OK;	/* Do not mount now, it will be mounted later */
 800642a:	68fb      	ldr	r3, [r7, #12]
 800642c:	2b00      	cmp	r3, #0
 800642e:	d002      	beq.n	8006436 <f_mount+0x66>
 8006430:	79fb      	ldrb	r3, [r7, #7]
 8006432:	2b01      	cmp	r3, #1
 8006434:	d001      	beq.n	800643a <f_mount+0x6a>
 8006436:	2300      	movs	r3, #0
 8006438:	e00a      	b.n	8006450 <f_mount+0x80>

	res = find_volume(&path, &fs, 0);	/* Force mounted the volume */
 800643a:	f107 010c 	add.w	r1, r7, #12
 800643e:	f107 0308 	add.w	r3, r7, #8
 8006442:	2200      	movs	r2, #0
 8006444:	4618      	mov	r0, r3
 8006446:	f7ff fd05 	bl	8005e54 <find_volume>
 800644a:	4603      	mov	r3, r0
 800644c:	75fb      	strb	r3, [r7, #23]
	LEAVE_FF(fs, res);
 800644e:	7dfb      	ldrb	r3, [r7, #23]
}
 8006450:	4618      	mov	r0, r3
 8006452:	3720      	adds	r7, #32
 8006454:	46bd      	mov	sp, r7
 8006456:	bd80      	pop	{r7, pc}
 8006458:	20000044 	.word	0x20000044

0800645c <f_open>:
FRESULT f_open (
	FIL* fp,			/* Pointer to the blank file object */
	const TCHAR* path,	/* Pointer to the file name */
	BYTE mode			/* Access mode and file open mode flags */
)
{
 800645c:	b580      	push	{r7, lr}
 800645e:	b09a      	sub	sp, #104	; 0x68
 8006460:	af00      	add	r7, sp, #0
 8006462:	60f8      	str	r0, [r7, #12]
 8006464:	60b9      	str	r1, [r7, #8]
 8006466:	4613      	mov	r3, r2
 8006468:	71fb      	strb	r3, [r7, #7]
	FSIZE_t ofs;
#endif
	DEF_NAMBUF


	if (!fp) return FR_INVALID_OBJECT;
 800646a:	68fb      	ldr	r3, [r7, #12]
 800646c:	2b00      	cmp	r3, #0
 800646e:	d101      	bne.n	8006474 <f_open+0x18>
 8006470:	2309      	movs	r3, #9
 8006472:	e1bb      	b.n	80067ec <f_open+0x390>

	/* Get logical drive */
	mode &= _FS_READONLY ? FA_READ : FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_CREATE_NEW | FA_OPEN_ALWAYS | FA_OPEN_APPEND | FA_SEEKEND;
 8006474:	79fb      	ldrb	r3, [r7, #7]
 8006476:	f003 033f 	and.w	r3, r3, #63	; 0x3f
 800647a:	71fb      	strb	r3, [r7, #7]
	res = find_volume(&path, &fs, mode);
 800647c:	79fa      	ldrb	r2, [r7, #7]
 800647e:	f107 0114 	add.w	r1, r7, #20
 8006482:	f107 0308 	add.w	r3, r7, #8
 8006486:	4618      	mov	r0, r3
 8006488:	f7ff fce4 	bl	8005e54 <find_volume>
 800648c:	4603      	mov	r3, r0
 800648e:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
	if (res == FR_OK) {
 8006492:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 8006496:	2b00      	cmp	r3, #0
 8006498:	f040 819f 	bne.w	80067da <f_open+0x37e>
		dj.obj.fs = fs;
 800649c:	697b      	ldr	r3, [r7, #20]
 800649e:	61bb      	str	r3, [r7, #24]
		INIT_NAMBUF(fs);
		res = follow_path(&dj, path);	/* Follow the file path */
 80064a0:	68ba      	ldr	r2, [r7, #8]
 80064a2:	f107 0318 	add.w	r3, r7, #24
 80064a6:	4611      	mov	r1, r2
 80064a8:	4618      	mov	r0, r3
 80064aa:	f7ff fbc3 	bl	8005c34 <follow_path>
 80064ae:	4603      	mov	r3, r0
 80064b0:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
#if !_FS_READONLY	/* R/W configuration */
		if (res == FR_OK) {
 80064b4:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 80064b8:	2b00      	cmp	r3, #0
 80064ba:	d11a      	bne.n	80064f2 <f_open+0x96>
			if (dj.fn[NSFLAG] & NS_NONAME) {	/* Origin directory itself? */
 80064bc:	f897 3047 	ldrb.w	r3, [r7, #71]	; 0x47
 80064c0:	b25b      	sxtb	r3, r3
 80064c2:	2b00      	cmp	r3, #0
 80064c4:	da03      	bge.n	80064ce <f_open+0x72>
				res = FR_INVALID_NAME;
 80064c6:	2306      	movs	r3, #6
 80064c8:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
 80064cc:	e011      	b.n	80064f2 <f_open+0x96>
			}
#if _FS_LOCK != 0
			else {
				res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
 80064ce:	79fb      	ldrb	r3, [r7, #7]
 80064d0:	f023 0301 	bic.w	r3, r3, #1
 80064d4:	2b00      	cmp	r3, #0
 80064d6:	bf14      	ite	ne
 80064d8:	2301      	movne	r3, #1
 80064da:	2300      	moveq	r3, #0
 80064dc:	b2db      	uxtb	r3, r3
 80064de:	461a      	mov	r2, r3
 80064e0:	f107 0318 	add.w	r3, r7, #24
 80064e4:	4611      	mov	r1, r2
 80064e6:	4618      	mov	r0, r3
 80064e8:	f7fd ff3e 	bl	8004368 <chk_lock>
 80064ec:	4603      	mov	r3, r0
 80064ee:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
			}
#endif
		}
		/* Create or Open a file */
		if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) {
 80064f2:	79fb      	ldrb	r3, [r7, #7]
 80064f4:	f003 031c 	and.w	r3, r3, #28
 80064f8:	2b00      	cmp	r3, #0
 80064fa:	d07f      	beq.n	80065fc <f_open+0x1a0>
			if (res != FR_OK) {					/* No file, create new */
 80064fc:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 8006500:	2b00      	cmp	r3, #0
 8006502:	d017      	beq.n	8006534 <f_open+0xd8>
				if (res == FR_NO_FILE) {		/* There is no file to open, create a new entry */
 8006504:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 8006508:	2b04      	cmp	r3, #4
 800650a:	d10e      	bne.n	800652a <f_open+0xce>
#if _FS_LOCK != 0
					res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES;
 800650c:	f7fd ff88 	bl	8004420 <enq_lock>
 8006510:	4603      	mov	r3, r0
 8006512:	2b00      	cmp	r3, #0
 8006514:	d006      	beq.n	8006524 <f_open+0xc8>
 8006516:	f107 0318 	add.w	r3, r7, #24
 800651a:	4618      	mov	r0, r3
 800651c:	f7ff f8da 	bl	80056d4 <dir_register>
 8006520:	4603      	mov	r3, r0
 8006522:	e000      	b.n	8006526 <f_open+0xca>
 8006524:	2312      	movs	r3, #18
 8006526:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
#else
					res = dir_register(&dj);
#endif
				}
				mode |= FA_CREATE_ALWAYS;		/* File is created */
 800652a:	79fb      	ldrb	r3, [r7, #7]
 800652c:	f043 0308 	orr.w	r3, r3, #8
 8006530:	71fb      	strb	r3, [r7, #7]
 8006532:	e010      	b.n	8006556 <f_open+0xfa>
			}
			else {								/* Any object is already existing */
				if (dj.obj.attr & (AM_RDO | AM_DIR)) {	/* Cannot overwrite it (R/O or DIR) */
 8006534:	7fbb      	ldrb	r3, [r7, #30]
 8006536:	f003 0311 	and.w	r3, r3, #17
 800653a:	2b00      	cmp	r3, #0
 800653c:	d003      	beq.n	8006546 <f_open+0xea>
					res = FR_DENIED;
 800653e:	2307      	movs	r3, #7
 8006540:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
 8006544:	e007      	b.n	8006556 <f_open+0xfa>
				} else {
					if (mode & FA_CREATE_NEW) res = FR_EXIST;	/* Cannot create as new file */
 8006546:	79fb      	ldrb	r3, [r7, #7]
 8006548:	f003 0304 	and.w	r3, r3, #4
 800654c:	2b00      	cmp	r3, #0
 800654e:	d002      	beq.n	8006556 <f_open+0xfa>
 8006550:	2308      	movs	r3, #8
 8006552:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
				}
			}
			if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) {	/* Truncate it if overwrite mode */
 8006556:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 800655a:	2b00      	cmp	r3, #0
 800655c:	d168      	bne.n	8006630 <f_open+0x1d4>
 800655e:	79fb      	ldrb	r3, [r7, #7]
 8006560:	f003 0308 	and.w	r3, r3, #8
 8006564:	2b00      	cmp	r3, #0
 8006566:	d063      	beq.n	8006630 <f_open+0x1d4>
				dw = GET_FATTIME();
 8006568:	f7fd fd02 	bl	8003f70 <get_fattime>
 800656c:	65b8      	str	r0, [r7, #88]	; 0x58
					}
				} else
#endif
				{
					/* Clean directory info */
					st_dword(dj.dir + DIR_CrtTime, dw);	/* Set created time */
 800656e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006570:	330e      	adds	r3, #14
 8006572:	6db9      	ldr	r1, [r7, #88]	; 0x58
 8006574:	4618      	mov	r0, r3
 8006576:	f7fd fe4d 	bl	8004214 <st_dword>
					st_dword(dj.dir + DIR_ModTime, dw);	/* Set modified time */
 800657a:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 800657c:	3316      	adds	r3, #22
 800657e:	6db9      	ldr	r1, [r7, #88]	; 0x58
 8006580:	4618      	mov	r0, r3
 8006582:	f7fd fe47 	bl	8004214 <st_dword>
					dj.dir[DIR_Attr] = AM_ARC;			/* Reset attribute */
 8006586:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 8006588:	330b      	adds	r3, #11
 800658a:	2220      	movs	r2, #32
 800658c:	701a      	strb	r2, [r3, #0]
					cl = ld_clust(fs, dj.dir);			/* Get cluster chain */
 800658e:	697b      	ldr	r3, [r7, #20]
 8006590:	6bba      	ldr	r2, [r7, #56]	; 0x38
 8006592:	4611      	mov	r1, r2
 8006594:	4618      	mov	r0, r3
 8006596:	f7fe fe16 	bl	80051c6 <ld_clust>
 800659a:	6578      	str	r0, [r7, #84]	; 0x54
					st_clust(fs, dj.dir, 0);			/* Reset file allocation info */
 800659c:	697b      	ldr	r3, [r7, #20]
 800659e:	6bb9      	ldr	r1, [r7, #56]	; 0x38
 80065a0:	2200      	movs	r2, #0
 80065a2:	4618      	mov	r0, r3
 80065a4:	f7fe fe2e 	bl	8005204 <st_clust>
					st_dword(dj.dir + DIR_FileSize, 0);
 80065a8:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80065aa:	331c      	adds	r3, #28
 80065ac:	2100      	movs	r1, #0
 80065ae:	4618      	mov	r0, r3
 80065b0:	f7fd fe30 	bl	8004214 <st_dword>
					fs->wflag = 1;
 80065b4:	697b      	ldr	r3, [r7, #20]
 80065b6:	2201      	movs	r2, #1
 80065b8:	70da      	strb	r2, [r3, #3]

					if (cl) {							/* Remove the cluster chain if exist */
 80065ba:	6d7b      	ldr	r3, [r7, #84]	; 0x54
 80065bc:	2b00      	cmp	r3, #0
 80065be:	d037      	beq.n	8006630 <f_open+0x1d4>
						dw = fs->winsect;
 80065c0:	697b      	ldr	r3, [r7, #20]
 80065c2:	6b5b      	ldr	r3, [r3, #52]	; 0x34
 80065c4:	65bb      	str	r3, [r7, #88]	; 0x58
						res = remove_chain(&dj.obj, cl, 0);
 80065c6:	f107 0318 	add.w	r3, r7, #24
 80065ca:	2200      	movs	r2, #0
 80065cc:	6d79      	ldr	r1, [r7, #84]	; 0x54
 80065ce:	4618      	mov	r0, r3
 80065d0:	f7fe fb1e 	bl	8004c10 <remove_chain>
 80065d4:	4603      	mov	r3, r0
 80065d6:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
						if (res == FR_OK) {
 80065da:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 80065de:	2b00      	cmp	r3, #0
 80065e0:	d126      	bne.n	8006630 <f_open+0x1d4>
							res = move_window(fs, dw);
 80065e2:	697b      	ldr	r3, [r7, #20]
 80065e4:	6db9      	ldr	r1, [r7, #88]	; 0x58
 80065e6:	4618      	mov	r0, r3
 80065e8:	f7fe f86e 	bl	80046c8 <move_window>
 80065ec:	4603      	mov	r3, r0
 80065ee:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
							fs->last_clst = cl - 1;		/* Reuse the cluster hole */
 80065f2:	697b      	ldr	r3, [r7, #20]
 80065f4:	6d7a      	ldr	r2, [r7, #84]	; 0x54
 80065f6:	3a01      	subs	r2, #1
 80065f8:	615a      	str	r2, [r3, #20]
 80065fa:	e019      	b.n	8006630 <f_open+0x1d4>
					}
				}
			}
		}
		else {	/* Open an existing file */
			if (res == FR_OK) {					/* Following succeeded */
 80065fc:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 8006600:	2b00      	cmp	r3, #0
 8006602:	d115      	bne.n	8006630 <f_open+0x1d4>
				if (dj.obj.attr & AM_DIR) {		/* It is a directory */
 8006604:	7fbb      	ldrb	r3, [r7, #30]
 8006606:	f003 0310 	and.w	r3, r3, #16
 800660a:	2b00      	cmp	r3, #0
 800660c:	d003      	beq.n	8006616 <f_open+0x1ba>
					res = FR_NO_FILE;
 800660e:	2304      	movs	r3, #4
 8006610:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
 8006614:	e00c      	b.n	8006630 <f_open+0x1d4>
				} else {
					if ((mode & FA_WRITE) && (dj.obj.attr & AM_RDO)) { /* R/O violation */
 8006616:	79fb      	ldrb	r3, [r7, #7]
 8006618:	f003 0302 	and.w	r3, r3, #2
 800661c:	2b00      	cmp	r3, #0
 800661e:	d007      	beq.n	8006630 <f_open+0x1d4>
 8006620:	7fbb      	ldrb	r3, [r7, #30]
 8006622:	f003 0301 	and.w	r3, r3, #1
 8006626:	2b00      	cmp	r3, #0
 8006628:	d002      	beq.n	8006630 <f_open+0x1d4>
						res = FR_DENIED;
 800662a:	2307      	movs	r3, #7
 800662c:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
					}
				}
			}
		}
		if (res == FR_OK) {
 8006630:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 8006634:	2b00      	cmp	r3, #0
 8006636:	d128      	bne.n	800668a <f_open+0x22e>
			if (mode & FA_CREATE_ALWAYS)		/* Set file change flag if created or overwritten */
 8006638:	79fb      	ldrb	r3, [r7, #7]
 800663a:	f003 0308 	and.w	r3, r3, #8
 800663e:	2b00      	cmp	r3, #0
 8006640:	d003      	beq.n	800664a <f_open+0x1ee>
				mode |= FA_MODIFIED;
 8006642:	79fb      	ldrb	r3, [r7, #7]
 8006644:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8006648:	71fb      	strb	r3, [r7, #7]
			fp->dir_sect = fs->winsect;			/* Pointer to the directory entry */
 800664a:	697b      	ldr	r3, [r7, #20]
 800664c:	6b5a      	ldr	r2, [r3, #52]	; 0x34
 800664e:	68fb      	ldr	r3, [r7, #12]
 8006650:	625a      	str	r2, [r3, #36]	; 0x24
			fp->dir_ptr = dj.dir;
 8006652:	6bba      	ldr	r2, [r7, #56]	; 0x38
 8006654:	68fb      	ldr	r3, [r7, #12]
 8006656:	629a      	str	r2, [r3, #40]	; 0x28
#if _FS_LOCK != 0
			fp->obj.lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0);
 8006658:	79fb      	ldrb	r3, [r7, #7]
 800665a:	f023 0301 	bic.w	r3, r3, #1
 800665e:	2b00      	cmp	r3, #0
 8006660:	bf14      	ite	ne
 8006662:	2301      	movne	r3, #1
 8006664:	2300      	moveq	r3, #0
 8006666:	b2db      	uxtb	r3, r3
 8006668:	461a      	mov	r2, r3
 800666a:	f107 0318 	add.w	r3, r7, #24
 800666e:	4611      	mov	r1, r2
 8006670:	4618      	mov	r0, r3
 8006672:	f7fd fef7 	bl	8004464 <inc_lock>
 8006676:	4602      	mov	r2, r0
 8006678:	68fb      	ldr	r3, [r7, #12]
 800667a:	611a      	str	r2, [r3, #16]
			if (!fp->obj.lockid) res = FR_INT_ERR;
 800667c:	68fb      	ldr	r3, [r7, #12]
 800667e:	691b      	ldr	r3, [r3, #16]
 8006680:	2b00      	cmp	r3, #0
 8006682:	d102      	bne.n	800668a <f_open+0x22e>
 8006684:	2302      	movs	r3, #2
 8006686:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
				}
			}
		}
#endif

		if (res == FR_OK) {
 800668a:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 800668e:	2b00      	cmp	r3, #0
 8006690:	f040 80a3 	bne.w	80067da <f_open+0x37e>
				fp->obj.objsize = ld_qword(fs->dirbuf + XDIR_FileSize);
				fp->obj.stat = fs->dirbuf[XDIR_GenFlags] & 2;
			} else
#endif
			{
				fp->obj.sclust = ld_clust(fs, dj.dir);					/* Get object allocation info */
 8006694:	697b      	ldr	r3, [r7, #20]
 8006696:	6bba      	ldr	r2, [r7, #56]	; 0x38
 8006698:	4611      	mov	r1, r2
 800669a:	4618      	mov	r0, r3
 800669c:	f7fe fd93 	bl	80051c6 <ld_clust>
 80066a0:	4602      	mov	r2, r0
 80066a2:	68fb      	ldr	r3, [r7, #12]
 80066a4:	609a      	str	r2, [r3, #8]
				fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
 80066a6:	6bbb      	ldr	r3, [r7, #56]	; 0x38
 80066a8:	331c      	adds	r3, #28
 80066aa:	4618      	mov	r0, r3
 80066ac:	f7fd fd74 	bl	8004198 <ld_dword>
 80066b0:	4602      	mov	r2, r0
 80066b2:	68fb      	ldr	r3, [r7, #12]
 80066b4:	60da      	str	r2, [r3, #12]
			}
#if _USE_FASTSEEK
			fp->cltbl = 0;			/* Disable fast seek mode */
 80066b6:	68fb      	ldr	r3, [r7, #12]
 80066b8:	2200      	movs	r2, #0
 80066ba:	62da      	str	r2, [r3, #44]	; 0x2c
#endif
			fp->obj.fs = fs;	 	/* Validate the file object */
 80066bc:	697a      	ldr	r2, [r7, #20]
 80066be:	68fb      	ldr	r3, [r7, #12]
 80066c0:	601a      	str	r2, [r3, #0]
			fp->obj.id = fs->id;
 80066c2:	697b      	ldr	r3, [r7, #20]
 80066c4:	88da      	ldrh	r2, [r3, #6]
 80066c6:	68fb      	ldr	r3, [r7, #12]
 80066c8:	809a      	strh	r2, [r3, #4]
			fp->flag = mode;		/* Set file access mode */
 80066ca:	68fb      	ldr	r3, [r7, #12]
 80066cc:	79fa      	ldrb	r2, [r7, #7]
 80066ce:	751a      	strb	r2, [r3, #20]
			fp->err = 0;			/* Clear error flag */
 80066d0:	68fb      	ldr	r3, [r7, #12]
 80066d2:	2200      	movs	r2, #0
 80066d4:	755a      	strb	r2, [r3, #21]
			fp->sect = 0;			/* Invalidate current data sector */
 80066d6:	68fb      	ldr	r3, [r7, #12]
 80066d8:	2200      	movs	r2, #0
 80066da:	621a      	str	r2, [r3, #32]
			fp->fptr = 0;			/* Set file pointer top of the file */
 80066dc:	68fb      	ldr	r3, [r7, #12]
 80066de:	2200      	movs	r2, #0
 80066e0:	619a      	str	r2, [r3, #24]
#if !_FS_READONLY
#if !_FS_TINY
			mem_set(fp->buf, 0, _MAX_SS);	/* Clear sector buffer */
 80066e2:	68fb      	ldr	r3, [r7, #12]
 80066e4:	3330      	adds	r3, #48	; 0x30
 80066e6:	f44f 5280 	mov.w	r2, #4096	; 0x1000
 80066ea:	2100      	movs	r1, #0
 80066ec:	4618      	mov	r0, r3
 80066ee:	f7fd fdde 	bl	80042ae <mem_set>
#endif
			if ((mode & FA_SEEKEND) && fp->obj.objsize > 0) {	/* Seek to end of file if FA_OPEN_APPEND is specified */
 80066f2:	79fb      	ldrb	r3, [r7, #7]
 80066f4:	f003 0320 	and.w	r3, r3, #32
 80066f8:	2b00      	cmp	r3, #0
 80066fa:	d06e      	beq.n	80067da <f_open+0x37e>
 80066fc:	68fb      	ldr	r3, [r7, #12]
 80066fe:	68db      	ldr	r3, [r3, #12]
 8006700:	2b00      	cmp	r3, #0
 8006702:	d06a      	beq.n	80067da <f_open+0x37e>
				fp->fptr = fp->obj.objsize;			/* Offset to seek */
 8006704:	68fb      	ldr	r3, [r7, #12]
 8006706:	68da      	ldr	r2, [r3, #12]
 8006708:	68fb      	ldr	r3, [r7, #12]
 800670a:	619a      	str	r2, [r3, #24]
				bcs = (DWORD)fs->csize * SS(fs);	/* Cluster size in byte */
 800670c:	697b      	ldr	r3, [r7, #20]
 800670e:	895b      	ldrh	r3, [r3, #10]
 8006710:	461a      	mov	r2, r3
 8006712:	697b      	ldr	r3, [r7, #20]
 8006714:	899b      	ldrh	r3, [r3, #12]
 8006716:	fb03 f302 	mul.w	r3, r3, r2
 800671a:	653b      	str	r3, [r7, #80]	; 0x50
				clst = fp->obj.sclust;				/* Follow the cluster chain */
 800671c:	68fb      	ldr	r3, [r7, #12]
 800671e:	689b      	ldr	r3, [r3, #8]
 8006720:	663b      	str	r3, [r7, #96]	; 0x60
				for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) {
 8006722:	68fb      	ldr	r3, [r7, #12]
 8006724:	68db      	ldr	r3, [r3, #12]
 8006726:	65fb      	str	r3, [r7, #92]	; 0x5c
 8006728:	e016      	b.n	8006758 <f_open+0x2fc>
					clst = get_fat(&fp->obj, clst);
 800672a:	68fb      	ldr	r3, [r7, #12]
 800672c:	6e39      	ldr	r1, [r7, #96]	; 0x60
 800672e:	4618      	mov	r0, r3
 8006730:	f7fe f887 	bl	8004842 <get_fat>
 8006734:	6638      	str	r0, [r7, #96]	; 0x60
					if (clst <= 1) res = FR_INT_ERR;
 8006736:	6e3b      	ldr	r3, [r7, #96]	; 0x60
 8006738:	2b01      	cmp	r3, #1
 800673a:	d802      	bhi.n	8006742 <f_open+0x2e6>
 800673c:	2302      	movs	r3, #2
 800673e:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
					if (clst == 0xFFFFFFFF) res = FR_DISK_ERR;
 8006742:	6e3b      	ldr	r3, [r7, #96]	; 0x60
 8006744:	f1b3 3fff 	cmp.w	r3, #4294967295
 8006748:	d102      	bne.n	8006750 <f_open+0x2f4>
 800674a:	2301      	movs	r3, #1
 800674c:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
				for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) {
 8006750:	6dfa      	ldr	r2, [r7, #92]	; 0x5c
 8006752:	6d3b      	ldr	r3, [r7, #80]	; 0x50
 8006754:	1ad3      	subs	r3, r2, r3
 8006756:	65fb      	str	r3, [r7, #92]	; 0x5c
 8006758:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 800675c:	2b00      	cmp	r3, #0
 800675e:	d103      	bne.n	8006768 <f_open+0x30c>
 8006760:	6dfa      	ldr	r2, [r7, #92]	; 0x5c
 8006762:	6d3b      	ldr	r3, [r7, #80]	; 0x50
 8006764:	429a      	cmp	r2, r3
 8006766:	d8e0      	bhi.n	800672a <f_open+0x2ce>
				}
				fp->clust = clst;
 8006768:	68fb      	ldr	r3, [r7, #12]
 800676a:	6e3a      	ldr	r2, [r7, #96]	; 0x60
 800676c:	61da      	str	r2, [r3, #28]
				if (res == FR_OK && ofs % SS(fs)) {	/* Fill sector buffer if not on the sector boundary */
 800676e:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 8006772:	2b00      	cmp	r3, #0
 8006774:	d131      	bne.n	80067da <f_open+0x37e>
 8006776:	697b      	ldr	r3, [r7, #20]
 8006778:	899b      	ldrh	r3, [r3, #12]
 800677a:	461a      	mov	r2, r3
 800677c:	6dfb      	ldr	r3, [r7, #92]	; 0x5c
 800677e:	fbb3 f1f2 	udiv	r1, r3, r2
 8006782:	fb02 f201 	mul.w	r2, r2, r1
 8006786:	1a9b      	subs	r3, r3, r2
 8006788:	2b00      	cmp	r3, #0
 800678a:	d026      	beq.n	80067da <f_open+0x37e>
					if ((sc = clust2sect(fs, clst)) == 0) {
 800678c:	697b      	ldr	r3, [r7, #20]
 800678e:	6e39      	ldr	r1, [r7, #96]	; 0x60
 8006790:	4618      	mov	r0, r3
 8006792:	f7fe f837 	bl	8004804 <clust2sect>
 8006796:	64f8      	str	r0, [r7, #76]	; 0x4c
 8006798:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
 800679a:	2b00      	cmp	r3, #0
 800679c:	d103      	bne.n	80067a6 <f_open+0x34a>
						res = FR_INT_ERR;
 800679e:	2302      	movs	r3, #2
 80067a0:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
 80067a4:	e019      	b.n	80067da <f_open+0x37e>
					} else {
						fp->sect = sc + (DWORD)(ofs / SS(fs));
 80067a6:	697b      	ldr	r3, [r7, #20]
 80067a8:	899b      	ldrh	r3, [r3, #12]
 80067aa:	461a      	mov	r2, r3
 80067ac:	6dfb      	ldr	r3, [r7, #92]	; 0x5c
 80067ae:	fbb3 f2f2 	udiv	r2, r3, r2
 80067b2:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
 80067b4:	441a      	add	r2, r3
 80067b6:	68fb      	ldr	r3, [r7, #12]
 80067b8:	621a      	str	r2, [r3, #32]
#if !_FS_TINY
						if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR;
 80067ba:	697b      	ldr	r3, [r7, #20]
 80067bc:	7858      	ldrb	r0, [r3, #1]
 80067be:	68fb      	ldr	r3, [r7, #12]
 80067c0:	f103 0130 	add.w	r1, r3, #48	; 0x30
 80067c4:	68fb      	ldr	r3, [r7, #12]
 80067c6:	6a1a      	ldr	r2, [r3, #32]
 80067c8:	2301      	movs	r3, #1
 80067ca:	f7fd fc6f 	bl	80040ac <disk_read>
 80067ce:	4603      	mov	r3, r0
 80067d0:	2b00      	cmp	r3, #0
 80067d2:	d002      	beq.n	80067da <f_open+0x37e>
 80067d4:	2301      	movs	r3, #1
 80067d6:	f887 3067 	strb.w	r3, [r7, #103]	; 0x67
		}

		FREE_NAMBUF();
	}

	if (res != FR_OK) fp->obj.fs = 0;	/* Invalidate file object on error */
 80067da:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
 80067de:	2b00      	cmp	r3, #0
 80067e0:	d002      	beq.n	80067e8 <f_open+0x38c>
 80067e2:	68fb      	ldr	r3, [r7, #12]
 80067e4:	2200      	movs	r2, #0
 80067e6:	601a      	str	r2, [r3, #0]

	LEAVE_FF(fs, res);
 80067e8:	f897 3067 	ldrb.w	r3, [r7, #103]	; 0x67
}
 80067ec:	4618      	mov	r0, r3
 80067ee:	3768      	adds	r7, #104	; 0x68
 80067f0:	46bd      	mov	sp, r7
 80067f2:	bd80      	pop	{r7, pc}

080067f4 <f_write>:
	FIL* fp,			/* Pointer to the file object */
	const void* buff,	/* Pointer to the data to be written */
	UINT btw,			/* Number of bytes to write */
	UINT* bw			/* Pointer to number of bytes written */
)
{
 80067f4:	b580      	push	{r7, lr}
 80067f6:	b08c      	sub	sp, #48	; 0x30
 80067f8:	af00      	add	r7, sp, #0
 80067fa:	60f8      	str	r0, [r7, #12]
 80067fc:	60b9      	str	r1, [r7, #8]
 80067fe:	607a      	str	r2, [r7, #4]
 8006800:	603b      	str	r3, [r7, #0]
	FRESULT res;
	FATFS *fs;
	DWORD clst, sect;
	UINT wcnt, cc, csect;
	const BYTE *wbuff = (const BYTE*)buff;
 8006802:	68bb      	ldr	r3, [r7, #8]
 8006804:	61fb      	str	r3, [r7, #28]


	*bw = 0;	/* Clear write byte counter */
 8006806:	683b      	ldr	r3, [r7, #0]
 8006808:	2200      	movs	r2, #0
 800680a:	601a      	str	r2, [r3, #0]
	res = validate(&fp->obj, &fs);			/* Check validity of the file object */
 800680c:	68fb      	ldr	r3, [r7, #12]
 800680e:	f107 0210 	add.w	r2, r7, #16
 8006812:	4611      	mov	r1, r2
 8006814:	4618      	mov	r0, r3
 8006816:	f7ff fda5 	bl	8006364 <validate>
 800681a:	4603      	mov	r3, r0
 800681c:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
	if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res);	/* Check validity */
 8006820:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8006824:	2b00      	cmp	r3, #0
 8006826:	d107      	bne.n	8006838 <f_write+0x44>
 8006828:	68fb      	ldr	r3, [r7, #12]
 800682a:	7d5b      	ldrb	r3, [r3, #21]
 800682c:	f887 302f 	strb.w	r3, [r7, #47]	; 0x2f
 8006830:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 8006834:	2b00      	cmp	r3, #0
 8006836:	d002      	beq.n	800683e <f_write+0x4a>
 8006838:	f897 302f 	ldrb.w	r3, [r7, #47]	; 0x2f
 800683c:	e16a      	b.n	8006b14 <f_write+0x320>
	if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED);	/* Check access mode */
 800683e:	68fb      	ldr	r3, [r7, #12]
 8006840:	7d1b      	ldrb	r3, [r3, #20]
 8006842:	f003 0302 	and.w	r3, r3, #2
 8006846:	2b00      	cmp	r3, #0
 8006848:	d101      	bne.n	800684e <f_write+0x5a>
 800684a:	2307      	movs	r3, #7
 800684c:	e162      	b.n	8006b14 <f_write+0x320>

	/* Check fptr wrap-around (file size cannot reach 4GiB on FATxx) */
	if ((!_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) {
 800684e:	68fb      	ldr	r3, [r7, #12]
 8006850:	699a      	ldr	r2, [r3, #24]
 8006852:	687b      	ldr	r3, [r7, #4]
 8006854:	441a      	add	r2, r3
 8006856:	68fb      	ldr	r3, [r7, #12]
 8006858:	699b      	ldr	r3, [r3, #24]
 800685a:	429a      	cmp	r2, r3
 800685c:	f080 814c 	bcs.w	8006af8 <f_write+0x304>
		btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
 8006860:	68fb      	ldr	r3, [r7, #12]
 8006862:	699b      	ldr	r3, [r3, #24]
 8006864:	43db      	mvns	r3, r3
 8006866:	607b      	str	r3, [r7, #4]
	}

	for ( ;  btw;							/* Repeat until all data written */
 8006868:	e146      	b.n	8006af8 <f_write+0x304>
		wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize, *bw += wcnt, btw -= wcnt) {
		if (fp->fptr % SS(fs) == 0) {		/* On the sector boundary? */
 800686a:	68fb      	ldr	r3, [r7, #12]
 800686c:	699b      	ldr	r3, [r3, #24]
 800686e:	693a      	ldr	r2, [r7, #16]
 8006870:	8992      	ldrh	r2, [r2, #12]
 8006872:	fbb3 f1f2 	udiv	r1, r3, r2
 8006876:	fb02 f201 	mul.w	r2, r2, r1
 800687a:	1a9b      	subs	r3, r3, r2
 800687c:	2b00      	cmp	r3, #0
 800687e:	f040 80f1 	bne.w	8006a64 <f_write+0x270>
			csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1);	/* Sector offset in the cluster */
 8006882:	68fb      	ldr	r3, [r7, #12]
 8006884:	699b      	ldr	r3, [r3, #24]
 8006886:	693a      	ldr	r2, [r7, #16]
 8006888:	8992      	ldrh	r2, [r2, #12]
 800688a:	fbb3 f3f2 	udiv	r3, r3, r2
 800688e:	693a      	ldr	r2, [r7, #16]
 8006890:	8952      	ldrh	r2, [r2, #10]
 8006892:	3a01      	subs	r2, #1
 8006894:	4013      	ands	r3, r2
 8006896:	61bb      	str	r3, [r7, #24]
			if (csect == 0) {				/* On the cluster boundary? */
 8006898:	69bb      	ldr	r3, [r7, #24]
 800689a:	2b00      	cmp	r3, #0
 800689c:	d143      	bne.n	8006926 <f_write+0x132>
				if (fp->fptr == 0) {		/* On the top of the file? */
 800689e:	68fb      	ldr	r3, [r7, #12]
 80068a0:	699b      	ldr	r3, [r3, #24]
 80068a2:	2b00      	cmp	r3, #0
 80068a4:	d10c      	bne.n	80068c0 <f_write+0xcc>
					clst = fp->obj.sclust;	/* Follow from the origin */
 80068a6:	68fb      	ldr	r3, [r7, #12]
 80068a8:	689b      	ldr	r3, [r3, #8]
 80068aa:	62bb      	str	r3, [r7, #40]	; 0x28
					if (clst == 0) {		/* If no cluster is allocated, */
 80068ac:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80068ae:	2b00      	cmp	r3, #0
 80068b0:	d11a      	bne.n	80068e8 <f_write+0xf4>
						clst = create_chain(&fp->obj, 0);	/* create a new cluster chain */
 80068b2:	68fb      	ldr	r3, [r7, #12]
 80068b4:	2100      	movs	r1, #0
 80068b6:	4618      	mov	r0, r3
 80068b8:	f7fe fa0f 	bl	8004cda <create_chain>
 80068bc:	62b8      	str	r0, [r7, #40]	; 0x28
 80068be:	e013      	b.n	80068e8 <f_write+0xf4>
					}
				} else {					/* On the middle or end of the file */
#if _USE_FASTSEEK
					if (fp->cltbl) {
 80068c0:	68fb      	ldr	r3, [r7, #12]
 80068c2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
 80068c4:	2b00      	cmp	r3, #0
 80068c6:	d007      	beq.n	80068d8 <f_write+0xe4>
						clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */
 80068c8:	68fb      	ldr	r3, [r7, #12]
 80068ca:	699b      	ldr	r3, [r3, #24]
 80068cc:	4619      	mov	r1, r3
 80068ce:	68f8      	ldr	r0, [r7, #12]
 80068d0:	f7fe fa9b 	bl	8004e0a <clmt_clust>
 80068d4:	62b8      	str	r0, [r7, #40]	; 0x28
 80068d6:	e007      	b.n	80068e8 <f_write+0xf4>
					} else
#endif
					{
						clst = create_chain(&fp->obj, fp->clust);	/* Follow or stretch cluster chain on the FAT */
 80068d8:	68fa      	ldr	r2, [r7, #12]
 80068da:	68fb      	ldr	r3, [r7, #12]
 80068dc:	69db      	ldr	r3, [r3, #28]
 80068de:	4619      	mov	r1, r3
 80068e0:	4610      	mov	r0, r2
 80068e2:	f7fe f9fa 	bl	8004cda <create_chain>
 80068e6:	62b8      	str	r0, [r7, #40]	; 0x28
					}
				}
				if (clst == 0) break;		/* Could not allocate a new cluster (disk full) */
 80068e8:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80068ea:	2b00      	cmp	r3, #0
 80068ec:	f000 8109 	beq.w	8006b02 <f_write+0x30e>
				if (clst == 1) ABORT(fs, FR_INT_ERR);
 80068f0:	6abb      	ldr	r3, [r7, #40]	; 0x28
 80068f2:	2b01      	cmp	r3, #1
 80068f4:	d104      	bne.n	8006900 <f_write+0x10c>
 80068f6:	68fb      	ldr	r3, [r7, #12]
 80068f8:	2202      	movs	r2, #2
 80068fa:	755a      	strb	r2, [r3, #21]
 80068fc:	2302      	movs	r3, #2
 80068fe:	e109      	b.n	8006b14 <f_write+0x320>
				if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR);
 8006900:	6abb      	ldr	r3, [r7, #40]	; 0x28
 8006902:	f1b3 3fff 	cmp.w	r3, #4294967295
 8006906:	d104      	bne.n	8006912 <f_write+0x11e>
 8006908:	68fb      	ldr	r3, [r7, #12]
 800690a:	2201      	movs	r2, #1
 800690c:	755a      	strb	r2, [r3, #21]
 800690e:	2301      	movs	r3, #1
 8006910:	e100      	b.n	8006b14 <f_write+0x320>
				fp->clust = clst;			/* Update current cluster */
 8006912:	68fb      	ldr	r3, [r7, #12]
 8006914:	6aba      	ldr	r2, [r7, #40]	; 0x28
 8006916:	61da      	str	r2, [r3, #28]
				if (fp->obj.sclust == 0) fp->obj.sclust = clst;	/* Set start cluster if the first write */
 8006918:	68fb      	ldr	r3, [r7, #12]
 800691a:	689b      	ldr	r3, [r3, #8]
 800691c:	2b00      	cmp	r3, #0
 800691e:	d102      	bne.n	8006926 <f_write+0x132>
 8006920:	68fb      	ldr	r3, [r7, #12]
 8006922:	6aba      	ldr	r2, [r7, #40]	; 0x28
 8006924:	609a      	str	r2, [r3, #8]
			}
#if _FS_TINY
			if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR);	/* Write-back sector cache */
#else
			if (fp->flag & FA_DIRTY) {		/* Write-back sector cache */
 8006926:	68fb      	ldr	r3, [r7, #12]
 8006928:	7d1b      	ldrb	r3, [r3, #20]
 800692a:	b25b      	sxtb	r3, r3
 800692c:	2b00      	cmp	r3, #0
 800692e:	da18      	bge.n	8006962 <f_write+0x16e>
				if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR);
 8006930:	693b      	ldr	r3, [r7, #16]
 8006932:	7858      	ldrb	r0, [r3, #1]
 8006934:	68fb      	ldr	r3, [r7, #12]
 8006936:	f103 0130 	add.w	r1, r3, #48	; 0x30
 800693a:	68fb      	ldr	r3, [r7, #12]
 800693c:	6a1a      	ldr	r2, [r3, #32]
 800693e:	2301      	movs	r3, #1
 8006940:	f7fd fbd4 	bl	80040ec <disk_write>
 8006944:	4603      	mov	r3, r0
 8006946:	2b00      	cmp	r3, #0
 8006948:	d004      	beq.n	8006954 <f_write+0x160>
 800694a:	68fb      	ldr	r3, [r7, #12]
 800694c:	2201      	movs	r2, #1
 800694e:	755a      	strb	r2, [r3, #21]
 8006950:	2301      	movs	r3, #1
 8006952:	e0df      	b.n	8006b14 <f_write+0x320>
				fp->flag &= (BYTE)~FA_DIRTY;
 8006954:	68fb      	ldr	r3, [r7, #12]
 8006956:	7d1b      	ldrb	r3, [r3, #20]
 8006958:	f003 037f 	and.w	r3, r3, #127	; 0x7f
 800695c:	b2da      	uxtb	r2, r3
 800695e:	68fb      	ldr	r3, [r7, #12]
 8006960:	751a      	strb	r2, [r3, #20]
			}
#endif
			sect = clust2sect(fs, fp->clust);	/* Get current sector */
 8006962:	693a      	ldr	r2, [r7, #16]
 8006964:	68fb      	ldr	r3, [r7, #12]
 8006966:	69db      	ldr	r3, [r3, #28]
 8006968:	4619      	mov	r1, r3
 800696a:	4610      	mov	r0, r2
 800696c:	f7fd ff4a 	bl	8004804 <clust2sect>
 8006970:	6178      	str	r0, [r7, #20]
			if (!sect) ABORT(fs, FR_INT_ERR);
 8006972:	697b      	ldr	r3, [r7, #20]
 8006974:	2b00      	cmp	r3, #0
 8006976:	d104      	bne.n	8006982 <f_write+0x18e>
 8006978:	68fb      	ldr	r3, [r7, #12]
 800697a:	2202      	movs	r2, #2
 800697c:	755a      	strb	r2, [r3, #21]
 800697e:	2302      	movs	r3, #2
 8006980:	e0c8      	b.n	8006b14 <f_write+0x320>
			sect += csect;
 8006982:	697a      	ldr	r2, [r7, #20]
 8006984:	69bb      	ldr	r3, [r7, #24]
 8006986:	4413      	add	r3, r2
 8006988:	617b      	str	r3, [r7, #20]
			cc = btw / SS(fs);				/* When remaining bytes >= sector size, */
 800698a:	693b      	ldr	r3, [r7, #16]
 800698c:	899b      	ldrh	r3, [r3, #12]
 800698e:	461a      	mov	r2, r3
 8006990:	687b      	ldr	r3, [r7, #4]
 8006992:	fbb3 f3f2 	udiv	r3, r3, r2
 8006996:	623b      	str	r3, [r7, #32]
			if (cc) {						/* Write maximum contiguous sectors directly */
 8006998:	6a3b      	ldr	r3, [r7, #32]
 800699a:	2b00      	cmp	r3, #0
 800699c:	d043      	beq.n	8006a26 <f_write+0x232>
				if (csect + cc > fs->csize) {	/* Clip at cluster boundary */
 800699e:	69ba      	ldr	r2, [r7, #24]
 80069a0:	6a3b      	ldr	r3, [r7, #32]
 80069a2:	4413      	add	r3, r2
 80069a4:	693a      	ldr	r2, [r7, #16]
 80069a6:	8952      	ldrh	r2, [r2, #10]
 80069a8:	4293      	cmp	r3, r2
 80069aa:	d905      	bls.n	80069b8 <f_write+0x1c4>
					cc = fs->csize - csect;
 80069ac:	693b      	ldr	r3, [r7, #16]
 80069ae:	895b      	ldrh	r3, [r3, #10]
 80069b0:	461a      	mov	r2, r3
 80069b2:	69bb      	ldr	r3, [r7, #24]
 80069b4:	1ad3      	subs	r3, r2, r3
 80069b6:	623b      	str	r3, [r7, #32]
				}
				if (disk_write(fs->drv, wbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR);
 80069b8:	693b      	ldr	r3, [r7, #16]
 80069ba:	7858      	ldrb	r0, [r3, #1]
 80069bc:	6a3b      	ldr	r3, [r7, #32]
 80069be:	697a      	ldr	r2, [r7, #20]
 80069c0:	69f9      	ldr	r1, [r7, #28]
 80069c2:	f7fd fb93 	bl	80040ec <disk_write>
 80069c6:	4603      	mov	r3, r0
 80069c8:	2b00      	cmp	r3, #0
 80069ca:	d004      	beq.n	80069d6 <f_write+0x1e2>
 80069cc:	68fb      	ldr	r3, [r7, #12]
 80069ce:	2201      	movs	r2, #1
 80069d0:	755a      	strb	r2, [r3, #21]
 80069d2:	2301      	movs	r3, #1
 80069d4:	e09e      	b.n	8006b14 <f_write+0x320>
				if (fs->winsect - sect < cc) {	/* Refill sector cache if it gets invalidated by the direct write */
					mem_cpy(fs->win, wbuff + ((fs->winsect - sect) * SS(fs)), SS(fs));
					fs->wflag = 0;
				}
#else
				if (fp->sect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */
 80069d6:	68fb      	ldr	r3, [r7, #12]
 80069d8:	6a1a      	ldr	r2, [r3, #32]
 80069da:	697b      	ldr	r3, [r7, #20]
 80069dc:	1ad3      	subs	r3, r2, r3
 80069de:	6a3a      	ldr	r2, [r7, #32]
 80069e0:	429a      	cmp	r2, r3
 80069e2:	d918      	bls.n	8006a16 <f_write+0x222>
					mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
 80069e4:	68fb      	ldr	r3, [r7, #12]
 80069e6:	f103 0030 	add.w	r0, r3, #48	; 0x30
 80069ea:	68fb      	ldr	r3, [r7, #12]
 80069ec:	6a1a      	ldr	r2, [r3, #32]
 80069ee:	697b      	ldr	r3, [r7, #20]
 80069f0:	1ad3      	subs	r3, r2, r3
 80069f2:	693a      	ldr	r2, [r7, #16]
 80069f4:	8992      	ldrh	r2, [r2, #12]
 80069f6:	fb02 f303 	mul.w	r3, r2, r3
 80069fa:	69fa      	ldr	r2, [r7, #28]
 80069fc:	18d1      	adds	r1, r2, r3
 80069fe:	693b      	ldr	r3, [r7, #16]
 8006a00:	899b      	ldrh	r3, [r3, #12]
 8006a02:	461a      	mov	r2, r3
 8006a04:	f7fd fc32 	bl	800426c <mem_cpy>
					fp->flag &= (BYTE)~FA_DIRTY;
 8006a08:	68fb      	ldr	r3, [r7, #12]
 8006a0a:	7d1b      	ldrb	r3, [r3, #20]
 8006a0c:	f003 037f 	and.w	r3, r3, #127	; 0x7f
 8006a10:	b2da      	uxtb	r2, r3
 8006a12:	68fb      	ldr	r3, [r7, #12]
 8006a14:	751a      	strb	r2, [r3, #20]
				}
#endif
#endif
				wcnt = SS(fs) * cc;		/* Number of bytes transferred */
 8006a16:	693b      	ldr	r3, [r7, #16]
 8006a18:	899b      	ldrh	r3, [r3, #12]
 8006a1a:	461a      	mov	r2, r3
 8006a1c:	6a3b      	ldr	r3, [r7, #32]
 8006a1e:	fb02 f303 	mul.w	r3, r2, r3
 8006a22:	627b      	str	r3, [r7, #36]	; 0x24
				continue;
 8006a24:	e04b      	b.n	8006abe <f_write+0x2ca>
			if (fp->fptr >= fp->obj.objsize) {	/* Avoid silly cache filling on the growing edge */
				if (sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR);
				fs->winsect = sect;
			}
#else
			if (fp->sect != sect && 		/* Fill sector cache with file data */
 8006a26:	68fb      	ldr	r3, [r7, #12]
 8006a28:	6a1b      	ldr	r3, [r3, #32]
 8006a2a:	697a      	ldr	r2, [r7, #20]
 8006a2c:	429a      	cmp	r2, r3
 8006a2e:	d016      	beq.n	8006a5e <f_write+0x26a>
				fp->fptr < fp->obj.objsize &&
 8006a30:	68fb      	ldr	r3, [r7, #12]
 8006a32:	699a      	ldr	r2, [r3, #24]
 8006a34:	68fb      	ldr	r3, [r7, #12]
 8006a36:	68db      	ldr	r3, [r3, #12]
			if (fp->sect != sect && 		/* Fill sector cache with file data */
 8006a38:	429a      	cmp	r2, r3
 8006a3a:	d210      	bcs.n	8006a5e <f_write+0x26a>
				disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) {
 8006a3c:	693b      	ldr	r3, [r7, #16]
 8006a3e:	7858      	ldrb	r0, [r3, #1]
 8006a40:	68fb      	ldr	r3, [r7, #12]
 8006a42:	f103 0130 	add.w	r1, r3, #48	; 0x30
 8006a46:	2301      	movs	r3, #1
 8006a48:	697a      	ldr	r2, [r7, #20]
 8006a4a:	f7fd fb2f 	bl	80040ac <disk_read>
 8006a4e:	4603      	mov	r3, r0
				fp->fptr < fp->obj.objsize &&
 8006a50:	2b00      	cmp	r3, #0
 8006a52:	d004      	beq.n	8006a5e <f_write+0x26a>
					ABORT(fs, FR_DISK_ERR);
 8006a54:	68fb      	ldr	r3, [r7, #12]
 8006a56:	2201      	movs	r2, #1
 8006a58:	755a      	strb	r2, [r3, #21]
 8006a5a:	2301      	movs	r3, #1
 8006a5c:	e05a      	b.n	8006b14 <f_write+0x320>
			}
#endif
			fp->sect = sect;
 8006a5e:	68fb      	ldr	r3, [r7, #12]
 8006a60:	697a      	ldr	r2, [r7, #20]
 8006a62:	621a      	str	r2, [r3, #32]
		}
		wcnt = SS(fs) - (UINT)fp->fptr % SS(fs);	/* Number of bytes left in the sector */
 8006a64:	693b      	ldr	r3, [r7, #16]
 8006a66:	899b      	ldrh	r3, [r3, #12]
 8006a68:	4618      	mov	r0, r3
 8006a6a:	68fb      	ldr	r3, [r7, #12]
 8006a6c:	699b      	ldr	r3, [r3, #24]
 8006a6e:	693a      	ldr	r2, [r7, #16]
 8006a70:	8992      	ldrh	r2, [r2, #12]
 8006a72:	fbb3 f1f2 	udiv	r1, r3, r2
 8006a76:	fb02 f201 	mul.w	r2, r2, r1
 8006a7a:	1a9b      	subs	r3, r3, r2
 8006a7c:	1ac3      	subs	r3, r0, r3
 8006a7e:	627b      	str	r3, [r7, #36]	; 0x24
		if (wcnt > btw) wcnt = btw;					/* Clip it by btw if needed */
 8006a80:	6a7a      	ldr	r2, [r7, #36]	; 0x24
 8006a82:	687b      	ldr	r3, [r7, #4]
 8006a84:	429a      	cmp	r2, r3
 8006a86:	d901      	bls.n	8006a8c <f_write+0x298>
 8006a88:	687b      	ldr	r3, [r7, #4]
 8006a8a:	627b      	str	r3, [r7, #36]	; 0x24
#if _FS_TINY
		if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR);	/* Move sector window */
		mem_cpy(fs->win + fp->fptr % SS(fs), wbuff, wcnt);	/* Fit data to the sector */
		fs->wflag = 1;
#else
		mem_cpy(fp->buf + fp->fptr % SS(fs), wbuff, wcnt);	/* Fit data to the sector */
 8006a8c:	68fb      	ldr	r3, [r7, #12]
 8006a8e:	f103 0130 	add.w	r1, r3, #48	; 0x30
 8006a92:	68fb      	ldr	r3, [r7, #12]
 8006a94:	699b      	ldr	r3, [r3, #24]
 8006a96:	693a      	ldr	r2, [r7, #16]
 8006a98:	8992      	ldrh	r2, [r2, #12]
 8006a9a:	fbb3 f0f2 	udiv	r0, r3, r2
 8006a9e:	fb02 f200 	mul.w	r2, r2, r0
 8006aa2:	1a9b      	subs	r3, r3, r2
 8006aa4:	440b      	add	r3, r1
 8006aa6:	6a7a      	ldr	r2, [r7, #36]	; 0x24
 8006aa8:	69f9      	ldr	r1, [r7, #28]
 8006aaa:	4618      	mov	r0, r3
 8006aac:	f7fd fbde 	bl	800426c <mem_cpy>
		fp->flag |= FA_DIRTY;
 8006ab0:	68fb      	ldr	r3, [r7, #12]
 8006ab2:	7d1b      	ldrb	r3, [r3, #20]
 8006ab4:	f063 037f 	orn	r3, r3, #127	; 0x7f
 8006ab8:	b2da      	uxtb	r2, r3
 8006aba:	68fb      	ldr	r3, [r7, #12]
 8006abc:	751a      	strb	r2, [r3, #20]
		wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize, *bw += wcnt, btw -= wcnt) {
 8006abe:	69fa      	ldr	r2, [r7, #28]
 8006ac0:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8006ac2:	4413      	add	r3, r2
 8006ac4:	61fb      	str	r3, [r7, #28]
 8006ac6:	68fb      	ldr	r3, [r7, #12]
 8006ac8:	699a      	ldr	r2, [r3, #24]
 8006aca:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8006acc:	441a      	add	r2, r3
 8006ace:	68fb      	ldr	r3, [r7, #12]
 8006ad0:	619a      	str	r2, [r3, #24]
 8006ad2:	68fb      	ldr	r3, [r7, #12]
 8006ad4:	68da      	ldr	r2, [r3, #12]
 8006ad6:	68fb      	ldr	r3, [r7, #12]
 8006ad8:	699b      	ldr	r3, [r3, #24]
 8006ada:	429a      	cmp	r2, r3
 8006adc:	bf38      	it	cc
 8006ade:	461a      	movcc	r2, r3
 8006ae0:	68fb      	ldr	r3, [r7, #12]
 8006ae2:	60da      	str	r2, [r3, #12]
 8006ae4:	683b      	ldr	r3, [r7, #0]
 8006ae6:	681a      	ldr	r2, [r3, #0]
 8006ae8:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8006aea:	441a      	add	r2, r3
 8006aec:	683b      	ldr	r3, [r7, #0]
 8006aee:	601a      	str	r2, [r3, #0]
 8006af0:	687a      	ldr	r2, [r7, #4]
 8006af2:	6a7b      	ldr	r3, [r7, #36]	; 0x24
 8006af4:	1ad3      	subs	r3, r2, r3
 8006af6:	607b      	str	r3, [r7, #4]
	for ( ;  btw;							/* Repeat until all data written */
 8006af8:	687b      	ldr	r3, [r7, #4]
 8006afa:	2b00      	cmp	r3, #0
 8006afc:	f47f aeb5 	bne.w	800686a <f_write+0x76>
 8006b00:	e000      	b.n	8006b04 <f_write+0x310>
				if (clst == 0) break;		/* Could not allocate a new cluster (disk full) */
 8006b02:	bf00      	nop
#endif
	}

	fp->flag |= FA_MODIFIED;				/* Set file change flag */
 8006b04:	68fb      	ldr	r3, [r7, #12]
 8006b06:	7d1b      	ldrb	r3, [r3, #20]
 8006b08:	f043 0340 	orr.w	r3, r3, #64	; 0x40
 8006b0c:	b2da      	uxtb	r2, r3
 8006b0e:	68fb      	ldr	r3, [r7, #12]
 8006b10:	751a      	strb	r2, [r3, #20]

	LEAVE_FF(fs, FR_OK);
 8006b12:	2300      	movs	r3, #0
}
 8006b14:	4618      	mov	r0, r3
 8006b16:	3730      	adds	r7, #48	; 0x30
 8006b18:	46bd      	mov	sp, r7
 8006b1a:	bd80      	pop	{r7, pc}

08006b1c <f_sync>:
/*-----------------------------------------------------------------------*/

FRESULT f_sync (
	FIL* fp		/* Pointer to the file object */
)
{
 8006b1c:	b580      	push	{r7, lr}
 8006b1e:	b086      	sub	sp, #24
 8006b20:	af00      	add	r7, sp, #0
 8006b22:	6078      	str	r0, [r7, #4]
#if _FS_EXFAT
	DIR dj;
	DEF_NAMBUF
#endif

	res = validate(&fp->obj, &fs);	/* Check validity of the file object */
 8006b24:	687b      	ldr	r3, [r7, #4]
 8006b26:	f107 0208 	add.w	r2, r7, #8
 8006b2a:	4611      	mov	r1, r2
 8006b2c:	4618      	mov	r0, r3
 8006b2e:	f7ff fc19 	bl	8006364 <validate>
 8006b32:	4603      	mov	r3, r0
 8006b34:	75fb      	strb	r3, [r7, #23]
	if (res == FR_OK) {
 8006b36:	7dfb      	ldrb	r3, [r7, #23]
 8006b38:	2b00      	cmp	r3, #0
 8006b3a:	d168      	bne.n	8006c0e <f_sync+0xf2>
		if (fp->flag & FA_MODIFIED) {	/* Is there any change to the file? */
 8006b3c:	687b      	ldr	r3, [r7, #4]
 8006b3e:	7d1b      	ldrb	r3, [r3, #20]
 8006b40:	f003 0340 	and.w	r3, r3, #64	; 0x40
 8006b44:	2b00      	cmp	r3, #0
 8006b46:	d062      	beq.n	8006c0e <f_sync+0xf2>
#if !_FS_TINY
			if (fp->flag & FA_DIRTY) {	/* Write-back cached data if needed */
 8006b48:	687b      	ldr	r3, [r7, #4]
 8006b4a:	7d1b      	ldrb	r3, [r3, #20]
 8006b4c:	b25b      	sxtb	r3, r3
 8006b4e:	2b00      	cmp	r3, #0
 8006b50:	da15      	bge.n	8006b7e <f_sync+0x62>
				if (disk_write(fs->drv, fp->buf, fp->sect, 1) != RES_OK) LEAVE_FF(fs, FR_DISK_ERR);
 8006b52:	68bb      	ldr	r3, [r7, #8]
 8006b54:	7858      	ldrb	r0, [r3, #1]
 8006b56:	687b      	ldr	r3, [r7, #4]
 8006b58:	f103 0130 	add.w	r1, r3, #48	; 0x30
 8006b5c:	687b      	ldr	r3, [r7, #4]
 8006b5e:	6a1a      	ldr	r2, [r3, #32]
 8006b60:	2301      	movs	r3, #1
 8006b62:	f7fd fac3 	bl	80040ec <disk_write>
 8006b66:	4603      	mov	r3, r0
 8006b68:	2b00      	cmp	r3, #0
 8006b6a:	d001      	beq.n	8006b70 <f_sync+0x54>
 8006b6c:	2301      	movs	r3, #1
 8006b6e:	e04f      	b.n	8006c10 <f_sync+0xf4>
				fp->flag &= (BYTE)~FA_DIRTY;
 8006b70:	687b      	ldr	r3, [r7, #4]
 8006b72:	7d1b      	ldrb	r3, [r3, #20]
 8006b74:	f003 037f 	and.w	r3, r3, #127	; 0x7f
 8006b78:	b2da      	uxtb	r2, r3
 8006b7a:	687b      	ldr	r3, [r7, #4]
 8006b7c:	751a      	strb	r2, [r3, #20]
			}
#endif
			/* Update the directory entry */
			tm = GET_FATTIME();				/* Modified time */
 8006b7e:	f7fd f9f7 	bl	8003f70 <get_fattime>
 8006b82:	6138      	str	r0, [r7, #16]
					FREE_NAMBUF();
				}
			} else
#endif
			{
				res = move_window(fs, fp->dir_sect);
 8006b84:	68ba      	ldr	r2, [r7, #8]
 8006b86:	687b      	ldr	r3, [r7, #4]
 8006b88:	6a5b      	ldr	r3, [r3, #36]	; 0x24
 8006b8a:	4619      	mov	r1, r3
 8006b8c:	4610      	mov	r0, r2
 8006b8e:	f7fd fd9b 	bl	80046c8 <move_window>
 8006b92:	4603      	mov	r3, r0
 8006b94:	75fb      	strb	r3, [r7, #23]
				if (res == FR_OK) {
 8006b96:	7dfb      	ldrb	r3, [r7, #23]
 8006b98:	2b00      	cmp	r3, #0
 8006b9a:	d138      	bne.n	8006c0e <f_sync+0xf2>
					dir = fp->dir_ptr;
 8006b9c:	687b      	ldr	r3, [r7, #4]
 8006b9e:	6a9b      	ldr	r3, [r3, #40]	; 0x28
 8006ba0:	60fb      	str	r3, [r7, #12]
					dir[DIR_Attr] |= AM_ARC;						/* Set archive bit */
 8006ba2:	68fb      	ldr	r3, [r7, #12]
 8006ba4:	330b      	adds	r3, #11
 8006ba6:	781a      	ldrb	r2, [r3, #0]
 8006ba8:	68fb      	ldr	r3, [r7, #12]
 8006baa:	330b      	adds	r3, #11
 8006bac:	f042 0220 	orr.w	r2, r2, #32
 8006bb0:	b2d2      	uxtb	r2, r2
 8006bb2:	701a      	strb	r2, [r3, #0]
					st_clust(fp->obj.fs, dir, fp->obj.sclust);		/* Update file allocation info  */
 8006bb4:	687b      	ldr	r3, [r7, #4]
 8006bb6:	6818      	ldr	r0, [r3, #0]
 8006bb8:	687b      	ldr	r3, [r7, #4]
 8006bba:	689b      	ldr	r3, [r3, #8]
 8006bbc:	461a      	mov	r2, r3
 8006bbe:	68f9      	ldr	r1, [r7, #12]
 8006bc0:	f7fe fb20 	bl	8005204 <st_clust>
					st_dword(dir + DIR_FileSize, (DWORD)fp->obj.objsize);	/* Update file size */
 8006bc4:	68fb      	ldr	r3, [r7, #12]
 8006bc6:	f103 021c 	add.w	r2, r3, #28
 8006bca:	687b      	ldr	r3, [r7, #4]
 8006bcc:	68db      	ldr	r3, [r3, #12]
 8006bce:	4619      	mov	r1, r3
 8006bd0:	4610      	mov	r0, r2
 8006bd2:	f7fd fb1f 	bl	8004214 <st_dword>
					st_dword(dir + DIR_ModTime, tm);				/* Update modified time */
 8006bd6:	68fb      	ldr	r3, [r7, #12]
 8006bd8:	3316      	adds	r3, #22
 8006bda:	6939      	ldr	r1, [r7, #16]
 8006bdc:	4618      	mov	r0, r3
 8006bde:	f7fd fb19 	bl	8004214 <st_dword>
					st_word(dir + DIR_LstAccDate, 0);
 8006be2:	68fb      	ldr	r3, [r7, #12]
 8006be4:	3312      	adds	r3, #18
 8006be6:	2100      	movs	r1, #0
 8006be8:	4618      	mov	r0, r3
 8006bea:	f7fd faf8 	bl	80041de <st_word>
					fs->wflag = 1;
 8006bee:	68bb      	ldr	r3, [r7, #8]
 8006bf0:	2201      	movs	r2, #1
 8006bf2:	70da      	strb	r2, [r3, #3]
					res = sync_fs(fs);					/* Restore it to the directory */
 8006bf4:	68bb      	ldr	r3, [r7, #8]
 8006bf6:	4618      	mov	r0, r3
 8006bf8:	f7fd fd94 	bl	8004724 <sync_fs>
 8006bfc:	4603      	mov	r3, r0
 8006bfe:	75fb      	strb	r3, [r7, #23]
					fp->flag &= (BYTE)~FA_MODIFIED;
 8006c00:	687b      	ldr	r3, [r7, #4]
 8006c02:	7d1b      	ldrb	r3, [r3, #20]
 8006c04:	f023 0340 	bic.w	r3, r3, #64	; 0x40
 8006c08:	b2da      	uxtb	r2, r3
 8006c0a:	687b      	ldr	r3, [r7, #4]
 8006c0c:	751a      	strb	r2, [r3, #20]
				}
			}
		}
	}

	LEAVE_FF(fs, res);
 8006c0e:	7dfb      	ldrb	r3, [r7, #23]
}
 8006c10:	4618      	mov	r0, r3
 8006c12:	3718      	adds	r7, #24
 8006c14:	46bd      	mov	sp, r7
 8006c16:	bd80      	pop	{r7, pc}

08006c18 <f_close>:
/*-----------------------------------------------------------------------*/

FRESULT f_close (
	FIL* fp		/* Pointer to the file object to be closed */
)
{
 8006c18:	b580      	push	{r7, lr}
 8006c1a:	b084      	sub	sp, #16
 8006c1c:	af00      	add	r7, sp, #0
 8006c1e:	6078      	str	r0, [r7, #4]
	FRESULT res;
	FATFS *fs;

#if !_FS_READONLY
	res = f_sync(fp);					/* Flush cached data */
 8006c20:	6878      	ldr	r0, [r7, #4]
 8006c22:	f7ff ff7b 	bl	8006b1c <f_sync>
 8006c26:	4603      	mov	r3, r0
 8006c28:	73fb      	strb	r3, [r7, #15]
	if (res == FR_OK)
 8006c2a:	7bfb      	ldrb	r3, [r7, #15]
 8006c2c:	2b00      	cmp	r3, #0
 8006c2e:	d118      	bne.n	8006c62 <f_close+0x4a>
#endif
	{
		res = validate(&fp->obj, &fs);	/* Lock volume */
 8006c30:	687b      	ldr	r3, [r7, #4]
 8006c32:	f107 0208 	add.w	r2, r7, #8
 8006c36:	4611      	mov	r1, r2
 8006c38:	4618      	mov	r0, r3
 8006c3a:	f7ff fb93 	bl	8006364 <validate>
 8006c3e:	4603      	mov	r3, r0
 8006c40:	73fb      	strb	r3, [r7, #15]
		if (res == FR_OK) {
 8006c42:	7bfb      	ldrb	r3, [r7, #15]
 8006c44:	2b00      	cmp	r3, #0
 8006c46:	d10c      	bne.n	8006c62 <f_close+0x4a>
#if _FS_LOCK != 0
			res = dec_lock(fp->obj.lockid);	/* Decrement file open counter */
 8006c48:	687b      	ldr	r3, [r7, #4]
 8006c4a:	691b      	ldr	r3, [r3, #16]
 8006c4c:	4618      	mov	r0, r3
 8006c4e:	f7fd fc97 	bl	8004580 <dec_lock>
 8006c52:	4603      	mov	r3, r0
 8006c54:	73fb      	strb	r3, [r7, #15]
			if (res == FR_OK)
 8006c56:	7bfb      	ldrb	r3, [r7, #15]
 8006c58:	2b00      	cmp	r3, #0
 8006c5a:	d102      	bne.n	8006c62 <f_close+0x4a>
#endif
			{
				fp->obj.fs = 0;			/* Invalidate file object */
 8006c5c:	687b      	ldr	r3, [r7, #4]
 8006c5e:	2200      	movs	r2, #0
 8006c60:	601a      	str	r2, [r3, #0]
#if _FS_REENTRANT
			unlock_fs(fs, FR_OK);		/* Unlock volume */
#endif
		}
	}
	return res;
 8006c62:	7bfb      	ldrb	r3, [r7, #15]
}
 8006c64:	4618      	mov	r0, r3
 8006c66:	3710      	adds	r7, #16
 8006c68:	46bd      	mov	sp, r7
 8006c6a:	bd80      	pop	{r7, pc}

08006c6c <putc_bfd>:
static
void putc_bfd (		/* Buffered write with code conversion */
	putbuff* pb,
	TCHAR c
)
{
 8006c6c:	b580      	push	{r7, lr}
 8006c6e:	b084      	sub	sp, #16
 8006c70:	af00      	add	r7, sp, #0
 8006c72:	6078      	str	r0, [r7, #4]
 8006c74:	460b      	mov	r3, r1
 8006c76:	70fb      	strb	r3, [r7, #3]
	UINT bw;
	int i;


	if (_USE_STRFUNC == 2 && c == '\n') {	 /* LF -> CRLF conversion */
 8006c78:	78fb      	ldrb	r3, [r7, #3]
 8006c7a:	2b0a      	cmp	r3, #10
 8006c7c:	d103      	bne.n	8006c86 <putc_bfd+0x1a>
		putc_bfd(pb, '\r');
 8006c7e:	210d      	movs	r1, #13
 8006c80:	6878      	ldr	r0, [r7, #4]
 8006c82:	f7ff fff3 	bl	8006c6c <putc_bfd>
	}

	i = pb->idx;		/* Write index of pb->buf[] */
 8006c86:	687b      	ldr	r3, [r7, #4]
 8006c88:	685b      	ldr	r3, [r3, #4]
 8006c8a:	60fb      	str	r3, [r7, #12]
	if (i < 0) return;
 8006c8c:	68fb      	ldr	r3, [r7, #12]
 8006c8e:	2b00      	cmp	r3, #0
 8006c90:	db25      	blt.n	8006cde <putc_bfd+0x72>
	if (c >= 0x100)
		pb->buf[i++] = (BYTE)(c >> 8);
	pb->buf[i++] = (BYTE)c;
#endif
#else							/* Write a character without conversion */
	pb->buf[i++] = (BYTE)c;
 8006c92:	68fb      	ldr	r3, [r7, #12]
 8006c94:	1c5a      	adds	r2, r3, #1
 8006c96:	60fa      	str	r2, [r7, #12]
 8006c98:	687a      	ldr	r2, [r7, #4]
 8006c9a:	4413      	add	r3, r2
 8006c9c:	78fa      	ldrb	r2, [r7, #3]
 8006c9e:	731a      	strb	r2, [r3, #12]
#endif

	if (i >= (int)(sizeof pb->buf) - 3) {	/* Write buffered characters to the file */
 8006ca0:	68fb      	ldr	r3, [r7, #12]
 8006ca2:	2b3c      	cmp	r3, #60	; 0x3c
 8006ca4:	dd12      	ble.n	8006ccc <putc_bfd+0x60>
		f_write(pb->fp, pb->buf, (UINT)i, &bw);
 8006ca6:	687b      	ldr	r3, [r7, #4]
 8006ca8:	6818      	ldr	r0, [r3, #0]
 8006caa:	687b      	ldr	r3, [r7, #4]
 8006cac:	f103 010c 	add.w	r1, r3, #12
 8006cb0:	68fa      	ldr	r2, [r7, #12]
 8006cb2:	f107 0308 	add.w	r3, r7, #8
 8006cb6:	f7ff fd9d 	bl	80067f4 <f_write>
		i = (bw == (UINT)i) ? 0 : -1;
 8006cba:	68ba      	ldr	r2, [r7, #8]
 8006cbc:	68fb      	ldr	r3, [r7, #12]
 8006cbe:	429a      	cmp	r2, r3
 8006cc0:	d101      	bne.n	8006cc6 <putc_bfd+0x5a>
 8006cc2:	2300      	movs	r3, #0
 8006cc4:	e001      	b.n	8006cca <putc_bfd+0x5e>
 8006cc6:	f04f 33ff 	mov.w	r3, #4294967295
 8006cca:	60fb      	str	r3, [r7, #12]
	}
	pb->idx = i;
 8006ccc:	687b      	ldr	r3, [r7, #4]
 8006cce:	68fa      	ldr	r2, [r7, #12]
 8006cd0:	605a      	str	r2, [r3, #4]
	pb->nchr++;
 8006cd2:	687b      	ldr	r3, [r7, #4]
 8006cd4:	689b      	ldr	r3, [r3, #8]
 8006cd6:	1c5a      	adds	r2, r3, #1
 8006cd8:	687b      	ldr	r3, [r7, #4]
 8006cda:	609a      	str	r2, [r3, #8]
 8006cdc:	e000      	b.n	8006ce0 <putc_bfd+0x74>
	if (i < 0) return;
 8006cde:	bf00      	nop
}
 8006ce0:	3710      	adds	r7, #16
 8006ce2:	46bd      	mov	sp, r7
 8006ce4:	bd80      	pop	{r7, pc}

08006ce6 <putc_flush>:

static
int putc_flush (		/* Flush left characters in the buffer */
	putbuff* pb
)
{
 8006ce6:	b580      	push	{r7, lr}
 8006ce8:	b084      	sub	sp, #16
 8006cea:	af00      	add	r7, sp, #0
 8006cec:	6078      	str	r0, [r7, #4]
	UINT nw;

	if (   pb->idx >= 0	/* Flush buffered characters to the file */
 8006cee:	687b      	ldr	r3, [r7, #4]
 8006cf0:	685b      	ldr	r3, [r3, #4]
 8006cf2:	2b00      	cmp	r3, #0
 8006cf4:	db17      	blt.n	8006d26 <putc_flush+0x40>
		&& f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK
 8006cf6:	687b      	ldr	r3, [r7, #4]
 8006cf8:	6818      	ldr	r0, [r3, #0]
 8006cfa:	687b      	ldr	r3, [r7, #4]
 8006cfc:	f103 010c 	add.w	r1, r3, #12
 8006d00:	687b      	ldr	r3, [r7, #4]
 8006d02:	685b      	ldr	r3, [r3, #4]
 8006d04:	461a      	mov	r2, r3
 8006d06:	f107 030c 	add.w	r3, r7, #12
 8006d0a:	f7ff fd73 	bl	80067f4 <f_write>
 8006d0e:	4603      	mov	r3, r0
 8006d10:	2b00      	cmp	r3, #0
 8006d12:	d108      	bne.n	8006d26 <putc_flush+0x40>
		&& (UINT)pb->idx == nw) return pb->nchr;
 8006d14:	687b      	ldr	r3, [r7, #4]
 8006d16:	685b      	ldr	r3, [r3, #4]
 8006d18:	461a      	mov	r2, r3
 8006d1a:	68fb      	ldr	r3, [r7, #12]
 8006d1c:	429a      	cmp	r2, r3
 8006d1e:	d102      	bne.n	8006d26 <putc_flush+0x40>
 8006d20:	687b      	ldr	r3, [r7, #4]
 8006d22:	689b      	ldr	r3, [r3, #8]
 8006d24:	e001      	b.n	8006d2a <putc_flush+0x44>
	return EOF;
 8006d26:	f04f 33ff 	mov.w	r3, #4294967295
}
 8006d2a:	4618      	mov	r0, r3
 8006d2c:	3710      	adds	r7, #16
 8006d2e:	46bd      	mov	sp, r7
 8006d30:	bd80      	pop	{r7, pc}

08006d32 <putc_init>:
static
void putc_init (		/* Initialize write buffer */
	putbuff* pb,
	FIL* fp
)
{
 8006d32:	b480      	push	{r7}
 8006d34:	b083      	sub	sp, #12
 8006d36:	af00      	add	r7, sp, #0
 8006d38:	6078      	str	r0, [r7, #4]
 8006d3a:	6039      	str	r1, [r7, #0]
	pb->fp = fp;
 8006d3c:	687b      	ldr	r3, [r7, #4]
 8006d3e:	683a      	ldr	r2, [r7, #0]
 8006d40:	601a      	str	r2, [r3, #0]
	pb->nchr = pb->idx = 0;
 8006d42:	687b      	ldr	r3, [r7, #4]
 8006d44:	2200      	movs	r2, #0
 8006d46:	605a      	str	r2, [r3, #4]
 8006d48:	687b      	ldr	r3, [r7, #4]
 8006d4a:	685a      	ldr	r2, [r3, #4]
 8006d4c:	687b      	ldr	r3, [r7, #4]
 8006d4e:	609a      	str	r2, [r3, #8]
}
 8006d50:	bf00      	nop
 8006d52:	370c      	adds	r7, #12
 8006d54:	46bd      	mov	sp, r7
 8006d56:	f85d 7b04 	ldr.w	r7, [sp], #4
 8006d5a:	4770      	bx	lr

08006d5c <f_puts>:

int f_puts (
	const TCHAR* str,	/* Pointer to the string to be output */
	FIL* fp				/* Pointer to the file object */
)
{
 8006d5c:	b580      	push	{r7, lr}
 8006d5e:	b096      	sub	sp, #88	; 0x58
 8006d60:	af00      	add	r7, sp, #0
 8006d62:	6078      	str	r0, [r7, #4]
 8006d64:	6039      	str	r1, [r7, #0]
	putbuff pb;


	putc_init(&pb, fp);
 8006d66:	f107 030c 	add.w	r3, r7, #12
 8006d6a:	6839      	ldr	r1, [r7, #0]
 8006d6c:	4618      	mov	r0, r3
 8006d6e:	f7ff ffe0 	bl	8006d32 <putc_init>
	while (*str) putc_bfd(&pb, *str++);		/* Put the string */
 8006d72:	e009      	b.n	8006d88 <f_puts+0x2c>
 8006d74:	687b      	ldr	r3, [r7, #4]
 8006d76:	1c5a      	adds	r2, r3, #1
 8006d78:	607a      	str	r2, [r7, #4]
 8006d7a:	781a      	ldrb	r2, [r3, #0]
 8006d7c:	f107 030c 	add.w	r3, r7, #12
 8006d80:	4611      	mov	r1, r2
 8006d82:	4618      	mov	r0, r3
 8006d84:	f7ff ff72 	bl	8006c6c <putc_bfd>
 8006d88:	687b      	ldr	r3, [r7, #4]
 8006d8a:	781b      	ldrb	r3, [r3, #0]
 8006d8c:	2b00      	cmp	r3, #0
 8006d8e:	d1f1      	bne.n	8006d74 <f_puts+0x18>
	return putc_flush(&pb);
 8006d90:	f107 030c 	add.w	r3, r7, #12
 8006d94:	4618      	mov	r0, r3
 8006d96:	f7ff ffa6 	bl	8006ce6 <putc_flush>
 8006d9a:	4603      	mov	r3, r0
}
 8006d9c:	4618      	mov	r0, r3
 8006d9e:	3758      	adds	r7, #88	; 0x58
 8006da0:	46bd      	mov	sp, r7
 8006da2:	bd80      	pop	{r7, pc}

08006da4 <FATFS_LinkDriverEx>:
  * @param  lun : only used for USB Key Disk to add multi-lun management
            else the parameter must be equal to 0
  * @retval Returns 0 in case of success, otherwise 1.
  */
uint8_t FATFS_LinkDriverEx(const Diskio_drvTypeDef *drv, char *path, uint8_t lun)
{
 8006da4:	b480      	push	{r7}
 8006da6:	b087      	sub	sp, #28
 8006da8:	af00      	add	r7, sp, #0
 8006daa:	60f8      	str	r0, [r7, #12]
 8006dac:	60b9      	str	r1, [r7, #8]
 8006dae:	4613      	mov	r3, r2
 8006db0:	71fb      	strb	r3, [r7, #7]
  uint8_t ret = 1;
 8006db2:	2301      	movs	r3, #1
 8006db4:	75fb      	strb	r3, [r7, #23]
  uint8_t DiskNum = 0;
 8006db6:	2300      	movs	r3, #0
 8006db8:	75bb      	strb	r3, [r7, #22]

  if(disk.nbr < _VOLUMES)
 8006dba:	4b1f      	ldr	r3, [pc, #124]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006dbc:	7a5b      	ldrb	r3, [r3, #9]
 8006dbe:	b2db      	uxtb	r3, r3
 8006dc0:	2b00      	cmp	r3, #0
 8006dc2:	d131      	bne.n	8006e28 <FATFS_LinkDriverEx+0x84>
  {
    disk.is_initialized[disk.nbr] = 0;
 8006dc4:	4b1c      	ldr	r3, [pc, #112]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006dc6:	7a5b      	ldrb	r3, [r3, #9]
 8006dc8:	b2db      	uxtb	r3, r3
 8006dca:	461a      	mov	r2, r3
 8006dcc:	4b1a      	ldr	r3, [pc, #104]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006dce:	2100      	movs	r1, #0
 8006dd0:	5499      	strb	r1, [r3, r2]
    disk.drv[disk.nbr] = drv;
 8006dd2:	4b19      	ldr	r3, [pc, #100]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006dd4:	7a5b      	ldrb	r3, [r3, #9]
 8006dd6:	b2db      	uxtb	r3, r3
 8006dd8:	4a17      	ldr	r2, [pc, #92]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006dda:	009b      	lsls	r3, r3, #2
 8006ddc:	4413      	add	r3, r2
 8006dde:	68fa      	ldr	r2, [r7, #12]
 8006de0:	605a      	str	r2, [r3, #4]
    disk.lun[disk.nbr] = lun;
 8006de2:	4b15      	ldr	r3, [pc, #84]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006de4:	7a5b      	ldrb	r3, [r3, #9]
 8006de6:	b2db      	uxtb	r3, r3
 8006de8:	461a      	mov	r2, r3
 8006dea:	4b13      	ldr	r3, [pc, #76]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006dec:	4413      	add	r3, r2
 8006dee:	79fa      	ldrb	r2, [r7, #7]
 8006df0:	721a      	strb	r2, [r3, #8]
    DiskNum = disk.nbr++;
 8006df2:	4b11      	ldr	r3, [pc, #68]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006df4:	7a5b      	ldrb	r3, [r3, #9]
 8006df6:	b2db      	uxtb	r3, r3
 8006df8:	1c5a      	adds	r2, r3, #1
 8006dfa:	b2d1      	uxtb	r1, r2
 8006dfc:	4a0e      	ldr	r2, [pc, #56]	; (8006e38 <FATFS_LinkDriverEx+0x94>)
 8006dfe:	7251      	strb	r1, [r2, #9]
 8006e00:	75bb      	strb	r3, [r7, #22]
    path[0] = DiskNum + '0';
 8006e02:	7dbb      	ldrb	r3, [r7, #22]
 8006e04:	3330      	adds	r3, #48	; 0x30
 8006e06:	b2da      	uxtb	r2, r3
 8006e08:	68bb      	ldr	r3, [r7, #8]
 8006e0a:	701a      	strb	r2, [r3, #0]
    path[1] = ':';
 8006e0c:	68bb      	ldr	r3, [r7, #8]
 8006e0e:	3301      	adds	r3, #1
 8006e10:	223a      	movs	r2, #58	; 0x3a
 8006e12:	701a      	strb	r2, [r3, #0]
    path[2] = '/';
 8006e14:	68bb      	ldr	r3, [r7, #8]
 8006e16:	3302      	adds	r3, #2
 8006e18:	222f      	movs	r2, #47	; 0x2f
 8006e1a:	701a      	strb	r2, [r3, #0]
    path[3] = 0;
 8006e1c:	68bb      	ldr	r3, [r7, #8]
 8006e1e:	3303      	adds	r3, #3
 8006e20:	2200      	movs	r2, #0
 8006e22:	701a      	strb	r2, [r3, #0]
    ret = 0;
 8006e24:	2300      	movs	r3, #0
 8006e26:	75fb      	strb	r3, [r7, #23]
  }

  return ret;
 8006e28:	7dfb      	ldrb	r3, [r7, #23]
}
 8006e2a:	4618      	mov	r0, r3
 8006e2c:	371c      	adds	r7, #28
 8006e2e:	46bd      	mov	sp, r7
 8006e30:	f85d 7b04 	ldr.w	r7, [sp], #4
 8006e34:	4770      	bx	lr
 8006e36:	bf00      	nop
 8006e38:	2000026c 	.word	0x2000026c

08006e3c <FATFS_LinkDriver>:
  * @param  drv: pointer to the disk IO Driver structure
  * @param  path: pointer to the logical drive path
  * @retval Returns 0 in case of success, otherwise 1.
  */
uint8_t FATFS_LinkDriver(const Diskio_drvTypeDef *drv, char *path)
{
 8006e3c:	b580      	push	{r7, lr}
 8006e3e:	b082      	sub	sp, #8
 8006e40:	af00      	add	r7, sp, #0
 8006e42:	6078      	str	r0, [r7, #4]
 8006e44:	6039      	str	r1, [r7, #0]
  return FATFS_LinkDriverEx(drv, path, 0);
 8006e46:	2200      	movs	r2, #0
 8006e48:	6839      	ldr	r1, [r7, #0]
 8006e4a:	6878      	ldr	r0, [r7, #4]
 8006e4c:	f7ff ffaa 	bl	8006da4 <FATFS_LinkDriverEx>
 8006e50:	4603      	mov	r3, r0
}
 8006e52:	4618      	mov	r0, r3
 8006e54:	3708      	adds	r7, #8
 8006e56:	46bd      	mov	sp, r7
 8006e58:	bd80      	pop	{r7, pc}
	...

08006e5c <ff_convert>:

WCHAR ff_convert (	/* Converted character, Returns zero on error */
	WCHAR	chr,	/* Character code to be converted */
	UINT	dir		/* 0: Unicode to OEM code, 1: OEM code to Unicode */
)
{
 8006e5c:	b480      	push	{r7}
 8006e5e:	b085      	sub	sp, #20
 8006e60:	af00      	add	r7, sp, #0
 8006e62:	4603      	mov	r3, r0
 8006e64:	6039      	str	r1, [r7, #0]
 8006e66:	80fb      	strh	r3, [r7, #6]
	WCHAR c;


	if (chr < 0x80) {	/* ASCII */
 8006e68:	88fb      	ldrh	r3, [r7, #6]
 8006e6a:	2b7f      	cmp	r3, #127	; 0x7f
 8006e6c:	d802      	bhi.n	8006e74 <ff_convert+0x18>
		c = chr;
 8006e6e:	88fb      	ldrh	r3, [r7, #6]
 8006e70:	81fb      	strh	r3, [r7, #14]
 8006e72:	e025      	b.n	8006ec0 <ff_convert+0x64>

	} else {
		if (dir) {		/* OEM code to Unicode */
 8006e74:	683b      	ldr	r3, [r7, #0]
 8006e76:	2b00      	cmp	r3, #0
 8006e78:	d00b      	beq.n	8006e92 <ff_convert+0x36>
			c = (chr >= 0x100) ? 0 : Tbl[chr - 0x80];
 8006e7a:	88fb      	ldrh	r3, [r7, #6]
 8006e7c:	2bff      	cmp	r3, #255	; 0xff
 8006e7e:	d805      	bhi.n	8006e8c <ff_convert+0x30>
 8006e80:	88fb      	ldrh	r3, [r7, #6]
 8006e82:	3b80      	subs	r3, #128	; 0x80
 8006e84:	4a12      	ldr	r2, [pc, #72]	; (8006ed0 <ff_convert+0x74>)
 8006e86:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 8006e8a:	e000      	b.n	8006e8e <ff_convert+0x32>
 8006e8c:	2300      	movs	r3, #0
 8006e8e:	81fb      	strh	r3, [r7, #14]
 8006e90:	e016      	b.n	8006ec0 <ff_convert+0x64>

		} else {		/* Unicode to OEM code */
			for (c = 0; c < 0x80; c++) {
 8006e92:	2300      	movs	r3, #0
 8006e94:	81fb      	strh	r3, [r7, #14]
 8006e96:	e009      	b.n	8006eac <ff_convert+0x50>
				if (chr == Tbl[c]) break;
 8006e98:	89fb      	ldrh	r3, [r7, #14]
 8006e9a:	4a0d      	ldr	r2, [pc, #52]	; (8006ed0 <ff_convert+0x74>)
 8006e9c:	f832 3013 	ldrh.w	r3, [r2, r3, lsl #1]
 8006ea0:	88fa      	ldrh	r2, [r7, #6]
 8006ea2:	429a      	cmp	r2, r3
 8006ea4:	d006      	beq.n	8006eb4 <ff_convert+0x58>
			for (c = 0; c < 0x80; c++) {
 8006ea6:	89fb      	ldrh	r3, [r7, #14]
 8006ea8:	3301      	adds	r3, #1
 8006eaa:	81fb      	strh	r3, [r7, #14]
 8006eac:	89fb      	ldrh	r3, [r7, #14]
 8006eae:	2b7f      	cmp	r3, #127	; 0x7f
 8006eb0:	d9f2      	bls.n	8006e98 <ff_convert+0x3c>
 8006eb2:	e000      	b.n	8006eb6 <ff_convert+0x5a>
				if (chr == Tbl[c]) break;
 8006eb4:	bf00      	nop
			}
			c = (c + 0x80) & 0xFF;
 8006eb6:	89fb      	ldrh	r3, [r7, #14]
 8006eb8:	3380      	adds	r3, #128	; 0x80
 8006eba:	b29b      	uxth	r3, r3
 8006ebc:	b2db      	uxtb	r3, r3
 8006ebe:	81fb      	strh	r3, [r7, #14]
		}
	}

	return c;
 8006ec0:	89fb      	ldrh	r3, [r7, #14]
}
 8006ec2:	4618      	mov	r0, r3
 8006ec4:	3714      	adds	r7, #20
 8006ec6:	46bd      	mov	sp, r7
 8006ec8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8006ecc:	4770      	bx	lr
 8006ece:	bf00      	nop
 8006ed0:	08007204 	.word	0x08007204

08006ed4 <ff_wtoupper>:


WCHAR ff_wtoupper (	/* Returns upper converted character */
	WCHAR chr		/* Unicode character to be upper converted (BMP only) */
)
{
 8006ed4:	b480      	push	{r7}
 8006ed6:	b087      	sub	sp, #28
 8006ed8:	af00      	add	r7, sp, #0
 8006eda:	4603      	mov	r3, r0
 8006edc:	80fb      	strh	r3, [r7, #6]
	};
	const WCHAR *p;
	WCHAR bc, nc, cmd;


	p = chr < 0x1000 ? cvt1 : cvt2;
 8006ede:	88fb      	ldrh	r3, [r7, #6]
 8006ee0:	f5b3 5f80 	cmp.w	r3, #4096	; 0x1000
 8006ee4:	d201      	bcs.n	8006eea <ff_wtoupper+0x16>
 8006ee6:	4b3e      	ldr	r3, [pc, #248]	; (8006fe0 <ff_wtoupper+0x10c>)
 8006ee8:	e000      	b.n	8006eec <ff_wtoupper+0x18>
 8006eea:	4b3e      	ldr	r3, [pc, #248]	; (8006fe4 <ff_wtoupper+0x110>)
 8006eec:	617b      	str	r3, [r7, #20]
	for (;;) {
		bc = *p++;								/* Get block base */
 8006eee:	697b      	ldr	r3, [r7, #20]
 8006ef0:	1c9a      	adds	r2, r3, #2
 8006ef2:	617a      	str	r2, [r7, #20]
 8006ef4:	881b      	ldrh	r3, [r3, #0]
 8006ef6:	827b      	strh	r3, [r7, #18]
		if (!bc || chr < bc) break;
 8006ef8:	8a7b      	ldrh	r3, [r7, #18]
 8006efa:	2b00      	cmp	r3, #0
 8006efc:	d068      	beq.n	8006fd0 <ff_wtoupper+0xfc>
 8006efe:	88fa      	ldrh	r2, [r7, #6]
 8006f00:	8a7b      	ldrh	r3, [r7, #18]
 8006f02:	429a      	cmp	r2, r3
 8006f04:	d364      	bcc.n	8006fd0 <ff_wtoupper+0xfc>
		nc = *p++; cmd = nc >> 8; nc &= 0xFF;	/* Get processing command and block size */
 8006f06:	697b      	ldr	r3, [r7, #20]
 8006f08:	1c9a      	adds	r2, r3, #2
 8006f0a:	617a      	str	r2, [r7, #20]
 8006f0c:	881b      	ldrh	r3, [r3, #0]
 8006f0e:	823b      	strh	r3, [r7, #16]
 8006f10:	8a3b      	ldrh	r3, [r7, #16]
 8006f12:	0a1b      	lsrs	r3, r3, #8
 8006f14:	81fb      	strh	r3, [r7, #14]
 8006f16:	8a3b      	ldrh	r3, [r7, #16]
 8006f18:	b2db      	uxtb	r3, r3
 8006f1a:	823b      	strh	r3, [r7, #16]
		if (chr < bc + nc) {	/* In the block? */
 8006f1c:	88fa      	ldrh	r2, [r7, #6]
 8006f1e:	8a79      	ldrh	r1, [r7, #18]
 8006f20:	8a3b      	ldrh	r3, [r7, #16]
 8006f22:	440b      	add	r3, r1
 8006f24:	429a      	cmp	r2, r3
 8006f26:	da49      	bge.n	8006fbc <ff_wtoupper+0xe8>
			switch (cmd) {
 8006f28:	89fb      	ldrh	r3, [r7, #14]
 8006f2a:	2b08      	cmp	r3, #8
 8006f2c:	d84f      	bhi.n	8006fce <ff_wtoupper+0xfa>
 8006f2e:	a201      	add	r2, pc, #4	; (adr r2, 8006f34 <ff_wtoupper+0x60>)
 8006f30:	f852 f023 	ldr.w	pc, [r2, r3, lsl #2]
 8006f34:	08006f59 	.word	0x08006f59
 8006f38:	08006f6b 	.word	0x08006f6b
 8006f3c:	08006f81 	.word	0x08006f81
 8006f40:	08006f89 	.word	0x08006f89
 8006f44:	08006f91 	.word	0x08006f91
 8006f48:	08006f99 	.word	0x08006f99
 8006f4c:	08006fa1 	.word	0x08006fa1
 8006f50:	08006fa9 	.word	0x08006fa9
 8006f54:	08006fb1 	.word	0x08006fb1
			case 0:	chr = p[chr - bc]; break;		/* Table conversion */
 8006f58:	88fa      	ldrh	r2, [r7, #6]
 8006f5a:	8a7b      	ldrh	r3, [r7, #18]
 8006f5c:	1ad3      	subs	r3, r2, r3
 8006f5e:	005b      	lsls	r3, r3, #1
 8006f60:	697a      	ldr	r2, [r7, #20]
 8006f62:	4413      	add	r3, r2
 8006f64:	881b      	ldrh	r3, [r3, #0]
 8006f66:	80fb      	strh	r3, [r7, #6]
 8006f68:	e027      	b.n	8006fba <ff_wtoupper+0xe6>
			case 1:	chr -= (chr - bc) & 1; break;	/* Case pairs */
 8006f6a:	88fa      	ldrh	r2, [r7, #6]
 8006f6c:	8a7b      	ldrh	r3, [r7, #18]
 8006f6e:	1ad3      	subs	r3, r2, r3
 8006f70:	b29b      	uxth	r3, r3
 8006f72:	f003 0301 	and.w	r3, r3, #1
 8006f76:	b29b      	uxth	r3, r3
 8006f78:	88fa      	ldrh	r2, [r7, #6]
 8006f7a:	1ad3      	subs	r3, r2, r3
 8006f7c:	80fb      	strh	r3, [r7, #6]
 8006f7e:	e01c      	b.n	8006fba <ff_wtoupper+0xe6>
			case 2: chr -= 16; break;				/* Shift -16 */
 8006f80:	88fb      	ldrh	r3, [r7, #6]
 8006f82:	3b10      	subs	r3, #16
 8006f84:	80fb      	strh	r3, [r7, #6]
 8006f86:	e018      	b.n	8006fba <ff_wtoupper+0xe6>
			case 3:	chr -= 32; break;				/* Shift -32 */
 8006f88:	88fb      	ldrh	r3, [r7, #6]
 8006f8a:	3b20      	subs	r3, #32
 8006f8c:	80fb      	strh	r3, [r7, #6]
 8006f8e:	e014      	b.n	8006fba <ff_wtoupper+0xe6>
			case 4:	chr -= 48; break;				/* Shift -48 */
 8006f90:	88fb      	ldrh	r3, [r7, #6]
 8006f92:	3b30      	subs	r3, #48	; 0x30
 8006f94:	80fb      	strh	r3, [r7, #6]
 8006f96:	e010      	b.n	8006fba <ff_wtoupper+0xe6>
			case 5:	chr -= 26; break;				/* Shift -26 */
 8006f98:	88fb      	ldrh	r3, [r7, #6]
 8006f9a:	3b1a      	subs	r3, #26
 8006f9c:	80fb      	strh	r3, [r7, #6]
 8006f9e:	e00c      	b.n	8006fba <ff_wtoupper+0xe6>
			case 6:	chr += 8; break;				/* Shift +8 */
 8006fa0:	88fb      	ldrh	r3, [r7, #6]
 8006fa2:	3308      	adds	r3, #8
 8006fa4:	80fb      	strh	r3, [r7, #6]
 8006fa6:	e008      	b.n	8006fba <ff_wtoupper+0xe6>
			case 7: chr -= 80; break;				/* Shift -80 */
 8006fa8:	88fb      	ldrh	r3, [r7, #6]
 8006faa:	3b50      	subs	r3, #80	; 0x50
 8006fac:	80fb      	strh	r3, [r7, #6]
 8006fae:	e004      	b.n	8006fba <ff_wtoupper+0xe6>
			case 8:	chr -= 0x1C60; break;			/* Shift -0x1C60 */
 8006fb0:	88fb      	ldrh	r3, [r7, #6]
 8006fb2:	f5a3 53e3 	sub.w	r3, r3, #7264	; 0x1c60
 8006fb6:	80fb      	strh	r3, [r7, #6]
 8006fb8:	bf00      	nop
			}
			break;
 8006fba:	e008      	b.n	8006fce <ff_wtoupper+0xfa>
		}
		if (!cmd) p += nc;
 8006fbc:	89fb      	ldrh	r3, [r7, #14]
 8006fbe:	2b00      	cmp	r3, #0
 8006fc0:	d195      	bne.n	8006eee <ff_wtoupper+0x1a>
 8006fc2:	8a3b      	ldrh	r3, [r7, #16]
 8006fc4:	005b      	lsls	r3, r3, #1
 8006fc6:	697a      	ldr	r2, [r7, #20]
 8006fc8:	4413      	add	r3, r2
 8006fca:	617b      	str	r3, [r7, #20]
		bc = *p++;								/* Get block base */
 8006fcc:	e78f      	b.n	8006eee <ff_wtoupper+0x1a>
			break;
 8006fce:	bf00      	nop
	}

	return chr;
 8006fd0:	88fb      	ldrh	r3, [r7, #6]
}
 8006fd2:	4618      	mov	r0, r3
 8006fd4:	371c      	adds	r7, #28
 8006fd6:	46bd      	mov	sp, r7
 8006fd8:	f85d 7b04 	ldr.w	r7, [sp], #4
 8006fdc:	4770      	bx	lr
 8006fde:	bf00      	nop
 8006fe0:	08007304 	.word	0x08007304
 8006fe4:	080074f8 	.word	0x080074f8

08006fe8 <__libc_init_array>:
 8006fe8:	b570      	push	{r4, r5, r6, lr}
 8006fea:	4e0d      	ldr	r6, [pc, #52]	; (8007020 <__libc_init_array+0x38>)
 8006fec:	4c0d      	ldr	r4, [pc, #52]	; (8007024 <__libc_init_array+0x3c>)
 8006fee:	1ba4      	subs	r4, r4, r6
 8006ff0:	10a4      	asrs	r4, r4, #2
 8006ff2:	2500      	movs	r5, #0
 8006ff4:	42a5      	cmp	r5, r4
 8006ff6:	d109      	bne.n	800700c <__libc_init_array+0x24>
 8006ff8:	4e0b      	ldr	r6, [pc, #44]	; (8007028 <__libc_init_array+0x40>)
 8006ffa:	4c0c      	ldr	r4, [pc, #48]	; (800702c <__libc_init_array+0x44>)
 8006ffc:	f000 f820 	bl	8007040 <_init>
 8007000:	1ba4      	subs	r4, r4, r6
 8007002:	10a4      	asrs	r4, r4, #2
 8007004:	2500      	movs	r5, #0
 8007006:	42a5      	cmp	r5, r4
 8007008:	d105      	bne.n	8007016 <__libc_init_array+0x2e>
 800700a:	bd70      	pop	{r4, r5, r6, pc}
 800700c:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 8007010:	4798      	blx	r3
 8007012:	3501      	adds	r5, #1
 8007014:	e7ee      	b.n	8006ff4 <__libc_init_array+0xc>
 8007016:	f856 3025 	ldr.w	r3, [r6, r5, lsl #2]
 800701a:	4798      	blx	r3
 800701c:	3501      	adds	r5, #1
 800701e:	e7f2      	b.n	8007006 <__libc_init_array+0x1e>
 8007020:	080075bc 	.word	0x080075bc
 8007024:	080075bc 	.word	0x080075bc
 8007028:	080075bc 	.word	0x080075bc
 800702c:	080075c0 	.word	0x080075c0

08007030 <memset>:
 8007030:	4402      	add	r2, r0
 8007032:	4603      	mov	r3, r0
 8007034:	4293      	cmp	r3, r2
 8007036:	d100      	bne.n	800703a <memset+0xa>
 8007038:	4770      	bx	lr
 800703a:	f803 1b01 	strb.w	r1, [r3], #1
 800703e:	e7f9      	b.n	8007034 <memset+0x4>

08007040 <_init>:
 8007040:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 8007042:	bf00      	nop
 8007044:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8007046:	bc08      	pop	{r3}
 8007048:	469e      	mov	lr, r3
 800704a:	4770      	bx	lr

0800704c <_fini>:
 800704c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
 800704e:	bf00      	nop
 8007050:	bcf8      	pop	{r3, r4, r5, r6, r7}
 8007052:	bc08      	pop	{r3}
 8007054:	469e      	mov	lr, r3
 8007056:	4770      	bx	lr