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stm32f4xx_hal_flash_ex.c 49KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_flash_ex.c
  4. * @author MCD Application Team
  5. * @brief Extended FLASH HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the FLASH extension peripheral:
  8. * + Extended programming operations functions
  9. *
  10. @verbatim
  11. ==============================================================================
  12. ##### Flash Extension features #####
  13. ==============================================================================
  14. [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
  15. STM32F429xx/439xx devices contains the following additional features
  16. (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
  17. capability (RWW)
  18. (+) Dual bank memory organization
  19. (+) PCROP protection for all banks
  20. ##### How to use this driver #####
  21. ==============================================================================
  22. [..] This driver provides functions to configure and program the FLASH memory
  23. of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
  24. devices. It includes
  25. (#) FLASH Memory Erase functions:
  26. (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
  27. HAL_FLASH_Lock() functions
  28. (++) Erase function: Erase sector, erase all sectors
  29. (++) There are two modes of erase :
  30. (+++) Polling Mode using HAL_FLASHEx_Erase()
  31. (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
  32. (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
  33. (++) Set/Reset the write protection
  34. (++) Set the Read protection Level
  35. (++) Set the BOR level
  36. (++) Program the user Option Bytes
  37. (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
  38. (++) Extended space (bank 2) erase function
  39. (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
  40. (++) Dual Boot activation
  41. (++) Write protection configuration for bank 2
  42. (++) PCROP protection configuration and control for both banks
  43. @endverbatim
  44. ******************************************************************************
  45. * @attention
  46. *
  47. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  48. * All rights reserved.</center></h2>
  49. *
  50. * This software component is licensed by ST under BSD 3-Clause license,
  51. * the "License"; You may not use this file except in compliance with the
  52. * License. You may obtain a copy of the License at:
  53. * opensource.org/licenses/BSD-3-Clause
  54. *
  55. ******************************************************************************
  56. */
  57. /* Includes ------------------------------------------------------------------*/
  58. #include "stm32f4xx_hal.h"
  59. /** @addtogroup STM32F4xx_HAL_Driver
  60. * @{
  61. */
  62. /** @defgroup FLASHEx FLASHEx
  63. * @brief FLASH HAL Extension module driver
  64. * @{
  65. */
  66. #ifdef HAL_FLASH_MODULE_ENABLED
  67. /* Private typedef -----------------------------------------------------------*/
  68. /* Private define ------------------------------------------------------------*/
  69. /** @addtogroup FLASHEx_Private_Constants
  70. * @{
  71. */
  72. #define FLASH_TIMEOUT_VALUE 50000U /* 50 s */
  73. /**
  74. * @}
  75. */
  76. /* Private macro -------------------------------------------------------------*/
  77. /* Private variables ---------------------------------------------------------*/
  78. /** @addtogroup FLASHEx_Private_Variables
  79. * @{
  80. */
  81. extern FLASH_ProcessTypeDef pFlash;
  82. /**
  83. * @}
  84. */
  85. /* Private function prototypes -----------------------------------------------*/
  86. /** @addtogroup FLASHEx_Private_Functions
  87. * @{
  88. */
  89. /* Option bytes control */
  90. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
  91. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
  92. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
  93. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
  94. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
  95. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
  96. static uint8_t FLASH_OB_GetUser(void);
  97. static uint16_t FLASH_OB_GetWRP(void);
  98. static uint8_t FLASH_OB_GetRDP(void);
  99. static uint8_t FLASH_OB_GetBOR(void);
  100. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
  101. defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
  102. defined(STM32F423xx)
  103. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
  104. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
  105. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  106. STM32F413xx || STM32F423xx */
  107. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  108. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  109. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
  110. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
  111. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  112. extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
  113. /**
  114. * @}
  115. */
  116. /* Exported functions --------------------------------------------------------*/
  117. /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
  118. * @{
  119. */
  120. /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
  121. * @brief Extended IO operation functions
  122. *
  123. @verbatim
  124. ===============================================================================
  125. ##### Extended programming operation functions #####
  126. ===============================================================================
  127. [..]
  128. This subsection provides a set of functions allowing to manage the Extension FLASH
  129. programming operations.
  130. @endverbatim
  131. * @{
  132. */
  133. /**
  134. * @brief Perform a mass erase or erase the specified FLASH memory sectors
  135. * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
  136. * contains the configuration information for the erasing.
  137. *
  138. * @param[out] SectorError pointer to variable that
  139. * contains the configuration information on faulty sector in case of error
  140. * (0xFFFFFFFFU means that all the sectors have been correctly erased)
  141. *
  142. * @retval HAL Status
  143. */
  144. HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
  145. {
  146. HAL_StatusTypeDef status = HAL_ERROR;
  147. uint32_t index = 0U;
  148. /* Process Locked */
  149. __HAL_LOCK(&pFlash);
  150. /* Check the parameters */
  151. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  152. /* Wait for last operation to be completed */
  153. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  154. if(status == HAL_OK)
  155. {
  156. /*Initialization of SectorError variable*/
  157. *SectorError = 0xFFFFFFFFU;
  158. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  159. {
  160. /*Mass erase to be done*/
  161. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  162. /* Wait for last operation to be completed */
  163. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  164. /* if the erase operation is completed, disable the MER Bit */
  165. FLASH->CR &= (~FLASH_MER_BIT);
  166. }
  167. else
  168. {
  169. /* Check the parameters */
  170. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  171. /* Erase by sector by sector to be done*/
  172. for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
  173. {
  174. FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
  175. /* Wait for last operation to be completed */
  176. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  177. /* If the erase operation is completed, disable the SER and SNB Bits */
  178. CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
  179. if(status != HAL_OK)
  180. {
  181. /* In case of error, stop erase procedure and return the faulty sector*/
  182. *SectorError = index;
  183. break;
  184. }
  185. }
  186. }
  187. /* Flush the caches to be sure of the data consistency */
  188. FLASH_FlushCaches();
  189. }
  190. /* Process Unlocked */
  191. __HAL_UNLOCK(&pFlash);
  192. return status;
  193. }
  194. /**
  195. * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
  196. * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
  197. * contains the configuration information for the erasing.
  198. *
  199. * @retval HAL Status
  200. */
  201. HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
  202. {
  203. HAL_StatusTypeDef status = HAL_OK;
  204. /* Process Locked */
  205. __HAL_LOCK(&pFlash);
  206. /* Check the parameters */
  207. assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
  208. /* Enable End of FLASH Operation interrupt */
  209. __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
  210. /* Enable Error source interrupt */
  211. __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
  212. /* Clear pending flags (if any) */
  213. __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
  214. FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
  215. if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
  216. {
  217. /*Mass erase to be done*/
  218. pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
  219. pFlash.Bank = pEraseInit->Banks;
  220. FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
  221. }
  222. else
  223. {
  224. /* Erase by sector to be done*/
  225. /* Check the parameters */
  226. assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
  227. pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
  228. pFlash.NbSectorsToErase = pEraseInit->NbSectors;
  229. pFlash.Sector = pEraseInit->Sector;
  230. pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
  231. /*Erase 1st sector and wait for IT*/
  232. FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
  233. }
  234. return status;
  235. }
  236. /**
  237. * @brief Program option bytes
  238. * @param pOBInit pointer to an FLASH_OBInitStruct structure that
  239. * contains the configuration information for the programming.
  240. *
  241. * @retval HAL Status
  242. */
  243. HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
  244. {
  245. HAL_StatusTypeDef status = HAL_ERROR;
  246. /* Process Locked */
  247. __HAL_LOCK(&pFlash);
  248. /* Check the parameters */
  249. assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
  250. /*Write protection configuration*/
  251. if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
  252. {
  253. assert_param(IS_WRPSTATE(pOBInit->WRPState));
  254. if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
  255. {
  256. /*Enable of Write protection on the selected Sector*/
  257. status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
  258. }
  259. else
  260. {
  261. /*Disable of Write protection on the selected Sector*/
  262. status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
  263. }
  264. }
  265. /*Read protection configuration*/
  266. if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
  267. {
  268. status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
  269. }
  270. /*USER configuration*/
  271. if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
  272. {
  273. status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
  274. pOBInit->USERConfig&OB_STOP_NO_RST,
  275. pOBInit->USERConfig&OB_STDBY_NO_RST);
  276. }
  277. /*BOR Level configuration*/
  278. if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
  279. {
  280. status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
  281. }
  282. /* Process Unlocked */
  283. __HAL_UNLOCK(&pFlash);
  284. return status;
  285. }
  286. /**
  287. * @brief Get the Option byte configuration
  288. * @param pOBInit pointer to an FLASH_OBInitStruct structure that
  289. * contains the configuration information for the programming.
  290. *
  291. * @retval None
  292. */
  293. void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
  294. {
  295. pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
  296. /*Get WRP*/
  297. pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
  298. /*Get RDP Level*/
  299. pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
  300. /*Get USER*/
  301. pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
  302. /*Get BOR Level*/
  303. pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
  304. }
  305. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
  306. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  307. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
  308. defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  309. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  310. /**
  311. * @brief Program option bytes
  312. * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  313. * contains the configuration information for the programming.
  314. *
  315. * @retval HAL Status
  316. */
  317. HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  318. {
  319. HAL_StatusTypeDef status = HAL_ERROR;
  320. /* Check the parameters */
  321. assert_param(IS_OBEX(pAdvOBInit->OptionType));
  322. /*Program PCROP option byte*/
  323. if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
  324. {
  325. /* Check the parameters */
  326. assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
  327. if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
  328. {
  329. /*Enable of Write protection on the selected Sector*/
  330. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  331. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  332. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  333. status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
  334. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  335. status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  336. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  337. STM32F413xx || STM32F423xx */
  338. }
  339. else
  340. {
  341. /*Disable of Write protection on the selected Sector*/
  342. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  343. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  344. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  345. status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
  346. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  347. status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
  348. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  349. STM32F413xx || STM32F423xx */
  350. }
  351. }
  352. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  353. /*Program BOOT config option byte*/
  354. if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
  355. {
  356. status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
  357. }
  358. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  359. return status;
  360. }
  361. /**
  362. * @brief Get the OBEX byte configuration
  363. * @param pAdvOBInit pointer to an FLASH_AdvOBProgramInitTypeDef structure that
  364. * contains the configuration information for the programming.
  365. *
  366. * @retval None
  367. */
  368. void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
  369. {
  370. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  371. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  372. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  373. /*Get Sector*/
  374. pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  375. #else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
  376. /*Get Sector for Bank1*/
  377. pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  378. /*Get Sector for Bank2*/
  379. pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  380. /*Get Boot config OB*/
  381. pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
  382. #endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  383. STM32F413xx || STM32F423xx */
  384. }
  385. /**
  386. * @brief Select the Protection Mode
  387. *
  388. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  389. * Global Read Out Protection modification (from level1 to level0)
  390. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  391. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  392. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  393. * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
  394. *
  395. * @retval HAL Status
  396. */
  397. HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
  398. {
  399. uint8_t optiontmp = 0xFF;
  400. /* Mask SPRMOD bit */
  401. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  402. /* Update Option Byte */
  403. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
  404. return HAL_OK;
  405. }
  406. /**
  407. * @brief Deselect the Protection Mode
  408. *
  409. * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
  410. * Global Read Out Protection modification (from level1 to level0)
  411. * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
  412. * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
  413. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
  414. * STM32F469xx/STM32F479xx/STM32F412xx/STM32F413xx devices.
  415. *
  416. * @retval HAL Status
  417. */
  418. HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
  419. {
  420. uint8_t optiontmp = 0xFF;
  421. /* Mask SPRMOD bit */
  422. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
  423. /* Update Option Byte */
  424. *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
  425. return HAL_OK;
  426. }
  427. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
  428. STM32F411xE || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx ||
  429. STM32F413xx || STM32F423xx */
  430. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  431. /**
  432. * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
  433. * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
  434. * @retval The FLASH Write Protection Option Bytes value
  435. */
  436. uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
  437. {
  438. /* Return the FLASH write protection Register value */
  439. return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
  440. }
  441. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  442. /**
  443. * @}
  444. */
  445. #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
  446. /**
  447. * @brief Full erase of FLASH memory sectors
  448. * @param VoltageRange The device voltage range which defines the erase parallelism.
  449. * This parameter can be one of the following values:
  450. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  451. * the operation will be done by byte (8-bit)
  452. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  453. * the operation will be done by half word (16-bit)
  454. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  455. * the operation will be done by word (32-bit)
  456. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  457. * the operation will be done by double word (64-bit)
  458. *
  459. * @param Banks Banks to be erased
  460. * This parameter can be one of the following values:
  461. * @arg FLASH_BANK_1: Bank1 to be erased
  462. * @arg FLASH_BANK_2: Bank2 to be erased
  463. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  464. *
  465. * @retval HAL Status
  466. */
  467. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  468. {
  469. /* Check the parameters */
  470. assert_param(IS_VOLTAGERANGE(VoltageRange));
  471. assert_param(IS_FLASH_BANK(Banks));
  472. /* if the previous operation is completed, proceed to erase all sectors */
  473. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  474. if(Banks == FLASH_BANK_BOTH)
  475. {
  476. /* bank1 & bank2 will be erased*/
  477. FLASH->CR |= FLASH_MER_BIT;
  478. }
  479. else if(Banks == FLASH_BANK_1)
  480. {
  481. /*Only bank1 will be erased*/
  482. FLASH->CR |= FLASH_CR_MER1;
  483. }
  484. else
  485. {
  486. /*Only bank2 will be erased*/
  487. FLASH->CR |= FLASH_CR_MER2;
  488. }
  489. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
  490. }
  491. /**
  492. * @brief Erase the specified FLASH memory sector
  493. * @param Sector FLASH sector to erase
  494. * The value of this parameter depend on device used within the same series
  495. * @param VoltageRange The device voltage range which defines the erase parallelism.
  496. * This parameter can be one of the following values:
  497. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  498. * the operation will be done by byte (8-bit)
  499. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  500. * the operation will be done by half word (16-bit)
  501. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  502. * the operation will be done by word (32-bit)
  503. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  504. * the operation will be done by double word (64-bit)
  505. *
  506. * @retval None
  507. */
  508. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  509. {
  510. uint32_t tmp_psize = 0U;
  511. /* Check the parameters */
  512. assert_param(IS_FLASH_SECTOR(Sector));
  513. assert_param(IS_VOLTAGERANGE(VoltageRange));
  514. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  515. {
  516. tmp_psize = FLASH_PSIZE_BYTE;
  517. }
  518. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  519. {
  520. tmp_psize = FLASH_PSIZE_HALF_WORD;
  521. }
  522. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  523. {
  524. tmp_psize = FLASH_PSIZE_WORD;
  525. }
  526. else
  527. {
  528. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  529. }
  530. /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
  531. if(Sector > FLASH_SECTOR_11)
  532. {
  533. Sector += 4U;
  534. }
  535. /* If the previous operation is completed, proceed to erase the sector */
  536. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  537. FLASH->CR |= tmp_psize;
  538. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  539. FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
  540. FLASH->CR |= FLASH_CR_STRT;
  541. }
  542. /**
  543. * @brief Enable the write protection of the desired bank1 or bank 2 sectors
  544. *
  545. * @note When the memory read protection level is selected (RDP level = 1),
  546. * it is not possible to program or erase the flash sector i if CortexM4
  547. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  548. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  549. *
  550. * @param WRPSector specifies the sector(s) to be write protected.
  551. * This parameter can be one of the following values:
  552. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  553. * @arg OB_WRP_SECTOR_All
  554. * @note BANK2 starts from OB_WRP_SECTOR_12
  555. *
  556. * @param Banks Enable write protection on all the sectors for the specific bank
  557. * This parameter can be one of the following values:
  558. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  559. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  560. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  561. *
  562. * @retval HAL FLASH State
  563. */
  564. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  565. {
  566. HAL_StatusTypeDef status = HAL_OK;
  567. /* Check the parameters */
  568. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  569. assert_param(IS_FLASH_BANK(Banks));
  570. /* Wait for last operation to be completed */
  571. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  572. if(status == HAL_OK)
  573. {
  574. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  575. (WRPSector < OB_WRP_SECTOR_12))
  576. {
  577. if(WRPSector == OB_WRP_SECTOR_All)
  578. {
  579. /*Write protection on all sector of BANK1*/
  580. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
  581. }
  582. else
  583. {
  584. /*Write protection done on sectors of BANK1*/
  585. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  586. }
  587. }
  588. else
  589. {
  590. /*Write protection done on sectors of BANK2*/
  591. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
  592. }
  593. /*Write protection on all sector of BANK2*/
  594. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  595. {
  596. /* Wait for last operation to be completed */
  597. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  598. if(status == HAL_OK)
  599. {
  600. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
  601. }
  602. }
  603. }
  604. return status;
  605. }
  606. /**
  607. * @brief Disable the write protection of the desired bank1 or bank 2 sectors
  608. *
  609. * @note When the memory read protection level is selected (RDP level = 1),
  610. * it is not possible to program or erase the flash sector i if CortexM4
  611. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  612. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  613. *
  614. * @param WRPSector specifies the sector(s) to be write protected.
  615. * This parameter can be one of the following values:
  616. * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
  617. * @arg OB_WRP_Sector_All
  618. * @note BANK2 starts from OB_WRP_SECTOR_12
  619. *
  620. * @param Banks Disable write protection on all the sectors for the specific bank
  621. * This parameter can be one of the following values:
  622. * @arg FLASH_BANK_1: Bank1 to be erased
  623. * @arg FLASH_BANK_2: Bank2 to be erased
  624. * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
  625. *
  626. * @retval HAL Status
  627. */
  628. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  629. {
  630. HAL_StatusTypeDef status = HAL_OK;
  631. /* Check the parameters */
  632. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  633. assert_param(IS_FLASH_BANK(Banks));
  634. /* Wait for last operation to be completed */
  635. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  636. if(status == HAL_OK)
  637. {
  638. if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
  639. (WRPSector < OB_WRP_SECTOR_12))
  640. {
  641. if(WRPSector == OB_WRP_SECTOR_All)
  642. {
  643. /*Write protection on all sector of BANK1*/
  644. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  645. }
  646. else
  647. {
  648. /*Write protection done on sectors of BANK1*/
  649. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  650. }
  651. }
  652. else
  653. {
  654. /*Write protection done on sectors of BANK2*/
  655. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  656. }
  657. /*Write protection on all sector of BANK2*/
  658. if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
  659. {
  660. /* Wait for last operation to be completed */
  661. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  662. if(status == HAL_OK)
  663. {
  664. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
  665. }
  666. }
  667. }
  668. return status;
  669. }
  670. /**
  671. * @brief Configure the Dual Bank Boot.
  672. *
  673. * @note This function can be used only for STM32F42xxx/43xxx devices.
  674. *
  675. * @param BootConfig specifies the Dual Bank Boot Option byte.
  676. * This parameter can be one of the following values:
  677. * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
  678. * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
  679. * @retval None
  680. */
  681. static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
  682. {
  683. HAL_StatusTypeDef status = HAL_OK;
  684. /* Check the parameters */
  685. assert_param(IS_OB_BOOT(BootConfig));
  686. /* Wait for last operation to be completed */
  687. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  688. if(status == HAL_OK)
  689. {
  690. /* Set Dual Bank Boot */
  691. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
  692. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
  693. }
  694. return status;
  695. }
  696. /**
  697. * @brief Enable the read/write protection (PCROP) of the desired
  698. * sectors of Bank 1 and/or Bank 2.
  699. * @note This function can be used only for STM32F42xxx/43xxx devices.
  700. * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
  701. * This parameter can be one of the following values:
  702. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  703. * @arg OB_PCROP_SECTOR__All
  704. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  705. * This parameter can be one of the following values:
  706. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  707. * @arg OB_PCROP_SECTOR__All
  708. * @param Banks Enable PCROP protection on all the sectors for the specific bank
  709. * This parameter can be one of the following values:
  710. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  711. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  712. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  713. *
  714. * @retval HAL Status
  715. */
  716. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  717. {
  718. HAL_StatusTypeDef status = HAL_OK;
  719. assert_param(IS_FLASH_BANK(Banks));
  720. /* Wait for last operation to be completed */
  721. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  722. if(status == HAL_OK)
  723. {
  724. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  725. {
  726. assert_param(IS_OB_PCROP(SectorBank1));
  727. /*Write protection done on sectors of BANK1*/
  728. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
  729. }
  730. else
  731. {
  732. assert_param(IS_OB_PCROP(SectorBank2));
  733. /*Write protection done on sectors of BANK2*/
  734. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  735. }
  736. /*Write protection on all sector of BANK2*/
  737. if(Banks == FLASH_BANK_BOTH)
  738. {
  739. assert_param(IS_OB_PCROP(SectorBank2));
  740. /* Wait for last operation to be completed */
  741. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  742. if(status == HAL_OK)
  743. {
  744. /*Write protection done on sectors of BANK2*/
  745. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
  746. }
  747. }
  748. }
  749. return status;
  750. }
  751. /**
  752. * @brief Disable the read/write protection (PCROP) of the desired
  753. * sectors of Bank 1 and/or Bank 2.
  754. * @note This function can be used only for STM32F42xxx/43xxx devices.
  755. * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
  756. * This parameter can be one of the following values:
  757. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
  758. * @arg OB_PCROP_SECTOR__All
  759. * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
  760. * This parameter can be one of the following values:
  761. * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
  762. * @arg OB_PCROP_SECTOR__All
  763. * @param Banks Disable PCROP protection on all the sectors for the specific bank
  764. * This parameter can be one of the following values:
  765. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  766. * @arg FLASH_BANK_2: WRP on all sectors of bank2
  767. * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
  768. *
  769. * @retval HAL Status
  770. */
  771. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
  772. {
  773. HAL_StatusTypeDef status = HAL_OK;
  774. /* Check the parameters */
  775. assert_param(IS_FLASH_BANK(Banks));
  776. /* Wait for last operation to be completed */
  777. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  778. if(status == HAL_OK)
  779. {
  780. if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
  781. {
  782. assert_param(IS_OB_PCROP(SectorBank1));
  783. /*Write protection done on sectors of BANK1*/
  784. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
  785. }
  786. else
  787. {
  788. /*Write protection done on sectors of BANK2*/
  789. assert_param(IS_OB_PCROP(SectorBank2));
  790. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  791. }
  792. /*Write protection on all sector of BANK2*/
  793. if(Banks == FLASH_BANK_BOTH)
  794. {
  795. assert_param(IS_OB_PCROP(SectorBank2));
  796. /* Wait for last operation to be completed */
  797. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  798. if(status == HAL_OK)
  799. {
  800. /*Write protection done on sectors of BANK2*/
  801. *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
  802. }
  803. }
  804. }
  805. return status;
  806. }
  807. #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
  808. #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
  809. defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
  810. defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) ||\
  811. defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||\
  812. defined(STM32F423xx)
  813. /**
  814. * @brief Mass erase of FLASH memory
  815. * @param VoltageRange The device voltage range which defines the erase parallelism.
  816. * This parameter can be one of the following values:
  817. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  818. * the operation will be done by byte (8-bit)
  819. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  820. * the operation will be done by half word (16-bit)
  821. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  822. * the operation will be done by word (32-bit)
  823. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  824. * the operation will be done by double word (64-bit)
  825. *
  826. * @param Banks Banks to be erased
  827. * This parameter can be one of the following values:
  828. * @arg FLASH_BANK_1: Bank1 to be erased
  829. *
  830. * @retval None
  831. */
  832. static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
  833. {
  834. /* Check the parameters */
  835. assert_param(IS_VOLTAGERANGE(VoltageRange));
  836. assert_param(IS_FLASH_BANK(Banks));
  837. /* If the previous operation is completed, proceed to erase all sectors */
  838. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  839. FLASH->CR |= FLASH_CR_MER;
  840. FLASH->CR |= FLASH_CR_STRT | ((uint32_t)VoltageRange <<8U);
  841. }
  842. /**
  843. * @brief Erase the specified FLASH memory sector
  844. * @param Sector FLASH sector to erase
  845. * The value of this parameter depend on device used within the same series
  846. * @param VoltageRange The device voltage range which defines the erase parallelism.
  847. * This parameter can be one of the following values:
  848. * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
  849. * the operation will be done by byte (8-bit)
  850. * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
  851. * the operation will be done by half word (16-bit)
  852. * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
  853. * the operation will be done by word (32-bit)
  854. * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
  855. * the operation will be done by double word (64-bit)
  856. *
  857. * @retval None
  858. */
  859. void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
  860. {
  861. uint32_t tmp_psize = 0U;
  862. /* Check the parameters */
  863. assert_param(IS_FLASH_SECTOR(Sector));
  864. assert_param(IS_VOLTAGERANGE(VoltageRange));
  865. if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
  866. {
  867. tmp_psize = FLASH_PSIZE_BYTE;
  868. }
  869. else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
  870. {
  871. tmp_psize = FLASH_PSIZE_HALF_WORD;
  872. }
  873. else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
  874. {
  875. tmp_psize = FLASH_PSIZE_WORD;
  876. }
  877. else
  878. {
  879. tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
  880. }
  881. /* If the previous operation is completed, proceed to erase the sector */
  882. CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
  883. FLASH->CR |= tmp_psize;
  884. CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
  885. FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
  886. FLASH->CR |= FLASH_CR_STRT;
  887. }
  888. /**
  889. * @brief Enable the write protection of the desired bank 1 sectors
  890. *
  891. * @note When the memory read protection level is selected (RDP level = 1),
  892. * it is not possible to program or erase the flash sector i if CortexM4
  893. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  894. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  895. *
  896. * @param WRPSector specifies the sector(s) to be write protected.
  897. * The value of this parameter depend on device used within the same series
  898. *
  899. * @param Banks Enable write protection on all the sectors for the specific bank
  900. * This parameter can be one of the following values:
  901. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  902. *
  903. * @retval HAL Status
  904. */
  905. static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
  906. {
  907. HAL_StatusTypeDef status = HAL_OK;
  908. /* Check the parameters */
  909. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  910. assert_param(IS_FLASH_BANK(Banks));
  911. /* Wait for last operation to be completed */
  912. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  913. if(status == HAL_OK)
  914. {
  915. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
  916. }
  917. return status;
  918. }
  919. /**
  920. * @brief Disable the write protection of the desired bank 1 sectors
  921. *
  922. * @note When the memory read protection level is selected (RDP level = 1),
  923. * it is not possible to program or erase the flash sector i if CortexM4
  924. * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
  925. * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
  926. *
  927. * @param WRPSector specifies the sector(s) to be write protected.
  928. * The value of this parameter depend on device used within the same series
  929. *
  930. * @param Banks Enable write protection on all the sectors for the specific bank
  931. * This parameter can be one of the following values:
  932. * @arg FLASH_BANK_1: WRP on all sectors of bank1
  933. *
  934. * @retval HAL Status
  935. */
  936. static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
  937. {
  938. HAL_StatusTypeDef status = HAL_OK;
  939. /* Check the parameters */
  940. assert_param(IS_OB_WRP_SECTOR(WRPSector));
  941. assert_param(IS_FLASH_BANK(Banks));
  942. /* Wait for last operation to be completed */
  943. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  944. if(status == HAL_OK)
  945. {
  946. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
  947. }
  948. return status;
  949. }
  950. #endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  951. STM32F413xx || STM32F423xx */
  952. #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
  953. defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) ||\
  954. defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
  955. /**
  956. * @brief Enable the read/write protection (PCROP) of the desired sectors.
  957. * @note This function can be used only for STM32F401xx devices.
  958. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  959. * This parameter can be one of the following values:
  960. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  961. * @arg OB_PCROP_Sector_All
  962. * @retval HAL Status
  963. */
  964. static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
  965. {
  966. HAL_StatusTypeDef status = HAL_OK;
  967. /* Check the parameters */
  968. assert_param(IS_OB_PCROP(Sector));
  969. /* Wait for last operation to be completed */
  970. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  971. if(status == HAL_OK)
  972. {
  973. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
  974. }
  975. return status;
  976. }
  977. /**
  978. * @brief Disable the read/write protection (PCROP) of the desired sectors.
  979. * @note This function can be used only for STM32F401xx devices.
  980. * @param Sector specifies the sector(s) to be read/write protected or unprotected.
  981. * This parameter can be one of the following values:
  982. * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
  983. * @arg OB_PCROP_Sector_All
  984. * @retval HAL Status
  985. */
  986. static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
  987. {
  988. HAL_StatusTypeDef status = HAL_OK;
  989. /* Check the parameters */
  990. assert_param(IS_OB_PCROP(Sector));
  991. /* Wait for last operation to be completed */
  992. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  993. if(status == HAL_OK)
  994. {
  995. *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
  996. }
  997. return status;
  998. }
  999. #endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx
  1000. STM32F413xx || STM32F423xx */
  1001. /**
  1002. * @brief Set the read protection level.
  1003. * @param Level specifies the read protection level.
  1004. * This parameter can be one of the following values:
  1005. * @arg OB_RDP_LEVEL_0: No protection
  1006. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1007. * @arg OB_RDP_LEVEL_2: Full chip protection
  1008. *
  1009. * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
  1010. *
  1011. * @retval HAL Status
  1012. */
  1013. static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
  1014. {
  1015. HAL_StatusTypeDef status = HAL_OK;
  1016. /* Check the parameters */
  1017. assert_param(IS_OB_RDP_LEVEL(Level));
  1018. /* Wait for last operation to be completed */
  1019. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1020. if(status == HAL_OK)
  1021. {
  1022. *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
  1023. }
  1024. return status;
  1025. }
  1026. /**
  1027. * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
  1028. * @param Iwdg Selects the IWDG mode
  1029. * This parameter can be one of the following values:
  1030. * @arg OB_IWDG_SW: Software IWDG selected
  1031. * @arg OB_IWDG_HW: Hardware IWDG selected
  1032. * @param Stop Reset event when entering STOP mode.
  1033. * This parameter can be one of the following values:
  1034. * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
  1035. * @arg OB_STOP_RST: Reset generated when entering in STOP
  1036. * @param Stdby Reset event when entering Standby mode.
  1037. * This parameter can be one of the following values:
  1038. * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
  1039. * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
  1040. * @retval HAL Status
  1041. */
  1042. static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
  1043. {
  1044. uint8_t optiontmp = 0xFF;
  1045. HAL_StatusTypeDef status = HAL_OK;
  1046. /* Check the parameters */
  1047. assert_param(IS_OB_IWDG_SOURCE(Iwdg));
  1048. assert_param(IS_OB_STOP_SOURCE(Stop));
  1049. assert_param(IS_OB_STDBY_SOURCE(Stdby));
  1050. /* Wait for last operation to be completed */
  1051. status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
  1052. if(status == HAL_OK)
  1053. {
  1054. /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
  1055. optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
  1056. /* Update User Option Byte */
  1057. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
  1058. }
  1059. return status;
  1060. }
  1061. /**
  1062. * @brief Set the BOR Level.
  1063. * @param Level specifies the Option Bytes BOR Reset Level.
  1064. * This parameter can be one of the following values:
  1065. * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1066. * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1067. * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1068. * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
  1069. * @retval HAL Status
  1070. */
  1071. static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
  1072. {
  1073. /* Check the parameters */
  1074. assert_param(IS_OB_BOR_LEVEL(Level));
  1075. /* Set the BOR Level */
  1076. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
  1077. *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
  1078. return HAL_OK;
  1079. }
  1080. /**
  1081. * @brief Return the FLASH User Option Byte value.
  1082. * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
  1083. * and RST_STDBY(Bit2).
  1084. */
  1085. static uint8_t FLASH_OB_GetUser(void)
  1086. {
  1087. /* Return the User Option Byte */
  1088. return ((uint8_t)(FLASH->OPTCR & 0xE0));
  1089. }
  1090. /**
  1091. * @brief Return the FLASH Write Protection Option Bytes value.
  1092. * @retval uint16_t FLASH Write Protection Option Bytes value
  1093. */
  1094. static uint16_t FLASH_OB_GetWRP(void)
  1095. {
  1096. /* Return the FLASH write protection Register value */
  1097. return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
  1098. }
  1099. /**
  1100. * @brief Returns the FLASH Read Protection level.
  1101. * @retval FLASH ReadOut Protection Status:
  1102. * This parameter can be one of the following values:
  1103. * @arg OB_RDP_LEVEL_0: No protection
  1104. * @arg OB_RDP_LEVEL_1: Read protection of the memory
  1105. * @arg OB_RDP_LEVEL_2: Full chip protection
  1106. */
  1107. static uint8_t FLASH_OB_GetRDP(void)
  1108. {
  1109. uint8_t readstatus = OB_RDP_LEVEL_0;
  1110. if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
  1111. {
  1112. readstatus = OB_RDP_LEVEL_2;
  1113. }
  1114. else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_0))
  1115. {
  1116. readstatus = OB_RDP_LEVEL_0;
  1117. }
  1118. else
  1119. {
  1120. readstatus = OB_RDP_LEVEL_1;
  1121. }
  1122. return readstatus;
  1123. }
  1124. /**
  1125. * @brief Returns the FLASH BOR level.
  1126. * @retval uint8_t The FLASH BOR level:
  1127. * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
  1128. * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
  1129. * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
  1130. * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
  1131. */
  1132. static uint8_t FLASH_OB_GetBOR(void)
  1133. {
  1134. /* Return the FLASH BOR level */
  1135. return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
  1136. }
  1137. /**
  1138. * @brief Flush the instruction and data caches
  1139. * @retval None
  1140. */
  1141. void FLASH_FlushCaches(void)
  1142. {
  1143. /* Flush instruction cache */
  1144. if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN)!= RESET)
  1145. {
  1146. /* Disable instruction cache */
  1147. __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
  1148. /* Reset instruction cache */
  1149. __HAL_FLASH_INSTRUCTION_CACHE_RESET();
  1150. /* Enable instruction cache */
  1151. __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
  1152. }
  1153. /* Flush data cache */
  1154. if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET)
  1155. {
  1156. /* Disable data cache */
  1157. __HAL_FLASH_DATA_CACHE_DISABLE();
  1158. /* Reset data cache */
  1159. __HAL_FLASH_DATA_CACHE_RESET();
  1160. /* Enable data cache */
  1161. __HAL_FLASH_DATA_CACHE_ENABLE();
  1162. }
  1163. }
  1164. /**
  1165. * @}
  1166. */
  1167. #endif /* HAL_FLASH_MODULE_ENABLED */
  1168. /**
  1169. * @}
  1170. */
  1171. /**
  1172. * @}
  1173. */
  1174. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/