Ralph Badenberg - Fakultät Elektrotechnik Feinwerktechnik Informationstechnik

Ralph Badenberg badenbergra78621

Joined on Apr 28, 2022
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badenbergra78621 pushed to master at badenbergra78621/signal_processing_vorlage

b783fe53a2 crc.c is ready now and works as required

11 months ago

badenbergra78621 pushed to master at badenbergra78621/signal_processing_vorlage

69302fa649 crc.c Korrekturen

11 months ago

badenbergra78621 pushed to master at badenbergra78621/signal_processing_vorlage

4d3a27edd1 verbessert

11 months ago

badenbergra78621 pushed to master at badenbergra78621/signal_processing_vorlage

903c139097 verschönert
cc653b9c70 verschönert
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11 months ago

badenbergra78621 pushed to master at badenbergra78621/signal_processing_vorlage

fb2d609dbc Added add.c

1 year ago

badenbergra78621 created repository badenbergra78621/signal_processing_vorlage

1 year ago

badenbergra78621 pushed to main at kuntzschcl/ESY1_Projekt_2022

71fd941588 modports angepasst

2 years ago

badenbergra78621 pushed to main at kuntzschcl/ESY1_Projekt_2022

9ffb72cf97 Screenshots from RADIANT --> how to create SPI module with radiant

2 years ago

badenbergra78621 pushed to main at kuntzschcl/ESY1_Projekt_2022

72c964475f Screenshots from RADIANT --> how to create SPI module with radiant

2 years ago

badenbergra78621 pushed to main at kuntzschcl/ESY1_Projekt_2022

c46a1c3b33 add "spi_interface_portsI()" (beginning of document)

2 years ago

badenbergra78621 pushed to main at kuntzschcl/ESY1_Projekt_2022

700350608a Dateien hochladen nach „“

2 years ago