beckal87649 4d0bb79521 4.Test

2026-01-13 10:53:22 +01:00

hardware

4.Test

2026-01-13 10:53:22 +01:00

software/signal_processing

4.Test

2026-01-13 10:53:22 +01:00

tests

New FFT.vhd Template and Fix FFT TB (expected values)

2025-05-30 11:33:35 +02:00

.gitignore

Initial commit

2023-10-31 07:47:27 +01:00

data_channel_hw.tcl

Initial commit

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hardware_task_hw.tcl

Initial commit

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hardware_timestamp_hw.tcl

Initial commit

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hdl_sources.qsf

Initial commit

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init.sh

Initial commit

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Makefile

Initial commit

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niosII.qsys

Initial commit

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signal_processing.cdf

Initial commit

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signal_processing.qpf

Initial commit

2023-10-31 07:47:27 +01:00

signal_processing.qsf

Initial commit

2023-10-31 07:47:27 +01:00

Description

Studentenversion des ESY6/A Praktikums "signal_processing".

19 MiB

Languages

VHDL 38.1%

C 17.1%

Verilog 14.7%

Python 10.5%

Makefile 8.1%

Other 11.5%