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- # // Questa Sim-64
- # // Version 2023.2 linux_x86_64 Apr 11 2023
- # //
- # // Copyright 1991-2023 Mentor Graphics Corporation
- # // All Rights Reserved.
- # //
- # // QuestaSim and its associated documentation contain trade
- # // secrets and commercial or financial information that are the property of
- # // Mentor Graphics Corporation and are privileged, confidential,
- # // and exempt from disclosure under the Freedom of Information Act,
- # // 5 U.S.C. Section 552. Furthermore, this information
- # // is prohibited from disclosure under the Trade Secrets Act,
- # // 18 U.S.C. Section 1905.
- # //
- # vsim -voptargs="+acc" work.test_task_add_rand -do "do vsim.wave; set StdArithNoWarnings 1; set NumericStdNoWarnings 1; run -all" -gGUI_MODE=true -gCHECK_RESULTS=true
- # Start time: 10:15:08 on Dec 11,2024
- # ** Note: (vsim-8009) Loading existing optimized design _opt1
- # Loading std.standard
- # Loading std.textio(body)
- # Loading ieee.std_logic_1164(body)
- # Loading ieee.numeric_std(body)
- # Loading ieee.fixed_float_types
- # Loading ieee.math_real(body)
- # Loading ieee.fixed_generic_pkg(body)
- # Loading ieee.float_generic_pkg(body)
- # Loading ieee.fixed_pkg
- # Loading ieee.float_pkg
- # Loading work.reg32(body)
- # Loading work.avalon_slave
- # Loading work.test_utility(body)
- # Loading work.test_avalon_slave(body)
- # Loading work.task(body)
- # Loading work.test_hardware_task(body)
- # Loading work.test_data_channel_pkg(body)
- # Loading std.env(body)
- # Loading work.sine_cosine_data
- # Loading work.rand_data
- # Loading work.add_rand_data
- # Loading work.test_task_add_rand(test)#1
- # Loading work.task_add(struct)#1
- # Loading work.hardware_task_control(rtl)#1
- # Loading work.avalon_slave_transitions(rtl)#1
- # Loading work.add(rtl)#1
- # Loading work.float_add(mixed)#1
- # Loading work.data_channel(struct)#1
- # Loading work.data_channel_control(rtl)#1
- # Loading work.avalon_slave_transitions(rtl)#2
- # Loading work.data_sink_mux(rtl)#1
- # Loading work.fifo(rtl)#1
- # Loading work.data_source_mux(rtl)#1
- # do vsim.wave
- # set StdArithNoWarnings 1
- # 1
- # set NumericStdNoWarnings 1
- # 1
- # run -all
- # --------------------------------------------------------------------------------
- # Starting test_task_add_rand
- # test_configure ... [ OK ]
- # test_execute ... [ OK ]
- # check_and_write_content ... [ OK ]
- # Break in Process stimulus at test_task_add_rand.vhd line 178
- # End time: 11:04:48 on Dec 11,2024, Elapsed time: 0:49:40
- # Errors: 0, Warnings: 0
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