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faehrfe95012 e70d170be8 Loesung Praktikum
2025-01-08 08:50:24 +01:00
hardware
Loesung Praktikum
2025-01-08 08:50:24 +01:00
software/signal_processing
Loesung Praktikum
2025-01-08 08:50:24 +01:00
tests
Initial commit
2023-10-31 07:47:27 +01:00
.gitignore
Initial commit
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data_channel_hw.tcl
Initial commit
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hardware_task_hw.tcl
Initial commit
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hardware_timestamp_hw.tcl
Initial commit
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hdl_sources.qsf
Initial commit
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init.sh
Initial commit
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Makefile
Initial commit
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niosII.qsys
Initial commit
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signal_processing.cdf
Initial commit
2023-10-31 07:47:27 +01:00
signal_processing.qpf
Initial commit
2023-10-31 07:47:27 +01:00
signal_processing.qsf
Initial commit
2023-10-31 07:47:27 +01:00
Description
Studentenversion des ESY6/A Praktikums "signal_processing".
251 KiB
Languages
VHDL 36.6%
C 17.7%
Verilog 15%
Python 10.7%
Makefile 8.2%
Other 11.7%