FPGA programmiert
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@@ -7,7 +7,7 @@
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<td width="20%" bgcolor="#77BBFF">BSP Type:</td><td>hal</td>
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</tr>
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<tr mode="wrap">
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<td width="20%" bgcolor="#77BBFF">SOPC Design File:</td><td>../../niosII.sopcinfo</td>
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<td width="20%" bgcolor="#77BBFF">SOPC Design File:</td><td>..\..\niosII.sopcinfo</td>
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</tr>
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<tr mode="wrap">
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<td width="20%" bgcolor="#77BBFF">Quartus JDI File:</td><td>default</td>
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@@ -16,19 +16,19 @@
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<td width="20%" bgcolor="#77BBFF">CPU:</td><td>core</td>
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</tr>
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<tr mode="wrap">
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<td width="20%" bgcolor="#77BBFF">BSP Settings File:</td><td>software/signal_processing_bsp/settings.bsp</td>
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<td width="20%" bgcolor="#77BBFF">BSP Settings File:</td><td>software\signal_processing_bsp\settings.bsp</td>
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</tr>
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<tr mode="wrap">
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<td width="20%" bgcolor="#77BBFF">BSP Version:</td><td>default</td>
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</tr>
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<tr mode="wrap">
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<td width="20%" bgcolor="#77BBFF">BSP Generated On:</td><td>20.11.2024 10:02:13</td>
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<td width="20%" bgcolor="#77BBFF">BSP Generated On:</td><td>18.12.2024 09:45:16</td>
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</tr>
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<tr mode="wrap">
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<td width="20%" bgcolor="#77BBFF">BSP Generated Timestamp:</td><td>1732093333939</td>
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<td width="20%" bgcolor="#77BBFF">BSP Generated Timestamp:</td><td>1734511516609</td>
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</tr>
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<tr mode="wrap">
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<td width="20%" bgcolor="#77BBFF">BSP Generated Location:</td><td>./</td>
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<td width="20%" bgcolor="#77BBFF">BSP Generated Location:</td><td>.\</td>
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</tr>
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</table>
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<br>
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