Compare commits
4 Commits
d770450ea9
...
8f074b6f72
| Author | SHA1 | Date | |
|---|---|---|---|
| 8f074b6f72 | |||
| b19c7f6b51 | |||
| 7e0e37a578 | |||
| d95e3f7923 |
528
.metadata/.log
528
.metadata/.log
@ -9027,3 +9027,531 @@ org.xml.sax.SAXParseException; lineNumber: 1; columnNumber: 1; Premature end of
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at com.st.stm32cube.ide.mpu.remote.serial.internal.SerialPortProviderWindows.run(SerialPortProviderWindows.java:127)
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at java.base/java.util.TimerThread.mainLoop(Timer.java:566)
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at java.base/java.util.TimerThread.run(Timer.java:516)
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!SESSION 2026-03-17 14:15:38.307 -----------------------------------------------
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eclipse.buildId=Version 1.16.0
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java.version=17.0.11
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java.vendor=Eclipse Adoptium
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BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
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Command-line arguments: -os linux -ws gtk -arch x86_64
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!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-17 14:15:42.728
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!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
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!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-17 14:15:42.729
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!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
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!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-17 14:15:47.411
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!MESSAGE Started RMI Server, listening on port 41337
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!SESSION 2026-03-18 13:19:26.527 -----------------------------------------------
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eclipse.buildId=Version 1.16.0
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java.version=17.0.11
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java.vendor=Eclipse Adoptium
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BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
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Command-line arguments: -os linux -ws gtk -arch x86_64
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!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-18 13:19:33.263
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!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
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!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-18 13:19:33.264
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!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
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!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-18 13:19:38.483
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!MESSAGE Started RMI Server, listening on port 41337
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!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-18 13:20:01.264
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!MESSAGE Unable to connect to repository https://sw-center.st.com/stm32cubeide/openstlinux/updatesite1/compositeContent.xml
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!STACK 0
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java.net.ConnectException
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at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
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at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
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at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
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at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
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at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
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at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
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at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
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at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
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at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
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at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
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at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
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at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
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at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
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at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
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at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
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at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
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at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
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at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
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at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
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at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
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at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
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at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
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at java.base/java.lang.Thread.run(Thread.java:840)
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Caused by: java.nio.channels.UnresolvedAddressException
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at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
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at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
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at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
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at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
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at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
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at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
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at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
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... 21 more
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!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-18 13:20:01.275
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!MESSAGE Unable to connect to repository https://sw-center.st.com/stm32cubeide/updatesite1/compositeContent.xml
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!STACK 0
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java.net.ConnectException
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at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
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at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
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at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
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at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
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at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
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at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
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at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
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at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
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at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
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at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
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at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
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at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
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at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
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at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
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at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
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at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
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at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
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at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
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at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
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at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
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||||
at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
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||||
at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
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||||
at java.base/java.lang.Thread.run(Thread.java:840)
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||||
Caused by: java.nio.channels.UnresolvedAddressException
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at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
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at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
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at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
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at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
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at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
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at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
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at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
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... 21 more
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|
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!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-18 13:20:01.285
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!MESSAGE Unable to connect to repository https://download.eclipse.org/tools/cdt/releases/latest/compositeContent.xml
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!STACK 0
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java.net.ConnectException
|
||||
at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
|
||||
at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
|
||||
at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
|
||||
at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
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at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
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||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
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||||
at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
|
||||
at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
|
||||
at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
|
||||
at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
|
||||
at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
|
||||
at java.base/java.lang.Thread.run(Thread.java:840)
|
||||
Caused by: java.nio.channels.UnresolvedAddressException
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
|
||||
at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
|
||||
... 21 more
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||||
|
||||
!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-18 13:20:01.294
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||||
!MESSAGE Unable to connect to repository https://download.eclipse.org/releases/2023-12/compositeContent.xml
|
||||
!STACK 0
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||||
java.net.ConnectException
|
||||
at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
|
||||
at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
|
||||
at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
|
||||
at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
|
||||
at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
|
||||
at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
|
||||
at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
|
||||
at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
|
||||
at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
|
||||
at java.base/java.lang.Thread.run(Thread.java:840)
|
||||
Caused by: java.nio.channels.UnresolvedAddressException
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
|
||||
at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
|
||||
... 21 more
|
||||
!SESSION 2026-03-18 13:36:38.191 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY org.eclipse.core.resources 2 10035 2026-03-18 13:36:40.821
|
||||
!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-18 13:36:44.318
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-18 13:36:44.319
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-18 13:36:49.305
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
!SESSION 2026-03-20 17:42:29.905 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY org.eclipse.core.resources 2 10035 2026-03-20 17:42:32.738
|
||||
!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-20 17:42:36.387
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-20 17:42:36.388
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-20 17:42:42.323
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
!SESSION 2026-03-20 18:06:27.774 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY org.eclipse.core.resources 2 10035 2026-03-20 18:06:30.631
|
||||
!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-20 18:06:34.323
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-20 18:06:34.324
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-20 18:06:39.545
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
!SESSION 2026-03-21 13:54:00.770 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY org.eclipse.core.resources 2 10035 2026-03-21 13:54:03.586
|
||||
!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-21 13:54:07.401
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-21 13:54:07.402
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-21 13:54:12.808
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
!SESSION 2026-03-24 14:01:44.656 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY org.eclipse.core.resources 2 10035 2026-03-24 14:01:47.209
|
||||
!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-24 14:01:50.655
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-24 14:01:50.656
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-24 14:01:55.388
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
!SESSION 2026-03-24 14:11:26.431 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-24 14:11:31.118
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-24 14:11:31.119
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-24 14:11:45.929
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.debug 4 0 2026-03-24 14:15:22.829
|
||||
!MESSAGE Error - No active DSF-Session. tmpSessionId = 3 (contextManager row 121)
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.debug 4 0 2026-03-24 14:15:22.830
|
||||
!MESSAGE Existing sessions are:
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.debug 4 0 2026-03-24 14:17:18.477
|
||||
!MESSAGE Error - No active DSF-Session. tmpSessionId = 6 (contextManager row 121)
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.debug 4 0 2026-03-24 14:17:18.477
|
||||
!MESSAGE Existing sessions are:
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.debug 4 0 2026-03-24 14:18:01.013
|
||||
!MESSAGE Error - No active DSF-Session. tmpSessionId = 7 (contextManager row 121)
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.debug 4 0 2026-03-24 14:18:01.013
|
||||
!MESSAGE Existing sessions are:
|
||||
!SESSION 2026-03-24 14:21:01.018 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-24 14:21:05.958
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-24 14:21:05.959
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-24 14:21:11.141
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
!SESSION 2026-03-31 11:20:25.522 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-31 11:20:29.815
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-31 11:20:29.816
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-31 11:20:33.229
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
!SESSION 2026-03-31 13:41:50.718 -----------------------------------------------
|
||||
eclipse.buildId=Version 1.16.0
|
||||
java.version=17.0.11
|
||||
java.vendor=Eclipse Adoptium
|
||||
BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=de_DE
|
||||
Command-line arguments: -os linux -ws gtk -arch x86_64
|
||||
|
||||
!ENTRY org.eclipse.core.resources 2 10035 2026-03-31 13:41:52.576
|
||||
!MESSAGE The workspace exited with unsaved changes in the previous session; refreshing workspace to recover changes.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 4 4 2026-03-31 13:41:55.091
|
||||
!MESSAGE CubeMX plugin appears to be active, Log4j initialization might be too late.
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.informationcenter 1 1 2026-03-31 13:41:55.092
|
||||
!MESSAGE Log4j2 initialized with config file /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/.metadata/.log4j2.xml
|
||||
|
||||
!ENTRY com.st.stm32cube.ide.mcu.ide 1 1 2026-03-31 13:41:58.079
|
||||
!MESSAGE Started RMI Server, listening on port 41337
|
||||
|
||||
!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-31 13:42:20.010
|
||||
!MESSAGE Unable to connect to repository https://sw-center.st.com/stm32cubeide/openstlinux/updatesite1/compositeContent.xml
|
||||
!STACK 0
|
||||
java.net.ConnectException
|
||||
at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
|
||||
at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
|
||||
at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
|
||||
at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
|
||||
at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
|
||||
at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
|
||||
at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
|
||||
at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
|
||||
at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
|
||||
at java.base/java.lang.Thread.run(Thread.java:840)
|
||||
Caused by: java.nio.channels.UnresolvedAddressException
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
|
||||
at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
|
||||
... 21 more
|
||||
|
||||
!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-31 13:42:20.015
|
||||
!MESSAGE Unable to connect to repository https://sw-center.st.com/stm32cubeide/updatesite1/compositeContent.xml
|
||||
!STACK 0
|
||||
java.net.ConnectException
|
||||
at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
|
||||
at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
|
||||
at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
|
||||
at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
|
||||
at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
|
||||
at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
|
||||
at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
|
||||
at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
|
||||
at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
|
||||
at java.base/java.lang.Thread.run(Thread.java:840)
|
||||
Caused by: java.nio.channels.UnresolvedAddressException
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
|
||||
at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
|
||||
... 21 more
|
||||
|
||||
!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-31 13:42:20.022
|
||||
!MESSAGE Unable to connect to repository https://download.eclipse.org/tools/cdt/releases/latest/compositeContent.xml
|
||||
!STACK 0
|
||||
java.net.ConnectException
|
||||
at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
|
||||
at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
|
||||
at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
|
||||
at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
|
||||
at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
|
||||
at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
|
||||
at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
|
||||
at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
|
||||
at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
|
||||
at java.base/java.lang.Thread.run(Thread.java:840)
|
||||
Caused by: java.nio.channels.UnresolvedAddressException
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
|
||||
at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
|
||||
... 21 more
|
||||
|
||||
!ENTRY org.eclipse.equinox.p2.transport.ecf 4 1002 2026-03-31 13:42:20.028
|
||||
!MESSAGE Unable to connect to repository https://download.eclipse.org/releases/2023-12/compositeContent.xml
|
||||
!STACK 0
|
||||
java.net.ConnectException
|
||||
at java.net.http/jdk.internal.net.http.common.Utils.toConnectException(Utils.java:1055)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:198)
|
||||
at java.net.http/jdk.internal.net.http.AsyncSSLConnection.connectAsync(AsyncSSLConnection.java:56)
|
||||
at java.net.http/jdk.internal.net.http.Http2Connection.createAsync(Http2Connection.java:378)
|
||||
at java.net.http/jdk.internal.net.http.Http2ClientImpl.getConnectionFor(Http2ClientImpl.java:126)
|
||||
at java.net.http/jdk.internal.net.http.ExchangeImpl.get(ExchangeImpl.java:93)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.establishExchange(Exchange.java:343)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl0(Exchange.java:475)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsyncImpl(Exchange.java:380)
|
||||
at java.net.http/jdk.internal.net.http.Exchange.responseAsync(Exchange.java:372)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:408)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsyncImpl$7(MultiExchange.java:449)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandle(CompletableFuture.java:934)
|
||||
at java.base/java.util.concurrent.CompletableFuture.uniHandleStage(CompletableFuture.java:950)
|
||||
at java.base/java.util.concurrent.CompletableFuture.handle(CompletableFuture.java:2340)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.responseAsyncImpl(MultiExchange.java:439)
|
||||
at java.net.http/jdk.internal.net.http.MultiExchange.lambda$responseAsync0$2(MultiExchange.java:341)
|
||||
at java.base/java.util.concurrent.CompletableFuture$UniCompose.tryFire(CompletableFuture.java:1150)
|
||||
at java.base/java.util.concurrent.CompletableFuture.postComplete(CompletableFuture.java:510)
|
||||
at java.base/java.util.concurrent.CompletableFuture$AsyncSupply.run(CompletableFuture.java:1773)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor.runWorker(ThreadPoolExecutor.java:1136)
|
||||
at java.base/java.util.concurrent.ThreadPoolExecutor$Worker.run(ThreadPoolExecutor.java:635)
|
||||
at java.base/java.lang.Thread.run(Thread.java:840)
|
||||
Caused by: java.nio.channels.UnresolvedAddressException
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:149)
|
||||
at java.base/sun.nio.ch.Net.checkAddress(Net.java:157)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.checkRemote(SocketChannelImpl.java:816)
|
||||
at java.base/sun.nio.ch.SocketChannelImpl.connect(SocketChannelImpl.java:839)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.lambda$connectAsync$0(PlainHttpConnection.java:183)
|
||||
at java.base/java.security.AccessController.doPrivileged(AccessController.java:569)
|
||||
at java.net.http/jdk.internal.net.http.PlainHttpConnection.connectAsync(PlainHttpConnection.java:185)
|
||||
... 21 more
|
||||
|
||||
!ENTRY org.eclipse.cdt.dsf.gdb 4 104 2026-03-31 13:56:39.797
|
||||
!MESSAGE Program file does not exist
|
||||
!STACK 0
|
||||
java.io.FileNotFoundException: /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/Debug/task1.elf not found
|
||||
at org.eclipse.cdt.dsf.gdb.launching.LaunchUtils.verifyProgramPath(LaunchUtils.java:130)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.checkBinaryDetails(GdbLaunchDelegate.java:330)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.launchDebugSession(GdbLaunchDelegate.java:152)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.launchDebugger(GdbLaunchDelegate.java:109)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.launch(GdbLaunchDelegate.java:97)
|
||||
at com.st.stm32cube.ide.mcu.debug.launch.DSFDelegate.launch(DSFDelegate.java:334)
|
||||
at org.eclipse.debug.internal.core.LaunchConfiguration.launch(LaunchConfiguration.java:805)
|
||||
at org.eclipse.debug.internal.core.LaunchConfiguration.launch(LaunchConfiguration.java:716)
|
||||
at org.eclipse.debug.internal.ui.DebugUIPlugin.buildAndLaunch(DebugUIPlugin.java:1040)
|
||||
at org.eclipse.debug.internal.ui.DebugUIPlugin$1.run(DebugUIPlugin.java:1243)
|
||||
at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63)
|
||||
!SUBENTRY 1 org.eclipse.cdt.dsf.gdb 4 104 2026-03-31 13:56:39.797
|
||||
!MESSAGE /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/Debug/task1.elf not found
|
||||
!STACK 0
|
||||
java.io.FileNotFoundException: /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/Debug/task1.elf not found
|
||||
at org.eclipse.cdt.dsf.gdb.launching.LaunchUtils.verifyProgramPath(LaunchUtils.java:130)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.checkBinaryDetails(GdbLaunchDelegate.java:330)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.launchDebugSession(GdbLaunchDelegate.java:152)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.launchDebugger(GdbLaunchDelegate.java:109)
|
||||
at org.eclipse.cdt.dsf.gdb.launching.GdbLaunchDelegate.launch(GdbLaunchDelegate.java:97)
|
||||
at com.st.stm32cube.ide.mcu.debug.launch.DSFDelegate.launch(DSFDelegate.java:334)
|
||||
at org.eclipse.debug.internal.core.LaunchConfiguration.launch(LaunchConfiguration.java:805)
|
||||
at org.eclipse.debug.internal.core.LaunchConfiguration.launch(LaunchConfiguration.java:716)
|
||||
at org.eclipse.debug.internal.ui.DebugUIPlugin.buildAndLaunch(DebugUIPlugin.java:1040)
|
||||
at org.eclipse.debug.internal.ui.DebugUIPlugin$1.run(DebugUIPlugin.java:1243)
|
||||
at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63)
|
||||
|
||||
@ -51,3 +51,6 @@
|
||||
*** SESSION März 01, 2026 11:55:48.249 -----------------------------------------
|
||||
*** SESSION März 13, 2026 10:49:11.272 -----------------------------------------
|
||||
*** SESSION März 16, 2026 12:55:55.445 -----------------------------------------
|
||||
*** SESSION März 24, 2026 14:01:49.132 -----------------------------------------
|
||||
*** SESSION März 24, 2026 14:11:29.704 -----------------------------------------
|
||||
*** SESSION März 24, 2026 14:21:04.465 -----------------------------------------
|
||||
|
||||
Binary file not shown.
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
@ -235,3 +235,411 @@ Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:15:54 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
|
||||
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
|
||||
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1664 0 1568 3232 ca0 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:16:23 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1672 0 1568 3240 ca8 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:17:15 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1692 0 1568 3260 cbc task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:18:09 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1684 0 1568 3252 cb4 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:21:35 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1692 0 1568 3260 cbc task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
15:01:24 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1692 0 1568 3260 cbc task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
16:09:45 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:20:32 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
task2.s: Assembler messages:
|
||||
task2.s:128: Error: ARM register expected -- `movs '
|
||||
make: *** [makefile:74: task2.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
18:20:48 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:21:57 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:22:48 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:23:22 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:23:42 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:23:54 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:24:03 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:24:24 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:24:36 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:25:04 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:25:26 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:25:42 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:26:11 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:26:34 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
264 0 0 264 108 task2.elf
|
||||
Target all ready
|
||||
18:26:57 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
248 0 0 248 f8 task2.elf
|
||||
Target all ready
|
||||
18:27:24 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
18:29:47 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:35:13 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:35:46 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
18:35:51 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:12:30 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:12:55 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:13:16 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:13:43 **** Clean-only build of configuration Debug for project task1 ****
|
||||
make -j12 clean
|
||||
rm -rf ./Startup/startup_stm32g431kbtx.d ./Startup/startup_stm32g431kbtx.o ./Startup/syscalls.cyclo ./Startup/syscalls.d ./Startup/syscalls.o ./Startup/syscalls.su ./Startup/sysmem.cyclo ./Startup/sysmem.d ./Startup/sysmem.o ./Startup/sysmem.su
|
||||
rm -rf ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
|
||||
rm -rf default.size.stdout task1.elf task1.list task1.map
|
||||
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task2 ****
|
||||
make -j12 clean
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task3 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task4 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
14:14:11 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
14:15:19 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:15:29 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:16:17 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:17:15 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:17:57 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:19:07 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:56:35 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:57:35 **** Clean-only build of configuration Debug for project task2 ****
|
||||
make -j12 clean
|
||||
14:57:51 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
648 0 0 648 288 task2.elf
|
||||
Target all ready
|
||||
14:58:02 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:58:10 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
13:53:05 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
task2.s: Assembler messages:
|
||||
task2.s:346: Error: junk at end of line, first unrecognized character is `h'
|
||||
make: *** [makefile:74: task2.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
13:53:51 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
532 0 0 532 214 task2.elf
|
||||
Target all ready
|
||||
13:56:03 **** Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
|
||||
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
|
||||
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
|
||||
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
|
||||
../Src/sketch.c: In function 'main':
|
||||
../Src/sketch.c:11:42: error: expected expression before ')' token
|
||||
11 | while(/*schalter nicht gedrückt*/){}
|
||||
| ^
|
||||
../Src/sketch.c:12:9: warning: implicit declaration of function 'delay' [-Wimplicit-function-declaration]
|
||||
12 | delay(10);
|
||||
| ^~~~~
|
||||
../Src/sketch.c:13:39: error: expected expression before ')' token
|
||||
13 | while(/*schalter losgelassen*/){}
|
||||
| ^
|
||||
../Src/sketch.c:18:39: error: request for member 'length' in something not a structure or union
|
||||
18 | for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
|
||||
| ^
|
||||
../Src/sketch.c:20:20: warning: suggest parentheses around assignment used as truth value [-Wparentheses]
|
||||
20 | if(i = 0){/*alles bis auf LED0 auschalten*/}
|
||||
| ^
|
||||
../Src/sketch.c:21:20: warning: suggest parentheses around assignment used as truth value [-Wparentheses]
|
||||
21 | if(i = 1){/*..*/}
|
||||
| ^
|
||||
../Src/sketch.c:24:44: error: expected expression before ')' token
|
||||
24 | if(/*schalter gerückt*/){
|
||||
| ^
|
||||
../Src/sketch.c:32:42: error: expected expression before ')' token
|
||||
32 | while(/*Taster gedrückt*/){}
|
||||
| ^
|
||||
make: *** [Src/subdir.mk:25: Src/sketch.o] Error 1
|
||||
make: *** Waiting for unfinished jobs....
|
||||
../Src/task1.c: In function 'GPIO_init':
|
||||
../Src/task1.c:169:22: error: expected expression before '<<' token
|
||||
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
| ^~
|
||||
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
13:56:35 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
../Src/task1.c: In function 'GPIO_init':
|
||||
../Src/task1.c:169:22: error: expected expression before '<<' token
|
||||
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
| ^~
|
||||
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
14:02:22 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
|
||||
@ -1,21 +1,13 @@
|
||||
13:01:07 **** Build of configuration Debug for project task1 ****
|
||||
make -j24 all
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
|
||||
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
|
||||
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
|
||||
13:56:35 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"D:\04 Studium\SS26\mct\git-praktikum\MZT-Praktikum\task1\STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
../Src/task1.c: In function 'GPIO_init':
|
||||
../Src/task1.c:169:22: error: expected expression before '<<' token
|
||||
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
| ^~
|
||||
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1664 0 1568 3232 ca0 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
|
||||
13:01:08 Build Finished. 0 errors, 0 warnings. (took 1s.301ms)
|
||||
13:56:35 Build Failed. 2 errors, 0 warnings. (took 166ms)
|
||||
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
11:52:45 **** Clean-only build of configuration Debug for project task2 ****
|
||||
make -j12 clean
|
||||
14:02:22 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
|
||||
11:52:45 Build Finished. 0 errors, 0 warnings. (took 126ms)
|
||||
14:02:22 Build Finished. 0 errors, 0 warnings. (took 121ms)
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
11:52:45 **** Clean-only build of configuration Debug for project task3 ****
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task3 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
|
||||
11:52:45 Build Failed. 1 errors, 0 warnings. (took 126ms)
|
||||
14:13:44 Build Failed. 1 errors, 0 warnings. (took 186ms)
|
||||
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
11:52:46 **** Clean-only build of configuration Debug for project task4 ****
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task4 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
|
||||
11:52:46 Build Failed. 1 errors, 0 warnings. (took 127ms)
|
||||
14:13:44 Build Failed. 1 errors, 0 warnings. (took 186ms)
|
||||
|
||||
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #3]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x04
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
|
||||
|
||||
int main(){
|
||||
while(1){
|
||||
while(/*schalter gedrückt*/){}
|
||||
delay();
|
||||
while(/*schalter losgelassen*/){}
|
||||
delay();
|
||||
|
||||
int aktiv = 1;
|
||||
while(aktiv){
|
||||
for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
|
||||
//alle LED einschalten
|
||||
if(i = 0){/*alles bis auf LED0 auschalten*/}
|
||||
if(i = 1){/*..*/}
|
||||
//...
|
||||
for(int zähler = 0; zähler < 333 && aktiv == 1; zähler++){
|
||||
if(/*schalter gerückt*/){
|
||||
aktiv = 0;
|
||||
break;
|
||||
}
|
||||
else{
|
||||
delay(1);
|
||||
}
|
||||
}
|
||||
while(/*Taster gedrückt*/){}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #2]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,328 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
// Zusätzliche und benötigte Adressen
|
||||
.equ RCC_AHB2ENR, 0x4002104C
|
||||
.equ RCC_APB2ENR, 0x40021060
|
||||
|
||||
.equ GPIOA_MODER, 0x48000000
|
||||
.equ GPIOA_ODR, 0x48000014
|
||||
|
||||
.equ GPIOC_MODER, 0x48000800
|
||||
.equ GPIOC_PUPDR, 0x4800080C
|
||||
.equ GPIOC_IDR, 0x48000810
|
||||
|
||||
.equ SYSCFG_BASE, 0x40010000
|
||||
.equ SYSCFG_EXTICR4, (SYSCFG_BASE + 0x14)
|
||||
|
||||
.equ EXTI_BASE, 0x40010400
|
||||
.equ EXTI_IMR1, (EXTI_BASE + 0x00)
|
||||
.equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
|
||||
.equ EXTI_PR1, (EXTI_BASE + 0x14)
|
||||
|
||||
.equ NVIC_ISER1, 0xE000E104
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
.space 0xD0 // padding 208 Bytes bis Offset 0xE0 (EXTI15_10 IRQ 40)
|
||||
.word _ISR_S0_S1 // gemeinsamer Interrupt für PC13 (S0) und PC14 (S1)
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOVS r2, #0x05 // Bit 0 (GPIOA) und Bit 2 (GPIOC)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- port init
|
||||
#- LEDs (PA0-PA3)
|
||||
LDR r1, =GPIOA_MODER
|
||||
LDR r2, =0x000000FF // Maske PA0-PA3
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000055 // Maske Output 0101 0101
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0F // Maske LED0-3
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- buttons (PC13, PC14 als Input)
|
||||
LDR r1, =GPIOC_MODER
|
||||
LDR r2, =0x3C000000 // Maske Bits 26-29
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- Pull-Up für PC13, PC14
|
||||
LDR r1, =GPIOC_PUPDR
|
||||
LDR r2, =0x3C000000
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x14000000 // 01 = Pull-Up für PC13 (Bits 27:26) und PC14 (Bits 29:28)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
LDR r1, =RCC_APB2ENR
|
||||
MOVS r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
LDR r1, =SYSCFG_EXTICR4
|
||||
LDR r2, =0x00000FF0 // Maske für EXTI13 (Bits 7:4) und EXTI14 (Bits 11:8)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000220 // Port C (0010) für EXTI13 und EXTI14
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
LDR r1, =EXTI_FTSR1 // Fallende Flanke
|
||||
LDR r2, =0x00006000 // Bits 13 und 14
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =EXTI_IMR1 // Maskierung aufheben
|
||||
LDR r2, =0x00006000
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
LDR r1, =NVIC_ISER1
|
||||
LDR r2, =0x00000100 // Bit 8 für IRQ 40 (EXTI15_10)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
WFI
|
||||
B main
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
LDR r0, =106000 // Entprell-Zeit ~20ms
|
||||
.L1:
|
||||
SUBS r0, r0, #1
|
||||
BNE .L1
|
||||
BX lr
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP
|
||||
B stop
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x44
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0A
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x11
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x05
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0_S1, %function
|
||||
_ISR_S0_S1:
|
||||
PUSH {r4, r5, lr} // Wichtig: Register sichern gemäß AAPCS
|
||||
|
||||
_check_S0:
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, [r4, #0]
|
||||
LDR r2, =0x2000 // Maske für S0 (PC13 / Bit 13)
|
||||
TST r5, r2
|
||||
BEQ _check_S1 // Wenn Bit 13 nicht gesetzt, überspringen
|
||||
|
||||
#--- do the work S0
|
||||
BL delay // Entprellen
|
||||
|
||||
LDR r0, =GPIOC_IDR
|
||||
LDR r1, [r0, #0]
|
||||
LDR r2, =0x2000
|
||||
TST r1, r2
|
||||
BNE _clear_S0 // Abbruch, wenn High (Taster prellt / schon losgelassen)
|
||||
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x09 // LED0 & LED3 toggeln (1001)
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_S0:
|
||||
#--- clear interrupt flag S0
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, =0x2000
|
||||
STR r5, [r4, #0]
|
||||
|
||||
_check_S1:
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, [r4, #0]
|
||||
LDR r2, =0x4000 // Maske für S1 (PC14 / Bit 14)
|
||||
TST r5, r2
|
||||
BEQ _leave_ISR // Wenn Bit 14 nicht gesetzt, Ende
|
||||
|
||||
#--- do the work S1
|
||||
BL delay
|
||||
|
||||
LDR r0, =GPIOC_IDR
|
||||
LDR r1, [r0, #0]
|
||||
LDR r2, =0x4000
|
||||
TST r1, r2
|
||||
BNE _clear_S1 // Abbruch, wenn High
|
||||
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x06 // LED1 & LED2 toggeln (0110)
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_S1:
|
||||
#--- clear interrupt flag S1
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, =0x4000
|
||||
STR r5, [r4, #0]
|
||||
|
||||
_leave_ISR:
|
||||
#--- leave ISR
|
||||
POP {r4, r5, pc} // Register wiederherstellen und zurückkehren
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,347 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
// Falls in G431_addr.s vorhanden, diesen Block löschen um Fehler zu vermeiden:
|
||||
.equ RCC_AHB2ENR, 0x4002104C
|
||||
.equ RCC_APB2ENR, 0x40021060
|
||||
|
||||
.equ GPIOA_MODER, 0x48000000
|
||||
.equ GPIOA_ODR, 0x48000014
|
||||
|
||||
.equ GPIOB_MODER, 0x48000400
|
||||
.equ GPIOB_PUPDR, 0x4800040C
|
||||
.equ GPIOB_IDR, 0x48000410
|
||||
|
||||
.equ SYSCFG_BASE, 0x40010000
|
||||
.equ SYSCFG_EXTICR1, (SYSCFG_BASE + 0x08)
|
||||
.equ SYSCFG_EXTICR2, (SYSCFG_BASE + 0x0C)
|
||||
|
||||
.equ EXTI_BASE, 0x40010400
|
||||
.equ EXTI_IMR1, (EXTI_BASE + 0x00)
|
||||
.equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
|
||||
.equ EXTI_PR1, (EXTI_BASE + 0x14)
|
||||
|
||||
.equ NVIC_ISER0, 0xE000E100
|
||||
|
||||
.equ DBGMCU_CR, 0xE0042004 // Adresse des Debug Configuration Registers
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a"
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer
|
||||
.word init // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
.space 0x48 // Padding 72 Bytes (Offset 0x10 -> 0x58)
|
||||
.word _ISR_EXTI0 // EXTI0_IRQHandler (PB0 / S0) - IRQ 6
|
||||
|
||||
.space 0x0C // Padding 12 Bytes (Offset 0x5C -> 0x68)
|
||||
.word _ISR_EXTI4 // EXTI4_IRQHandler (PB4 / S1) - IRQ 10
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i
|
||||
|
||||
MOVS r0, #0
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking (GPIOA, GPIOB)
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOVS r2, #0x03 // Bit 0 (GPIOA) und Bit 1 (GPIOB)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- port init
|
||||
#- LEDs (PA0 - PA3) als Output
|
||||
LDR r1, =GPIOA_MODER
|
||||
LDR r2, =0x000000FF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000055
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0F
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- buttons (PB0, PB4) als Input
|
||||
LDR r1, =GPIOB_MODER
|
||||
LDR r2, =0x00000303 // Maske Bits 0:1 (PB0) und 8:9 (PB4)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- Pull-Up für PB0, PB4
|
||||
LDR r1, =GPIOB_PUPDR
|
||||
LDR r2, =0x00000303
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000101 // 01 = Pull-Up für PB0 und PB4
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
LDR r1, =RCC_APB2ENR
|
||||
MOVS r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- connect GPIO pins to EXTI lines
|
||||
LDR r1, =SYSCFG_EXTICR1 // EXTI0 (PB0)
|
||||
LDR r2, =0x000F // Maske EXTI0 (Bits 3:0)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x0001 // Port B (0001)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =SYSCFG_EXTICR2 // EXTI4 (PB4)
|
||||
LDR r2, =0x000F // Maske EXTI4 (Bits 3:0)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x0001 // Port B (0001)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- configure EXTI lines (falling edge, unmask)
|
||||
LDR r1, =EXTI_FTSR1
|
||||
MOVS r2, #0x11 // Bit 0 (EXTI0) und Bit 4 (EXTI4)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =EXTI_IMR1
|
||||
MOVS r2, #0x11 // Bit 0 und Bit 4
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- NVIC: enable interrupts EXTI0 (IRQ 6) & EXTI4 (IRQ 10)
|
||||
LDR r1, =NVIC_ISER0
|
||||
LDR r2, =0x00000440 // Bit 6 (EXTI0) und Bit 10 (EXTI4)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- wachhalten während WFI
|
||||
LDR r1, =DBGMCU_CR
|
||||
LDR r0, [r1, #0]
|
||||
MOVS r2, #0x07 // Setzt DBG_SLEEP, DBG_STOP und DBG_STANDBY Bits
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
CPSIE i
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
WFI
|
||||
B main
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
LDR r0, =106000
|
||||
.L1:
|
||||
SUBS r0, r0, #1
|
||||
BNE .L1
|
||||
BX lr
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP
|
||||
B stop
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax"
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x44
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0A
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x11
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x05
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_EXTI0, %function
|
||||
_ISR_EXTI0:
|
||||
PUSH {lr}
|
||||
|
||||
#--- Entprellen
|
||||
BL delay
|
||||
|
||||
#--- Überprüfen, ob Taster noch gedrückt ist (PB0)
|
||||
LDR r0, =GPIOB_IDR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x01
|
||||
TST r1, r2
|
||||
BNE _clear_exti0
|
||||
|
||||
#--- LED0 & LED3 toggeln (1001 = 0x09)
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x09
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_exti0:
|
||||
#--- Interrupt Flag löschen
|
||||
LDR r0, =EXTI_PR1
|
||||
MOVS r1, #0x01
|
||||
STR r1, [r0, #0]
|
||||
|
||||
POP {pc}
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_EXTI4, %function
|
||||
_ISR_EXTI4:
|
||||
PUSH {lr}
|
||||
|
||||
#--- Entprellen
|
||||
BL delay
|
||||
|
||||
#--- Überprüfen, ob Taster noch gedrückt ist (PB4)
|
||||
LDR r0, =GPIOB_IDR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x10
|
||||
TST r1, r2
|
||||
BNE _clear_exti4
|
||||
|
||||
#--- LED1 & LED2 toggeln (0110 = 0x06)
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x06
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_exti4:
|
||||
#--- Interrupt Flag löschen
|
||||
LDR r0, =EXTI_PR1
|
||||
MOVS r1, #0x10
|
||||
STR r1, [r0, #0]
|
||||
|
||||
POP {pc}
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
hu
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x05
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
# LDR r1, =GPIOB_MODER
|
||||
# MOVS r3, #0x03
|
||||
# LDR r0, [r1, #1]
|
||||
# BICS r0, r3
|
||||
# MOVS r3, #0x01
|
||||
# ORRS r0, r0, r3
|
||||
# STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x03
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOB_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x01
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,764 @@
|
||||
#*****************************************************************************************
|
||||
# Project: task2 - switch triggered LEDs
|
||||
# File: G431_addr.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 20.08.2015
|
||||
#
|
||||
# Version: 3.0
|
||||
# History:
|
||||
# 20.08.2015 ML create file
|
||||
# 07.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML change from absolute addresses to BASE + OFFSET notation and
|
||||
# add more timer modules
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# Connects assembly addresses for STM32G431 MCU to symbolic register names
|
||||
# used in the datasheets.
|
||||
#
|
||||
# Notes:
|
||||
# - default MCU speed at startup is 16 MHz.
|
||||
#
|
||||
# ToDo:
|
||||
# - none -
|
||||
#*****************************************************************************************
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# MCU Bus Base Addresses
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ APB1_BASE, 0x40000000
|
||||
.equ APB2_BASE, 0x40010000
|
||||
.equ AHB1_BASE, 0x40020000
|
||||
.equ AHB2_BASE, 0x48000000
|
||||
.equ AHB3_BASE, 0xA0000000 //!!! FSMC + QSPI registers = AHB3 ?
|
||||
.equ PPB_BASE, 0xE0000000 /* Cortex M4 with FPU Internal Peripherals */
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# System Configuration Controller
|
||||
#
|
||||
# address space: 0x4001_0000 .. 0x4001_0029
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ SYSCFG_BASE, APB2_BASE
|
||||
|
||||
.equ SYSCFG_MEMRMP, SYSCFG_BASE + 0x00
|
||||
.equ SYSCFG_CFGR1, SYSCFG_BASE + 0x04
|
||||
.equ SYSCFG_EXTICR1, SYSCFG_BASE + 0x08
|
||||
.equ SYSCFG_EXTICR2, SYSCFG_BASE + 0x0C
|
||||
.equ SYSCFG_EXTICR3, SYSCFG_BASE + 0x10
|
||||
.equ SYSCFG_EXTICR4, SYSCFG_BASE + 0x14
|
||||
.equ SYSCFG_SCSR, SYSCFG_BASE + 0x18
|
||||
.equ SYSCFG_CFGR2, SYSCFG_BASE + 0x1C
|
||||
.equ SYSCFG_SWPR, SYSCFG_BASE + 0x20
|
||||
.equ SYSCFG_SKR, SYSCFG_BASE + 0x24
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# Extended Interrupts And Events Controller
|
||||
#
|
||||
# address space: 0x4001_0400 .. 0x4001_07FF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ EXTI_BASE, APB2_BASE + 0x400
|
||||
|
||||
.equ EXTI_IMR1, EXTI_BASE + 0x00
|
||||
.equ EXTI_EMR1, EXTI_BASE + 0x04
|
||||
.equ EXTI_RTSR1, EXTI_BASE + 0x08
|
||||
.equ EXTI_FTSR1, EXTI_BASE + 0x0C
|
||||
.equ EXTI_SWIER1, EXTI_BASE + 0x10
|
||||
.equ EXTI_PR1, EXTI_BASE + 0x14
|
||||
|
||||
.equ EXTI_IMR2, EXTI_BASE + 0x20
|
||||
.equ EXTI_EMR2, EXTI_BASE + 0x24
|
||||
.equ EXTI_RTSR2, EXTI_BASE + 0x28
|
||||
.equ EXTI_FTSR2, EXTI_BASE + 0x2C
|
||||
.equ EXTI_SWIER2, EXTI_BASE + 0x30
|
||||
.equ EXTI_PR2, EXTI_BASE + 0x34
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# TIM module common configuration
|
||||
#
|
||||
# Every timer has 1 KB address space:
|
||||
#
|
||||
# TIM2 .. TIM7: 0x4000_0000 .. 0x4000_17FF (APB1)
|
||||
# TIM1: 0x4001_2C00 .. 0x4001_2FFF (APB2)
|
||||
# TIM8: 0x4001_3400 .. 0x4001_37FF (APB2)
|
||||
# TIM15 .. TIM17: 0x4001_4000 .. 0x4001_4BFF (APB2)
|
||||
# TIM20: 0x4001_5000 .. 0x4001_53FF (APB2)
|
||||
#
|
||||
# note:
|
||||
# TIM2 + TIM5 are 32 bit timers. All others have a width of 16 bit.
|
||||
# Below, the timers on one line share a common register set description.
|
||||
#
|
||||
# TIM 1, 8, 20 advances control timers
|
||||
# TIM 2, 3, 4, 5 general purpose timers (TIM2/5 = 32 bit)
|
||||
# TIM 15 general purpose timers
|
||||
# TIM 16, 17 general purpose timers
|
||||
# TIM 6, 7 basic timers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ TIM_CR1_OFFSET, 0x00
|
||||
.equ TIM_CR2_OFFSET, 0x04
|
||||
.equ TIM_SMCR_OFFSET, 0x08
|
||||
.equ TIM_DIER_OFFSET, 0x0C
|
||||
.equ TIM_SR_OFFSET, 0x10
|
||||
.equ TIM_EGR_OFFSET, 0x14
|
||||
.equ TIM_CCMR1_OFFSET, 0x18
|
||||
.equ TIM_CCMR2_OFFSET, 0x1C
|
||||
.equ TIM_CCER_OFFSET, 0x20
|
||||
.equ TIM_CNT_OFFSET, 0x24
|
||||
.equ TIM_PSC_OFFSET, 0x28
|
||||
.equ TIM_ARR_OFFSET, 0x2C
|
||||
.equ TIM_RCR_OFFSET, 0x30
|
||||
.equ TIM_CCR1_OFFSET, 0x34
|
||||
.equ TIM_CCR2_OFFSET, 0x38
|
||||
.equ TIM_CCR3_OFFSET, 0x3C
|
||||
.equ TIM_CCR4_OFFSET, 0x40
|
||||
.equ TIM_BDTR_OFFSET, 0x44
|
||||
.equ TIM_CCR5_OFFSET, 0x48
|
||||
.equ TIM_CCR6_OFFSET, 0x4C
|
||||
.equ TIM_CCMR3_OFFSET, 0x50
|
||||
.equ TIM_DTR2_OFFSET, 0x54
|
||||
.equ TIM_ECR_OFFSET, 0x58
|
||||
.equ TIM_TISEL_OFFSET, 0x5C
|
||||
.equ TIM_AF1_OFFSET, 0x60
|
||||
.equ TIM_AF2_OFFSET, 0x64
|
||||
.equ TIM_OR1_OFFSET, 0x68
|
||||
|
||||
.equ TIM_DCR_OFFSET, 0x3DC
|
||||
.equ TIM_DMAR_OFFSET, 0x3E0
|
||||
|
||||
#- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #
|
||||
|
||||
#--- Genral Purpose Timer - TIM2 / address space: 0x4000_0000 .. 0x4000_03FF
|
||||
|
||||
.equ TIM2_BASE, APB1_BASE
|
||||
|
||||
.equ TIM2_CR1, TIM2_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM2_CR2, TIM2_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM2_SMCR, TIM2_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM2_DIER, TIM2_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM2_SR, TIM2_BASE + TIM_SR_OFFSET
|
||||
.equ TIM2_EGR, TIM2_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM2_CCMR1, TIM2_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM2_CCMR2, TIM2_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM2_CCER, TIM2_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM2_CNT, TIM2_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM2_PSC, TIM2_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM2_ARR, TIM2_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM2_CCR1, TIM2_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM2_CCR2, TIM2_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM2_CCR3, TIM2_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM2_CCR4, TIM2_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM2_ECR, TIM2_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM2_TISEL, TIM2_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM2_AF1, TIM2_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM2_AF2, TIM2_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM2_DCR, TIM2_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM2_DMAR, TIM2_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM3 / address space: 0x4000_0400 .. 0x4000_07FF
|
||||
|
||||
.equ TIM3_BASE, APB1_BASE + 0x400
|
||||
|
||||
.equ TIM3_CR1, TIM3_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM3_CR2, TIM3_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM3_SMCR, TIM3_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM3_DIER, TIM3_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM3_SR, TIM3_BASE + TIM_SR_OFFSET
|
||||
.equ TIM3_EGR, TIM3_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM3_CCMR1, TIM3_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM3_CCMR2, TIM3_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM3_CCER, TIM3_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM3_CNT, TIM3_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM3_PSC, TIM3_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM3_ARR, TIM3_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM3_CCR1, TIM3_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM3_CCR2, TIM3_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM3_CCR3, TIM3_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM3_CCR4, TIM3_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM3_ECR, TIM3_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM3_TISEL, TIM3_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM3_AF1, TIM3_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM3_AF2, TIM3_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM3_DCR, TIM3_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM3_DMAR, TIM3_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM4 / address space: 0x4000_0800 .. 0x4000_0BFF
|
||||
|
||||
.equ TIM4_BASE, APB1_BASE + 0x800
|
||||
|
||||
.equ TIM4_CR1, TIM4_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM4_CR2, TIM4_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM4_SMCR, TIM4_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM4_DIER, TIM4_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM4_SR, TIM4_BASE + TIM_SR_OFFSET
|
||||
.equ TIM4_EGR, TIM4_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM4_CCMR1, TIM4_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM4_CCMR2, TIM4_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM4_CCER, TIM4_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM4_CNT, TIM4_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM4_PSC, TIM4_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM4_ARR, TIM4_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM4_CCR1, TIM4_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM4_CCR2, TIM4_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM4_CCR3, TIM4_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM4_CCR4, TIM4_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM4_ECR, TIM4_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM4_TISEL, TIM4_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM4_AF1, TIM4_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM4_AF2, TIM4_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM4_DCR, TIM4_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM4_DMAR, TIM4_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM5 / address space: 0x4000_0C00 .. 0x4000_0FFF
|
||||
|
||||
.equ TIM5_BASE, APB1_BASE + 0xC00
|
||||
|
||||
.equ TIM5_CR1, TIM5_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM5_CR2, TIM5_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM5_SMCR, TIM5_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM5_DIER, TIM5_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM5_SR, TIM5_BASE + TIM_SR_OFFSET
|
||||
.equ TIM5_EGR, TIM5_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM5_CCMR1, TIM5_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM5_CCMR2, TIM5_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM5_CCER, TIM5_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM5_CNT, TIM5_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM5_PSC, TIM5_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM5_ARR, TIM5_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM5_CCR1, TIM5_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM5_CCR2, TIM5_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM5_CCR3, TIM5_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM5_CCR4, TIM5_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM5_ECR, TIM5_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM5_TISEL, TIM5_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM5_AF1, TIM5_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM5_AF2, TIM5_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM5_DCR, TIM5_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM5_DMAR, TIM5_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Basic Timer - TIM6 / address space: 0x4000_1000 .. 0x4000_13FF
|
||||
|
||||
.equ TIM6_BASE, APB1_BASE + 0x1000
|
||||
|
||||
.equ TIM6_CR1, TIM6_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM6_CR2, TIM6_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM6_DIER, TIM6_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM6_SR, TIM6_BASE + TIM_SR_OFFSET
|
||||
.equ TIM6_EGR, TIM6_BASE + TIM_EGR_OFFSET
|
||||
|
||||
.equ TIM6_CNT, TIM6_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM6_PSC, TIM6_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM6_ARR, TIM6_BASE + TIM_ARR_OFFSET
|
||||
|
||||
#--- Basic Timer - TIM7 / address space: 0x4000_1400 .. 0x4000_17FF
|
||||
|
||||
.equ TIM7_BASE, APB1_BASE + 0x1400
|
||||
|
||||
.equ TIM7_CR1, TIM7_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM7_CR2, TIM7_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM7_DIER, TIM7_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM7_SR, TIM7_BASE + TIM_SR_OFFSET
|
||||
.equ TIM7_EGR, TIM7_BASE + TIM_EGR_OFFSET
|
||||
|
||||
.equ TIM7_CNT, TIM7_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM7_PSC, TIM7_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM7_ARR, TIM7_BASE + TIM_ARR_OFFSET
|
||||
|
||||
#--- Advanced Control Timer - TIM1 / address space: 0x4001_2C00 .. 0x4001_2FFF
|
||||
|
||||
.equ TIM1_BASE, APB2_BASE + 0x2C00
|
||||
|
||||
.equ TIM1_CR1, TIM1_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM1_CR2, TIM1_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM1_SMCR, TIM1_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM1_DIER, TIM1_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM1_SR, TIM1_BASE + TIM_SR_OFFSET
|
||||
.equ TIM1_EGR, TIM1_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM1_CCMR1, TIM1_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM1_CCMR2, TIM1_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM1_CCER, TIM1_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM1_CNT, TIM1_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM1_PSC, TIM1_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM1_ARR, TIM1_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM1_RCR, TIM1_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM1_CCR1, TIM1_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM1_CCR2, TIM1_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM1_CCR3, TIM1_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM1_CCR4, TIM1_BASE + TIM_CCR4_OFFSET
|
||||
.equ TIM1_BDTR, TIM1_BASE + TIM_BDTR_OFFSET
|
||||
.equ TIM1_CCR5, TIM1_BASE + TIM_CCR5_OFFSET
|
||||
.equ TIM1_CCR6, TIM1_BASE + TIM_CCR6_OFFSET
|
||||
.equ TIM1_CCMR3, TIM1_BASE + TIM_CCMR3_OFFSET
|
||||
.equ TIM1_DTR2, TIM1_BASE + TIM_DTR2_OFFSET
|
||||
.equ TIM1_ECR, TIM1_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM1_TISEL, TIM1_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM1_AF1, TIM1_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM1_AF2, TIM1_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM1_DCR, TIM1_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM1_DMAR, TIM1_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Advanced Control Timer - TIM8 / address space: 0x4001_3400 .. 0x4001_37FF
|
||||
|
||||
.equ TIM8_BASE, APB2_BASE + 0x3400
|
||||
|
||||
.equ TIM8_CR1, TIM8_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM8_CR2, TIM8_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM8_SMCR, TIM8_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM8_DIER, TIM8_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM8_SR, TIM8_BASE + TIM_SR_OFFSET
|
||||
.equ TIM8_EGR, TIM8_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM8_CCMR1, TIM8_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM8_CCMR2, TIM8_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM8_CCER, TIM8_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM8_CNT, TIM8_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM8_PSC, TIM8_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM8_ARR, TIM8_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM8_RCR, TIM8_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM8_CCR1, TIM8_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM8_CCR2, TIM8_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM8_CCR3, TIM8_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM8_CCR4, TIM8_BASE + TIM_CCR4_OFFSET
|
||||
.equ TIM8_BDTR, TIM8_BASE + TIM_BDTR_OFFSET
|
||||
.equ TIM8_CCR5, TIM8_BASE + TIM_CCR5_OFFSET
|
||||
.equ TIM8_CCR6, TIM8_BASE + TIM_CCR6_OFFSET
|
||||
.equ TIM8_CCMR3, TIM8_BASE + TIM_CCMR3_OFFSET
|
||||
.equ TIM8_DTR2, TIM8_BASE + TIM_DTR2_OFFSET
|
||||
.equ TIM8_ECR, TIM8_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM8_TISEL, TIM8_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM8_AF1, TIM8_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM8_AF2, TIM8_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM8_DCR, TIM8_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM8_DMAR, TIM8_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Advanced Control Timer - TIM20 / address space: 0x4001_5000 .. 0x4001_53FF
|
||||
|
||||
.equ TIM20_BASE, APB2_BASE + 0x5000
|
||||
|
||||
.equ TIM20_CR1, TIM20_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM20_CR2, TIM20_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM20_SMCR, TIM20_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM20_DIER, TIM20_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM20_SR, TIM20_BASE + TIM_SR_OFFSET
|
||||
.equ TIM20_EGR, TIM20_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM20_CCMR1, TIM20_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM20_CCMR2, TIM20_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM20_CCER, TIM20_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM20_CNT, TIM20_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM20_PSC, TIM20_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM20_ARR, TIM20_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM20_RCR, TIM20_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM20_CCR1, TIM20_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM20_CCR2, TIM20_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM20_CCR3, TIM20_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM20_CCR4, TIM20_BASE + TIM_CCR4_OFFSET
|
||||
.equ TIM20_BDTR, TIM20_BASE + TIM_BDTR_OFFSET
|
||||
.equ TIM20_CCR5, TIM20_BASE + TIM_CCR5_OFFSET
|
||||
.equ TIM20_CCR6, TIM20_BASE + TIM_CCR6_OFFSET
|
||||
.equ TIM20_CCMR3, TIM20_BASE + TIM_CCMR3_OFFSET
|
||||
.equ TIM20_DTR2, TIM20_BASE + TIM_DTR2_OFFSET
|
||||
.equ TIM20_ECR, TIM20_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM20_TISEL, TIM20_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM20_AF1, TIM20_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM20_AF2, TIM20_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM20_DCR, TIM20_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM20_DMAR, TIM20_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM15 / address space: 0x4001_4000 .. 0x4001_43FF
|
||||
|
||||
.equ TIM15_BASE, APB2_BASE + 0x4000
|
||||
|
||||
.equ TIM15_CR1, TIM15_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM15_CR2, TIM15_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM15_SMCR, TIM15_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM15_DIER, TIM15_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM15_SR, TIM15_BASE + TIM_SR_OFFSET
|
||||
.equ TIM15_EGR, TIM15_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM15_CCMR1, TIM15_BASE + TIM_CCMR1_OFFSET
|
||||
|
||||
.equ TIM15_CCER, TIM15_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM15_CNT, TIM15_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM15_PSC, TIM15_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM15_ARR, TIM15_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM15_RCR, TIM15_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM15_CCR1, TIM15_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM15_CCR2, TIM15_BASE + TIM_CCR2_OFFSET
|
||||
|
||||
.equ TIM15_BDTR, TIM15_BASE + TIM_BDTR_OFFSET
|
||||
|
||||
.equ TIM15_DTR2, TIM15_BASE + TIM_DTR2_OFFSET
|
||||
|
||||
.equ TIM15_TISEL, TIM15_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM15_AF1, TIM15_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM15_AF2, TIM15_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM15_DCR, TIM15_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM15_DMAR, TIM15_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM16 / address space: 0x4001_4400 .. 0x4001_47FF
|
||||
|
||||
.equ TIM16_BASE, APB2_BASE + 0x4400
|
||||
|
||||
.equ TIM16_CR1, TIM16_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM16_CR2, TIM16_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM16_DIER, TIM16_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM16_SR, TIM16_BASE + TIM_SR_OFFSET
|
||||
.equ TIM16_EGR, TIM16_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM16_CCMR1, TIM16_BASE + TIM_CCMR1_OFFSET
|
||||
|
||||
.equ TIM16_CCER, TIM16_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM16_CNT, TIM16_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM16_PSC, TIM16_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM16_ARR, TIM16_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM16_RCR, TIM16_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM16_CCR1, TIM16_BASE + TIM_CCR1_OFFSET
|
||||
|
||||
.equ TIM16_BDTR, TIM16_BASE + TIM_BDTR_OFFSET
|
||||
|
||||
.equ TIM16_DTR2, TIM16_BASE + TIM_DTR2_OFFSET
|
||||
|
||||
.equ TIM16_TISEL, TIM16_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM16_AF1, TIM16_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM16_AF2, TIM16_BASE + TIM_AF2_OFFSET
|
||||
.equ TIM16_OR1, TIM16_BASE + TIM_OR1_OFFSET
|
||||
|
||||
.equ TIM16_DCR, TIM16_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM16_DMAR, TIM16_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM17 / address space: 0x4001_4800 .. 0x4001_4BFF
|
||||
|
||||
.equ TIM17_BASE, APB2_BASE + 0x4800
|
||||
|
||||
.equ TIM17_CR1, TIM17_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM17_CR2, TIM17_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM17_DIER, TIM17_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM17_SR, TIM17_BASE + TIM_SR_OFFSET
|
||||
.equ TIM17_EGR, TIM17_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM17_CCMR1, TIM17_BASE + TIM_CCMR1_OFFSET
|
||||
|
||||
.equ TIM17_CCER, TIM17_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM17_CNT, TIM17_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM17_PSC, TIM17_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM17_ARR, TIM17_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM17_RCR, TIM17_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM17_CCR1, TIM17_BASE + TIM_CCR1_OFFSET
|
||||
|
||||
.equ TIM17_BDTR, TIM17_BASE + TIM_BDTR_OFFSET
|
||||
|
||||
.equ TIM17_DTR2, TIM17_BASE + TIM_DTR2_OFFSET
|
||||
|
||||
.equ TIM17_TISEL, TIM17_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM17_AF1, TIM17_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM17_AF2, TIM17_BASE + TIM_AF2_OFFSET
|
||||
.equ TIM17_OR1, TIM17_BASE + TIM_OR1_OFFSET
|
||||
|
||||
.equ TIM17_DCR, TIM17_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM17_DMAR, TIM17_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# Reset and Clock Control
|
||||
#
|
||||
# address space: 0x4002_1000 .. 0x4002_13FF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ RCC_BASE, AHB1_BASE + 0x1000
|
||||
|
||||
.equ RCC_CR, RCC_BASE + 0x00
|
||||
.equ RCC_ICSCR, RCC_BASE + 0x04
|
||||
.equ RCC_CFGR, RCC_BASE + 0x08
|
||||
.equ RCC_PLLCFGR, RCC_BASE + 0x0C
|
||||
|
||||
.equ RCC_CIER, RCC_BASE + 0x18
|
||||
.equ RCC_CIFR, RCC_BASE + 0x1C
|
||||
.equ RCC_CICR, RCC_BASE + 0x20
|
||||
|
||||
.equ RCC_AHB1RSTR, RCC_BASE + 0x28
|
||||
.equ RCC_AHB2RSTR, RCC_BASE + 0x2C
|
||||
.equ RCC_AHB3RSTR, RCC_BASE + 0x30
|
||||
|
||||
.equ RCC_APB1RSTR1, RCC_BASE + 0x38
|
||||
.equ RCC_APB1RSTR2, RCC_BASE + 0x3C
|
||||
.equ RCC_APB2RSTR, RCC_BASE + 0x40
|
||||
|
||||
.equ RCC_AHB1ENR, RCC_BASE + 0x48
|
||||
.equ RCC_AHB2ENR, RCC_BASE + 0x4C
|
||||
.equ RCC_AHB3ENR, RCC_BASE + 0x50
|
||||
|
||||
.equ RCC_APB1ENR1, RCC_BASE + 0x58
|
||||
.equ RCC_APB1ENR2, RCC_BASE + 0x5C
|
||||
.equ RCC_APB2ENR, RCC_BASE + 0x60
|
||||
|
||||
.equ RCC_AHB1SMENR, RCC_BASE + 0x68
|
||||
.equ RCC_AHB2SMENR, RCC_BASE + 0x6C
|
||||
.equ RCC_AHB3SMENR, RCC_BASE + 0x70
|
||||
|
||||
.equ RCC_APB1SMENR1, RCC_BASE + 0x78
|
||||
.equ RCC_APB1SMENR2, RCC_BASE + 0x7C
|
||||
.equ RCC_APB2SMENR, RCC_BASE + 0x80
|
||||
|
||||
.equ RCC_CCIPR, RCC_BASE + 0x88
|
||||
|
||||
.equ RCC_BDCR, RCC_BASE + 0x90
|
||||
.equ RCC_CSR, RCC_BASE + 0x94
|
||||
.equ RCC_CRRCR, RCC_BASE + 0x98
|
||||
.equ RCC_CCIPR2, RCC_BASE + 0x9C
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# GPIO module common configuration
|
||||
#
|
||||
# address space: 0x4800_0000 .. 0x4800_1FFF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ GPIO_BASE, AHB2_BASE
|
||||
|
||||
.equ GPIO_MODER_OFFSET, 0x00
|
||||
.equ GPIO_OTYPER_OFFSET, 0x04
|
||||
.equ GPIO_OSPEEDR_OFFSET, 0x08
|
||||
.equ GPIO_PUPDR_OFFSET, 0x0C
|
||||
.equ GPIO_IDR_OFFSET, 0x10
|
||||
.equ GPIO_ODR_OFFSET, 0x14
|
||||
.equ GPIO_BSRR_OFFSET, 0x18
|
||||
.equ GPIO_LCKR_OFFSET, 0x1C
|
||||
.equ GPIO_AFRL_OFFSET, 0x20
|
||||
.equ GPIO_AFRH_OFFSET, 0x24
|
||||
.equ GPIO_BRR_OFFSET, 0x28
|
||||
|
||||
#- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #
|
||||
|
||||
#--- Port A GPIO configuration / address space: 0x4800_0000 .. 0x4800_03FF
|
||||
|
||||
.equ GPIOA_BASE, GPIO_BASE
|
||||
|
||||
.equ GPIOA_MODER, GPIOA_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOA_OTYPER, GPIOA_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOA_OSPEEDR, GPIOA_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOA_PUPDR, GPIOA_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOA_IDR, GPIOA_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOA_ODR, GPIOA_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOA_BSRR, GPIOA_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOA_LCKR, GPIOA_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOA_AFRL, GPIOA_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOA_AFRH, GPIOA_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOA_BRR, GPIOA_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port B GPIO configuration / address space: 0x4800_0400 .. 0x4800_07FF
|
||||
|
||||
.equ GPIOB_BASE, GPIO_BASE + 0x400
|
||||
|
||||
.equ GPIOB_MODER, GPIOB_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOB_OTYPER, GPIOB_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOB_OSPEEDR, GPIOB_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOB_PUPDR, GPIOB_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOB_IDR, GPIOB_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOB_ODR, GPIOB_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOB_BSRR, GPIOB_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOB_LCKR, GPIOB_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOB_AFRL, GPIOB_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOB_AFRH, GPIOB_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOB_BRR, GPIOB_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port C GPIO configuration / address space: 0x4800_0800 .. 0x4800_0BFF
|
||||
|
||||
.equ GPIOC_BASE, GPIO_BASE + 0x800
|
||||
|
||||
.equ GPIOC_MODER, GPIOC_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOC_OTYPER, GPIOC_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOC_OSPEEDR, GPIOC_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOC_PUPDR, GPIOC_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOC_IDR, GPIOC_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOC_ODR, GPIOC_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOC_BSRR, GPIOC_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOC_LCKR, GPIOC_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOC_AFRL, GPIOC_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOC_AFRH, GPIOC_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOC_BRR, GPIOC_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port D GPIO configuration / address space: 0x4800_0C00 .. 0x4800_0FFF
|
||||
|
||||
.equ GPIOD_BASE, GPIO_BASE + 0xC00
|
||||
|
||||
.equ GPIOD_MODER, GPIOD_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOD_OTYPER, GPIOD_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOD_OSPEEDR, GPIOD_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOD_PUPDR, GPIOD_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOD_IDR, GPIOD_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOD_ODR, GPIOD_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOD_BSRR, GPIOD_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOD_LCKR, GPIOD_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOD_AFRL, GPIOD_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOD_AFRH, GPIOD_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOD_BRR, GPIOD_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port E GPIO configuration / address space: 0x4800_1000 .. 0x4800_13FF
|
||||
|
||||
.equ GPIOE_BASE, GPIO_BASE + 0x1000
|
||||
|
||||
.equ GPIOE_MODER, GPIOE_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOE_OTYPER, GPIOE_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOE_OSPEEDR, GPIOE_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOE_PUPDR, GPIOE_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOE_IDR, GPIOE_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOE_ODR, GPIOE_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOE_BSRR, GPIOE_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOE_LCKR, GPIOE_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOE_AFRL, GPIOE_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOE_AFRH, GPIOE_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOE_BRR, GPIOE_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port F GPIO configuration / address space: 0x4800_1400 .. 0x4800_17FF
|
||||
|
||||
.equ GPIOF_BASE, GPIO_BASE + 0x1400
|
||||
|
||||
.equ GPIOF_MODER, GPIOF_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOF_OTYPER, GPIOF_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOF_OSPEEDR, GPIOF_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOF_PUPDR, GPIOF_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOF_IDR, GPIOF_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOF_ODR, GPIOF_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOF_BSRR, GPIOF_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOF_LCKR, GPIOF_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOF_AFRL, GPIOF_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOF_AFRH, GPIOF_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOF_BRR, GPIOF_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port G GPIO configuration / address space: 0x4800_1800 .. 0x4800_1BFF
|
||||
|
||||
.equ GPIOG_BASE, GPIO_BASE + 0x1800
|
||||
|
||||
.equ GPIOG_MODER, GPIOG_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOG_OTYPER, GPIOG_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOG_OSPEEDR, GPIOG_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOG_PUPDR, GPIOG_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOG_IDR, GPIOG_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOG_ODR, GPIOG_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOG_BSRR, GPIOG_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOG_LCKR, GPIOG_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOG_AFRL, GPIOG_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOG_AFRH, GPIOG_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOG_BRR, GPIOG_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# System Control Space
|
||||
#
|
||||
# address space: 0xE000_E000 .. 0xE000_EFFF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ SCS_BASE, PPB_BASE + 0xE000
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# System Timer (SysTick)
|
||||
#
|
||||
# address space: 0xE000_E010 .. 0xE000_E01F
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ STK_BASE, SCS_BASE + 10 // 0xE000_E010
|
||||
|
||||
.equ STK_CTRL, SCS_BASE + 0x00
|
||||
.equ STK_LOAD, SCS_BASE + 0x04
|
||||
.equ STK_VAL, SCS_BASE + 0x08
|
||||
.equ STK_CALIB, SCS_BASE + 0x0C
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# Nested Vector Interrupt Controller
|
||||
#
|
||||
# address space: 0xE000_E100 .. 0xE000_E4EF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ NVIC_BASE, SCS_BASE + 0x100 // 0xE000_E100
|
||||
|
||||
.equ NVIC_ISER0, NVIC_BASE + 0x00
|
||||
.equ NVIC_ISER1, NVIC_BASE + 0x04
|
||||
.equ NVIC_ISER2, NVIC_BASE + 0x08
|
||||
.equ NVIC_ISER3, NVIC_BASE + 0x0C
|
||||
|
||||
.equ NVIC_ICER0, NVIC_BASE + 0x80
|
||||
.equ NVIC_ICER1, NVIC_BASE + 0x84
|
||||
.equ NVIC_ICER2, NVIC_BASE + 0x88
|
||||
.equ NVIC_ICER3, NVIC_BASE + 0x8C
|
||||
|
||||
.equ NVIC_ISPR0, NVIC_BASE + 0x100
|
||||
.equ NVIC_ISPR1, NVIC_BASE + 0x104
|
||||
.equ NVIC_ISPR2, NVIC_BASE + 0x108
|
||||
.equ NVIC_ISPR3, NVIC_BASE + 0x10C
|
||||
|
||||
.equ NVIC_ICPR0, NVIC_BASE + 0x180
|
||||
.equ NVIC_ICPR1, NVIC_BASE + 0x184
|
||||
.equ NVIC_ICPR2, NVIC_BASE + 0x188
|
||||
.equ NVIC_ICPR3, NVIC_BASE + 0x18C
|
||||
|
||||
.equ NVIC_IABR0, NVIC_BASE + 0x200
|
||||
.equ NVIC_IABR1, NVIC_BASE + 0x204
|
||||
.equ NVIC_IABR2, NVIC_BASE + 0x208
|
||||
.equ NVIC_IABR3, NVIC_BASE + 0x20C
|
||||
|
||||
.equ NVIC_IPR0, NVIC_BASE + 0x300
|
||||
.equ NVIC_IPR1, NVIC_BASE + 0x304
|
||||
.equ NVIC_IPR2, NVIC_BASE + 0x308
|
||||
.equ NVIC_IPR3, NVIC_BASE + 0x30C
|
||||
.equ NVIC_IPR4, NVIC_BASE + 0x310
|
||||
.equ NVIC_IPR5, NVIC_BASE + 0x314
|
||||
.equ NVIC_IPR6, NVIC_BASE + 0x318
|
||||
.equ NVIC_IPR7, NVIC_BASE + 0x31C
|
||||
.equ NVIC_IPR8, NVIC_BASE + 0x320
|
||||
.equ NVIC_IPR9, NVIC_BASE + 0x324
|
||||
.equ NVIC_IPR10, NVIC_BASE + 0x328
|
||||
.equ NVIC_IPR11, NVIC_BASE + 0x32C
|
||||
.equ NVIC_IPR12, NVIC_BASE + 0x330
|
||||
.equ NVIC_IPR13, NVIC_BASE + 0x334
|
||||
.equ NVIC_IPR14, NVIC_BASE + 0x338
|
||||
.equ NVIC_IPR15, NVIC_BASE + 0x33C
|
||||
.equ NVIC_IPR16, NVIC_BASE + 0x340
|
||||
.equ NVIC_IPR17, NVIC_BASE + 0x344
|
||||
.equ NVIC_IPR18, NVIC_BASE + 0x348
|
||||
.equ NVIC_IPR19, NVIC_BASE + 0x34C
|
||||
.equ NVIC_IPR20, NVIC_BASE + 0x350
|
||||
.equ NVIC_IPR21, NVIC_BASE + 0x354
|
||||
.equ NVIC_IPR22, NVIC_BASE + 0x358
|
||||
.equ NVIC_IPR23, NVIC_BASE + 0x35C
|
||||
.equ NVIC_IPR24, NVIC_BASE + 0x360
|
||||
.equ NVIC_IPR25, NVIC_BASE + 0x364
|
||||
|
||||
.equ STIR, NVIC_BASE + 0xE00
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# MCU Debug Component
|
||||
#
|
||||
# address space: 0xE004_2000 .. 0xE004_2013
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ DBGMCU_BASE, PPB_BASE + 0x42000
|
||||
|
||||
.equ DBGMCU_IDCODE, DBGMCU_BASE + 0x00
|
||||
.equ DBGMCU_CR, DBGMCU_BASE + 0x04
|
||||
.equ DBGMCU_APB1FZR1, DBGMCU_BASE + 0x08
|
||||
.equ DBGMCU_APB1FZR2, DBGMCU_BASE + 0x0C
|
||||
.equ DBGMCU_APB2DZR, DBGMCU_BASE + 0x10
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x02
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,314 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
# LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
# MOVS r2, #0x03 // prepare mask
|
||||
# LDR r0, [r1, #0] // get current value of port A mode register
|
||||
# BICS r0, r2 // delete bits
|
||||
# MOVS r2, #0x01 // load configuration mask
|
||||
# ORRS r0, r0, r2 // apply mask
|
||||
# STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOB_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #2]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #2]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
|
||||
|
||||
int main(){
|
||||
while(1){
|
||||
while(/*schalter nicht gedrückt*/){}
|
||||
delay(10);
|
||||
while(/*schalter losgelassen*/){}
|
||||
delay(150);
|
||||
|
||||
int aktiv = 1;
|
||||
while(aktiv){
|
||||
for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
|
||||
//alle LED einschalten
|
||||
if(i = 0){/*alles bis auf LED0 auschalten*/}
|
||||
if(i = 1){/*..*/}
|
||||
//...
|
||||
for(int zähler = 0; zähler < 333 && aktiv == 1; zähler++){
|
||||
if(/*schalter gerückt*/){
|
||||
aktiv = 0;
|
||||
break;
|
||||
}
|
||||
else{
|
||||
delay(1);
|
||||
}
|
||||
}
|
||||
while(/*Taster gedrückt*/){}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,8 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
|
||||
|
||||
@ -0,0 +1,324 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
LDR r1, =GPIO_IDR
|
||||
MOVS
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
EORS r0, r0, r3
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,323 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
EORS r0, r0, r3
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
# LDR r1, =GPIOA_MODER
|
||||
# MOVS r3, #0x05
|
||||
# LDR r0, [r1, #1]
|
||||
# BICS r0, r3
|
||||
# MOVS r3, #0x01
|
||||
# ORRS r0, r0, r3
|
||||
# STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,24 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
|
||||
|
||||
int main(){
|
||||
while(1){
|
||||
while(/*schalter gedrückt*/){}
|
||||
delay();
|
||||
while(/*schalter losgelassen*/){}
|
||||
delay();
|
||||
|
||||
int aktiv = 1;
|
||||
while(aktiv){
|
||||
for(int i; i < reihenfolge.length - 1; i ++){
|
||||
//alle LED einschalten
|
||||
if(i = 0)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -0,0 +1,315 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
LDR r1, =GPIO_IDR
|
||||
MOVS
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x02
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
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BIN
.metadata/.plugins/org.eclipse.core.resources/.root/69.tree
Normal file
BIN
.metadata/.plugins/org.eclipse.core.resources/.root/69.tree
Normal file
Binary file not shown.
Binary file not shown.
BIN
.metadata/.plugins/org.eclipse.core.resources/69.snap
Normal file
BIN
.metadata/.plugins/org.eclipse.core.resources/69.snap
Normal file
Binary file not shown.
@ -1,3 +1,3 @@
|
||||
BreakpointActionManager.actionData=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<breakpointActionData>\n <actionEntry class\="org.eclipse.cdt.debug.ui.breakpointactions.ResumeAction" name\="Untitled Resume Action" value\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#10;<resumeData pauseTime\="0"/>&\#10;"/>\n <actionEntry class\="org.eclipse.cdt.debug.ui.breakpointactions.LogAction" name\="my log" value\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#10;<logData evalExpr\="false" message\="delay called"/>&\#10;"/>\n</breakpointActionData>\n
|
||||
eclipse.preferences.version=1
|
||||
org.eclipse.cdt.debug.core.cDebug.default_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<sourceLookupDirector>\r\n <sourceContainers duplicates\="false">\r\n <container memento\="AbsolutePath" typeId\="org.eclipse.cdt.debug.core.containerType.absolutePath"/>\r\n <container memento\="programRelativePath" typeId\="org.eclipse.cdt.debug.core.containerType.programRelativePath"/>\r\n <container memento\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#13;&\#10;<project referencedProjects\="true"/>&\#13;&\#10;" typeId\="org.eclipse.cdt.debug.core.containerType.project"/>\r\n </sourceContainers>\r\n</sourceLookupDirector>\r\n
|
||||
org.eclipse.cdt.debug.core.cDebug.default_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<sourceLookupDirector>\n <sourceContainers duplicates\="false">\n <container memento\="AbsolutePath" typeId\="org.eclipse.cdt.debug.core.containerType.absolutePath"/>\n <container memento\="programRelativePath" typeId\="org.eclipse.cdt.debug.core.containerType.programRelativePath"/>\n <container memento\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#10;<project referencedProjects\="true"/>&\#10;" typeId\="org.eclipse.cdt.debug.core.containerType.project"/>\n </sourceContainers>\n</sourceLookupDirector>\n
|
||||
|
||||
@ -1,17 +1,17 @@
|
||||
eclipse.preferences.version=1
|
||||
properties/A3_Timer.null.148366063/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1523048267=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.2036235554\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.754678538\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1977208673\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1389756657\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.696261002\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.488808980\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.318877871\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1073955033\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1166341985\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1747744409\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2034847490\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1404951732\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1523048267\=rebuildState\\\=false\\r\\nrcState\\\=0\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1167899044\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1635898778\=rebuildState\\\=false\\r\\n\r\n
|
||||
properties/A3_Timer.null.148366063/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.693743165=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.559094\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.879330916\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.821200644\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.857752223\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1707235624\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.532547938\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.792063387\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1086464965\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1842345348\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1353652202\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1695548782\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1201748324\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.37314053\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.322737673\=rebuildState\\\=true\\r\\n\r\n
|
||||
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properties/task3.null.1898839469/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1216157763=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.606293410\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1947820112\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1836941222\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.762093604\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1212280541\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1993571926\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.2118490653\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1216157763\=rebuildState\\\=false\\r\\nrcState\\\=0\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1425125328\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.899143234\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1800220528\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.543589025\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1322118056\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.481179617\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2064671237\=rebuildState\\\=false\\r\\n\r\n
|
||||
properties/task3.null.1898839469/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.435457595=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.197816929\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.1662102144\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.395128502\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.322289673\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.933174539\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.732710058\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.13741732\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.958421243\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.503104139\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1110538165\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1826379156\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1523301098\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.2016071322\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.945056554\=rebuildState\\\=true\\r\\n\r\n
|
||||
properties/task4.null.1688711246/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1054076261=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.354011565\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1228099115\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1139073144\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.422382587\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1236508096\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.222325469\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.549150906\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1054076261\=rebuildState\\\=false\\r\\nrcState\\\=0\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1712518208\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1123280063\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.874658681\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.789362698\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1447577805\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1286958391\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.953024194\=rebuildState\\\=false\\r\\n\r\n
|
||||
properties/task4.null.1688711246/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.577803811=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.302386966\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1802369860\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.151654985\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.264122243\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.33574342\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1382994982\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.688471561\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1930277785\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.173134075\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2077870415\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1862078334\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1235454776\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1511214546\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1135454788\=rebuildState\\\=true\\r\\n\r\n
|
||||
properties/task4.null.1688711246/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1054076261=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.354011565\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1228099115\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1139073144\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.422382587\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1236508096\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.222325469\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.549150906\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1054076261\=rebuildState\\\=false\\nrcState\\\=0\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1712518208\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1123280063\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.874658681\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.789362698\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.1447577805\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.1286958391\=rebuildState\\\=false\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.953024194\=rebuildState\\\=false\\n\n
|
||||
properties/task4.null.1688711246/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.577803811=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.302386966\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1802369860\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.151654985\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.264122243\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.33574342\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.1382994982\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.688471561\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1930277785\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.173134075\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.2077870415\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1862078334\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1235454776\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1511214546\=rebuildState\\\=true\\n\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1135454788\=rebuildState\\\=true\\n\n
|
||||
properties/task5.null.837809533/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1650059136=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.574725079\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.982386977\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.debug.2076793678\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.782108627\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.1219255366\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1851651664\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1650059136\=rebuildState\\\=false\\r\\nrcState\\\=0\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1496327494\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.726389530\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.1653209997\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.120347588\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1285610694\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1817995764\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.235156569\=rebuildState\\\=false\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.936509312\=rebuildState\\\=false\\r\\n\r\n
|
||||
properties/task5.null.837809533/com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.298648676=com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.998361209\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1193290996\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1628197668\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.toolchain.exe.release.590953560\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.168188474\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1877705505\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.linker.597438936\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1472457344\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.964597558\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.751138915\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.520108075\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.455653897\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1033584369\=rebuildState\\\=true\\r\\n\r\ncom.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.compiler.224687662\=rebuildState\\\=true\\r\\n\r\n
|
||||
|
||||
@ -5,4 +5,4 @@
|
||||
//org.eclipse.debug.core.PREFERRED_DELEGATES/org.eclipse.cdt.launch.remoteApplicationLaunchType=org.eclipse.rse.remotecdt.dsf.debug,debug,;
|
||||
eclipse.preferences.version=1
|
||||
org.eclipse.debug.core.PREF_DELETE_CONFIGS_ON_PROJECT_DELETE=false
|
||||
prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<watchExpressions/>\r\n
|
||||
prefWatchExpressions=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<watchExpressions/>\n
|
||||
|
||||
@ -1,10 +1,19 @@
|
||||
StringVariablePreferencePage=184,154,153,122,
|
||||
eclipse.preferences.version=1
|
||||
org.eclipse.debug.ui.MemoryHistoryKnownColor=235,235,235
|
||||
org.eclipse.debug.ui.MemoryHistoryUnknownColor=170,175,185
|
||||
org.eclipse.debug.ui.MemoryView.orientation=0
|
||||
org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<launchPerspectives/>\r\n
|
||||
org.eclipse.debug.ui.PREF_CHANGED_VALUE_BACKGROUND=150,80,115
|
||||
org.eclipse.debug.ui.PREF_LAUNCH_PERSPECTIVES=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<launchPerspectives/>\n
|
||||
org.eclipse.debug.ui.changedDebugElement=255,128,128
|
||||
org.eclipse.debug.ui.consoleBackground=53,53,53
|
||||
org.eclipse.debug.ui.errorColor=225,30,70
|
||||
org.eclipse.debug.ui.inColor=140,175,210
|
||||
org.eclipse.debug.ui.outColor=235,235,235
|
||||
org.eclipse.debug.ui.save_dirty_editors_before_launch=always
|
||||
org.eclipse.debug.ui.switch_perspective_on_suspend=always
|
||||
org.eclipse.debug.ui.user_view_bindings=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<viewBindings>\n <view id\="org.eclipse.debug.ui.ExpressionView">\n <perspective id\="org.eclipse.debug.ui.DebugPerspective" userAction\="opened"/>\n </view>\n</viewBindings>\n
|
||||
overriddenByCSS=,org.eclipse.debug.ui.MemoryHistoryKnownColor,org.eclipse.debug.ui.MemoryHistoryUnknownColor,org.eclipse.debug.ui.PREF_CHANGED_VALUE_BACKGROUND,org.eclipse.debug.ui.changedDebugElement,org.eclipse.debug.ui.consoleBackground,org.eclipse.debug.ui.errorColor,org.eclipse.debug.ui.inColor,org.eclipse.debug.ui.outColor,
|
||||
pref_state_memento.org.eclipse.debug.ui.BreakpointView=<?xml version\="1.0" encoding\="UTF-8"?>\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684">\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.BreakpointView">\n<BOOLEAN BOOLEAN\="true" IMemento.internal.id\="org.eclipse.debug.ui.check"/>\n</PRESENTATION_CONTEXT_PROPERTIES>\n</VariablesViewMemento>
|
||||
pref_state_memento.org.eclipse.debug.ui.DebugVieworg.eclipse.debug.ui.DebugView=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<DebugViewMemento org.eclipse.debug.ui.BREADCRUMB_DROPDOWN_AUTO_EXPAND\="false"/>
|
||||
pref_state_memento.org.eclipse.debug.ui.ExpressionView=<?xml version\="1.0" encoding\="UTF-8"?>\n<VariablesViewMemento org.eclipse.debug.ui.SASH_DETAILS_PART\="315" org.eclipse.debug.ui.SASH_VIEW_PART\="684">\n<PRESENTATION_CONTEXT_PROPERTIES IMemento.internal.id\="org.eclipse.debug.ui.ExpressionView">\n<INTEGER IMemento.internal.id\="initialChildCountLimitForCollections" INTEGER\="100"/>\n<BOOLEAN BOOLEAN\="true" IMemento.internal.id\="PRESENTATION_SHOW_LOGICAL_STRUCTURES"/>\n</PRESENTATION_CONTEXT_PROPERTIES>\n</VariablesViewMemento>
|
||||
|
||||
@ -1,10 +1,10 @@
|
||||
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/arch=x86_64
|
||||
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/name=Local
|
||||
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/os=win32
|
||||
configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3 Debug,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task4,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1
|
||||
configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3 Debug,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task4,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2
|
||||
eclipse.preferences.version=1
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:A3_Timer/activeLaunchMode=run
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1/activeLaunchMode=debug
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1/activeLaunchMode=run
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1/activeLaunchTarget=null\:---
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2/activeLaunchMode=run
|
||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2/activeLaunchTarget=null\:---
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
IMPORT_FILES_AND_FOLDERS_RELATIVE=true
|
||||
IMPORT_FILES_AND_FOLDERS_TYPE=23,1
|
||||
eclipse.preferences.version=1
|
||||
platformState=1771514971320
|
||||
platformState=1772304866322
|
||||
quickStart=false
|
||||
tipsAndTricks=true
|
||||
|
||||
@ -18,12 +18,6 @@ org.eclipse.debug.ui.MemoryViewTableFont=1|Consolas|12.0|0|WINDOWS|1|-16|0|0|0|4
|
||||
org.eclipse.debug.ui.consoleFont=1|Consolas|12.0|0|WINDOWS|1|-16|0|0|0|400|0|0|0|0|3|2|1|49|Consolas;
|
||||
org.eclipse.jface.textfont=1|Consolas|12.0|0|WINDOWS|1|-16|0|0|0|400|0|0|0|0|3|2|1|49|Consolas;
|
||||
org.eclipse.ui.commands=<?xml version\="1.0" encoding\="UTF-8"?>\r\n<org.eclipse.ui.commands>\r\n<keyBinding contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="CTRL+F11"/>\r\n<keyBinding commandId\="org.eclipse.ui.project.buildProject" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="ALT+B"/>\r\n<keyBinding commandId\="org.eclipse.debug.ui.commands.RunLast" contextId\="org.eclipse.ui.contexts.window" keyConfigurationId\="org.eclipse.ui.defaultAcceleratorConfiguration" keySequence\="ALT+R"/>\r\n</org.eclipse.ui.commands>
|
||||
org.eclipse.ui.ide.systemDefault.org.eclipse.ui.workbench.ACTIVE_TAB_BG_END=41,41,41
|
||||
org.eclipse.ui.ide.systemDefault.org.eclipse.ui.workbench.ACTIVE_TAB_BG_START=43,44,45
|
||||
org.eclipse.ui.ide.systemDefault.org.eclipse.ui.workbench.ACTIVE_TAB_TEXT_COLOR=221,221,221
|
||||
org.eclipse.ui.r30.org.eclipse.ui.workbench.ACTIVE_TAB_BG_END=41,41,41
|
||||
org.eclipse.ui.r30.org.eclipse.ui.workbench.ACTIVE_TAB_BG_START=43,44,45
|
||||
org.eclipse.ui.r30.org.eclipse.ui.workbench.ACTIVE_TAB_TEXT_COLOR=221,221,221
|
||||
org.eclipse.ui.workbench.ACTIVE_NOFOCUS_TAB_BG_END=41,41,41
|
||||
org.eclipse.ui.workbench.ACTIVE_NOFOCUS_TAB_BG_START=43,44,45
|
||||
org.eclipse.ui.workbench.ACTIVE_NOFOCUS_TAB_TEXT_COLOR=204,204,204
|
||||
|
||||
@ -2,8 +2,8 @@
|
||||
<launchHistory>
|
||||
<launchGroup id="org.eclipse.debug.ui.launchGroup.debug">
|
||||
<mruHistory>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task2/task2.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task4/task4.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task3/task3 Debug.launch"/> "/>
|
||||
</mruHistory>
|
||||
@ -24,8 +24,8 @@
|
||||
</launchGroup>
|
||||
<launchGroup id="org.eclipse.debug.ui.launchGroup.run">
|
||||
<mruHistory>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task2/task2.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task4/task4.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task3/task3 Debug.launch"/> "/>
|
||||
</mruHistory>
|
||||
|
||||
File diff suppressed because one or more lines are too long
@ -0,0 +1,4 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<session version="1.0">
|
||||
<refactoring comment="Delete resource 'task2/task2_tobi.s'" deleteContents="false" description="Delete resource 'task2/task2_tobi.s'" element1="/task2/task2_tobi.s" flags="7" id="org.eclipse.ltk.core.refactoring.delete.resources" resources="1" stamp="1774360637158"/>
|
||||
</session>
|
||||
@ -0,0 +1 @@
|
||||
1774360637158 Delete resource 'task2/task2_tobi.s'
|
||||
@ -0,0 +1,3 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<session version="1.0">
<refactoring comment="Rename resource 'task2/task2.s' to 'task2_tobi.s'" description="Rename resource 'task2.s'" flags="7" id="org.eclipse.ltk.core.refactoring.rename.resource" input="task2.s" name="task2_tobi.s" stamp="1774358097434" updateReferences="true"/>
<refactoring comment="Rename resource 'task2/task2_efe.s' to 'task2.s'" description="Rename resource 'task2_efe.s'" flags="7" id="org.eclipse.ltk.core.refactoring.rename.resource" input="task2_efe.s" name="task2.s" stamp="1774358106409" updateReferences="true"/>
|
||||
</session>
|
||||
@ -0,0 +1,2 @@
|
||||
1774358097434 Rename resource 'task2.s'
|
||||
1774358106409 Rename resource 'task2_efe.s'
|
||||
@ -17,7 +17,7 @@
|
||||
<section name="CleanDialogSettings">
|
||||
<item key="BUILD_NOW" value="false"/>
|
||||
<item key="BUILD_ALL" value="true"/>
|
||||
<item key="TOGGLE_SELECTED" value="false"/>
|
||||
<item key="TOGGLE_SELECTED" value="true"/>
|
||||
<item key="DIALOG_WIDTH" value="731"/>
|
||||
<item key="DIALOG_HEIGHT" value="569"/>
|
||||
<item key="DIALOG_FONT_NAME" value="1|Noto Sans|10.0|0|GTK|1|"/>
|
||||
|
||||
@ -1,3 +1,3 @@
|
||||
#Mon Mar 16 12:55:48 CET 2026
|
||||
#Tue Mar 31 13:41:52 CEST 2026
|
||||
org.eclipse.core.runtime=2
|
||||
org.eclipse.platform=4.30.0.v20231201-0110
|
||||
|
||||
@ -1,8 +1,16 @@
|
||||
= 3.2 Aufgabe 2 - ASM: Interrupts, Entprellen
|
||||
== Aufgabenstellung:
|
||||
Das Programm soll per Tastendruck den Zustand der LEDs wechseln. Taster *S-1* soll *LED0* und *LED3* ein-bzw. auschalten, Taster *S1 LED1* und *LED2*
|
||||
Das Programm soll per Tastendruck den Zustand der LEDs wechseln. Taster *S1* soll *LED0* und *LED3* ein-bzw. auschalten, Taster *S1 LED1* und *LED2*
|
||||
== Vorbereitungsfragen:
|
||||
=== a. Welche vier Einträge stehen am Beginn der ARM Exception Vector Table?
|
||||
#table(
|
||||
columns: (1fr, auto, auto),
|
||||
inset: 10pt,
|
||||
align: horizon,
|
||||
table.header(
|
||||
[*Postion*], [*Vektor*], [*Beschreibung*]
|
||||
),
|
||||
[0], [WWDG],
|
||||
=== b. Wie viele Interrupt-Prioritätsstufen unterstützt ein ARM-Controller maximal?
|
||||
=== c. An welchen Positionen in der Exception Vector Table stehen die Adressen der ISRs für die Tasten? (ST Dokumentation)
|
||||
=== d. Schauen Sie sich das Prellen eines Tasters an und überlegen Sie sich eine Lösung.
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-549550575642144520" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1558684269450950684" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
||||
0
task1/Debug/Src/sketch.cyclo
Normal file
0
task1/Debug/Src/sketch.cyclo
Normal file
1
task1/Debug/Src/sketch.d
Normal file
1
task1/Debug/Src/sketch.d
Normal file
@ -0,0 +1 @@
|
||||
Src/sketch.o: ../Src/sketch.c
|
||||
BIN
task1/Debug/Src/sketch.o
Normal file
BIN
task1/Debug/Src/sketch.o
Normal file
Binary file not shown.
0
task1/Debug/Src/sketch.su
Normal file
0
task1/Debug/Src/sketch.su
Normal file
@ -5,14 +5,17 @@
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../Src/sketch.c \
|
||||
../Src/task1.c \
|
||||
../Src/task1_it.c
|
||||
|
||||
OBJS += \
|
||||
./Src/sketch.o \
|
||||
./Src/task1.o \
|
||||
./Src/task1_it.o
|
||||
|
||||
C_DEPS += \
|
||||
./Src/sketch.d \
|
||||
./Src/task1.d \
|
||||
./Src/task1_it.d
|
||||
|
||||
@ -24,7 +27,7 @@ Src/%.o Src/%.su Src/%.cyclo: ../Src/%.c Src/subdir.mk
|
||||
clean: clean-Src
|
||||
|
||||
clean-Src:
|
||||
-$(RM) ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
|
||||
-$(RM) ./Src/sketch.cyclo ./Src/sketch.d ./Src/sketch.o ./Src/sketch.su ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
|
||||
|
||||
.PHONY: clean-Src
|
||||
|
||||
|
||||
@ -1,3 +0,0 @@
|
||||
../Src/task1.c:53:5:main 14
|
||||
../Src/task1.c:156:13:GPIO_init 1
|
||||
../Src/task1.c:196:13:delay 4
|
||||
Binary file not shown.
@ -1,3 +0,0 @@
|
||||
../Src/task1.c:53:5:main 24 static,ignoring_inline_asm
|
||||
../Src/task1.c:156:13:GPIO_init 4 static
|
||||
../Src/task1.c:196:13:delay 24 static,ignoring_inline_asm
|
||||
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -59,8 +59,8 @@ all: main-build
|
||||
main-build: task1.elf secondary-outputs
|
||||
|
||||
# Tool invocations
|
||||
task1.elf task1.map: $(OBJS) $(USER_OBJS) D:\04\ Studium\SS26\mct\git-praktikum\MZT-Praktikum\task1\STM32G431KBTX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"D:\04 Studium\SS26\mct\git-praktikum\MZT-Praktikum\task1\STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
task1.elf task1.map: $(OBJS) $(USER_OBJS) /home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld makefile objects.list $(OPTIONAL_TOOL_DEPS)
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
@echo 'Finished building target: $@'
|
||||
@echo ' '
|
||||
|
||||
|
||||
@ -1,3 +1,4 @@
|
||||
"./Src/sketch.o"
|
||||
"./Src/task1.o"
|
||||
"./Src/task1_it.o"
|
||||
"./Startup/startup_stm32g431kbtx.o"
|
||||
|
||||
Binary file not shown.
@ -1,750 +0,0 @@
|
||||
|
||||
task1.elf: file format elf32-littlearm
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
0 .isr_vector 000001d8 08000000 08000000 00001000 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
1 .text 000004a0 080001d8 080001d8 000011d8 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
2 .rodata 00000000 08000678 08000680 00001680 2**0
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
3 .ARM.extab 00000000 08000678 08000678 00001680 2**0
|
||||
CONTENTS
|
||||
4 .ARM 00000000 08000678 08000678 00001680 2**0
|
||||
CONTENTS
|
||||
5 .preinit_array 00000000 08000678 08000680 00001680 2**0
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
6 .init_array 00000004 08000678 08000678 00001678 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
7 .fini_array 00000004 0800067c 0800067c 0000167c 2**2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, DATA
|
||||
8 .data 00000000 20000000 20000000 00001680 2**0
|
||||
CONTENTS, ALLOC, LOAD, DATA
|
||||
9 .ccmsram 00000000 10000000 10000000 00001680 2**0
|
||||
CONTENTS
|
||||
10 .bss 00000020 20000000 20000000 00002000 2**2
|
||||
ALLOC
|
||||
11 ._user_heap_stack 00000600 20000020 20000020 00002000 2**0
|
||||
ALLOC
|
||||
12 .ARM.attributes 00000030 00000000 00000000 00001680 2**0
|
||||
CONTENTS, READONLY
|
||||
13 .debug_info 000007eb 00000000 00000000 000016b0 2**0
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
14 .debug_abbrev 00000296 00000000 00000000 00001e9b 2**0
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
15 .debug_aranges 00000078 00000000 00000000 00002138 2**3
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
16 .debug_rnglists 0000003a 00000000 00000000 000021b0 2**0
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
17 .debug_macro 00013740 00000000 00000000 000021ea 2**0
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
18 .debug_line 00000b70 00000000 00000000 0001592a 2**0
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
19 .debug_str 0006f819 00000000 00000000 0001649a 2**0
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
20 .comment 00000043 00000000 00000000 00085cb3 2**0
|
||||
CONTENTS, READONLY
|
||||
21 .debug_frame 000000e4 00000000 00000000 00085cf8 2**2
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
22 .debug_line_str 00000062 00000000 00000000 00085ddc 2**0
|
||||
CONTENTS, READONLY, DEBUGGING, OCTETS
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
080001d8 <__do_global_dtors_aux>:
|
||||
80001d8: b510 push {r4, lr}
|
||||
80001da: 4c05 ldr r4, [pc, #20] @ (80001f0 <__do_global_dtors_aux+0x18>)
|
||||
80001dc: 7823 ldrb r3, [r4, #0]
|
||||
80001de: b933 cbnz r3, 80001ee <__do_global_dtors_aux+0x16>
|
||||
80001e0: 4b04 ldr r3, [pc, #16] @ (80001f4 <__do_global_dtors_aux+0x1c>)
|
||||
80001e2: b113 cbz r3, 80001ea <__do_global_dtors_aux+0x12>
|
||||
80001e4: 4804 ldr r0, [pc, #16] @ (80001f8 <__do_global_dtors_aux+0x20>)
|
||||
80001e6: f3af 8000 nop.w
|
||||
80001ea: 2301 movs r3, #1
|
||||
80001ec: 7023 strb r3, [r4, #0]
|
||||
80001ee: bd10 pop {r4, pc}
|
||||
80001f0: 20000000 .word 0x20000000
|
||||
80001f4: 00000000 .word 0x00000000
|
||||
80001f8: 08000660 .word 0x08000660
|
||||
|
||||
080001fc <frame_dummy>:
|
||||
80001fc: b508 push {r3, lr}
|
||||
80001fe: 4b03 ldr r3, [pc, #12] @ (800020c <frame_dummy+0x10>)
|
||||
8000200: b11b cbz r3, 800020a <frame_dummy+0xe>
|
||||
8000202: 4903 ldr r1, [pc, #12] @ (8000210 <frame_dummy+0x14>)
|
||||
8000204: 4803 ldr r0, [pc, #12] @ (8000214 <frame_dummy+0x18>)
|
||||
8000206: f3af 8000 nop.w
|
||||
800020a: bd08 pop {r3, pc}
|
||||
800020c: 00000000 .word 0x00000000
|
||||
8000210: 20000004 .word 0x20000004
|
||||
8000214: 08000660 .word 0x08000660
|
||||
|
||||
08000218 <main>:
|
||||
static void GPIO_init(void);
|
||||
static void delay(const uint16_t ms);
|
||||
|
||||
/* ------------------------------------ M A I N --------------------------------------- */
|
||||
int main(void)
|
||||
{
|
||||
8000218: b580 push {r7, lr}
|
||||
800021a: b084 sub sp, #16
|
||||
800021c: af00 add r7, sp, #0
|
||||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
__STATIC_FORCEINLINE void __disable_irq(void)
|
||||
{
|
||||
__ASM volatile ("cpsid i" : : : "memory");
|
||||
800021e: b672 cpsid i
|
||||
}
|
||||
8000220: bf00 nop
|
||||
/* --- initialization --- */
|
||||
__disable_irq(); // disable interrupts globally
|
||||
|
||||
GPIO_init();
|
||||
8000222: f000 f8e5 bl 80003f0 <GPIO_init>
|
||||
__ASM volatile ("cpsie i" : : : "memory");
|
||||
8000226: b662 cpsie i
|
||||
}
|
||||
8000228: bf00 nop
|
||||
__enable_irq(); // enable interrupts globally
|
||||
|
||||
/* --- one time tasks --- */
|
||||
|
||||
//s0 Hilfvariablen auserhalb von while deklarieren
|
||||
int running = 0; //0 Lauflicht aus, 1 Lauflicht an
|
||||
800022a: 2300 movs r3, #0
|
||||
800022c: 60fb str r3, [r7, #12]
|
||||
int lastButtonState = 1; // Hilfsvariable zur Flankenerkennung
|
||||
800022e: 2301 movs r3, #1
|
||||
8000230: 60bb str r3, [r7, #8]
|
||||
|
||||
/* --- infinite processing loop --- */
|
||||
while (1)
|
||||
{
|
||||
int buttonState = GPIOB->IDR & (1 << 0);
|
||||
8000232: 4b6d ldr r3, [pc, #436] @ (80003e8 <main+0x1d0>)
|
||||
8000234: 691b ldr r3, [r3, #16]
|
||||
8000236: f003 0301 and.w r3, r3, #1
|
||||
800023a: 607b str r3, [r7, #4]
|
||||
|
||||
// fallende Flanke erkennen
|
||||
if (lastButtonState && !buttonState)
|
||||
800023c: 68bb ldr r3, [r7, #8]
|
||||
800023e: 2b00 cmp r3, #0
|
||||
8000240: d006 beq.n 8000250 <main+0x38>
|
||||
8000242: 687b ldr r3, [r7, #4]
|
||||
8000244: 2b00 cmp r3, #0
|
||||
8000246: d103 bne.n 8000250 <main+0x38>
|
||||
{
|
||||
running ^= 1; // toggle running
|
||||
8000248: 68fb ldr r3, [r7, #12]
|
||||
800024a: f083 0301 eor.w r3, r3, #1
|
||||
800024e: 60fb str r3, [r7, #12]
|
||||
/* delay(50); // entprellen */
|
||||
}
|
||||
|
||||
lastButtonState = buttonState;
|
||||
8000250: 687b ldr r3, [r7, #4]
|
||||
8000252: 60bb str r3, [r7, #8]
|
||||
|
||||
|
||||
if(running)
|
||||
8000254: 68fb ldr r3, [r7, #12]
|
||||
8000256: 2b00 cmp r3, #0
|
||||
8000258: d0eb beq.n 8000232 <main+0x1a>
|
||||
{
|
||||
switch (state)
|
||||
800025a: 4b64 ldr r3, [pc, #400] @ (80003ec <main+0x1d4>)
|
||||
800025c: 681b ldr r3, [r3, #0]
|
||||
800025e: 2b05 cmp r3, #5
|
||||
8000260: dc12 bgt.n 8000288 <main+0x70>
|
||||
8000262: 2b00 cmp r3, #0
|
||||
8000264: dbe5 blt.n 8000232 <main+0x1a>
|
||||
8000266: 2b05 cmp r3, #5
|
||||
8000268: d8e3 bhi.n 8000232 <main+0x1a>
|
||||
800026a: a201 add r2, pc, #4 @ (adr r2, 8000270 <main+0x58>)
|
||||
800026c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
||||
8000270: 08000291 .word 0x08000291
|
||||
8000274: 080002c5 .word 0x080002c5
|
||||
8000278: 080002f9 .word 0x080002f9
|
||||
800027c: 0800032d .word 0x0800032d
|
||||
8000280: 08000361 .word 0x08000361
|
||||
8000284: 08000395 .word 0x08000395
|
||||
8000288: 2b63 cmp r3, #99 @ 0x63
|
||||
800028a: f000 809b beq.w 80003c4 <main+0x1ac>
|
||||
800028e: e0aa b.n 80003e6 <main+0x1ce>
|
||||
{
|
||||
case 0:
|
||||
state++;
|
||||
8000290: 4b56 ldr r3, [pc, #344] @ (80003ec <main+0x1d4>)
|
||||
8000292: 681b ldr r3, [r3, #0]
|
||||
8000294: 3301 adds r3, #1
|
||||
8000296: 4a55 ldr r2, [pc, #340] @ (80003ec <main+0x1d4>)
|
||||
8000298: 6013 str r3, [r2, #0]
|
||||
GPIOA->ODR &= ~(1 << 0);
|
||||
800029a: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
800029e: 695b ldr r3, [r3, #20]
|
||||
80002a0: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80002a4: f023 0301 bic.w r3, r3, #1
|
||||
80002a8: 6153 str r3, [r2, #20]
|
||||
delay(WAITTIME);
|
||||
80002aa: f240 104d movw r0, #333 @ 0x14d
|
||||
80002ae: f000 f911 bl 80004d4 <delay>
|
||||
GPIOA->ODR |= (1 << 0);
|
||||
80002b2: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
80002b6: 695b ldr r3, [r3, #20]
|
||||
80002b8: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80002bc: f043 0301 orr.w r3, r3, #1
|
||||
80002c0: 6153 str r3, [r2, #20]
|
||||
break;
|
||||
80002c2: e090 b.n 80003e6 <main+0x1ce>
|
||||
case 1:
|
||||
state++;
|
||||
80002c4: 4b49 ldr r3, [pc, #292] @ (80003ec <main+0x1d4>)
|
||||
80002c6: 681b ldr r3, [r3, #0]
|
||||
80002c8: 3301 adds r3, #1
|
||||
80002ca: 4a48 ldr r2, [pc, #288] @ (80003ec <main+0x1d4>)
|
||||
80002cc: 6013 str r3, [r2, #0]
|
||||
GPIOA->ODR &= ~(1 << 1);
|
||||
80002ce: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
80002d2: 695b ldr r3, [r3, #20]
|
||||
80002d4: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80002d8: f023 0302 bic.w r3, r3, #2
|
||||
80002dc: 6153 str r3, [r2, #20]
|
||||
delay(WAITTIME);
|
||||
80002de: f240 104d movw r0, #333 @ 0x14d
|
||||
80002e2: f000 f8f7 bl 80004d4 <delay>
|
||||
GPIOA->ODR |= (1 << 1);
|
||||
80002e6: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
80002ea: 695b ldr r3, [r3, #20]
|
||||
80002ec: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80002f0: f043 0302 orr.w r3, r3, #2
|
||||
80002f4: 6153 str r3, [r2, #20]
|
||||
break;
|
||||
80002f6: e076 b.n 80003e6 <main+0x1ce>
|
||||
case 2:
|
||||
state++;
|
||||
80002f8: 4b3c ldr r3, [pc, #240] @ (80003ec <main+0x1d4>)
|
||||
80002fa: 681b ldr r3, [r3, #0]
|
||||
80002fc: 3301 adds r3, #1
|
||||
80002fe: 4a3b ldr r2, [pc, #236] @ (80003ec <main+0x1d4>)
|
||||
8000300: 6013 str r3, [r2, #0]
|
||||
GPIOA->ODR &= ~(1 << 2);
|
||||
8000302: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000306: 695b ldr r3, [r3, #20]
|
||||
8000308: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
800030c: f023 0304 bic.w r3, r3, #4
|
||||
8000310: 6153 str r3, [r2, #20]
|
||||
delay(WAITTIME);
|
||||
8000312: f240 104d movw r0, #333 @ 0x14d
|
||||
8000316: f000 f8dd bl 80004d4 <delay>
|
||||
GPIOA->ODR |= (1 << 2);
|
||||
800031a: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
800031e: 695b ldr r3, [r3, #20]
|
||||
8000320: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000324: f043 0304 orr.w r3, r3, #4
|
||||
8000328: 6153 str r3, [r2, #20]
|
||||
break;
|
||||
800032a: e05c b.n 80003e6 <main+0x1ce>
|
||||
case 3:
|
||||
state++;
|
||||
800032c: 4b2f ldr r3, [pc, #188] @ (80003ec <main+0x1d4>)
|
||||
800032e: 681b ldr r3, [r3, #0]
|
||||
8000330: 3301 adds r3, #1
|
||||
8000332: 4a2e ldr r2, [pc, #184] @ (80003ec <main+0x1d4>)
|
||||
8000334: 6013 str r3, [r2, #0]
|
||||
GPIOA->ODR &= ~(1 << 3);
|
||||
8000336: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
800033a: 695b ldr r3, [r3, #20]
|
||||
800033c: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000340: f023 0308 bic.w r3, r3, #8
|
||||
8000344: 6153 str r3, [r2, #20]
|
||||
delay(WAITTIME);
|
||||
8000346: f240 104d movw r0, #333 @ 0x14d
|
||||
800034a: f000 f8c3 bl 80004d4 <delay>
|
||||
GPIOA->ODR |= (1 << 3);
|
||||
800034e: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000352: 695b ldr r3, [r3, #20]
|
||||
8000354: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000358: f043 0308 orr.w r3, r3, #8
|
||||
800035c: 6153 str r3, [r2, #20]
|
||||
break;
|
||||
800035e: e042 b.n 80003e6 <main+0x1ce>
|
||||
case 4:
|
||||
state++;
|
||||
8000360: 4b22 ldr r3, [pc, #136] @ (80003ec <main+0x1d4>)
|
||||
8000362: 681b ldr r3, [r3, #0]
|
||||
8000364: 3301 adds r3, #1
|
||||
8000366: 4a21 ldr r2, [pc, #132] @ (80003ec <main+0x1d4>)
|
||||
8000368: 6013 str r3, [r2, #0]
|
||||
GPIOA->ODR &= ~(1 << 2);
|
||||
800036a: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
800036e: 695b ldr r3, [r3, #20]
|
||||
8000370: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000374: f023 0304 bic.w r3, r3, #4
|
||||
8000378: 6153 str r3, [r2, #20]
|
||||
delay(WAITTIME);
|
||||
800037a: f240 104d movw r0, #333 @ 0x14d
|
||||
800037e: f000 f8a9 bl 80004d4 <delay>
|
||||
GPIOA->ODR |= (1 << 2);
|
||||
8000382: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000386: 695b ldr r3, [r3, #20]
|
||||
8000388: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
800038c: f043 0304 orr.w r3, r3, #4
|
||||
8000390: 6153 str r3, [r2, #20]
|
||||
break;
|
||||
8000392: e028 b.n 80003e6 <main+0x1ce>
|
||||
case 5:
|
||||
state=0;
|
||||
8000394: 4b15 ldr r3, [pc, #84] @ (80003ec <main+0x1d4>)
|
||||
8000396: 2200 movs r2, #0
|
||||
8000398: 601a str r2, [r3, #0]
|
||||
GPIOA->ODR &= ~(1 << 1);
|
||||
800039a: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
800039e: 695b ldr r3, [r3, #20]
|
||||
80003a0: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80003a4: f023 0302 bic.w r3, r3, #2
|
||||
80003a8: 6153 str r3, [r2, #20]
|
||||
delay(WAITTIME);
|
||||
80003aa: f240 104d movw r0, #333 @ 0x14d
|
||||
80003ae: f000 f891 bl 80004d4 <delay>
|
||||
GPIOA->ODR |= (1 << 1);
|
||||
80003b2: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
80003b6: 695b ldr r3, [r3, #20]
|
||||
80003b8: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80003bc: f043 0302 orr.w r3, r3, #2
|
||||
80003c0: 6153 str r3, [r2, #20]
|
||||
break;
|
||||
80003c2: e010 b.n 80003e6 <main+0x1ce>
|
||||
|
||||
case 99:
|
||||
GPIOA->ODR |= MASK_LED_ALL;
|
||||
80003c4: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
80003c8: 695b ldr r3, [r3, #20]
|
||||
80003ca: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80003ce: f043 030f orr.w r3, r3, #15
|
||||
80003d2: 6153 str r3, [r2, #20]
|
||||
while(1){
|
||||
if((GPIOB->IDR & (1 << 0)) == 0){
|
||||
80003d4: 4b04 ldr r3, [pc, #16] @ (80003e8 <main+0x1d0>)
|
||||
80003d6: 691b ldr r3, [r3, #16]
|
||||
80003d8: f003 0301 and.w r3, r3, #1
|
||||
80003dc: 2b00 cmp r3, #0
|
||||
80003de: d1f9 bne.n 80003d4 <main+0x1bc>
|
||||
state=0;
|
||||
80003e0: 4b02 ldr r3, [pc, #8] @ (80003ec <main+0x1d4>)
|
||||
80003e2: 2200 movs r2, #0
|
||||
80003e4: 601a str r2, [r3, #0]
|
||||
{
|
||||
80003e6: e724 b.n 8000232 <main+0x1a>
|
||||
80003e8: 48000400 .word 0x48000400
|
||||
80003ec: 2000001c .word 0x2000001c
|
||||
|
||||
080003f0 <GPIO_init>:
|
||||
* requires: - nothing -
|
||||
* parameters: - none -
|
||||
* returns: - nothing -
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
static void GPIO_init(void)
|
||||
{
|
||||
80003f0: b480 push {r7}
|
||||
80003f2: af00 add r7, sp, #0
|
||||
/* enable port clocks */
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // LEDs: A
|
||||
80003f4: 4b35 ldr r3, [pc, #212] @ (80004cc <GPIO_init+0xdc>)
|
||||
80003f6: 6cdb ldr r3, [r3, #76] @ 0x4c
|
||||
80003f8: 4a34 ldr r2, [pc, #208] @ (80004cc <GPIO_init+0xdc>)
|
||||
80003fa: f043 0301 orr.w r3, r3, #1
|
||||
80003fe: 64d3 str r3, [r2, #76] @ 0x4c
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOBEN; //Taster versuch
|
||||
8000400: 4b32 ldr r3, [pc, #200] @ (80004cc <GPIO_init+0xdc>)
|
||||
8000402: 6cdb ldr r3, [r3, #76] @ 0x4c
|
||||
8000404: 4a31 ldr r2, [pc, #196] @ (80004cc <GPIO_init+0xdc>)
|
||||
8000406: f043 0302 orr.w r3, r3, #2
|
||||
800040a: 64d3 str r3, [r2, #76] @ 0x4c
|
||||
|
||||
/* --- LEDs --- */
|
||||
GPIOA->ODR |= MASK_LED_ALL;
|
||||
800040c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000410: 695b ldr r3, [r3, #20]
|
||||
8000412: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000416: f043 030f orr.w r3, r3, #15
|
||||
800041a: 6153 str r3, [r2, #20]
|
||||
GPIOA->MODER &= ~(3 << 0);
|
||||
800041c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000420: 681b ldr r3, [r3, #0]
|
||||
8000422: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000426: f023 0303 bic.w r3, r3, #3
|
||||
800042a: 6013 str r3, [r2, #0]
|
||||
GPIOA->MODER |= (1 << 0); // set LED pin to output
|
||||
800042c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000430: 681b ldr r3, [r3, #0]
|
||||
8000432: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000436: f043 0301 orr.w r3, r3, #1
|
||||
800043a: 6013 str r3, [r2, #0]
|
||||
|
||||
/* LED1 als Output */
|
||||
GPIOA->MODER &= ~(3 << 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
800043c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000440: 681b ldr r3, [r3, #0]
|
||||
8000442: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000446: f023 030c bic.w r3, r3, #12
|
||||
800044a: 6013 str r3, [r2, #0]
|
||||
GPIOA->MODER |= (1 << 2); // Versuch: LED 1 PA1 = output :klappt so
|
||||
800044c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000450: 681b ldr r3, [r3, #0]
|
||||
8000452: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000456: f043 0304 orr.w r3, r3, #4
|
||||
800045a: 6013 str r3, [r2, #0]
|
||||
|
||||
/* LED2 als Output */
|
||||
GPIOA->MODER &= ~(3 << 4); // Versuch: LED 2 Mode löschen :klappt
|
||||
800045c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000460: 681b ldr r3, [r3, #0]
|
||||
8000462: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000466: f023 0330 bic.w r3, r3, #48 @ 0x30
|
||||
800046a: 6013 str r3, [r2, #0]
|
||||
GPIOA->MODER |= (1 << 4); // Versuch: LED 2 PA1 = output :klappt
|
||||
800046c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000470: 681b ldr r3, [r3, #0]
|
||||
8000472: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000476: f043 0310 orr.w r3, r3, #16
|
||||
800047a: 6013 str r3, [r2, #0]
|
||||
|
||||
/* LED3 als output */
|
||||
GPIOA->MODER &= ~(3 << 6);
|
||||
800047c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000480: 681b ldr r3, [r3, #0]
|
||||
8000482: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000486: f023 03c0 bic.w r3, r3, #192 @ 0xc0
|
||||
800048a: 6013 str r3, [r2, #0]
|
||||
GPIOA->MODER |= (1 << 6);
|
||||
800048c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000490: 681b ldr r3, [r3, #0]
|
||||
8000492: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000496: f043 0340 orr.w r3, r3, #64 @ 0x40
|
||||
800049a: 6013 str r3, [r2, #0]
|
||||
|
||||
/* s0 (PB0) als Input Versuch */
|
||||
GPIOB->MODER &= ~(3 << 0);
|
||||
800049c: 4b0c ldr r3, [pc, #48] @ (80004d0 <GPIO_init+0xe0>)
|
||||
800049e: 681b ldr r3, [r3, #0]
|
||||
80004a0: 4a0b ldr r2, [pc, #44] @ (80004d0 <GPIO_init+0xe0>)
|
||||
80004a2: f023 0303 bic.w r3, r3, #3
|
||||
80004a6: 6013 str r3, [r2, #0]
|
||||
|
||||
/* Pull-Up Aktivieren Versuch */
|
||||
GPIOB->PUPDR &= ~(3 << 0);
|
||||
80004a8: 4b09 ldr r3, [pc, #36] @ (80004d0 <GPIO_init+0xe0>)
|
||||
80004aa: 68db ldr r3, [r3, #12]
|
||||
80004ac: 4a08 ldr r2, [pc, #32] @ (80004d0 <GPIO_init+0xe0>)
|
||||
80004ae: f023 0303 bic.w r3, r3, #3
|
||||
80004b2: 60d3 str r3, [r2, #12]
|
||||
GPIOB->PUPDR |= (1 << 0); // 01 = Pull-Up
|
||||
80004b4: 4b06 ldr r3, [pc, #24] @ (80004d0 <GPIO_init+0xe0>)
|
||||
80004b6: 68db ldr r3, [r3, #12]
|
||||
80004b8: 4a05 ldr r2, [pc, #20] @ (80004d0 <GPIO_init+0xe0>)
|
||||
80004ba: f043 0301 orr.w r3, r3, #1
|
||||
80004be: 60d3 str r3, [r2, #12]
|
||||
}
|
||||
80004c0: bf00 nop
|
||||
80004c2: 46bd mov sp, r7
|
||||
80004c4: f85d 7b04 ldr.w r7, [sp], #4
|
||||
80004c8: 4770 bx lr
|
||||
80004ca: bf00 nop
|
||||
80004cc: 40021000 .word 0x40021000
|
||||
80004d0: 48000400 .word 0x48000400
|
||||
|
||||
080004d4 <delay>:
|
||||
* requires: - nothing -
|
||||
* parameters: ms - delay time in milliseconds
|
||||
* returns: - nothing -
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
static void delay(const uint16_t ms)
|
||||
{
|
||||
80004d4: b480 push {r7}
|
||||
80004d6: b085 sub sp, #20
|
||||
80004d8: af00 add r7, sp, #0
|
||||
80004da: 4603 mov r3, r0
|
||||
80004dc: 80fb strh r3, [r7, #6]
|
||||
for (uint16_t i = 0; i < ms; ++i)
|
||||
80004de: 2300 movs r3, #0
|
||||
80004e0: 81fb strh r3, [r7, #14]
|
||||
80004e2: e018 b.n 8000516 <delay+0x42>
|
||||
{
|
||||
if((GPIOB->IDR & (1 << 0)) == 0){
|
||||
80004e4: 4b11 ldr r3, [pc, #68] @ (800052c <delay+0x58>)
|
||||
80004e6: 691b ldr r3, [r3, #16]
|
||||
80004e8: f003 0301 and.w r3, r3, #1
|
||||
80004ec: 2b00 cmp r3, #0
|
||||
80004ee: d103 bne.n 80004f8 <delay+0x24>
|
||||
state = 99;
|
||||
80004f0: 4b0f ldr r3, [pc, #60] @ (8000530 <delay+0x5c>)
|
||||
80004f2: 2263 movs r2, #99 @ 0x63
|
||||
80004f4: 601a str r2, [r3, #0]
|
||||
break;
|
||||
80004f6: e013 b.n 8000520 <delay+0x4c>
|
||||
}
|
||||
for (uint16_t j = 0; j < LOOPS_PER_MS; ++j)
|
||||
80004f8: 2300 movs r3, #0
|
||||
80004fa: 81bb strh r3, [r7, #12]
|
||||
80004fc: e003 b.n 8000506 <delay+0x32>
|
||||
{
|
||||
__asm("NOP");
|
||||
80004fe: bf00 nop
|
||||
for (uint16_t j = 0; j < LOOPS_PER_MS; ++j)
|
||||
8000500: 89bb ldrh r3, [r7, #12]
|
||||
8000502: 3301 adds r3, #1
|
||||
8000504: 81bb strh r3, [r7, #12]
|
||||
8000506: 89bb ldrh r3, [r7, #12]
|
||||
8000508: f240 42db movw r2, #1243 @ 0x4db
|
||||
800050c: 4293 cmp r3, r2
|
||||
800050e: d9f6 bls.n 80004fe <delay+0x2a>
|
||||
for (uint16_t i = 0; i < ms; ++i)
|
||||
8000510: 89fb ldrh r3, [r7, #14]
|
||||
8000512: 3301 adds r3, #1
|
||||
8000514: 81fb strh r3, [r7, #14]
|
||||
8000516: 89fa ldrh r2, [r7, #14]
|
||||
8000518: 88fb ldrh r3, [r7, #6]
|
||||
800051a: 429a cmp r2, r3
|
||||
800051c: d3e2 bcc.n 80004e4 <delay+0x10>
|
||||
}
|
||||
}
|
||||
}
|
||||
800051e: bf00 nop
|
||||
8000520: bf00 nop
|
||||
8000522: 3714 adds r7, #20
|
||||
8000524: 46bd mov sp, r7
|
||||
8000526: f85d 7b04 ldr.w r7, [sp], #4
|
||||
800052a: 4770 bx lr
|
||||
800052c: 48000400 .word 0x48000400
|
||||
8000530: 2000001c .word 0x2000001c
|
||||
|
||||
08000534 <ISR_error>:
|
||||
*
|
||||
* Default interrupt handler for core interrupts.
|
||||
* Enables the green and red LED on the STefi Light board.
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
void ISR_error(void)
|
||||
{
|
||||
8000534: b480 push {r7}
|
||||
8000536: af00 add r7, sp, #0
|
||||
/* init */
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs)
|
||||
8000538: 4b10 ldr r3, [pc, #64] @ (800057c <ISR_error+0x48>)
|
||||
800053a: 6cdb ldr r3, [r3, #76] @ 0x4c
|
||||
800053c: 4a0f ldr r2, [pc, #60] @ (800057c <ISR_error+0x48>)
|
||||
800053e: f043 0301 orr.w r3, r3, #1
|
||||
8000542: 64d3 str r3, [r2, #76] @ 0x4c
|
||||
GPIOA->ODR |= MASK_LED_ALL;
|
||||
8000544: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000548: 695b ldr r3, [r3, #20]
|
||||
800054a: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
800054e: f043 030f orr.w r3, r3, #15
|
||||
8000552: 6153 str r3, [r2, #20]
|
||||
GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x11;
|
||||
8000554: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000558: 681b ldr r3, [r3, #0]
|
||||
800055a: f023 03ff bic.w r3, r3, #255 @ 0xff
|
||||
800055e: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000562: f043 0311 orr.w r3, r3, #17
|
||||
8000566: 6013 str r3, [r2, #0]
|
||||
|
||||
while(1)
|
||||
{ /* light up the LEDs permanently */
|
||||
GPIOA->ODR &= ~(MASK_LED_GREEN | MASK_LED_RED);
|
||||
8000568: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
800056c: 695b ldr r3, [r3, #20]
|
||||
800056e: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
8000572: f023 0305 bic.w r3, r3, #5
|
||||
8000576: 6153 str r3, [r2, #20]
|
||||
8000578: e7f6 b.n 8000568 <ISR_error+0x34>
|
||||
800057a: bf00 nop
|
||||
800057c: 40021000 .word 0x40021000
|
||||
|
||||
08000580 <ISR_default>:
|
||||
*
|
||||
* Default interrupt handler for non-core interrupts.
|
||||
* Enables the blue and yellow LED on the STefi Light board.
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
void ISR_default(void)
|
||||
{
|
||||
8000580: b480 push {r7}
|
||||
8000582: af00 add r7, sp, #0
|
||||
/* init */
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // PA: clock on (LEDs)
|
||||
8000584: 4b10 ldr r3, [pc, #64] @ (80005c8 <ISR_default+0x48>)
|
||||
8000586: 6cdb ldr r3, [r3, #76] @ 0x4c
|
||||
8000588: 4a0f ldr r2, [pc, #60] @ (80005c8 <ISR_default+0x48>)
|
||||
800058a: f043 0301 orr.w r3, r3, #1
|
||||
800058e: 64d3 str r3, [r2, #76] @ 0x4c
|
||||
GPIOA->ODR |= MASK_LED_ALL;
|
||||
8000590: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
8000594: 695b ldr r3, [r3, #20]
|
||||
8000596: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
800059a: f043 030f orr.w r3, r3, #15
|
||||
800059e: 6153 str r3, [r2, #20]
|
||||
GPIOA->MODER = (GPIOA->MODER & 0xFFFFFF00) | 0x44;
|
||||
80005a0: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
80005a4: 681b ldr r3, [r3, #0]
|
||||
80005a6: f023 03ff bic.w r3, r3, #255 @ 0xff
|
||||
80005aa: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80005ae: f043 0344 orr.w r3, r3, #68 @ 0x44
|
||||
80005b2: 6013 str r3, [r2, #0]
|
||||
|
||||
while(1)
|
||||
{ /* light up the LEDs permanently */
|
||||
GPIOA->ODR &= ~(MASK_LED_BLUE | MASK_LED_YELLOW);
|
||||
80005b4: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
|
||||
80005b8: 695b ldr r3, [r3, #20]
|
||||
80005ba: f04f 4290 mov.w r2, #1207959552 @ 0x48000000
|
||||
80005be: f023 030a bic.w r3, r3, #10
|
||||
80005c2: 6153 str r3, [r2, #20]
|
||||
80005c4: e7f6 b.n 80005b4 <ISR_default+0x34>
|
||||
80005c6: bf00 nop
|
||||
80005c8: 40021000 .word 0x40021000
|
||||
|
||||
080005cc <Reset_Handler>:
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr r0, =_estack
|
||||
80005cc: 480c ldr r0, [pc, #48] @ (8000600 <LoopForever+0x2>)
|
||||
mov sp, r0 /* set stack pointer */
|
||||
80005ce: 4685 mov sp, r0
|
||||
/* Call the clock system initialization function.*/
|
||||
// bl SystemInit
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
80005d0: 480c ldr r0, [pc, #48] @ (8000604 <LoopForever+0x6>)
|
||||
ldr r1, =_edata
|
||||
80005d2: 490d ldr r1, [pc, #52] @ (8000608 <LoopForever+0xa>)
|
||||
ldr r2, =_sidata
|
||||
80005d4: 4a0d ldr r2, [pc, #52] @ (800060c <LoopForever+0xe>)
|
||||
movs r3, #0
|
||||
80005d6: 2300 movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
80005d8: e002 b.n 80005e0 <LoopCopyDataInit>
|
||||
|
||||
080005da <CopyDataInit>:
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
80005da: 58d4 ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
80005dc: 50c4 str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
80005de: 3304 adds r3, #4
|
||||
|
||||
080005e0 <LoopCopyDataInit>:
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
80005e0: 18c4 adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
80005e2: 428c cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
80005e4: d3f9 bcc.n 80005da <CopyDataInit>
|
||||
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
80005e6: 4a0a ldr r2, [pc, #40] @ (8000610 <LoopForever+0x12>)
|
||||
ldr r4, =_ebss
|
||||
80005e8: 4c0a ldr r4, [pc, #40] @ (8000614 <LoopForever+0x16>)
|
||||
movs r3, #0
|
||||
80005ea: 2300 movs r3, #0
|
||||
b LoopFillZerobss
|
||||
80005ec: e001 b.n 80005f2 <LoopFillZerobss>
|
||||
|
||||
080005ee <FillZerobss>:
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
80005ee: 6013 str r3, [r2, #0]
|
||||
adds r2, r2, #4
|
||||
80005f0: 3204 adds r2, #4
|
||||
|
||||
080005f2 <LoopFillZerobss>:
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
80005f2: 42a2 cmp r2, r4
|
||||
bcc FillZerobss
|
||||
80005f4: d3fb bcc.n 80005ee <FillZerobss>
|
||||
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
80005f6: f000 f80f bl 8000618 <__libc_init_array>
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
80005fa: f7ff fe0d bl 8000218 <main>
|
||||
|
||||
080005fe <LoopForever>:
|
||||
|
||||
LoopForever:
|
||||
b LoopForever
|
||||
80005fe: e7fe b.n 80005fe <LoopForever>
|
||||
ldr r0, =_estack
|
||||
8000600: 20008000 .word 0x20008000
|
||||
ldr r0, =_sdata
|
||||
8000604: 20000000 .word 0x20000000
|
||||
ldr r1, =_edata
|
||||
8000608: 20000000 .word 0x20000000
|
||||
ldr r2, =_sidata
|
||||
800060c: 08000680 .word 0x08000680
|
||||
ldr r2, =_sbss
|
||||
8000610: 20000000 .word 0x20000000
|
||||
ldr r4, =_ebss
|
||||
8000614: 20000020 .word 0x20000020
|
||||
|
||||
08000618 <__libc_init_array>:
|
||||
8000618: b570 push {r4, r5, r6, lr}
|
||||
800061a: 4d0d ldr r5, [pc, #52] @ (8000650 <__libc_init_array+0x38>)
|
||||
800061c: 4c0d ldr r4, [pc, #52] @ (8000654 <__libc_init_array+0x3c>)
|
||||
800061e: 1b64 subs r4, r4, r5
|
||||
8000620: 10a4 asrs r4, r4, #2
|
||||
8000622: 2600 movs r6, #0
|
||||
8000624: 42a6 cmp r6, r4
|
||||
8000626: d109 bne.n 800063c <__libc_init_array+0x24>
|
||||
8000628: 4d0b ldr r5, [pc, #44] @ (8000658 <__libc_init_array+0x40>)
|
||||
800062a: 4c0c ldr r4, [pc, #48] @ (800065c <__libc_init_array+0x44>)
|
||||
800062c: f000 f818 bl 8000660 <_init>
|
||||
8000630: 1b64 subs r4, r4, r5
|
||||
8000632: 10a4 asrs r4, r4, #2
|
||||
8000634: 2600 movs r6, #0
|
||||
8000636: 42a6 cmp r6, r4
|
||||
8000638: d105 bne.n 8000646 <__libc_init_array+0x2e>
|
||||
800063a: bd70 pop {r4, r5, r6, pc}
|
||||
800063c: f855 3b04 ldr.w r3, [r5], #4
|
||||
8000640: 4798 blx r3
|
||||
8000642: 3601 adds r6, #1
|
||||
8000644: e7ee b.n 8000624 <__libc_init_array+0xc>
|
||||
8000646: f855 3b04 ldr.w r3, [r5], #4
|
||||
800064a: 4798 blx r3
|
||||
800064c: 3601 adds r6, #1
|
||||
800064e: e7f2 b.n 8000636 <__libc_init_array+0x1e>
|
||||
8000650: 08000678 .word 0x08000678
|
||||
8000654: 08000678 .word 0x08000678
|
||||
8000658: 08000678 .word 0x08000678
|
||||
800065c: 0800067c .word 0x0800067c
|
||||
|
||||
08000660 <_init>:
|
||||
8000660: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||||
8000662: bf00 nop
|
||||
8000664: bcf8 pop {r3, r4, r5, r6, r7}
|
||||
8000666: bc08 pop {r3}
|
||||
8000668: 469e mov lr, r3
|
||||
800066a: 4770 bx lr
|
||||
|
||||
0800066c <_fini>:
|
||||
800066c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
||||
800066e: bf00 nop
|
||||
8000670: bcf8 pop {r3, r4, r5, r6, r7}
|
||||
8000672: bc08 pop {r3}
|
||||
8000674: 469e mov lr, r3
|
||||
8000676: 4770 bx lr
|
||||
@ -1,825 +0,0 @@
|
||||
Archive member included to satisfy reference by file (symbol)
|
||||
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-exit.o)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o (exit)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-findfp.o)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-exit.o) (__stdio_exit_handler)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fwalk.o)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-findfp.o) (_fwalk_sglue)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-stdio.o)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-findfp.o) (__sread)
|
||||
D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-memset.o)
|
||||
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||||
.bss 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mallocr.o)
|
||||
.text.sbrk_aligned
|
||||
0x00000000 0x44 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mallocr.o)
|
||||
.text._malloc_r
|
||||
0x00000000 0x100 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mallocr.o)
|
||||
.bss.__malloc_sbrk_start
|
||||
0x00000000 0x4 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mallocr.o)
|
||||
.bss.__malloc_free_list
|
||||
0x00000000 0x4 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mallocr.o)
|
||||
.debug_frame 0x00000000 0x50 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mallocr.o)
|
||||
.ARM.attributes
|
||||
0x00000000 0x34 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mallocr.o)
|
||||
.text 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mlock.o)
|
||||
.data 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mlock.o)
|
||||
.bss 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mlock.o)
|
||||
.text.__malloc_lock
|
||||
0x00000000 0xc D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mlock.o)
|
||||
.text.__malloc_unlock
|
||||
0x00000000 0xc D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mlock.o)
|
||||
.debug_frame 0x00000000 0x30 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mlock.o)
|
||||
.ARM.attributes
|
||||
0x00000000 0x34 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-mlock.o)
|
||||
.text 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.data 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.bss 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.text.__sflush_r
|
||||
0x00000000 0x108 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.text._fflush_r
|
||||
0x00000000 0x50 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.text.fflush 0x00000000 0x28 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.debug_frame 0x00000000 0x5c D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.ARM.attributes
|
||||
0x00000000 0x34 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-fflush.o)
|
||||
.text 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-sbrkr.o)
|
||||
.data 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-sbrkr.o)
|
||||
.bss 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-sbrkr.o)
|
||||
.text._sbrk_r 0x00000000 0x20 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-sbrkr.o)
|
||||
.debug_frame 0x00000000 0x2c D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-sbrkr.o)
|
||||
.ARM.attributes
|
||||
0x00000000 0x34 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-sbrkr.o)
|
||||
.text 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
|
||||
.data 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
|
||||
.bss 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
|
||||
.rodata 0x00000000 0x24 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
|
||||
.eh_frame 0x00000000 0x4 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
|
||||
.ARM.attributes
|
||||
0x00000000 0x34 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
|
||||
.text 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
|
||||
.data 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
|
||||
.bss 0x00000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
|
||||
|
||||
Memory Configuration
|
||||
|
||||
Name Origin Length Attributes
|
||||
CCMSRAM 0x10000000 0x00002800 xrw
|
||||
RAM 0x20000000 0x00008000 xrw
|
||||
FLASH 0x08000000 0x00020000 xr
|
||||
*default* 0x00000000 0xffffffff
|
||||
|
||||
Linker script and memory map
|
||||
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/crt0.o
|
||||
LOAD ./Src/task1.o
|
||||
LOAD ./Src/task1_it.o
|
||||
LOAD ./Startup/startup_stm32g431kbtx.o
|
||||
LOAD ./Startup/syscalls.o
|
||||
LOAD ./Startup/sysmem.o
|
||||
START GROUP
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libm.a
|
||||
END GROUP
|
||||
START GROUP
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard\libgcc.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a
|
||||
END GROUP
|
||||
START GROUP
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard\libgcc.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libnosys.a
|
||||
END GROUP
|
||||
START GROUP
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard\libgcc.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libnosys.a
|
||||
END GROUP
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtend.o
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
|
||||
0x20008000 _estack = (ORIGIN (RAM) + LENGTH (RAM))
|
||||
0x00000200 _Min_Heap_Size = 0x200
|
||||
0x00000400 _Min_Stack_Size = 0x400
|
||||
|
||||
.isr_vector 0x08000000 0x1d8
|
||||
0x08000000 . = ALIGN (0x4)
|
||||
*(.isr_vector)
|
||||
.isr_vector 0x08000000 0x1d8 ./Src/task1_it.o
|
||||
0x08000000 paIsrFunc
|
||||
0x080001d8 . = ALIGN (0x4)
|
||||
|
||||
.text 0x080001d8 0x4a0
|
||||
0x080001d8 . = ALIGN (0x4)
|
||||
*(.text)
|
||||
.text 0x080001d8 0x40 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
*(.text*)
|
||||
.text.main 0x08000218 0x1d8 ./Src/task1.o
|
||||
0x08000218 main
|
||||
.text.GPIO_init
|
||||
0x080003f0 0xe4 ./Src/task1.o
|
||||
.text.delay 0x080004d4 0x60 ./Src/task1.o
|
||||
.text.ISR_error
|
||||
0x08000534 0x4c ./Src/task1_it.o
|
||||
0x08000534 ISR_error
|
||||
.text.ISR_default
|
||||
0x08000580 0x4c ./Src/task1_it.o
|
||||
0x08000580 ISR_default
|
||||
.text.Reset_Handler
|
||||
0x080005cc 0x4c ./Startup/startup_stm32g431kbtx.o
|
||||
0x080005cc Reset_Handler
|
||||
.text.__libc_init_array
|
||||
0x08000618 0x48 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o)
|
||||
0x08000618 __libc_init_array
|
||||
*(.glue_7)
|
||||
.glue_7 0x08000660 0x0 linker stubs
|
||||
*(.glue_7t)
|
||||
.glue_7t 0x08000660 0x0 linker stubs
|
||||
*(.eh_frame)
|
||||
.eh_frame 0x08000660 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
*(.init)
|
||||
.init 0x08000660 0x4 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
|
||||
0x08000660 _init
|
||||
.init 0x08000664 0x8 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
|
||||
*(.fini)
|
||||
.fini 0x0800066c 0x4 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
|
||||
0x0800066c _fini
|
||||
.fini 0x08000670 0x8 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
0x08000678 _etext = .
|
||||
|
||||
.vfp11_veneer 0x08000678 0x0
|
||||
.vfp11_veneer 0x08000678 0x0 linker stubs
|
||||
|
||||
.v4_bx 0x08000678 0x0
|
||||
.v4_bx 0x08000678 0x0 linker stubs
|
||||
|
||||
.iplt 0x08000678 0x0
|
||||
.iplt 0x08000678 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
|
||||
.rodata 0x08000678 0x0
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
*(.rodata)
|
||||
*(.rodata*)
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
|
||||
.ARM.extab 0x08000678 0x0
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
|
||||
.ARM 0x08000678 0x0
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
0x08000678 __exidx_start = .
|
||||
*(.ARM.exidx*)
|
||||
0x08000678 __exidx_end = .
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
|
||||
.preinit_array 0x08000678 0x0
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
0x08000678 PROVIDE (__preinit_array_start = .)
|
||||
*(.preinit_array*)
|
||||
0x08000678 PROVIDE (__preinit_array_end = .)
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
|
||||
.init_array 0x08000678 0x4
|
||||
0x08000678 . = ALIGN (0x4)
|
||||
0x08000678 PROVIDE (__init_array_start = .)
|
||||
*(SORT_BY_NAME(.init_array.*))
|
||||
*(.init_array*)
|
||||
.init_array 0x08000678 0x4 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
0x0800067c PROVIDE (__init_array_end = .)
|
||||
0x0800067c . = ALIGN (0x4)
|
||||
|
||||
.fini_array 0x0800067c 0x4
|
||||
0x0800067c . = ALIGN (0x4)
|
||||
[!provide] PROVIDE (__fini_array_start = .)
|
||||
*(SORT_BY_NAME(.fini_array.*))
|
||||
*(.fini_array*)
|
||||
.fini_array 0x0800067c 0x4 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
[!provide] PROVIDE (__fini_array_end = .)
|
||||
0x08000680 . = ALIGN (0x4)
|
||||
0x08000680 _sidata = LOADADDR (.data)
|
||||
|
||||
.rel.dyn 0x08000680 0x0
|
||||
.rel.iplt 0x08000680 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
|
||||
.data 0x20000000 0x0 load address 0x08000680
|
||||
0x20000000 . = ALIGN (0x4)
|
||||
0x20000000 _sdata = .
|
||||
*(.data)
|
||||
*(.data*)
|
||||
*(.RamFunc)
|
||||
*(.RamFunc*)
|
||||
0x20000000 . = ALIGN (0x4)
|
||||
0x20000000 _edata = .
|
||||
0x08000680 _siccmsram = LOADADDR (.ccmsram)
|
||||
|
||||
.igot.plt 0x20000000 0x0 load address 0x08000680
|
||||
.igot.plt 0x20000000 0x0 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
|
||||
.ccmsram 0x10000000 0x0 load address 0x08000680
|
||||
0x10000000 . = ALIGN (0x4)
|
||||
0x10000000 _sccmsram = .
|
||||
*(.ccmsram)
|
||||
*(.ccmsram*)
|
||||
0x10000000 . = ALIGN (0x4)
|
||||
0x10000000 _eccmsram = .
|
||||
0x10000000 . = ALIGN (0x4)
|
||||
|
||||
.bss 0x20000000 0x20
|
||||
0x20000000 _sbss = .
|
||||
0x20000000 __bss_start__ = _sbss
|
||||
*(.bss)
|
||||
.bss 0x20000000 0x1c D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
*(.bss*)
|
||||
.bss.state 0x2000001c 0x4 ./Src/task1.o
|
||||
0x2000001c state
|
||||
*(COMMON)
|
||||
0x20000020 . = ALIGN (0x4)
|
||||
0x20000020 _ebss = .
|
||||
0x20000020 __bss_end__ = _ebss
|
||||
|
||||
._user_heap_stack
|
||||
0x20000020 0x600
|
||||
0x20000020 . = ALIGN (0x8)
|
||||
[!provide] PROVIDE (end = .)
|
||||
0x20000020 PROVIDE (_end = .)
|
||||
0x20000220 . = (. + _Min_Heap_Size)
|
||||
*fill* 0x20000020 0x200
|
||||
0x20000620 . = (. + _Min_Stack_Size)
|
||||
*fill* 0x20000220 0x400
|
||||
0x20000620 . = ALIGN (0x8)
|
||||
|
||||
/DISCARD/
|
||||
libc.a(*)
|
||||
libm.a(*)
|
||||
libgcc.a(*)
|
||||
|
||||
.ARM.attributes
|
||||
0x00000000 0x30
|
||||
*(.ARM.attributes)
|
||||
.ARM.attributes
|
||||
0x00000000 0x22 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crti.o
|
||||
.ARM.attributes
|
||||
0x00000022 0x34 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtbegin.o
|
||||
.ARM.attributes
|
||||
0x00000056 0x34 ./Src/task1.o
|
||||
.ARM.attributes
|
||||
0x0000008a 0x34 ./Src/task1_it.o
|
||||
.ARM.attributes
|
||||
0x000000be 0x21 ./Startup/startup_stm32g431kbtx.o
|
||||
.ARM.attributes
|
||||
0x000000df 0x34 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o)
|
||||
.ARM.attributes
|
||||
0x00000113 0x22 D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard/crtn.o
|
||||
OUTPUT(task1.elf elf32-littlearm)
|
||||
LOAD linker stubs
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libm.a
|
||||
LOAD D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/thumb/v7e-m+fp/hard\libgcc.a
|
||||
|
||||
.debug_info 0x00000000 0x7eb
|
||||
.debug_info 0x00000000 0x42f ./Src/task1.o
|
||||
.debug_info 0x0000042f 0x38b ./Src/task1_it.o
|
||||
.debug_info 0x000007ba 0x31 ./Startup/startup_stm32g431kbtx.o
|
||||
|
||||
.debug_abbrev 0x00000000 0x296
|
||||
.debug_abbrev 0x00000000 0x173 ./Src/task1.o
|
||||
.debug_abbrev 0x00000173 0xfd ./Src/task1_it.o
|
||||
.debug_abbrev 0x00000270 0x26 ./Startup/startup_stm32g431kbtx.o
|
||||
|
||||
.debug_aranges 0x00000000 0x78
|
||||
.debug_aranges
|
||||
0x00000000 0x30 ./Src/task1.o
|
||||
.debug_aranges
|
||||
0x00000030 0x28 ./Src/task1_it.o
|
||||
.debug_aranges
|
||||
0x00000058 0x20 ./Startup/startup_stm32g431kbtx.o
|
||||
|
||||
.debug_rnglists
|
||||
0x00000000 0x3a
|
||||
.debug_rnglists
|
||||
0x00000000 0x21 ./Src/task1.o
|
||||
.debug_rnglists
|
||||
0x00000021 0x19 ./Src/task1_it.o
|
||||
|
||||
.debug_macro 0x00000000 0x13740
|
||||
.debug_macro 0x00000000 0xd4 ./Src/task1.o
|
||||
.debug_macro 0x000000d4 0xac0 ./Src/task1.o
|
||||
.debug_macro 0x00000b94 0x28 ./Src/task1.o
|
||||
.debug_macro 0x00000bbc 0x22 ./Src/task1.o
|
||||
.debug_macro 0x00000bde 0x8e ./Src/task1.o
|
||||
.debug_macro 0x00000c6c 0x51 ./Src/task1.o
|
||||
.debug_macro 0x00000cbd 0x103 ./Src/task1.o
|
||||
.debug_macro 0x00000dc0 0x6a ./Src/task1.o
|
||||
.debug_macro 0x00000e2a 0x1df ./Src/task1.o
|
||||
.debug_macro 0x00001009 0x1c ./Src/task1.o
|
||||
.debug_macro 0x00001025 0x22 ./Src/task1.o
|
||||
.debug_macro 0x00001047 0xfb ./Src/task1.o
|
||||
.debug_macro 0x00001142 0x1011 ./Src/task1.o
|
||||
.debug_macro 0x00002153 0x11f ./Src/task1.o
|
||||
.debug_macro 0x00002272 0x11396 ./Src/task1.o
|
||||
.debug_macro 0x00013608 0x70 ./Src/task1.o
|
||||
.debug_macro 0x00013678 0xc8 ./Src/task1_it.o
|
||||
|
||||
.debug_line 0x00000000 0xb70
|
||||
.debug_line 0x00000000 0x616 ./Src/task1.o
|
||||
.debug_line 0x00000616 0x4f0 ./Src/task1_it.o
|
||||
.debug_line 0x00000b06 0x6a ./Startup/startup_stm32g431kbtx.o
|
||||
|
||||
.debug_str 0x00000000 0x6f819
|
||||
.debug_str 0x00000000 0x6f7a0 ./Src/task1.o
|
||||
0x6f93c (size before relaxing)
|
||||
.debug_str 0x0006f7a0 0x48 ./Src/task1_it.o
|
||||
0x6f8e8 (size before relaxing)
|
||||
.debug_str 0x0006f7e8 0x31 ./Startup/startup_stm32g431kbtx.o
|
||||
0x7e (size before relaxing)
|
||||
|
||||
.comment 0x00000000 0x43
|
||||
.comment 0x00000000 0x43 ./Src/task1.o
|
||||
0x44 (size before relaxing)
|
||||
.comment 0x00000043 0x44 ./Src/task1_it.o
|
||||
|
||||
.debug_frame 0x00000000 0xe4
|
||||
.debug_frame 0x00000000 0x78 ./Src/task1.o
|
||||
.debug_frame 0x00000078 0x40 ./Src/task1_it.o
|
||||
.debug_frame 0x000000b8 0x2c D:/STMCubeIDE/STM32CubeIDE_1.16.1/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.12.3.rel1.win32_1.0.200.202406191623/tools/bin/../lib/gcc/arm-none-eabi/12.3.1/../../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard\libc_nano.a(libc_a-init.o)
|
||||
|
||||
.debug_line_str
|
||||
0x00000000 0x62
|
||||
.debug_line_str
|
||||
0x00000000 0x62 ./Startup/startup_stm32g431kbtx.o
|
||||
36
task1/Src/sketch.c
Normal file
36
task1/Src/sketch.c
Normal file
@ -0,0 +1,36 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
|
||||
|
||||
int main(){
|
||||
while(1){
|
||||
while(/*schalter nicht gedrückt*/){}
|
||||
delay(10);
|
||||
while(/*schalter losgelassen*/){}
|
||||
delay(150);
|
||||
|
||||
int aktiv = 1;
|
||||
while(aktiv){
|
||||
for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
|
||||
//alle LED einschalten
|
||||
if(i = 0){/*alles bis auf LED0 auschalten*/}
|
||||
if(i = 1){/*..*/}
|
||||
//...
|
||||
for(int zähler = 0; zähler < 333 && aktiv == 1; zähler++){
|
||||
if(/*schalter gerückt*/){
|
||||
aktiv = 0;
|
||||
break;
|
||||
}
|
||||
else{
|
||||
delay(1);
|
||||
}
|
||||
}
|
||||
while(/*Taster gedrückt*/){}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -125,6 +125,7 @@ int main(void)
|
||||
GPIOA->ODR |= MASK_LED_ALL;
|
||||
while(1){
|
||||
if((GPIOB->IDR & (1 << 0)) == 0){
|
||||
delay(150);
|
||||
state=0;
|
||||
break;
|
||||
}
|
||||
@ -165,7 +166,7 @@ GPIOA->MODER &= ~(3 << 0);
|
||||
GPIOA->MODER |= (1 << 0); // set LED pin to output
|
||||
|
||||
/* LED1 als Output */
|
||||
GPIOA->MODER &= ~(3 << 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
GPIOA->MODER |= (1 << 2); // Versuch: LED 1 PA1 = output :klappt so
|
||||
|
||||
/* LED2 als Output */
|
||||
@ -197,7 +198,7 @@ static void delay(const uint16_t ms)
|
||||
{
|
||||
for (uint16_t i = 0; i < ms; ++i)
|
||||
{
|
||||
if((GPIOB->IDR & (1 << 0)) == 0){
|
||||
if((GPIOB->IDR & (1 << 0) && state != 99) == 0){
|
||||
state = 99;
|
||||
break;
|
||||
}
|
||||
|
||||
@ -37,7 +37,7 @@
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.stlink_txt_serial_number" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlink.watchdog_config" value="none"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkenable_rtos" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{"fVersion":1,"fItems":[{"fDisplayName":"Reset","fIsSuppressible":false,"fResetAttribute":"Software system reset","fResetStrategies":[{"fDisplayName":"Software system reset","fLaunchAttribute":"system_reset","fGdbCommands":["monitor reset\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Hardware reset","fLaunchAttribute":"hardware_reset","fGdbCommands":["monitor reset hardware\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Core reset","fLaunchAttribute":"core_reset","fGdbCommands":["monitor reset core\r\n"],"fCmdOptions":["-g"]},{"fDisplayName":"None","fLaunchAttribute":"no_reset","fGdbCommands":[],"fCmdOptions":["-g"]}],"fGdbCommandGroup":{"name":"Additional commands","commands":[]},"fStartApplication":true}]}"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.debug.stlinkrestart_configurations" value="{"fVersion":1,"fItems":[{"fDisplayName":"Reset","fIsSuppressible":false,"fResetAttribute":"Software system reset","fResetStrategies":[{"fDisplayName":"Software system reset","fLaunchAttribute":"system_reset","fGdbCommands":["monitor reset\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Hardware reset","fLaunchAttribute":"hardware_reset","fGdbCommands":["monitor reset hardware\n"],"fCmdOptions":["-g"]},{"fDisplayName":"Core reset","fLaunchAttribute":"core_reset","fGdbCommands":["monitor reset core\n"],"fCmdOptions":["-g"]},{"fDisplayName":"None","fLaunchAttribute":"no_reset","fGdbCommands":[],"fCmdOptions":["-g"]}],"fGdbCommandGroup":{"name":"Additional commands","commands":[]},"fStartApplication":true}]}"/>
|
||||
<booleanAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.enableRtosProxy" value="false"/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyCustomProperties" value=""/>
|
||||
<stringAttribute key="com.st.stm32cube.ide.mcu.rtosproxy.rtosProxyDriver" value="threadx"/>
|
||||
|
||||
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Reference in New Issue
Block a user